1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
58 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
59 #define MIN(a,b) ((a) < (b) ? (a) : (b))
62 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
63 #define CURR_SLOT md.slot[md.curr_slot]
65 #define O_pseudo_fixup (O_max + 1)
69 /* IA-64 ABI section pseudo-ops. */
70 SPECIAL_SECTION_BSS
= 0,
72 SPECIAL_SECTION_SDATA
,
73 SPECIAL_SECTION_RODATA
,
74 SPECIAL_SECTION_COMMENT
,
75 SPECIAL_SECTION_UNWIND
,
76 SPECIAL_SECTION_UNWIND_INFO
,
77 /* HPUX specific section pseudo-ops. */
78 SPECIAL_SECTION_INIT_ARRAY
,
79 SPECIAL_SECTION_FINI_ARRAY
,
96 FUNC_LT_FPTR_RELATIVE
,
106 REG_FR
= (REG_GR
+ 128),
107 REG_AR
= (REG_FR
+ 128),
108 REG_CR
= (REG_AR
+ 128),
109 REG_P
= (REG_CR
+ 128),
110 REG_BR
= (REG_P
+ 64),
111 REG_IP
= (REG_BR
+ 8),
118 /* The following are pseudo-registers for use by gas only. */
130 /* The following pseudo-registers are used for unwind directives only: */
138 DYNREG_GR
= 0, /* dynamic general purpose register */
139 DYNREG_FR
, /* dynamic floating point register */
140 DYNREG_PR
, /* dynamic predicate register */
144 enum operand_match_result
147 OPERAND_OUT_OF_RANGE
,
151 /* On the ia64, we can't know the address of a text label until the
152 instructions are packed into a bundle. To handle this, we keep
153 track of the list of labels that appear in front of each
157 struct label_fix
*next
;
161 /* This is the endianness of the current section. */
162 extern int target_big_endian
;
164 /* This is the default endianness. */
165 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
167 void (*ia64_number_to_chars
) PARAMS ((char *, valueT
, int));
169 static void ia64_float_to_chars_bigendian
170 PARAMS ((char *, LITTLENUM_TYPE
*, int));
171 static void ia64_float_to_chars_littleendian
172 PARAMS ((char *, LITTLENUM_TYPE
*, int));
173 static void (*ia64_float_to_chars
)
174 PARAMS ((char *, LITTLENUM_TYPE
*, int));
176 static struct hash_control
*alias_hash
;
177 static struct hash_control
*alias_name_hash
;
178 static struct hash_control
*secalias_hash
;
179 static struct hash_control
*secalias_name_hash
;
181 /* List of chars besides those in app.c:symbol_chars that can start an
182 operand. Used to prevent the scrubber eating vital white-space. */
183 const char ia64_symbol_chars
[] = "@?";
185 /* Characters which always start a comment. */
186 const char comment_chars
[] = "";
188 /* Characters which start a comment at the beginning of a line. */
189 const char line_comment_chars
[] = "#";
191 /* Characters which may be used to separate multiple commands on a
193 const char line_separator_chars
[] = ";";
195 /* Characters which are used to indicate an exponent in a floating
197 const char EXP_CHARS
[] = "eE";
199 /* Characters which mean that a number is a floating point constant,
201 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
203 /* ia64-specific option processing: */
205 const char *md_shortopts
= "m:N:x::";
207 struct option md_longopts
[] =
209 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
210 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
211 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
212 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
215 size_t md_longopts_size
= sizeof (md_longopts
);
219 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
220 struct hash_control
*reg_hash
; /* register name hash table */
221 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
222 struct hash_control
*const_hash
; /* constant hash table */
223 struct hash_control
*entry_hash
; /* code entry hint hash table */
225 symbolS
*regsym
[REG_NUM
];
227 /* If X_op is != O_absent, the registername for the instruction's
228 qualifying predicate. If NULL, p0 is assumed for instructions
229 that are predicatable. */
232 /* What to do when hint.b is used. */
244 explicit_mode
: 1, /* which mode we're in */
245 default_explicit_mode
: 1, /* which mode is the default */
246 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
248 keep_pending_output
: 1;
250 /* What to do when something is wrong with unwind directives. */
253 unwind_check_warning
,
257 /* Each bundle consists of up to three instructions. We keep
258 track of four most recent instructions so we can correctly set
259 the end_of_insn_group for the last instruction in a bundle. */
261 int num_slots_in_use
;
265 end_of_insn_group
: 1,
266 manual_bundling_on
: 1,
267 manual_bundling_off
: 1,
268 loc_directive_seen
: 1;
269 signed char user_template
; /* user-selected template, if any */
270 unsigned char qp_regno
; /* qualifying predicate */
271 /* This duplicates a good fraction of "struct fix" but we
272 can't use a "struct fix" instead since we can't call
273 fix_new_exp() until we know the address of the instruction. */
277 bfd_reloc_code_real_type code
;
278 enum ia64_opnd opnd
; /* type of operand in need of fix */
279 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
280 expressionS expr
; /* the value to be inserted */
282 fixup
[2]; /* at most two fixups per insn */
283 struct ia64_opcode
*idesc
;
284 struct label_fix
*label_fixups
;
285 struct label_fix
*tag_fixups
;
286 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
289 unsigned int src_line
;
290 struct dwarf2_line_info debug_line
;
298 struct dynreg
*next
; /* next dynamic register */
300 unsigned short base
; /* the base register number */
301 unsigned short num_regs
; /* # of registers in this set */
303 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
305 flagword flags
; /* ELF-header flags */
308 unsigned hint
:1; /* is this hint currently valid? */
309 bfd_vma offset
; /* mem.offset offset */
310 bfd_vma base
; /* mem.offset base */
313 int path
; /* number of alt. entry points seen */
314 const char **entry_labels
; /* labels of all alternate paths in
315 the current DV-checking block. */
316 int maxpaths
; /* size currently allocated for
319 int pointer_size
; /* size in bytes of a pointer */
320 int pointer_size_shift
; /* shift size of a pointer for alignment */
324 /* application registers: */
330 #define AR_BSPSTORE 18
345 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
346 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
347 {"ar.rsc", 16}, {"ar.bsp", 17},
348 {"ar.bspstore", 18}, {"ar.rnat", 19},
349 {"ar.fcr", 21}, {"ar.eflag", 24},
350 {"ar.csd", 25}, {"ar.ssd", 26},
351 {"ar.cflg", 27}, {"ar.fsr", 28},
352 {"ar.fir", 29}, {"ar.fdr", 30},
353 {"ar.ccv", 32}, {"ar.unat", 36},
354 {"ar.fpsr", 40}, {"ar.itc", 44},
355 {"ar.pfs", 64}, {"ar.lc", 65},
376 /* control registers: */
418 static const struct const_desc
425 /* PSR constant masks: */
428 {"psr.be", ((valueT
) 1) << 1},
429 {"psr.up", ((valueT
) 1) << 2},
430 {"psr.ac", ((valueT
) 1) << 3},
431 {"psr.mfl", ((valueT
) 1) << 4},
432 {"psr.mfh", ((valueT
) 1) << 5},
434 {"psr.ic", ((valueT
) 1) << 13},
435 {"psr.i", ((valueT
) 1) << 14},
436 {"psr.pk", ((valueT
) 1) << 15},
438 {"psr.dt", ((valueT
) 1) << 17},
439 {"psr.dfl", ((valueT
) 1) << 18},
440 {"psr.dfh", ((valueT
) 1) << 19},
441 {"psr.sp", ((valueT
) 1) << 20},
442 {"psr.pp", ((valueT
) 1) << 21},
443 {"psr.di", ((valueT
) 1) << 22},
444 {"psr.si", ((valueT
) 1) << 23},
445 {"psr.db", ((valueT
) 1) << 24},
446 {"psr.lp", ((valueT
) 1) << 25},
447 {"psr.tb", ((valueT
) 1) << 26},
448 {"psr.rt", ((valueT
) 1) << 27},
449 /* 28-31: reserved */
450 /* 32-33: cpl (current privilege level) */
451 {"psr.is", ((valueT
) 1) << 34},
452 {"psr.mc", ((valueT
) 1) << 35},
453 {"psr.it", ((valueT
) 1) << 36},
454 {"psr.id", ((valueT
) 1) << 37},
455 {"psr.da", ((valueT
) 1) << 38},
456 {"psr.dd", ((valueT
) 1) << 39},
457 {"psr.ss", ((valueT
) 1) << 40},
458 /* 41-42: ri (restart instruction) */
459 {"psr.ed", ((valueT
) 1) << 43},
460 {"psr.bn", ((valueT
) 1) << 44},
463 /* indirect register-sets/memory: */
472 { "CPUID", IND_CPUID
},
473 { "cpuid", IND_CPUID
},
485 /* Pseudo functions used to indicate relocation types (these functions
486 start with an at sign (@). */
508 /* reloc pseudo functions (these must come first!): */
509 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
510 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
511 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
512 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
513 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
514 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
515 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
516 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
517 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
518 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
519 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
520 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
521 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
522 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
523 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
524 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
525 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
527 /* mbtype4 constants: */
528 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
529 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
530 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
531 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
532 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
534 /* fclass constants: */
535 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
536 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
537 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
538 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
539 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
540 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
541 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
542 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
543 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
545 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
547 /* hint constants: */
548 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
550 /* unwind-related constants: */
551 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
552 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
553 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
554 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_LINUX
} },
555 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
556 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
557 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
559 /* unwind-related registers: */
560 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
563 /* 41-bit nop opcodes (one per unit): */
564 static const bfd_vma nop
[IA64_NUM_UNITS
] =
566 0x0000000000LL
, /* NIL => break 0 */
567 0x0008000000LL
, /* I-unit nop */
568 0x0008000000LL
, /* M-unit nop */
569 0x4000000000LL
, /* B-unit nop */
570 0x0008000000LL
, /* F-unit nop */
571 0x0008000000LL
, /* L-"unit" nop */
572 0x0008000000LL
, /* X-unit nop */
575 /* Can't be `const' as it's passed to input routines (which have the
576 habit of setting temporary sentinels. */
577 static char special_section_name
[][20] =
579 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
580 {".IA_64.unwind"}, {".IA_64.unwind_info"},
581 {".init_array"}, {".fini_array"}
584 /* The best template for a particular sequence of up to three
586 #define N IA64_NUM_TYPES
587 static unsigned char best_template
[N
][N
][N
];
590 /* Resource dependencies currently in effect */
592 int depind
; /* dependency index */
593 const struct ia64_dependency
*dependency
; /* actual dependency */
594 unsigned specific
:1, /* is this a specific bit/regno? */
595 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
596 int index
; /* specific regno/bit within dependency */
597 int note
; /* optional qualifying note (0 if none) */
601 int insn_srlz
; /* current insn serialization state */
602 int data_srlz
; /* current data serialization state */
603 int qp_regno
; /* qualifying predicate for this usage */
604 char *file
; /* what file marked this dependency */
605 unsigned int line
; /* what line marked this dependency */
606 struct mem_offset mem_offset
; /* optional memory offset hint */
607 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
608 int path
; /* corresponding code entry index */
610 static int regdepslen
= 0;
611 static int regdepstotlen
= 0;
612 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
613 static const char *dv_sem
[] = { "none", "implied", "impliedf",
614 "data", "instr", "specific", "stop", "other" };
615 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
617 /* Current state of PR mutexation */
618 static struct qpmutex
{
621 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
622 static int qp_mutexeslen
= 0;
623 static int qp_mutexestotlen
= 0;
624 static valueT qp_safe_across_calls
= 0;
626 /* Current state of PR implications */
627 static struct qp_imply
{
630 unsigned p2_branched
:1;
632 } *qp_implies
= NULL
;
633 static int qp_implieslen
= 0;
634 static int qp_impliestotlen
= 0;
636 /* Keep track of static GR values so that indirect register usage can
637 sometimes be tracked. */
648 (((1 << (8 * sizeof(gr_values
->path
) - 2)) - 1) << 1) + 1,
654 /* Remember the alignment frag. */
655 static fragS
*align_frag
;
657 /* These are the routines required to output the various types of
660 /* A slot_number is a frag address plus the slot index (0-2). We use the
661 frag address here so that if there is a section switch in the middle of
662 a function, then instructions emitted to a different section are not
663 counted. Since there may be more than one frag for a function, this
664 means we also need to keep track of which frag this address belongs to
665 so we can compute inter-frag distances. This also nicely solves the
666 problem with nops emitted for align directives, which can't easily be
667 counted, but can easily be derived from frag sizes. */
669 typedef struct unw_rec_list
{
671 unsigned long slot_number
;
673 unsigned long next_slot_number
;
674 fragS
*next_slot_frag
;
675 struct unw_rec_list
*next
;
678 #define SLOT_NUM_NOT_SET (unsigned)-1
680 /* Linked list of saved prologue counts. A very poor
681 implementation of a map from label numbers to prologue counts. */
682 typedef struct label_prologue_count
684 struct label_prologue_count
*next
;
685 unsigned long label_number
;
686 unsigned int prologue_count
;
687 } label_prologue_count
;
691 /* Maintain a list of unwind entries for the current function. */
695 /* Any unwind entires that should be attached to the current slot
696 that an insn is being constructed for. */
697 unw_rec_list
*current_entry
;
699 /* These are used to create the unwind table entry for this function. */
701 symbolS
*info
; /* pointer to unwind info */
702 symbolS
*personality_routine
;
704 subsegT saved_text_subseg
;
705 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
707 /* TRUE if processing unwind directives in a prologue region. */
708 unsigned int prologue
: 1;
709 unsigned int prologue_mask
: 4;
710 unsigned int body
: 1;
711 unsigned int insn
: 1;
712 unsigned int prologue_count
; /* number of .prologues seen so far */
713 /* Prologue counts at previous .label_state directives. */
714 struct label_prologue_count
* saved_prologue_counts
;
717 /* The input value is a negated offset from psp, and specifies an address
718 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
719 must add 16 and divide by 4 to get the encoded value. */
721 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
723 typedef void (*vbyte_func
) PARAMS ((int, char *, char *));
725 /* Forward declarations: */
726 static void set_section
PARAMS ((char *name
));
727 static unsigned int set_regstack
PARAMS ((unsigned int, unsigned int,
728 unsigned int, unsigned int));
729 static void dot_align (int);
730 static void dot_radix
PARAMS ((int));
731 static void dot_special_section
PARAMS ((int));
732 static void dot_proc
PARAMS ((int));
733 static void dot_fframe
PARAMS ((int));
734 static void dot_vframe
PARAMS ((int));
735 static void dot_vframesp
PARAMS ((int));
736 static void dot_vframepsp
PARAMS ((int));
737 static void dot_save
PARAMS ((int));
738 static void dot_restore
PARAMS ((int));
739 static void dot_restorereg
PARAMS ((int));
740 static void dot_restorereg_p
PARAMS ((int));
741 static void dot_handlerdata
PARAMS ((int));
742 static void dot_unwentry
PARAMS ((int));
743 static void dot_altrp
PARAMS ((int));
744 static void dot_savemem
PARAMS ((int));
745 static void dot_saveg
PARAMS ((int));
746 static void dot_savef
PARAMS ((int));
747 static void dot_saveb
PARAMS ((int));
748 static void dot_savegf
PARAMS ((int));
749 static void dot_spill
PARAMS ((int));
750 static void dot_spillreg
PARAMS ((int));
751 static void dot_spillmem
PARAMS ((int));
752 static void dot_spillreg_p
PARAMS ((int));
753 static void dot_spillmem_p
PARAMS ((int));
754 static void dot_label_state
PARAMS ((int));
755 static void dot_copy_state
PARAMS ((int));
756 static void dot_unwabi
PARAMS ((int));
757 static void dot_personality
PARAMS ((int));
758 static void dot_body
PARAMS ((int));
759 static void dot_prologue
PARAMS ((int));
760 static void dot_endp
PARAMS ((int));
761 static void dot_template
PARAMS ((int));
762 static void dot_regstk
PARAMS ((int));
763 static void dot_rot
PARAMS ((int));
764 static void dot_byteorder
PARAMS ((int));
765 static void dot_psr
PARAMS ((int));
766 static void dot_alias
PARAMS ((int));
767 static void dot_ln
PARAMS ((int));
768 static char *parse_section_name
PARAMS ((void));
769 static void dot_xdata
PARAMS ((int));
770 static void stmt_float_cons
PARAMS ((int));
771 static void stmt_cons_ua
PARAMS ((int));
772 static void dot_xfloat_cons
PARAMS ((int));
773 static void dot_xstringer
PARAMS ((int));
774 static void dot_xdata_ua
PARAMS ((int));
775 static void dot_xfloat_cons_ua
PARAMS ((int));
776 static void print_prmask
PARAMS ((valueT mask
));
777 static void dot_pred_rel
PARAMS ((int));
778 static void dot_reg_val
PARAMS ((int));
779 static void dot_serialize
PARAMS ((int));
780 static void dot_dv_mode
PARAMS ((int));
781 static void dot_entry
PARAMS ((int));
782 static void dot_mem_offset
PARAMS ((int));
783 static void add_unwind_entry
PARAMS((unw_rec_list
*ptr
));
784 static symbolS
*declare_register
PARAMS ((const char *name
, int regnum
));
785 static void declare_register_set
PARAMS ((const char *, int, int));
786 static unsigned int operand_width
PARAMS ((enum ia64_opnd
));
787 static enum operand_match_result operand_match
PARAMS ((const struct ia64_opcode
*idesc
,
790 static int parse_operand
PARAMS ((expressionS
*e
));
791 static struct ia64_opcode
* parse_operands
PARAMS ((struct ia64_opcode
*));
792 static void build_insn
PARAMS ((struct slot
*, bfd_vma
*));
793 static void emit_one_bundle
PARAMS ((void));
794 static void fix_insn
PARAMS ((fixS
*, const struct ia64_operand
*, valueT
));
795 static bfd_reloc_code_real_type ia64_gen_real_reloc_type
PARAMS ((struct symbol
*sym
,
796 bfd_reloc_code_real_type r_type
));
797 static void insn_group_break
PARAMS ((int, int, int));
798 static void mark_resource
PARAMS ((struct ia64_opcode
*, const struct ia64_dependency
*,
799 struct rsrc
*, int depind
, int path
));
800 static void add_qp_mutex
PARAMS((valueT mask
));
801 static void add_qp_imply
PARAMS((int p1
, int p2
));
802 static void clear_qp_branch_flag
PARAMS((valueT mask
));
803 static void clear_qp_mutex
PARAMS((valueT mask
));
804 static void clear_qp_implies
PARAMS((valueT p1_mask
, valueT p2_mask
));
805 static int has_suffix_p
PARAMS((const char *, const char *));
806 static void clear_register_values
PARAMS ((void));
807 static void print_dependency
PARAMS ((const char *action
, int depind
));
808 static void instruction_serialization
PARAMS ((void));
809 static void data_serialization
PARAMS ((void));
810 static void remove_marked_resource
PARAMS ((struct rsrc
*));
811 static int is_conditional_branch
PARAMS ((struct ia64_opcode
*));
812 static int is_taken_branch
PARAMS ((struct ia64_opcode
*));
813 static int is_interruption_or_rfi
PARAMS ((struct ia64_opcode
*));
814 static int depends_on
PARAMS ((int, struct ia64_opcode
*));
815 static int specify_resource
PARAMS ((const struct ia64_dependency
*,
816 struct ia64_opcode
*, int, struct rsrc
[], int, int));
817 static int check_dv
PARAMS((struct ia64_opcode
*idesc
));
818 static void check_dependencies
PARAMS((struct ia64_opcode
*));
819 static void mark_resources
PARAMS((struct ia64_opcode
*));
820 static void update_dependencies
PARAMS((struct ia64_opcode
*));
821 static void note_register_values
PARAMS((struct ia64_opcode
*));
822 static int qp_mutex
PARAMS ((int, int, int));
823 static int resources_match
PARAMS ((struct rsrc
*, struct ia64_opcode
*, int, int, int));
824 static void output_vbyte_mem
PARAMS ((int, char *, char *));
825 static void count_output
PARAMS ((int, char *, char *));
826 static void output_R1_format
PARAMS ((vbyte_func
, unw_record_type
, int));
827 static void output_R2_format
PARAMS ((vbyte_func
, int, int, unsigned long));
828 static void output_R3_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
829 static void output_P1_format
PARAMS ((vbyte_func
, int));
830 static void output_P2_format
PARAMS ((vbyte_func
, int, int));
831 static void output_P3_format
PARAMS ((vbyte_func
, unw_record_type
, int));
832 static void output_P4_format
PARAMS ((vbyte_func
, unsigned char *, unsigned long));
833 static void output_P5_format
PARAMS ((vbyte_func
, int, unsigned long));
834 static void output_P6_format
PARAMS ((vbyte_func
, unw_record_type
, int));
835 static void output_P7_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long, unsigned long));
836 static void output_P8_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
837 static void output_P9_format
PARAMS ((vbyte_func
, int, int));
838 static void output_P10_format
PARAMS ((vbyte_func
, int, int));
839 static void output_B1_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
840 static void output_B2_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
841 static void output_B3_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
842 static void output_B4_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
843 static char format_ab_reg
PARAMS ((int, int));
844 static void output_X1_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, unsigned long,
846 static void output_X2_format
PARAMS ((vbyte_func
, int, int, int, int, int, unsigned long));
847 static void output_X3_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, int, unsigned long,
849 static void output_X4_format
PARAMS ((vbyte_func
, int, int, int, int, int, int, unsigned long));
850 static unw_rec_list
*output_endp
PARAMS ((void));
851 static unw_rec_list
*output_prologue
PARAMS ((void));
852 static unw_rec_list
*output_prologue_gr
PARAMS ((unsigned int, unsigned int));
853 static unw_rec_list
*output_body
PARAMS ((void));
854 static unw_rec_list
*output_mem_stack_f
PARAMS ((unsigned int));
855 static unw_rec_list
*output_mem_stack_v
PARAMS ((void));
856 static unw_rec_list
*output_psp_gr
PARAMS ((unsigned int));
857 static unw_rec_list
*output_psp_sprel
PARAMS ((unsigned int));
858 static unw_rec_list
*output_rp_when
PARAMS ((void));
859 static unw_rec_list
*output_rp_gr
PARAMS ((unsigned int));
860 static unw_rec_list
*output_rp_br
PARAMS ((unsigned int));
861 static unw_rec_list
*output_rp_psprel
PARAMS ((unsigned int));
862 static unw_rec_list
*output_rp_sprel
PARAMS ((unsigned int));
863 static unw_rec_list
*output_pfs_when
PARAMS ((void));
864 static unw_rec_list
*output_pfs_gr
PARAMS ((unsigned int));
865 static unw_rec_list
*output_pfs_psprel
PARAMS ((unsigned int));
866 static unw_rec_list
*output_pfs_sprel
PARAMS ((unsigned int));
867 static unw_rec_list
*output_preds_when
PARAMS ((void));
868 static unw_rec_list
*output_preds_gr
PARAMS ((unsigned int));
869 static unw_rec_list
*output_preds_psprel
PARAMS ((unsigned int));
870 static unw_rec_list
*output_preds_sprel
PARAMS ((unsigned int));
871 static unw_rec_list
*output_fr_mem
PARAMS ((unsigned int));
872 static unw_rec_list
*output_frgr_mem
PARAMS ((unsigned int, unsigned int));
873 static unw_rec_list
*output_gr_gr
PARAMS ((unsigned int, unsigned int));
874 static unw_rec_list
*output_gr_mem
PARAMS ((unsigned int));
875 static unw_rec_list
*output_br_mem
PARAMS ((unsigned int));
876 static unw_rec_list
*output_br_gr
PARAMS ((unsigned int, unsigned int));
877 static unw_rec_list
*output_spill_base
PARAMS ((unsigned int));
878 static unw_rec_list
*output_unat_when
PARAMS ((void));
879 static unw_rec_list
*output_unat_gr
PARAMS ((unsigned int));
880 static unw_rec_list
*output_unat_psprel
PARAMS ((unsigned int));
881 static unw_rec_list
*output_unat_sprel
PARAMS ((unsigned int));
882 static unw_rec_list
*output_lc_when
PARAMS ((void));
883 static unw_rec_list
*output_lc_gr
PARAMS ((unsigned int));
884 static unw_rec_list
*output_lc_psprel
PARAMS ((unsigned int));
885 static unw_rec_list
*output_lc_sprel
PARAMS ((unsigned int));
886 static unw_rec_list
*output_fpsr_when
PARAMS ((void));
887 static unw_rec_list
*output_fpsr_gr
PARAMS ((unsigned int));
888 static unw_rec_list
*output_fpsr_psprel
PARAMS ((unsigned int));
889 static unw_rec_list
*output_fpsr_sprel
PARAMS ((unsigned int));
890 static unw_rec_list
*output_priunat_when_gr
PARAMS ((void));
891 static unw_rec_list
*output_priunat_when_mem
PARAMS ((void));
892 static unw_rec_list
*output_priunat_gr
PARAMS ((unsigned int));
893 static unw_rec_list
*output_priunat_psprel
PARAMS ((unsigned int));
894 static unw_rec_list
*output_priunat_sprel
PARAMS ((unsigned int));
895 static unw_rec_list
*output_bsp_when
PARAMS ((void));
896 static unw_rec_list
*output_bsp_gr
PARAMS ((unsigned int));
897 static unw_rec_list
*output_bsp_psprel
PARAMS ((unsigned int));
898 static unw_rec_list
*output_bsp_sprel
PARAMS ((unsigned int));
899 static unw_rec_list
*output_bspstore_when
PARAMS ((void));
900 static unw_rec_list
*output_bspstore_gr
PARAMS ((unsigned int));
901 static unw_rec_list
*output_bspstore_psprel
PARAMS ((unsigned int));
902 static unw_rec_list
*output_bspstore_sprel
PARAMS ((unsigned int));
903 static unw_rec_list
*output_rnat_when
PARAMS ((void));
904 static unw_rec_list
*output_rnat_gr
PARAMS ((unsigned int));
905 static unw_rec_list
*output_rnat_psprel
PARAMS ((unsigned int));
906 static unw_rec_list
*output_rnat_sprel
PARAMS ((unsigned int));
907 static unw_rec_list
*output_unwabi
PARAMS ((unsigned long, unsigned long));
908 static unw_rec_list
*output_epilogue
PARAMS ((unsigned long));
909 static unw_rec_list
*output_label_state
PARAMS ((unsigned long));
910 static unw_rec_list
*output_copy_state
PARAMS ((unsigned long));
911 static unw_rec_list
*output_spill_psprel
PARAMS ((unsigned int, unsigned int, unsigned int));
912 static unw_rec_list
*output_spill_sprel
PARAMS ((unsigned int, unsigned int, unsigned int));
913 static unw_rec_list
*output_spill_psprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
915 static unw_rec_list
*output_spill_sprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
917 static unw_rec_list
*output_spill_reg
PARAMS ((unsigned int, unsigned int, unsigned int,
919 static unw_rec_list
*output_spill_reg_p
PARAMS ((unsigned int, unsigned int, unsigned int,
920 unsigned int, unsigned int));
921 static void process_one_record
PARAMS ((unw_rec_list
*, vbyte_func
));
922 static void process_unw_records
PARAMS ((unw_rec_list
*, vbyte_func
));
923 static int calc_record_size
PARAMS ((unw_rec_list
*));
924 static void set_imask
PARAMS ((unw_rec_list
*, unsigned long, unsigned long, unsigned int));
925 static unsigned long slot_index
PARAMS ((unsigned long, fragS
*,
926 unsigned long, fragS
*,
928 static unw_rec_list
*optimize_unw_records
PARAMS ((unw_rec_list
*));
929 static void fixup_unw_records
PARAMS ((unw_rec_list
*, int));
930 static int convert_expr_to_ab_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
931 static int convert_expr_to_xy_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
932 static unsigned int get_saved_prologue_count
PARAMS ((unsigned long));
933 static void save_prologue_count
PARAMS ((unsigned long, unsigned int));
934 static void free_saved_prologue_counts
PARAMS ((void));
936 /* Determine if application register REGNUM resides only in the integer
937 unit (as opposed to the memory unit). */
939 ar_is_only_in_integer_unit (int reg
)
942 return reg
>= 64 && reg
<= 111;
945 /* Determine if application register REGNUM resides only in the memory
946 unit (as opposed to the integer unit). */
948 ar_is_only_in_memory_unit (int reg
)
951 return reg
>= 0 && reg
<= 47;
954 /* Switch to section NAME and create section if necessary. It's
955 rather ugly that we have to manipulate input_line_pointer but I
956 don't see any other way to accomplish the same thing without
957 changing obj-elf.c (which may be the Right Thing, in the end). */
962 char *saved_input_line_pointer
;
964 saved_input_line_pointer
= input_line_pointer
;
965 input_line_pointer
= name
;
967 input_line_pointer
= saved_input_line_pointer
;
970 /* Map 's' to SHF_IA_64_SHORT. */
973 ia64_elf_section_letter (letter
, ptr_msg
)
978 return SHF_IA_64_SHORT
;
979 else if (letter
== 'o')
980 return SHF_LINK_ORDER
;
982 *ptr_msg
= _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
986 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
989 ia64_elf_section_flags (flags
, attr
, type
)
991 int attr
, type ATTRIBUTE_UNUSED
;
993 if (attr
& SHF_IA_64_SHORT
)
994 flags
|= SEC_SMALL_DATA
;
999 ia64_elf_section_type (str
, len
)
1003 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
1005 if (STREQ (ELF_STRING_ia64_unwind_info
))
1006 return SHT_PROGBITS
;
1008 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
1009 return SHT_PROGBITS
;
1011 if (STREQ (ELF_STRING_ia64_unwind
))
1012 return SHT_IA_64_UNWIND
;
1014 if (STREQ (ELF_STRING_ia64_unwind_once
))
1015 return SHT_IA_64_UNWIND
;
1017 if (STREQ ("unwind"))
1018 return SHT_IA_64_UNWIND
;
1025 set_regstack (ins
, locs
, outs
, rots
)
1026 unsigned int ins
, locs
, outs
, rots
;
1028 /* Size of frame. */
1031 sof
= ins
+ locs
+ outs
;
1034 as_bad ("Size of frame exceeds maximum of 96 registers");
1039 as_warn ("Size of rotating registers exceeds frame size");
1042 md
.in
.base
= REG_GR
+ 32;
1043 md
.loc
.base
= md
.in
.base
+ ins
;
1044 md
.out
.base
= md
.loc
.base
+ locs
;
1046 md
.in
.num_regs
= ins
;
1047 md
.loc
.num_regs
= locs
;
1048 md
.out
.num_regs
= outs
;
1049 md
.rot
.num_regs
= rots
;
1056 struct label_fix
*lfix
;
1058 subsegT saved_subseg
;
1061 if (!md
.last_text_seg
)
1064 saved_seg
= now_seg
;
1065 saved_subseg
= now_subseg
;
1067 subseg_set (md
.last_text_seg
, 0);
1069 while (md
.num_slots_in_use
> 0)
1070 emit_one_bundle (); /* force out queued instructions */
1072 /* In case there are labels following the last instruction, resolve
1074 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
1076 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1077 symbol_set_frag (lfix
->sym
, frag_now
);
1079 CURR_SLOT
.label_fixups
= 0;
1080 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
1082 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1083 symbol_set_frag (lfix
->sym
, frag_now
);
1085 CURR_SLOT
.tag_fixups
= 0;
1087 /* In case there are unwind directives following the last instruction,
1088 resolve those now. We only handle prologue, body, and endp directives
1089 here. Give an error for others. */
1090 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
1092 switch (ptr
->r
.type
)
1098 ptr
->slot_number
= (unsigned long) frag_more (0);
1099 ptr
->slot_frag
= frag_now
;
1102 /* Allow any record which doesn't have a "t" field (i.e.,
1103 doesn't relate to a particular instruction). */
1119 as_bad (_("Unwind directive not followed by an instruction."));
1123 unwind
.current_entry
= NULL
;
1125 subseg_set (saved_seg
, saved_subseg
);
1127 if (md
.qp
.X_op
== O_register
)
1128 as_bad ("qualifying predicate not followed by instruction");
1132 ia64_do_align (int nbytes
)
1134 char *saved_input_line_pointer
= input_line_pointer
;
1136 input_line_pointer
= "";
1137 s_align_bytes (nbytes
);
1138 input_line_pointer
= saved_input_line_pointer
;
1142 ia64_cons_align (nbytes
)
1147 char *saved_input_line_pointer
= input_line_pointer
;
1148 input_line_pointer
= "";
1149 s_align_bytes (nbytes
);
1150 input_line_pointer
= saved_input_line_pointer
;
1154 /* Output COUNT bytes to a memory location. */
1155 static char *vbyte_mem_ptr
= NULL
;
1158 output_vbyte_mem (count
, ptr
, comment
)
1161 char *comment ATTRIBUTE_UNUSED
;
1164 if (vbyte_mem_ptr
== NULL
)
1169 for (x
= 0; x
< count
; x
++)
1170 *(vbyte_mem_ptr
++) = ptr
[x
];
1173 /* Count the number of bytes required for records. */
1174 static int vbyte_count
= 0;
1176 count_output (count
, ptr
, comment
)
1178 char *ptr ATTRIBUTE_UNUSED
;
1179 char *comment ATTRIBUTE_UNUSED
;
1181 vbyte_count
+= count
;
1185 output_R1_format (f
, rtype
, rlen
)
1187 unw_record_type rtype
;
1194 output_R3_format (f
, rtype
, rlen
);
1200 else if (rtype
!= prologue
)
1201 as_bad ("record type is not valid");
1203 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1204 (*f
) (1, &byte
, NULL
);
1208 output_R2_format (f
, mask
, grsave
, rlen
)
1215 mask
= (mask
& 0x0f);
1216 grsave
= (grsave
& 0x7f);
1218 bytes
[0] = (UNW_R2
| (mask
>> 1));
1219 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1220 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1221 (*f
) (count
, bytes
, NULL
);
1225 output_R3_format (f
, rtype
, rlen
)
1227 unw_record_type rtype
;
1234 output_R1_format (f
, rtype
, rlen
);
1240 else if (rtype
!= prologue
)
1241 as_bad ("record type is not valid");
1242 bytes
[0] = (UNW_R3
| r
);
1243 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1244 (*f
) (count
+ 1, bytes
, NULL
);
1248 output_P1_format (f
, brmask
)
1253 byte
= UNW_P1
| (brmask
& 0x1f);
1254 (*f
) (1, &byte
, NULL
);
1258 output_P2_format (f
, brmask
, gr
)
1264 brmask
= (brmask
& 0x1f);
1265 bytes
[0] = UNW_P2
| (brmask
>> 1);
1266 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1267 (*f
) (2, bytes
, NULL
);
1271 output_P3_format (f
, rtype
, reg
)
1273 unw_record_type rtype
;
1318 as_bad ("Invalid record type for P3 format.");
1320 bytes
[0] = (UNW_P3
| (r
>> 1));
1321 bytes
[1] = (((r
& 1) << 7) | reg
);
1322 (*f
) (2, bytes
, NULL
);
1326 output_P4_format (f
, imask
, imask_size
)
1328 unsigned char *imask
;
1329 unsigned long imask_size
;
1332 (*f
) (imask_size
, (char *) imask
, NULL
);
1336 output_P5_format (f
, grmask
, frmask
)
1339 unsigned long frmask
;
1342 grmask
= (grmask
& 0x0f);
1345 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1346 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1347 bytes
[3] = (frmask
& 0x000000ff);
1348 (*f
) (4, bytes
, NULL
);
1352 output_P6_format (f
, rtype
, rmask
)
1354 unw_record_type rtype
;
1360 if (rtype
== gr_mem
)
1362 else if (rtype
!= fr_mem
)
1363 as_bad ("Invalid record type for format P6");
1364 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1365 (*f
) (1, &byte
, NULL
);
1369 output_P7_format (f
, rtype
, w1
, w2
)
1371 unw_record_type rtype
;
1378 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1383 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1433 bytes
[0] = (UNW_P7
| r
);
1434 (*f
) (count
, bytes
, NULL
);
1438 output_P8_format (f
, rtype
, t
)
1440 unw_record_type rtype
;
1479 case bspstore_psprel
:
1482 case bspstore_sprel
:
1494 case priunat_when_gr
:
1497 case priunat_psprel
:
1503 case priunat_when_mem
:
1510 count
+= output_leb128 (bytes
+ 2, t
, 0);
1511 (*f
) (count
, bytes
, NULL
);
1515 output_P9_format (f
, grmask
, gr
)
1522 bytes
[1] = (grmask
& 0x0f);
1523 bytes
[2] = (gr
& 0x7f);
1524 (*f
) (3, bytes
, NULL
);
1528 output_P10_format (f
, abi
, context
)
1535 bytes
[1] = (abi
& 0xff);
1536 bytes
[2] = (context
& 0xff);
1537 (*f
) (3, bytes
, NULL
);
1541 output_B1_format (f
, rtype
, label
)
1543 unw_record_type rtype
;
1544 unsigned long label
;
1550 output_B4_format (f
, rtype
, label
);
1553 if (rtype
== copy_state
)
1555 else if (rtype
!= label_state
)
1556 as_bad ("Invalid record type for format B1");
1558 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1559 (*f
) (1, &byte
, NULL
);
1563 output_B2_format (f
, ecount
, t
)
1565 unsigned long ecount
;
1572 output_B3_format (f
, ecount
, t
);
1575 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1576 count
+= output_leb128 (bytes
+ 1, t
, 0);
1577 (*f
) (count
, bytes
, NULL
);
1581 output_B3_format (f
, ecount
, t
)
1583 unsigned long ecount
;
1590 output_B2_format (f
, ecount
, t
);
1594 count
+= output_leb128 (bytes
+ 1, t
, 0);
1595 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1596 (*f
) (count
, bytes
, NULL
);
1600 output_B4_format (f
, rtype
, label
)
1602 unw_record_type rtype
;
1603 unsigned long label
;
1610 output_B1_format (f
, rtype
, label
);
1614 if (rtype
== copy_state
)
1616 else if (rtype
!= label_state
)
1617 as_bad ("Invalid record type for format B1");
1619 bytes
[0] = (UNW_B4
| (r
<< 3));
1620 count
+= output_leb128 (bytes
+ 1, label
, 0);
1621 (*f
) (count
, bytes
, NULL
);
1625 format_ab_reg (ab
, reg
)
1632 ret
= (ab
<< 5) | reg
;
1637 output_X1_format (f
, rtype
, ab
, reg
, t
, w1
)
1639 unw_record_type rtype
;
1649 if (rtype
== spill_sprel
)
1651 else if (rtype
!= spill_psprel
)
1652 as_bad ("Invalid record type for format X1");
1653 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1654 count
+= output_leb128 (bytes
+ 2, t
, 0);
1655 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1656 (*f
) (count
, bytes
, NULL
);
1660 output_X2_format (f
, ab
, reg
, x
, y
, treg
, t
)
1669 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1670 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1671 count
+= output_leb128 (bytes
+ 3, t
, 0);
1672 (*f
) (count
, bytes
, NULL
);
1676 output_X3_format (f
, rtype
, qp
, ab
, reg
, t
, w1
)
1678 unw_record_type rtype
;
1689 if (rtype
== spill_sprel_p
)
1691 else if (rtype
!= spill_psprel_p
)
1692 as_bad ("Invalid record type for format X3");
1693 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1694 bytes
[2] = format_ab_reg (ab
, reg
);
1695 count
+= output_leb128 (bytes
+ 3, t
, 0);
1696 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1697 (*f
) (count
, bytes
, NULL
);
1701 output_X4_format (f
, qp
, ab
, reg
, x
, y
, treg
, t
)
1711 bytes
[1] = (qp
& 0x3f);
1712 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1713 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1714 count
+= output_leb128 (bytes
+ 4, t
, 0);
1715 (*f
) (count
, bytes
, NULL
);
1718 /* This function allocates a record list structure, and initializes fields. */
1720 static unw_rec_list
*
1721 alloc_record (unw_record_type t
)
1724 ptr
= xmalloc (sizeof (*ptr
));
1726 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1728 ptr
->next_slot_number
= 0;
1729 ptr
->next_slot_frag
= 0;
1733 /* Dummy unwind record used for calculating the length of the last prologue or
1736 static unw_rec_list
*
1739 unw_rec_list
*ptr
= alloc_record (endp
);
1743 static unw_rec_list
*
1746 unw_rec_list
*ptr
= alloc_record (prologue
);
1747 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1751 static unw_rec_list
*
1752 output_prologue_gr (saved_mask
, reg
)
1753 unsigned int saved_mask
;
1756 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1757 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1758 ptr
->r
.record
.r
.grmask
= saved_mask
;
1759 ptr
->r
.record
.r
.grsave
= reg
;
1763 static unw_rec_list
*
1766 unw_rec_list
*ptr
= alloc_record (body
);
1770 static unw_rec_list
*
1771 output_mem_stack_f (size
)
1774 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1775 ptr
->r
.record
.p
.size
= size
;
1779 static unw_rec_list
*
1780 output_mem_stack_v ()
1782 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1786 static unw_rec_list
*
1790 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1791 ptr
->r
.record
.p
.gr
= gr
;
1795 static unw_rec_list
*
1796 output_psp_sprel (offset
)
1797 unsigned int offset
;
1799 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1800 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1804 static unw_rec_list
*
1807 unw_rec_list
*ptr
= alloc_record (rp_when
);
1811 static unw_rec_list
*
1815 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1816 ptr
->r
.record
.p
.gr
= gr
;
1820 static unw_rec_list
*
1824 unw_rec_list
*ptr
= alloc_record (rp_br
);
1825 ptr
->r
.record
.p
.br
= br
;
1829 static unw_rec_list
*
1830 output_rp_psprel (offset
)
1831 unsigned int offset
;
1833 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1834 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1838 static unw_rec_list
*
1839 output_rp_sprel (offset
)
1840 unsigned int offset
;
1842 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1843 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1847 static unw_rec_list
*
1850 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1854 static unw_rec_list
*
1858 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1859 ptr
->r
.record
.p
.gr
= gr
;
1863 static unw_rec_list
*
1864 output_pfs_psprel (offset
)
1865 unsigned int offset
;
1867 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1868 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1872 static unw_rec_list
*
1873 output_pfs_sprel (offset
)
1874 unsigned int offset
;
1876 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1877 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1881 static unw_rec_list
*
1882 output_preds_when ()
1884 unw_rec_list
*ptr
= alloc_record (preds_when
);
1888 static unw_rec_list
*
1889 output_preds_gr (gr
)
1892 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1893 ptr
->r
.record
.p
.gr
= gr
;
1897 static unw_rec_list
*
1898 output_preds_psprel (offset
)
1899 unsigned int offset
;
1901 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1902 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1906 static unw_rec_list
*
1907 output_preds_sprel (offset
)
1908 unsigned int offset
;
1910 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1911 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1915 static unw_rec_list
*
1916 output_fr_mem (mask
)
1919 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1920 ptr
->r
.record
.p
.rmask
= mask
;
1924 static unw_rec_list
*
1925 output_frgr_mem (gr_mask
, fr_mask
)
1926 unsigned int gr_mask
;
1927 unsigned int fr_mask
;
1929 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1930 ptr
->r
.record
.p
.grmask
= gr_mask
;
1931 ptr
->r
.record
.p
.frmask
= fr_mask
;
1935 static unw_rec_list
*
1936 output_gr_gr (mask
, reg
)
1940 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1941 ptr
->r
.record
.p
.grmask
= mask
;
1942 ptr
->r
.record
.p
.gr
= reg
;
1946 static unw_rec_list
*
1947 output_gr_mem (mask
)
1950 unw_rec_list
*ptr
= alloc_record (gr_mem
);
1951 ptr
->r
.record
.p
.rmask
= mask
;
1955 static unw_rec_list
*
1956 output_br_mem (unsigned int mask
)
1958 unw_rec_list
*ptr
= alloc_record (br_mem
);
1959 ptr
->r
.record
.p
.brmask
= mask
;
1963 static unw_rec_list
*
1964 output_br_gr (save_mask
, reg
)
1965 unsigned int save_mask
;
1968 unw_rec_list
*ptr
= alloc_record (br_gr
);
1969 ptr
->r
.record
.p
.brmask
= save_mask
;
1970 ptr
->r
.record
.p
.gr
= reg
;
1974 static unw_rec_list
*
1975 output_spill_base (offset
)
1976 unsigned int offset
;
1978 unw_rec_list
*ptr
= alloc_record (spill_base
);
1979 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1983 static unw_rec_list
*
1986 unw_rec_list
*ptr
= alloc_record (unat_when
);
1990 static unw_rec_list
*
1994 unw_rec_list
*ptr
= alloc_record (unat_gr
);
1995 ptr
->r
.record
.p
.gr
= gr
;
1999 static unw_rec_list
*
2000 output_unat_psprel (offset
)
2001 unsigned int offset
;
2003 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
2004 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2008 static unw_rec_list
*
2009 output_unat_sprel (offset
)
2010 unsigned int offset
;
2012 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
2013 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2017 static unw_rec_list
*
2020 unw_rec_list
*ptr
= alloc_record (lc_when
);
2024 static unw_rec_list
*
2028 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2029 ptr
->r
.record
.p
.gr
= gr
;
2033 static unw_rec_list
*
2034 output_lc_psprel (offset
)
2035 unsigned int offset
;
2037 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2038 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2042 static unw_rec_list
*
2043 output_lc_sprel (offset
)
2044 unsigned int offset
;
2046 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2047 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2051 static unw_rec_list
*
2054 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2058 static unw_rec_list
*
2062 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2063 ptr
->r
.record
.p
.gr
= gr
;
2067 static unw_rec_list
*
2068 output_fpsr_psprel (offset
)
2069 unsigned int offset
;
2071 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2072 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2076 static unw_rec_list
*
2077 output_fpsr_sprel (offset
)
2078 unsigned int offset
;
2080 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2081 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2085 static unw_rec_list
*
2086 output_priunat_when_gr ()
2088 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2092 static unw_rec_list
*
2093 output_priunat_when_mem ()
2095 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2099 static unw_rec_list
*
2100 output_priunat_gr (gr
)
2103 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2104 ptr
->r
.record
.p
.gr
= gr
;
2108 static unw_rec_list
*
2109 output_priunat_psprel (offset
)
2110 unsigned int offset
;
2112 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2113 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2117 static unw_rec_list
*
2118 output_priunat_sprel (offset
)
2119 unsigned int offset
;
2121 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2122 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2126 static unw_rec_list
*
2129 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2133 static unw_rec_list
*
2137 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2138 ptr
->r
.record
.p
.gr
= gr
;
2142 static unw_rec_list
*
2143 output_bsp_psprel (offset
)
2144 unsigned int offset
;
2146 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2147 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2151 static unw_rec_list
*
2152 output_bsp_sprel (offset
)
2153 unsigned int offset
;
2155 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2156 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2160 static unw_rec_list
*
2161 output_bspstore_when ()
2163 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2167 static unw_rec_list
*
2168 output_bspstore_gr (gr
)
2171 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2172 ptr
->r
.record
.p
.gr
= gr
;
2176 static unw_rec_list
*
2177 output_bspstore_psprel (offset
)
2178 unsigned int offset
;
2180 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2181 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2185 static unw_rec_list
*
2186 output_bspstore_sprel (offset
)
2187 unsigned int offset
;
2189 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2190 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2194 static unw_rec_list
*
2197 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2201 static unw_rec_list
*
2205 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2206 ptr
->r
.record
.p
.gr
= gr
;
2210 static unw_rec_list
*
2211 output_rnat_psprel (offset
)
2212 unsigned int offset
;
2214 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2215 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2219 static unw_rec_list
*
2220 output_rnat_sprel (offset
)
2221 unsigned int offset
;
2223 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2224 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2228 static unw_rec_list
*
2229 output_unwabi (abi
, context
)
2231 unsigned long context
;
2233 unw_rec_list
*ptr
= alloc_record (unwabi
);
2234 ptr
->r
.record
.p
.abi
= abi
;
2235 ptr
->r
.record
.p
.context
= context
;
2239 static unw_rec_list
*
2240 output_epilogue (unsigned long ecount
)
2242 unw_rec_list
*ptr
= alloc_record (epilogue
);
2243 ptr
->r
.record
.b
.ecount
= ecount
;
2247 static unw_rec_list
*
2248 output_label_state (unsigned long label
)
2250 unw_rec_list
*ptr
= alloc_record (label_state
);
2251 ptr
->r
.record
.b
.label
= label
;
2255 static unw_rec_list
*
2256 output_copy_state (unsigned long label
)
2258 unw_rec_list
*ptr
= alloc_record (copy_state
);
2259 ptr
->r
.record
.b
.label
= label
;
2263 static unw_rec_list
*
2264 output_spill_psprel (ab
, reg
, offset
)
2267 unsigned int offset
;
2269 unw_rec_list
*ptr
= alloc_record (spill_psprel
);
2270 ptr
->r
.record
.x
.ab
= ab
;
2271 ptr
->r
.record
.x
.reg
= reg
;
2272 ptr
->r
.record
.x
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2276 static unw_rec_list
*
2277 output_spill_sprel (ab
, reg
, offset
)
2280 unsigned int offset
;
2282 unw_rec_list
*ptr
= alloc_record (spill_sprel
);
2283 ptr
->r
.record
.x
.ab
= ab
;
2284 ptr
->r
.record
.x
.reg
= reg
;
2285 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2289 static unw_rec_list
*
2290 output_spill_psprel_p (ab
, reg
, offset
, predicate
)
2293 unsigned int offset
;
2294 unsigned int predicate
;
2296 unw_rec_list
*ptr
= alloc_record (spill_psprel_p
);
2297 ptr
->r
.record
.x
.ab
= ab
;
2298 ptr
->r
.record
.x
.reg
= reg
;
2299 ptr
->r
.record
.x
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2300 ptr
->r
.record
.x
.qp
= predicate
;
2304 static unw_rec_list
*
2305 output_spill_sprel_p (ab
, reg
, offset
, predicate
)
2308 unsigned int offset
;
2309 unsigned int predicate
;
2311 unw_rec_list
*ptr
= alloc_record (spill_sprel_p
);
2312 ptr
->r
.record
.x
.ab
= ab
;
2313 ptr
->r
.record
.x
.reg
= reg
;
2314 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2315 ptr
->r
.record
.x
.qp
= predicate
;
2319 static unw_rec_list
*
2320 output_spill_reg (ab
, reg
, targ_reg
, xy
)
2323 unsigned int targ_reg
;
2326 unw_rec_list
*ptr
= alloc_record (spill_reg
);
2327 ptr
->r
.record
.x
.ab
= ab
;
2328 ptr
->r
.record
.x
.reg
= reg
;
2329 ptr
->r
.record
.x
.treg
= targ_reg
;
2330 ptr
->r
.record
.x
.xy
= xy
;
2334 static unw_rec_list
*
2335 output_spill_reg_p (ab
, reg
, targ_reg
, xy
, predicate
)
2338 unsigned int targ_reg
;
2340 unsigned int predicate
;
2342 unw_rec_list
*ptr
= alloc_record (spill_reg_p
);
2343 ptr
->r
.record
.x
.ab
= ab
;
2344 ptr
->r
.record
.x
.reg
= reg
;
2345 ptr
->r
.record
.x
.treg
= targ_reg
;
2346 ptr
->r
.record
.x
.xy
= xy
;
2347 ptr
->r
.record
.x
.qp
= predicate
;
2351 /* Given a unw_rec_list process the correct format with the
2352 specified function. */
2355 process_one_record (ptr
, f
)
2359 unsigned long fr_mask
, gr_mask
;
2361 switch (ptr
->r
.type
)
2363 /* This is a dummy record that takes up no space in the output. */
2371 /* These are taken care of by prologue/prologue_gr. */
2376 if (ptr
->r
.type
== prologue_gr
)
2377 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2378 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2380 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2382 /* Output descriptor(s) for union of register spills (if any). */
2383 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2384 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2387 if ((fr_mask
& ~0xfUL
) == 0)
2388 output_P6_format (f
, fr_mem
, fr_mask
);
2391 output_P5_format (f
, gr_mask
, fr_mask
);
2396 output_P6_format (f
, gr_mem
, gr_mask
);
2397 if (ptr
->r
.record
.r
.mask
.br_mem
)
2398 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2400 /* output imask descriptor if necessary: */
2401 if (ptr
->r
.record
.r
.mask
.i
)
2402 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2403 ptr
->r
.record
.r
.imask_size
);
2407 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2411 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2412 ptr
->r
.record
.p
.size
);
2425 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.gr
);
2428 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.br
);
2431 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.spoff
, 0);
2439 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2448 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
, 0);
2458 case bspstore_sprel
:
2460 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.spoff
);
2463 output_P9_format (f
, ptr
->r
.record
.p
.grmask
, ptr
->r
.record
.p
.gr
);
2466 output_P2_format (f
, ptr
->r
.record
.p
.brmask
, ptr
->r
.record
.p
.gr
);
2469 as_bad ("spill_mask record unimplemented.");
2471 case priunat_when_gr
:
2472 case priunat_when_mem
:
2476 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2478 case priunat_psprel
:
2480 case bspstore_psprel
:
2482 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
);
2485 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2488 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2492 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2495 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2496 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2497 ptr
->r
.record
.x
.pspoff
);
2500 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2501 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2502 ptr
->r
.record
.x
.spoff
);
2505 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2506 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2507 ptr
->r
.record
.x
.treg
, ptr
->r
.record
.x
.t
);
2509 case spill_psprel_p
:
2510 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2511 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2512 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.pspoff
);
2515 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2516 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2517 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.spoff
);
2520 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2521 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2522 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.treg
,
2526 as_bad ("record_type_not_valid");
2531 /* Given a unw_rec_list list, process all the records with
2532 the specified function. */
2534 process_unw_records (list
, f
)
2539 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2540 process_one_record (ptr
, f
);
2543 /* Determine the size of a record list in bytes. */
2545 calc_record_size (list
)
2549 process_unw_records (list
, count_output
);
2553 /* Update IMASK bitmask to reflect the fact that one or more registers
2554 of type TYPE are saved starting at instruction with index T. If N
2555 bits are set in REGMASK, it is assumed that instructions T through
2556 T+N-1 save these registers.
2560 1: instruction saves next fp reg
2561 2: instruction saves next general reg
2562 3: instruction saves next branch reg */
2564 set_imask (region
, regmask
, t
, type
)
2565 unw_rec_list
*region
;
2566 unsigned long regmask
;
2570 unsigned char *imask
;
2571 unsigned long imask_size
;
2575 imask
= region
->r
.record
.r
.mask
.i
;
2576 imask_size
= region
->r
.record
.r
.imask_size
;
2579 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2580 imask
= xmalloc (imask_size
);
2581 memset (imask
, 0, imask_size
);
2583 region
->r
.record
.r
.imask_size
= imask_size
;
2584 region
->r
.record
.r
.mask
.i
= imask
;
2588 pos
= 2 * (3 - t
% 4);
2591 if (i
>= imask_size
)
2593 as_bad ("Ignoring attempt to spill beyond end of region");
2597 imask
[i
] |= (type
& 0x3) << pos
;
2599 regmask
&= (regmask
- 1);
2609 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2610 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2611 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2615 slot_index (slot_addr
, slot_frag
, first_addr
, first_frag
, before_relax
)
2616 unsigned long slot_addr
;
2618 unsigned long first_addr
;
2622 unsigned long index
= 0;
2624 /* First time we are called, the initial address and frag are invalid. */
2625 if (first_addr
== 0)
2628 /* If the two addresses are in different frags, then we need to add in
2629 the remaining size of this frag, and then the entire size of intermediate
2631 while (slot_frag
!= first_frag
)
2633 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2637 /* We can get the final addresses only during and after
2639 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2640 index
+= 3 * ((first_frag
->fr_next
->fr_address
2641 - first_frag
->fr_address
2642 - first_frag
->fr_fix
) >> 4);
2645 /* We don't know what the final addresses will be. We try our
2646 best to estimate. */
2647 switch (first_frag
->fr_type
)
2653 as_fatal ("only constant space allocation is supported");
2659 /* Take alignment into account. Assume the worst case
2660 before relaxation. */
2661 index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2665 if (first_frag
->fr_symbol
)
2667 as_fatal ("only constant offsets are supported");
2671 index
+= 3 * (first_frag
->fr_offset
>> 4);
2675 /* Add in the full size of the frag converted to instruction slots. */
2676 index
+= 3 * (first_frag
->fr_fix
>> 4);
2677 /* Subtract away the initial part before first_addr. */
2678 index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2679 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2681 /* Move to the beginning of the next frag. */
2682 first_frag
= first_frag
->fr_next
;
2683 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2686 /* Add in the used part of the last frag. */
2687 index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2688 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2692 /* Optimize unwind record directives. */
2694 static unw_rec_list
*
2695 optimize_unw_records (list
)
2701 /* If the only unwind record is ".prologue" or ".prologue" followed
2702 by ".body", then we can optimize the unwind directives away. */
2703 if (list
->r
.type
== prologue
2704 && (list
->next
->r
.type
== endp
2705 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2711 /* Given a complete record list, process any records which have
2712 unresolved fields, (ie length counts for a prologue). After
2713 this has been run, all necessary information should be available
2714 within each record to generate an image. */
2717 fixup_unw_records (list
, before_relax
)
2721 unw_rec_list
*ptr
, *region
= 0;
2722 unsigned long first_addr
= 0, rlen
= 0, t
;
2723 fragS
*first_frag
= 0;
2725 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2727 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2728 as_bad (" Insn slot not set in unwind record.");
2729 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2730 first_addr
, first_frag
, before_relax
);
2731 switch (ptr
->r
.type
)
2739 unsigned long last_addr
= 0;
2740 fragS
*last_frag
= NULL
;
2742 first_addr
= ptr
->slot_number
;
2743 first_frag
= ptr
->slot_frag
;
2744 /* Find either the next body/prologue start, or the end of
2745 the function, and determine the size of the region. */
2746 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2747 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2748 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2750 last_addr
= last
->slot_number
;
2751 last_frag
= last
->slot_frag
;
2754 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2756 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2757 if (ptr
->r
.type
== body
)
2758 /* End of region. */
2766 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2768 /* This happens when a memory-stack-less procedure uses a
2769 ".restore sp" directive at the end of a region to pop
2771 ptr
->r
.record
.b
.t
= 0;
2782 case priunat_when_gr
:
2783 case priunat_when_mem
:
2787 ptr
->r
.record
.p
.t
= t
;
2795 case spill_psprel_p
:
2796 ptr
->r
.record
.x
.t
= t
;
2802 as_bad ("frgr_mem record before region record!");
2805 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2806 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2807 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2808 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2813 as_bad ("fr_mem record before region record!");
2816 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.rmask
;
2817 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 1);
2822 as_bad ("gr_mem record before region record!");
2825 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.rmask
;
2826 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 2);
2831 as_bad ("br_mem record before region record!");
2834 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2835 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2841 as_bad ("gr_gr record before region record!");
2844 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2849 as_bad ("br_gr record before region record!");
2852 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2861 /* Estimate the size of a frag before relaxing. We only have one type of frag
2862 to handle here, which is the unwind info frag. */
2865 ia64_estimate_size_before_relax (fragS
*frag
,
2866 asection
*segtype ATTRIBUTE_UNUSED
)
2871 /* ??? This code is identical to the first part of ia64_convert_frag. */
2872 list
= (unw_rec_list
*) frag
->fr_opcode
;
2873 fixup_unw_records (list
, 0);
2875 len
= calc_record_size (list
);
2876 /* pad to pointer-size boundary. */
2877 pad
= len
% md
.pointer_size
;
2879 len
+= md
.pointer_size
- pad
;
2880 /* Add 8 for the header. */
2882 /* Add a pointer for the personality offset. */
2883 if (frag
->fr_offset
)
2884 size
+= md
.pointer_size
;
2886 /* fr_var carries the max_chars that we created the fragment with.
2887 We must, of course, have allocated enough memory earlier. */
2888 assert (frag
->fr_var
>= size
);
2890 return frag
->fr_fix
+ size
;
2893 /* This function converts a rs_machine_dependent variant frag into a
2894 normal fill frag with the unwind image from the the record list. */
2896 ia64_convert_frag (fragS
*frag
)
2902 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2903 list
= (unw_rec_list
*) frag
->fr_opcode
;
2904 fixup_unw_records (list
, 0);
2906 len
= calc_record_size (list
);
2907 /* pad to pointer-size boundary. */
2908 pad
= len
% md
.pointer_size
;
2910 len
+= md
.pointer_size
- pad
;
2911 /* Add 8 for the header. */
2913 /* Add a pointer for the personality offset. */
2914 if (frag
->fr_offset
)
2915 size
+= md
.pointer_size
;
2917 /* fr_var carries the max_chars that we created the fragment with.
2918 We must, of course, have allocated enough memory earlier. */
2919 assert (frag
->fr_var
>= size
);
2921 /* Initialize the header area. fr_offset is initialized with
2922 unwind.personality_routine. */
2923 if (frag
->fr_offset
)
2925 if (md
.flags
& EF_IA_64_ABI64
)
2926 flag_value
= (bfd_vma
) 3 << 32;
2928 /* 32-bit unwind info block. */
2929 flag_value
= (bfd_vma
) 0x1003 << 32;
2934 md_number_to_chars (frag
->fr_literal
,
2935 (((bfd_vma
) 1 << 48) /* Version. */
2936 | flag_value
/* U & E handler flags. */
2937 | (len
/ md
.pointer_size
)), /* Length. */
2940 /* Skip the header. */
2941 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
2942 process_unw_records (list
, output_vbyte_mem
);
2944 /* Fill the padding bytes with zeros. */
2946 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
2947 md
.pointer_size
- pad
);
2949 frag
->fr_fix
+= size
;
2950 frag
->fr_type
= rs_fill
;
2952 frag
->fr_offset
= 0;
2956 convert_expr_to_ab_reg (e
, ab
, regp
)
2963 if (e
->X_op
!= O_register
)
2966 reg
= e
->X_add_number
;
2967 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
2970 *regp
= reg
- REG_GR
;
2972 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
2973 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
2976 *regp
= reg
- REG_FR
;
2978 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
2981 *regp
= reg
- REG_BR
;
2988 case REG_PR
: *regp
= 0; break;
2989 case REG_PSP
: *regp
= 1; break;
2990 case REG_PRIUNAT
: *regp
= 2; break;
2991 case REG_BR
+ 0: *regp
= 3; break;
2992 case REG_AR
+ AR_BSP
: *regp
= 4; break;
2993 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
2994 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
2995 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
2996 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
2997 case REG_AR
+ AR_PFS
: *regp
= 9; break;
2998 case REG_AR
+ AR_LC
: *regp
= 10; break;
3008 convert_expr_to_xy_reg (e
, xy
, regp
)
3015 if (e
->X_op
!= O_register
)
3018 reg
= e
->X_add_number
;
3020 if (/* reg >= REG_GR && */ reg
<= (REG_GR
+ 127))
3023 *regp
= reg
- REG_GR
;
3025 else if (reg
>= REG_FR
&& reg
<= (REG_FR
+ 127))
3028 *regp
= reg
- REG_FR
;
3030 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3033 *regp
= reg
- REG_BR
;
3043 /* The current frag is an alignment frag. */
3044 align_frag
= frag_now
;
3045 s_align_bytes (arg
);
3050 int dummy ATTRIBUTE_UNUSED
;
3055 radix
= *input_line_pointer
++;
3057 if (radix
!= 'C' && !is_end_of_line
[(unsigned char) radix
])
3059 as_bad ("Radix `%c' unsupported", *input_line_pointer
);
3060 ignore_rest_of_line ();
3065 /* Helper function for .loc directives. If the assembler is not generating
3066 line number info, then we need to remember which instructions have a .loc
3067 directive, and only call dwarf2_gen_line_info for those instructions. */
3072 CURR_SLOT
.loc_directive_seen
= 1;
3073 dwarf2_directive_loc (x
);
3076 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3078 dot_special_section (which
)
3081 set_section ((char *) special_section_name
[which
]);
3084 /* Return -1 for warning and 0 for error. */
3087 unwind_diagnostic (const char * region
, const char *directive
)
3089 if (md
.unwind_check
== unwind_check_warning
)
3091 as_warn (".%s outside of %s", directive
, region
);
3096 as_bad (".%s outside of %s", directive
, region
);
3097 ignore_rest_of_line ();
3102 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3103 a procedure but the unwind directive check is set to warning, 0 if
3104 a directive isn't in a procedure and the unwind directive check is set
3108 in_procedure (const char *directive
)
3110 if (unwind
.proc_start
3111 && (!unwind
.saved_text_seg
|| strcmp (directive
, "endp") == 0))
3113 return unwind_diagnostic ("procedure", directive
);
3116 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3117 a prologue but the unwind directive check is set to warning, 0 if
3118 a directive isn't in a prologue and the unwind directive check is set
3122 in_prologue (const char *directive
)
3124 int in
= in_procedure (directive
);
3127 /* We are in a procedure. Check if we are in a prologue. */
3128 if (unwind
.prologue
)
3130 /* We only want to issue one message. */
3132 return unwind_diagnostic ("prologue", directive
);
3139 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3140 a body but the unwind directive check is set to warning, 0 if
3141 a directive isn't in a body and the unwind directive check is set
3145 in_body (const char *directive
)
3147 int in
= in_procedure (directive
);
3150 /* We are in a procedure. Check if we are in a body. */
3153 /* We only want to issue one message. */
3155 return unwind_diagnostic ("body region", directive
);
3163 add_unwind_entry (ptr
)
3167 unwind
.tail
->next
= ptr
;
3172 /* The current entry can in fact be a chain of unwind entries. */
3173 if (unwind
.current_entry
== NULL
)
3174 unwind
.current_entry
= ptr
;
3179 int dummy ATTRIBUTE_UNUSED
;
3183 if (!in_prologue ("fframe"))
3188 if (e
.X_op
!= O_constant
)
3189 as_bad ("Operand to .fframe must be a constant");
3191 add_unwind_entry (output_mem_stack_f (e
.X_add_number
));
3196 int dummy ATTRIBUTE_UNUSED
;
3201 if (!in_prologue ("vframe"))
3205 reg
= e
.X_add_number
- REG_GR
;
3206 if (e
.X_op
== O_register
&& reg
< 128)
3208 add_unwind_entry (output_mem_stack_v ());
3209 if (! (unwind
.prologue_mask
& 2))
3210 add_unwind_entry (output_psp_gr (reg
));
3213 as_bad ("First operand to .vframe must be a general register");
3217 dot_vframesp (dummy
)
3218 int dummy ATTRIBUTE_UNUSED
;
3222 if (!in_prologue ("vframesp"))
3226 if (e
.X_op
== O_constant
)
3228 add_unwind_entry (output_mem_stack_v ());
3229 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3232 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3236 dot_vframepsp (dummy
)
3237 int dummy ATTRIBUTE_UNUSED
;
3241 if (!in_prologue ("vframepsp"))
3245 if (e
.X_op
== O_constant
)
3247 add_unwind_entry (output_mem_stack_v ());
3248 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3251 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3256 int dummy ATTRIBUTE_UNUSED
;
3262 if (!in_prologue ("save"))
3265 sep
= parse_operand (&e1
);
3267 as_bad ("No second operand to .save");
3268 sep
= parse_operand (&e2
);
3270 reg1
= e1
.X_add_number
;
3271 reg2
= e2
.X_add_number
- REG_GR
;
3273 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3274 if (e1
.X_op
== O_register
)
3276 if (e2
.X_op
== O_register
&& reg2
>= 0 && reg2
< 128)
3280 case REG_AR
+ AR_BSP
:
3281 add_unwind_entry (output_bsp_when ());
3282 add_unwind_entry (output_bsp_gr (reg2
));
3284 case REG_AR
+ AR_BSPSTORE
:
3285 add_unwind_entry (output_bspstore_when ());
3286 add_unwind_entry (output_bspstore_gr (reg2
));
3288 case REG_AR
+ AR_RNAT
:
3289 add_unwind_entry (output_rnat_when ());
3290 add_unwind_entry (output_rnat_gr (reg2
));
3292 case REG_AR
+ AR_UNAT
:
3293 add_unwind_entry (output_unat_when ());
3294 add_unwind_entry (output_unat_gr (reg2
));
3296 case REG_AR
+ AR_FPSR
:
3297 add_unwind_entry (output_fpsr_when ());
3298 add_unwind_entry (output_fpsr_gr (reg2
));
3300 case REG_AR
+ AR_PFS
:
3301 add_unwind_entry (output_pfs_when ());
3302 if (! (unwind
.prologue_mask
& 4))
3303 add_unwind_entry (output_pfs_gr (reg2
));
3305 case REG_AR
+ AR_LC
:
3306 add_unwind_entry (output_lc_when ());
3307 add_unwind_entry (output_lc_gr (reg2
));
3310 add_unwind_entry (output_rp_when ());
3311 if (! (unwind
.prologue_mask
& 8))
3312 add_unwind_entry (output_rp_gr (reg2
));
3315 add_unwind_entry (output_preds_when ());
3316 if (! (unwind
.prologue_mask
& 1))
3317 add_unwind_entry (output_preds_gr (reg2
));
3320 add_unwind_entry (output_priunat_when_gr ());
3321 add_unwind_entry (output_priunat_gr (reg2
));
3324 as_bad ("First operand not a valid register");
3328 as_bad (" Second operand not a valid register");
3331 as_bad ("First operand not a register");
3336 int dummy ATTRIBUTE_UNUSED
;
3339 unsigned long ecount
; /* # of _additional_ regions to pop */
3342 if (!in_body ("restore"))
3345 sep
= parse_operand (&e1
);
3346 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3348 as_bad ("First operand to .restore must be stack pointer (sp)");
3354 parse_operand (&e2
);
3355 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3357 as_bad ("Second operand to .restore must be a constant >= 0");
3360 ecount
= e2
.X_add_number
;
3363 ecount
= unwind
.prologue_count
- 1;
3365 if (ecount
>= unwind
.prologue_count
)
3367 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3368 ecount
+ 1, unwind
.prologue_count
);
3372 add_unwind_entry (output_epilogue (ecount
));
3374 if (ecount
< unwind
.prologue_count
)
3375 unwind
.prologue_count
-= ecount
+ 1;
3377 unwind
.prologue_count
= 0;
3381 dot_restorereg (dummy
)
3382 int dummy ATTRIBUTE_UNUSED
;
3384 unsigned int ab
, reg
;
3387 if (!in_procedure ("restorereg"))
3392 if (!convert_expr_to_ab_reg (&e
, &ab
, ®
))
3394 as_bad ("First operand to .restorereg must be a preserved register");
3397 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0));
3401 dot_restorereg_p (dummy
)
3402 int dummy ATTRIBUTE_UNUSED
;
3404 unsigned int qp
, ab
, reg
;
3408 if (!in_procedure ("restorereg.p"))
3411 sep
= parse_operand (&e1
);
3414 as_bad ("No second operand to .restorereg.p");
3418 parse_operand (&e2
);
3420 qp
= e1
.X_add_number
- REG_P
;
3421 if (e1
.X_op
!= O_register
|| qp
> 63)
3423 as_bad ("First operand to .restorereg.p must be a predicate");
3427 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3429 as_bad ("Second operand to .restorereg.p must be a preserved register");
3432 add_unwind_entry (output_spill_reg_p (ab
, reg
, 0, 0, qp
));
3435 static char *special_linkonce_name
[] =
3437 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3441 start_unwind_section (const segT text_seg
, int sec_index
, int linkonce_empty
)
3444 Use a slightly ugly scheme to derive the unwind section names from
3445 the text section name:
3447 text sect. unwind table sect.
3448 name: name: comments:
3449 ---------- ----------------- --------------------------------
3451 .text.foo .IA_64.unwind.text.foo
3452 .foo .IA_64.unwind.foo
3454 .gnu.linkonce.ia64unw.foo
3455 _info .IA_64.unwind_info gas issues error message (ditto)
3456 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3458 This mapping is done so that:
3460 (a) An object file with unwind info only in .text will use
3461 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3462 This follows the letter of the ABI and also ensures backwards
3463 compatibility with older toolchains.
3465 (b) An object file with unwind info in multiple text sections
3466 will use separate unwind sections for each text section.
3467 This allows us to properly set the "sh_info" and "sh_link"
3468 fields in SHT_IA_64_UNWIND as required by the ABI and also
3469 lets GNU ld support programs with multiple segments
3470 containing unwind info (as might be the case for certain
3471 embedded applications).
3473 (c) An error is issued if there would be a name clash.
3476 const char *text_name
, *sec_text_name
;
3478 const char *prefix
= special_section_name
[sec_index
];
3480 size_t prefix_len
, suffix_len
, sec_name_len
;
3482 sec_text_name
= segment_name (text_seg
);
3483 text_name
= sec_text_name
;
3484 if (strncmp (text_name
, "_info", 5) == 0)
3486 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3488 ignore_rest_of_line ();
3491 if (strcmp (text_name
, ".text") == 0)
3494 /* Build the unwind section name by appending the (possibly stripped)
3495 text section name to the unwind prefix. */
3497 if (strncmp (text_name
, ".gnu.linkonce.t.",
3498 sizeof (".gnu.linkonce.t.") - 1) == 0)
3500 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3501 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3503 else if (linkonce_empty
)
3506 prefix_len
= strlen (prefix
);
3507 suffix_len
= strlen (suffix
);
3508 sec_name_len
= prefix_len
+ suffix_len
;
3509 sec_name
= alloca (sec_name_len
+ 1);
3510 memcpy (sec_name
, prefix
, prefix_len
);
3511 memcpy (sec_name
+ prefix_len
, suffix
, suffix_len
);
3512 sec_name
[sec_name_len
] = '\0';
3514 /* Handle COMDAT group. */
3515 if (suffix
== text_name
&& (text_seg
->flags
& SEC_LINK_ONCE
) != 0)
3518 size_t len
, group_name_len
;
3519 const char *group_name
= elf_group_name (text_seg
);
3521 if (group_name
== NULL
)
3523 as_bad ("Group section `%s' has no group signature",
3525 ignore_rest_of_line ();
3528 /* We have to construct a fake section directive. */
3529 group_name_len
= strlen (group_name
);
3531 + 16 /* ,"aG",@progbits, */
3532 + group_name_len
/* ,group_name */
3535 section
= alloca (len
+ 1);
3536 memcpy (section
, sec_name
, sec_name_len
);
3537 memcpy (section
+ sec_name_len
, ",\"aG\",@progbits,", 16);
3538 memcpy (section
+ sec_name_len
+ 16, group_name
, group_name_len
);
3539 memcpy (section
+ len
- 7, ",comdat", 7);
3540 section
[len
] = '\0';
3541 set_section (section
);
3545 set_section (sec_name
);
3546 bfd_set_section_flags (stdoutput
, now_seg
,
3547 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3550 elf_linked_to_section (now_seg
) = text_seg
;
3554 generate_unwind_image (const segT text_seg
)
3559 /* Mark the end of the unwind info, so that we can compute the size of the
3560 last unwind region. */
3561 add_unwind_entry (output_endp ());
3563 /* Force out pending instructions, to make sure all unwind records have
3564 a valid slot_number field. */
3565 ia64_flush_insns ();
3567 /* Generate the unwind record. */
3568 list
= optimize_unw_records (unwind
.list
);
3569 fixup_unw_records (list
, 1);
3570 size
= calc_record_size (list
);
3572 if (size
> 0 || unwind
.force_unwind_entry
)
3574 unwind
.force_unwind_entry
= 0;
3575 /* pad to pointer-size boundary. */
3576 pad
= size
% md
.pointer_size
;
3578 size
+= md
.pointer_size
- pad
;
3579 /* Add 8 for the header. */
3581 /* Add a pointer for the personality offset. */
3582 if (unwind
.personality_routine
)
3583 size
+= md
.pointer_size
;
3586 /* If there are unwind records, switch sections, and output the info. */
3590 bfd_reloc_code_real_type reloc
;
3592 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
, 0);
3594 /* Make sure the section has 4 byte alignment for ILP32 and
3595 8 byte alignment for LP64. */
3596 frag_align (md
.pointer_size_shift
, 0, 0);
3597 record_alignment (now_seg
, md
.pointer_size_shift
);
3599 /* Set expression which points to start of unwind descriptor area. */
3600 unwind
.info
= expr_build_dot ();
3602 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3603 (offsetT
) (long) unwind
.personality_routine
,
3606 /* Add the personality address to the image. */
3607 if (unwind
.personality_routine
!= 0)
3609 exp
.X_op
= O_symbol
;
3610 exp
.X_add_symbol
= unwind
.personality_routine
;
3611 exp
.X_add_number
= 0;
3613 if (md
.flags
& EF_IA_64_BE
)
3615 if (md
.flags
& EF_IA_64_ABI64
)
3616 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3618 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3622 if (md
.flags
& EF_IA_64_ABI64
)
3623 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3625 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3628 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3629 md
.pointer_size
, &exp
, 0, reloc
);
3630 unwind
.personality_routine
= 0;
3634 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
, 1);
3636 free_saved_prologue_counts ();
3637 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3641 dot_handlerdata (dummy
)
3642 int dummy ATTRIBUTE_UNUSED
;
3644 if (!in_procedure ("handlerdata"))
3646 unwind
.force_unwind_entry
= 1;
3648 /* Remember which segment we're in so we can switch back after .endp */
3649 unwind
.saved_text_seg
= now_seg
;
3650 unwind
.saved_text_subseg
= now_subseg
;
3652 /* Generate unwind info into unwind-info section and then leave that
3653 section as the currently active one so dataXX directives go into
3654 the language specific data area of the unwind info block. */
3655 generate_unwind_image (now_seg
);
3656 demand_empty_rest_of_line ();
3660 dot_unwentry (dummy
)
3661 int dummy ATTRIBUTE_UNUSED
;
3663 if (!in_procedure ("unwentry"))
3665 unwind
.force_unwind_entry
= 1;
3666 demand_empty_rest_of_line ();
3671 int dummy ATTRIBUTE_UNUSED
;
3676 if (!in_prologue ("altrp"))
3680 reg
= e
.X_add_number
- REG_BR
;
3681 if (e
.X_op
== O_register
&& reg
< 8)
3682 add_unwind_entry (output_rp_br (reg
));
3684 as_bad ("First operand not a valid branch register");
3688 dot_savemem (psprel
)
3695 if (!in_prologue (psprel
? "savepsp" : "savesp"))
3698 sep
= parse_operand (&e1
);
3700 as_bad ("No second operand to .save%ssp", psprel
? "p" : "");
3701 sep
= parse_operand (&e2
);
3703 reg1
= e1
.X_add_number
;
3704 val
= e2
.X_add_number
;
3706 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3707 if (e1
.X_op
== O_register
)
3709 if (e2
.X_op
== O_constant
)
3713 case REG_AR
+ AR_BSP
:
3714 add_unwind_entry (output_bsp_when ());
3715 add_unwind_entry ((psprel
3717 : output_bsp_sprel
) (val
));
3719 case REG_AR
+ AR_BSPSTORE
:
3720 add_unwind_entry (output_bspstore_when ());
3721 add_unwind_entry ((psprel
3722 ? output_bspstore_psprel
3723 : output_bspstore_sprel
) (val
));
3725 case REG_AR
+ AR_RNAT
:
3726 add_unwind_entry (output_rnat_when ());
3727 add_unwind_entry ((psprel
3728 ? output_rnat_psprel
3729 : output_rnat_sprel
) (val
));
3731 case REG_AR
+ AR_UNAT
:
3732 add_unwind_entry (output_unat_when ());
3733 add_unwind_entry ((psprel
3734 ? output_unat_psprel
3735 : output_unat_sprel
) (val
));
3737 case REG_AR
+ AR_FPSR
:
3738 add_unwind_entry (output_fpsr_when ());
3739 add_unwind_entry ((psprel
3740 ? output_fpsr_psprel
3741 : output_fpsr_sprel
) (val
));
3743 case REG_AR
+ AR_PFS
:
3744 add_unwind_entry (output_pfs_when ());
3745 add_unwind_entry ((psprel
3747 : output_pfs_sprel
) (val
));
3749 case REG_AR
+ AR_LC
:
3750 add_unwind_entry (output_lc_when ());
3751 add_unwind_entry ((psprel
3753 : output_lc_sprel
) (val
));
3756 add_unwind_entry (output_rp_when ());
3757 add_unwind_entry ((psprel
3759 : output_rp_sprel
) (val
));
3762 add_unwind_entry (output_preds_when ());
3763 add_unwind_entry ((psprel
3764 ? output_preds_psprel
3765 : output_preds_sprel
) (val
));
3768 add_unwind_entry (output_priunat_when_mem ());
3769 add_unwind_entry ((psprel
3770 ? output_priunat_psprel
3771 : output_priunat_sprel
) (val
));
3774 as_bad ("First operand not a valid register");
3778 as_bad (" Second operand not a valid constant");
3781 as_bad ("First operand not a register");
3786 int dummy ATTRIBUTE_UNUSED
;
3791 if (!in_prologue ("save.g"))
3794 sep
= parse_operand (&e1
);
3796 parse_operand (&e2
);
3798 if (e1
.X_op
!= O_constant
)
3799 as_bad ("First operand to .save.g must be a constant.");
3802 int grmask
= e1
.X_add_number
;
3804 add_unwind_entry (output_gr_mem (grmask
));
3807 int reg
= e2
.X_add_number
- REG_GR
;
3808 if (e2
.X_op
== O_register
&& reg
>= 0 && reg
< 128)
3809 add_unwind_entry (output_gr_gr (grmask
, reg
));
3811 as_bad ("Second operand is an invalid register.");
3818 int dummy ATTRIBUTE_UNUSED
;
3823 if (!in_prologue ("save.f"))
3826 sep
= parse_operand (&e1
);
3828 if (e1
.X_op
!= O_constant
)
3829 as_bad ("Operand to .save.f must be a constant.");
3831 add_unwind_entry (output_fr_mem (e1
.X_add_number
));
3836 int dummy ATTRIBUTE_UNUSED
;
3843 if (!in_prologue ("save.b"))
3846 sep
= parse_operand (&e1
);
3847 if (e1
.X_op
!= O_constant
)
3849 as_bad ("First operand to .save.b must be a constant.");
3852 brmask
= e1
.X_add_number
;
3856 sep
= parse_operand (&e2
);
3857 reg
= e2
.X_add_number
- REG_GR
;
3858 if (e2
.X_op
!= O_register
|| reg
> 127)
3860 as_bad ("Second operand to .save.b must be a general register.");
3863 add_unwind_entry (output_br_gr (brmask
, e2
.X_add_number
));
3866 add_unwind_entry (output_br_mem (brmask
));
3868 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3869 demand_empty_rest_of_line ();
3874 int dummy ATTRIBUTE_UNUSED
;
3879 if (!in_prologue ("save.gf"))
3882 sep
= parse_operand (&e1
);
3884 parse_operand (&e2
);
3886 if (e1
.X_op
!= O_constant
|| sep
!= ',' || e2
.X_op
!= O_constant
)
3887 as_bad ("Both operands of .save.gf must be constants.");
3890 int grmask
= e1
.X_add_number
;
3891 int frmask
= e2
.X_add_number
;
3892 add_unwind_entry (output_frgr_mem (grmask
, frmask
));
3898 int dummy ATTRIBUTE_UNUSED
;
3903 if (!in_prologue ("spill"))
3906 sep
= parse_operand (&e
);
3907 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3908 demand_empty_rest_of_line ();
3910 if (e
.X_op
!= O_constant
)
3911 as_bad ("Operand to .spill must be a constant");
3913 add_unwind_entry (output_spill_base (e
.X_add_number
));
3917 dot_spillreg (dummy
)
3918 int dummy ATTRIBUTE_UNUSED
;
3921 unsigned int ab
, xy
, reg
, treg
;
3924 if (!in_procedure ("spillreg"))
3927 sep
= parse_operand (&e1
);
3930 as_bad ("No second operand to .spillreg");
3934 parse_operand (&e2
);
3936 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3938 as_bad ("First operand to .spillreg must be a preserved register");
3942 if (!convert_expr_to_xy_reg (&e2
, &xy
, &treg
))
3944 as_bad ("Second operand to .spillreg must be a register");
3948 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
));
3952 dot_spillmem (psprel
)
3957 unsigned int ab
, reg
;
3959 if (!in_procedure ("spillmem"))
3962 sep
= parse_operand (&e1
);
3965 as_bad ("Second operand missing");
3969 parse_operand (&e2
);
3971 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3973 as_bad ("First operand to .spill%s must be a preserved register",
3974 psprel
? "psp" : "sp");
3978 if (e2
.X_op
!= O_constant
)
3980 as_bad ("Second operand to .spill%s must be a constant",
3981 psprel
? "psp" : "sp");
3986 add_unwind_entry (output_spill_psprel (ab
, reg
, e2
.X_add_number
));
3988 add_unwind_entry (output_spill_sprel (ab
, reg
, e2
.X_add_number
));
3992 dot_spillreg_p (dummy
)
3993 int dummy ATTRIBUTE_UNUSED
;
3996 unsigned int ab
, xy
, reg
, treg
;
3997 expressionS e1
, e2
, e3
;
4000 if (!in_procedure ("spillreg.p"))
4003 sep
= parse_operand (&e1
);
4006 as_bad ("No second and third operand to .spillreg.p");
4010 sep
= parse_operand (&e2
);
4013 as_bad ("No third operand to .spillreg.p");
4017 parse_operand (&e3
);
4019 qp
= e1
.X_add_number
- REG_P
;
4021 if (e1
.X_op
!= O_register
|| qp
> 63)
4023 as_bad ("First operand to .spillreg.p must be a predicate");
4027 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
4029 as_bad ("Second operand to .spillreg.p must be a preserved register");
4033 if (!convert_expr_to_xy_reg (&e3
, &xy
, &treg
))
4035 as_bad ("Third operand to .spillreg.p must be a register");
4039 add_unwind_entry (output_spill_reg_p (ab
, reg
, treg
, xy
, qp
));
4043 dot_spillmem_p (psprel
)
4046 expressionS e1
, e2
, e3
;
4048 unsigned int ab
, reg
;
4051 if (!in_procedure ("spillmem.p"))
4054 sep
= parse_operand (&e1
);
4057 as_bad ("Second operand missing");
4061 parse_operand (&e2
);
4064 as_bad ("Second operand missing");
4068 parse_operand (&e3
);
4070 qp
= e1
.X_add_number
- REG_P
;
4071 if (e1
.X_op
!= O_register
|| qp
> 63)
4073 as_bad ("First operand to .spill%s_p must be a predicate",
4074 psprel
? "psp" : "sp");
4078 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
4080 as_bad ("Second operand to .spill%s_p must be a preserved register",
4081 psprel
? "psp" : "sp");
4085 if (e3
.X_op
!= O_constant
)
4087 as_bad ("Third operand to .spill%s_p must be a constant",
4088 psprel
? "psp" : "sp");
4093 add_unwind_entry (output_spill_psprel_p (ab
, reg
, e3
.X_add_number
, qp
));
4095 add_unwind_entry (output_spill_sprel_p (ab
, reg
, e3
.X_add_number
, qp
));
4099 get_saved_prologue_count (lbl
)
4102 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4104 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4108 return lpc
->prologue_count
;
4110 as_bad ("Missing .label_state %ld", lbl
);
4115 save_prologue_count (lbl
, count
)
4119 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4121 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4125 lpc
->prologue_count
= count
;
4128 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
4130 new_lpc
->next
= unwind
.saved_prologue_counts
;
4131 new_lpc
->label_number
= lbl
;
4132 new_lpc
->prologue_count
= count
;
4133 unwind
.saved_prologue_counts
= new_lpc
;
4138 free_saved_prologue_counts ()
4140 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4141 label_prologue_count
*next
;
4150 unwind
.saved_prologue_counts
= NULL
;
4154 dot_label_state (dummy
)
4155 int dummy ATTRIBUTE_UNUSED
;
4159 if (!in_body ("label_state"))
4163 if (e
.X_op
!= O_constant
)
4165 as_bad ("Operand to .label_state must be a constant");
4168 add_unwind_entry (output_label_state (e
.X_add_number
));
4169 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4173 dot_copy_state (dummy
)
4174 int dummy ATTRIBUTE_UNUSED
;
4178 if (!in_body ("copy_state"))
4182 if (e
.X_op
!= O_constant
)
4184 as_bad ("Operand to .copy_state must be a constant");
4187 add_unwind_entry (output_copy_state (e
.X_add_number
));
4188 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4193 int dummy ATTRIBUTE_UNUSED
;
4198 if (!in_procedure ("unwabi"))
4201 sep
= parse_operand (&e1
);
4204 as_bad ("Second operand to .unwabi missing");
4207 sep
= parse_operand (&e2
);
4208 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
4209 demand_empty_rest_of_line ();
4211 if (e1
.X_op
!= O_constant
)
4213 as_bad ("First operand to .unwabi must be a constant");
4217 if (e2
.X_op
!= O_constant
)
4219 as_bad ("Second operand to .unwabi must be a constant");
4223 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
));
4227 dot_personality (dummy
)
4228 int dummy ATTRIBUTE_UNUSED
;
4231 if (!in_procedure ("personality"))
4234 name
= input_line_pointer
;
4235 c
= get_symbol_end ();
4236 p
= input_line_pointer
;
4237 unwind
.personality_routine
= symbol_find_or_make (name
);
4238 unwind
.force_unwind_entry
= 1;
4241 demand_empty_rest_of_line ();
4246 int dummy ATTRIBUTE_UNUSED
;
4251 unwind
.proc_start
= 0;
4252 /* Parse names of main and alternate entry points and mark them as
4253 function symbols: */
4257 name
= input_line_pointer
;
4258 c
= get_symbol_end ();
4259 p
= input_line_pointer
;
4261 as_bad ("Empty argument of .proc");
4264 sym
= symbol_find_or_make (name
);
4265 if (S_IS_DEFINED (sym
))
4266 as_bad ("`%s' was already defined", name
);
4267 else if (unwind
.proc_start
== 0)
4269 unwind
.proc_start
= sym
;
4271 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4275 if (*input_line_pointer
!= ',')
4277 ++input_line_pointer
;
4279 if (unwind
.proc_start
== 0)
4280 unwind
.proc_start
= expr_build_dot ();
4281 demand_empty_rest_of_line ();
4284 unwind
.prologue
= 0;
4285 unwind
.prologue_count
= 0;
4288 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4289 unwind
.personality_routine
= 0;
4294 int dummy ATTRIBUTE_UNUSED
;
4296 if (!in_procedure ("body"))
4298 if (!unwind
.prologue
&& !unwind
.body
&& unwind
.insn
)
4299 as_warn ("Initial .body should precede any instructions");
4301 unwind
.prologue
= 0;
4302 unwind
.prologue_mask
= 0;
4305 add_unwind_entry (output_body ());
4306 demand_empty_rest_of_line ();
4310 dot_prologue (dummy
)
4311 int dummy ATTRIBUTE_UNUSED
;
4314 int mask
= 0, grsave
= 0;
4316 if (!in_procedure ("prologue"))
4318 if (unwind
.prologue
)
4320 as_bad (".prologue within prologue");
4321 ignore_rest_of_line ();
4324 if (!unwind
.body
&& unwind
.insn
)
4325 as_warn ("Initial .prologue should precede any instructions");
4327 if (!is_it_end_of_statement ())
4330 sep
= parse_operand (&e1
);
4332 as_bad ("No second operand to .prologue");
4333 sep
= parse_operand (&e2
);
4334 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
4335 demand_empty_rest_of_line ();
4337 if (e1
.X_op
== O_constant
)
4339 mask
= e1
.X_add_number
;
4341 if (e2
.X_op
== O_constant
)
4342 grsave
= e2
.X_add_number
;
4343 else if (e2
.X_op
== O_register
4344 && (grsave
= e2
.X_add_number
- REG_GR
) < 128)
4347 as_bad ("Second operand not a constant or general register");
4349 add_unwind_entry (output_prologue_gr (mask
, grsave
));
4352 as_bad ("First operand not a constant");
4355 add_unwind_entry (output_prologue ());
4357 unwind
.prologue
= 1;
4358 unwind
.prologue_mask
= mask
;
4360 ++unwind
.prologue_count
;
4365 int dummy ATTRIBUTE_UNUSED
;
4369 int bytes_per_address
;
4372 subsegT saved_subseg
;
4373 char *name
, *default_name
, *p
, c
;
4375 int unwind_check
= md
.unwind_check
;
4377 md
.unwind_check
= unwind_check_error
;
4378 if (!in_procedure ("endp"))
4380 md
.unwind_check
= unwind_check
;
4382 if (unwind
.saved_text_seg
)
4384 saved_seg
= unwind
.saved_text_seg
;
4385 saved_subseg
= unwind
.saved_text_subseg
;
4386 unwind
.saved_text_seg
= NULL
;
4390 saved_seg
= now_seg
;
4391 saved_subseg
= now_subseg
;
4394 insn_group_break (1, 0, 0);
4396 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4398 generate_unwind_image (saved_seg
);
4400 if (unwind
.info
|| unwind
.force_unwind_entry
)
4404 subseg_set (md
.last_text_seg
, 0);
4405 proc_end
= expr_build_dot ();
4407 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
, 0);
4409 /* Make sure that section has 4 byte alignment for ILP32 and
4410 8 byte alignment for LP64. */
4411 record_alignment (now_seg
, md
.pointer_size_shift
);
4413 /* Need space for 3 pointers for procedure start, procedure end,
4415 ptr
= frag_more (3 * md
.pointer_size
);
4416 where
= frag_now_fix () - (3 * md
.pointer_size
);
4417 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4419 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4420 e
.X_op
= O_pseudo_fixup
;
4421 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4423 e
.X_add_symbol
= unwind
.proc_start
;
4424 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
4426 e
.X_op
= O_pseudo_fixup
;
4427 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4429 e
.X_add_symbol
= proc_end
;
4430 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4431 bytes_per_address
, &e
);
4435 e
.X_op
= O_pseudo_fixup
;
4436 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4438 e
.X_add_symbol
= unwind
.info
;
4439 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4440 bytes_per_address
, &e
);
4443 md_number_to_chars (ptr
+ (bytes_per_address
* 2), 0,
4448 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
, 1);
4450 subseg_set (saved_seg
, saved_subseg
);
4452 if (unwind
.proc_start
)
4453 default_name
= (char *) S_GET_NAME (unwind
.proc_start
);
4455 default_name
= NULL
;
4457 /* Parse names of main and alternate entry points and set symbol sizes. */
4461 name
= input_line_pointer
;
4462 c
= get_symbol_end ();
4463 p
= input_line_pointer
;
4466 if (md
.unwind_check
== unwind_check_warning
)
4470 as_warn ("Empty argument of .endp. Use the default name `%s'",
4472 name
= default_name
;
4475 as_warn ("Empty argument of .endp");
4478 as_bad ("Empty argument of .endp");
4482 sym
= symbol_find (name
);
4484 && md
.unwind_check
== unwind_check_warning
4486 && default_name
!= name
)
4488 /* We have a bad name. Try the default one if needed. */
4489 as_warn ("`%s' was not defined within procedure. Use the default name `%s'",
4490 name
, default_name
);
4491 name
= default_name
;
4492 sym
= symbol_find (name
);
4494 if (!sym
|| !S_IS_DEFINED (sym
))
4495 as_bad ("`%s' was not defined within procedure", name
);
4496 else if (unwind
.proc_start
4497 && (symbol_get_bfdsym (sym
)->flags
& BSF_FUNCTION
)
4498 && S_GET_SIZE (sym
) == 0 && symbol_get_obj (sym
)->size
== NULL
)
4500 fragS
*fr
= symbol_get_frag (unwind
.proc_start
);
4501 fragS
*frag
= symbol_get_frag (sym
);
4503 /* Check whether the function label is at or beyond last
4505 while (fr
&& fr
!= frag
)
4509 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4510 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4513 symbol_get_obj (sym
)->size
=
4514 (expressionS
*) xmalloc (sizeof (expressionS
));
4515 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4516 symbol_get_obj (sym
)->size
->X_add_symbol
4517 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4518 frag_now_fix (), frag_now
);
4519 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4520 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4527 if (*input_line_pointer
!= ',')
4529 ++input_line_pointer
;
4531 demand_empty_rest_of_line ();
4532 unwind
.proc_start
= unwind
.info
= 0;
4536 dot_template (template)
4539 CURR_SLOT
.user_template
= template;
4544 int dummy ATTRIBUTE_UNUSED
;
4546 int ins
, locs
, outs
, rots
;
4548 if (is_it_end_of_statement ())
4549 ins
= locs
= outs
= rots
= 0;
4552 ins
= get_absolute_expression ();
4553 if (*input_line_pointer
++ != ',')
4555 locs
= get_absolute_expression ();
4556 if (*input_line_pointer
++ != ',')
4558 outs
= get_absolute_expression ();
4559 if (*input_line_pointer
++ != ',')
4561 rots
= get_absolute_expression ();
4563 set_regstack (ins
, locs
, outs
, rots
);
4567 as_bad ("Comma expected");
4568 ignore_rest_of_line ();
4575 unsigned num_regs
, num_alloced
= 0;
4576 struct dynreg
**drpp
, *dr
;
4577 int ch
, base_reg
= 0;
4583 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4584 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4585 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4589 /* First, remove existing names from hash table. */
4590 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4592 hash_delete (md
.dynreg_hash
, dr
->name
);
4593 /* FIXME: Free dr->name. */
4597 drpp
= &md
.dynreg
[type
];
4600 start
= input_line_pointer
;
4601 ch
= get_symbol_end ();
4602 len
= strlen (ia64_canonicalize_symbol_name (start
));
4603 *input_line_pointer
= ch
;
4606 if (*input_line_pointer
!= '[')
4608 as_bad ("Expected '['");
4611 ++input_line_pointer
; /* skip '[' */
4613 num_regs
= get_absolute_expression ();
4615 if (*input_line_pointer
++ != ']')
4617 as_bad ("Expected ']'");
4622 num_alloced
+= num_regs
;
4626 if (num_alloced
> md
.rot
.num_regs
)
4628 as_bad ("Used more than the declared %d rotating registers",
4634 if (num_alloced
> 96)
4636 as_bad ("Used more than the available 96 rotating registers");
4641 if (num_alloced
> 48)
4643 as_bad ("Used more than the available 48 rotating registers");
4654 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4655 memset (*drpp
, 0, sizeof (*dr
));
4658 name
= obstack_alloc (¬es
, len
+ 1);
4659 memcpy (name
, start
, len
);
4664 dr
->num_regs
= num_regs
;
4665 dr
->base
= base_reg
;
4667 base_reg
+= num_regs
;
4669 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4671 as_bad ("Attempt to redefine register set `%s'", name
);
4672 obstack_free (¬es
, name
);
4676 if (*input_line_pointer
!= ',')
4678 ++input_line_pointer
; /* skip comma */
4681 demand_empty_rest_of_line ();
4685 ignore_rest_of_line ();
4689 dot_byteorder (byteorder
)
4692 segment_info_type
*seginfo
= seg_info (now_seg
);
4694 if (byteorder
== -1)
4696 if (seginfo
->tc_segment_info_data
.endian
== 0)
4697 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4698 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4701 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4703 if (target_big_endian
!= byteorder
)
4705 target_big_endian
= byteorder
;
4706 if (target_big_endian
)
4708 ia64_number_to_chars
= number_to_chars_bigendian
;
4709 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4713 ia64_number_to_chars
= number_to_chars_littleendian
;
4714 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4721 int dummy ATTRIBUTE_UNUSED
;
4728 option
= input_line_pointer
;
4729 ch
= get_symbol_end ();
4730 if (strcmp (option
, "lsb") == 0)
4731 md
.flags
&= ~EF_IA_64_BE
;
4732 else if (strcmp (option
, "msb") == 0)
4733 md
.flags
|= EF_IA_64_BE
;
4734 else if (strcmp (option
, "abi32") == 0)
4735 md
.flags
&= ~EF_IA_64_ABI64
;
4736 else if (strcmp (option
, "abi64") == 0)
4737 md
.flags
|= EF_IA_64_ABI64
;
4739 as_bad ("Unknown psr option `%s'", option
);
4740 *input_line_pointer
= ch
;
4743 if (*input_line_pointer
!= ',')
4746 ++input_line_pointer
;
4749 demand_empty_rest_of_line ();
4754 int dummy ATTRIBUTE_UNUSED
;
4756 new_logical_line (0, get_absolute_expression ());
4757 demand_empty_rest_of_line ();
4761 parse_section_name ()
4767 if (*input_line_pointer
== '"')
4768 name
= demand_copy_C_string (&len
);
4771 char *start
= input_line_pointer
;
4772 char c
= get_symbol_end ();
4774 if (input_line_pointer
== start
)
4776 as_bad ("Missing section name");
4777 ignore_rest_of_line ();
4780 name
= obstack_copy (¬es
, start
, input_line_pointer
- start
+ 1);
4781 *input_line_pointer
= c
;
4785 ignore_rest_of_line ();
4789 if (*input_line_pointer
!= ',')
4791 as_bad ("Comma expected after section name");
4792 ignore_rest_of_line ();
4795 ++input_line_pointer
; /* skip comma */
4803 char *name
= parse_section_name ();
4807 md
.keep_pending_output
= 1;
4810 obj_elf_previous (0);
4811 md
.keep_pending_output
= 0;
4814 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4817 stmt_float_cons (kind
)
4838 ia64_do_align (alignment
);
4846 int saved_auto_align
= md
.auto_align
;
4850 md
.auto_align
= saved_auto_align
;
4854 dot_xfloat_cons (kind
)
4857 char *name
= parse_section_name ();
4861 md
.keep_pending_output
= 1;
4863 stmt_float_cons (kind
);
4864 obj_elf_previous (0);
4865 md
.keep_pending_output
= 0;
4869 dot_xstringer (zero
)
4872 char *name
= parse_section_name ();
4876 md
.keep_pending_output
= 1;
4879 obj_elf_previous (0);
4880 md
.keep_pending_output
= 0;
4887 int saved_auto_align
= md
.auto_align
;
4888 char *name
= parse_section_name ();
4892 md
.keep_pending_output
= 1;
4896 md
.auto_align
= saved_auto_align
;
4897 obj_elf_previous (0);
4898 md
.keep_pending_output
= 0;
4902 dot_xfloat_cons_ua (kind
)
4905 int saved_auto_align
= md
.auto_align
;
4906 char *name
= parse_section_name ();
4910 md
.keep_pending_output
= 1;
4913 stmt_float_cons (kind
);
4914 md
.auto_align
= saved_auto_align
;
4915 obj_elf_previous (0);
4916 md
.keep_pending_output
= 0;
4919 /* .reg.val <regname>,value */
4923 int dummy ATTRIBUTE_UNUSED
;
4928 if (reg
.X_op
!= O_register
)
4930 as_bad (_("Register name expected"));
4931 ignore_rest_of_line ();
4933 else if (*input_line_pointer
++ != ',')
4935 as_bad (_("Comma expected"));
4936 ignore_rest_of_line ();
4940 valueT value
= get_absolute_expression ();
4941 int regno
= reg
.X_add_number
;
4942 if (regno
<= REG_GR
|| regno
> REG_GR
+ 127)
4943 as_warn (_("Register value annotation ignored"));
4946 gr_values
[regno
- REG_GR
].known
= 1;
4947 gr_values
[regno
- REG_GR
].value
= value
;
4948 gr_values
[regno
- REG_GR
].path
= md
.path
;
4951 demand_empty_rest_of_line ();
4956 .serialize.instruction
4959 dot_serialize (type
)
4962 insn_group_break (0, 0, 0);
4964 instruction_serialization ();
4966 data_serialization ();
4967 insn_group_break (0, 0, 0);
4968 demand_empty_rest_of_line ();
4971 /* select dv checking mode
4976 A stop is inserted when changing modes
4983 if (md
.manual_bundling
)
4984 as_warn (_("Directive invalid within a bundle"));
4986 if (type
== 'E' || type
== 'A')
4987 md
.mode_explicitly_set
= 0;
4989 md
.mode_explicitly_set
= 1;
4996 if (md
.explicit_mode
)
4997 insn_group_break (1, 0, 0);
4998 md
.explicit_mode
= 0;
5002 if (!md
.explicit_mode
)
5003 insn_group_break (1, 0, 0);
5004 md
.explicit_mode
= 1;
5008 if (md
.explicit_mode
!= md
.default_explicit_mode
)
5009 insn_group_break (1, 0, 0);
5010 md
.explicit_mode
= md
.default_explicit_mode
;
5011 md
.mode_explicitly_set
= 0;
5022 for (regno
= 0; regno
< 64; regno
++)
5024 if (mask
& ((valueT
) 1 << regno
))
5026 fprintf (stderr
, "%s p%d", comma
, regno
);
5033 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5034 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5035 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
5036 .pred.safe_across_calls p1 [, p2 [,...]]
5045 int p1
= -1, p2
= -1;
5049 if (*input_line_pointer
== '"')
5052 char *form
= demand_copy_C_string (&len
);
5054 if (strcmp (form
, "mutex") == 0)
5056 else if (strcmp (form
, "clear") == 0)
5058 else if (strcmp (form
, "imply") == 0)
5060 obstack_free (¬es
, form
);
5062 else if (*input_line_pointer
== '@')
5064 char *form
= ++input_line_pointer
;
5065 char c
= get_symbol_end();
5067 if (strcmp (form
, "mutex") == 0)
5069 else if (strcmp (form
, "clear") == 0)
5071 else if (strcmp (form
, "imply") == 0)
5073 *input_line_pointer
= c
;
5077 as_bad (_("Missing predicate relation type"));
5078 ignore_rest_of_line ();
5083 as_bad (_("Unrecognized predicate relation type"));
5084 ignore_rest_of_line ();
5087 if (*input_line_pointer
== ',')
5088 ++input_line_pointer
;
5097 expressionS pr
, *pr1
, *pr2
;
5100 if (pr
.X_op
== O_register
5101 && pr
.X_add_number
>= REG_P
5102 && pr
.X_add_number
<= REG_P
+ 63)
5104 regno
= pr
.X_add_number
- REG_P
;
5112 else if (type
!= 'i'
5113 && pr
.X_op
== O_subtract
5114 && (pr1
= symbol_get_value_expression (pr
.X_add_symbol
))
5115 && pr1
->X_op
== O_register
5116 && pr1
->X_add_number
>= REG_P
5117 && pr1
->X_add_number
<= REG_P
+ 63
5118 && (pr2
= symbol_get_value_expression (pr
.X_op_symbol
))
5119 && pr2
->X_op
== O_register
5120 && pr2
->X_add_number
>= REG_P
5121 && pr2
->X_add_number
<= REG_P
+ 63)
5126 regno
= pr1
->X_add_number
- REG_P
;
5127 stop
= pr2
->X_add_number
- REG_P
;
5130 as_bad (_("Bad register range"));
5131 ignore_rest_of_line ();
5134 bits
= ((bits
<< stop
) << 1) - (bits
<< regno
);
5135 count
+= stop
- regno
+ 1;
5139 as_bad (_("Predicate register expected"));
5140 ignore_rest_of_line ();
5144 as_warn (_("Duplicate predicate register ignored"));
5146 if (*input_line_pointer
!= ',')
5148 ++input_line_pointer
;
5157 clear_qp_mutex (mask
);
5158 clear_qp_implies (mask
, (valueT
) 0);
5161 if (count
!= 2 || p1
== -1 || p2
== -1)
5162 as_bad (_("Predicate source and target required"));
5163 else if (p1
== 0 || p2
== 0)
5164 as_bad (_("Use of p0 is not valid in this context"));
5166 add_qp_imply (p1
, p2
);
5171 as_bad (_("At least two PR arguments expected"));
5176 as_bad (_("Use of p0 is not valid in this context"));
5179 add_qp_mutex (mask
);
5182 /* note that we don't override any existing relations */
5185 as_bad (_("At least one PR argument expected"));
5190 fprintf (stderr
, "Safe across calls: ");
5191 print_prmask (mask
);
5192 fprintf (stderr
, "\n");
5194 qp_safe_across_calls
= mask
;
5197 demand_empty_rest_of_line ();
5200 /* .entry label [, label [, ...]]
5201 Hint to DV code that the given labels are to be considered entry points.
5202 Otherwise, only global labels are considered entry points. */
5206 int dummy ATTRIBUTE_UNUSED
;
5215 name
= input_line_pointer
;
5216 c
= get_symbol_end ();
5217 symbolP
= symbol_find_or_make (name
);
5219 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (PTR
) symbolP
);
5221 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5224 *input_line_pointer
= c
;
5226 c
= *input_line_pointer
;
5229 input_line_pointer
++;
5231 if (*input_line_pointer
== '\n')
5237 demand_empty_rest_of_line ();
5240 /* .mem.offset offset, base
5241 "base" is used to distinguish between offsets from a different base. */
5244 dot_mem_offset (dummy
)
5245 int dummy ATTRIBUTE_UNUSED
;
5247 md
.mem_offset
.hint
= 1;
5248 md
.mem_offset
.offset
= get_absolute_expression ();
5249 if (*input_line_pointer
!= ',')
5251 as_bad (_("Comma expected"));
5252 ignore_rest_of_line ();
5255 ++input_line_pointer
;
5256 md
.mem_offset
.base
= get_absolute_expression ();
5257 demand_empty_rest_of_line ();
5260 /* ia64-specific pseudo-ops: */
5261 const pseudo_typeS md_pseudo_table
[] =
5263 { "radix", dot_radix
, 0 },
5264 { "lcomm", s_lcomm_bytes
, 1 },
5265 { "loc", dot_loc
, 0 },
5266 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
5267 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
5268 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
5269 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5270 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5271 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5272 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5273 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5274 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5275 { "proc", dot_proc
, 0 },
5276 { "body", dot_body
, 0 },
5277 { "prologue", dot_prologue
, 0 },
5278 { "endp", dot_endp
, 0 },
5280 { "fframe", dot_fframe
, 0 },
5281 { "vframe", dot_vframe
, 0 },
5282 { "vframesp", dot_vframesp
, 0 },
5283 { "vframepsp", dot_vframepsp
, 0 },
5284 { "save", dot_save
, 0 },
5285 { "restore", dot_restore
, 0 },
5286 { "restorereg", dot_restorereg
, 0 },
5287 { "restorereg.p", dot_restorereg_p
, 0 },
5288 { "handlerdata", dot_handlerdata
, 0 },
5289 { "unwentry", dot_unwentry
, 0 },
5290 { "altrp", dot_altrp
, 0 },
5291 { "savesp", dot_savemem
, 0 },
5292 { "savepsp", dot_savemem
, 1 },
5293 { "save.g", dot_saveg
, 0 },
5294 { "save.f", dot_savef
, 0 },
5295 { "save.b", dot_saveb
, 0 },
5296 { "save.gf", dot_savegf
, 0 },
5297 { "spill", dot_spill
, 0 },
5298 { "spillreg", dot_spillreg
, 0 },
5299 { "spillsp", dot_spillmem
, 0 },
5300 { "spillpsp", dot_spillmem
, 1 },
5301 { "spillreg.p", dot_spillreg_p
, 0 },
5302 { "spillsp.p", dot_spillmem_p
, 0 },
5303 { "spillpsp.p", dot_spillmem_p
, 1 },
5304 { "label_state", dot_label_state
, 0 },
5305 { "copy_state", dot_copy_state
, 0 },
5306 { "unwabi", dot_unwabi
, 0 },
5307 { "personality", dot_personality
, 0 },
5308 { "mii", dot_template
, 0x0 },
5309 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5310 { "mlx", dot_template
, 0x2 },
5311 { "mmi", dot_template
, 0x4 },
5312 { "mfi", dot_template
, 0x6 },
5313 { "mmf", dot_template
, 0x7 },
5314 { "mib", dot_template
, 0x8 },
5315 { "mbb", dot_template
, 0x9 },
5316 { "bbb", dot_template
, 0xb },
5317 { "mmb", dot_template
, 0xc },
5318 { "mfb", dot_template
, 0xe },
5319 { "align", dot_align
, 0 },
5320 { "regstk", dot_regstk
, 0 },
5321 { "rotr", dot_rot
, DYNREG_GR
},
5322 { "rotf", dot_rot
, DYNREG_FR
},
5323 { "rotp", dot_rot
, DYNREG_PR
},
5324 { "lsb", dot_byteorder
, 0 },
5325 { "msb", dot_byteorder
, 1 },
5326 { "psr", dot_psr
, 0 },
5327 { "alias", dot_alias
, 0 },
5328 { "secalias", dot_alias
, 1 },
5329 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5331 { "xdata1", dot_xdata
, 1 },
5332 { "xdata2", dot_xdata
, 2 },
5333 { "xdata4", dot_xdata
, 4 },
5334 { "xdata8", dot_xdata
, 8 },
5335 { "xdata16", dot_xdata
, 16 },
5336 { "xreal4", dot_xfloat_cons
, 'f' },
5337 { "xreal8", dot_xfloat_cons
, 'd' },
5338 { "xreal10", dot_xfloat_cons
, 'x' },
5339 { "xreal16", dot_xfloat_cons
, 'X' },
5340 { "xstring", dot_xstringer
, 0 },
5341 { "xstringz", dot_xstringer
, 1 },
5343 /* unaligned versions: */
5344 { "xdata2.ua", dot_xdata_ua
, 2 },
5345 { "xdata4.ua", dot_xdata_ua
, 4 },
5346 { "xdata8.ua", dot_xdata_ua
, 8 },
5347 { "xdata16.ua", dot_xdata_ua
, 16 },
5348 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5349 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5350 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5351 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5353 /* annotations/DV checking support */
5354 { "entry", dot_entry
, 0 },
5355 { "mem.offset", dot_mem_offset
, 0 },
5356 { "pred.rel", dot_pred_rel
, 0 },
5357 { "pred.rel.clear", dot_pred_rel
, 'c' },
5358 { "pred.rel.imply", dot_pred_rel
, 'i' },
5359 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5360 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5361 { "reg.val", dot_reg_val
, 0 },
5362 { "serialize.data", dot_serialize
, 0 },
5363 { "serialize.instruction", dot_serialize
, 1 },
5364 { "auto", dot_dv_mode
, 'a' },
5365 { "explicit", dot_dv_mode
, 'e' },
5366 { "default", dot_dv_mode
, 'd' },
5368 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5369 IA-64 aligns data allocation pseudo-ops by default, so we have to
5370 tell it that these ones are supposed to be unaligned. Long term,
5371 should rewrite so that only IA-64 specific data allocation pseudo-ops
5372 are aligned by default. */
5373 {"2byte", stmt_cons_ua
, 2},
5374 {"4byte", stmt_cons_ua
, 4},
5375 {"8byte", stmt_cons_ua
, 8},
5380 static const struct pseudo_opcode
5383 void (*handler
) (int);
5388 /* these are more like pseudo-ops, but don't start with a dot */
5389 { "data1", cons
, 1 },
5390 { "data2", cons
, 2 },
5391 { "data4", cons
, 4 },
5392 { "data8", cons
, 8 },
5393 { "data16", cons
, 16 },
5394 { "real4", stmt_float_cons
, 'f' },
5395 { "real8", stmt_float_cons
, 'd' },
5396 { "real10", stmt_float_cons
, 'x' },
5397 { "real16", stmt_float_cons
, 'X' },
5398 { "string", stringer
, 0 },
5399 { "stringz", stringer
, 1 },
5401 /* unaligned versions: */
5402 { "data2.ua", stmt_cons_ua
, 2 },
5403 { "data4.ua", stmt_cons_ua
, 4 },
5404 { "data8.ua", stmt_cons_ua
, 8 },
5405 { "data16.ua", stmt_cons_ua
, 16 },
5406 { "real4.ua", float_cons
, 'f' },
5407 { "real8.ua", float_cons
, 'd' },
5408 { "real10.ua", float_cons
, 'x' },
5409 { "real16.ua", float_cons
, 'X' },
5412 /* Declare a register by creating a symbol for it and entering it in
5413 the symbol table. */
5416 declare_register (name
, regnum
)
5423 sym
= symbol_new (name
, reg_section
, regnum
, &zero_address_frag
);
5425 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (PTR
) sym
);
5427 as_fatal ("Inserting \"%s\" into register table failed: %s",
5434 declare_register_set (prefix
, num_regs
, base_regnum
)
5442 for (i
= 0; i
< num_regs
; ++i
)
5444 sprintf (name
, "%s%u", prefix
, i
);
5445 declare_register (name
, base_regnum
+ i
);
5450 operand_width (opnd
)
5451 enum ia64_opnd opnd
;
5453 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5454 unsigned int bits
= 0;
5458 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5459 bits
+= odesc
->field
[i
].bits
;
5464 static enum operand_match_result
5465 operand_match (idesc
, index
, e
)
5466 const struct ia64_opcode
*idesc
;
5470 enum ia64_opnd opnd
= idesc
->operands
[index
];
5471 int bits
, relocatable
= 0;
5472 struct insn_fix
*fix
;
5479 case IA64_OPND_AR_CCV
:
5480 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5481 return OPERAND_MATCH
;
5484 case IA64_OPND_AR_CSD
:
5485 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5486 return OPERAND_MATCH
;
5489 case IA64_OPND_AR_PFS
:
5490 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5491 return OPERAND_MATCH
;
5495 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5496 return OPERAND_MATCH
;
5500 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5501 return OPERAND_MATCH
;
5505 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5506 return OPERAND_MATCH
;
5509 case IA64_OPND_PR_ROT
:
5510 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5511 return OPERAND_MATCH
;
5515 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5516 return OPERAND_MATCH
;
5519 case IA64_OPND_PSR_L
:
5520 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5521 return OPERAND_MATCH
;
5524 case IA64_OPND_PSR_UM
:
5525 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5526 return OPERAND_MATCH
;
5530 if (e
->X_op
== O_constant
)
5532 if (e
->X_add_number
== 1)
5533 return OPERAND_MATCH
;
5535 return OPERAND_OUT_OF_RANGE
;
5540 if (e
->X_op
== O_constant
)
5542 if (e
->X_add_number
== 8)
5543 return OPERAND_MATCH
;
5545 return OPERAND_OUT_OF_RANGE
;
5550 if (e
->X_op
== O_constant
)
5552 if (e
->X_add_number
== 16)
5553 return OPERAND_MATCH
;
5555 return OPERAND_OUT_OF_RANGE
;
5559 /* register operands: */
5562 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5563 && e
->X_add_number
< REG_AR
+ 128)
5564 return OPERAND_MATCH
;
5569 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5570 && e
->X_add_number
< REG_BR
+ 8)
5571 return OPERAND_MATCH
;
5575 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5576 && e
->X_add_number
< REG_CR
+ 128)
5577 return OPERAND_MATCH
;
5584 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5585 && e
->X_add_number
< REG_FR
+ 128)
5586 return OPERAND_MATCH
;
5591 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5592 && e
->X_add_number
< REG_P
+ 64)
5593 return OPERAND_MATCH
;
5599 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5600 && e
->X_add_number
< REG_GR
+ 128)
5601 return OPERAND_MATCH
;
5604 case IA64_OPND_R3_2
:
5605 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5607 if (e
->X_add_number
< REG_GR
+ 4)
5608 return OPERAND_MATCH
;
5609 else if (e
->X_add_number
< REG_GR
+ 128)
5610 return OPERAND_OUT_OF_RANGE
;
5614 /* indirect operands: */
5615 case IA64_OPND_CPUID_R3
:
5616 case IA64_OPND_DBR_R3
:
5617 case IA64_OPND_DTR_R3
:
5618 case IA64_OPND_ITR_R3
:
5619 case IA64_OPND_IBR_R3
:
5620 case IA64_OPND_MSR_R3
:
5621 case IA64_OPND_PKR_R3
:
5622 case IA64_OPND_PMC_R3
:
5623 case IA64_OPND_PMD_R3
:
5624 case IA64_OPND_RR_R3
:
5625 if (e
->X_op
== O_index
&& e
->X_op_symbol
5626 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5627 == opnd
- IA64_OPND_CPUID_R3
))
5628 return OPERAND_MATCH
;
5632 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5633 return OPERAND_MATCH
;
5636 /* immediate operands: */
5637 case IA64_OPND_CNT2a
:
5638 case IA64_OPND_LEN4
:
5639 case IA64_OPND_LEN6
:
5640 bits
= operand_width (idesc
->operands
[index
]);
5641 if (e
->X_op
== O_constant
)
5643 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5644 return OPERAND_MATCH
;
5646 return OPERAND_OUT_OF_RANGE
;
5650 case IA64_OPND_CNT2b
:
5651 if (e
->X_op
== O_constant
)
5653 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5654 return OPERAND_MATCH
;
5656 return OPERAND_OUT_OF_RANGE
;
5660 case IA64_OPND_CNT2c
:
5661 val
= e
->X_add_number
;
5662 if (e
->X_op
== O_constant
)
5664 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5665 return OPERAND_MATCH
;
5667 return OPERAND_OUT_OF_RANGE
;
5672 /* SOR must be an integer multiple of 8 */
5673 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5674 return OPERAND_OUT_OF_RANGE
;
5677 if (e
->X_op
== O_constant
)
5679 if ((bfd_vma
) e
->X_add_number
<= 96)
5680 return OPERAND_MATCH
;
5682 return OPERAND_OUT_OF_RANGE
;
5686 case IA64_OPND_IMMU62
:
5687 if (e
->X_op
== O_constant
)
5689 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5690 return OPERAND_MATCH
;
5692 return OPERAND_OUT_OF_RANGE
;
5696 /* FIXME -- need 62-bit relocation type */
5697 as_bad (_("62-bit relocation not yet implemented"));
5701 case IA64_OPND_IMMU64
:
5702 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5703 || e
->X_op
== O_subtract
)
5705 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5706 fix
->code
= BFD_RELOC_IA64_IMM64
;
5707 if (e
->X_op
!= O_subtract
)
5709 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5710 if (e
->X_op
== O_pseudo_fixup
)
5714 fix
->opnd
= idesc
->operands
[index
];
5717 ++CURR_SLOT
.num_fixups
;
5718 return OPERAND_MATCH
;
5720 else if (e
->X_op
== O_constant
)
5721 return OPERAND_MATCH
;
5724 case IA64_OPND_CCNT5
:
5725 case IA64_OPND_CNT5
:
5726 case IA64_OPND_CNT6
:
5727 case IA64_OPND_CPOS6a
:
5728 case IA64_OPND_CPOS6b
:
5729 case IA64_OPND_CPOS6c
:
5730 case IA64_OPND_IMMU2
:
5731 case IA64_OPND_IMMU7a
:
5732 case IA64_OPND_IMMU7b
:
5733 case IA64_OPND_IMMU21
:
5734 case IA64_OPND_IMMU24
:
5735 case IA64_OPND_MBTYPE4
:
5736 case IA64_OPND_MHTYPE8
:
5737 case IA64_OPND_POS6
:
5738 bits
= operand_width (idesc
->operands
[index
]);
5739 if (e
->X_op
== O_constant
)
5741 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5742 return OPERAND_MATCH
;
5744 return OPERAND_OUT_OF_RANGE
;
5748 case IA64_OPND_IMMU9
:
5749 bits
= operand_width (idesc
->operands
[index
]);
5750 if (e
->X_op
== O_constant
)
5752 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5754 int lobits
= e
->X_add_number
& 0x3;
5755 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5756 e
->X_add_number
|= (bfd_vma
) 0x3;
5757 return OPERAND_MATCH
;
5760 return OPERAND_OUT_OF_RANGE
;
5764 case IA64_OPND_IMM44
:
5765 /* least 16 bits must be zero */
5766 if ((e
->X_add_number
& 0xffff) != 0)
5767 /* XXX technically, this is wrong: we should not be issuing warning
5768 messages until we're sure this instruction pattern is going to
5770 as_warn (_("lower 16 bits of mask ignored"));
5772 if (e
->X_op
== O_constant
)
5774 if (((e
->X_add_number
>= 0
5775 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5776 || (e
->X_add_number
< 0
5777 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5780 if (e
->X_add_number
>= 0
5781 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5783 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5785 return OPERAND_MATCH
;
5788 return OPERAND_OUT_OF_RANGE
;
5792 case IA64_OPND_IMM17
:
5793 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5794 if (e
->X_op
== O_constant
)
5796 if (((e
->X_add_number
>= 0
5797 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5798 || (e
->X_add_number
< 0
5799 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5802 if (e
->X_add_number
>= 0
5803 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5805 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5807 return OPERAND_MATCH
;
5810 return OPERAND_OUT_OF_RANGE
;
5814 case IA64_OPND_IMM14
:
5815 case IA64_OPND_IMM22
:
5817 case IA64_OPND_IMM1
:
5818 case IA64_OPND_IMM8
:
5819 case IA64_OPND_IMM8U4
:
5820 case IA64_OPND_IMM8M1
:
5821 case IA64_OPND_IMM8M1U4
:
5822 case IA64_OPND_IMM8M1U8
:
5823 case IA64_OPND_IMM9a
:
5824 case IA64_OPND_IMM9b
:
5825 bits
= operand_width (idesc
->operands
[index
]);
5826 if (relocatable
&& (e
->X_op
== O_symbol
5827 || e
->X_op
== O_subtract
5828 || e
->X_op
== O_pseudo_fixup
))
5830 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5832 if (idesc
->operands
[index
] == IA64_OPND_IMM14
)
5833 fix
->code
= BFD_RELOC_IA64_IMM14
;
5835 fix
->code
= BFD_RELOC_IA64_IMM22
;
5837 if (e
->X_op
!= O_subtract
)
5839 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5840 if (e
->X_op
== O_pseudo_fixup
)
5844 fix
->opnd
= idesc
->operands
[index
];
5847 ++CURR_SLOT
.num_fixups
;
5848 return OPERAND_MATCH
;
5850 else if (e
->X_op
!= O_constant
5851 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5852 return OPERAND_MISMATCH
;
5854 if (opnd
== IA64_OPND_IMM8M1U4
)
5856 /* Zero is not valid for unsigned compares that take an adjusted
5857 constant immediate range. */
5858 if (e
->X_add_number
== 0)
5859 return OPERAND_OUT_OF_RANGE
;
5861 /* Sign-extend 32-bit unsigned numbers, so that the following range
5862 checks will work. */
5863 val
= e
->X_add_number
;
5864 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5865 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5866 val
= ((val
<< 32) >> 32);
5868 /* Check for 0x100000000. This is valid because
5869 0x100000000-1 is the same as ((uint32_t) -1). */
5870 if (val
== ((bfd_signed_vma
) 1 << 32))
5871 return OPERAND_MATCH
;
5875 else if (opnd
== IA64_OPND_IMM8M1U8
)
5877 /* Zero is not valid for unsigned compares that take an adjusted
5878 constant immediate range. */
5879 if (e
->X_add_number
== 0)
5880 return OPERAND_OUT_OF_RANGE
;
5882 /* Check for 0x10000000000000000. */
5883 if (e
->X_op
== O_big
)
5885 if (generic_bignum
[0] == 0
5886 && generic_bignum
[1] == 0
5887 && generic_bignum
[2] == 0
5888 && generic_bignum
[3] == 0
5889 && generic_bignum
[4] == 1)
5890 return OPERAND_MATCH
;
5892 return OPERAND_OUT_OF_RANGE
;
5895 val
= e
->X_add_number
- 1;
5897 else if (opnd
== IA64_OPND_IMM8M1
)
5898 val
= e
->X_add_number
- 1;
5899 else if (opnd
== IA64_OPND_IMM8U4
)
5901 /* Sign-extend 32-bit unsigned numbers, so that the following range
5902 checks will work. */
5903 val
= e
->X_add_number
;
5904 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5905 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5906 val
= ((val
<< 32) >> 32);
5909 val
= e
->X_add_number
;
5911 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5912 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5913 return OPERAND_MATCH
;
5915 return OPERAND_OUT_OF_RANGE
;
5917 case IA64_OPND_INC3
:
5918 /* +/- 1, 4, 8, 16 */
5919 val
= e
->X_add_number
;
5922 if (e
->X_op
== O_constant
)
5924 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5925 return OPERAND_MATCH
;
5927 return OPERAND_OUT_OF_RANGE
;
5931 case IA64_OPND_TGT25
:
5932 case IA64_OPND_TGT25b
:
5933 case IA64_OPND_TGT25c
:
5934 case IA64_OPND_TGT64
:
5935 if (e
->X_op
== O_symbol
)
5937 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5938 if (opnd
== IA64_OPND_TGT25
)
5939 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5940 else if (opnd
== IA64_OPND_TGT25b
)
5941 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5942 else if (opnd
== IA64_OPND_TGT25c
)
5943 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5944 else if (opnd
== IA64_OPND_TGT64
)
5945 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5949 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5950 fix
->opnd
= idesc
->operands
[index
];
5953 ++CURR_SLOT
.num_fixups
;
5954 return OPERAND_MATCH
;
5956 case IA64_OPND_TAG13
:
5957 case IA64_OPND_TAG13b
:
5961 return OPERAND_MATCH
;
5964 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5965 /* There are no external relocs for TAG13/TAG13b fields, so we
5966 create a dummy reloc. This will not live past md_apply_fix3. */
5967 fix
->code
= BFD_RELOC_UNUSED
;
5968 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5969 fix
->opnd
= idesc
->operands
[index
];
5972 ++CURR_SLOT
.num_fixups
;
5973 return OPERAND_MATCH
;
5980 case IA64_OPND_LDXMOV
:
5981 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5982 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
5983 fix
->opnd
= idesc
->operands
[index
];
5986 ++CURR_SLOT
.num_fixups
;
5987 return OPERAND_MATCH
;
5992 return OPERAND_MISMATCH
;
6001 memset (e
, 0, sizeof (*e
));
6004 if (*input_line_pointer
!= '}')
6006 sep
= *input_line_pointer
++;
6010 if (!md
.manual_bundling
)
6011 as_warn ("Found '}' when manual bundling is off");
6013 CURR_SLOT
.manual_bundling_off
= 1;
6014 md
.manual_bundling
= 0;
6020 /* Returns the next entry in the opcode table that matches the one in
6021 IDESC, and frees the entry in IDESC. If no matching entry is
6022 found, NULL is returned instead. */
6024 static struct ia64_opcode
*
6025 get_next_opcode (struct ia64_opcode
*idesc
)
6027 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
6028 ia64_free_opcode (idesc
);
6032 /* Parse the operands for the opcode and find the opcode variant that
6033 matches the specified operands, or NULL if no match is possible. */
6035 static struct ia64_opcode
*
6036 parse_operands (idesc
)
6037 struct ia64_opcode
*idesc
;
6039 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
6040 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
6043 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
6044 enum operand_match_result result
;
6046 char *first_arg
= 0, *end
, *saved_input_pointer
;
6049 assert (strlen (idesc
->name
) <= 128);
6051 strcpy (mnemonic
, idesc
->name
);
6052 if (idesc
->operands
[2] == IA64_OPND_SOF
6053 || idesc
->operands
[1] == IA64_OPND_SOF
)
6055 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6056 can't parse the first operand until we have parsed the
6057 remaining operands of the "alloc" instruction. */
6059 first_arg
= input_line_pointer
;
6060 end
= strchr (input_line_pointer
, '=');
6063 as_bad ("Expected separator `='");
6066 input_line_pointer
= end
+ 1;
6073 if (i
< NELEMS (CURR_SLOT
.opnd
))
6075 sep
= parse_operand (CURR_SLOT
.opnd
+ i
);
6076 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
6083 sep
= parse_operand (&dummy
);
6084 if (dummy
.X_op
== O_absent
)
6090 if (sep
!= '=' && sep
!= ',')
6095 if (num_outputs
> 0)
6096 as_bad ("Duplicate equal sign (=) in instruction");
6098 num_outputs
= i
+ 1;
6103 as_bad ("Illegal operand separator `%c'", sep
);
6107 if (idesc
->operands
[2] == IA64_OPND_SOF
6108 || idesc
->operands
[1] == IA64_OPND_SOF
)
6110 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
6111 know (strcmp (idesc
->name
, "alloc") == 0);
6112 i
= (CURR_SLOT
.opnd
[1].X_op
== O_register
6113 && CURR_SLOT
.opnd
[1].X_add_number
== REG_AR
+ AR_PFS
) ? 2 : 1;
6114 if (num_operands
== i
+ 3 /* first_arg not included in this count! */
6115 && CURR_SLOT
.opnd
[i
].X_op
== O_constant
6116 && CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
6117 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
6118 && CURR_SLOT
.opnd
[i
+ 3].X_op
== O_constant
)
6120 sof
= set_regstack (CURR_SLOT
.opnd
[i
].X_add_number
,
6121 CURR_SLOT
.opnd
[i
+ 1].X_add_number
,
6122 CURR_SLOT
.opnd
[i
+ 2].X_add_number
,
6123 CURR_SLOT
.opnd
[i
+ 3].X_add_number
);
6125 /* now we can parse the first arg: */
6126 saved_input_pointer
= input_line_pointer
;
6127 input_line_pointer
= first_arg
;
6128 sep
= parse_operand (CURR_SLOT
.opnd
+ 0);
6130 --num_outputs
; /* force error */
6131 input_line_pointer
= saved_input_pointer
;
6133 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
6134 CURR_SLOT
.opnd
[i
+ 1].X_add_number
6135 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
6136 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
6140 highest_unmatched_operand
= -4;
6141 curr_out_of_range_pos
= -1;
6143 for (; idesc
; idesc
= get_next_opcode (idesc
))
6145 if (num_outputs
!= idesc
->num_outputs
)
6146 continue; /* mismatch in # of outputs */
6147 if (highest_unmatched_operand
< 0)
6148 highest_unmatched_operand
|= 1;
6149 if (num_operands
> NELEMS (idesc
->operands
)
6150 || (num_operands
< NELEMS (idesc
->operands
)
6151 && idesc
->operands
[num_operands
])
6152 || (num_operands
> 0 && !idesc
->operands
[num_operands
- 1]))
6153 continue; /* mismatch in number of arguments */
6154 if (highest_unmatched_operand
< 0)
6155 highest_unmatched_operand
|= 2;
6157 CURR_SLOT
.num_fixups
= 0;
6159 /* Try to match all operands. If we see an out-of-range operand,
6160 then continue trying to match the rest of the operands, since if
6161 the rest match, then this idesc will give the best error message. */
6163 out_of_range_pos
= -1;
6164 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
6166 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
6167 if (result
!= OPERAND_MATCH
)
6169 if (result
!= OPERAND_OUT_OF_RANGE
)
6171 if (out_of_range_pos
< 0)
6172 /* remember position of the first out-of-range operand: */
6173 out_of_range_pos
= i
;
6177 /* If we did not match all operands, or if at least one operand was
6178 out-of-range, then this idesc does not match. Keep track of which
6179 idesc matched the most operands before failing. If we have two
6180 idescs that failed at the same position, and one had an out-of-range
6181 operand, then prefer the out-of-range operand. Thus if we have
6182 "add r0=0x1000000,r1" we get an error saying the constant is out
6183 of range instead of an error saying that the constant should have been
6186 if (i
!= num_operands
|| out_of_range_pos
>= 0)
6188 if (i
> highest_unmatched_operand
6189 || (i
== highest_unmatched_operand
6190 && out_of_range_pos
> curr_out_of_range_pos
))
6192 highest_unmatched_operand
= i
;
6193 if (out_of_range_pos
>= 0)
6195 expected_operand
= idesc
->operands
[out_of_range_pos
];
6196 error_pos
= out_of_range_pos
;
6200 expected_operand
= idesc
->operands
[i
];
6203 curr_out_of_range_pos
= out_of_range_pos
;
6212 if (expected_operand
)
6213 as_bad ("Operand %u of `%s' should be %s",
6214 error_pos
+ 1, mnemonic
,
6215 elf64_ia64_operands
[expected_operand
].desc
);
6216 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 1))
6217 as_bad ("Wrong number of output operands");
6218 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 2))
6219 as_bad ("Wrong number of input operands");
6221 as_bad ("Operand mismatch");
6225 /* Check that the instruction doesn't use
6226 - r0, f0, or f1 as output operands
6227 - the same predicate twice as output operands
6228 - r0 as address of a base update load or store
6229 - the same GR as output and address of a base update load
6230 - two even- or two odd-numbered FRs as output operands of a floating
6231 point parallel load.
6232 At most two (conflicting) output (or output-like) operands can exist,
6233 (floating point parallel loads have three outputs, but the base register,
6234 if updated, cannot conflict with the actual outputs). */
6236 for (i
= 0; i
< num_operands
; ++i
)
6241 switch (idesc
->operands
[i
])
6246 if (i
< num_outputs
)
6248 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6251 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6253 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6258 if (i
< num_outputs
)
6261 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6263 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6270 if (i
< num_outputs
)
6272 if (CURR_SLOT
.opnd
[i
].X_add_number
>= REG_FR
6273 && CURR_SLOT
.opnd
[i
].X_add_number
<= REG_FR
+ 1)
6276 regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
6279 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6281 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6285 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
6287 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6290 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6292 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6303 as_warn ("Invalid use of `%c%d' as output operand", reg_class
, regno
);
6306 as_warn ("Invalid use of `r%d' as base update address operand", regno
);
6312 if (reg1
>= REG_GR
&& reg1
<= REG_GR
+ 127)
6317 else if (reg1
>= REG_P
&& reg1
<= REG_P
+ 63)
6322 else if (reg1
>= REG_FR
&& reg1
<= REG_FR
+ 127)
6330 as_warn ("Invalid duplicate use of `%c%d'", reg_class
, reg1
);
6332 else if (((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6333 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31)
6334 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6335 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127))
6336 && ! ((reg1
^ reg2
) & 1))
6337 as_warn ("Invalid simultaneous use of `f%d' and `f%d'",
6338 reg1
- REG_FR
, reg2
- REG_FR
);
6339 else if ((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6340 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127)
6341 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6342 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31))
6343 as_warn ("Dangerous simultaneous use of `f%d' and `f%d'",
6344 reg1
- REG_FR
, reg2
- REG_FR
);
6349 build_insn (slot
, insnp
)
6353 const struct ia64_operand
*odesc
, *o2desc
;
6354 struct ia64_opcode
*idesc
= slot
->idesc
;
6360 insn
= idesc
->opcode
| slot
->qp_regno
;
6362 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6364 if (slot
->opnd
[i
].X_op
== O_register
6365 || slot
->opnd
[i
].X_op
== O_constant
6366 || slot
->opnd
[i
].X_op
== O_index
)
6367 val
= slot
->opnd
[i
].X_add_number
;
6368 else if (slot
->opnd
[i
].X_op
== O_big
)
6370 /* This must be the value 0x10000000000000000. */
6371 assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6377 switch (idesc
->operands
[i
])
6379 case IA64_OPND_IMMU64
:
6380 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6381 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6382 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6383 | (((val
>> 63) & 0x1) << 36));
6386 case IA64_OPND_IMMU62
:
6387 val
&= 0x3fffffffffffffffULL
;
6388 if (val
!= slot
->opnd
[i
].X_add_number
)
6389 as_warn (_("Value truncated to 62 bits"));
6390 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6391 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6394 case IA64_OPND_TGT64
:
6396 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6397 insn
|= ((((val
>> 59) & 0x1) << 36)
6398 | (((val
>> 0) & 0xfffff) << 13));
6429 case IA64_OPND_R3_2
:
6430 case IA64_OPND_CPUID_R3
:
6431 case IA64_OPND_DBR_R3
:
6432 case IA64_OPND_DTR_R3
:
6433 case IA64_OPND_ITR_R3
:
6434 case IA64_OPND_IBR_R3
:
6436 case IA64_OPND_MSR_R3
:
6437 case IA64_OPND_PKR_R3
:
6438 case IA64_OPND_PMC_R3
:
6439 case IA64_OPND_PMD_R3
:
6440 case IA64_OPND_RR_R3
:
6448 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6449 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6451 as_bad_where (slot
->src_file
, slot
->src_line
,
6452 "Bad operand value: %s", err
);
6453 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6455 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6456 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6458 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6459 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6461 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6462 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6463 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6465 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6466 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6476 int manual_bundling_off
= 0, manual_bundling
= 0;
6477 enum ia64_unit required_unit
, insn_unit
= 0;
6478 enum ia64_insn_type type
[3], insn_type
;
6479 unsigned int template, orig_template
;
6480 bfd_vma insn
[3] = { -1, -1, -1 };
6481 struct ia64_opcode
*idesc
;
6482 int end_of_insn_group
= 0, user_template
= -1;
6483 int n
, i
, j
, first
, curr
;
6484 unw_rec_list
*ptr
, *last_ptr
, *end_ptr
;
6485 bfd_vma t0
= 0, t1
= 0;
6486 struct label_fix
*lfix
;
6487 struct insn_fix
*ifix
;
6493 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6494 know (first
>= 0 & first
< NUM_SLOTS
);
6495 n
= MIN (3, md
.num_slots_in_use
);
6497 /* Determine template: user user_template if specified, best match
6500 if (md
.slot
[first
].user_template
>= 0)
6501 user_template
= template = md
.slot
[first
].user_template
;
6504 /* Auto select appropriate template. */
6505 memset (type
, 0, sizeof (type
));
6507 for (i
= 0; i
< n
; ++i
)
6509 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6511 type
[i
] = md
.slot
[curr
].idesc
->type
;
6512 curr
= (curr
+ 1) % NUM_SLOTS
;
6514 template = best_template
[type
[0]][type
[1]][type
[2]];
6517 /* initialize instructions with appropriate nops: */
6518 for (i
= 0; i
< 3; ++i
)
6519 insn
[i
] = nop
[ia64_templ_desc
[template].exec_unit
[i
]];
6523 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6524 from the start of the frag. */
6525 addr_mod
= frag_now_fix () & 15;
6526 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6527 as_bad (_("instruction address is not a multiple of 16"));
6528 frag_now
->insn_addr
= addr_mod
;
6529 frag_now
->has_code
= 1;
6531 /* now fill in slots with as many insns as possible: */
6533 idesc
= md
.slot
[curr
].idesc
;
6534 end_of_insn_group
= 0;
6535 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6537 /* If we have unwind records, we may need to update some now. */
6538 ptr
= md
.slot
[curr
].unwind_record
;
6541 /* Find the last prologue/body record in the list for the current
6542 insn, and set the slot number for all records up to that point.
6543 This needs to be done now, because prologue/body records refer to
6544 the current point, not the point after the instruction has been
6545 issued. This matters because there may have been nops emitted
6546 meanwhile. Any non-prologue non-body record followed by a
6547 prologue/body record must also refer to the current point. */
6549 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6550 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6551 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6552 || ptr
->r
.type
== body
)
6556 /* Make last_ptr point one after the last prologue/body
6558 last_ptr
= last_ptr
->next
;
6559 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6562 ptr
->slot_number
= (unsigned long) f
+ i
;
6563 ptr
->slot_frag
= frag_now
;
6565 /* Remove the initialized records, so that we won't accidentally
6566 update them again if we insert a nop and continue. */
6567 md
.slot
[curr
].unwind_record
= last_ptr
;
6571 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6572 if (md
.slot
[curr
].manual_bundling_on
)
6575 manual_bundling
= 1;
6577 break; /* Need to start a new bundle. */
6580 /* If this instruction specifies a template, then it must be the first
6581 instruction of a bundle. */
6582 if (curr
!= first
&& md
.slot
[curr
].user_template
>= 0)
6585 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6587 if (manual_bundling
&& !manual_bundling_off
)
6589 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6590 "`%s' must be last in bundle", idesc
->name
);
6592 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6596 if (idesc
->flags
& IA64_OPCODE_LAST
)
6599 unsigned int required_template
;
6601 /* If we need a stop bit after an M slot, our only choice is
6602 template 5 (M;;MI). If we need a stop bit after a B
6603 slot, our only choice is to place it at the end of the
6604 bundle, because the only available templates are MIB,
6605 MBB, BBB, MMB, and MFB. We don't handle anything other
6606 than M and B slots because these are the only kind of
6607 instructions that can have the IA64_OPCODE_LAST bit set. */
6608 required_template
= template;
6609 switch (idesc
->type
)
6613 required_template
= 5;
6621 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6622 "Internal error: don't know how to force %s to end"
6623 "of instruction group", idesc
->name
);
6628 && (i
> required_slot
6629 || (required_slot
== 2 && !manual_bundling_off
)
6630 || (user_template
>= 0
6631 /* Changing from MMI to M;MI is OK. */
6632 && (template ^ required_template
) > 1)))
6634 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6635 "`%s' must be last in instruction group",
6637 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6638 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6640 if (required_slot
< i
)
6641 /* Can't fit this instruction. */
6645 if (required_template
!= template)
6647 /* If we switch the template, we need to reset the NOPs
6648 after slot i. The slot-types of the instructions ahead
6649 of i never change, so we don't need to worry about
6650 changing NOPs in front of this slot. */
6651 for (j
= i
; j
< 3; ++j
)
6652 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6654 template = required_template
;
6656 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6658 if (manual_bundling
)
6660 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6661 "Label must be first in a bundle");
6662 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6664 /* This insn must go into the first slot of a bundle. */
6668 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6670 /* We need an instruction group boundary in the middle of a
6671 bundle. See if we can switch to an other template with
6672 an appropriate boundary. */
6674 orig_template
= template;
6675 if (i
== 1 && (user_template
== 4
6676 || (user_template
< 0
6677 && (ia64_templ_desc
[template].exec_unit
[0]
6681 end_of_insn_group
= 0;
6683 else if (i
== 2 && (user_template
== 0
6684 || (user_template
< 0
6685 && (ia64_templ_desc
[template].exec_unit
[1]
6687 /* This test makes sure we don't switch the template if
6688 the next instruction is one that needs to be first in
6689 an instruction group. Since all those instructions are
6690 in the M group, there is no way such an instruction can
6691 fit in this bundle even if we switch the template. The
6692 reason we have to check for this is that otherwise we
6693 may end up generating "MI;;I M.." which has the deadly
6694 effect that the second M instruction is no longer the
6695 first in the group! --davidm 99/12/16 */
6696 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6699 end_of_insn_group
= 0;
6702 && user_template
== 0
6703 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6704 /* Use the next slot. */
6706 else if (curr
!= first
)
6707 /* can't fit this insn */
6710 if (template != orig_template
)
6711 /* if we switch the template, we need to reset the NOPs
6712 after slot i. The slot-types of the instructions ahead
6713 of i never change, so we don't need to worry about
6714 changing NOPs in front of this slot. */
6715 for (j
= i
; j
< 3; ++j
)
6716 insn
[j
] = nop
[ia64_templ_desc
[template].exec_unit
[j
]];
6718 required_unit
= ia64_templ_desc
[template].exec_unit
[i
];
6720 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6721 if (idesc
->type
== IA64_TYPE_DYN
)
6723 enum ia64_opnd opnd1
, opnd2
;
6725 if ((strcmp (idesc
->name
, "nop") == 0)
6726 || (strcmp (idesc
->name
, "break") == 0))
6727 insn_unit
= required_unit
;
6728 else if (strcmp (idesc
->name
, "hint") == 0)
6730 insn_unit
= required_unit
;
6731 if (required_unit
== IA64_UNIT_B
)
6737 case hint_b_warning
:
6738 as_warn ("hint in B unit may be treated as nop");
6741 /* When manual bundling is off and there is no
6742 user template, we choose a different unit so
6743 that hint won't go into the current slot. We
6744 will fill the current bundle with nops and
6745 try to put hint into the next bundle. */
6746 if (!manual_bundling
&& user_template
< 0)
6747 insn_unit
= IA64_UNIT_I
;
6749 as_bad ("hint in B unit can't be used");
6754 else if (strcmp (idesc
->name
, "chk.s") == 0
6755 || strcmp (idesc
->name
, "mov") == 0)
6757 insn_unit
= IA64_UNIT_M
;
6758 if (required_unit
== IA64_UNIT_I
6759 || (required_unit
== IA64_UNIT_F
&& template == 6))
6760 insn_unit
= IA64_UNIT_I
;
6763 as_fatal ("emit_one_bundle: unexpected dynamic op");
6765 sprintf (mnemonic
, "%s.%c", idesc
->name
, "?imbfxx"[insn_unit
]);
6766 opnd1
= idesc
->operands
[0];
6767 opnd2
= idesc
->operands
[1];
6768 ia64_free_opcode (idesc
);
6769 idesc
= ia64_find_opcode (mnemonic
);
6770 /* moves to/from ARs have collisions */
6771 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6773 while (idesc
!= NULL
6774 && (idesc
->operands
[0] != opnd1
6775 || idesc
->operands
[1] != opnd2
))
6776 idesc
= get_next_opcode (idesc
);
6778 md
.slot
[curr
].idesc
= idesc
;
6782 insn_type
= idesc
->type
;
6783 insn_unit
= IA64_UNIT_NIL
;
6787 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6788 insn_unit
= required_unit
;
6790 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6791 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6792 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6793 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6794 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6799 if (insn_unit
!= required_unit
)
6801 if (required_unit
== IA64_UNIT_L
6802 && insn_unit
== IA64_UNIT_I
6803 && !(idesc
->flags
& IA64_OPCODE_X_IN_MLX
))
6805 /* we got ourselves an MLX template but the current
6806 instruction isn't an X-unit, or an I-unit instruction
6807 that can go into the X slot of an MLX template. Duh. */
6808 if (md
.num_slots_in_use
>= NUM_SLOTS
)
6810 as_bad_where (md
.slot
[curr
].src_file
,
6811 md
.slot
[curr
].src_line
,
6812 "`%s' can't go in X slot of "
6813 "MLX template", idesc
->name
);
6814 /* drop this insn so we don't livelock: */
6815 --md
.num_slots_in_use
;
6819 continue; /* try next slot */
6822 if (debug_type
== DEBUG_DWARF2
|| md
.slot
[curr
].loc_directive_seen
)
6824 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6826 md
.slot
[curr
].loc_directive_seen
= 0;
6827 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6830 build_insn (md
.slot
+ curr
, insn
+ i
);
6832 ptr
= md
.slot
[curr
].unwind_record
;
6835 /* Set slot numbers for all remaining unwind records belonging to the
6836 current insn. There can not be any prologue/body unwind records
6838 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6839 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6841 ptr
->slot_number
= (unsigned long) f
+ i
;
6842 ptr
->slot_frag
= frag_now
;
6844 md
.slot
[curr
].unwind_record
= NULL
;
6847 if (required_unit
== IA64_UNIT_L
)
6850 /* skip one slot for long/X-unit instructions */
6853 --md
.num_slots_in_use
;
6855 /* now is a good time to fix up the labels for this insn: */
6856 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6858 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6859 symbol_set_frag (lfix
->sym
, frag_now
);
6861 /* and fix up the tags also. */
6862 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6864 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6865 symbol_set_frag (lfix
->sym
, frag_now
);
6868 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6870 ifix
= md
.slot
[curr
].fixup
+ j
;
6871 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
6872 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6873 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6874 fix
->fx_plt
= (fix
->fx_r_type
== BFD_RELOC_IA64_PLTOFF22
);
6875 fix
->fx_file
= md
.slot
[curr
].src_file
;
6876 fix
->fx_line
= md
.slot
[curr
].src_line
;
6879 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6882 ia64_free_opcode (md
.slot
[curr
].idesc
);
6883 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6884 md
.slot
[curr
].user_template
= -1;
6886 if (manual_bundling_off
)
6888 manual_bundling
= 0;
6891 curr
= (curr
+ 1) % NUM_SLOTS
;
6892 idesc
= md
.slot
[curr
].idesc
;
6894 if (manual_bundling
> 0)
6896 if (md
.num_slots_in_use
> 0)
6898 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6899 "`%s' does not fit into %s template",
6900 idesc
->name
, ia64_templ_desc
[template].name
);
6901 --md
.num_slots_in_use
;
6904 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6905 "Missing '}' at end of file");
6907 know (md
.num_slots_in_use
< NUM_SLOTS
);
6909 t0
= end_of_insn_group
| (template << 1) | (insn
[0] << 5) | (insn
[1] << 46);
6910 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
6912 number_to_chars_littleendian (f
+ 0, t0
, 8);
6913 number_to_chars_littleendian (f
+ 8, t1
, 8);
6917 unwind
.list
->next_slot_number
= (unsigned long) f
+ 16;
6918 unwind
.list
->next_slot_frag
= frag_now
;
6923 md_parse_option (c
, arg
)
6930 /* Switches from the Intel assembler. */
6932 if (strcmp (arg
, "ilp64") == 0
6933 || strcmp (arg
, "lp64") == 0
6934 || strcmp (arg
, "p64") == 0)
6936 md
.flags
|= EF_IA_64_ABI64
;
6938 else if (strcmp (arg
, "ilp32") == 0)
6940 md
.flags
&= ~EF_IA_64_ABI64
;
6942 else if (strcmp (arg
, "le") == 0)
6944 md
.flags
&= ~EF_IA_64_BE
;
6945 default_big_endian
= 0;
6947 else if (strcmp (arg
, "be") == 0)
6949 md
.flags
|= EF_IA_64_BE
;
6950 default_big_endian
= 1;
6952 else if (strncmp (arg
, "unwind-check=", 13) == 0)
6955 if (strcmp (arg
, "warning") == 0)
6956 md
.unwind_check
= unwind_check_warning
;
6957 else if (strcmp (arg
, "error") == 0)
6958 md
.unwind_check
= unwind_check_error
;
6962 else if (strncmp (arg
, "hint.b=", 7) == 0)
6965 if (strcmp (arg
, "ok") == 0)
6966 md
.hint_b
= hint_b_ok
;
6967 else if (strcmp (arg
, "warning") == 0)
6968 md
.hint_b
= hint_b_warning
;
6969 else if (strcmp (arg
, "error") == 0)
6970 md
.hint_b
= hint_b_error
;
6979 if (strcmp (arg
, "so") == 0)
6981 /* Suppress signon message. */
6983 else if (strcmp (arg
, "pi") == 0)
6985 /* Reject privileged instructions. FIXME */
6987 else if (strcmp (arg
, "us") == 0)
6989 /* Allow union of signed and unsigned range. FIXME */
6991 else if (strcmp (arg
, "close_fcalls") == 0)
6993 /* Do not resolve global function calls. */
7000 /* temp[="prefix"] Insert temporary labels into the object file
7001 symbol table prefixed by "prefix".
7002 Default prefix is ":temp:".
7007 /* indirect=<tgt> Assume unannotated indirect branches behavior
7008 according to <tgt> --
7009 exit: branch out from the current context (default)
7010 labels: all labels in context may be branch targets
7012 if (strncmp (arg
, "indirect=", 9) != 0)
7017 /* -X conflicts with an ignored option, use -x instead */
7019 if (!arg
|| strcmp (arg
, "explicit") == 0)
7021 /* set default mode to explicit */
7022 md
.default_explicit_mode
= 1;
7025 else if (strcmp (arg
, "auto") == 0)
7027 md
.default_explicit_mode
= 0;
7029 else if (strcmp (arg
, "none") == 0)
7033 else if (strcmp (arg
, "debug") == 0)
7037 else if (strcmp (arg
, "debugx") == 0)
7039 md
.default_explicit_mode
= 1;
7042 else if (strcmp (arg
, "debugn") == 0)
7049 as_bad (_("Unrecognized option '-x%s'"), arg
);
7054 /* nops Print nops statistics. */
7057 /* GNU specific switches for gcc. */
7058 case OPTION_MCONSTANT_GP
:
7059 md
.flags
|= EF_IA_64_CONS_GP
;
7062 case OPTION_MAUTO_PIC
:
7063 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
7074 md_show_usage (stream
)
7079 --mconstant-gp mark output file as using the constant-GP model\n\
7080 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7081 --mauto-pic mark output file as using the constant-GP model\n\
7082 without function descriptors (sets ELF header flag\n\
7083 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
7084 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7085 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
7086 -munwind-check=[warning|error]\n\
7087 unwind directive check (default -munwind-check=warning)\n\
7088 -mhint.b=[ok|warning|error]\n\
7089 hint.b check (default -mhint.b=error)\n\
7090 -x | -xexplicit turn on dependency violation checking\n\
7091 -xauto automagically remove dependency violations (default)\n\
7092 -xnone turn off dependency violation checking\n\
7093 -xdebug debug dependency violation checker\n\
7094 -xdebugn debug dependency violation checker but turn off\n\
7095 dependency violation checking\n\
7096 -xdebugx debug dependency violation checker and turn on\n\
7097 dependency violation checking\n"),
7102 ia64_after_parse_args ()
7104 if (debug_type
== DEBUG_STABS
)
7105 as_fatal (_("--gstabs is not supported for ia64"));
7108 /* Return true if TYPE fits in TEMPL at SLOT. */
7111 match (int templ
, int type
, int slot
)
7113 enum ia64_unit unit
;
7116 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
7119 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
7121 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
7123 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
7124 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
7125 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
7126 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
7127 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
7128 default: result
= 0; break;
7133 /* Add a bit of extra goodness if a nop of type F or B would fit
7134 in TEMPL at SLOT. */
7137 extra_goodness (int templ
, int slot
)
7139 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
7141 if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
7146 /* This function is called once, at assembler startup time. It sets
7147 up all the tables, etc. that the MD part of the assembler will need
7148 that can be determined before arguments are parsed. */
7152 int i
, j
, k
, t
, total
, ar_base
, cr_base
, goodness
, best
, regnum
, ok
;
7157 md
.explicit_mode
= md
.default_explicit_mode
;
7159 bfd_set_section_alignment (stdoutput
, text_section
, 4);
7161 /* Make sure function pointers get initialized. */
7162 target_big_endian
= -1;
7163 dot_byteorder (default_big_endian
);
7165 alias_hash
= hash_new ();
7166 alias_name_hash
= hash_new ();
7167 secalias_hash
= hash_new ();
7168 secalias_name_hash
= hash_new ();
7170 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
7171 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
7172 &zero_address_frag
);
7174 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
7175 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
7176 &zero_address_frag
);
7178 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
7179 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
7180 &zero_address_frag
);
7182 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
7183 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
7184 &zero_address_frag
);
7186 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
7187 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
7188 &zero_address_frag
);
7190 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
7191 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
7192 &zero_address_frag
);
7194 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
7195 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
7196 &zero_address_frag
);
7198 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
7199 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
7200 &zero_address_frag
);
7202 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
7203 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
7204 &zero_address_frag
);
7206 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
7207 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
7208 &zero_address_frag
);
7210 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
7211 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
7212 &zero_address_frag
);
7214 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
7215 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
7216 &zero_address_frag
);
7218 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
7219 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
7220 &zero_address_frag
);
7222 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
7223 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
7224 &zero_address_frag
);
7226 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
7227 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
7228 &zero_address_frag
);
7230 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
7231 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
7232 &zero_address_frag
);
7234 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
7235 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
7236 &zero_address_frag
);
7238 /* Compute the table of best templates. We compute goodness as a
7239 base 4 value, in which each match counts for 3, each F counts
7240 for 2, each B counts for 1. This should maximize the number of
7241 F and B nops in the chosen bundles, which is good because these
7242 pipelines are least likely to be overcommitted. */
7243 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7244 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7245 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7248 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
7251 if (match (t
, i
, 0))
7253 if (match (t
, j
, 1))
7255 if (match (t
, k
, 2))
7256 goodness
= 3 + 3 + 3;
7258 goodness
= 3 + 3 + extra_goodness (t
, 2);
7260 else if (match (t
, j
, 2))
7261 goodness
= 3 + 3 + extra_goodness (t
, 1);
7265 goodness
+= extra_goodness (t
, 1);
7266 goodness
+= extra_goodness (t
, 2);
7269 else if (match (t
, i
, 1))
7271 if (match (t
, j
, 2))
7274 goodness
= 3 + extra_goodness (t
, 2);
7276 else if (match (t
, i
, 2))
7277 goodness
= 3 + extra_goodness (t
, 1);
7279 if (goodness
> best
)
7282 best_template
[i
][j
][k
] = t
;
7287 for (i
= 0; i
< NUM_SLOTS
; ++i
)
7288 md
.slot
[i
].user_template
= -1;
7290 md
.pseudo_hash
= hash_new ();
7291 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
7293 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
7294 (void *) (pseudo_opcode
+ i
));
7296 as_fatal ("ia64.md_begin: can't hash `%s': %s",
7297 pseudo_opcode
[i
].name
, err
);
7300 md
.reg_hash
= hash_new ();
7301 md
.dynreg_hash
= hash_new ();
7302 md
.const_hash
= hash_new ();
7303 md
.entry_hash
= hash_new ();
7305 /* general registers: */
7308 for (i
= 0; i
< total
; ++i
)
7310 sprintf (name
, "r%d", i
- REG_GR
);
7311 md
.regsym
[i
] = declare_register (name
, i
);
7314 /* floating point registers: */
7316 for (; i
< total
; ++i
)
7318 sprintf (name
, "f%d", i
- REG_FR
);
7319 md
.regsym
[i
] = declare_register (name
, i
);
7322 /* application registers: */
7325 for (; i
< total
; ++i
)
7327 sprintf (name
, "ar%d", i
- REG_AR
);
7328 md
.regsym
[i
] = declare_register (name
, i
);
7331 /* control registers: */
7334 for (; i
< total
; ++i
)
7336 sprintf (name
, "cr%d", i
- REG_CR
);
7337 md
.regsym
[i
] = declare_register (name
, i
);
7340 /* predicate registers: */
7342 for (; i
< total
; ++i
)
7344 sprintf (name
, "p%d", i
- REG_P
);
7345 md
.regsym
[i
] = declare_register (name
, i
);
7348 /* branch registers: */
7350 for (; i
< total
; ++i
)
7352 sprintf (name
, "b%d", i
- REG_BR
);
7353 md
.regsym
[i
] = declare_register (name
, i
);
7356 md
.regsym
[REG_IP
] = declare_register ("ip", REG_IP
);
7357 md
.regsym
[REG_CFM
] = declare_register ("cfm", REG_CFM
);
7358 md
.regsym
[REG_PR
] = declare_register ("pr", REG_PR
);
7359 md
.regsym
[REG_PR_ROT
] = declare_register ("pr.rot", REG_PR_ROT
);
7360 md
.regsym
[REG_PSR
] = declare_register ("psr", REG_PSR
);
7361 md
.regsym
[REG_PSR_L
] = declare_register ("psr.l", REG_PSR_L
);
7362 md
.regsym
[REG_PSR_UM
] = declare_register ("psr.um", REG_PSR_UM
);
7364 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
7366 regnum
= indirect_reg
[i
].regnum
;
7367 md
.regsym
[regnum
] = declare_register (indirect_reg
[i
].name
, regnum
);
7370 /* define synonyms for application registers: */
7371 for (i
= REG_AR
; i
< REG_AR
+ NELEMS (ar
); ++i
)
7372 md
.regsym
[i
] = declare_register (ar
[i
- REG_AR
].name
,
7373 REG_AR
+ ar
[i
- REG_AR
].regnum
);
7375 /* define synonyms for control registers: */
7376 for (i
= REG_CR
; i
< REG_CR
+ NELEMS (cr
); ++i
)
7377 md
.regsym
[i
] = declare_register (cr
[i
- REG_CR
].name
,
7378 REG_CR
+ cr
[i
- REG_CR
].regnum
);
7380 declare_register ("gp", REG_GR
+ 1);
7381 declare_register ("sp", REG_GR
+ 12);
7382 declare_register ("rp", REG_BR
+ 0);
7384 /* pseudo-registers used to specify unwind info: */
7385 declare_register ("psp", REG_PSP
);
7387 declare_register_set ("ret", 4, REG_GR
+ 8);
7388 declare_register_set ("farg", 8, REG_FR
+ 8);
7389 declare_register_set ("fret", 8, REG_FR
+ 8);
7391 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7393 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
7394 (PTR
) (const_bits
+ i
));
7396 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7400 /* Set the architecture and machine depending on defaults and command line
7402 if (md
.flags
& EF_IA_64_ABI64
)
7403 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7405 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7408 as_warn (_("Could not set architecture and machine"));
7410 /* Set the pointer size and pointer shift size depending on md.flags */
7412 if (md
.flags
& EF_IA_64_ABI64
)
7414 md
.pointer_size
= 8; /* pointers are 8 bytes */
7415 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7419 md
.pointer_size
= 4; /* pointers are 4 bytes */
7420 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7423 md
.mem_offset
.hint
= 0;
7426 md
.entry_labels
= NULL
;
7429 /* Set the default options in md. Cannot do this in md_begin because
7430 that is called after md_parse_option which is where we set the
7431 options in md based on command line options. */
7434 ia64_init (argc
, argv
)
7435 int argc ATTRIBUTE_UNUSED
;
7436 char **argv ATTRIBUTE_UNUSED
;
7438 md
.flags
= MD_FLAGS_DEFAULT
;
7440 /* FIXME: We should change it to unwind_check_error someday. */
7441 md
.unwind_check
= unwind_check_warning
;
7442 md
.hint_b
= hint_b_error
;
7445 /* Return a string for the target object file format. */
7448 ia64_target_format ()
7450 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7452 if (md
.flags
& EF_IA_64_BE
)
7454 if (md
.flags
& EF_IA_64_ABI64
)
7455 #if defined(TE_AIX50)
7456 return "elf64-ia64-aix-big";
7457 #elif defined(TE_HPUX)
7458 return "elf64-ia64-hpux-big";
7460 return "elf64-ia64-big";
7463 #if defined(TE_AIX50)
7464 return "elf32-ia64-aix-big";
7465 #elif defined(TE_HPUX)
7466 return "elf32-ia64-hpux-big";
7468 return "elf32-ia64-big";
7473 if (md
.flags
& EF_IA_64_ABI64
)
7475 return "elf64-ia64-aix-little";
7477 return "elf64-ia64-little";
7481 return "elf32-ia64-aix-little";
7483 return "elf32-ia64-little";
7488 return "unknown-format";
7492 ia64_end_of_source ()
7494 /* terminate insn group upon reaching end of file: */
7495 insn_group_break (1, 0, 0);
7497 /* emits slots we haven't written yet: */
7498 ia64_flush_insns ();
7500 bfd_set_private_flags (stdoutput
, md
.flags
);
7502 md
.mem_offset
.hint
= 0;
7508 if (md
.qp
.X_op
== O_register
)
7509 as_bad ("qualifying predicate not followed by instruction");
7510 md
.qp
.X_op
= O_absent
;
7512 if (ignore_input ())
7515 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7517 if (md
.detect_dv
&& !md
.explicit_mode
)
7524 as_warn (_("Explicit stops are ignored in auto mode"));
7528 insn_group_break (1, 0, 0);
7532 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7534 static int defining_tag
= 0;
7537 ia64_unrecognized_line (ch
)
7543 expression (&md
.qp
);
7544 if (*input_line_pointer
++ != ')')
7546 as_bad ("Expected ')'");
7549 if (md
.qp
.X_op
!= O_register
)
7551 as_bad ("Qualifying predicate expected");
7554 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7556 as_bad ("Predicate register expected");
7562 if (md
.manual_bundling
)
7563 as_warn ("Found '{' when manual bundling is already turned on");
7565 CURR_SLOT
.manual_bundling_on
= 1;
7566 md
.manual_bundling
= 1;
7568 /* Bundling is only acceptable in explicit mode
7569 or when in default automatic mode. */
7570 if (md
.detect_dv
&& !md
.explicit_mode
)
7572 if (!md
.mode_explicitly_set
7573 && !md
.default_explicit_mode
)
7576 as_warn (_("Found '{' after explicit switch to automatic mode"));
7581 if (!md
.manual_bundling
)
7582 as_warn ("Found '}' when manual bundling is off");
7584 PREV_SLOT
.manual_bundling_off
= 1;
7585 md
.manual_bundling
= 0;
7587 /* switch back to automatic mode, if applicable */
7590 && !md
.mode_explicitly_set
7591 && !md
.default_explicit_mode
)
7594 /* Allow '{' to follow on the same line. We also allow ";;", but that
7595 happens automatically because ';' is an end of line marker. */
7597 if (input_line_pointer
[0] == '{')
7599 input_line_pointer
++;
7600 return ia64_unrecognized_line ('{');
7603 demand_empty_rest_of_line ();
7613 if (md
.qp
.X_op
== O_register
)
7615 as_bad ("Tag must come before qualifying predicate.");
7619 /* This implements just enough of read_a_source_file in read.c to
7620 recognize labels. */
7621 if (is_name_beginner (*input_line_pointer
))
7623 s
= input_line_pointer
;
7624 c
= get_symbol_end ();
7626 else if (LOCAL_LABELS_FB
7627 && ISDIGIT (*input_line_pointer
))
7630 while (ISDIGIT (*input_line_pointer
))
7631 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7632 fb_label_instance_inc (temp
);
7633 s
= fb_label_name (temp
, 0);
7634 c
= *input_line_pointer
;
7643 /* Put ':' back for error messages' sake. */
7644 *input_line_pointer
++ = ':';
7645 as_bad ("Expected ':'");
7652 /* Put ':' back for error messages' sake. */
7653 *input_line_pointer
++ = ':';
7654 if (*input_line_pointer
++ != ']')
7656 as_bad ("Expected ']'");
7661 as_bad ("Tag name expected");
7671 /* Not a valid line. */
7676 ia64_frob_label (sym
)
7679 struct label_fix
*fix
;
7681 /* Tags need special handling since they are not bundle breaks like
7685 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7687 fix
->next
= CURR_SLOT
.tag_fixups
;
7688 CURR_SLOT
.tag_fixups
= fix
;
7693 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7695 md
.last_text_seg
= now_seg
;
7696 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7698 fix
->next
= CURR_SLOT
.label_fixups
;
7699 CURR_SLOT
.label_fixups
= fix
;
7701 /* Keep track of how many code entry points we've seen. */
7702 if (md
.path
== md
.maxpaths
)
7705 md
.entry_labels
= (const char **)
7706 xrealloc ((void *) md
.entry_labels
,
7707 md
.maxpaths
* sizeof (char *));
7709 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7714 /* The HP-UX linker will give unresolved symbol errors for symbols
7715 that are declared but unused. This routine removes declared,
7716 unused symbols from an object. */
7718 ia64_frob_symbol (sym
)
7721 if ((S_GET_SEGMENT (sym
) == &bfd_und_section
&& ! symbol_used_p (sym
) &&
7722 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7723 || (S_GET_SEGMENT (sym
) == &bfd_abs_section
7724 && ! S_IS_EXTERNAL (sym
)))
7731 ia64_flush_pending_output ()
7733 if (!md
.keep_pending_output
7734 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7736 /* ??? This causes many unnecessary stop bits to be emitted.
7737 Unfortunately, it isn't clear if it is safe to remove this. */
7738 insn_group_break (1, 0, 0);
7739 ia64_flush_insns ();
7743 /* Do ia64-specific expression optimization. All that's done here is
7744 to transform index expressions that are either due to the indexing
7745 of rotating registers or due to the indexing of indirect register
7748 ia64_optimize_expr (l
, op
, r
)
7757 if (l
->X_op
== O_register
&& r
->X_op
== O_constant
)
7759 num_regs
= (l
->X_add_number
>> 16);
7760 if ((unsigned) r
->X_add_number
>= num_regs
)
7763 as_bad ("No current frame");
7765 as_bad ("Index out of range 0..%u", num_regs
- 1);
7766 r
->X_add_number
= 0;
7768 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7771 else if (l
->X_op
== O_register
&& r
->X_op
== O_register
)
7773 if (l
->X_add_number
< IND_CPUID
|| l
->X_add_number
> IND_RR
7774 || l
->X_add_number
== IND_MEM
)
7776 as_bad ("Indirect register set name expected");
7777 l
->X_add_number
= IND_CPUID
;
7780 l
->X_op_symbol
= md
.regsym
[l
->X_add_number
];
7781 l
->X_add_number
= r
->X_add_number
;
7789 ia64_parse_name (name
, e
, nextcharP
)
7794 struct const_desc
*cdesc
;
7795 struct dynreg
*dr
= 0;
7802 enum pseudo_type pseudo_type
= PSEUDO_FUNC_NONE
;
7804 /* Find what relocation pseudo-function we're dealing with. */
7805 for (idx
= 0; idx
< NELEMS (pseudo_func
); ++idx
)
7806 if (pseudo_func
[idx
].name
7807 && pseudo_func
[idx
].name
[0] == name
[1]
7808 && strcmp (pseudo_func
[idx
].name
+ 1, name
+ 2) == 0)
7810 pseudo_type
= pseudo_func
[idx
].type
;
7813 switch (pseudo_type
)
7815 case PSEUDO_FUNC_RELOC
:
7816 end
= input_line_pointer
;
7817 if (*nextcharP
!= '(')
7819 as_bad ("Expected '('");
7823 ++input_line_pointer
;
7825 if (*input_line_pointer
!= ')')
7827 as_bad ("Missing ')'");
7831 ++input_line_pointer
;
7832 if (e
->X_op
!= O_symbol
)
7834 if (e
->X_op
!= O_pseudo_fixup
)
7836 as_bad ("Not a symbolic expression");
7839 if (idx
!= FUNC_LT_RELATIVE
)
7841 as_bad ("Illegal combination of relocation functions");
7844 switch (S_GET_VALUE (e
->X_op_symbol
))
7846 case FUNC_FPTR_RELATIVE
:
7847 idx
= FUNC_LT_FPTR_RELATIVE
; break;
7848 case FUNC_DTP_MODULE
:
7849 idx
= FUNC_LT_DTP_MODULE
; break;
7850 case FUNC_DTP_RELATIVE
:
7851 idx
= FUNC_LT_DTP_RELATIVE
; break;
7852 case FUNC_TP_RELATIVE
:
7853 idx
= FUNC_LT_TP_RELATIVE
; break;
7855 as_bad ("Illegal combination of relocation functions");
7859 /* Make sure gas doesn't get rid of local symbols that are used
7861 e
->X_op
= O_pseudo_fixup
;
7862 e
->X_op_symbol
= pseudo_func
[idx
].u
.sym
;
7864 *nextcharP
= *input_line_pointer
;
7867 case PSEUDO_FUNC_CONST
:
7868 e
->X_op
= O_constant
;
7869 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7872 case PSEUDO_FUNC_REG
:
7873 e
->X_op
= O_register
;
7874 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7883 /* first see if NAME is a known register name: */
7884 sym
= hash_find (md
.reg_hash
, name
);
7887 e
->X_op
= O_register
;
7888 e
->X_add_number
= S_GET_VALUE (sym
);
7892 cdesc
= hash_find (md
.const_hash
, name
);
7895 e
->X_op
= O_constant
;
7896 e
->X_add_number
= cdesc
->value
;
7900 /* check for inN, locN, or outN: */
7905 if (name
[1] == 'n' && ISDIGIT (name
[2]))
7913 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
7921 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
7932 /* Ignore register numbers with leading zeroes, except zero itself. */
7933 if (dr
&& (name
[idx
] != '0' || name
[idx
+ 1] == '\0'))
7935 unsigned long regnum
;
7937 /* The name is inN, locN, or outN; parse the register number. */
7938 regnum
= strtoul (name
+ idx
, &end
, 10);
7939 if (end
> name
+ idx
&& *end
== '\0' && regnum
< 96)
7941 if (regnum
>= dr
->num_regs
)
7944 as_bad ("No current frame");
7946 as_bad ("Register number out of range 0..%u",
7950 e
->X_op
= O_register
;
7951 e
->X_add_number
= dr
->base
+ regnum
;
7956 end
= alloca (strlen (name
) + 1);
7958 name
= ia64_canonicalize_symbol_name (end
);
7959 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
7961 /* We've got ourselves the name of a rotating register set.
7962 Store the base register number in the low 16 bits of
7963 X_add_number and the size of the register set in the top 16
7965 e
->X_op
= O_register
;
7966 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
7972 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7975 ia64_canonicalize_symbol_name (name
)
7978 size_t len
= strlen (name
), full
= len
;
7980 while (len
> 0 && name
[len
- 1] == '#')
7985 as_bad ("Standalone `#' is illegal");
7987 as_bad ("Zero-length symbol is illegal");
7989 else if (len
< full
- 1)
7990 as_warn ("Redundant `#' suffix operators");
7995 /* Return true if idesc is a conditional branch instruction. This excludes
7996 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7997 because they always read/write resources regardless of the value of the
7998 qualifying predicate. br.ia must always use p0, and hence is always
7999 taken. Thus this function returns true for branches which can fall
8000 through, and which use no resources if they do fall through. */
8003 is_conditional_branch (idesc
)
8004 struct ia64_opcode
*idesc
;
8006 /* br is a conditional branch. Everything that starts with br. except
8007 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8008 Everything that starts with brl is a conditional branch. */
8009 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
8010 && (idesc
->name
[2] == '\0'
8011 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
8012 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
8013 || idesc
->name
[2] == 'l'
8014 /* br.cond, br.call, br.clr */
8015 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
8016 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
8017 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
8020 /* Return whether the given opcode is a taken branch. If there's any doubt,
8024 is_taken_branch (idesc
)
8025 struct ia64_opcode
*idesc
;
8027 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
8028 || strncmp (idesc
->name
, "br.ia", 5) == 0);
8031 /* Return whether the given opcode is an interruption or rfi. If there's any
8032 doubt, returns zero. */
8035 is_interruption_or_rfi (idesc
)
8036 struct ia64_opcode
*idesc
;
8038 if (strcmp (idesc
->name
, "rfi") == 0)
8043 /* Returns the index of the given dependency in the opcode's list of chks, or
8044 -1 if there is no dependency. */
8047 depends_on (depind
, idesc
)
8049 struct ia64_opcode
*idesc
;
8052 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
8053 for (i
= 0; i
< dep
->nchks
; i
++)
8055 if (depind
== DEP (dep
->chks
[i
]))
8061 /* Determine a set of specific resources used for a particular resource
8062 class. Returns the number of specific resources identified For those
8063 cases which are not determinable statically, the resource returned is
8066 Meanings of value in 'NOTE':
8067 1) only read/write when the register number is explicitly encoded in the
8069 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8070 accesses CFM when qualifying predicate is in the rotating region.
8071 3) general register value is used to specify an indirect register; not
8072 determinable statically.
8073 4) only read the given resource when bits 7:0 of the indirect index
8074 register value does not match the register number of the resource; not
8075 determinable statically.
8076 5) all rules are implementation specific.
8077 6) only when both the index specified by the reader and the index specified
8078 by the writer have the same value in bits 63:61; not determinable
8080 7) only access the specified resource when the corresponding mask bit is
8082 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8083 only read when these insns reference FR2-31
8084 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8085 written when these insns write FR32-127
8086 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8088 11) The target predicates are written independently of PR[qp], but source
8089 registers are only read if PR[qp] is true. Since the state of PR[qp]
8090 cannot statically be determined, all source registers are marked used.
8091 12) This insn only reads the specified predicate register when that
8092 register is the PR[qp].
8093 13) This reference to ld-c only applies to teh GR whose value is loaded
8094 with data returned from memory, not the post-incremented address register.
8095 14) The RSE resource includes the implementation-specific RSE internal
8096 state resources. At least one (and possibly more) of these resources are
8097 read by each instruction listed in IC:rse-readers. At least one (and
8098 possibly more) of these resources are written by each insn listed in
8100 15+16) Represents reserved instructions, which the assembler does not
8103 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8104 this code; there are no dependency violations based on memory access.
8107 #define MAX_SPECS 256
8112 specify_resource (dep
, idesc
, type
, specs
, note
, path
)
8113 const struct ia64_dependency
*dep
;
8114 struct ia64_opcode
*idesc
;
8115 int type
; /* is this a DV chk or a DV reg? */
8116 struct rsrc specs
[MAX_SPECS
]; /* returned specific resources */
8117 int note
; /* resource note for this insn's usage */
8118 int path
; /* which execution path to examine */
8125 if (dep
->mode
== IA64_DV_WAW
8126 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
8127 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
8130 /* template for any resources we identify */
8131 tmpl
.dependency
= dep
;
8133 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
8134 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
8135 tmpl
.link_to_qp_branch
= 1;
8136 tmpl
.mem_offset
.hint
= 0;
8139 tmpl
.cmp_type
= CMP_NONE
;
8142 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8143 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8144 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8146 /* we don't need to track these */
8147 if (dep
->semantics
== IA64_DVS_NONE
)
8150 switch (dep
->specifier
)
8155 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8157 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8158 if (regno
>= 0 && regno
<= 7)
8160 specs
[count
] = tmpl
;
8161 specs
[count
++].index
= regno
;
8167 for (i
= 0; i
< 8; i
++)
8169 specs
[count
] = tmpl
;
8170 specs
[count
++].index
= i
;
8179 case IA64_RS_AR_UNAT
:
8180 /* This is a mov =AR or mov AR= instruction. */
8181 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8183 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8184 if (regno
== AR_UNAT
)
8186 specs
[count
++] = tmpl
;
8191 /* This is a spill/fill, or other instruction that modifies the
8194 /* Unless we can determine the specific bits used, mark the whole
8195 thing; bits 8:3 of the memory address indicate the bit used in
8196 UNAT. The .mem.offset hint may be used to eliminate a small
8197 subset of conflicts. */
8198 specs
[count
] = tmpl
;
8199 if (md
.mem_offset
.hint
)
8202 fprintf (stderr
, " Using hint for spill/fill\n");
8203 /* The index isn't actually used, just set it to something
8204 approximating the bit index. */
8205 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
8206 specs
[count
].mem_offset
.hint
= 1;
8207 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
8208 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
8212 specs
[count
++].specific
= 0;
8220 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8222 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8223 if ((regno
>= 8 && regno
<= 15)
8224 || (regno
>= 20 && regno
<= 23)
8225 || (regno
>= 31 && regno
<= 39)
8226 || (regno
>= 41 && regno
<= 47)
8227 || (regno
>= 67 && regno
<= 111))
8229 specs
[count
] = tmpl
;
8230 specs
[count
++].index
= regno
;
8243 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8245 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8246 if ((regno
>= 48 && regno
<= 63)
8247 || (regno
>= 112 && regno
<= 127))
8249 specs
[count
] = tmpl
;
8250 specs
[count
++].index
= regno
;
8256 for (i
= 48; i
< 64; i
++)
8258 specs
[count
] = tmpl
;
8259 specs
[count
++].index
= i
;
8261 for (i
= 112; i
< 128; i
++)
8263 specs
[count
] = tmpl
;
8264 specs
[count
++].index
= i
;
8282 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8283 if (idesc
->operands
[i
] == IA64_OPND_B1
8284 || idesc
->operands
[i
] == IA64_OPND_B2
)
8286 specs
[count
] = tmpl
;
8287 specs
[count
++].index
=
8288 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8293 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8294 if (idesc
->operands
[i
] == IA64_OPND_B1
8295 || idesc
->operands
[i
] == IA64_OPND_B2
)
8297 specs
[count
] = tmpl
;
8298 specs
[count
++].index
=
8299 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8305 case IA64_RS_CPUID
: /* four or more registers */
8308 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
8310 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8311 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8314 specs
[count
] = tmpl
;
8315 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8319 specs
[count
] = tmpl
;
8320 specs
[count
++].specific
= 0;
8330 case IA64_RS_DBR
: /* four or more registers */
8333 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
8335 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8336 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8339 specs
[count
] = tmpl
;
8340 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8344 specs
[count
] = tmpl
;
8345 specs
[count
++].specific
= 0;
8349 else if (note
== 0 && !rsrc_write
)
8351 specs
[count
] = tmpl
;
8352 specs
[count
++].specific
= 0;
8360 case IA64_RS_IBR
: /* four or more registers */
8363 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
8365 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8366 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8369 specs
[count
] = tmpl
;
8370 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8374 specs
[count
] = tmpl
;
8375 specs
[count
++].specific
= 0;
8388 /* These are implementation specific. Force all references to
8389 conflict with all other references. */
8390 specs
[count
] = tmpl
;
8391 specs
[count
++].specific
= 0;
8399 case IA64_RS_PKR
: /* 16 or more registers */
8400 if (note
== 3 || note
== 4)
8402 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
8404 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8405 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8410 specs
[count
] = tmpl
;
8411 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8414 for (i
= 0; i
< NELEMS (gr_values
); i
++)
8416 /* Uses all registers *except* the one in R3. */
8417 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
8419 specs
[count
] = tmpl
;
8420 specs
[count
++].index
= i
;
8426 specs
[count
] = tmpl
;
8427 specs
[count
++].specific
= 0;
8434 specs
[count
] = tmpl
;
8435 specs
[count
++].specific
= 0;
8439 case IA64_RS_PMC
: /* four or more registers */
8442 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
8443 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
8446 int index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
8448 int regno
= CURR_SLOT
.opnd
[index
].X_add_number
- REG_GR
;
8449 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8452 specs
[count
] = tmpl
;
8453 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8457 specs
[count
] = tmpl
;
8458 specs
[count
++].specific
= 0;
8468 case IA64_RS_PMD
: /* four or more registers */
8471 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
8473 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8474 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8477 specs
[count
] = tmpl
;
8478 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8482 specs
[count
] = tmpl
;
8483 specs
[count
++].specific
= 0;
8493 case IA64_RS_RR
: /* eight registers */
8496 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8498 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8499 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8502 specs
[count
] = tmpl
;
8503 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8507 specs
[count
] = tmpl
;
8508 specs
[count
++].specific
= 0;
8512 else if (note
== 0 && !rsrc_write
)
8514 specs
[count
] = tmpl
;
8515 specs
[count
++].specific
= 0;
8523 case IA64_RS_CR_IRR
:
8526 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8527 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8529 && idesc
->operands
[1] == IA64_OPND_CR3
8532 for (i
= 0; i
< 4; i
++)
8534 specs
[count
] = tmpl
;
8535 specs
[count
++].index
= CR_IRR0
+ i
;
8541 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8542 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8544 && regno
<= CR_IRR3
)
8546 specs
[count
] = tmpl
;
8547 specs
[count
++].index
= regno
;
8556 case IA64_RS_CR_LRR
:
8563 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8564 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8565 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8567 specs
[count
] = tmpl
;
8568 specs
[count
++].index
= regno
;
8576 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8578 specs
[count
] = tmpl
;
8579 specs
[count
++].index
=
8580 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8595 else if (rsrc_write
)
8597 if (dep
->specifier
== IA64_RS_FRb
8598 && idesc
->operands
[0] == IA64_OPND_F1
)
8600 specs
[count
] = tmpl
;
8601 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8606 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8608 if (idesc
->operands
[i
] == IA64_OPND_F2
8609 || idesc
->operands
[i
] == IA64_OPND_F3
8610 || idesc
->operands
[i
] == IA64_OPND_F4
)
8612 specs
[count
] = tmpl
;
8613 specs
[count
++].index
=
8614 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8623 /* This reference applies only to the GR whose value is loaded with
8624 data returned from memory. */
8625 specs
[count
] = tmpl
;
8626 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8632 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8633 if (idesc
->operands
[i
] == IA64_OPND_R1
8634 || idesc
->operands
[i
] == IA64_OPND_R2
8635 || idesc
->operands
[i
] == IA64_OPND_R3
)
8637 specs
[count
] = tmpl
;
8638 specs
[count
++].index
=
8639 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8641 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8642 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8643 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8645 specs
[count
] = tmpl
;
8646 specs
[count
++].index
=
8647 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8652 /* Look for anything that reads a GR. */
8653 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8655 if (idesc
->operands
[i
] == IA64_OPND_MR3
8656 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8657 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8658 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8659 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8660 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8661 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8662 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8663 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8664 || ((i
>= idesc
->num_outputs
)
8665 && (idesc
->operands
[i
] == IA64_OPND_R1
8666 || idesc
->operands
[i
] == IA64_OPND_R2
8667 || idesc
->operands
[i
] == IA64_OPND_R3
8668 /* addl source register. */
8669 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8671 specs
[count
] = tmpl
;
8672 specs
[count
++].index
=
8673 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8684 /* This is the same as IA64_RS_PRr, except that the register range is
8685 from 1 - 15, and there are no rotating register reads/writes here. */
8689 for (i
= 1; i
< 16; i
++)
8691 specs
[count
] = tmpl
;
8692 specs
[count
++].index
= i
;
8698 /* Mark only those registers indicated by the mask. */
8701 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8702 for (i
= 1; i
< 16; i
++)
8703 if (mask
& ((valueT
) 1 << i
))
8705 specs
[count
] = tmpl
;
8706 specs
[count
++].index
= i
;
8714 else if (note
== 11) /* note 11 implies note 1 as well */
8718 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8720 if (idesc
->operands
[i
] == IA64_OPND_P1
8721 || idesc
->operands
[i
] == IA64_OPND_P2
)
8723 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8724 if (regno
>= 1 && regno
< 16)
8726 specs
[count
] = tmpl
;
8727 specs
[count
++].index
= regno
;
8737 else if (note
== 12)
8739 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8741 specs
[count
] = tmpl
;
8742 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8749 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8750 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8751 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8752 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8754 if ((idesc
->operands
[0] == IA64_OPND_P1
8755 || idesc
->operands
[0] == IA64_OPND_P2
)
8756 && p1
>= 1 && p1
< 16)
8758 specs
[count
] = tmpl
;
8759 specs
[count
].cmp_type
=
8760 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8761 specs
[count
++].index
= p1
;
8763 if ((idesc
->operands
[1] == IA64_OPND_P1
8764 || idesc
->operands
[1] == IA64_OPND_P2
)
8765 && p2
>= 1 && p2
< 16)
8767 specs
[count
] = tmpl
;
8768 specs
[count
].cmp_type
=
8769 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8770 specs
[count
++].index
= p2
;
8775 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8777 specs
[count
] = tmpl
;
8778 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8780 if (idesc
->operands
[1] == IA64_OPND_PR
)
8782 for (i
= 1; i
< 16; i
++)
8784 specs
[count
] = tmpl
;
8785 specs
[count
++].index
= i
;
8796 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8797 simplified cases of this. */
8801 for (i
= 16; i
< 63; i
++)
8803 specs
[count
] = tmpl
;
8804 specs
[count
++].index
= i
;
8810 /* Mark only those registers indicated by the mask. */
8812 && idesc
->operands
[0] == IA64_OPND_PR
)
8814 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8815 if (mask
& ((valueT
) 1 << 16))
8816 for (i
= 16; i
< 63; i
++)
8818 specs
[count
] = tmpl
;
8819 specs
[count
++].index
= i
;
8823 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
8825 for (i
= 16; i
< 63; i
++)
8827 specs
[count
] = tmpl
;
8828 specs
[count
++].index
= i
;
8836 else if (note
== 11) /* note 11 implies note 1 as well */
8840 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8842 if (idesc
->operands
[i
] == IA64_OPND_P1
8843 || idesc
->operands
[i
] == IA64_OPND_P2
)
8845 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8846 if (regno
>= 16 && regno
< 63)
8848 specs
[count
] = tmpl
;
8849 specs
[count
++].index
= regno
;
8859 else if (note
== 12)
8861 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8863 specs
[count
] = tmpl
;
8864 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8871 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8872 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8873 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8874 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8876 if ((idesc
->operands
[0] == IA64_OPND_P1
8877 || idesc
->operands
[0] == IA64_OPND_P2
)
8878 && p1
>= 16 && p1
< 63)
8880 specs
[count
] = tmpl
;
8881 specs
[count
].cmp_type
=
8882 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8883 specs
[count
++].index
= p1
;
8885 if ((idesc
->operands
[1] == IA64_OPND_P1
8886 || idesc
->operands
[1] == IA64_OPND_P2
)
8887 && p2
>= 16 && p2
< 63)
8889 specs
[count
] = tmpl
;
8890 specs
[count
].cmp_type
=
8891 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8892 specs
[count
++].index
= p2
;
8897 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8899 specs
[count
] = tmpl
;
8900 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8902 if (idesc
->operands
[1] == IA64_OPND_PR
)
8904 for (i
= 16; i
< 63; i
++)
8906 specs
[count
] = tmpl
;
8907 specs
[count
++].index
= i
;
8919 /* Verify that the instruction is using the PSR bit indicated in
8923 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
8925 if (dep
->regindex
< 6)
8927 specs
[count
++] = tmpl
;
8930 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
8932 if (dep
->regindex
< 32
8933 || dep
->regindex
== 35
8934 || dep
->regindex
== 36
8935 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
8937 specs
[count
++] = tmpl
;
8940 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
8942 if (dep
->regindex
< 32
8943 || dep
->regindex
== 35
8944 || dep
->regindex
== 36
8945 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
8947 specs
[count
++] = tmpl
;
8952 /* Several PSR bits have very specific dependencies. */
8953 switch (dep
->regindex
)
8956 specs
[count
++] = tmpl
;
8961 specs
[count
++] = tmpl
;
8965 /* Only certain CR accesses use PSR.ic */
8966 if (idesc
->operands
[0] == IA64_OPND_CR3
8967 || idesc
->operands
[1] == IA64_OPND_CR3
)
8970 ((idesc
->operands
[0] == IA64_OPND_CR3
)
8973 CURR_SLOT
.opnd
[index
].X_add_number
- REG_CR
;
8988 specs
[count
++] = tmpl
;
8997 specs
[count
++] = tmpl
;
9001 /* Only some AR accesses use cpl */
9002 if (idesc
->operands
[0] == IA64_OPND_AR3
9003 || idesc
->operands
[1] == IA64_OPND_AR3
)
9006 ((idesc
->operands
[0] == IA64_OPND_AR3
)
9009 CURR_SLOT
.opnd
[index
].X_add_number
- REG_AR
;
9016 && regno
<= AR_K7
))))
9018 specs
[count
++] = tmpl
;
9023 specs
[count
++] = tmpl
;
9033 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
9035 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
9041 if (mask
& ((valueT
) 1 << dep
->regindex
))
9043 specs
[count
++] = tmpl
;
9048 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
9049 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
9050 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9051 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9053 if (idesc
->operands
[i
] == IA64_OPND_F1
9054 || idesc
->operands
[i
] == IA64_OPND_F2
9055 || idesc
->operands
[i
] == IA64_OPND_F3
9056 || idesc
->operands
[i
] == IA64_OPND_F4
)
9058 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9059 if (reg
>= min
&& reg
<= max
)
9061 specs
[count
++] = tmpl
;
9068 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
9069 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
9070 /* mfh is read on writes to FR32-127; mfl is read on writes to
9072 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9074 if (idesc
->operands
[i
] == IA64_OPND_F1
)
9076 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9077 if (reg
>= min
&& reg
<= max
)
9079 specs
[count
++] = tmpl
;
9084 else if (note
== 10)
9086 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9088 if (idesc
->operands
[i
] == IA64_OPND_R1
9089 || idesc
->operands
[i
] == IA64_OPND_R2
9090 || idesc
->operands
[i
] == IA64_OPND_R3
)
9092 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9093 if (regno
>= 16 && regno
<= 31)
9095 specs
[count
++] = tmpl
;
9106 case IA64_RS_AR_FPSR
:
9107 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
9109 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9110 if (regno
== AR_FPSR
)
9112 specs
[count
++] = tmpl
;
9117 specs
[count
++] = tmpl
;
9122 /* Handle all AR[REG] resources */
9123 if (note
== 0 || note
== 1)
9125 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9126 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
9127 && regno
== dep
->regindex
)
9129 specs
[count
++] = tmpl
;
9131 /* other AR[REG] resources may be affected by AR accesses */
9132 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
9135 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
9136 switch (dep
->regindex
)
9142 if (regno
== AR_BSPSTORE
)
9144 specs
[count
++] = tmpl
;
9148 (regno
== AR_BSPSTORE
9149 || regno
== AR_RNAT
))
9151 specs
[count
++] = tmpl
;
9156 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9159 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
9160 switch (dep
->regindex
)
9165 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
9167 specs
[count
++] = tmpl
;
9174 specs
[count
++] = tmpl
;
9184 /* Handle all CR[REG] resources */
9185 if (note
== 0 || note
== 1)
9187 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
9189 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
9190 if (regno
== dep
->regindex
)
9192 specs
[count
++] = tmpl
;
9194 else if (!rsrc_write
)
9196 /* Reads from CR[IVR] affect other resources. */
9197 if (regno
== CR_IVR
)
9199 if ((dep
->regindex
>= CR_IRR0
9200 && dep
->regindex
<= CR_IRR3
)
9201 || dep
->regindex
== CR_TPR
)
9203 specs
[count
++] = tmpl
;
9210 specs
[count
++] = tmpl
;
9219 case IA64_RS_INSERVICE
:
9220 /* look for write of EOI (67) or read of IVR (65) */
9221 if ((idesc
->operands
[0] == IA64_OPND_CR3
9222 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
9223 || (idesc
->operands
[1] == IA64_OPND_CR3
9224 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
9226 specs
[count
++] = tmpl
;
9233 specs
[count
++] = tmpl
;
9244 specs
[count
++] = tmpl
;
9248 /* Check if any of the registers accessed are in the rotating region.
9249 mov to/from pr accesses CFM only when qp_regno is in the rotating
9251 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9253 if (idesc
->operands
[i
] == IA64_OPND_R1
9254 || idesc
->operands
[i
] == IA64_OPND_R2
9255 || idesc
->operands
[i
] == IA64_OPND_R3
)
9257 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9258 /* Assumes that md.rot.num_regs is always valid */
9259 if (md
.rot
.num_regs
> 0
9261 && num
< 31 + md
.rot
.num_regs
)
9263 specs
[count
] = tmpl
;
9264 specs
[count
++].specific
= 0;
9267 else if (idesc
->operands
[i
] == IA64_OPND_F1
9268 || idesc
->operands
[i
] == IA64_OPND_F2
9269 || idesc
->operands
[i
] == IA64_OPND_F3
9270 || idesc
->operands
[i
] == IA64_OPND_F4
)
9272 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9275 specs
[count
] = tmpl
;
9276 specs
[count
++].specific
= 0;
9279 else if (idesc
->operands
[i
] == IA64_OPND_P1
9280 || idesc
->operands
[i
] == IA64_OPND_P2
)
9282 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9285 specs
[count
] = tmpl
;
9286 specs
[count
++].specific
= 0;
9290 if (CURR_SLOT
.qp_regno
> 15)
9292 specs
[count
] = tmpl
;
9293 specs
[count
++].specific
= 0;
9298 /* This is the same as IA64_RS_PRr, except simplified to account for
9299 the fact that there is only one register. */
9303 specs
[count
++] = tmpl
;
9308 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
9309 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9310 if (mask
& ((valueT
) 1 << 63))
9311 specs
[count
++] = tmpl
;
9313 else if (note
== 11)
9315 if ((idesc
->operands
[0] == IA64_OPND_P1
9316 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
9317 || (idesc
->operands
[1] == IA64_OPND_P2
9318 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
9320 specs
[count
++] = tmpl
;
9323 else if (note
== 12)
9325 if (CURR_SLOT
.qp_regno
== 63)
9327 specs
[count
++] = tmpl
;
9334 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9335 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9336 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9337 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9340 && (idesc
->operands
[0] == IA64_OPND_P1
9341 || idesc
->operands
[0] == IA64_OPND_P2
))
9343 specs
[count
] = tmpl
;
9344 specs
[count
++].cmp_type
=
9345 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9348 && (idesc
->operands
[1] == IA64_OPND_P1
9349 || idesc
->operands
[1] == IA64_OPND_P2
))
9351 specs
[count
] = tmpl
;
9352 specs
[count
++].cmp_type
=
9353 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9358 if (CURR_SLOT
.qp_regno
== 63)
9360 specs
[count
++] = tmpl
;
9371 /* FIXME we can identify some individual RSE written resources, but RSE
9372 read resources have not yet been completely identified, so for now
9373 treat RSE as a single resource */
9374 if (strncmp (idesc
->name
, "mov", 3) == 0)
9378 if (idesc
->operands
[0] == IA64_OPND_AR3
9379 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
9381 specs
[count
++] = tmpl
;
9386 if (idesc
->operands
[0] == IA64_OPND_AR3
)
9388 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
9389 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
9391 specs
[count
++] = tmpl
;
9394 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9396 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
9397 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
9398 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
9400 specs
[count
++] = tmpl
;
9407 specs
[count
++] = tmpl
;
9412 /* FIXME -- do any of these need to be non-specific? */
9413 specs
[count
++] = tmpl
;
9417 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
9424 /* Clear branch flags on marked resources. This breaks the link between the
9425 QP of the marking instruction and a subsequent branch on the same QP. */
9428 clear_qp_branch_flag (mask
)
9432 for (i
= 0; i
< regdepslen
; i
++)
9434 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
9435 if ((bit
& mask
) != 0)
9437 regdeps
[i
].link_to_qp_branch
= 0;
9442 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9443 any mutexes which contain one of the PRs and create new ones when
9447 update_qp_mutex (valueT mask
)
9453 while (i
< qp_mutexeslen
)
9455 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9457 /* If it destroys and creates the same mutex, do nothing. */
9458 if (qp_mutexes
[i
].prmask
== mask
9459 && qp_mutexes
[i
].path
== md
.path
)
9470 fprintf (stderr
, " Clearing mutex relation");
9471 print_prmask (qp_mutexes
[i
].prmask
);
9472 fprintf (stderr
, "\n");
9475 /* Deal with the old mutex with more than 3+ PRs only if
9476 the new mutex on the same execution path with it.
9478 FIXME: The 3+ mutex support is incomplete.
9479 dot_pred_rel () may be a better place to fix it. */
9480 if (qp_mutexes
[i
].path
== md
.path
)
9482 /* If it is a proper subset of the mutex, create a
9485 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9488 qp_mutexes
[i
].prmask
&= ~mask
;
9489 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9491 /* Modify the mutex if there are more than one
9499 /* Remove the mutex. */
9500 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9508 add_qp_mutex (mask
);
9513 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9515 Any changes to a PR clears the mutex relations which include that PR. */
9518 clear_qp_mutex (mask
)
9524 while (i
< qp_mutexeslen
)
9526 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9530 fprintf (stderr
, " Clearing mutex relation");
9531 print_prmask (qp_mutexes
[i
].prmask
);
9532 fprintf (stderr
, "\n");
9534 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9541 /* Clear implies relations which contain PRs in the given masks.
9542 P1_MASK indicates the source of the implies relation, while P2_MASK
9543 indicates the implied PR. */
9546 clear_qp_implies (p1_mask
, p2_mask
)
9553 while (i
< qp_implieslen
)
9555 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9556 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9559 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9560 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9561 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9568 /* Add the PRs specified to the list of implied relations. */
9571 add_qp_imply (p1
, p2
)
9578 /* p0 is not meaningful here. */
9579 if (p1
== 0 || p2
== 0)
9585 /* If it exists already, ignore it. */
9586 for (i
= 0; i
< qp_implieslen
; i
++)
9588 if (qp_implies
[i
].p1
== p1
9589 && qp_implies
[i
].p2
== p2
9590 && qp_implies
[i
].path
== md
.path
9591 && !qp_implies
[i
].p2_branched
)
9595 if (qp_implieslen
== qp_impliestotlen
)
9597 qp_impliestotlen
+= 20;
9598 qp_implies
= (struct qp_imply
*)
9599 xrealloc ((void *) qp_implies
,
9600 qp_impliestotlen
* sizeof (struct qp_imply
));
9603 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9604 qp_implies
[qp_implieslen
].p1
= p1
;
9605 qp_implies
[qp_implieslen
].p2
= p2
;
9606 qp_implies
[qp_implieslen
].path
= md
.path
;
9607 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9609 /* Add in the implied transitive relations; for everything that p2 implies,
9610 make p1 imply that, too; for everything that implies p1, make it imply p2
9612 for (i
= 0; i
< qp_implieslen
; i
++)
9614 if (qp_implies
[i
].p1
== p2
)
9615 add_qp_imply (p1
, qp_implies
[i
].p2
);
9616 if (qp_implies
[i
].p2
== p1
)
9617 add_qp_imply (qp_implies
[i
].p1
, p2
);
9619 /* Add in mutex relations implied by this implies relation; for each mutex
9620 relation containing p2, duplicate it and replace p2 with p1. */
9621 bit
= (valueT
) 1 << p1
;
9622 mask
= (valueT
) 1 << p2
;
9623 for (i
= 0; i
< qp_mutexeslen
; i
++)
9625 if (qp_mutexes
[i
].prmask
& mask
)
9626 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9630 /* Add the PRs specified in the mask to the mutex list; this means that only
9631 one of the PRs can be true at any time. PR0 should never be included in
9641 if (qp_mutexeslen
== qp_mutexestotlen
)
9643 qp_mutexestotlen
+= 20;
9644 qp_mutexes
= (struct qpmutex
*)
9645 xrealloc ((void *) qp_mutexes
,
9646 qp_mutexestotlen
* sizeof (struct qpmutex
));
9650 fprintf (stderr
, " Registering mutex on");
9651 print_prmask (mask
);
9652 fprintf (stderr
, "\n");
9654 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9655 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9659 has_suffix_p (name
, suffix
)
9663 size_t namelen
= strlen (name
);
9664 size_t sufflen
= strlen (suffix
);
9666 if (namelen
<= sufflen
)
9668 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9672 clear_register_values ()
9676 fprintf (stderr
, " Clearing register values\n");
9677 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9678 gr_values
[i
].known
= 0;
9681 /* Keep track of register values/changes which affect DV tracking.
9683 optimization note: should add a flag to classes of insns where otherwise we
9684 have to examine a group of strings to identify them. */
9687 note_register_values (idesc
)
9688 struct ia64_opcode
*idesc
;
9690 valueT qp_changemask
= 0;
9693 /* Invalidate values for registers being written to. */
9694 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9696 if (idesc
->operands
[i
] == IA64_OPND_R1
9697 || idesc
->operands
[i
] == IA64_OPND_R2
9698 || idesc
->operands
[i
] == IA64_OPND_R3
)
9700 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9701 if (regno
> 0 && regno
< NELEMS (gr_values
))
9702 gr_values
[regno
].known
= 0;
9704 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9706 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9707 if (regno
> 0 && regno
< 4)
9708 gr_values
[regno
].known
= 0;
9710 else if (idesc
->operands
[i
] == IA64_OPND_P1
9711 || idesc
->operands
[i
] == IA64_OPND_P2
)
9713 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9714 qp_changemask
|= (valueT
) 1 << regno
;
9716 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9718 if (idesc
->operands
[2] & (valueT
) 0x10000)
9719 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9721 qp_changemask
= idesc
->operands
[2];
9724 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9726 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9727 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9729 qp_changemask
= idesc
->operands
[1];
9730 qp_changemask
&= ~(valueT
) 0xFFFF;
9735 /* Always clear qp branch flags on any PR change. */
9736 /* FIXME there may be exceptions for certain compares. */
9737 clear_qp_branch_flag (qp_changemask
);
9739 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9740 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9742 qp_changemask
|= ~(valueT
) 0xFFFF;
9743 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9745 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9746 gr_values
[i
].known
= 0;
9748 clear_qp_mutex (qp_changemask
);
9749 clear_qp_implies (qp_changemask
, qp_changemask
);
9751 /* After a call, all register values are undefined, except those marked
9753 else if (strncmp (idesc
->name
, "br.call", 6) == 0
9754 || strncmp (idesc
->name
, "brl.call", 7) == 0)
9756 /* FIXME keep GR values which are marked as "safe_across_calls" */
9757 clear_register_values ();
9758 clear_qp_mutex (~qp_safe_across_calls
);
9759 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
9760 clear_qp_branch_flag (~qp_safe_across_calls
);
9762 else if (is_interruption_or_rfi (idesc
)
9763 || is_taken_branch (idesc
))
9765 clear_register_values ();
9766 clear_qp_mutex (~(valueT
) 0);
9767 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
9769 /* Look for mutex and implies relations. */
9770 else if ((idesc
->operands
[0] == IA64_OPND_P1
9771 || idesc
->operands
[0] == IA64_OPND_P2
)
9772 && (idesc
->operands
[1] == IA64_OPND_P1
9773 || idesc
->operands
[1] == IA64_OPND_P2
))
9775 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9776 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9777 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
9778 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
9780 /* If both PRs are PR0, we can't really do anything. */
9781 if (p1
== 0 && p2
== 0)
9784 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9786 /* In general, clear mutexes and implies which include P1 or P2,
9787 with the following exceptions. */
9788 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9789 || has_suffix_p (idesc
->name
, ".and.orcm"))
9791 clear_qp_implies (p2mask
, p1mask
);
9793 else if (has_suffix_p (idesc
->name
, ".andcm")
9794 || has_suffix_p (idesc
->name
, ".and"))
9796 clear_qp_implies (0, p1mask
| p2mask
);
9798 else if (has_suffix_p (idesc
->name
, ".orcm")
9799 || has_suffix_p (idesc
->name
, ".or"))
9801 clear_qp_mutex (p1mask
| p2mask
);
9802 clear_qp_implies (p1mask
| p2mask
, 0);
9808 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9810 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9811 if (p1
== 0 || p2
== 0)
9812 clear_qp_mutex (p1mask
| p2mask
);
9814 added
= update_qp_mutex (p1mask
| p2mask
);
9816 if (CURR_SLOT
.qp_regno
== 0
9817 || has_suffix_p (idesc
->name
, ".unc"))
9819 if (added
== 0 && p1
&& p2
)
9820 add_qp_mutex (p1mask
| p2mask
);
9821 if (CURR_SLOT
.qp_regno
!= 0)
9824 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
9826 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
9831 /* Look for mov imm insns into GRs. */
9832 else if (idesc
->operands
[0] == IA64_OPND_R1
9833 && (idesc
->operands
[1] == IA64_OPND_IMM22
9834 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
9835 && CURR_SLOT
.opnd
[1].X_op
== O_constant
9836 && (strcmp (idesc
->name
, "mov") == 0
9837 || strcmp (idesc
->name
, "movl") == 0))
9839 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9840 if (regno
> 0 && regno
< NELEMS (gr_values
))
9842 gr_values
[regno
].known
= 1;
9843 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
9844 gr_values
[regno
].path
= md
.path
;
9847 fprintf (stderr
, " Know gr%d = ", regno
);
9848 fprintf_vma (stderr
, gr_values
[regno
].value
);
9849 fputs ("\n", stderr
);
9853 /* Look for dep.z imm insns. */
9854 else if (idesc
->operands
[0] == IA64_OPND_R1
9855 && idesc
->operands
[1] == IA64_OPND_IMM8
9856 && strcmp (idesc
->name
, "dep.z") == 0)
9858 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9859 if (regno
> 0 && regno
< NELEMS (gr_values
))
9861 valueT value
= CURR_SLOT
.opnd
[1].X_add_number
;
9863 if (CURR_SLOT
.opnd
[3].X_add_number
< 64)
9864 value
&= ((valueT
)1 << CURR_SLOT
.opnd
[3].X_add_number
) - 1;
9865 value
<<= CURR_SLOT
.opnd
[2].X_add_number
;
9866 gr_values
[regno
].known
= 1;
9867 gr_values
[regno
].value
= value
;
9868 gr_values
[regno
].path
= md
.path
;
9871 fprintf (stderr
, " Know gr%d = ", regno
);
9872 fprintf_vma (stderr
, gr_values
[regno
].value
);
9873 fputs ("\n", stderr
);
9879 clear_qp_mutex (qp_changemask
);
9880 clear_qp_implies (qp_changemask
, qp_changemask
);
9884 /* Return whether the given predicate registers are currently mutex. */
9887 qp_mutex (p1
, p2
, path
)
9897 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
9898 for (i
= 0; i
< qp_mutexeslen
; i
++)
9900 if (qp_mutexes
[i
].path
>= path
9901 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9908 /* Return whether the given resource is in the given insn's list of chks
9909 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9913 resources_match (rs
, idesc
, note
, qp_regno
, path
)
9915 struct ia64_opcode
*idesc
;
9920 struct rsrc specs
[MAX_SPECS
];
9923 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9924 we don't need to check. One exception is note 11, which indicates that
9925 target predicates are written regardless of PR[qp]. */
9926 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
9930 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
9933 /* UNAT checking is a bit more specific than other resources */
9934 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
9935 && specs
[count
].mem_offset
.hint
9936 && rs
->mem_offset
.hint
)
9938 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
9940 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
9941 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
9948 /* Skip apparent PR write conflicts where both writes are an AND or both
9949 writes are an OR. */
9950 if (rs
->dependency
->specifier
== IA64_RS_PR
9951 || rs
->dependency
->specifier
== IA64_RS_PRr
9952 || rs
->dependency
->specifier
== IA64_RS_PR63
)
9954 if (specs
[count
].cmp_type
!= CMP_NONE
9955 && specs
[count
].cmp_type
== rs
->cmp_type
)
9958 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
9959 dv_mode
[rs
->dependency
->mode
],
9960 rs
->dependency
->specifier
!= IA64_RS_PR63
?
9961 specs
[count
].index
: 63);
9966 " %s on parallel compare conflict %s vs %s on PR%d\n",
9967 dv_mode
[rs
->dependency
->mode
],
9968 dv_cmp_type
[rs
->cmp_type
],
9969 dv_cmp_type
[specs
[count
].cmp_type
],
9970 rs
->dependency
->specifier
!= IA64_RS_PR63
?
9971 specs
[count
].index
: 63);
9975 /* If either resource is not specific, conservatively assume a conflict
9977 if (!specs
[count
].specific
|| !rs
->specific
)
9979 else if (specs
[count
].index
== rs
->index
)
9986 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9987 insert a stop to create the break. Update all resource dependencies
9988 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9989 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9990 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
9994 insn_group_break (insert_stop
, qp_regno
, save_current
)
10001 if (insert_stop
&& md
.num_slots_in_use
> 0)
10002 PREV_SLOT
.end_of_insn_group
= 1;
10006 fprintf (stderr
, " Insn group break%s",
10007 (insert_stop
? " (w/stop)" : ""));
10009 fprintf (stderr
, " effective for QP=%d", qp_regno
);
10010 fprintf (stderr
, "\n");
10014 while (i
< regdepslen
)
10016 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
10019 && regdeps
[i
].qp_regno
!= qp_regno
)
10026 && CURR_SLOT
.src_file
== regdeps
[i
].file
10027 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
10033 /* clear dependencies which are automatically cleared by a stop, or
10034 those that have reached the appropriate state of insn serialization */
10035 if (dep
->semantics
== IA64_DVS_IMPLIED
10036 || dep
->semantics
== IA64_DVS_IMPLIEDF
10037 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
10039 print_dependency ("Removing", i
);
10040 regdeps
[i
] = regdeps
[--regdepslen
];
10044 if (dep
->semantics
== IA64_DVS_DATA
10045 || dep
->semantics
== IA64_DVS_INSTR
10046 || dep
->semantics
== IA64_DVS_SPECIFIC
)
10048 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
10049 regdeps
[i
].insn_srlz
= STATE_STOP
;
10050 if (regdeps
[i
].data_srlz
== STATE_NONE
)
10051 regdeps
[i
].data_srlz
= STATE_STOP
;
10058 /* Add the given resource usage spec to the list of active dependencies. */
10061 mark_resource (idesc
, dep
, spec
, depind
, path
)
10062 struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
;
10063 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
;
10068 if (regdepslen
== regdepstotlen
)
10070 regdepstotlen
+= 20;
10071 regdeps
= (struct rsrc
*)
10072 xrealloc ((void *) regdeps
,
10073 regdepstotlen
* sizeof (struct rsrc
));
10076 regdeps
[regdepslen
] = *spec
;
10077 regdeps
[regdepslen
].depind
= depind
;
10078 regdeps
[regdepslen
].path
= path
;
10079 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
10080 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
10082 print_dependency ("Adding", regdepslen
);
10088 print_dependency (action
, depind
)
10089 const char *action
;
10094 fprintf (stderr
, " %s %s '%s'",
10095 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
10096 (regdeps
[depind
].dependency
)->name
);
10097 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
>= 0)
10098 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
10099 if (regdeps
[depind
].mem_offset
.hint
)
10101 fputs (" ", stderr
);
10102 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
10103 fputs ("+", stderr
);
10104 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
10106 fprintf (stderr
, "\n");
10111 instruction_serialization ()
10115 fprintf (stderr
, " Instruction serialization\n");
10116 for (i
= 0; i
< regdepslen
; i
++)
10117 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
10118 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
10122 data_serialization ()
10126 fprintf (stderr
, " Data serialization\n");
10127 while (i
< regdepslen
)
10129 if (regdeps
[i
].data_srlz
== STATE_STOP
10130 /* Note: as of 991210, all "other" dependencies are cleared by a
10131 data serialization. This might change with new tables */
10132 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
10134 print_dependency ("Removing", i
);
10135 regdeps
[i
] = regdeps
[--regdepslen
];
10142 /* Insert stops and serializations as needed to avoid DVs. */
10145 remove_marked_resource (rs
)
10148 switch (rs
->dependency
->semantics
)
10150 case IA64_DVS_SPECIFIC
:
10152 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
10153 /* ...fall through... */
10154 case IA64_DVS_INSTR
:
10156 fprintf (stderr
, "Inserting instr serialization\n");
10157 if (rs
->insn_srlz
< STATE_STOP
)
10158 insn_group_break (1, 0, 0);
10159 if (rs
->insn_srlz
< STATE_SRLZ
)
10161 struct slot oldslot
= CURR_SLOT
;
10162 /* Manually jam a srlz.i insn into the stream */
10163 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10164 CURR_SLOT
.user_template
= -1;
10165 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
10166 instruction_serialization ();
10167 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10168 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10169 emit_one_bundle ();
10170 CURR_SLOT
= oldslot
;
10172 insn_group_break (1, 0, 0);
10174 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
10175 "other" types of DV are eliminated
10176 by a data serialization */
10177 case IA64_DVS_DATA
:
10179 fprintf (stderr
, "Inserting data serialization\n");
10180 if (rs
->data_srlz
< STATE_STOP
)
10181 insn_group_break (1, 0, 0);
10183 struct slot oldslot
= CURR_SLOT
;
10184 /* Manually jam a srlz.d insn into the stream */
10185 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10186 CURR_SLOT
.user_template
= -1;
10187 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
10188 data_serialization ();
10189 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10190 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10191 emit_one_bundle ();
10192 CURR_SLOT
= oldslot
;
10195 case IA64_DVS_IMPLIED
:
10196 case IA64_DVS_IMPLIEDF
:
10198 fprintf (stderr
, "Inserting stop\n");
10199 insn_group_break (1, 0, 0);
10206 /* Check the resources used by the given opcode against the current dependency
10209 The check is run once for each execution path encountered. In this case,
10210 a unique execution path is the sequence of instructions following a code
10211 entry point, e.g. the following has three execution paths, one starting
10212 at L0, one at L1, and one at L2.
10221 check_dependencies (idesc
)
10222 struct ia64_opcode
*idesc
;
10224 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10228 /* Note that the number of marked resources may change within the
10229 loop if in auto mode. */
10231 while (i
< regdepslen
)
10233 struct rsrc
*rs
= ®deps
[i
];
10234 const struct ia64_dependency
*dep
= rs
->dependency
;
10237 int start_over
= 0;
10239 if (dep
->semantics
== IA64_DVS_NONE
10240 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
10246 note
= NOTE (opdeps
->chks
[chkind
]);
10248 /* Check this resource against each execution path seen thus far. */
10249 for (path
= 0; path
<= md
.path
; path
++)
10253 /* If the dependency wasn't on the path being checked, ignore it. */
10254 if (rs
->path
< path
)
10257 /* If the QP for this insn implies a QP which has branched, don't
10258 bother checking. Ed. NOTE: I don't think this check is terribly
10259 useful; what's the point of generating code which will only be
10260 reached if its QP is zero?
10261 This code was specifically inserted to handle the following code,
10262 based on notes from Intel's DV checking code, where p1 implies p2.
10268 if (CURR_SLOT
.qp_regno
!= 0)
10272 for (implies
= 0; implies
< qp_implieslen
; implies
++)
10274 if (qp_implies
[implies
].path
>= path
10275 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
10276 && qp_implies
[implies
].p2_branched
)
10286 if ((matchtype
= resources_match (rs
, idesc
, note
,
10287 CURR_SLOT
.qp_regno
, path
)) != 0)
10290 char pathmsg
[256] = "";
10291 char indexmsg
[256] = "";
10292 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
10295 sprintf (pathmsg
, " when entry is at label '%s'",
10296 md
.entry_labels
[path
- 1]);
10297 if (matchtype
== 1 && rs
->index
>= 0)
10298 sprintf (indexmsg
, ", specific resource number is %d",
10300 sprintf (msg
, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10302 (certain
? "violates" : "may violate"),
10303 dv_mode
[dep
->mode
], dep
->name
,
10304 dv_sem
[dep
->semantics
],
10305 pathmsg
, indexmsg
);
10307 if (md
.explicit_mode
)
10309 as_warn ("%s", msg
);
10310 if (path
< md
.path
)
10311 as_warn (_("Only the first path encountering the conflict "
10313 as_warn_where (rs
->file
, rs
->line
,
10314 _("This is the location of the "
10315 "conflicting usage"));
10316 /* Don't bother checking other paths, to avoid duplicating
10317 the same warning */
10323 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
10325 remove_marked_resource (rs
);
10327 /* since the set of dependencies has changed, start over */
10328 /* FIXME -- since we're removing dvs as we go, we
10329 probably don't really need to start over... */
10342 /* Register new dependencies based on the given opcode. */
10345 mark_resources (idesc
)
10346 struct ia64_opcode
*idesc
;
10349 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10350 int add_only_qp_reads
= 0;
10352 /* A conditional branch only uses its resources if it is taken; if it is
10353 taken, we stop following that path. The other branch types effectively
10354 *always* write their resources. If it's not taken, register only QP
10356 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
10358 add_only_qp_reads
= 1;
10362 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
10364 for (i
= 0; i
< opdeps
->nregs
; i
++)
10366 const struct ia64_dependency
*dep
;
10367 struct rsrc specs
[MAX_SPECS
];
10372 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
10373 note
= NOTE (opdeps
->regs
[i
]);
10375 if (add_only_qp_reads
10376 && !(dep
->mode
== IA64_DV_WAR
10377 && (dep
->specifier
== IA64_RS_PR
10378 || dep
->specifier
== IA64_RS_PRr
10379 || dep
->specifier
== IA64_RS_PR63
)))
10382 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
10384 while (count
-- > 0)
10386 mark_resource (idesc
, dep
, &specs
[count
],
10387 DEP (opdeps
->regs
[i
]), md
.path
);
10390 /* The execution path may affect register values, which may in turn
10391 affect which indirect-access resources are accessed. */
10392 switch (dep
->specifier
)
10396 case IA64_RS_CPUID
:
10404 for (path
= 0; path
< md
.path
; path
++)
10406 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
10407 while (count
-- > 0)
10408 mark_resource (idesc
, dep
, &specs
[count
],
10409 DEP (opdeps
->regs
[i
]), path
);
10416 /* Remove dependencies when they no longer apply. */
10419 update_dependencies (idesc
)
10420 struct ia64_opcode
*idesc
;
10424 if (strcmp (idesc
->name
, "srlz.i") == 0)
10426 instruction_serialization ();
10428 else if (strcmp (idesc
->name
, "srlz.d") == 0)
10430 data_serialization ();
10432 else if (is_interruption_or_rfi (idesc
)
10433 || is_taken_branch (idesc
))
10435 /* Although technically the taken branch doesn't clear dependencies
10436 which require a srlz.[id], we don't follow the branch; the next
10437 instruction is assumed to start with a clean slate. */
10441 else if (is_conditional_branch (idesc
)
10442 && CURR_SLOT
.qp_regno
!= 0)
10444 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
10446 for (i
= 0; i
< qp_implieslen
; i
++)
10448 /* If the conditional branch's predicate is implied by the predicate
10449 in an existing dependency, remove that dependency. */
10450 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
10453 /* Note that this implied predicate takes a branch so that if
10454 a later insn generates a DV but its predicate implies this
10455 one, we can avoid the false DV warning. */
10456 qp_implies
[i
].p2_branched
= 1;
10457 while (depind
< regdepslen
)
10459 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
10461 print_dependency ("Removing", depind
);
10462 regdeps
[depind
] = regdeps
[--regdepslen
];
10469 /* Any marked resources which have this same predicate should be
10470 cleared, provided that the QP hasn't been modified between the
10471 marking instruction and the branch. */
10474 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
10479 while (i
< regdepslen
)
10481 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
10482 && regdeps
[i
].link_to_qp_branch
10483 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
10484 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
10486 /* Treat like a taken branch */
10487 print_dependency ("Removing", i
);
10488 regdeps
[i
] = regdeps
[--regdepslen
];
10497 /* Examine the current instruction for dependency violations. */
10501 struct ia64_opcode
*idesc
;
10505 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10506 idesc
->name
, CURR_SLOT
.src_line
,
10507 idesc
->dependencies
->nchks
,
10508 idesc
->dependencies
->nregs
);
10511 /* Look through the list of currently marked resources; if the current
10512 instruction has the dependency in its chks list which uses that resource,
10513 check against the specific resources used. */
10514 check_dependencies (idesc
);
10516 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10517 then add them to the list of marked resources. */
10518 mark_resources (idesc
);
10520 /* There are several types of dependency semantics, and each has its own
10521 requirements for being cleared
10523 Instruction serialization (insns separated by interruption, rfi, or
10524 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10526 Data serialization (instruction serialization, or writer + srlz.d +
10527 reader, where writer and srlz.d are in separate groups) clears
10528 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10529 always be the case).
10531 Instruction group break (groups separated by stop, taken branch,
10532 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10534 update_dependencies (idesc
);
10536 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10537 warning. Keep track of as many as possible that are useful. */
10538 note_register_values (idesc
);
10540 /* We don't need or want this anymore. */
10541 md
.mem_offset
.hint
= 0;
10546 /* Translate one line of assembly. Pseudo ops and labels do not show
10552 char *saved_input_line_pointer
, *mnemonic
;
10553 const struct pseudo_opcode
*pdesc
;
10554 struct ia64_opcode
*idesc
;
10555 unsigned char qp_regno
;
10556 unsigned int flags
;
10559 saved_input_line_pointer
= input_line_pointer
;
10560 input_line_pointer
= str
;
10562 /* extract the opcode (mnemonic): */
10564 mnemonic
= input_line_pointer
;
10565 ch
= get_symbol_end ();
10566 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
10569 *input_line_pointer
= ch
;
10570 (*pdesc
->handler
) (pdesc
->arg
);
10574 /* Find the instruction descriptor matching the arguments. */
10576 idesc
= ia64_find_opcode (mnemonic
);
10577 *input_line_pointer
= ch
;
10580 as_bad ("Unknown opcode `%s'", mnemonic
);
10584 idesc
= parse_operands (idesc
);
10588 /* Handle the dynamic ops we can handle now: */
10589 if (idesc
->type
== IA64_TYPE_DYN
)
10591 if (strcmp (idesc
->name
, "add") == 0)
10593 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10594 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10598 ia64_free_opcode (idesc
);
10599 idesc
= ia64_find_opcode (mnemonic
);
10601 else if (strcmp (idesc
->name
, "mov") == 0)
10603 enum ia64_opnd opnd1
, opnd2
;
10606 opnd1
= idesc
->operands
[0];
10607 opnd2
= idesc
->operands
[1];
10608 if (opnd1
== IA64_OPND_AR3
)
10610 else if (opnd2
== IA64_OPND_AR3
)
10614 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10616 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10617 mnemonic
= "mov.i";
10618 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10619 mnemonic
= "mov.m";
10627 ia64_free_opcode (idesc
);
10628 idesc
= ia64_find_opcode (mnemonic
);
10629 while (idesc
!= NULL
10630 && (idesc
->operands
[0] != opnd1
10631 || idesc
->operands
[1] != opnd2
))
10632 idesc
= get_next_opcode (idesc
);
10636 else if (strcmp (idesc
->name
, "mov.i") == 0
10637 || strcmp (idesc
->name
, "mov.m") == 0)
10639 enum ia64_opnd opnd1
, opnd2
;
10642 opnd1
= idesc
->operands
[0];
10643 opnd2
= idesc
->operands
[1];
10644 if (opnd1
== IA64_OPND_AR3
)
10646 else if (opnd2
== IA64_OPND_AR3
)
10650 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10653 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10655 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10657 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10658 as_bad ("AR %d cannot be accessed by %c-unit",
10659 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10663 else if (strcmp (idesc
->name
, "hint.b") == 0)
10669 case hint_b_warning
:
10670 as_warn ("hint.b may be treated as nop");
10673 as_bad ("hint.b shouldn't be used");
10679 if (md
.qp
.X_op
== O_register
)
10681 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10682 md
.qp
.X_op
= O_absent
;
10685 flags
= idesc
->flags
;
10687 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10689 /* The alignment frag has to end with a stop bit only if the
10690 next instruction after the alignment directive has to be
10691 the first instruction in an instruction group. */
10694 while (align_frag
->fr_type
!= rs_align_code
)
10696 align_frag
= align_frag
->fr_next
;
10700 /* align_frag can be NULL if there are directives in
10702 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10703 align_frag
->tc_frag_data
= 1;
10706 insn_group_break (1, 0, 0);
10710 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10712 as_bad ("`%s' cannot be predicated", idesc
->name
);
10716 /* Build the instruction. */
10717 CURR_SLOT
.qp_regno
= qp_regno
;
10718 CURR_SLOT
.idesc
= idesc
;
10719 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
10720 dwarf2_where (&CURR_SLOT
.debug_line
);
10722 /* Add unwind entry, if there is one. */
10723 if (unwind
.current_entry
)
10725 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10726 unwind
.current_entry
= NULL
;
10728 if (unwind
.proc_start
&& S_IS_DEFINED (unwind
.proc_start
))
10731 /* Check for dependency violations. */
10735 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10736 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10737 emit_one_bundle ();
10739 if ((flags
& IA64_OPCODE_LAST
) != 0)
10740 insn_group_break (1, 0, 0);
10742 md
.last_text_seg
= now_seg
;
10745 input_line_pointer
= saved_input_line_pointer
;
10748 /* Called when symbol NAME cannot be found in the symbol table.
10749 Should be used for dynamic valued symbols only. */
10752 md_undefined_symbol (name
)
10753 char *name ATTRIBUTE_UNUSED
;
10758 /* Called for any expression that can not be recognized. When the
10759 function is called, `input_line_pointer' will point to the start of
10766 switch (*input_line_pointer
)
10769 ++input_line_pointer
;
10771 if (*input_line_pointer
!= ']')
10773 as_bad ("Closing bracket missing");
10778 if (e
->X_op
!= O_register
)
10779 as_bad ("Register expected as index");
10781 ++input_line_pointer
;
10792 ignore_rest_of_line ();
10795 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10796 a section symbol plus some offset. For relocs involving @fptr(),
10797 directives we don't want such adjustments since we need to have the
10798 original symbol's name in the reloc. */
10800 ia64_fix_adjustable (fix
)
10803 /* Prevent all adjustments to global symbols */
10804 if (S_IS_EXTERN (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10807 switch (fix
->fx_r_type
)
10809 case BFD_RELOC_IA64_FPTR64I
:
10810 case BFD_RELOC_IA64_FPTR32MSB
:
10811 case BFD_RELOC_IA64_FPTR32LSB
:
10812 case BFD_RELOC_IA64_FPTR64MSB
:
10813 case BFD_RELOC_IA64_FPTR64LSB
:
10814 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10815 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10825 ia64_force_relocation (fix
)
10828 switch (fix
->fx_r_type
)
10830 case BFD_RELOC_IA64_FPTR64I
:
10831 case BFD_RELOC_IA64_FPTR32MSB
:
10832 case BFD_RELOC_IA64_FPTR32LSB
:
10833 case BFD_RELOC_IA64_FPTR64MSB
:
10834 case BFD_RELOC_IA64_FPTR64LSB
:
10836 case BFD_RELOC_IA64_LTOFF22
:
10837 case BFD_RELOC_IA64_LTOFF64I
:
10838 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10839 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10840 case BFD_RELOC_IA64_PLTOFF22
:
10841 case BFD_RELOC_IA64_PLTOFF64I
:
10842 case BFD_RELOC_IA64_PLTOFF64MSB
:
10843 case BFD_RELOC_IA64_PLTOFF64LSB
:
10845 case BFD_RELOC_IA64_LTOFF22X
:
10846 case BFD_RELOC_IA64_LDXMOV
:
10853 return generic_force_reloc (fix
);
10856 /* Decide from what point a pc-relative relocation is relative to,
10857 relative to the pc-relative fixup. Er, relatively speaking. */
10859 ia64_pcrel_from_section (fix
, sec
)
10863 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
10865 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
10872 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10874 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
10878 expr
.X_op
= O_pseudo_fixup
;
10879 expr
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
10880 expr
.X_add_number
= 0;
10881 expr
.X_add_symbol
= symbol
;
10882 emit_expr (&expr
, size
);
10885 /* This is called whenever some data item (not an instruction) needs a
10886 fixup. We pick the right reloc code depending on the byteorder
10887 currently in effect. */
10889 ia64_cons_fix_new (f
, where
, nbytes
, exp
)
10895 bfd_reloc_code_real_type code
;
10900 /* There are no reloc for 8 and 16 bit quantities, but we allow
10901 them here since they will work fine as long as the expression
10902 is fully defined at the end of the pass over the source file. */
10903 case 1: code
= BFD_RELOC_8
; break;
10904 case 2: code
= BFD_RELOC_16
; break;
10906 if (target_big_endian
)
10907 code
= BFD_RELOC_IA64_DIR32MSB
;
10909 code
= BFD_RELOC_IA64_DIR32LSB
;
10913 /* In 32-bit mode, data8 could mean function descriptors too. */
10914 if (exp
->X_op
== O_pseudo_fixup
10915 && exp
->X_op_symbol
10916 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
10917 && !(md
.flags
& EF_IA_64_ABI64
))
10919 if (target_big_endian
)
10920 code
= BFD_RELOC_IA64_IPLTMSB
;
10922 code
= BFD_RELOC_IA64_IPLTLSB
;
10923 exp
->X_op
= O_symbol
;
10928 if (target_big_endian
)
10929 code
= BFD_RELOC_IA64_DIR64MSB
;
10931 code
= BFD_RELOC_IA64_DIR64LSB
;
10936 if (exp
->X_op
== O_pseudo_fixup
10937 && exp
->X_op_symbol
10938 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
10940 if (target_big_endian
)
10941 code
= BFD_RELOC_IA64_IPLTMSB
;
10943 code
= BFD_RELOC_IA64_IPLTLSB
;
10944 exp
->X_op
= O_symbol
;
10950 as_bad ("Unsupported fixup size %d", nbytes
);
10951 ignore_rest_of_line ();
10955 if (exp
->X_op
== O_pseudo_fixup
)
10957 exp
->X_op
= O_symbol
;
10958 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
10959 /* ??? If code unchanged, unsupported. */
10962 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
10963 /* We need to store the byte order in effect in case we're going
10964 to fix an 8 or 16 bit relocation (for which there no real
10965 relocs available). See md_apply_fix3(). */
10966 fix
->tc_fix_data
.bigendian
= target_big_endian
;
10969 /* Return the actual relocation we wish to associate with the pseudo
10970 reloc described by SYM and R_TYPE. SYM should be one of the
10971 symbols in the pseudo_func array, or NULL. */
10973 static bfd_reloc_code_real_type
10974 ia64_gen_real_reloc_type (sym
, r_type
)
10975 struct symbol
*sym
;
10976 bfd_reloc_code_real_type r_type
;
10978 bfd_reloc_code_real_type
new = 0;
10979 const char *type
= NULL
, *suffix
= "";
10986 switch (S_GET_VALUE (sym
))
10988 case FUNC_FPTR_RELATIVE
:
10991 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_FPTR64I
; break;
10992 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_FPTR32MSB
; break;
10993 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_FPTR32LSB
; break;
10994 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_FPTR64MSB
; break;
10995 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_FPTR64LSB
; break;
10996 default: type
= "FPTR"; break;
11000 case FUNC_GP_RELATIVE
:
11003 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_GPREL22
; break;
11004 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_GPREL64I
; break;
11005 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_GPREL32MSB
; break;
11006 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_GPREL32LSB
; break;
11007 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_GPREL64MSB
; break;
11008 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_GPREL64LSB
; break;
11009 default: type
= "GPREL"; break;
11013 case FUNC_LT_RELATIVE
:
11016 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22
; break;
11017 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_LTOFF64I
; break;
11018 default: type
= "LTOFF"; break;
11022 case FUNC_LT_RELATIVE_X
:
11025 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22X
; break;
11026 default: type
= "LTOFF"; suffix
= "X"; break;
11030 case FUNC_PC_RELATIVE
:
11033 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PCREL22
; break;
11034 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PCREL64I
; break;
11035 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_PCREL32MSB
; break;
11036 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_PCREL32LSB
; break;
11037 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PCREL64MSB
; break;
11038 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PCREL64LSB
; break;
11039 default: type
= "PCREL"; break;
11043 case FUNC_PLT_RELATIVE
:
11046 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PLTOFF22
; break;
11047 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PLTOFF64I
; break;
11048 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PLTOFF64MSB
;break;
11049 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PLTOFF64LSB
;break;
11050 default: type
= "PLTOFF"; break;
11054 case FUNC_SEC_RELATIVE
:
11057 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SECREL32MSB
;break;
11058 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SECREL32LSB
;break;
11059 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SECREL64MSB
;break;
11060 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SECREL64LSB
;break;
11061 default: type
= "SECREL"; break;
11065 case FUNC_SEG_RELATIVE
:
11068 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SEGREL32MSB
;break;
11069 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SEGREL32LSB
;break;
11070 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SEGREL64MSB
;break;
11071 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SEGREL64LSB
;break;
11072 default: type
= "SEGREL"; break;
11076 case FUNC_LTV_RELATIVE
:
11079 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_LTV32MSB
; break;
11080 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_LTV32LSB
; break;
11081 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_LTV64MSB
; break;
11082 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_LTV64LSB
; break;
11083 default: type
= "LTV"; break;
11087 case FUNC_LT_FPTR_RELATIVE
:
11090 case BFD_RELOC_IA64_IMM22
:
11091 new = BFD_RELOC_IA64_LTOFF_FPTR22
; break;
11092 case BFD_RELOC_IA64_IMM64
:
11093 new = BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
11094 case BFD_RELOC_IA64_DIR32MSB
:
11095 new = BFD_RELOC_IA64_LTOFF_FPTR32MSB
; break;
11096 case BFD_RELOC_IA64_DIR32LSB
:
11097 new = BFD_RELOC_IA64_LTOFF_FPTR32LSB
; break;
11098 case BFD_RELOC_IA64_DIR64MSB
:
11099 new = BFD_RELOC_IA64_LTOFF_FPTR64MSB
; break;
11100 case BFD_RELOC_IA64_DIR64LSB
:
11101 new = BFD_RELOC_IA64_LTOFF_FPTR64LSB
; break;
11103 type
= "LTOFF_FPTR"; break;
11107 case FUNC_TP_RELATIVE
:
11110 case BFD_RELOC_IA64_IMM14
: new = BFD_RELOC_IA64_TPREL14
; break;
11111 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_TPREL22
; break;
11112 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_TPREL64I
; break;
11113 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_TPREL64MSB
; break;
11114 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_TPREL64LSB
; break;
11115 default: type
= "TPREL"; break;
11119 case FUNC_LT_TP_RELATIVE
:
11122 case BFD_RELOC_IA64_IMM22
:
11123 new = BFD_RELOC_IA64_LTOFF_TPREL22
; break;
11125 type
= "LTOFF_TPREL"; break;
11129 case FUNC_DTP_MODULE
:
11132 case BFD_RELOC_IA64_DIR64MSB
:
11133 new = BFD_RELOC_IA64_DTPMOD64MSB
; break;
11134 case BFD_RELOC_IA64_DIR64LSB
:
11135 new = BFD_RELOC_IA64_DTPMOD64LSB
; break;
11137 type
= "DTPMOD"; break;
11141 case FUNC_LT_DTP_MODULE
:
11144 case BFD_RELOC_IA64_IMM22
:
11145 new = BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
11147 type
= "LTOFF_DTPMOD"; break;
11151 case FUNC_DTP_RELATIVE
:
11154 case BFD_RELOC_IA64_DIR32MSB
:
11155 new = BFD_RELOC_IA64_DTPREL32MSB
; break;
11156 case BFD_RELOC_IA64_DIR32LSB
:
11157 new = BFD_RELOC_IA64_DTPREL32LSB
; break;
11158 case BFD_RELOC_IA64_DIR64MSB
:
11159 new = BFD_RELOC_IA64_DTPREL64MSB
; break;
11160 case BFD_RELOC_IA64_DIR64LSB
:
11161 new = BFD_RELOC_IA64_DTPREL64LSB
; break;
11162 case BFD_RELOC_IA64_IMM14
:
11163 new = BFD_RELOC_IA64_DTPREL14
; break;
11164 case BFD_RELOC_IA64_IMM22
:
11165 new = BFD_RELOC_IA64_DTPREL22
; break;
11166 case BFD_RELOC_IA64_IMM64
:
11167 new = BFD_RELOC_IA64_DTPREL64I
; break;
11169 type
= "DTPREL"; break;
11173 case FUNC_LT_DTP_RELATIVE
:
11176 case BFD_RELOC_IA64_IMM22
:
11177 new = BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
11179 type
= "LTOFF_DTPREL"; break;
11183 case FUNC_IPLT_RELOC
:
11186 case BFD_RELOC_IA64_IPLTMSB
: return r_type
;
11187 case BFD_RELOC_IA64_IPLTLSB
: return r_type
;
11188 default: type
= "IPLT"; break;
11206 case BFD_RELOC_IA64_DIR32MSB
: width
= 32; suffix
= "MSB"; break;
11207 case BFD_RELOC_IA64_DIR32LSB
: width
= 32; suffix
= "LSB"; break;
11208 case BFD_RELOC_IA64_DIR64MSB
: width
= 64; suffix
= "MSB"; break;
11209 case BFD_RELOC_IA64_DIR64LSB
: width
= 64; suffix
= "LSB"; break;
11210 case BFD_RELOC_IA64_IMM14
: width
= 14; break;
11211 case BFD_RELOC_IA64_IMM22
: width
= 22; break;
11212 case BFD_RELOC_IA64_IMM64
: width
= 64; suffix
= "I"; break;
11216 /* This should be an error, but since previously there wasn't any
11217 diagnostic here, dont't make it fail because of this for now. */
11218 as_warn ("Cannot express %s%d%s relocation", type
, width
, suffix
);
11223 /* Here is where generate the appropriate reloc for pseudo relocation
11226 ia64_validate_fix (fix
)
11229 switch (fix
->fx_r_type
)
11231 case BFD_RELOC_IA64_FPTR64I
:
11232 case BFD_RELOC_IA64_FPTR32MSB
:
11233 case BFD_RELOC_IA64_FPTR64LSB
:
11234 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11235 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11236 if (fix
->fx_offset
!= 0)
11237 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11238 "No addend allowed in @fptr() relocation");
11246 fix_insn (fix
, odesc
, value
)
11248 const struct ia64_operand
*odesc
;
11251 bfd_vma insn
[3], t0
, t1
, control_bits
;
11256 slot
= fix
->fx_where
& 0x3;
11257 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
11259 /* Bundles are always in little-endian byte order */
11260 t0
= bfd_getl64 (fixpos
);
11261 t1
= bfd_getl64 (fixpos
+ 8);
11262 control_bits
= t0
& 0x1f;
11263 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
11264 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
11265 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
11268 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
11270 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
11271 insn
[2] |= (((value
& 0x7f) << 13)
11272 | (((value
>> 7) & 0x1ff) << 27)
11273 | (((value
>> 16) & 0x1f) << 22)
11274 | (((value
>> 21) & 0x1) << 21)
11275 | (((value
>> 63) & 0x1) << 36));
11277 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
11279 if (value
& ~0x3fffffffffffffffULL
)
11280 err
= "integer operand out of range";
11281 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
11282 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
11284 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
11287 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
11288 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
11289 | (((value
>> 0) & 0xfffff) << 13));
11292 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
11295 as_bad_where (fix
->fx_file
, fix
->fx_line
, err
);
11297 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
11298 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
11299 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
11300 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
11303 /* Attempt to simplify or even eliminate a fixup. The return value is
11304 ignored; perhaps it was once meaningful, but now it is historical.
11305 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11307 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11311 md_apply_fix3 (fix
, valP
, seg
)
11314 segT seg ATTRIBUTE_UNUSED
;
11317 valueT value
= *valP
;
11319 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
11323 switch (fix
->fx_r_type
)
11325 case BFD_RELOC_IA64_PCREL21B
: break;
11326 case BFD_RELOC_IA64_PCREL21BI
: break;
11327 case BFD_RELOC_IA64_PCREL21F
: break;
11328 case BFD_RELOC_IA64_PCREL21M
: break;
11329 case BFD_RELOC_IA64_PCREL60B
: break;
11330 case BFD_RELOC_IA64_PCREL22
: break;
11331 case BFD_RELOC_IA64_PCREL64I
: break;
11332 case BFD_RELOC_IA64_PCREL32MSB
: break;
11333 case BFD_RELOC_IA64_PCREL32LSB
: break;
11334 case BFD_RELOC_IA64_PCREL64MSB
: break;
11335 case BFD_RELOC_IA64_PCREL64LSB
: break;
11337 fix
->fx_r_type
= ia64_gen_real_reloc_type (pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
,
11344 switch (fix
->fx_r_type
)
11346 case BFD_RELOC_UNUSED
:
11347 /* This must be a TAG13 or TAG13b operand. There are no external
11348 relocs defined for them, so we must give an error. */
11349 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11350 "%s must have a constant value",
11351 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
11355 case BFD_RELOC_IA64_TPREL14
:
11356 case BFD_RELOC_IA64_TPREL22
:
11357 case BFD_RELOC_IA64_TPREL64I
:
11358 case BFD_RELOC_IA64_LTOFF_TPREL22
:
11359 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
11360 case BFD_RELOC_IA64_DTPREL14
:
11361 case BFD_RELOC_IA64_DTPREL22
:
11362 case BFD_RELOC_IA64_DTPREL64I
:
11363 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
11364 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
11371 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
11373 if (fix
->tc_fix_data
.bigendian
)
11374 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
11376 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
11381 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
11386 /* Generate the BFD reloc to be stuck in the object file from the
11387 fixup used internally in the assembler. */
11390 tc_gen_reloc (sec
, fixp
)
11391 asection
*sec ATTRIBUTE_UNUSED
;
11396 reloc
= xmalloc (sizeof (*reloc
));
11397 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
11398 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
11399 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
11400 reloc
->addend
= fixp
->fx_offset
;
11401 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
11405 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
11406 "Cannot represent %s relocation in object file",
11407 bfd_get_reloc_code_name (fixp
->fx_r_type
));
11412 /* Turn a string in input_line_pointer into a floating point constant
11413 of type TYPE, and store the appropriate bytes in *LIT. The number
11414 of LITTLENUMS emitted is stored in *SIZE. An error message is
11415 returned, or NULL on OK. */
11417 #define MAX_LITTLENUMS 5
11420 md_atof (type
, lit
, size
)
11425 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
11455 return "Bad call to MD_ATOF()";
11457 t
= atof_ieee (input_line_pointer
, type
, words
);
11459 input_line_pointer
= t
;
11461 (*ia64_float_to_chars
) (lit
, words
, prec
);
11465 /* It is 10 byte floating point with 6 byte padding. */
11466 memset (&lit
[10], 0, 6);
11467 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11470 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11475 /* Handle ia64 specific semantics of the align directive. */
11478 ia64_md_do_align (n
, fill
, len
, max
)
11479 int n ATTRIBUTE_UNUSED
;
11480 const char *fill ATTRIBUTE_UNUSED
;
11481 int len ATTRIBUTE_UNUSED
;
11482 int max ATTRIBUTE_UNUSED
;
11484 if (subseg_text_p (now_seg
))
11485 ia64_flush_insns ();
11488 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11489 of an rs_align_code fragment. */
11492 ia64_handle_align (fragp
)
11495 /* Use mfi bundle of nops with no stop bits. */
11496 static const unsigned char le_nop
[]
11497 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
11498 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
11499 static const unsigned char le_nop_stop
[]
11500 = { 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
11501 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
11505 const unsigned char *nop
;
11507 if (fragp
->fr_type
!= rs_align_code
)
11510 /* Check if this frag has to end with a stop bit. */
11511 nop
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11513 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11514 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11516 /* If no paddings are needed, we check if we need a stop bit. */
11517 if (!bytes
&& fragp
->tc_frag_data
)
11519 if (fragp
->fr_fix
< 16)
11521 /* FIXME: It won't work with
11523 alloc r32=ar.pfs,1,2,4,0
11527 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11528 _("Can't add stop bit to mark end of instruction group"));
11531 /* Bundles are always in little-endian byte order. Make sure
11532 the previous bundle has the stop bit. */
11536 /* Make sure we are on a 16-byte boundary, in case someone has been
11537 putting data into a text section. */
11540 int fix
= bytes
& 15;
11541 memset (p
, 0, fix
);
11544 fragp
->fr_fix
+= fix
;
11547 /* Instruction bundles are always little-endian. */
11548 memcpy (p
, nop
, 16);
11549 fragp
->fr_var
= 16;
11553 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11558 number_to_chars_bigendian (lit
, (long) (*words
++),
11559 sizeof (LITTLENUM_TYPE
));
11560 lit
+= sizeof (LITTLENUM_TYPE
);
11565 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11570 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11571 sizeof (LITTLENUM_TYPE
));
11572 lit
+= sizeof (LITTLENUM_TYPE
);
11577 ia64_elf_section_change_hook (void)
11579 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11580 && elf_linked_to_section (now_seg
) == NULL
)
11581 elf_linked_to_section (now_seg
) = text_section
;
11582 dot_byteorder (-1);
11585 /* Check if a label should be made global. */
11587 ia64_check_label (symbolS
*label
)
11589 if (*input_line_pointer
== ':')
11591 S_SET_EXTERNAL (label
);
11592 input_line_pointer
++;
11596 /* Used to remember where .alias and .secalias directives are seen. We
11597 will rename symbol and section names when we are about to output
11598 the relocatable file. */
11601 char *file
; /* The file where the directive is seen. */
11602 unsigned int line
; /* The line number the directive is at. */
11603 const char *name
; /* The orignale name of the symbol. */
11606 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11607 .secalias. Otherwise, it is .alias. */
11609 dot_alias (int section
)
11611 char *name
, *alias
;
11615 const char *error_string
;
11618 struct hash_control
*ahash
, *nhash
;
11621 name
= input_line_pointer
;
11622 delim
= get_symbol_end ();
11623 end_name
= input_line_pointer
;
11626 if (name
== end_name
)
11628 as_bad (_("expected symbol name"));
11629 discard_rest_of_line ();
11633 SKIP_WHITESPACE ();
11635 if (*input_line_pointer
!= ',')
11638 as_bad (_("expected comma after \"%s\""), name
);
11640 ignore_rest_of_line ();
11644 input_line_pointer
++;
11646 ia64_canonicalize_symbol_name (name
);
11648 /* We call demand_copy_C_string to check if alias string is valid.
11649 There should be a closing `"' and no `\0' in the string. */
11650 alias
= demand_copy_C_string (&len
);
11653 ignore_rest_of_line ();
11657 /* Make a copy of name string. */
11658 len
= strlen (name
) + 1;
11659 obstack_grow (¬es
, name
, len
);
11660 name
= obstack_finish (¬es
);
11665 ahash
= secalias_hash
;
11666 nhash
= secalias_name_hash
;
11671 ahash
= alias_hash
;
11672 nhash
= alias_name_hash
;
11675 /* Check if alias has been used before. */
11676 h
= (struct alias
*) hash_find (ahash
, alias
);
11679 if (strcmp (h
->name
, name
))
11680 as_bad (_("`%s' is already the alias of %s `%s'"),
11681 alias
, kind
, h
->name
);
11685 /* Check if name already has an alias. */
11686 a
= (const char *) hash_find (nhash
, name
);
11689 if (strcmp (a
, alias
))
11690 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11694 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
11695 as_where (&h
->file
, &h
->line
);
11698 error_string
= hash_jam (ahash
, alias
, (PTR
) h
);
11701 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11702 alias
, kind
, error_string
);
11706 error_string
= hash_jam (nhash
, name
, (PTR
) alias
);
11709 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11710 alias
, kind
, error_string
);
11712 obstack_free (¬es
, name
);
11713 obstack_free (¬es
, alias
);
11716 demand_empty_rest_of_line ();
11719 /* It renames the original symbol name to its alias. */
11721 do_alias (const char *alias
, PTR value
)
11723 struct alias
*h
= (struct alias
*) value
;
11724 symbolS
*sym
= symbol_find (h
->name
);
11727 as_warn_where (h
->file
, h
->line
,
11728 _("symbol `%s' aliased to `%s' is not used"),
11731 S_SET_NAME (sym
, (char *) alias
);
11734 /* Called from write_object_file. */
11736 ia64_adjust_symtab (void)
11738 hash_traverse (alias_hash
, do_alias
);
11741 /* It renames the original section name to its alias. */
11743 do_secalias (const char *alias
, PTR value
)
11745 struct alias
*h
= (struct alias
*) value
;
11746 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
11749 as_warn_where (h
->file
, h
->line
,
11750 _("section `%s' aliased to `%s' is not used"),
11756 /* Called from write_object_file. */
11758 ia64_frob_file (void)
11760 hash_traverse (secalias_hash
, do_secalias
);