1 2023-09-11 Andrew Pinski <apinski@marvell.com>
3 PR tree-optimization/111348
4 * match.pd (`(a CMP b) ? minmax<a, c> : minmax<b, c>`): Add :c on
5 the cmp part of the pattern.
7 2023-09-11 Uros Bizjak <ubizjak@gmail.com>
10 * config/i386/i386.cc (output_pic_addr_const): Handle CONST_WIDE_INT.
11 Call output_addr_const for CASE_CONST_SCALAR_INT.
13 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
15 * config/riscv/thead.md: Update types
17 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
19 * config/riscv/riscv.md: Update types
21 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
23 * config/riscv/riscv.md: Add "zicond" type
24 * config/riscv/zicond.md: Update types
26 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
28 * config/riscv/riscv.md: Add "pushpop" and "mvpair" types
29 * config/riscv/zc.md: Update types
31 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
33 * config/riscv/autovec-opt.md: Update types
34 * config/riscv/autovec.md: likewise
36 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
38 * config/s390/s390-builtins.def (s390_vec_signed_flt): Fix
40 (s390_vec_unsigned_flt): Ditto.
41 (s390_vec_revb_flt): Ditto.
42 (s390_vec_reve_flt): Ditto.
43 (s390_vclfnhs): Fix operand flags.
44 (s390_vclfnls): Ditto.
49 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
51 * config/s390/s390-builtins.def (O_U64): New.
56 (O_M12): Change bit position.
67 (OB_DEF_VAR): Add operand constraints.
69 * config/s390/s390.cc (s390_const_operand_ok): Honour 64 bit
72 2023-09-11 Andrew Pinski <apinski@marvell.com>
74 PR tree-optimization/111349
75 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): Add :c on
76 the cmp part of the pattern.
78 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
81 * config/riscv/riscv.opt: Set default as scalable vectorization.
83 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
85 * config/riscv/riscv-protos.h (get_all_predecessors): Remove.
86 (get_all_successors): Ditto.
87 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
88 (get_all_successors): Ditto.
90 2023-09-11 Jakub Jelinek <jakub@redhat.com>
93 * pretty-print.h (pp_wide_int): Rewrite from macro into inline
94 function. For printing values which don't fit into digit_buffer
95 use out-of-line function.
96 * wide-int-print.h (pp_wide_int_large): Declare.
97 * wide-int-print.cc: Include pretty-print.h.
98 (pp_wide_int_large): Define.
100 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
102 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn):
103 Use dominance analysis.
104 (pass_vsetvl::init): Ditto.
105 (pass_vsetvl::done): Ditto.
107 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
110 * config/riscv/autovec.md: Add VLS modes.
111 * config/riscv/riscv-protos.h (cmp_lmul_le_one): New function.
112 (cmp_lmul_gt_one): Ditto.
113 * config/riscv/riscv-v.cc (cmp_lmul_le_one): Ditto.
114 (cmp_lmul_gt_one): Ditto.
115 * config/riscv/riscv.cc (riscv_print_operand): Add VLS modes.
116 (riscv_vectorize_vec_perm_const): Ditto.
117 * config/riscv/vector-iterators.md: Ditto.
118 * config/riscv/vector.md: Ditto.
120 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
122 * config/riscv/autovec-vls.md (*mov<mode>_vls): New pattern.
123 * config/riscv/vector-iterators.md: New iterator
125 2023-09-11 Andrew Pinski <apinski@marvell.com>
127 PR tree-optimization/111346
128 * match.pd (`X CMP MINMAX`): Add `:c` on the cmp part
131 2023-09-11 liuhongt <hongtao.liu@intel.com>
135 * config/i386/sse.md (int_comm): New int_attr.
136 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>):
137 Remove % for Complex conjugate operations since they're not
139 (fma_<complexpairopname>_<mode>_pair): Ditto.
140 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
141 (cmul<conj_op><mode>3): Ditto.
143 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
145 * config/riscv/riscv-v.cc (shuffle_generic_patterns): Expand
146 fixed-vlmax/vls vector permutation.
148 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
150 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Avoid unnecessary slideup.
152 2023-09-10 Andrew Pinski <apinski@marvell.com>
154 PR tree-optimization/111331
155 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`):
156 Fix the LE/GE comparison to the correct value.
157 * tree-ssa-phiopt.cc (minmax_replacement):
158 Fix the LE/GE comparison for the
159 `(a CMP CST1) ? max<a,CST2> : a` optimization.
161 2023-09-10 Iain Sandoe <iain@sandoe.co.uk>
163 * config/darwin.cc (darwin_function_section): Place unlikely
164 executed global init code into the standard cold section.
166 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
169 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::vsetvl_fusion): Add TDF_DETAILS.
170 (pass_vsetvl::pre_vsetvl): Ditto.
171 (pass_vsetvl::init): Ditto.
172 (pass_vsetvl::lazy_vsetvl): Ditto.
174 2023-09-09 Lulu Cheng <chenglulu@loongson.cn>
176 * config/loongarch/loongarch.md (mulsidi3_64bit):
177 Field unsigned extension support.
178 (<u>muldi3_highpart): Modify template name.
179 (<u>mulsi3_highpart): Likewise.
180 (<u>mulsidi3_64bit): Field unsigned extension support.
181 (<su>muldi3_highpart): Modify muldi3_highpart to
183 (<su>mulsi3_highpart): Modify mulsi3_highpart to
186 2023-09-09 Xi Ruoyao <xry111@xry111.site>
188 * config/loongarch/loongarch.cc (loongarch_block_move_straight):
189 Check precondition (delta must be a power of 2) and use
190 popcount_hwi instead of a homebrew loop.
192 2023-09-09 Xi Ruoyao <xry111@xry111.site>
194 * config/loongarch/loongarch.h (LARCH_MAX_MOVE_PER_INSN):
195 Define to the maximum amount of bytes able to be loaded or
196 stored with one machine instruction.
197 * config/loongarch/loongarch.cc (loongarch_mode_for_move_size):
199 (loongarch_block_move_straight): Call
200 loongarch_mode_for_move_size for machine_mode to be moved.
201 (loongarch_expand_block_move): Use LARCH_MAX_MOVE_PER_INSN
202 instead of UNITS_PER_WORD.
204 2023-09-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
206 * config/riscv/vector-iterators.md: Fix floating-point operations predicate.
208 2023-09-09 Lehua Ding <lehua.ding@rivai.ai>
210 * fold-const.cc (can_min_p): New function.
211 (poly_int_binop): Try fold MIN_EXPR.
213 2023-09-08 Aldy Hernandez <aldyh@redhat.com>
215 * range-op-float.cc (foperator_ltgt::fold_range): Do not special
216 case VREL_EQ nor call frelop_early_resolve.
218 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
220 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
222 (*extendhi<SUPERQI:mode>2_th_ext): New INSN.
223 (*extendqi<SUPERQI:mode>2_th_ext): New INSN.
225 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
227 * config/riscv/thead.md: Use more appropriate mode attributes
230 2023-09-08 Guo Jie <guojie@loongson.cn>
232 * common/config/loongarch/loongarch-common.cc:
233 (default_options loongarch_option_optimization_table):
234 Default to -fsched-pressure.
236 2023-09-08 Yang Yujie <yangyujie@loongson.cn>
238 * config.gcc: remove non-POSIX syntax "<<<".
240 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
242 * config/riscv/bitmanip.md (*extend<SHORT:mode><SUPERQI:mode>2_zbb):
243 Rename postfix to _bitmanip.
244 (*extend<SHORT:mode><SUPERQI:mode>2_bitmanip): Renamed pattern.
245 (*zero_extendhi<GPR:mode>2_zbb): Remove duplicated pattern.
247 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
249 * config/riscv/riscv.cc (riscv_pass_in_vector_p): Only allow RVV type.
251 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
253 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Fix bug.
255 2023-09-07 liuhongt <hongtao.liu@intel.com>
258 (<avx512>_vpermt2var<mode>3<sd_maskz_name>): New define_insn.
259 (VHFBF_AVX512VL): New mode iterator.
260 (VI2HFBF_AVX512VL): New mode iterator.
262 2023-09-07 Aldy Hernandez <aldyh@redhat.com>
264 * value-range.h (contains_zero_p): Return false for undefined ranges.
265 * range-op-float.cc (operator_gt::op1_op2_relation): Adjust for
266 contains_zero_p change above.
267 (operator_ge::op1_op2_relation): Same.
268 (operator_equal::op1_op2_relation): Same.
269 (operator_not_equal::op1_op2_relation): Same.
270 (operator_lt::op1_op2_relation): Same.
271 (operator_le::op1_op2_relation): Same.
272 (operator_ge::op1_op2_relation): Same.
273 * range-op.cc (operator_equal::op1_op2_relation): Same.
274 (operator_not_equal::op1_op2_relation): Same.
275 (operator_lt::op1_op2_relation): Same.
276 (operator_le::op1_op2_relation): Same.
277 (operator_cast::op1_range): Same.
278 (set_nonzero_range_from_mask): Same.
279 (operator_bitwise_xor::op1_range): Same.
280 (operator_addr_expr::fold_range): Same.
281 (operator_addr_expr::op1_range): Same.
283 2023-09-07 Andrew MacLeod <amacleod@redhat.com>
285 PR tree-optimization/110875
286 * gimple-range.cc (gimple_ranger::prefill_name): Only invoke
287 cache-prefilling routine when the ssa-name has no global value.
289 2023-09-07 Vladimir N. Makarov <vmakarov@redhat.com>
292 * lra-constraints.cc (goal_reuse_alt_p): New global flag.
293 (process_alt_operands): Set up the flag. Clear flag for chosen
294 alternative with special memory constraints.
295 (process_alt_operands): Set up used insn alternative depending on the flag.
297 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
299 * config/riscv/autovec-vls.md: Add VLS mask modes mov patterns.
300 * config/riscv/riscv.md: Ditto.
301 * config/riscv/vector-iterators.md: Ditto.
302 * config/riscv/vector.md: Ditto.
304 2023-09-07 David Malcolm <dmalcolm@redhat.com>
306 * diagnostic-core.h (error_meta): New decl.
307 * diagnostic.cc (error_meta): New.
309 2023-09-07 Jakub Jelinek <jakub@redhat.com>
312 * expr.cc (expand_expr_real_1): Don't call targetm.c.bitint_type_info
313 inside gcc_assert, as later code relies on it filling info variable.
314 * gimple-fold.cc (clear_padding_bitint_needs_padding_p,
315 clear_padding_type): Likewise.
316 * varasm.cc (output_constant): Likewise.
317 * fold-const.cc (native_encode_int, native_interpret_int): Likewise.
318 * stor-layout.cc (finish_bitfield_representative, layout_type):
320 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
322 2023-09-07 Xi Ruoyao <xry111@xry111.site>
325 * config/loongarch/loongarch-protos.h
326 (loongarch_pre_reload_split): Declare new function.
327 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
328 * config/loongarch/loongarch.cc
329 (loongarch_pre_reload_split): Implement.
330 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
331 * config/loongarch/predicates.md (ins_zero_bitmask_operand):
333 * config/loongarch/loongarch.md (bstrins_<mode>_for_mask):
334 New define_insn_and_split.
335 (bstrins_<mode>_for_ior_mask): Likewise.
336 (define_peephole2): Further optimize code sequence produced by
337 bstrins_<mode>_for_ior_mask if possible.
339 2023-09-07 Richard Sandiford <richard.sandiford@arm.com>
341 * lra-eliminations.cc (lra_eliminate_regs_1): Use simplify_gen_binary
342 rather than gen_rtx_PLUS.
344 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
347 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_earliest_vsetvls): Remove.
348 (pass_vsetvl::df_post_optimization): Remove incorrect function.
350 2023-09-07 Tsukasa OI <research_trasio@irq.a4lg.com>
352 * common/config/riscv/riscv-common.cc (riscv_ext_flag_table):
353 Parse 'XVentanaCondOps' extension.
354 * config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): New.
355 (TARGET_XVENTANACONDOPS): Ditto.
356 (TARGET_ZICOND_LIKE): New to represent targets with conditional
357 moves like 'Zicond'. It includes RV64 + 'XVentanaCondOps'.
358 * config/riscv/riscv.cc (riscv_rtx_costs): Replace TARGET_ZICOND
359 with TARGET_ZICOND_LIKE.
360 (riscv_expand_conditional_move): Ditto.
361 * config/riscv/riscv.md (mov<mode>cc): Replace TARGET_ZICOND with
363 * config/riscv/riscv.opt: Add new riscv_xventana_subext.
364 * config/riscv/zicond.md: Modify description.
365 (eqz_ventana): New to match corresponding czero instructions.
366 (nez_ventana): Ditto.
367 (*czero.<eqz>.<GPR><X>): Emit a 'XVentanaCondOps' instruction if
368 'Zicond' is not available but 'XVentanaCondOps' + RV64 is.
369 (*czero.<eqz>.<GPR><X>): Ditto.
370 (*czero.eqz.<GPR><X>.opt1): Ditto.
371 (*czero.nez.<GPR><X>.opt2): Ditto.
373 2023-09-06 Ian Lance Taylor <iant@golang.org>
376 * godump.cc (go_format_type): Handle BITINT_TYPE.
378 2023-09-06 Jakub Jelinek <jakub@redhat.com>
381 * tree.cc (build_one_cst, build_minus_one_cst): Handle BITINT_TYPE
384 2023-09-06 Jakub Jelinek <jakub@redhat.com>
387 * gimple-lower-bitint.cc (bitint_large_huge::if_then_else,
388 bitint_large_huge::if_then_if_then_else): Use make_single_succ_edge
389 rather than make_edge, initialize bb->count.
391 2023-09-06 Jakub Jelinek <jakub@redhat.com>
394 * doc/libgcc.texi (Bit-precise integer arithmetic functions):
395 Document general rules for _BitInt support library functions
396 and document __mulbitint3 and __divmodbitint4.
397 (Conversion functions): Document __fix{s,d,x,t}fbitint,
398 __floatbitint{s,d,x,t,h,b}f, __bid_fix{s,d,t}dbitint and
399 __bid_floatbitint{s,d,t}d.
401 2023-09-06 Jakub Jelinek <jakub@redhat.com>
404 * glimits.h (BITINT_MAXWIDTH): Define if __BITINT_MAXWIDTH__ is
407 2023-09-06 Jakub Jelinek <jakub@redhat.com>
410 * internal-fn.cc (expand_ubsan_result_store): Add LHS, MODE and
411 DO_ERROR arguments. For non-mode precision BITINT_TYPE results
412 check if all padding bits up to mode precision are zeros or sign
413 bit copies and if not, jump to DO_ERROR.
414 (expand_addsub_overflow, expand_neg_overflow, expand_mul_overflow):
415 Adjust expand_ubsan_result_store callers.
416 * ubsan.cc: Include target.h and langhooks.h.
417 (ubsan_encode_value): Pass BITINT_TYPE values which fit into pointer
418 size converted to pointer sized integer, pass BITINT_TYPE values
419 which fit into TImode (if supported) or DImode as those integer types
420 or otherwise for now punt (pass 0).
421 (ubsan_type_descriptor): Handle BITINT_TYPE. For pstyle of
422 UBSAN_PRINT_FORCE_INT use TK_Integer (0x0000) mode with a
423 TImode/DImode precision rather than TK_Unknown used otherwise for
424 large/huge BITINT_TYPEs.
425 (instrument_si_overflow): Instrument BITINT_TYPE operations even when
426 they don't have mode precision.
427 * ubsan.h (enum ubsan_print_style): New enumerator.
429 2023-09-06 Jakub Jelinek <jakub@redhat.com>
432 * config/i386/i386.cc (classify_argument): Handle BITINT_TYPE.
433 (ix86_bitint_type_info): New function.
434 (TARGET_C_BITINT_TYPE_INFO): Redefine.
436 2023-09-06 Jakub Jelinek <jakub@redhat.com>
439 * Makefile.in (OBJS): Add gimple-lower-bitint.o.
440 * passes.def: Add pass_lower_bitint after pass_lower_complex and
441 pass_lower_bitint_O0 after pass_lower_complex_O0.
442 * tree-pass.h (PROP_gimple_lbitint): Define.
443 (make_pass_lower_bitint_O0, make_pass_lower_bitint): Declare.
444 * gimple-lower-bitint.h: New file.
445 * tree-ssa-live.h (struct _var_map): Add bitint member.
446 (init_var_map): Adjust declaration.
447 (region_contains_p): Handle map->bitint like map->outofssa_p.
448 * tree-ssa-live.cc (init_var_map): Add BITINT argument, initialize
449 map->bitint and set map->outofssa_p to false if it is non-NULL.
450 * tree-ssa-coalesce.cc: Include gimple-lower-bitint.h.
451 (build_ssa_conflict_graph): Call build_bitint_stmt_ssa_conflicts if
453 (create_coalesce_list_for_region): For map->bitint ignore SSA_NAMEs
454 not in that bitmap, and allow res without default def.
455 (compute_optimized_partition_bases): In map->bitint mode try hard to
456 coalesce any SSA_NAMEs with the same size.
457 (coalesce_bitint): New function.
458 (coalesce_ssa_name): In map->bitint mode, or map->bitmap into
459 used_in_copies and call coalesce_bitint.
460 * gimple-lower-bitint.cc: New file.
462 2023-09-06 Jakub Jelinek <jakub@redhat.com>
465 * tree.def (BITINT_TYPE): New type.
466 * tree.h (TREE_CHECK6, TREE_NOT_CHECK6): Define.
467 (NUMERICAL_TYPE_CHECK, INTEGRAL_TYPE_P): Include
469 (BITINT_TYPE_P): Define.
470 (CONSTRUCTOR_BITFIELD_P): Return true even for BLKmode bit-fields if
471 they have BITINT_TYPE type.
472 (tree_check6, tree_not_check6): New inline functions.
473 (any_integral_type_check): Include BITINT_TYPE.
474 (build_bitint_type): Declare.
475 * tree.cc (tree_code_size, wide_int_to_tree_1, cache_integer_cst,
476 build_zero_cst, type_hash_canon_hash, type_cache_hasher::equal,
477 type_hash_canon): Handle BITINT_TYPE.
478 (bitint_type_cache): New variable.
479 (build_bitint_type): New function.
480 (signed_or_unsigned_type_for, verify_type_variant, verify_type):
482 (tree_cc_finalize): Free bitint_type_cache.
483 * builtins.cc (type_to_class): Handle BITINT_TYPE.
484 (fold_builtin_unordered_cmp): Handle BITINT_TYPE like INTEGER_TYPE.
485 * cfgexpand.cc (expand_debug_expr): Punt on BLKmode BITINT_TYPE
487 * convert.cc (convert_to_pointer_1, convert_to_real_1,
488 convert_to_complex_1): Handle BITINT_TYPE like INTEGER_TYPE.
489 (convert_to_integer_1): Likewise. For BITINT_TYPE don't check
490 GET_MODE_PRECISION (TYPE_MODE (type)).
491 * doc/generic.texi (BITINT_TYPE): Document.
492 * doc/tm.texi.in (TARGET_C_BITINT_TYPE_INFO): New.
493 * doc/tm.texi: Regenerated.
494 * dwarf2out.cc (base_type_die, is_base_type, modified_type_die,
495 gen_type_die_with_usage): Handle BITINT_TYPE.
496 (rtl_for_decl_init): Punt on BLKmode BITINT_TYPE INTEGER_CSTs or
497 handle those which fit into shwi.
498 * expr.cc (expand_expr_real_1): Define EXTEND_BITINT macro, reduce
499 to bitfield precision reads from BITINT_TYPE vars, parameters or
500 memory locations. Expand large/huge BITINT_TYPE INTEGER_CSTs into
502 * fold-const.cc (fold_convert_loc, make_range_step): Handle
504 (extract_muldiv_1): For BITINT_TYPE use TYPE_PRECISION rather than
505 GET_MODE_SIZE (SCALAR_INT_TYPE_MODE).
506 (native_encode_int, native_interpret_int, native_interpret_expr):
508 * gimple-expr.cc (useless_type_conversion_p): Make BITINT_TYPE
509 to some other integral type or vice versa conversions non-useless.
510 * gimple-fold.cc (gimple_fold_builtin_memset): Punt for BITINT_TYPE.
511 (clear_padding_unit): Mention in comment that _BitInt types don't need
513 (clear_padding_bitint_needs_padding_p): New function.
514 (clear_padding_type_may_have_padding_p): Handle BITINT_TYPE.
515 (clear_padding_type): Likewise.
516 * internal-fn.cc (expand_mul_overflow): For unsigned non-mode
517 precision operands force pos_neg? to 1.
518 (expand_MULBITINT, expand_DIVMODBITINT, expand_FLOATTOBITINT,
519 expand_BITINTTOFLOAT): New functions.
520 * internal-fn.def (MULBITINT, DIVMODBITINT, FLOATTOBITINT,
521 BITINTTOFLOAT): New internal functions.
522 * internal-fn.h (expand_MULBITINT, expand_DIVMODBITINT,
523 expand_FLOATTOBITINT, expand_BITINTTOFLOAT): Declare.
524 * match.pd (non-equality compare simplifications from fold_binary):
525 Punt if TYPE_MODE (arg1_type) is BLKmode.
526 * pretty-print.h (pp_wide_int): Handle printing of large precision
527 wide_ints which would buffer overflow digit_buffer.
528 * stor-layout.cc (finish_bitfield_representative): For bit-fields
529 with BITINT_TYPE, prefer representatives with precisions in
530 multiple of limb precision.
531 (layout_type): Handle BITINT_TYPE. Handle COMPLEX_TYPE with BLKmode
532 element type and assert it is BITINT_TYPE.
533 * target.def (bitint_type_info): New C target hook.
534 * target.h (struct bitint_info): New type.
535 * targhooks.cc (default_bitint_type_info): New function.
536 * targhooks.h (default_bitint_type_info): Declare.
537 * tree-pretty-print.cc (dump_generic_node): Handle BITINT_TYPE.
538 Handle printing large wide_ints which would buffer overflow
540 * tree-ssa-sccvn.cc: Include target.h.
541 (eliminate_dom_walker::eliminate_stmt): Punt for large/huge
543 * tree-switch-conversion.cc (jump_table_cluster::emit): For more than
544 64-bit BITINT_TYPE subtract low bound from expression and cast to
545 64-bit integer type both the controlling expression and case labels.
546 * typeclass.h (enum type_class): Add bitint_type_class enumerator.
547 * varasm.cc (output_constant): Handle BITINT_TYPE INTEGER_CSTs.
548 * vr-values.cc (check_for_binary_op_overflow): Use widest2_int rather
550 (simplify_using_ranges::simplify_internal_call_using_ranges): Use
551 unsigned_type_for rather than build_nonstandard_integer_type.
553 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
556 * config/riscv/riscv.cc (riscv_modes_tieable_p): Fix incorrect mode
557 tieable for RVV modes.
559 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
562 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Bug fix.
564 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
566 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Remove TARGET_64BIT
568 2023-09-06 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
570 * config/xtensa/xtensa.cc (xtensa_expand_scc):
571 Add code for particular constants (only 0 and INT_MIN for now)
572 for EQ/NE boolean evaluation in SImode.
573 * config/xtensa/xtensa.md (*eqne_INT_MIN): Remove because its
574 implementation has been integrated into the above.
576 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
579 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>):
581 (*pred_widen_mulsu<mode>): Delete.
582 (*pred_single_widen_mul<mode>): Delete.
583 (*dual_widen_<any_widen_binop:optab><any_extend:su><mode>):
584 Add new combine patterns.
585 (*single_widen_sub<any_extend:su><mode>): Ditto.
586 (*single_widen_add<any_extend:su><mode>): Ditto.
587 (*single_widen_mult<any_extend:su><mode>): Ditto.
588 (*dual_widen_mulsu<mode>): Ditto.
589 (*dual_widen_mulus<mode>): Ditto.
590 (*dual_widen_<optab><mode>): Ditto.
591 (*single_widen_add<mode>): Ditto.
592 (*single_widen_sub<mode>): Ditto.
593 (*single_widen_mult<mode>): Ditto.
594 * config/riscv/autovec.md (<optab><mode>3):
595 Change define_expand to define_insn_and_split.
596 (<optab><mode>2): Ditto.
598 (smul<mode>3_highpart): Ditto.
599 (umul<mode>3_highpart): Ditto.
601 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
603 * config/riscv/riscv-protos.h (riscv_declare_function_name): Add protos.
604 (riscv_asm_output_alias): Ditto.
605 (riscv_asm_output_external): Ditto.
606 * config/riscv/riscv.cc (riscv_asm_output_variant_cc):
607 Output .variant_cc directive for vector function.
608 (riscv_declare_function_name): Ditto.
609 (riscv_asm_output_alias): Ditto.
610 (riscv_asm_output_external): Ditto.
611 * config/riscv/riscv.h (ASM_DECLARE_FUNCTION_NAME):
612 Implement ASM_DECLARE_FUNCTION_NAME.
613 (ASM_OUTPUT_DEF_FROM_DECLS): Implement ASM_OUTPUT_DEF_FROM_DECLS.
614 (ASM_OUTPUT_EXTERNAL): Implement ASM_OUTPUT_EXTERNAL.
616 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
618 * config/riscv/riscv-sr.cc (riscv_remove_unneeded_save_restore_calls): Pass riscv_cc.
619 * config/riscv/riscv.cc (struct riscv_frame_info): Add new fileds.
620 (riscv_frame_info::reset): Reset new fileds.
621 (riscv_call_tls_get_addr): Pass riscv_cc.
622 (riscv_function_arg): Return riscv_cc for call patterm.
623 (get_riscv_cc): New function return riscv_cc from rtl call_insn.
624 (riscv_insn_callee_abi): Implement TARGET_INSN_CALLEE_ABI.
625 (riscv_save_reg_p): Add vector callee-saved check.
626 (riscv_stack_align): Add vector save area comment.
627 (riscv_compute_frame_info): Ditto.
628 (riscv_restore_reg): Update for type change.
629 (riscv_for_each_saved_v_reg): New function save vector registers.
630 (riscv_first_stack_step): Handle funciton with vector callee-saved registers.
631 (riscv_expand_prologue): Ditto.
632 (riscv_expand_epilogue): Ditto.
633 (riscv_output_mi_thunk): Pass riscv_cc.
634 (TARGET_INSN_CALLEE_ABI): Implement TARGET_INSN_CALLEE_ABI.
635 * config/riscv/riscv.h (get_riscv_cc): Export get_riscv_cc function.
636 * config/riscv/riscv.md: Add CALLEE_CC operand for call pattern.
638 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
640 * config/riscv/riscv-protos.h (builtin_type_p): New function for checking vector type.
641 * config/riscv/riscv-vector-builtins.cc (builtin_type_p): Ditto.
642 * config/riscv/riscv.cc (struct riscv_arg_info): New fields.
643 (riscv_init_cumulative_args): Setup variant_cc field.
644 (riscv_vector_type_p): New function for checking vector type.
645 (riscv_hard_regno_nregs): Hoist declare.
646 (riscv_get_vector_arg): Subroutine of riscv_get_arg_info.
647 (riscv_get_arg_info): Support vector cc.
648 (riscv_function_arg_advance): Update cum.
649 (riscv_pass_by_reference): Handle vector args.
650 (riscv_v_abi): New function return vector abi.
651 (riscv_return_value_is_vector_type_p): New function for check vector arguments.
652 (riscv_arguments_is_vector_type_p): New function for check vector returns.
653 (riscv_fntype_abi): Implement TARGET_FNTYPE_ABI.
654 (TARGET_FNTYPE_ABI): Implement TARGET_FNTYPE_ABI.
655 * config/riscv/riscv.h (GCC_RISCV_H): Define macros for vector abi.
656 (MAX_ARGS_IN_VECTOR_REGISTERS): Ditto.
657 (MAX_ARGS_IN_MASK_REGISTERS): Ditto.
658 (V_ARG_FIRST): Ditto.
660 (enum riscv_cc): Define all RISCV_CC variants.
661 * config/riscv/riscv.opt: Add --param=riscv-vector-abi.
663 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
665 * config/riscv/autovec-opt.md (*cond_<optab><mode>):
666 Add sqrt + vcond_mask combine pattern.
667 * config/riscv/autovec.md (<optab><mode>2):
668 Change define_expand to define_insn_and_split.
670 2023-09-06 Jason Merrill <jason@redhat.com>
672 * common.opt: Update -fabi-version=19.
674 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
676 * config/riscv/zicond.md: Add closing parent to a comment.
678 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
680 * config/riscv/riscv.cc (riscv_expand_conditional_move): Force
681 large constant cons/alt into a register.
683 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
685 * config/riscv/riscv.cc (riscv_build_integer_1): Don't
686 require one zero bit in the upper 32 bits for LI+RORI synthesis.
688 2023-09-05 Jeff Law <jlaw@ventanamicro.com>
690 * config/riscv/bitmanip.md (bswapsi2): Expose for TARGET_64BIT.
692 2023-09-05 Andrew Pinski <apinski@marvell.com>
694 PR tree-optimization/98710
695 * match.pd (`(x | c) & ~(y | c)`, `(x & c) | ~(y & c)`): New pattern.
696 (`x & ~(y | x)`, `x | ~(y & x)`): New patterns.
698 2023-09-05 Andrew Pinski <apinski@marvell.com>
700 PR tree-optimization/103536
701 * match.pd (`(x | y) & (x & z)`,
702 `(x & y) | (x | z)`): New patterns.
704 2023-09-05 Andrew Pinski <apinski@marvell.com>
706 PR tree-optimization/107137
707 * match.pd (`(nop_convert)-(convert)a`): New pattern.
709 2023-09-05 Andrew Pinski <apinski@marvell.com>
711 PR tree-optimization/96694
712 * match.pd (`~MAX(~X, Y)`, `~MIN(~X, Y)`): New patterns.
714 2023-09-05 Andrew Pinski <apinski@marvell.com>
716 PR tree-optimization/105832
717 * match.pd (`(1 >> X) != 0`): New pattern
719 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
721 * config/riscv/riscv.md: Update/Add types
723 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
725 * config/riscv/pic.md: Update types
727 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
729 * config/riscv/riscv.cc (riscv_build_integer_1): Enable constant
730 synthesis with rotate-right for XTheadBb.
732 2023-09-05 Vineet Gupta <vineetg@rivosinc.com>
734 * config/riscv/zicond.md: Fix op2 pattern.
736 2023-09-05 Szabolcs Nagy <szabolcs.nagy@arm.com>
738 * config/aarch64/aarch64.h (AARCH64_ISA_RCPC): Remove dup.
740 2023-09-05 Xi Ruoyao <xry111@xry111.site>
742 * config/loongarch/loongarch-opts.h (HAVE_AS_EXPLICIT_RELOCS):
743 Define to 0 if not defined yet.
745 2023-09-05 Kito Cheng <kito.cheng@sifive.com>
747 * config/riscv/linux.h (TARGET_ASM_FILE_END): Move ...
748 * config/riscv/riscv.cc (TARGET_ASM_FILE_END): to here.
750 2023-09-05 Pan Li <pan2.li@intel.com>
752 * config/riscv/autovec-vls.md (copysign<mode>3): New pattern.
753 * config/riscv/vector.md: Extend iterator for VLS.
755 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
757 * config.gcc: Export the header file lasxintrin.h.
758 * config/loongarch/loongarch-builtins.cc (enum loongarch_builtin_type):
759 Add Loongson ASX builtin functions support.
761 (LASX_BUILTIN): Ditto.
762 (LASX_NO_TARGET_BUILTIN): Ditto.
763 (LASX_BUILTIN_TEST_BRANCH): Ditto.
764 (CODE_FOR_lasx_xvsadd_b): Ditto.
765 (CODE_FOR_lasx_xvsadd_h): Ditto.
766 (CODE_FOR_lasx_xvsadd_w): Ditto.
767 (CODE_FOR_lasx_xvsadd_d): Ditto.
768 (CODE_FOR_lasx_xvsadd_bu): Ditto.
769 (CODE_FOR_lasx_xvsadd_hu): Ditto.
770 (CODE_FOR_lasx_xvsadd_wu): Ditto.
771 (CODE_FOR_lasx_xvsadd_du): Ditto.
772 (CODE_FOR_lasx_xvadd_b): Ditto.
773 (CODE_FOR_lasx_xvadd_h): Ditto.
774 (CODE_FOR_lasx_xvadd_w): Ditto.
775 (CODE_FOR_lasx_xvadd_d): Ditto.
776 (CODE_FOR_lasx_xvaddi_bu): Ditto.
777 (CODE_FOR_lasx_xvaddi_hu): Ditto.
778 (CODE_FOR_lasx_xvaddi_wu): Ditto.
779 (CODE_FOR_lasx_xvaddi_du): Ditto.
780 (CODE_FOR_lasx_xvand_v): Ditto.
781 (CODE_FOR_lasx_xvandi_b): Ditto.
782 (CODE_FOR_lasx_xvbitsel_v): Ditto.
783 (CODE_FOR_lasx_xvseqi_b): Ditto.
784 (CODE_FOR_lasx_xvseqi_h): Ditto.
785 (CODE_FOR_lasx_xvseqi_w): Ditto.
786 (CODE_FOR_lasx_xvseqi_d): Ditto.
787 (CODE_FOR_lasx_xvslti_b): Ditto.
788 (CODE_FOR_lasx_xvslti_h): Ditto.
789 (CODE_FOR_lasx_xvslti_w): Ditto.
790 (CODE_FOR_lasx_xvslti_d): Ditto.
791 (CODE_FOR_lasx_xvslti_bu): Ditto.
792 (CODE_FOR_lasx_xvslti_hu): Ditto.
793 (CODE_FOR_lasx_xvslti_wu): Ditto.
794 (CODE_FOR_lasx_xvslti_du): Ditto.
795 (CODE_FOR_lasx_xvslei_b): Ditto.
796 (CODE_FOR_lasx_xvslei_h): Ditto.
797 (CODE_FOR_lasx_xvslei_w): Ditto.
798 (CODE_FOR_lasx_xvslei_d): Ditto.
799 (CODE_FOR_lasx_xvslei_bu): Ditto.
800 (CODE_FOR_lasx_xvslei_hu): Ditto.
801 (CODE_FOR_lasx_xvslei_wu): Ditto.
802 (CODE_FOR_lasx_xvslei_du): Ditto.
803 (CODE_FOR_lasx_xvdiv_b): Ditto.
804 (CODE_FOR_lasx_xvdiv_h): Ditto.
805 (CODE_FOR_lasx_xvdiv_w): Ditto.
806 (CODE_FOR_lasx_xvdiv_d): Ditto.
807 (CODE_FOR_lasx_xvdiv_bu): Ditto.
808 (CODE_FOR_lasx_xvdiv_hu): Ditto.
809 (CODE_FOR_lasx_xvdiv_wu): Ditto.
810 (CODE_FOR_lasx_xvdiv_du): Ditto.
811 (CODE_FOR_lasx_xvfadd_s): Ditto.
812 (CODE_FOR_lasx_xvfadd_d): Ditto.
813 (CODE_FOR_lasx_xvftintrz_w_s): Ditto.
814 (CODE_FOR_lasx_xvftintrz_l_d): Ditto.
815 (CODE_FOR_lasx_xvftintrz_wu_s): Ditto.
816 (CODE_FOR_lasx_xvftintrz_lu_d): Ditto.
817 (CODE_FOR_lasx_xvffint_s_w): Ditto.
818 (CODE_FOR_lasx_xvffint_d_l): Ditto.
819 (CODE_FOR_lasx_xvffint_s_wu): Ditto.
820 (CODE_FOR_lasx_xvffint_d_lu): Ditto.
821 (CODE_FOR_lasx_xvfsub_s): Ditto.
822 (CODE_FOR_lasx_xvfsub_d): Ditto.
823 (CODE_FOR_lasx_xvfmul_s): Ditto.
824 (CODE_FOR_lasx_xvfmul_d): Ditto.
825 (CODE_FOR_lasx_xvfdiv_s): Ditto.
826 (CODE_FOR_lasx_xvfdiv_d): Ditto.
827 (CODE_FOR_lasx_xvfmax_s): Ditto.
828 (CODE_FOR_lasx_xvfmax_d): Ditto.
829 (CODE_FOR_lasx_xvfmin_s): Ditto.
830 (CODE_FOR_lasx_xvfmin_d): Ditto.
831 (CODE_FOR_lasx_xvfsqrt_s): Ditto.
832 (CODE_FOR_lasx_xvfsqrt_d): Ditto.
833 (CODE_FOR_lasx_xvflogb_s): Ditto.
834 (CODE_FOR_lasx_xvflogb_d): Ditto.
835 (CODE_FOR_lasx_xvmax_b): Ditto.
836 (CODE_FOR_lasx_xvmax_h): Ditto.
837 (CODE_FOR_lasx_xvmax_w): Ditto.
838 (CODE_FOR_lasx_xvmax_d): Ditto.
839 (CODE_FOR_lasx_xvmaxi_b): Ditto.
840 (CODE_FOR_lasx_xvmaxi_h): Ditto.
841 (CODE_FOR_lasx_xvmaxi_w): Ditto.
842 (CODE_FOR_lasx_xvmaxi_d): Ditto.
843 (CODE_FOR_lasx_xvmax_bu): Ditto.
844 (CODE_FOR_lasx_xvmax_hu): Ditto.
845 (CODE_FOR_lasx_xvmax_wu): Ditto.
846 (CODE_FOR_lasx_xvmax_du): Ditto.
847 (CODE_FOR_lasx_xvmaxi_bu): Ditto.
848 (CODE_FOR_lasx_xvmaxi_hu): Ditto.
849 (CODE_FOR_lasx_xvmaxi_wu): Ditto.
850 (CODE_FOR_lasx_xvmaxi_du): Ditto.
851 (CODE_FOR_lasx_xvmin_b): Ditto.
852 (CODE_FOR_lasx_xvmin_h): Ditto.
853 (CODE_FOR_lasx_xvmin_w): Ditto.
854 (CODE_FOR_lasx_xvmin_d): Ditto.
855 (CODE_FOR_lasx_xvmini_b): Ditto.
856 (CODE_FOR_lasx_xvmini_h): Ditto.
857 (CODE_FOR_lasx_xvmini_w): Ditto.
858 (CODE_FOR_lasx_xvmini_d): Ditto.
859 (CODE_FOR_lasx_xvmin_bu): Ditto.
860 (CODE_FOR_lasx_xvmin_hu): Ditto.
861 (CODE_FOR_lasx_xvmin_wu): Ditto.
862 (CODE_FOR_lasx_xvmin_du): Ditto.
863 (CODE_FOR_lasx_xvmini_bu): Ditto.
864 (CODE_FOR_lasx_xvmini_hu): Ditto.
865 (CODE_FOR_lasx_xvmini_wu): Ditto.
866 (CODE_FOR_lasx_xvmini_du): Ditto.
867 (CODE_FOR_lasx_xvmod_b): Ditto.
868 (CODE_FOR_lasx_xvmod_h): Ditto.
869 (CODE_FOR_lasx_xvmod_w): Ditto.
870 (CODE_FOR_lasx_xvmod_d): Ditto.
871 (CODE_FOR_lasx_xvmod_bu): Ditto.
872 (CODE_FOR_lasx_xvmod_hu): Ditto.
873 (CODE_FOR_lasx_xvmod_wu): Ditto.
874 (CODE_FOR_lasx_xvmod_du): Ditto.
875 (CODE_FOR_lasx_xvmul_b): Ditto.
876 (CODE_FOR_lasx_xvmul_h): Ditto.
877 (CODE_FOR_lasx_xvmul_w): Ditto.
878 (CODE_FOR_lasx_xvmul_d): Ditto.
879 (CODE_FOR_lasx_xvclz_b): Ditto.
880 (CODE_FOR_lasx_xvclz_h): Ditto.
881 (CODE_FOR_lasx_xvclz_w): Ditto.
882 (CODE_FOR_lasx_xvclz_d): Ditto.
883 (CODE_FOR_lasx_xvnor_v): Ditto.
884 (CODE_FOR_lasx_xvor_v): Ditto.
885 (CODE_FOR_lasx_xvori_b): Ditto.
886 (CODE_FOR_lasx_xvnori_b): Ditto.
887 (CODE_FOR_lasx_xvpcnt_b): Ditto.
888 (CODE_FOR_lasx_xvpcnt_h): Ditto.
889 (CODE_FOR_lasx_xvpcnt_w): Ditto.
890 (CODE_FOR_lasx_xvpcnt_d): Ditto.
891 (CODE_FOR_lasx_xvxor_v): Ditto.
892 (CODE_FOR_lasx_xvxori_b): Ditto.
893 (CODE_FOR_lasx_xvsll_b): Ditto.
894 (CODE_FOR_lasx_xvsll_h): Ditto.
895 (CODE_FOR_lasx_xvsll_w): Ditto.
896 (CODE_FOR_lasx_xvsll_d): Ditto.
897 (CODE_FOR_lasx_xvslli_b): Ditto.
898 (CODE_FOR_lasx_xvslli_h): Ditto.
899 (CODE_FOR_lasx_xvslli_w): Ditto.
900 (CODE_FOR_lasx_xvslli_d): Ditto.
901 (CODE_FOR_lasx_xvsra_b): Ditto.
902 (CODE_FOR_lasx_xvsra_h): Ditto.
903 (CODE_FOR_lasx_xvsra_w): Ditto.
904 (CODE_FOR_lasx_xvsra_d): Ditto.
905 (CODE_FOR_lasx_xvsrai_b): Ditto.
906 (CODE_FOR_lasx_xvsrai_h): Ditto.
907 (CODE_FOR_lasx_xvsrai_w): Ditto.
908 (CODE_FOR_lasx_xvsrai_d): Ditto.
909 (CODE_FOR_lasx_xvsrl_b): Ditto.
910 (CODE_FOR_lasx_xvsrl_h): Ditto.
911 (CODE_FOR_lasx_xvsrl_w): Ditto.
912 (CODE_FOR_lasx_xvsrl_d): Ditto.
913 (CODE_FOR_lasx_xvsrli_b): Ditto.
914 (CODE_FOR_lasx_xvsrli_h): Ditto.
915 (CODE_FOR_lasx_xvsrli_w): Ditto.
916 (CODE_FOR_lasx_xvsrli_d): Ditto.
917 (CODE_FOR_lasx_xvsub_b): Ditto.
918 (CODE_FOR_lasx_xvsub_h): Ditto.
919 (CODE_FOR_lasx_xvsub_w): Ditto.
920 (CODE_FOR_lasx_xvsub_d): Ditto.
921 (CODE_FOR_lasx_xvsubi_bu): Ditto.
922 (CODE_FOR_lasx_xvsubi_hu): Ditto.
923 (CODE_FOR_lasx_xvsubi_wu): Ditto.
924 (CODE_FOR_lasx_xvsubi_du): Ditto.
925 (CODE_FOR_lasx_xvpackod_d): Ditto.
926 (CODE_FOR_lasx_xvpackev_d): Ditto.
927 (CODE_FOR_lasx_xvpickod_d): Ditto.
928 (CODE_FOR_lasx_xvpickev_d): Ditto.
929 (CODE_FOR_lasx_xvrepli_b): Ditto.
930 (CODE_FOR_lasx_xvrepli_h): Ditto.
931 (CODE_FOR_lasx_xvrepli_w): Ditto.
932 (CODE_FOR_lasx_xvrepli_d): Ditto.
933 (CODE_FOR_lasx_xvandn_v): Ditto.
934 (CODE_FOR_lasx_xvorn_v): Ditto.
935 (CODE_FOR_lasx_xvneg_b): Ditto.
936 (CODE_FOR_lasx_xvneg_h): Ditto.
937 (CODE_FOR_lasx_xvneg_w): Ditto.
938 (CODE_FOR_lasx_xvneg_d): Ditto.
939 (CODE_FOR_lasx_xvbsrl_v): Ditto.
940 (CODE_FOR_lasx_xvbsll_v): Ditto.
941 (CODE_FOR_lasx_xvfmadd_s): Ditto.
942 (CODE_FOR_lasx_xvfmadd_d): Ditto.
943 (CODE_FOR_lasx_xvfmsub_s): Ditto.
944 (CODE_FOR_lasx_xvfmsub_d): Ditto.
945 (CODE_FOR_lasx_xvfnmadd_s): Ditto.
946 (CODE_FOR_lasx_xvfnmadd_d): Ditto.
947 (CODE_FOR_lasx_xvfnmsub_s): Ditto.
948 (CODE_FOR_lasx_xvfnmsub_d): Ditto.
949 (CODE_FOR_lasx_xvpermi_q): Ditto.
950 (CODE_FOR_lasx_xvpermi_d): Ditto.
951 (CODE_FOR_lasx_xbnz_v): Ditto.
952 (CODE_FOR_lasx_xbz_v): Ditto.
953 (CODE_FOR_lasx_xvssub_b): Ditto.
954 (CODE_FOR_lasx_xvssub_h): Ditto.
955 (CODE_FOR_lasx_xvssub_w): Ditto.
956 (CODE_FOR_lasx_xvssub_d): Ditto.
957 (CODE_FOR_lasx_xvssub_bu): Ditto.
958 (CODE_FOR_lasx_xvssub_hu): Ditto.
959 (CODE_FOR_lasx_xvssub_wu): Ditto.
960 (CODE_FOR_lasx_xvssub_du): Ditto.
961 (CODE_FOR_lasx_xvabsd_b): Ditto.
962 (CODE_FOR_lasx_xvabsd_h): Ditto.
963 (CODE_FOR_lasx_xvabsd_w): Ditto.
964 (CODE_FOR_lasx_xvabsd_d): Ditto.
965 (CODE_FOR_lasx_xvabsd_bu): Ditto.
966 (CODE_FOR_lasx_xvabsd_hu): Ditto.
967 (CODE_FOR_lasx_xvabsd_wu): Ditto.
968 (CODE_FOR_lasx_xvabsd_du): Ditto.
969 (CODE_FOR_lasx_xvavg_b): Ditto.
970 (CODE_FOR_lasx_xvavg_h): Ditto.
971 (CODE_FOR_lasx_xvavg_w): Ditto.
972 (CODE_FOR_lasx_xvavg_d): Ditto.
973 (CODE_FOR_lasx_xvavg_bu): Ditto.
974 (CODE_FOR_lasx_xvavg_hu): Ditto.
975 (CODE_FOR_lasx_xvavg_wu): Ditto.
976 (CODE_FOR_lasx_xvavg_du): Ditto.
977 (CODE_FOR_lasx_xvavgr_b): Ditto.
978 (CODE_FOR_lasx_xvavgr_h): Ditto.
979 (CODE_FOR_lasx_xvavgr_w): Ditto.
980 (CODE_FOR_lasx_xvavgr_d): Ditto.
981 (CODE_FOR_lasx_xvavgr_bu): Ditto.
982 (CODE_FOR_lasx_xvavgr_hu): Ditto.
983 (CODE_FOR_lasx_xvavgr_wu): Ditto.
984 (CODE_FOR_lasx_xvavgr_du): Ditto.
985 (CODE_FOR_lasx_xvmuh_b): Ditto.
986 (CODE_FOR_lasx_xvmuh_h): Ditto.
987 (CODE_FOR_lasx_xvmuh_w): Ditto.
988 (CODE_FOR_lasx_xvmuh_d): Ditto.
989 (CODE_FOR_lasx_xvmuh_bu): Ditto.
990 (CODE_FOR_lasx_xvmuh_hu): Ditto.
991 (CODE_FOR_lasx_xvmuh_wu): Ditto.
992 (CODE_FOR_lasx_xvmuh_du): Ditto.
993 (CODE_FOR_lasx_xvssran_b_h): Ditto.
994 (CODE_FOR_lasx_xvssran_h_w): Ditto.
995 (CODE_FOR_lasx_xvssran_w_d): Ditto.
996 (CODE_FOR_lasx_xvssran_bu_h): Ditto.
997 (CODE_FOR_lasx_xvssran_hu_w): Ditto.
998 (CODE_FOR_lasx_xvssran_wu_d): Ditto.
999 (CODE_FOR_lasx_xvssrarn_b_h): Ditto.
1000 (CODE_FOR_lasx_xvssrarn_h_w): Ditto.
1001 (CODE_FOR_lasx_xvssrarn_w_d): Ditto.
1002 (CODE_FOR_lasx_xvssrarn_bu_h): Ditto.
1003 (CODE_FOR_lasx_xvssrarn_hu_w): Ditto.
1004 (CODE_FOR_lasx_xvssrarn_wu_d): Ditto.
1005 (CODE_FOR_lasx_xvssrln_bu_h): Ditto.
1006 (CODE_FOR_lasx_xvssrln_hu_w): Ditto.
1007 (CODE_FOR_lasx_xvssrln_wu_d): Ditto.
1008 (CODE_FOR_lasx_xvssrlrn_bu_h): Ditto.
1009 (CODE_FOR_lasx_xvssrlrn_hu_w): Ditto.
1010 (CODE_FOR_lasx_xvssrlrn_wu_d): Ditto.
1011 (CODE_FOR_lasx_xvftint_w_s): Ditto.
1012 (CODE_FOR_lasx_xvftint_l_d): Ditto.
1013 (CODE_FOR_lasx_xvftint_wu_s): Ditto.
1014 (CODE_FOR_lasx_xvftint_lu_d): Ditto.
1015 (CODE_FOR_lasx_xvsllwil_h_b): Ditto.
1016 (CODE_FOR_lasx_xvsllwil_w_h): Ditto.
1017 (CODE_FOR_lasx_xvsllwil_d_w): Ditto.
1018 (CODE_FOR_lasx_xvsllwil_hu_bu): Ditto.
1019 (CODE_FOR_lasx_xvsllwil_wu_hu): Ditto.
1020 (CODE_FOR_lasx_xvsllwil_du_wu): Ditto.
1021 (CODE_FOR_lasx_xvsat_b): Ditto.
1022 (CODE_FOR_lasx_xvsat_h): Ditto.
1023 (CODE_FOR_lasx_xvsat_w): Ditto.
1024 (CODE_FOR_lasx_xvsat_d): Ditto.
1025 (CODE_FOR_lasx_xvsat_bu): Ditto.
1026 (CODE_FOR_lasx_xvsat_hu): Ditto.
1027 (CODE_FOR_lasx_xvsat_wu): Ditto.
1028 (CODE_FOR_lasx_xvsat_du): Ditto.
1029 (loongarch_builtin_vectorized_function): Ditto.
1030 (loongarch_expand_builtin_insn): Ditto.
1031 (loongarch_expand_builtin): Ditto.
1032 * config/loongarch/loongarch-ftypes.def (1): Ditto.
1036 * config/loongarch/lasxintrin.h: New file.
1038 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
1040 * config/loongarch/loongarch-modes.def
1041 (VECTOR_MODES): Add Loongson ASX instruction support.
1042 * config/loongarch/loongarch-protos.h (loongarch_split_256bit_move): Ditto.
1043 (loongarch_split_256bit_move_p): Ditto.
1044 (loongarch_expand_vector_group_init): Ditto.
1045 (loongarch_expand_vec_perm_1): Ditto.
1046 * config/loongarch/loongarch.cc (loongarch_symbol_insns): Ditto.
1047 (loongarch_valid_offset_p): Ditto.
1048 (loongarch_address_insns): Ditto.
1049 (loongarch_const_insns): Ditto.
1050 (loongarch_legitimize_move): Ditto.
1051 (loongarch_builtin_vectorization_cost): Ditto.
1052 (loongarch_split_move_p): Ditto.
1053 (loongarch_split_move): Ditto.
1054 (loongarch_output_move_index_float): Ditto.
1055 (loongarch_split_256bit_move_p): Ditto.
1056 (loongarch_split_256bit_move): Ditto.
1057 (loongarch_output_move): Ditto.
1058 (loongarch_print_operand_reloc): Ditto.
1059 (loongarch_print_operand): Ditto.
1060 (loongarch_hard_regno_mode_ok_uncached): Ditto.
1061 (loongarch_hard_regno_nregs): Ditto.
1062 (loongarch_class_max_nregs): Ditto.
1063 (loongarch_can_change_mode_class): Ditto.
1064 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
1065 (loongarch_vector_mode_supported_p): Ditto.
1066 (loongarch_preferred_simd_mode): Ditto.
1067 (loongarch_autovectorize_vector_modes): Ditto.
1068 (loongarch_lsx_output_division): Ditto.
1069 (loongarch_expand_lsx_shuffle): Ditto.
1070 (loongarch_expand_vec_perm): Ditto.
1071 (loongarch_expand_vec_perm_interleave): Ditto.
1072 (loongarch_try_expand_lsx_vshuf_const): Ditto.
1073 (loongarch_expand_vec_perm_even_odd_1): Ditto.
1074 (loongarch_expand_vec_perm_even_odd): Ditto.
1075 (loongarch_expand_vec_perm_1): Ditto.
1076 (loongarch_expand_vec_perm_const_2): Ditto.
1077 (loongarch_is_quad_duplicate): Ditto.
1078 (loongarch_is_double_duplicate): Ditto.
1079 (loongarch_is_odd_extraction): Ditto.
1080 (loongarch_is_even_extraction): Ditto.
1081 (loongarch_is_extraction_permutation): Ditto.
1082 (loongarch_is_center_extraction): Ditto.
1083 (loongarch_is_reversing_permutation): Ditto.
1084 (loongarch_is_di_misalign_extract): Ditto.
1085 (loongarch_is_si_misalign_extract): Ditto.
1086 (loongarch_is_lasx_lowpart_interleave): Ditto.
1087 (loongarch_is_lasx_lowpart_interleave_2): Ditto.
1088 (COMPARE_SELECTOR): Ditto.
1089 (loongarch_is_lasx_lowpart_extract): Ditto.
1090 (loongarch_is_lasx_highpart_interleave): Ditto.
1091 (loongarch_is_lasx_highpart_interleave_2): Ditto.
1092 (loongarch_is_elem_duplicate): Ditto.
1093 (loongarch_is_op_reverse_perm): Ditto.
1094 (loongarch_is_single_op_perm): Ditto.
1095 (loongarch_is_divisible_perm): Ditto.
1096 (loongarch_is_triple_stride_extract): Ditto.
1097 (loongarch_vectorize_vec_perm_const): Ditto.
1098 (loongarch_cpu_sched_reassociation_width): Ditto.
1099 (loongarch_expand_vector_extract): Ditto.
1100 (emit_reduc_half): Ditto.
1101 (loongarch_expand_vec_unpack): Ditto.
1102 (loongarch_expand_vector_group_init): Ditto.
1103 (loongarch_expand_vector_init): Ditto.
1104 (loongarch_expand_lsx_cmp): Ditto.
1105 (loongarch_builtin_support_vector_misalignment): Ditto.
1106 * config/loongarch/loongarch.h (UNITS_PER_LASX_REG): Ditto.
1107 (BITS_PER_LASX_REG): Ditto.
1108 (STRUCTURE_SIZE_BOUNDARY): Ditto.
1109 (LASX_REG_FIRST): Ditto.
1110 (LASX_REG_LAST): Ditto.
1111 (LASX_REG_NUM): Ditto.
1112 (LASX_REG_P): Ditto.
1113 (LASX_REG_RTX_P): Ditto.
1114 (LASX_SUPPORTED_MODE_P): Ditto.
1115 * config/loongarch/loongarch.md: Ditto.
1116 * config/loongarch/lasx.md: New file.
1118 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
1120 * config.gcc: Export the header file lsxintrin.h.
1121 * config/loongarch/loongarch-builtins.cc (LARCH_FTYPE_NAME4): Add builtin function support.
1122 (enum loongarch_builtin_type): Ditto.
1124 (LARCH_BUILTIN): Ditto.
1125 (LSX_BUILTIN): Ditto.
1126 (LSX_BUILTIN_TEST_BRANCH): Ditto.
1127 (LSX_NO_TARGET_BUILTIN): Ditto.
1128 (CODE_FOR_lsx_vsadd_b): Ditto.
1129 (CODE_FOR_lsx_vsadd_h): Ditto.
1130 (CODE_FOR_lsx_vsadd_w): Ditto.
1131 (CODE_FOR_lsx_vsadd_d): Ditto.
1132 (CODE_FOR_lsx_vsadd_bu): Ditto.
1133 (CODE_FOR_lsx_vsadd_hu): Ditto.
1134 (CODE_FOR_lsx_vsadd_wu): Ditto.
1135 (CODE_FOR_lsx_vsadd_du): Ditto.
1136 (CODE_FOR_lsx_vadd_b): Ditto.
1137 (CODE_FOR_lsx_vadd_h): Ditto.
1138 (CODE_FOR_lsx_vadd_w): Ditto.
1139 (CODE_FOR_lsx_vadd_d): Ditto.
1140 (CODE_FOR_lsx_vaddi_bu): Ditto.
1141 (CODE_FOR_lsx_vaddi_hu): Ditto.
1142 (CODE_FOR_lsx_vaddi_wu): Ditto.
1143 (CODE_FOR_lsx_vaddi_du): Ditto.
1144 (CODE_FOR_lsx_vand_v): Ditto.
1145 (CODE_FOR_lsx_vandi_b): Ditto.
1146 (CODE_FOR_lsx_bnz_v): Ditto.
1147 (CODE_FOR_lsx_bz_v): Ditto.
1148 (CODE_FOR_lsx_vbitsel_v): Ditto.
1149 (CODE_FOR_lsx_vseqi_b): Ditto.
1150 (CODE_FOR_lsx_vseqi_h): Ditto.
1151 (CODE_FOR_lsx_vseqi_w): Ditto.
1152 (CODE_FOR_lsx_vseqi_d): Ditto.
1153 (CODE_FOR_lsx_vslti_b): Ditto.
1154 (CODE_FOR_lsx_vslti_h): Ditto.
1155 (CODE_FOR_lsx_vslti_w): Ditto.
1156 (CODE_FOR_lsx_vslti_d): Ditto.
1157 (CODE_FOR_lsx_vslti_bu): Ditto.
1158 (CODE_FOR_lsx_vslti_hu): Ditto.
1159 (CODE_FOR_lsx_vslti_wu): Ditto.
1160 (CODE_FOR_lsx_vslti_du): Ditto.
1161 (CODE_FOR_lsx_vslei_b): Ditto.
1162 (CODE_FOR_lsx_vslei_h): Ditto.
1163 (CODE_FOR_lsx_vslei_w): Ditto.
1164 (CODE_FOR_lsx_vslei_d): Ditto.
1165 (CODE_FOR_lsx_vslei_bu): Ditto.
1166 (CODE_FOR_lsx_vslei_hu): Ditto.
1167 (CODE_FOR_lsx_vslei_wu): Ditto.
1168 (CODE_FOR_lsx_vslei_du): Ditto.
1169 (CODE_FOR_lsx_vdiv_b): Ditto.
1170 (CODE_FOR_lsx_vdiv_h): Ditto.
1171 (CODE_FOR_lsx_vdiv_w): Ditto.
1172 (CODE_FOR_lsx_vdiv_d): Ditto.
1173 (CODE_FOR_lsx_vdiv_bu): Ditto.
1174 (CODE_FOR_lsx_vdiv_hu): Ditto.
1175 (CODE_FOR_lsx_vdiv_wu): Ditto.
1176 (CODE_FOR_lsx_vdiv_du): Ditto.
1177 (CODE_FOR_lsx_vfadd_s): Ditto.
1178 (CODE_FOR_lsx_vfadd_d): Ditto.
1179 (CODE_FOR_lsx_vftintrz_w_s): Ditto.
1180 (CODE_FOR_lsx_vftintrz_l_d): Ditto.
1181 (CODE_FOR_lsx_vftintrz_wu_s): Ditto.
1182 (CODE_FOR_lsx_vftintrz_lu_d): Ditto.
1183 (CODE_FOR_lsx_vffint_s_w): Ditto.
1184 (CODE_FOR_lsx_vffint_d_l): Ditto.
1185 (CODE_FOR_lsx_vffint_s_wu): Ditto.
1186 (CODE_FOR_lsx_vffint_d_lu): Ditto.
1187 (CODE_FOR_lsx_vfsub_s): Ditto.
1188 (CODE_FOR_lsx_vfsub_d): Ditto.
1189 (CODE_FOR_lsx_vfmul_s): Ditto.
1190 (CODE_FOR_lsx_vfmul_d): Ditto.
1191 (CODE_FOR_lsx_vfdiv_s): Ditto.
1192 (CODE_FOR_lsx_vfdiv_d): Ditto.
1193 (CODE_FOR_lsx_vfmax_s): Ditto.
1194 (CODE_FOR_lsx_vfmax_d): Ditto.
1195 (CODE_FOR_lsx_vfmin_s): Ditto.
1196 (CODE_FOR_lsx_vfmin_d): Ditto.
1197 (CODE_FOR_lsx_vfsqrt_s): Ditto.
1198 (CODE_FOR_lsx_vfsqrt_d): Ditto.
1199 (CODE_FOR_lsx_vflogb_s): Ditto.
1200 (CODE_FOR_lsx_vflogb_d): Ditto.
1201 (CODE_FOR_lsx_vmax_b): Ditto.
1202 (CODE_FOR_lsx_vmax_h): Ditto.
1203 (CODE_FOR_lsx_vmax_w): Ditto.
1204 (CODE_FOR_lsx_vmax_d): Ditto.
1205 (CODE_FOR_lsx_vmaxi_b): Ditto.
1206 (CODE_FOR_lsx_vmaxi_h): Ditto.
1207 (CODE_FOR_lsx_vmaxi_w): Ditto.
1208 (CODE_FOR_lsx_vmaxi_d): Ditto.
1209 (CODE_FOR_lsx_vmax_bu): Ditto.
1210 (CODE_FOR_lsx_vmax_hu): Ditto.
1211 (CODE_FOR_lsx_vmax_wu): Ditto.
1212 (CODE_FOR_lsx_vmax_du): Ditto.
1213 (CODE_FOR_lsx_vmaxi_bu): Ditto.
1214 (CODE_FOR_lsx_vmaxi_hu): Ditto.
1215 (CODE_FOR_lsx_vmaxi_wu): Ditto.
1216 (CODE_FOR_lsx_vmaxi_du): Ditto.
1217 (CODE_FOR_lsx_vmin_b): Ditto.
1218 (CODE_FOR_lsx_vmin_h): Ditto.
1219 (CODE_FOR_lsx_vmin_w): Ditto.
1220 (CODE_FOR_lsx_vmin_d): Ditto.
1221 (CODE_FOR_lsx_vmini_b): Ditto.
1222 (CODE_FOR_lsx_vmini_h): Ditto.
1223 (CODE_FOR_lsx_vmini_w): Ditto.
1224 (CODE_FOR_lsx_vmini_d): Ditto.
1225 (CODE_FOR_lsx_vmin_bu): Ditto.
1226 (CODE_FOR_lsx_vmin_hu): Ditto.
1227 (CODE_FOR_lsx_vmin_wu): Ditto.
1228 (CODE_FOR_lsx_vmin_du): Ditto.
1229 (CODE_FOR_lsx_vmini_bu): Ditto.
1230 (CODE_FOR_lsx_vmini_hu): Ditto.
1231 (CODE_FOR_lsx_vmini_wu): Ditto.
1232 (CODE_FOR_lsx_vmini_du): Ditto.
1233 (CODE_FOR_lsx_vmod_b): Ditto.
1234 (CODE_FOR_lsx_vmod_h): Ditto.
1235 (CODE_FOR_lsx_vmod_w): Ditto.
1236 (CODE_FOR_lsx_vmod_d): Ditto.
1237 (CODE_FOR_lsx_vmod_bu): Ditto.
1238 (CODE_FOR_lsx_vmod_hu): Ditto.
1239 (CODE_FOR_lsx_vmod_wu): Ditto.
1240 (CODE_FOR_lsx_vmod_du): Ditto.
1241 (CODE_FOR_lsx_vmul_b): Ditto.
1242 (CODE_FOR_lsx_vmul_h): Ditto.
1243 (CODE_FOR_lsx_vmul_w): Ditto.
1244 (CODE_FOR_lsx_vmul_d): Ditto.
1245 (CODE_FOR_lsx_vclz_b): Ditto.
1246 (CODE_FOR_lsx_vclz_h): Ditto.
1247 (CODE_FOR_lsx_vclz_w): Ditto.
1248 (CODE_FOR_lsx_vclz_d): Ditto.
1249 (CODE_FOR_lsx_vnor_v): Ditto.
1250 (CODE_FOR_lsx_vor_v): Ditto.
1251 (CODE_FOR_lsx_vori_b): Ditto.
1252 (CODE_FOR_lsx_vnori_b): Ditto.
1253 (CODE_FOR_lsx_vpcnt_b): Ditto.
1254 (CODE_FOR_lsx_vpcnt_h): Ditto.
1255 (CODE_FOR_lsx_vpcnt_w): Ditto.
1256 (CODE_FOR_lsx_vpcnt_d): Ditto.
1257 (CODE_FOR_lsx_vxor_v): Ditto.
1258 (CODE_FOR_lsx_vxori_b): Ditto.
1259 (CODE_FOR_lsx_vsll_b): Ditto.
1260 (CODE_FOR_lsx_vsll_h): Ditto.
1261 (CODE_FOR_lsx_vsll_w): Ditto.
1262 (CODE_FOR_lsx_vsll_d): Ditto.
1263 (CODE_FOR_lsx_vslli_b): Ditto.
1264 (CODE_FOR_lsx_vslli_h): Ditto.
1265 (CODE_FOR_lsx_vslli_w): Ditto.
1266 (CODE_FOR_lsx_vslli_d): Ditto.
1267 (CODE_FOR_lsx_vsra_b): Ditto.
1268 (CODE_FOR_lsx_vsra_h): Ditto.
1269 (CODE_FOR_lsx_vsra_w): Ditto.
1270 (CODE_FOR_lsx_vsra_d): Ditto.
1271 (CODE_FOR_lsx_vsrai_b): Ditto.
1272 (CODE_FOR_lsx_vsrai_h): Ditto.
1273 (CODE_FOR_lsx_vsrai_w): Ditto.
1274 (CODE_FOR_lsx_vsrai_d): Ditto.
1275 (CODE_FOR_lsx_vsrl_b): Ditto.
1276 (CODE_FOR_lsx_vsrl_h): Ditto.
1277 (CODE_FOR_lsx_vsrl_w): Ditto.
1278 (CODE_FOR_lsx_vsrl_d): Ditto.
1279 (CODE_FOR_lsx_vsrli_b): Ditto.
1280 (CODE_FOR_lsx_vsrli_h): Ditto.
1281 (CODE_FOR_lsx_vsrli_w): Ditto.
1282 (CODE_FOR_lsx_vsrli_d): Ditto.
1283 (CODE_FOR_lsx_vsub_b): Ditto.
1284 (CODE_FOR_lsx_vsub_h): Ditto.
1285 (CODE_FOR_lsx_vsub_w): Ditto.
1286 (CODE_FOR_lsx_vsub_d): Ditto.
1287 (CODE_FOR_lsx_vsubi_bu): Ditto.
1288 (CODE_FOR_lsx_vsubi_hu): Ditto.
1289 (CODE_FOR_lsx_vsubi_wu): Ditto.
1290 (CODE_FOR_lsx_vsubi_du): Ditto.
1291 (CODE_FOR_lsx_vpackod_d): Ditto.
1292 (CODE_FOR_lsx_vpackev_d): Ditto.
1293 (CODE_FOR_lsx_vpickod_d): Ditto.
1294 (CODE_FOR_lsx_vpickev_d): Ditto.
1295 (CODE_FOR_lsx_vrepli_b): Ditto.
1296 (CODE_FOR_lsx_vrepli_h): Ditto.
1297 (CODE_FOR_lsx_vrepli_w): Ditto.
1298 (CODE_FOR_lsx_vrepli_d): Ditto.
1299 (CODE_FOR_lsx_vsat_b): Ditto.
1300 (CODE_FOR_lsx_vsat_h): Ditto.
1301 (CODE_FOR_lsx_vsat_w): Ditto.
1302 (CODE_FOR_lsx_vsat_d): Ditto.
1303 (CODE_FOR_lsx_vsat_bu): Ditto.
1304 (CODE_FOR_lsx_vsat_hu): Ditto.
1305 (CODE_FOR_lsx_vsat_wu): Ditto.
1306 (CODE_FOR_lsx_vsat_du): Ditto.
1307 (CODE_FOR_lsx_vavg_b): Ditto.
1308 (CODE_FOR_lsx_vavg_h): Ditto.
1309 (CODE_FOR_lsx_vavg_w): Ditto.
1310 (CODE_FOR_lsx_vavg_d): Ditto.
1311 (CODE_FOR_lsx_vavg_bu): Ditto.
1312 (CODE_FOR_lsx_vavg_hu): Ditto.
1313 (CODE_FOR_lsx_vavg_wu): Ditto.
1314 (CODE_FOR_lsx_vavg_du): Ditto.
1315 (CODE_FOR_lsx_vavgr_b): Ditto.
1316 (CODE_FOR_lsx_vavgr_h): Ditto.
1317 (CODE_FOR_lsx_vavgr_w): Ditto.
1318 (CODE_FOR_lsx_vavgr_d): Ditto.
1319 (CODE_FOR_lsx_vavgr_bu): Ditto.
1320 (CODE_FOR_lsx_vavgr_hu): Ditto.
1321 (CODE_FOR_lsx_vavgr_wu): Ditto.
1322 (CODE_FOR_lsx_vavgr_du): Ditto.
1323 (CODE_FOR_lsx_vssub_b): Ditto.
1324 (CODE_FOR_lsx_vssub_h): Ditto.
1325 (CODE_FOR_lsx_vssub_w): Ditto.
1326 (CODE_FOR_lsx_vssub_d): Ditto.
1327 (CODE_FOR_lsx_vssub_bu): Ditto.
1328 (CODE_FOR_lsx_vssub_hu): Ditto.
1329 (CODE_FOR_lsx_vssub_wu): Ditto.
1330 (CODE_FOR_lsx_vssub_du): Ditto.
1331 (CODE_FOR_lsx_vabsd_b): Ditto.
1332 (CODE_FOR_lsx_vabsd_h): Ditto.
1333 (CODE_FOR_lsx_vabsd_w): Ditto.
1334 (CODE_FOR_lsx_vabsd_d): Ditto.
1335 (CODE_FOR_lsx_vabsd_bu): Ditto.
1336 (CODE_FOR_lsx_vabsd_hu): Ditto.
1337 (CODE_FOR_lsx_vabsd_wu): Ditto.
1338 (CODE_FOR_lsx_vabsd_du): Ditto.
1339 (CODE_FOR_lsx_vftint_w_s): Ditto.
1340 (CODE_FOR_lsx_vftint_l_d): Ditto.
1341 (CODE_FOR_lsx_vftint_wu_s): Ditto.
1342 (CODE_FOR_lsx_vftint_lu_d): Ditto.
1343 (CODE_FOR_lsx_vandn_v): Ditto.
1344 (CODE_FOR_lsx_vorn_v): Ditto.
1345 (CODE_FOR_lsx_vneg_b): Ditto.
1346 (CODE_FOR_lsx_vneg_h): Ditto.
1347 (CODE_FOR_lsx_vneg_w): Ditto.
1348 (CODE_FOR_lsx_vneg_d): Ditto.
1349 (CODE_FOR_lsx_vshuf4i_d): Ditto.
1350 (CODE_FOR_lsx_vbsrl_v): Ditto.
1351 (CODE_FOR_lsx_vbsll_v): Ditto.
1352 (CODE_FOR_lsx_vfmadd_s): Ditto.
1353 (CODE_FOR_lsx_vfmadd_d): Ditto.
1354 (CODE_FOR_lsx_vfmsub_s): Ditto.
1355 (CODE_FOR_lsx_vfmsub_d): Ditto.
1356 (CODE_FOR_lsx_vfnmadd_s): Ditto.
1357 (CODE_FOR_lsx_vfnmadd_d): Ditto.
1358 (CODE_FOR_lsx_vfnmsub_s): Ditto.
1359 (CODE_FOR_lsx_vfnmsub_d): Ditto.
1360 (CODE_FOR_lsx_vmuh_b): Ditto.
1361 (CODE_FOR_lsx_vmuh_h): Ditto.
1362 (CODE_FOR_lsx_vmuh_w): Ditto.
1363 (CODE_FOR_lsx_vmuh_d): Ditto.
1364 (CODE_FOR_lsx_vmuh_bu): Ditto.
1365 (CODE_FOR_lsx_vmuh_hu): Ditto.
1366 (CODE_FOR_lsx_vmuh_wu): Ditto.
1367 (CODE_FOR_lsx_vmuh_du): Ditto.
1368 (CODE_FOR_lsx_vsllwil_h_b): Ditto.
1369 (CODE_FOR_lsx_vsllwil_w_h): Ditto.
1370 (CODE_FOR_lsx_vsllwil_d_w): Ditto.
1371 (CODE_FOR_lsx_vsllwil_hu_bu): Ditto.
1372 (CODE_FOR_lsx_vsllwil_wu_hu): Ditto.
1373 (CODE_FOR_lsx_vsllwil_du_wu): Ditto.
1374 (CODE_FOR_lsx_vssran_b_h): Ditto.
1375 (CODE_FOR_lsx_vssran_h_w): Ditto.
1376 (CODE_FOR_lsx_vssran_w_d): Ditto.
1377 (CODE_FOR_lsx_vssran_bu_h): Ditto.
1378 (CODE_FOR_lsx_vssran_hu_w): Ditto.
1379 (CODE_FOR_lsx_vssran_wu_d): Ditto.
1380 (CODE_FOR_lsx_vssrarn_b_h): Ditto.
1381 (CODE_FOR_lsx_vssrarn_h_w): Ditto.
1382 (CODE_FOR_lsx_vssrarn_w_d): Ditto.
1383 (CODE_FOR_lsx_vssrarn_bu_h): Ditto.
1384 (CODE_FOR_lsx_vssrarn_hu_w): Ditto.
1385 (CODE_FOR_lsx_vssrarn_wu_d): Ditto.
1386 (CODE_FOR_lsx_vssrln_bu_h): Ditto.
1387 (CODE_FOR_lsx_vssrln_hu_w): Ditto.
1388 (CODE_FOR_lsx_vssrln_wu_d): Ditto.
1389 (CODE_FOR_lsx_vssrlrn_bu_h): Ditto.
1390 (CODE_FOR_lsx_vssrlrn_hu_w): Ditto.
1391 (CODE_FOR_lsx_vssrlrn_wu_d): Ditto.
1392 (loongarch_builtin_vector_type): Ditto.
1393 (loongarch_build_cvpointer_type): Ditto.
1394 (LARCH_ATYPE_CVPOINTER): Ditto.
1395 (LARCH_ATYPE_BOOLEAN): Ditto.
1396 (LARCH_ATYPE_V2SF): Ditto.
1397 (LARCH_ATYPE_V2HI): Ditto.
1398 (LARCH_ATYPE_V2SI): Ditto.
1399 (LARCH_ATYPE_V4QI): Ditto.
1400 (LARCH_ATYPE_V4HI): Ditto.
1401 (LARCH_ATYPE_V8QI): Ditto.
1402 (LARCH_ATYPE_V2DI): Ditto.
1403 (LARCH_ATYPE_V4SI): Ditto.
1404 (LARCH_ATYPE_V8HI): Ditto.
1405 (LARCH_ATYPE_V16QI): Ditto.
1406 (LARCH_ATYPE_V2DF): Ditto.
1407 (LARCH_ATYPE_V4SF): Ditto.
1408 (LARCH_ATYPE_V4DI): Ditto.
1409 (LARCH_ATYPE_V8SI): Ditto.
1410 (LARCH_ATYPE_V16HI): Ditto.
1411 (LARCH_ATYPE_V32QI): Ditto.
1412 (LARCH_ATYPE_V4DF): Ditto.
1413 (LARCH_ATYPE_V8SF): Ditto.
1414 (LARCH_ATYPE_UV2DI): Ditto.
1415 (LARCH_ATYPE_UV4SI): Ditto.
1416 (LARCH_ATYPE_UV8HI): Ditto.
1417 (LARCH_ATYPE_UV16QI): Ditto.
1418 (LARCH_ATYPE_UV4DI): Ditto.
1419 (LARCH_ATYPE_UV8SI): Ditto.
1420 (LARCH_ATYPE_UV16HI): Ditto.
1421 (LARCH_ATYPE_UV32QI): Ditto.
1422 (LARCH_ATYPE_UV2SI): Ditto.
1423 (LARCH_ATYPE_UV4HI): Ditto.
1424 (LARCH_ATYPE_UV8QI): Ditto.
1425 (loongarch_builtin_vectorized_function): Ditto.
1426 (LARCH_GET_BUILTIN): Ditto.
1427 (loongarch_expand_builtin_insn): Ditto.
1428 (loongarch_expand_builtin_lsx_test_branch): Ditto.
1429 (loongarch_expand_builtin): Ditto.
1430 * config/loongarch/loongarch-ftypes.def (1): Ditto.
1434 * config/loongarch/lsxintrin.h: New file.
1436 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
1438 * config/loongarch/constraints.md (M): Add Loongson LSX base instruction support.
1458 * config/loongarch/genopts/loongarch.opt.in: Ditto.
1459 * config/loongarch/loongarch-builtins.cc (loongarch_gen_const_int_vector): Ditto.
1460 * config/loongarch/loongarch-modes.def (VECTOR_MODES): Ditto.
1461 (VECTOR_MODE): Ditto.
1463 * config/loongarch/loongarch-protos.h (loongarch_split_move_insn_p): Ditto.
1464 (loongarch_split_move_insn): Ditto.
1465 (loongarch_split_128bit_move): Ditto.
1466 (loongarch_split_128bit_move_p): Ditto.
1467 (loongarch_split_lsx_copy_d): Ditto.
1468 (loongarch_split_lsx_insert_d): Ditto.
1469 (loongarch_split_lsx_fill_d): Ditto.
1470 (loongarch_expand_vec_cmp): Ditto.
1471 (loongarch_const_vector_same_val_p): Ditto.
1472 (loongarch_const_vector_same_bytes_p): Ditto.
1473 (loongarch_const_vector_same_int_p): Ditto.
1474 (loongarch_const_vector_shuffle_set_p): Ditto.
1475 (loongarch_const_vector_bitimm_set_p): Ditto.
1476 (loongarch_const_vector_bitimm_clr_p): Ditto.
1477 (loongarch_lsx_vec_parallel_const_half): Ditto.
1478 (loongarch_gen_const_int_vector): Ditto.
1479 (loongarch_lsx_output_division): Ditto.
1480 (loongarch_expand_vector_init): Ditto.
1481 (loongarch_expand_vec_unpack): Ditto.
1482 (loongarch_expand_vec_perm): Ditto.
1483 (loongarch_expand_vector_extract): Ditto.
1484 (loongarch_expand_vector_reduc): Ditto.
1485 (loongarch_ldst_scaled_shift): Ditto.
1486 (loongarch_expand_vec_cond_expr): Ditto.
1487 (loongarch_expand_vec_cond_mask_expr): Ditto.
1488 (loongarch_builtin_vectorized_function): Ditto.
1489 (loongarch_gen_const_int_vector_shuffle): Ditto.
1490 (loongarch_build_signbit_mask): Ditto.
1491 * config/loongarch/loongarch.cc (loongarch_pass_aggregate_num_fpr): Ditto.
1492 (loongarch_setup_incoming_varargs): Ditto.
1493 (loongarch_emit_move): Ditto.
1494 (loongarch_const_vector_bitimm_set_p): Ditto.
1495 (loongarch_const_vector_bitimm_clr_p): Ditto.
1496 (loongarch_const_vector_same_val_p): Ditto.
1497 (loongarch_const_vector_same_bytes_p): Ditto.
1498 (loongarch_const_vector_same_int_p): Ditto.
1499 (loongarch_const_vector_shuffle_set_p): Ditto.
1500 (loongarch_symbol_insns): Ditto.
1501 (loongarch_cannot_force_const_mem): Ditto.
1502 (loongarch_valid_offset_p): Ditto.
1503 (loongarch_valid_index_p): Ditto.
1504 (loongarch_classify_address): Ditto.
1505 (loongarch_address_insns): Ditto.
1506 (loongarch_ldst_scaled_shift): Ditto.
1507 (loongarch_const_insns): Ditto.
1508 (loongarch_split_move_insn_p): Ditto.
1509 (loongarch_subword_at_byte): Ditto.
1510 (loongarch_legitimize_move): Ditto.
1511 (loongarch_builtin_vectorization_cost): Ditto.
1512 (loongarch_split_move_p): Ditto.
1513 (loongarch_split_move): Ditto.
1514 (loongarch_split_move_insn): Ditto.
1515 (loongarch_output_move_index_float): Ditto.
1516 (loongarch_split_128bit_move_p): Ditto.
1517 (loongarch_split_128bit_move): Ditto.
1518 (loongarch_split_lsx_copy_d): Ditto.
1519 (loongarch_split_lsx_insert_d): Ditto.
1520 (loongarch_split_lsx_fill_d): Ditto.
1521 (loongarch_output_move): Ditto.
1522 (loongarch_extend_comparands): Ditto.
1523 (loongarch_print_operand_reloc): Ditto.
1524 (loongarch_print_operand): Ditto.
1525 (loongarch_hard_regno_mode_ok_uncached): Ditto.
1526 (loongarch_hard_regno_call_part_clobbered): Ditto.
1527 (loongarch_hard_regno_nregs): Ditto.
1528 (loongarch_class_max_nregs): Ditto.
1529 (loongarch_can_change_mode_class): Ditto.
1530 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
1531 (loongarch_secondary_reload): Ditto.
1532 (loongarch_vector_mode_supported_p): Ditto.
1533 (loongarch_preferred_simd_mode): Ditto.
1534 (loongarch_autovectorize_vector_modes): Ditto.
1535 (loongarch_lsx_output_division): Ditto.
1536 (loongarch_option_override_internal): Ditto.
1537 (loongarch_hard_regno_caller_save_mode): Ditto.
1538 (MAX_VECT_LEN): Ditto.
1539 (loongarch_spill_class): Ditto.
1540 (struct expand_vec_perm_d): Ditto.
1541 (loongarch_promote_function_mode): Ditto.
1542 (loongarch_expand_vselect): Ditto.
1543 (loongarch_starting_frame_offset): Ditto.
1544 (loongarch_expand_vselect_vconcat): Ditto.
1545 (TARGET_ASM_ALIGNED_DI_OP): Ditto.
1546 (TARGET_OPTION_OVERRIDE): Ditto.
1547 (TARGET_LEGITIMIZE_ADDRESS): Ditto.
1548 (TARGET_ASM_SELECT_RTX_SECTION): Ditto.
1549 (TARGET_ASM_FUNCTION_RODATA_SECTION): Ditto.
1550 (loongarch_expand_lsx_shuffle): Ditto.
1551 (TARGET_SCHED_INIT): Ditto.
1552 (TARGET_SCHED_REORDER): Ditto.
1553 (TARGET_SCHED_REORDER2): Ditto.
1554 (TARGET_SCHED_VARIABLE_ISSUE): Ditto.
1555 (TARGET_SCHED_ADJUST_COST): Ditto.
1556 (TARGET_SCHED_ISSUE_RATE): Ditto.
1557 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Ditto.
1558 (TARGET_FUNCTION_OK_FOR_SIBCALL): Ditto.
1559 (TARGET_VALID_POINTER_MODE): Ditto.
1560 (TARGET_REGISTER_MOVE_COST): Ditto.
1561 (TARGET_MEMORY_MOVE_COST): Ditto.
1562 (TARGET_RTX_COSTS): Ditto.
1563 (TARGET_ADDRESS_COST): Ditto.
1564 (TARGET_IN_SMALL_DATA_P): Ditto.
1565 (TARGET_PREFERRED_RELOAD_CLASS): Ditto.
1566 (TARGET_ASM_FILE_START_FILE_DIRECTIVE): Ditto.
1567 (TARGET_EXPAND_BUILTIN_VA_START): Ditto.
1568 (loongarch_expand_vec_perm): Ditto.
1569 (TARGET_PROMOTE_FUNCTION_MODE): Ditto.
1570 (TARGET_RETURN_IN_MEMORY): Ditto.
1571 (TARGET_FUNCTION_VALUE): Ditto.
1572 (TARGET_LIBCALL_VALUE): Ditto.
1573 (loongarch_try_expand_lsx_vshuf_const): Ditto.
1574 (TARGET_ASM_OUTPUT_MI_THUNK): Ditto.
1575 (TARGET_ASM_CAN_OUTPUT_MI_THUNK): Ditto.
1576 (TARGET_PRINT_OPERAND): Ditto.
1577 (TARGET_PRINT_OPERAND_ADDRESS): Ditto.
1578 (TARGET_PRINT_OPERAND_PUNCT_VALID_P): Ditto.
1579 (TARGET_SETUP_INCOMING_VARARGS): Ditto.
1580 (TARGET_STRICT_ARGUMENT_NAMING): Ditto.
1581 (TARGET_MUST_PASS_IN_STACK): Ditto.
1582 (TARGET_PASS_BY_REFERENCE): Ditto.
1583 (TARGET_ARG_PARTIAL_BYTES): Ditto.
1584 (TARGET_FUNCTION_ARG): Ditto.
1585 (TARGET_FUNCTION_ARG_ADVANCE): Ditto.
1586 (TARGET_FUNCTION_ARG_BOUNDARY): Ditto.
1587 (TARGET_SCALAR_MODE_SUPPORTED_P): Ditto.
1588 (TARGET_INIT_BUILTINS): Ditto.
1589 (loongarch_expand_vec_perm_const_1): Ditto.
1590 (loongarch_expand_vec_perm_const_2): Ditto.
1591 (loongarch_vectorize_vec_perm_const): Ditto.
1592 (loongarch_cpu_sched_reassociation_width): Ditto.
1593 (loongarch_sched_reassociation_width): Ditto.
1594 (loongarch_expand_vector_extract): Ditto.
1595 (emit_reduc_half): Ditto.
1596 (loongarch_expand_vector_reduc): Ditto.
1597 (loongarch_expand_vec_unpack): Ditto.
1598 (loongarch_lsx_vec_parallel_const_half): Ditto.
1599 (loongarch_constant_elt_p): Ditto.
1600 (loongarch_gen_const_int_vector_shuffle): Ditto.
1601 (loongarch_expand_vector_init): Ditto.
1602 (loongarch_expand_lsx_cmp): Ditto.
1603 (loongarch_expand_vec_cond_expr): Ditto.
1604 (loongarch_expand_vec_cond_mask_expr): Ditto.
1605 (loongarch_expand_vec_cmp): Ditto.
1606 (loongarch_case_values_threshold): Ditto.
1607 (loongarch_build_const_vector): Ditto.
1608 (loongarch_build_signbit_mask): Ditto.
1609 (loongarch_builtin_support_vector_misalignment): Ditto.
1610 (TARGET_ASM_ALIGNED_HI_OP): Ditto.
1611 (TARGET_ASM_ALIGNED_SI_OP): Ditto.
1612 (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): Ditto.
1613 (TARGET_VECTOR_MODE_SUPPORTED_P): Ditto.
1614 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): Ditto.
1615 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Ditto.
1616 (TARGET_VECTORIZE_VEC_PERM_CONST): Ditto.
1617 (TARGET_SCHED_REASSOCIATION_WIDTH): Ditto.
1618 (TARGET_CASE_VALUES_THRESHOLD): Ditto.
1619 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Ditto.
1620 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
1621 * config/loongarch/loongarch.h (TARGET_SUPPORTS_WIDE_INT): Ditto.
1622 (UNITS_PER_LSX_REG): Ditto.
1623 (BITS_PER_LSX_REG): Ditto.
1624 (BIGGEST_ALIGNMENT): Ditto.
1625 (LSX_REG_FIRST): Ditto.
1626 (LSX_REG_LAST): Ditto.
1627 (LSX_REG_NUM): Ditto.
1629 (LSX_REG_RTX_P): Ditto.
1630 (IMM13_OPERAND): Ditto.
1631 (LSX_SUPPORTED_MODE_P): Ditto.
1632 * config/loongarch/loongarch.md (unknown,add,sub,not,nor,and,or,xor): Ditto.
1633 (unknown,add,sub,not,nor,and,or,xor,simd_add): Ditto.
1634 (unknown,none,QI,HI,SI,DI,TI,SF,DF,TF,FCC): Ditto.
1641 * config/loongarch/loongarch.opt: Ditto.
1642 * config/loongarch/predicates.md (const_lsx_branch_operand): Ditto.
1643 (const_uimm3_operand): Ditto.
1644 (const_8_to_11_operand): Ditto.
1645 (const_12_to_15_operand): Ditto.
1646 (const_uimm4_operand): Ditto.
1647 (const_uimm6_operand): Ditto.
1648 (const_uimm7_operand): Ditto.
1649 (const_uimm8_operand): Ditto.
1650 (const_imm5_operand): Ditto.
1651 (const_imm10_operand): Ditto.
1652 (const_imm13_operand): Ditto.
1653 (reg_imm10_operand): Ditto.
1654 (aq8b_operand): Ditto.
1655 (aq8h_operand): Ditto.
1656 (aq8w_operand): Ditto.
1657 (aq8d_operand): Ditto.
1658 (aq10b_operand): Ditto.
1659 (aq10h_operand): Ditto.
1660 (aq10w_operand): Ditto.
1661 (aq10d_operand): Ditto.
1662 (aq12b_operand): Ditto.
1663 (aq12h_operand): Ditto.
1664 (aq12w_operand): Ditto.
1665 (aq12d_operand): Ditto.
1666 (const_m1_operand): Ditto.
1667 (reg_or_m1_operand): Ditto.
1668 (const_exp_2_operand): Ditto.
1669 (const_exp_4_operand): Ditto.
1670 (const_exp_8_operand): Ditto.
1671 (const_exp_16_operand): Ditto.
1672 (const_exp_32_operand): Ditto.
1673 (const_0_or_1_operand): Ditto.
1674 (const_0_to_3_operand): Ditto.
1675 (const_0_to_7_operand): Ditto.
1676 (const_2_or_3_operand): Ditto.
1677 (const_4_to_7_operand): Ditto.
1678 (const_8_to_15_operand): Ditto.
1679 (const_16_to_31_operand): Ditto.
1680 (qi_mask_operand): Ditto.
1681 (hi_mask_operand): Ditto.
1682 (si_mask_operand): Ditto.
1684 (db4_operand): Ditto.
1685 (db7_operand): Ditto.
1686 (db8_operand): Ditto.
1687 (ib3_operand): Ditto.
1688 (sb4_operand): Ditto.
1689 (sb5_operand): Ditto.
1690 (sb8_operand): Ditto.
1691 (sd8_operand): Ditto.
1692 (ub4_operand): Ditto.
1693 (ub8_operand): Ditto.
1694 (uh4_operand): Ditto.
1695 (uw4_operand): Ditto.
1696 (uw5_operand): Ditto.
1697 (uw6_operand): Ditto.
1698 (uw8_operand): Ditto.
1699 (addiur2_operand): Ditto.
1700 (addiusp_operand): Ditto.
1701 (andi16_operand): Ditto.
1702 (movep_src_register): Ditto.
1703 (movep_src_operand): Ditto.
1704 (fcc_reload_operand): Ditto.
1705 (muldiv_target_operand): Ditto.
1706 (const_vector_same_val_operand): Ditto.
1707 (const_vector_same_simm5_operand): Ditto.
1708 (const_vector_same_uimm5_operand): Ditto.
1709 (const_vector_same_ximm5_operand): Ditto.
1710 (const_vector_same_uimm6_operand): Ditto.
1711 (par_const_vector_shf_set_operand): Ditto.
1712 (reg_or_vector_same_val_operand): Ditto.
1713 (reg_or_vector_same_simm5_operand): Ditto.
1714 (reg_or_vector_same_uimm5_operand): Ditto.
1715 (reg_or_vector_same_ximm5_operand): Ditto.
1716 (reg_or_vector_same_uimm6_operand): Ditto.
1717 * doc/md.texi: Ditto.
1718 * config/loongarch/lsx.md: New file.
1720 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1722 * config/riscv/riscv-protos.h (lookup_vector_type_attribute): Export global.
1723 (get_all_predecessors): New function.
1724 (get_all_successors): Ditto.
1725 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
1726 (get_all_successors): Ditto.
1727 * config/riscv/riscv-vector-builtins.cc (sizeless_type_p): Export global.
1728 * config/riscv/riscv-vsetvl.cc (get_all_predecessors): Remove it.
1730 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
1732 * config/arc/arc-protos.h (arc_output_addsi): Remove declaration.
1733 (split_addsi): Likewise.
1734 * config/arc/arc.cc (arc_print_operand): Add/repurpose 's', 'S',
1735 'N', 'x', and 'J' code letters.
1736 (arc_output_addsi): Make it static.
1737 (split_addsi): Remove it.
1738 * config/arc/arc.h (UNSIGNED_INT*): New defines.
1739 (SINNED_INT*): Likewise.
1740 * config/arc/arc.md (type): Add add, sub, bxor types.
1741 (tst_movb): Change code letter from 's' to 'x'.
1742 (andsi3_i): Likewise.
1743 (addsi3_mixed): Refurbish the pattern.
1744 (call_i): Change code letter from 'S' to 'J'.
1745 * config/arc/arc700.md: Add newly introduced types.
1746 * config/arc/arcHS.md: Likewsie.
1747 * config/arc/arcHS4x.md: Likewise.
1748 * config/arc/constraints.md (Cca, CL2, Csp, C2a): Remove it.
1749 (CM4): Update description.
1750 (CP4, C6u, C6n, CIs, C4p): New constraint.
1752 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
1754 * common/config/arc/arc-common.cc (arc_option_optimization_table):
1755 Remove mbbit_peephole.
1756 * config/arc/arc.md (UNSPEC_ARC_DIRECT): Remove.
1757 (store_direct): Likewise.
1758 (BBIT peephole2): Likewise.
1759 * config/arc/arc.opt (mbbit-peephole): Ignore option.
1760 * doc/invoke.texi (mbbit-peephole): Update document.
1762 2023-09-05 Jakub Jelinek <jakub@redhat.com>
1764 * tree-ssa-tail-merge.cc (replace_block_by): Fix a comment typo:
1767 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
1769 * config/loongarch/loongarch.h (CC1_SPEC): Mark normalized
1770 options passed from driver to gnat1 as explicit for multilib.
1772 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
1774 * config.gcc: add loongarch*-elf target.
1775 * config/loongarch/elf.h: New file.
1776 Link against newlib by default.
1778 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
1780 * config.gcc: use -mstrict-align for building libraries
1781 if --with-strict-align-lib is given.
1782 * doc/install.texi: likewise.
1784 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
1786 * config/loongarch/loongarch-c.cc: Export macros
1787 "__loongarch_{arch,tune}" in the preprocessor.
1789 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
1791 * config.gcc: Make --with-abi= obsolete, decide the default ABI
1792 with target triplet. Allow specifying multilib library build
1793 options with --with-multilib-list and --with-multilib-default.
1794 * config/loongarch/t-linux: Likewise.
1795 * config/loongarch/genopts/loongarch-strings: Likewise.
1796 * config/loongarch/loongarch-str.h: Likewise.
1797 * doc/install.texi: Likewise.
1798 * config/loongarch/genopts/loongarch.opt.in: Introduce
1799 -m[no-]l[a]sx options. Only process -m*-float and
1800 -m[no-]l[a]sx in the GCC driver.
1801 * config/loongarch/loongarch.opt: Likewise.
1802 * config/loongarch/la464.md: Likewise.
1803 * config/loongarch/loongarch-c.cc: Likewise.
1804 * config/loongarch/loongarch-cpu.cc: Likewise.
1805 * config/loongarch/loongarch-cpu.h: Likewise.
1806 * config/loongarch/loongarch-def.c: Likewise.
1807 * config/loongarch/loongarch-def.h: Likewise.
1808 * config/loongarch/loongarch-driver.cc: Likewise.
1809 * config/loongarch/loongarch-driver.h: Likewise.
1810 * config/loongarch/loongarch-opts.cc: Likewise.
1811 * config/loongarch/loongarch-opts.h: Likewise.
1812 * config/loongarch/loongarch.cc: Likewise.
1813 * doc/invoke.texi: Likewise.
1815 2023-09-05 liuhongt <hongtao.liu@intel.com>
1817 * config/i386/sse.md: (V8BFH_128): Renamed to ..
1818 (VHFBF_128): .. this.
1819 (V16BFH_256): Renamed to ..
1820 (VHFBF_256): .. this.
1821 (avx512f_mov<mode>): Extend to V_128.
1822 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_128.
1823 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
1824 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_256.
1825 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
1826 * config/i386/i386-expand.cc (expand_vec_perm_blend):
1827 Canonicalize vec_merge.
1829 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1831 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Fix Dynamic status.
1832 * config/riscv/riscv-v.cc (preferred_simd_mode): Ditto.
1833 (autovectorize_vector_modes): Ditto.
1834 (vectorize_related_mode): Ditto.
1836 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
1838 * config/rs6000/darwin.h (LIB_SPEC): Include libSystemStubs for
1839 all 32b Darwin PowerPC cases.
1841 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
1843 * config/darwin-sections.def (static_init_section): Add the
1844 __TEXT,__StaticInit section.
1845 * config/darwin.cc (darwin_function_section): Use the static init
1846 section for global initializers, to match other platform toolchains.
1848 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
1850 * config/darwin-sections.def (darwin_exception_section): Move to
1852 * config/darwin.cc (darwin_emit_except_table_label): Align before
1853 the exception table label.
1854 * config/darwin.h (ASM_PREFERRED_EH_DATA_FORMAT): Use indirect PC-
1855 relative 4byte relocs.
1857 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
1859 * config/darwin.cc (dump_machopic_symref_flags): New.
1860 (debug_machopic_symref_flags): New.
1862 2023-09-04 Pan Li <pan2.li@intel.com>
1864 * config/riscv/riscv-vector-builtins-types.def
1865 (vfloat16mf4_t): Add FP16 intrinsic def.
1866 (vfloat16mf2_t): Ditto.
1867 (vfloat16m1_t): Ditto.
1868 (vfloat16m2_t): Ditto.
1869 (vfloat16m4_t): Ditto.
1870 (vfloat16m8_t): Ditto.
1872 2023-09-04 Jiufu Guo <guojiufu@linux.ibm.com>
1874 PR tree-optimization/108757
1875 * match.pd ((X - N * M) / N): New pattern.
1876 ((X + N * M) / N): New pattern.
1877 ((X + C) div_rshift N): New pattern.
1879 2023-09-04 Guo Jie <guojie@loongson.cn>
1881 * config/loongarch/loongarch.md: Support 'G' -> 'k' in
1882 movsf_hardfloat and movdf_hardfloat.
1884 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
1886 * config/loongarch/loongarch.cc (loongarch_extend_comparands):
1887 In unsigned QImode test, check for sign extended subreg and/or
1888 constant operands, and do a sign extension in that case.
1889 * config/loongarch/loongarch.md (TARGET_64BIT): Define
1890 template cbranchqi4.
1892 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
1894 * config/loongarch/loongarch.md: Allows fixed-point values to be loaded
1895 from memory into floating-point registers.
1897 2023-09-03 Pan Li <pan2.li@intel.com>
1899 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
1901 * config/riscv/vector.md: Add VLS modes to vfmax/vfmin.
1903 2023-09-02 Mikael Morin <mikael@gcc.gnu.org>
1905 * tree-diagnostic.cc (tree_diagnostics_defaults): Delete allocated
1906 pointer before overwriting it.
1908 2023-09-02 chenxiaolong <chenxiaolong@loongson.cn>
1910 * config/loongarch/loongarch-builtins.cc (loongarch_init_builtins):
1911 Associate the __float128 type to float128_type_node so that it can
1912 be recognized by the compiler.
1913 * config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
1914 Add the flag "FLOAT128_TYPE" to gcc and associate a function
1915 with the suffix "q" to "f128".
1916 * doc/extend.texi:Added support for 128-bit floating-point functions on
1917 the LoongArch architecture.
1919 2023-09-01 Jakub Jelinek <jakub@redhat.com>
1922 * common.opt (fabi-version=): Document version 19.
1923 * doc/invoke.texi (-fabi-version=): Likewise.
1925 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
1927 * config/riscv/autovec-opt.md (*cond_<optab><mode><vconvert>):
1928 New combine pattern.
1929 (*cond_<float_cvt><vconvert><mode>): Ditto.
1930 (*cond_<optab><vnconvert><mode>): Ditto.
1931 (*cond_<float_cvt><vnconvert><mode>): Ditto.
1932 (*cond_<optab><mode><vnconvert>): Ditto.
1933 (*cond_<float_cvt><mode><vnconvert>2): Ditto.
1934 * config/riscv/autovec.md (<optab><mode><vconvert>2): Adjust.
1935 (<float_cvt><vconvert><mode>2): Adjust.
1936 (<optab><vnconvert><mode>2): Adjust.
1937 (<float_cvt><vnconvert><mode>2): Adjust.
1938 (<optab><mode><vnconvert>2): Adjust.
1939 (<float_cvt><mode><vnconvert>2): Adjust.
1940 * config/riscv/riscv-v.cc (needs_fp_rounding): Add INT->FP extend.
1942 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
1944 * config/riscv/autovec-opt.md (*cond_extend<v_double_trunc><mode>):
1945 New combine pattern.
1946 (*cond_trunc<mode><v_double_trunc>): Ditto.
1947 * config/riscv/autovec.md: Adjust.
1948 * config/riscv/riscv-v.cc (needs_fp_rounding): Add FP extend.
1950 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
1952 * config/riscv/autovec-opt.md (*cond_<optab><v_double_trunc><mode>):
1953 New combine pattern.
1954 (*cond_<optab><v_quad_trunc><mode>): Ditto.
1955 (*cond_<optab><v_oct_trunc><mode>): Ditto.
1956 (*cond_trunc<mode><v_double_trunc>): Ditto.
1957 * config/riscv/autovec.md (<optab><v_quad_trunc><mode>2): Adjust.
1958 (<optab><v_oct_trunc><mode>2): Ditto.
1960 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
1962 * config/riscv/autovec.md: Adjust.
1963 * config/riscv/riscv-protos.h (expand_cond_len_unop): Ditto.
1964 (expand_cond_len_binop): Ditto.
1965 * config/riscv/riscv-v.cc (needs_fp_rounding): Ditto.
1966 (expand_cond_len_op): Ditto.
1967 (expand_cond_len_unop): Ditto.
1968 (expand_cond_len_binop): Ditto.
1969 (expand_cond_len_ternop): Ditto.
1971 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1973 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Enable
1974 VECT_COMPARE_COSTS by default.
1976 2023-09-01 Robin Dapp <rdapp@ventanamicro.com>
1978 * config/riscv/autovec.md (vec_extract<mode>qi): New expander.
1980 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1982 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Add
1984 * config/riscv/riscv.opt: Add dynamic compile option.
1986 2023-09-01 Pan Li <pan2.li@intel.com>
1988 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
1989 vls floating-point autovec.
1990 * config/riscv/vector-iterators.md: New iterator for
1991 floating-point V and VLS.
1992 * config/riscv/vector.md: Add VLS to floating-point binop.
1994 2023-09-01 Andrew Pinski <apinski@marvell.com>
1996 PR tree-optimization/19832
1997 * match.pd: Add pattern to optimize
1998 `(a != b) ? a OP b : c`.
2000 2023-09-01 Lulu Cheng <chenglulu@loongson.cn>
2001 Guo Jie <guojie@loongson.cn>
2004 * config/loongarch/loongarch.cc (loongarch_emit_stack_tie): Use the
2005 frame_pointer_needed to determine whether to use the $fp register.
2007 2023-08-31 Andrew Pinski <apinski@marvell.com>
2009 PR tree-optimization/110915
2010 * match.pd (min_value, max_value): Extend to vector constants.
2012 2023-08-31 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
2014 * config.in: Regenerate.
2015 * config/darwin-c.cc: Change spelling to macOS.
2016 * config/darwin-driver.cc: Likewise.
2017 * config/darwin.h: Likewise.
2018 * configure.ac: Likewise.
2019 * doc/contrib.texi: Likewise.
2020 * doc/extend.texi: Likewise.
2021 * doc/invoke.texi: Likewise.
2022 * doc/plugins.texi: Likewise.
2023 * doc/tm.texi: Regenerate.
2024 * doc/tm.texi.in: Change spelling to macOS.
2025 * plugin.cc: Likewise.
2027 2023-08-31 Pan Li <pan2.li@intel.com>
2029 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmadd/vfnmacc.
2030 * config/riscv/autovec.md: Ditto.
2032 2023-08-31 Pan Li <pan2.li@intel.com>
2034 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmsac/vfnmsub
2035 * config/riscv/autovec.md: Ditto.
2037 2023-08-31 Richard Sandiford <richard.sandiford@arm.com>
2039 * config/aarch64/aarch64.md (untyped_call): Emit a call_value
2040 rather than a call. List each possible destination register
2041 in the call pattern.
2043 2023-08-31 Pan Li <pan2.li@intel.com>
2045 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmsac/vfmsub
2046 * config/riscv/autovec.md: Ditto.
2048 2023-08-31 Pan Li <pan2.li@intel.com>
2049 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
2051 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmadd/vfmacc.
2052 * config/riscv/autovec.md: Ditto.
2053 * config/riscv/vector-iterators.md: Add UNSPEC_VFFMA.
2055 2023-08-31 Palmer Dabbelt <palmer@rivosinc.com>
2057 * config/riscv/autovec.md (shifts): Use
2058 vector_scalar_shift_operand.
2059 * config/riscv/predicates.md (vector_scalar_shift_operand): New
2062 2023-08-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2064 * config.gcc: Add vector cost model framework for RVV.
2065 * config/riscv/riscv.cc (riscv_vectorize_create_costs): Ditto.
2066 (TARGET_VECTORIZE_CREATE_COSTS): Ditto.
2067 * config/riscv/t-riscv: Ditto.
2068 * config/riscv/riscv-vector-costs.cc: New file.
2069 * config/riscv/riscv-vector-costs.h: New file.
2071 2023-08-31 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
2074 * config/rs6000/mma.md (define_insn_and_split movoo): Disallow
2075 AltiVec address operands.
2076 (define_insn_and_split movxo): Likewise.
2077 * config/rs6000/predicates.md (vsx_quad_dform_memory_operand): Remove
2078 redundant mode size check.
2080 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
2082 * config/riscv/riscv-protos.h (IS_AGNOSTIC): Move to here.
2083 * config/riscv/riscv-v.cc (gen_no_side_effects_vsetvl_rtx):
2084 Change to default policy.
2085 * config/riscv/riscv-vector-builtins-bases.cc: Change to default policy.
2086 * config/riscv/riscv-vsetvl.h (IS_AGNOSTIC): Delete.
2087 * config/riscv/riscv.cc (riscv_print_operand): Use IS_AGNOSTIC to test.
2089 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
2091 * config/riscv/autovec-opt.md: Adjust.
2092 * config/riscv/autovec-vls.md: Ditto.
2093 * config/riscv/autovec.md: Ditto.
2094 * config/riscv/riscv-protos.h (enum insn_type): Add insn_type.
2095 (enum insn_flags): Add insn flags.
2096 (emit_vlmax_insn): Adjust.
2097 (emit_vlmax_fp_insn): Delete.
2098 (emit_vlmax_ternary_insn): Delete.
2099 (emit_vlmax_fp_ternary_insn): Delete.
2100 (emit_nonvlmax_insn): Adjust.
2101 (emit_vlmax_slide_insn): Delete.
2102 (emit_nonvlmax_slide_tu_insn): Delete.
2103 (emit_vlmax_merge_insn): Delete.
2104 (emit_vlmax_cmp_insn): Delete.
2105 (emit_vlmax_cmp_mu_insn): Delete.
2106 (emit_vlmax_masked_mu_insn): Delete.
2107 (emit_scalar_move_insn): Delete.
2108 (emit_nonvlmax_integer_move_insn): Delete.
2109 (emit_vlmax_insn_lra): Add.
2110 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): New.
2111 (emit_vlmax_insn): Adjust.
2112 (emit_nonvlmax_insn): Adjust.
2113 (emit_vlmax_insn_lra): Add.
2114 (emit_vlmax_fp_insn): Delete.
2115 (emit_vlmax_ternary_insn): Delete.
2116 (emit_vlmax_fp_ternary_insn): Delete.
2117 (emit_vlmax_slide_insn): Delete.
2118 (emit_nonvlmax_slide_tu_insn): Delete.
2119 (emit_nonvlmax_slide_insn): Delete.
2120 (emit_vlmax_merge_insn): Delete.
2121 (emit_vlmax_cmp_insn): Delete.
2122 (emit_vlmax_cmp_mu_insn): Delete.
2123 (emit_vlmax_masked_insn): Delete.
2124 (emit_nonvlmax_masked_insn): Delete.
2125 (emit_vlmax_masked_store_insn): Delete.
2126 (emit_nonvlmax_masked_store_insn): Delete.
2127 (emit_vlmax_masked_mu_insn): Delete.
2128 (emit_vlmax_masked_fp_mu_insn): Delete.
2129 (emit_nonvlmax_tu_insn): Delete.
2130 (emit_nonvlmax_fp_tu_insn): Delete.
2131 (emit_nonvlmax_tumu_insn): Delete.
2132 (emit_nonvlmax_fp_tumu_insn): Delete.
2133 (emit_scalar_move_insn): Delete.
2134 (emit_cpop_insn): Delete.
2135 (emit_vlmax_integer_move_insn): Delete.
2136 (emit_nonvlmax_integer_move_insn): Delete.
2137 (emit_vlmax_gather_insn): Delete.
2138 (emit_vlmax_masked_gather_mu_insn): Delete.
2139 (emit_vlmax_compress_insn): Delete.
2140 (emit_nonvlmax_compress_insn): Delete.
2141 (emit_vlmax_reduction_insn): Delete.
2142 (emit_vlmax_fp_reduction_insn): Delete.
2143 (emit_nonvlmax_fp_reduction_insn): Delete.
2144 (expand_vec_series): Adjust.
2145 (expand_const_vector): Adjust.
2146 (legitimize_move): Adjust.
2147 (sew64_scalar_helper): Adjust.
2148 (expand_tuple_move): Adjust.
2149 (expand_vector_init_insert_elems): Adjust.
2150 (expand_vector_init_merge_repeating_sequence): Adjust.
2151 (expand_vec_cmp): Adjust.
2152 (expand_vec_cmp_float): Adjust.
2153 (expand_vec_perm): Adjust.
2154 (shuffle_merge_patterns): Adjust.
2155 (shuffle_compress_patterns): Adjust.
2156 (shuffle_decompress_patterns): Adjust.
2157 (expand_load_store): Adjust.
2158 (expand_cond_len_op): Adjust.
2159 (expand_cond_len_unop): Adjust.
2160 (expand_cond_len_binop): Adjust.
2161 (expand_gather_scatter): Adjust.
2162 (expand_cond_len_ternop): Adjust.
2163 (expand_reduction): Adjust.
2164 (expand_lanes_load_store): Adjust.
2165 (expand_fold_extract_last): Adjust.
2166 * config/riscv/riscv.cc (vector_zero_call_used_regs): Adjust.
2167 * config/riscv/vector.md: Adjust.
2169 2023-08-31 Haochen Gui <guihaoc@gcc.gnu.org>
2172 * config/rs6000/rs6000-string.cc (expand_block_move): Call vector
2173 load/store with length only on 64-bit Power10.
2175 2023-08-31 Claudiu Zissulescu <claziss@gmail.com>
2177 * config/arc/arc.cc (arc_split_mov_const): Use LSL16 only when
2178 SWAP option is enabled.
2179 * config/arc/arc.md (ashlsi2_cnt16): Likewise.
2181 2023-08-31 Stamatis Markianos-Wright <stam.markianos-wright@arm.com>
2183 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90, vcaddq_rot270):
2184 Use common insn for signed and unsigned front-end definitions.
2185 * config/arm/arm_mve_builtins.def
2186 (vcaddq_rot90_m_u, vcaddq_rot270_m_u): Make common.
2187 (vcaddq_rot90_m_s, vcaddq_rot270_m_s): Remove.
2188 * config/arm/iterators.md (mve_insn): Merge signed and unsigned defs.
2191 (mve_rot): Likewise.
2193 (VxCADDQ_M): Likewise.
2194 * config/arm/unspecs.md (unspec): Likewise.
2195 * config/arm/mve.md: Fix minor typo.
2197 2023-08-31 liuhongt <hongtao.liu@intel.com>
2199 * config/i386/sse.md (<avx512>_blendm<mode>): Merge
2200 VF_AVX512HFBFVL into VI12HFBF_AVX512VL.
2201 (VF_AVX512HFBF16): Renamed to VHFBF.
2202 (VF_AVX512FP16VL): Renamed to VHF_AVX512VL.
2203 (VF_AVX512FP16): Removed.
2204 (div<mode>3): Adjust VF_AVX512FP16VL to VHF_AVX512VL.
2205 (avx512fp16_rcp<mode>2<mask_name>): Ditto.
2206 (rsqrt<mode>2): Ditto.
2207 (<sse>_rsqrt<mode>2<mask_name>): Ditto.
2208 (vcond<mode><code>): Ditto.
2209 (vcond<sseintvecmodelower><mode>): Ditto.
2210 (<avx512>_fmaddc_<mode>_mask1<round_expand_name>): Ditto.
2211 (<avx512>_fmaddc_<mode>_maskz<round_expand_name>): Ditto.
2212 (<avx512>_fcmaddc_<mode>_mask1<round_expand_name>): Ditto.
2213 (<avx512>_fcmaddc_<mode>_maskz<round_expand_name>): Ditto.
2214 (cmla<conj_op><mode>4): Ditto.
2215 (fma_<mode>_fadd_fmul): Ditto.
2216 (fma_<mode>_fadd_fcmul): Ditto.
2217 (fma_<complexopname>_<mode>_fma_zero): Ditto.
2218 (fma_<mode>_fmaddc_bcst): Ditto.
2219 (fma_<mode>_fcmaddc_bcst): Ditto.
2220 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
2221 (cmul<conj_op><mode>3): Ditto.
2222 (<avx512>_<complexopname>_<mode><maskc_name><round_name>):
2224 (vec_unpacks_lo_<mode>): Ditto.
2225 (vec_unpacks_hi_<mode>): Ditto.
2226 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
2227 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
2228 (*vec_extract<mode>_0): Ditto.
2229 (*<avx512>_cmp<mode>3): Extend to V48H_AVX512VL.
2231 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
2234 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Remove condition.
2236 2023-08-31 Jiufu Guo <guojiufu@linux.ibm.com>
2238 * range-op-mixed.h (operator_plus::overflow_free_p): New declare.
2239 (operator_minus::overflow_free_p): New declare.
2240 (operator_mult::overflow_free_p): New declare.
2241 * range-op.cc (range_op_handler::overflow_free_p): New function.
2242 (range_operator::overflow_free_p): New default function.
2243 (operator_plus::overflow_free_p): New function.
2244 (operator_minus::overflow_free_p): New function.
2245 (operator_mult::overflow_free_p): New function.
2246 * range-op.h (range_op_handler::overflow_free_p): New declare.
2247 (range_operator::overflow_free_p): New declare.
2248 * value-range.cc (irange::nonnegative_p): New function.
2249 (irange::nonpositive_p): New function.
2250 * value-range.h (irange::nonnegative_p): New declare.
2251 (irange::nonpositive_p): New declare.
2253 2023-08-30 Dimitar Dimitrov <dimitar@dinux.eu>
2256 * config/pru/predicates.md (const_0_operand): New predicate.
2257 (pru_cstore_comparison_operator): Ditto.
2258 * config/pru/pru.md (cstore<mode>4): New pattern.
2261 2023-08-30 Richard Biener <rguenther@suse.de>
2263 PR tree-optimization/111228
2264 * match.pd ((vec_perm (vec_perm ..) @5 ..) -> (vec_perm @x @5 ..)):
2265 New simplifications.
2267 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2269 * config/riscv/autovec.md (movmisalign<mode>): Delete.
2271 2023-08-30 Die Li <lidie@eswincomputing.com>
2272 Fei Gao <gaofei@eswincomputing.com>
2274 * config/riscv/peephole.md: New pattern.
2275 * config/riscv/predicates.md (a0a1_reg_operand): New predicate.
2276 (zcmp_mv_sreg_operand): New predicate.
2277 * config/riscv/riscv.md: New predicate.
2278 * config/riscv/zc.md (*mva01s<X:mode>): New pattern.
2279 (*mvsa01<X:mode>): New pattern.
2281 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
2283 * config/riscv/riscv.cc
2284 (riscv_zcmp_can_use_popretz): true if popretz can be used
2285 (riscv_gen_multi_pop_insn): interface to generate cm.pop[ret][z]
2286 (riscv_expand_epilogue): expand cm.pop[ret][z] in epilogue
2287 * config/riscv/riscv.md: define A0_REGNUM
2288 * config/riscv/zc.md
2289 (@gpr_multi_popretz_up_to_ra_<mode>): md for popretz ra
2290 (@gpr_multi_popretz_up_to_s0_<mode>): md for popretz ra, s0
2291 (@gpr_multi_popretz_up_to_s1_<mode>): likewise
2292 (@gpr_multi_popretz_up_to_s2_<mode>): likewise
2293 (@gpr_multi_popretz_up_to_s3_<mode>): likewise
2294 (@gpr_multi_popretz_up_to_s4_<mode>): likewise
2295 (@gpr_multi_popretz_up_to_s5_<mode>): likewise
2296 (@gpr_multi_popretz_up_to_s6_<mode>): likewise
2297 (@gpr_multi_popretz_up_to_s7_<mode>): likewise
2298 (@gpr_multi_popretz_up_to_s8_<mode>): likewise
2299 (@gpr_multi_popretz_up_to_s9_<mode>): likewise
2300 (@gpr_multi_popretz_up_to_s11_<mode>): likewise
2302 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
2304 * config/riscv/iterators.md
2305 (slot0_offset): slot 0 offset in stack GPRs area in bytes
2306 (slot1_offset): slot 1 offset in stack GPRs area in bytes
2307 (slot2_offset): likewise
2308 (slot3_offset): likewise
2309 (slot4_offset): likewise
2310 (slot5_offset): likewise
2311 (slot6_offset): likewise
2312 (slot7_offset): likewise
2313 (slot8_offset): likewise
2314 (slot9_offset): likewise
2315 (slot10_offset): likewise
2316 (slot11_offset): likewise
2317 (slot12_offset): likewise
2318 * config/riscv/predicates.md
2319 (stack_push_up_to_ra_operand): predicates of stack adjust pushing ra
2320 (stack_push_up_to_s0_operand): predicates of stack adjust pushing ra, s0
2321 (stack_push_up_to_s1_operand): likewise
2322 (stack_push_up_to_s2_operand): likewise
2323 (stack_push_up_to_s3_operand): likewise
2324 (stack_push_up_to_s4_operand): likewise
2325 (stack_push_up_to_s5_operand): likewise
2326 (stack_push_up_to_s6_operand): likewise
2327 (stack_push_up_to_s7_operand): likewise
2328 (stack_push_up_to_s8_operand): likewise
2329 (stack_push_up_to_s9_operand): likewise
2330 (stack_push_up_to_s11_operand): likewise
2331 (stack_pop_up_to_ra_operand): predicates of stack adjust poping ra
2332 (stack_pop_up_to_s0_operand): predicates of stack adjust poping ra, s0
2333 (stack_pop_up_to_s1_operand): likewise
2334 (stack_pop_up_to_s2_operand): likewise
2335 (stack_pop_up_to_s3_operand): likewise
2336 (stack_pop_up_to_s4_operand): likewise
2337 (stack_pop_up_to_s5_operand): likewise
2338 (stack_pop_up_to_s6_operand): likewise
2339 (stack_pop_up_to_s7_operand): likewise
2340 (stack_pop_up_to_s8_operand): likewise
2341 (stack_pop_up_to_s9_operand): likewise
2342 (stack_pop_up_to_s11_operand): likewise
2343 * config/riscv/riscv-protos.h
2344 (riscv_zcmp_valid_stack_adj_bytes_p):declaration
2345 * config/riscv/riscv.cc (struct riscv_frame_info): comment change
2346 (riscv_avoid_multi_push): helper function of riscv_use_multi_push
2347 (riscv_use_multi_push): true if multi push is used
2348 (riscv_multi_push_sregs_count): num of sregs in multi-push
2349 (riscv_multi_push_regs_count): num of regs in multi-push
2350 (riscv_16bytes_align): align to 16 bytes
2351 (riscv_stack_align): moved to a better place
2352 (riscv_save_libcall_count): no functional change
2353 (riscv_compute_frame_info): add zcmp frame info
2354 (riscv_for_each_saved_reg): save or restore fprs in specified slot for zcmp
2355 (riscv_adjust_multi_push_cfi_prologue): adjust cfi for cm.push
2356 (riscv_gen_multi_push_pop_insn): gen function for multi push and pop
2357 (get_multi_push_fpr_mask): get mask for the fprs pushed by cm.push
2358 (riscv_expand_prologue): allocate stack by cm.push
2359 (riscv_adjust_multi_pop_cfi_epilogue): adjust cfi for cm.pop[ret]
2360 (riscv_expand_epilogue): allocate stack by cm.pop[ret]
2361 (zcmp_base_adj): calculate stack adjustment base size
2362 (zcmp_additional_adj): calculate stack adjustment additional size
2363 (riscv_zcmp_valid_stack_adj_bytes_p): check if stack adjustment valid
2364 * config/riscv/riscv.h (RETURN_ADDR_MASK): mask of ra
2375 (S10_MASK): likewise
2376 (S11_MASK): likewise
2377 (MULTI_PUSH_GPR_MASK): GPR_MASK that cm.push can cover at most
2378 (ZCMP_MAX_SPIMM): max spimm value
2379 (ZCMP_SP_INC_STEP): zcmp sp increment step
2380 (ZCMP_INVALID_S0S10_SREGS_COUNTS): num of s0-s10
2381 (ZCMP_S0S11_SREGS_COUNTS): num of s0-s11
2382 (ZCMP_MAX_GRP_SLOTS): max slots of pushing and poping in zcmp
2383 (CALLEE_SAVED_FREG_NUMBER): get x of fsx(fs0 ~ fs11)
2384 * config/riscv/riscv.md: include zc.md
2385 * config/riscv/zc.md: New file. machine description for zcmp
2387 2023-08-30 Jakub Jelinek <jakub@redhat.com>
2389 PR tree-optimization/110914
2390 * tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcpy): Don't call
2391 adjust_last_stmt unless len is known constant.
2393 2023-08-30 Jakub Jelinek <jakub@redhat.com>
2395 PR tree-optimization/111015
2396 * gimple-ssa-store-merging.cc
2397 (imm_store_chain_info::output_merged_store): Use wi::mask and
2398 wide_int_to_tree instead of unsigned HOST_WIDE_INT shift and
2399 build_int_cst to build BIT_AND_EXPR mask.
2401 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2403 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Add MASK_LEN_ variant.
2404 (call_may_clobber_ref_p_1): Ditto.
2405 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
2406 (get_alias_ptr_type_for_ptr_address): Ditto.
2408 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2410 * config/riscv/riscv-vsetvl.cc
2411 (vector_insn_info::get_avl_or_vl_reg): Fix bug.
2413 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2415 * config/riscv/autovec-vls.md (movmisalign<mode>): New pattern.
2416 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Support
2419 2023-08-29 Philipp Tomsich <philipp.tomsich@vrull.eu>
2421 * config/riscv/zicond.md: New splitters to rewrite single bit
2422 sign extension as the condition to a czero in the desired form.
2424 2023-08-29 David Malcolm <dmalcolm@redhat.com>
2427 * doc/invoke.texi: Add -Wanalyzer-overlapping-buffers.
2429 2023-08-29 David Malcolm <dmalcolm@redhat.com>
2432 * Makefile.in (ANALYZER_OBJS): Add analyzer/ranges.o.
2434 2023-08-29 Jin Ma <jinma@linux.alibaba.com>
2436 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli):
2437 zvfh can generate zfa extended instruction fli.h, just like zfh.
2439 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
2440 Vineet Gupta <vineetg@rivosinc.com>
2442 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Generate
2443 __riscv_unaligned_avoid with value 1 or
2444 __riscv_unaligned_slow with value 1 or
2445 __riscv_unaligned_fast with value 1
2446 * config/riscv/riscv.cc (riscv_option_override): Define
2447 riscv_user_wants_strict_align. Set
2448 riscv_user_wants_strict_align to TARGET_STRICT_ALIGN
2449 * config/riscv/riscv.h: Declare riscv_user_wants_strict_align
2451 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
2453 * config/riscv/autovec-vls.md: Update types
2454 * config/riscv/riscv.md: Add vector placeholder type
2455 * config/riscv/vector.md: Update types
2457 2023-08-29 Carl Love <cel@us.ibm.com>
2459 * config/rs6000/dfp.md (UNSPEC_DQUAN): New unspec.
2460 (dfp_dqua_<mode>, dfp_dquai_<mode>): New define_insn.
2461 * config/rs6000/rs6000-builtins.def (__builtin_dfp_dqua,
2462 __builtin_dfp_dquai, __builtin_dfp_dquaq, __builtin_dfp_dquaqi):
2463 New buit-in definitions.
2464 * config/rs6000/rs6000-overload.def (__builtin_dfp_quantize): New
2465 overloaded definition.
2466 * doc/extend.texi: Add documentation for __builtin_dfp_quantize.
2468 2023-08-29 Pan Li <pan2.li@intel.com>
2469 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
2471 * config/riscv/riscv.cc (riscv_legitimize_poly_move): New declaration.
2472 (riscv_legitimize_const_move): Handle ref plus const poly.
2474 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
2476 * common/config/riscv/riscv-common.cc
2477 (riscv_implied_info): Add implications from unprivileged extensions.
2478 (riscv_ext_version_table): Add stub support for all unprivileged
2479 extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.
2481 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
2483 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
2484 Add stub support for all vendor extensions supported by Binutils.
2486 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
2488 * common/config/riscv/riscv-common.cc
2489 (riscv_implied_info): Add implications from privileged extensions.
2490 (riscv_ext_version_table): Add stub support for all privileged
2491 extensions supported by Binutils.
2493 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
2495 * config/riscv/autovec.md: Adjust
2496 * config/riscv/riscv-protos.h (RVV_VUNDEF): Clean.
2497 (get_vlmax_rtx): Exported.
2498 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Deleted.
2499 (emit_vlmax_masked_gather_mu_insn): Adjust.
2500 (get_vlmax_rtx): New func.
2501 (expand_load_store): Adjust.
2502 (expand_cond_len_unop): Call expand_cond_len_op.
2503 (expand_cond_len_op): New subroutine.
2504 (expand_cond_len_binop): Call expand_cond_len_op.
2505 (expand_cond_len_ternop): Call expand_cond_len_op.
2506 (expand_lanes_load_store): Adjust.
2508 2023-08-29 Jakub Jelinek <jakub@redhat.com>
2511 PR middle-end/111209
2512 * tree-ssa-math-opts.cc (match_uaddc_usubc): Match also
2513 just 2 limb uaddc/usubc with 0 carry-in on lower limb and ignored
2514 carry-out on higher limb. Don't match it though if it could be
2515 matched later on 4 argument addition/subtraction.
2517 2023-08-29 Andrew Pinski <apinski@marvell.com>
2519 PR tree-optimization/111147
2520 * match.pd (`(x | y) & (~x ^ y)`) Use bitwise_inverted_equal_p
2521 instead of matching bit_not.
2523 2023-08-29 Christophe Lyon <christophe.lyon@linaro.org>
2525 * config/arm/arm-mve-builtins.cc (type_suffixes): Add missing
2528 2023-08-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2530 * config/riscv/riscv-vsetvl.cc (vector_insn_info::get_avl_or_vl_reg): New function.
2531 (pass_vsetvl::compute_local_properties): Fix bug.
2532 (pass_vsetvl::commit_vsetvls): Ditto.
2533 * config/riscv/riscv-vsetvl.h: New function.
2535 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
2538 * config/riscv/predicates.md (vector_const_int_or_double_0_operand):
2540 * config/riscv/riscv-vector-builtins.cc (function_expander::function_expander):
2541 force_reg mem target operand.
2542 * config/riscv/vector.md (@pred_mov<mode>): Wrapper.
2543 (*pred_mov<mode>): Remove imm -> reg pattern.
2544 (*pred_broadcast<mode>_imm): Add imm -> reg pattern.
2546 2023-08-29 Lulu Cheng <chenglulu@loongson.cn>
2548 * common/config/loongarch/loongarch-common.cc:
2549 Enable '-free' on O2 and above.
2550 * doc/invoke.texi: Modify the description information
2551 of the '-free' compilation option and add the LoongArch
2554 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
2556 * doc/extend.texi: Fix the description of __builtin_riscv_pause.
2558 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
2560 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
2561 Implement the 'Zihintpause' extension, version 2.0.
2562 (riscv_ext_flag_table) Add 'Zihintpause' handling.
2563 * config/riscv/riscv-builtins.cc: Remove availability predicate
2564 "always" and add "hint_pause".
2565 (riscv_builtins) : Add "pause" extension.
2566 * config/riscv/riscv-opts.h (MASK_ZIHINTPAUSE, TARGET_ZIHINTPAUSE): New.
2567 * config/riscv/riscv.md (riscv_pause): Adjust output based on
2570 2023-08-28 Andrew Pinski <apinski@marvell.com>
2572 * match.pd (`(X & ~Y) | (~X & Y)`): Use bitwise_inverted_equal_p
2573 instead of specifically checking for ~X.
2575 2023-08-28 Andrew Pinski <apinski@marvell.com>
2577 PR tree-optimization/111146
2578 * match.pd (`(x | y) & ~x`, `(x & y) | ~x`): Remove
2581 2023-08-28 Andrew Pinski <apinski@marvell.com>
2583 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Add dump information
2584 when resimplify returns true.
2585 (match_simplify_replacement): Print only if accepted the match-and-simplify
2586 result rather than the full sequence.
2588 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2590 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Skip
2592 (pass_vsetvl::compute_probabilities): Fix unitialized probability.
2594 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2596 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Fix bug.
2598 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
2600 * config/arm/arm-mve-builtins-base.cc (vmullbq_poly)
2601 (vmulltq_poly): New.
2602 * config/arm/arm-mve-builtins-base.def (vmullbq_poly)
2603 (vmulltq_poly): New.
2604 * config/arm/arm-mve-builtins-base.h (vmullbq_poly)
2605 (vmulltq_poly): New.
2606 * config/arm/arm_mve.h (vmulltq_poly): Remove.
2607 (vmullbq_poly): Remove.
2608 (vmullbq_poly_m): Remove.
2609 (vmulltq_poly_m): Remove.
2610 (vmullbq_poly_x): Remove.
2611 (vmulltq_poly_x): Remove.
2612 (vmulltq_poly_p8): Remove.
2613 (vmullbq_poly_p8): Remove.
2614 (vmulltq_poly_p16): Remove.
2615 (vmullbq_poly_p16): Remove.
2616 (vmullbq_poly_m_p8): Remove.
2617 (vmullbq_poly_m_p16): Remove.
2618 (vmulltq_poly_m_p8): Remove.
2619 (vmulltq_poly_m_p16): Remove.
2620 (vmullbq_poly_x_p8): Remove.
2621 (vmullbq_poly_x_p16): Remove.
2622 (vmulltq_poly_x_p8): Remove.
2623 (vmulltq_poly_x_p16): Remove.
2624 (__arm_vmulltq_poly_p8): Remove.
2625 (__arm_vmullbq_poly_p8): Remove.
2626 (__arm_vmulltq_poly_p16): Remove.
2627 (__arm_vmullbq_poly_p16): Remove.
2628 (__arm_vmullbq_poly_m_p8): Remove.
2629 (__arm_vmullbq_poly_m_p16): Remove.
2630 (__arm_vmulltq_poly_m_p8): Remove.
2631 (__arm_vmulltq_poly_m_p16): Remove.
2632 (__arm_vmullbq_poly_x_p8): Remove.
2633 (__arm_vmullbq_poly_x_p16): Remove.
2634 (__arm_vmulltq_poly_x_p8): Remove.
2635 (__arm_vmulltq_poly_x_p16): Remove.
2636 (__arm_vmulltq_poly): Remove.
2637 (__arm_vmullbq_poly): Remove.
2638 (__arm_vmullbq_poly_m): Remove.
2639 (__arm_vmulltq_poly_m): Remove.
2640 (__arm_vmullbq_poly_x): Remove.
2641 (__arm_vmulltq_poly_x): Remove.
2643 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
2645 * config/arm/arm-mve-builtins-functions.h (class
2646 unspec_mve_function_exact_insn_vmull_poly): New.
2648 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
2650 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_poly): New.
2651 * config/arm/arm-mve-builtins-shapes.h (binary_widen_poly): New.
2653 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
2655 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): Add
2656 support for 'U' and 'p' format specifiers.
2658 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
2660 * config/arm/arm-mve-builtins.cc (type_suffixes): Handle poly_p
2662 (TYPES_poly_8_16): New.
2664 * config/arm/arm-mve-builtins.def (p8): New type suffix.
2666 * config/arm/arm-mve-builtins.h (enum type_class_index): Add
2668 (struct type_suffix_info): Add poly_p field.
2670 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
2672 * config/arm/arm-mve-builtins-base.cc (vmullbq_int, vmulltq_int):
2674 * config/arm/arm-mve-builtins-base.def (vmullbq_int, vmulltq_int):
2676 * config/arm/arm-mve-builtins-base.h (vmullbq_int, vmulltq_int):
2678 * config/arm/arm_mve.h (vmulltq_int): Remove.
2679 (vmullbq_int): Remove.
2680 (vmullbq_int_m): Remove.
2681 (vmulltq_int_m): Remove.
2682 (vmullbq_int_x): Remove.
2683 (vmulltq_int_x): Remove.
2684 (vmulltq_int_u8): Remove.
2685 (vmullbq_int_u8): Remove.
2686 (vmulltq_int_s8): Remove.
2687 (vmullbq_int_s8): Remove.
2688 (vmulltq_int_u16): Remove.
2689 (vmullbq_int_u16): Remove.
2690 (vmulltq_int_s16): Remove.
2691 (vmullbq_int_s16): Remove.
2692 (vmulltq_int_u32): Remove.
2693 (vmullbq_int_u32): Remove.
2694 (vmulltq_int_s32): Remove.
2695 (vmullbq_int_s32): Remove.
2696 (vmullbq_int_m_s8): Remove.
2697 (vmullbq_int_m_s32): Remove.
2698 (vmullbq_int_m_s16): Remove.
2699 (vmullbq_int_m_u8): Remove.
2700 (vmullbq_int_m_u32): Remove.
2701 (vmullbq_int_m_u16): Remove.
2702 (vmulltq_int_m_s8): Remove.
2703 (vmulltq_int_m_s32): Remove.
2704 (vmulltq_int_m_s16): Remove.
2705 (vmulltq_int_m_u8): Remove.
2706 (vmulltq_int_m_u32): Remove.
2707 (vmulltq_int_m_u16): Remove.
2708 (vmullbq_int_x_s8): Remove.
2709 (vmullbq_int_x_s16): Remove.
2710 (vmullbq_int_x_s32): Remove.
2711 (vmullbq_int_x_u8): Remove.
2712 (vmullbq_int_x_u16): Remove.
2713 (vmullbq_int_x_u32): Remove.
2714 (vmulltq_int_x_s8): Remove.
2715 (vmulltq_int_x_s16): Remove.
2716 (vmulltq_int_x_s32): Remove.
2717 (vmulltq_int_x_u8): Remove.
2718 (vmulltq_int_x_u16): Remove.
2719 (vmulltq_int_x_u32): Remove.
2720 (__arm_vmulltq_int_u8): Remove.
2721 (__arm_vmullbq_int_u8): Remove.
2722 (__arm_vmulltq_int_s8): Remove.
2723 (__arm_vmullbq_int_s8): Remove.
2724 (__arm_vmulltq_int_u16): Remove.
2725 (__arm_vmullbq_int_u16): Remove.
2726 (__arm_vmulltq_int_s16): Remove.
2727 (__arm_vmullbq_int_s16): Remove.
2728 (__arm_vmulltq_int_u32): Remove.
2729 (__arm_vmullbq_int_u32): Remove.
2730 (__arm_vmulltq_int_s32): Remove.
2731 (__arm_vmullbq_int_s32): Remove.
2732 (__arm_vmullbq_int_m_s8): Remove.
2733 (__arm_vmullbq_int_m_s32): Remove.
2734 (__arm_vmullbq_int_m_s16): Remove.
2735 (__arm_vmullbq_int_m_u8): Remove.
2736 (__arm_vmullbq_int_m_u32): Remove.
2737 (__arm_vmullbq_int_m_u16): Remove.
2738 (__arm_vmulltq_int_m_s8): Remove.
2739 (__arm_vmulltq_int_m_s32): Remove.
2740 (__arm_vmulltq_int_m_s16): Remove.
2741 (__arm_vmulltq_int_m_u8): Remove.
2742 (__arm_vmulltq_int_m_u32): Remove.
2743 (__arm_vmulltq_int_m_u16): Remove.
2744 (__arm_vmullbq_int_x_s8): Remove.
2745 (__arm_vmullbq_int_x_s16): Remove.
2746 (__arm_vmullbq_int_x_s32): Remove.
2747 (__arm_vmullbq_int_x_u8): Remove.
2748 (__arm_vmullbq_int_x_u16): Remove.
2749 (__arm_vmullbq_int_x_u32): Remove.
2750 (__arm_vmulltq_int_x_s8): Remove.
2751 (__arm_vmulltq_int_x_s16): Remove.
2752 (__arm_vmulltq_int_x_s32): Remove.
2753 (__arm_vmulltq_int_x_u8): Remove.
2754 (__arm_vmulltq_int_x_u16): Remove.
2755 (__arm_vmulltq_int_x_u32): Remove.
2756 (__arm_vmulltq_int): Remove.
2757 (__arm_vmullbq_int): Remove.
2758 (__arm_vmullbq_int_m): Remove.
2759 (__arm_vmulltq_int_m): Remove.
2760 (__arm_vmullbq_int_x): Remove.
2761 (__arm_vmulltq_int_x): Remove.
2763 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
2765 * config/arm/arm-mve-builtins-shapes.cc (binary_widen): New.
2766 * config/arm/arm-mve-builtins-shapes.h (binary_widen): New.
2768 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
2770 * config/arm/arm-mve-builtins-functions.h (class
2771 unspec_mve_function_exact_insn_vmull): New.
2773 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
2775 * config/arm/iterators.md (mve_insn): Add vmullb, vmullt.
2776 (isu): Add VMULLBQ_INT_S, VMULLBQ_INT_U, VMULLTQ_INT_S,
2778 (supf): Add VMULLBQ_POLY_P, VMULLTQ_POLY_P, VMULLBQ_POLY_M_P,
2780 (VMULLBQ_INT, VMULLTQ_INT, VMULLBQ_INT_M, VMULLTQ_INT_M): Delete.
2781 (VMULLxQ_INT, VMULLxQ_POLY, VMULLxQ_INT_M, VMULLxQ_POLY_M): New.
2782 * config/arm/mve.md (mve_vmullbq_int_<supf><mode>)
2783 (mve_vmulltq_int_<supf><mode>): Merge into ...
2784 (@mve_<mve_insn>q_int_<supf><mode>) ... this.
2785 (mve_vmulltq_poly_p<mode>, mve_vmullbq_poly_p<mode>): Merge into ...
2786 (@mve_<mve_insn>q_poly_<supf><mode>): ... this.
2787 (mve_vmullbq_int_m_<supf><mode>, mve_vmulltq_int_m_<supf><mode>): Merge into ...
2788 (@mve_<mve_insn>q_int_m_<supf><mode>): ... this.
2789 (mve_vmullbq_poly_m_p<mode>, mve_vmulltq_poly_m_p<mode>): Merge into ...
2790 (@mve_<mve_insn>q_poly_m_<supf><mode>): ... this.
2792 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
2794 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type):
2797 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
2799 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): Fix loop bound.
2800 (binary_acca_int64): Likewise.
2802 2023-08-28 Aldy Hernandez <aldyh@redhat.com>
2804 * range-op-float.cc (fold_range): Handle relations.
2806 2023-08-28 Lulu Cheng <chenglulu@loongson.cn>
2808 * config/loongarch/loongarch.cc (loongarch_expand_conditional_move):
2809 Optimize the function implementation.
2811 2023-08-28 liuhongt <hongtao.liu@intel.com>
2814 * config/i386/sse.md (V48_AVX2): Rename to ..
2815 (V48_128_256): .. this.
2816 (ssefltmodesuffix): Extend to V4SF/V8SF/V2DF/V4DF.
2817 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Change
2818 V48_AVX2 to V48_128_256, also generate vmaskmov{ps,pd} for
2819 integral modes when TARGET_AVX2 is not available.
2820 (<avx_avx2>_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
2821 (maskload<mode><sseintvecmodelower>): Change V48_AVX2 to
2823 (maskstore<mode><sseintvecmodelower>): Ditto.
2825 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2827 * config/riscv/riscv-vsetvl.cc (vsetvl_vtype_change_only_p):
2829 (after_or_same_p): Ditto.
2830 (find_reg_killed_by): Delete.
2831 (has_vsetvl_killed_avl_p): Ditto.
2832 (anticipatable_occurrence_p): Refactor.
2833 (any_set_in_bb_p): Delete.
2834 (count_regno_occurrences): Ditto.
2835 (backward_propagate_worthwhile_p): Ditto.
2836 (demands_can_be_fused_p): Ditto.
2837 (earliest_pred_can_be_fused_p): New function.
2838 (vsetvl_dominated_by_p): Ditto.
2839 (vector_insn_info::parse_insn): Refactor.
2840 (vector_insn_info::merge): Refactor.
2841 (vector_insn_info::dump): Refactor.
2842 (vector_infos_manager::vector_infos_manager): Refactor.
2843 (vector_infos_manager::all_empty_predecessor_p): Delete.
2844 (vector_infos_manager::all_same_avl_p): Ditto.
2845 (vector_infos_manager::create_bitmap_vectors): Refactor.
2846 (vector_infos_manager::free_bitmap_vectors): Refactor.
2847 (vector_infos_manager::dump): Refactor.
2848 (pass_vsetvl::update_block_info): New function.
2849 (enum fusion_type): Ditto.
2850 (pass_vsetvl::get_backward_fusion_type): Delete.
2851 (pass_vsetvl::hard_empty_block_p): Ditto.
2852 (pass_vsetvl::backward_demand_fusion): Ditto.
2853 (pass_vsetvl::forward_demand_fusion): Ditto.
2854 (pass_vsetvl::demand_fusion): Ditto.
2855 (pass_vsetvl::cleanup_illegal_dirty_blocks): Ditto.
2856 (pass_vsetvl::compute_local_properties): Ditto.
2857 (pass_vsetvl::earliest_fusion): New function.
2858 (pass_vsetvl::vsetvl_fusion): Ditto.
2859 (pass_vsetvl::commit_vsetvls): Refactor.
2860 (get_first_vsetvl_before_rvv_insns): Ditto.
2861 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
2862 (pass_vsetvl::cleanup_earliest_vsetvls): New function.
2863 (pass_vsetvl::df_post_optimization): Refactor.
2864 (pass_vsetvl::lazy_vsetvl): Ditto.
2865 * config/riscv/riscv-vsetvl.h: Ditto.
2867 2023-08-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2869 * config/riscv/autovec.md (len_fold_extract_last_<mode>): New pattern.
2870 * config/riscv/riscv-protos.h (enum insn_type): New enum.
2871 (expand_fold_extract_last): New function.
2872 * config/riscv/riscv-v.cc (emit_nonvlmax_slide_insn): Ditto.
2873 (emit_cpop_insn): Ditto.
2874 (emit_nonvlmax_compress_insn): Ditto.
2875 (expand_fold_extract_last): Ditto.
2876 * config/riscv/vector.md: Fix vcpop.m ratio demand.
2878 2023-08-25 Edwin Lu <ewlu@rivosinc.com>
2880 * config/riscv/sync-rvwmo.md: updated types to "multi" or
2881 "atomic" based on number of assembly lines generated
2882 * config/riscv/sync-ztso.md: likewise
2883 * config/riscv/sync.md: likewise
2885 2023-08-25 Jin Ma <jinma@linux.alibaba.com>
2887 * common/config/riscv/riscv-common.cc: Add zfa extension version, which depends on
2889 * config/riscv/constraints.md (zfli): Constrain the floating point number that the
2890 instructions FLI.H/S/D can load.
2891 * config/riscv/iterators.md (ceil): New.
2892 * config/riscv/riscv-opts.h (MASK_ZFA): New.
2894 * config/riscv/riscv-protos.h (riscv_float_const_rtx_index_for_fli): New.
2895 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli): New.
2896 (riscv_cannot_force_const_mem): If instruction FLI.H/S/D can be used, memory is
2898 (riscv_const_insns): Likewise.
2899 (riscv_legitimize_const_move): Likewise.
2900 (riscv_split_64bit_move_p): If instruction FLI.H/S/D can be used, no split is
2902 (riscv_split_doubleword_move): Likewise.
2903 (riscv_output_move): Output the mov instructions in zfa extension.
2904 (riscv_print_operand): Output the floating-point value of the FLI.H/S/D immediate
2906 (riscv_secondary_memory_needed): Likewise.
2907 * config/riscv/riscv.md (fminm<mode>3): New.
2908 (fmaxm<mode>3): New.
2909 (movsidf2_low_rv32): New.
2910 (movsidf2_high_rv32): New.
2911 (movdfsisi3_rv32): New.
2912 (f<quiet_pattern>_quiet<ANYF:mode><X:mode>4_zfa): New.
2913 * config/riscv/riscv.opt: New.
2915 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
2918 * omp-general.cc (omp_runtime_api_procname): New.
2919 (omp_runtime_api_call): Moved here from omp-low.cc, and make
2921 * omp-general.h: Include omp-api.h.
2922 * omp-low.cc (omp_runtime_api_call): Delete this copy.
2924 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
2926 * doc/generic.texi (OpenMP): Document OMP_STRUCTURED_BLOCK.
2927 * doc/gimple.texi (GIMPLE instruction set): Add
2928 GIMPLE_OMP_STRUCTURED_BLOCK.
2929 (GIMPLE_OMP_STRUCTURED_BLOCK): New subsection.
2930 * gimple-low.cc (lower_stmt): Error on GIMPLE_OMP_STRUCTURED_BLOCK.
2931 * gimple-pretty-print.cc (dump_gimple_omp_block): Handle
2932 GIMPLE_OMP_STRUCTURED_BLOCK.
2933 (pp_gimple_stmt_1): Likewise.
2934 * gimple-walk.cc (walk_gimple_stmt): Likewise.
2935 * gimple.cc (gimple_build_omp_structured_block): New.
2936 * gimple.def (GIMPLE_OMP_STRUCTURED_BLOCK): New.
2937 * gimple.h (gimple_build_omp_structured_block): Declare.
2938 (gimple_has_substatements): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
2939 (CASE_GIMPLE_OMP): Likewise.
2940 * gimplify.cc (is_gimple_stmt): Handle OMP_STRUCTURED_BLOCK.
2941 (gimplify_expr): Likewise.
2942 * omp-expand.cc (GIMPLE_OMP_STRUCTURED_BLOCK): Error on
2943 GIMPLE_OMP_STRUCTURED_BLOCK.
2944 * omp-low.cc (scan_omp_1_stmt): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
2945 (lower_omp_1): Likewise.
2946 (diagnose_sb_1): Likewise.
2947 (diagnose_sb_2): Likewise.
2948 * tree-inline.cc (remap_gimple_stmt): Handle
2949 GIMPLE_OMP_STRUCTURED_BLOCK.
2950 (estimate_num_insns): Likewise.
2951 * tree-nested.cc (convert_nonlocal_reference_stmt): Likewise.
2952 (convert_local_reference_stmt): Likewise.
2953 (convert_gimple_call): Likewise.
2954 * tree-pretty-print.cc (dump_generic_node): Handle
2955 OMP_STRUCTURED_BLOCK.
2956 * tree.def (OMP_STRUCTURED_BLOCK): New.
2957 * tree.h (OMP_STRUCTURED_BLOCK_BODY): New.
2959 2023-08-25 Vineet Gupta <vineetg@rivosinc.com>
2961 * config/riscv/riscv.cc (riscv_rtx_costs): Adjust const_int
2962 cost. Add some comments about different constants handling.
2964 2023-08-25 Andrew Pinski <apinski@marvell.com>
2966 * match.pd (`a ? one_zero : one_zero`): Move
2967 below detection of minmax.
2969 2023-08-25 Andrew Pinski <apinski@marvell.com>
2971 * match.pd (`a | C -> C`): New pattern.
2973 2023-08-25 Uros Bizjak <ubizjak@gmail.com>
2975 * caller-save.cc (new_saved_hard_reg):
2976 Rename TRUE/FALSE to true/false.
2977 (setup_save_areas): Ditto.
2978 * gcc.cc (set_collect_gcc_options): Ditto.
2979 (driver::build_multilib_strings): Ditto.
2980 (print_multilib_info): Ditto.
2981 * genautomata.cc (gen_cpu_unit): Ditto.
2982 (gen_query_cpu_unit): Ditto.
2983 (gen_bypass): Ditto.
2984 (gen_excl_set): Ditto.
2985 (gen_presence_absence_set): Ditto.
2986 (gen_presence_set): Ditto.
2987 (gen_final_presence_set): Ditto.
2988 (gen_absence_set): Ditto.
2989 (gen_final_absence_set): Ditto.
2990 (gen_automaton): Ditto.
2991 (gen_regexp_repeat): Ditto.
2992 (gen_regexp_allof): Ditto.
2993 (gen_regexp_oneof): Ditto.
2994 (gen_regexp_sequence): Ditto.
2995 (process_decls): Ditto.
2996 (reserv_sets_are_intersected): Ditto.
2997 (initiate_excl_sets): Ditto.
2998 (form_reserv_sets_list): Ditto.
2999 (check_presence_pattern_sets): Ditto.
3000 (check_absence_pattern_sets): Ditto.
3001 (check_regexp_units_distribution): Ditto.
3002 (check_unit_distributions_to_automata): Ditto.
3003 (create_ainsns): Ditto.
3004 (output_insn_code_cases): Ditto.
3005 (output_internal_dead_lock_func): Ditto.
3006 (form_important_insn_automata_lists): Ditto.
3007 * gengtype-state.cc (read_state_files_list): Ditto.
3008 * gengtype.cc (main): Ditto.
3009 * gimple-array-bounds.cc (array_bounds_checker::check_array_bounds):
3011 * gimple.cc (gimple_build_call_from_tree): Ditto.
3012 (preprocess_case_label_vec_for_gimple): Ditto.
3013 * gimplify.cc (gimplify_call_expr): Ditto.
3014 * ordered-hash-map-tests.cc (test_map_of_int_to_strings): Ditto.
3016 2023-08-25 Richard Biener <rguenther@suse.de>
3018 PR tree-optimization/111137
3019 * tree-vect-data-refs.cc (vect_slp_analyze_load_dependences):
3020 Properly handle grouped stores from other SLP instances.
3022 2023-08-25 Richard Biener <rguenther@suse.de>
3024 * tree-vect-data-refs.cc (vect_slp_analyze_store_dependences):
3025 Split out from vect_slp_analyze_node_dependences, remove
3027 (vect_slp_analyze_load_dependences): Split out from
3028 vect_slp_analyze_node_dependences, adjust comments. Process
3029 queued stores before any disambiguation.
3030 (vect_slp_analyze_node_dependences): Remove.
3031 (vect_slp_analyze_instance_dependence): Adjust.
3033 2023-08-25 Aldy Hernandez <aldyh@redhat.com>
3035 * range-op-float.cc (frelop_early_resolve): Rewrite for better NAN
3037 (operator_not_equal::fold_range): Adjust for relations.
3038 (operator_lt::fold_range): Same.
3039 (operator_gt::fold_range): Same.
3040 (foperator_unordered_equal::fold_range): Same.
3041 (foperator_unordered_lt::fold_range): Same.
3042 (foperator_unordered_le::fold_range): Same.
3043 (foperator_unordered_gt::fold_range): Same.
3044 (foperator_unordered_ge::fold_range): Same.
3046 2023-08-25 Richard Biener <rguenther@suse.de>
3048 PR tree-optimization/111136
3049 * tree-vect-loop.cc (vect_dissolve_slp_only_groups): For
3050 stores force STMT_VINFO_STRIDED_P and also duplicate that
3053 2023-08-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3055 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_local_properties):
3058 2023-08-25 liuhongt <hongtao.liu@intel.com>
3060 * config/i386/sse.md (vec_set<mode>): Removed.
3061 (V_128H): Merge into ..
3063 (V_256H): Merge into ..
3065 (V_512): Add V32HF, V32BF.
3066 (*ssse3_palignr<mode>_perm): Adjust mode iterator from V_128H
3068 (vcond<mode><sseintvecmodelower>): Removed
3069 (vcondu<mode><sseintvecmodelower>): Removed.
3070 (avx_vbroadcastf128_<mode>): Refator from V_256H to V_256.
3072 2023-08-25 Hongyu Wang <hongyu.wang@intel.com>
3075 * config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode>_maskz):
3076 Adjust paramter order.
3078 2023-08-24 Uros Bizjak <ubizjak@gmail.com>
3081 * config/i386/sse.md (*sse2_movq128_<mode>_1): New insn pattern.
3083 2023-08-24 David Malcolm <dmalcolm@redhat.com>
3086 * doc/invoke.texi (Static Analyzer Options): Add "strcat" to the
3087 list of functions known to the analyzer.
3089 2023-08-24 Richard Biener <rguenther@suse.de>
3091 PR tree-optimization/111123
3092 * tree-ssa-ccp.cc (pass_fold_builtins::execute): Do not
3093 remove indirect clobbers here ...
3094 * tree-outof-ssa.cc (rewrite_out_of_ssa): ... but here.
3095 (remove_indirect_clobbers): New function.
3097 2023-08-24 Jan Hubicka <jh@suse.cz>
3099 * cfg.h (struct control_flow_graph): New field full_profile.
3100 * auto-profile.cc (afdo_annotate_cfg): Set full_profile to true.
3101 * cfg.cc (init_flow): Set full_profile to false.
3102 * graphite.cc (graphite_transform_loops): Set full_profile to false.
3103 * lto-streamer-in.cc (input_cfg): Initialize full_profile flag.
3104 * predict.cc (pass_profile::execute): Set full_profile to true.
3105 * symtab-thunks.cc (expand_thunk): Set full_profile to true.
3106 * tree-cfg.cc (gimple_verify_flow_info): Verify that profile is full
3107 if full_profile is set.
3108 * tree-inline.cc (initialize_cfun): Initialize full_profile.
3109 (expand_call_inline): Combine full_profile.
3111 2023-08-24 Richard Biener <rguenther@suse.de>
3113 * tree-vect-slp.cc (vect_build_slp_tree_1): Rename
3114 load_p to ldst_p, fix mistakes and rely on
3115 STMT_VINFO_DATA_REF.
3117 2023-08-24 Jan Hubicka <jh@suse.cz>
3119 * gimple-harden-conditionals.cc (insert_check_and_trap): Set count
3120 of newly build trap bb.
3122 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3124 * config/riscv/riscv.cc (riscv_preferred_else_value): Remove it since
3125 it forbid COND_LEN_FMS/COND_LEN_FNMS STMT fold.
3126 (TARGET_PREFERRED_ELSE_VALUE): Ditto.
3128 2023-08-24 Robin Dapp <rdapp.gcc@gmail.com>
3130 * common/config/riscv/riscv-common.cc: Add -fsched-pressure.
3131 * config/riscv/riscv.cc (riscv_option_override): Set sched
3134 2023-08-24 Robin Dapp <rdapp@ventanamicro.com>
3136 * config/riscv/riscv.cc (riscv_print_operand): Allow vk operand.
3138 2023-08-24 Richard Biener <rguenther@suse.de>
3140 PR tree-optimization/111125
3141 * tree-vect-slp.cc (vect_slp_function): Split at novector
3142 loop entry, do not push blocks in novector loops.
3144 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
3146 * doc/extend.texi: Document the C [[__extension__ ...]] construct.
3148 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3150 * genmatch.cc (decision_tree::gen): Support
3151 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
3152 * gimple-match-exports.cc (gimple_simplify): Ditto.
3153 (gimple_resimplify6): New function.
3154 (gimple_resimplify7): New function.
3155 (gimple_match_op::resimplify): Support
3156 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
3157 (convert_conditional_op): Ditto.
3158 (build_call_internal): Ditto.
3159 (try_conditional_simplification): Ditto.
3160 (gimple_extract): Ditto.
3161 * gimple-match.h (gimple_match_cond::gimple_match_cond): Ditto.
3162 * internal-fn.cc (CASE): Ditto.
3164 2023-08-24 Richard Biener <rguenther@suse.de>
3166 PR tree-optimization/111115
3167 * tree-vectorizer.h (vect_slp_child_index_for_operand): New.
3168 * tree-vect-data-refs.cc (can_group_stmts_p): Also group
3170 * tree-vect-slp.cc (arg3_arg2_map): New.
3171 (vect_get_operand_map): Handle IFN_MASK_STORE.
3172 (vect_slp_child_index_for_operand): New function.
3173 (vect_build_slp_tree_1): Handle statements with no LHS,
3175 (vect_remove_slp_scalar_calls): Likewise.
3176 * tree-vect-stmts.cc (vect_check_store_rhs): Lookup the
3177 SLP child corresponding to the ifn value index.
3178 (vectorizable_store): Likewise for the mask index. Support
3180 (vectorizable_load): Lookup the SLP child corresponding to the
3183 2023-08-24 Richard Biener <rguenther@suse.de>
3185 PR tree-optimization/111125
3186 * tree-vect-slp.cc (vectorizable_bb_reduc_epilogue): Account
3187 for the remain_defs processing.
3189 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
3191 * config/aarch64/aarch64.cc: Include ssa.h.
3192 (aarch64_multiply_add_p): Require the second operand of an
3193 Advanced SIMD subtraction to be a multiplication. Assume that
3194 such an operation won't be fused if the second operand is used
3195 multiple times and if the first operand is also a multiplication.
3197 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3199 * tree-vect-loop.cc (vectorizable_reduction): Apply
3200 LEN_FOLD_EXTRACT_LAST.
3201 * tree-vect-stmts.cc (vectorizable_condition): Ditto.
3203 2023-08-24 Richard Biener <rguenther@suse.de>
3205 PR tree-optimization/111128
3206 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
3207 Emit external shift operand inline if we promoted it with
3208 another pattern stmt.
3210 2023-08-24 Pan Li <pan2.li@intel.com>
3212 * config/riscv/autovec.md: Fix typo.
3214 2023-08-24 Pan Li <pan2.li@intel.com>
3216 * config/riscv/riscv-vector-builtins-bases.cc
3217 (class binop_frm): Removed.
3218 (class reverse_binop_frm): Ditto.
3219 (class widen_binop_frm): Ditto.
3220 (class vfmacc_frm): Ditto.
3221 (class vfnmacc_frm): Ditto.
3222 (class vfmsac_frm): Ditto.
3223 (class vfnmsac_frm): Ditto.
3224 (class vfmadd_frm): Ditto.
3225 (class vfnmadd_frm): Ditto.
3226 (class vfmsub_frm): Ditto.
3227 (class vfnmsub_frm): Ditto.
3228 (class vfwmacc_frm): Ditto.
3229 (class vfwnmacc_frm): Ditto.
3230 (class vfwmsac_frm): Ditto.
3231 (class vfwnmsac_frm): Ditto.
3232 (class unop_frm): Ditto.
3233 (class vfrec7_frm): Ditto.
3234 (class binop): Add frm_op_type template arg.
3235 (class unop): Ditto.
3236 (class widen_binop): Ditto.
3237 (class widen_binop_fp): Ditto.
3238 (class reverse_binop): Ditto.
3239 (class vfmacc): Ditto.
3240 (class vfnmsac): Ditto.
3241 (class vfmadd): Ditto.
3242 (class vfnmsub): Ditto.
3243 (class vfnmacc): Ditto.
3244 (class vfmsac): Ditto.
3245 (class vfnmadd): Ditto.
3246 (class vfmsub): Ditto.
3247 (class vfwmacc): Ditto.
3248 (class vfwnmacc): Ditto.
3249 (class vfwmsac): Ditto.
3250 (class vfwnmsac): Ditto.
3251 (class float_misc): Ditto.
3253 2023-08-24 Andrew Pinski <apinski@marvell.com>
3255 PR tree-optimization/111109
3256 * match.pd (ior(cond,cond), ior(vec_cond,vec_cond)):
3257 Add check to make sure cmp and icmp are inverse.
3259 2023-08-24 Andrew Pinski <apinski@marvell.com>
3261 PR tree-optimization/95929
3262 * match.pd (convert?(-a)): New pattern
3263 for 1bit integer types.
3265 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
3268 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
3270 * common/config/i386/cpuinfo.h (get_available_features):
3271 Add avx10_set and version and detect avx10.1.
3272 (cpu_indicator_init): Handle avx10.1-512.
3273 * common/config/i386/i386-common.cc
3274 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
3275 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
3276 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
3277 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
3278 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
3279 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
3281 * common/config/i386/i386-cpuinfo.h (enum processor_features):
3282 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
3283 FEATURE_AVX10_512BIT.
3284 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
3285 AVX10_512BIT, AVX10_1 and AVX10_1_512.
3286 * config/i386/constraints.md (Yk): Add AVX10_1.
3289 * config/i386/cpuid.h (bit_AVX10): New.
3290 (bit_AVX10_256): Ditto.
3291 (bit_AVX10_512): Ditto.
3292 * config/i386/i386-c.cc (ix86_target_macros_internal):
3293 Define AVX10_512BIT and AVX10_1.
3294 * config/i386/i386-isa.def
3295 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
3296 (AVX10_1): Add DEF_PTA(AVX10_1).
3297 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
3298 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
3300 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
3301 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
3302 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
3303 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
3304 (ix86_conditional_register_usage): Ditto.
3305 (ix86_hard_regno_mode_ok): Ditto.
3306 (ix86_rtx_costs): Ditto.
3307 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
3308 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
3310 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
3311 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
3312 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
3315 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
3318 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
3320 * common/config/i386/i386-common.cc
3321 (ix86_check_avx10): New function to check isa_flags and
3322 isa_flags_explicit to emit warning when AVX10 is enabled
3324 (ix86_check_avx512): New function to check isa_flags and
3325 isa_flags_explicit to emit warning when AVX512 is enabled
3327 (ix86_handle_option): Do not change the flags when warning
3329 * config/i386/driver-i386.cc (host_detect_local_cpu):
3330 Do not append -mno-avx10.1 for -march=native.
3332 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
3335 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
3337 * common/config/i386/i386-common.cc
3338 (ix86_check_avx10_vector_width): New function to check isa_flags
3339 to emit a warning when there is a conflict in AVX10 options for
3341 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
3342 * config/i386/driver-i386.cc (host_detect_local_cpu):
3343 Do not append -mno-avx10-max-512bit for -march=native.
3345 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
3348 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
3350 * config/i386/avx512vldqintrin.h: Remove target attribute.
3351 * config/i386/i386-builtin.def (BDESC):
3352 Add OPTION_MASK_ISA2_AVX10_1.
3353 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
3354 * config/i386/i386-expand.cc
3355 (ix86_check_builtin_isa_match): Ditto.
3356 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
3357 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
3358 and avx10_1_or_avx512vl.
3359 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
3360 (VF1_128_256VLDQ_AVX10_1): Ditto.
3361 (VI8_AVX512VLDQ_AVX10_1): Ditto.
3362 (<sse>_andnot<mode>3<mask_name>):
3363 Add TARGET_AVX10_1 and change isa attr from avx512dq to
3364 avx10_1_or_avx512dq.
3365 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
3366 avx512vl to avx10_1_or_avx512vl.
3367 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
3368 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
3369 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
3371 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
3373 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
3374 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
3375 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
3377 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
3378 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
3379 Remove target check.
3380 (avx512dq_mul<mode>3<mask_name>): Ditto.
3381 (*avx512dq_mul<mode>3<mask_name>): Ditto.
3382 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
3383 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
3384 Remove target check.
3385 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
3386 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
3387 Remove target check.
3388 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
3389 (mask_avx512vl_condition): Ditto.
3392 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
3395 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
3397 * config/i386/avx512vldqintrin.h: Remove target attribute.
3398 * config/i386/i386-builtin.def (BDESC):
3399 Add OPTION_MASK_ISA2_AVX10_1.
3400 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
3401 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
3402 (VI48_AVX512VLDQ_AVX10_1): Ditto.
3403 (VF2_AVX512VL): Remove.
3404 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
3406 (*<code><mode>3<mask_name>): Change isa attribute to
3407 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
3408 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
3409 to avx10_1_or_avx512vl.
3410 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
3411 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
3412 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
3414 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
3415 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
3416 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
3418 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
3419 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
3420 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
3421 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
3422 (float<floatunssuffix>v4div4sf2<mask_name>):
3424 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
3425 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
3426 (float<floatunssuffix>v2div2sf2): Ditto.
3427 (float<floatunssuffix>v2div2sf2_mask): Ditto.
3428 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
3429 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
3430 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
3431 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
3432 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
3433 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
3434 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
3435 Change when constraint is enabled.
3437 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
3440 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
3442 * config/i386/avx512vldqintrin.h: Remove target attribute.
3443 * config/i386/i386-builtin.def (BDESC):
3444 Add OPTION_MASK_ISA2_AVX10_1.
3445 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
3446 (VFH_AVX512VLDQ_AVX10_1): Ditto.
3447 (VF1_AVX512VLDQ_AVX10_1): Ditto.
3448 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
3449 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
3450 (vec_pack<floatprefix>_float_<mode>): Change iterator to
3451 VI8_AVX512VLDQ_AVX10_1. Remove target check.
3452 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
3453 VF1_AVX512VLDQ_AVX10_1. Remove target check.
3454 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
3455 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
3456 (avx512vl_vextractf128<mode>): Change iterator to
3457 VI48F_256_DQVL_AVX10_1. Remove target check.
3458 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
3459 (vec_extract_hi_<mode>): Ditto.
3460 (avx512vl_vinsert<mode>): Ditto.
3461 (vec_set_lo_<mode><mask_name>): Ditto.
3462 (vec_set_hi_<mode><mask_name>): Ditto.
3463 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
3464 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
3465 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
3466 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
3467 * config/i386/subst.md (mask_avx512dq_condition): Add
3469 (mask_scalar_merge): Ditto.
3471 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
3474 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
3477 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
3480 2023-08-24 Richard Biener <rguenther@suse.de>
3483 * dwarf2out.cc (prune_unused_types_walk): Handle
3484 DW_TAG_restrict_type, DW_TAG_shared_type, DW_TAG_atomic_type,
3485 DW_TAG_immutable_type, DW_TAG_coarray_type, DW_TAG_unspecified_type
3486 and DW_TAG_dynamic_type as to only output them when referenced.
3488 2023-08-24 liuhongt <hongtao.liu@intel.com>
3490 * config/i386/i386.cc (ix86_invalid_conversion): Adjust GCC
3493 2023-08-24 liuhongt <hongtao.liu@intel.com>
3495 * common/config/i386/i386-common.cc (processor_names): Add new
3496 member graniterapids-s and arrowlake-s.
3497 * config/i386/i386-options.cc (processor_alias_table): Update
3498 table with PROCESSOR_ARROWLAKE_S and
3499 PROCESSOR_GRANITERAPIDS_D.
3500 (m_GRANITERAPID_D): New macro.
3501 (m_ARROWLAKE_S): Ditto.
3502 (m_CORE_AVX512): Add m_GRANITERAPIDS_D.
3503 (processor_cost_table): Add icelake_cost for
3504 PROCESSOR_GRANITERAPIDS_D and alderlake_cost for
3505 PROCESSOR_ARROWLAKE_S.
3506 * config/i386/x86-tune.def: Hanlde m_ARROWLAKE_S same as
3508 * config/i386/i386.h (enum processor_type): Add new member
3509 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S.
3510 * config/i386/i386-c.cc (ix86_target_macros_internal): Handle
3511 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S
3513 2023-08-23 Jivan Hakobyan <jivanhakobyan9@gmail.com>
3515 * lra-eliminations.cc (eliminate_regs_in_insn): Use equivalences to
3516 to help simplify code further.
3518 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
3520 * gimple-range-fold.cc (fold_using_range::range_of_phi): Tweak output.
3521 * gimple-range-phi.cc (phi_group::phi_group): Remove unused members.
3522 Initialize using a range instead of value and edge.
3523 (phi_group::calculate_using_modifier): Use initializer value and
3524 process for relations after trying for iteration convergence.
3525 (phi_group::refine_using_relation): Use initializer range.
3526 (phi_group::dump): Rework the dump output.
3527 (phi_analyzer::process_phi): Allow multiple constant initilizers.
3528 Dump groups immediately as created.
3529 (phi_analyzer::dump): Tweak output.
3530 * gimple-range-phi.h (phi_group::phi_group): Adjust prototype.
3531 (phi_group::initial_value): Delete.
3532 (phi_group::refine_using_relation): Adjust prototype.
3533 (phi_group::m_initial_value): Delete.
3534 (phi_group::m_initial_edge): Delete.
3535 (phi_group::m_vr): Use int_range_max.
3536 * tree-vrp.cc (execute_ranger_vrp): Don't dump phi groups.
3538 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
3540 * gimple-range-phi.cc (phi_analyzer::operator[]): Return NULL if
3541 no group was created.
3542 (phi_analyzer::process_phi): Do not create groups of one phi node.
3544 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
3546 * target.def (gen_ccmp_first, gen_ccmp_next): Use rtx_code for
3547 CODE, CMP_CODE and BIT_CODE arguments.
3548 * config/aarch64/aarch64.cc (aarch64_gen_ccmp_first): Likewise.
3549 (aarch64_gen_ccmp_next): Likewise.
3550 * doc/tm.texi: Regenerated.
3552 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
3554 * coretypes.h (rtx_code): Add forward declaration.
3555 * rtl.h (rtx_code): Make compatible with forward declaration.
3557 2023-08-23 Uros Bizjak <ubizjak@gmail.com>
3560 * config/i386/i386.md (*concat<any_or_plus:mode><dwi>3_3):
3561 Merge pattern from *concatditi3_3 and *concatsidi3_3 using
3562 DWIH mode iterator. Disable (=&r,m,m) alternative for
3564 (*concat<any_or_plus:mode><dwi>3_3): Disable (=&r,m,m)
3565 alternative for 32-bit targets.
3567 2023-08-23 Zhangjin Liao <liaozhangjin@eswincomputing.com>
3569 * config/riscv/bitmanip.md (*<bitmanip_optab>disi2_sext): Add a more
3570 appropriate type attribute.
3572 2023-08-23 Lehua Ding <lehua.ding@rivai.ai>
3574 * config/riscv/autovec-opt.md (*cond_abs<mode>): New combine pattern.
3575 (*copysign<mode>_neg): Ditto.
3576 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Adjust.
3577 (<optab><mode>2): Ditto.
3578 (cond_<optab><mode>): New.
3579 (cond_len_<optab><mode>): Ditto.
3580 * config/riscv/riscv-protos.h (enum insn_type): New.
3581 (expand_cond_len_unop): New helper func.
3582 * config/riscv/riscv-v.cc (shuffle_merge_patterns): Adjust.
3583 (expand_cond_len_unop): New helper func.
3585 2023-08-23 Jan Hubicka <jh@suse.cz>
3587 * tree-ssa-loop-ch.cc (enum ch_decision): Fix comment.
3588 (should_duplicate_loop_header_p): Fix return value for static exits.
3589 (ch_base::copy_headers): Improve handling of ch_possible_zero_cost.
3591 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
3593 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
3594 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
3595 and update the final nest accordingly.
3597 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
3599 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
3600 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
3601 and update the final nest accordingly.
3603 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
3605 * tree-vect-stmts.cc (vectorizable_store): Remove vec oprnds,
3606 adjust vec result_chain, vec_oprnd with auto_vec, and adjust
3607 gvec_oprnds with auto_delete_vec.
3609 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3611 * config/riscv/riscv-vsetvl.cc
3612 (pass_vsetvl::global_eliminate_vsetvl_insn): Fix potential ICE.
3614 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3616 * config/riscv/riscv-vsetvl.cc (ge_sew_ratio_unavailable_p):
3618 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Ditto.
3620 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3622 * config/riscv/vector.md: Add attribute.
3624 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3626 * config/riscv/riscv-vsetvl.cc (change_insn): Clang format.
3627 (vector_infos_manager::all_same_ratio_p): Ditto.
3628 (vector_infos_manager::all_same_avl_p): Ditto.
3629 (pass_vsetvl::refine_vsetvls): Ditto.
3630 (pass_vsetvl::cleanup_vsetvls): Ditto.
3631 (pass_vsetvl::commit_vsetvls): Ditto.
3632 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
3633 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
3634 (pass_vsetvl::compute_probabilities): Ditto.
3636 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3638 * config/riscv/t-riscv: Add riscv-vsetvl.def
3640 2023-08-22 Vineet Gupta <vineetg@rivosinc.com>
3642 * config/riscv/riscv.opt: Add --param names
3643 riscv-autovec-preference and riscv-autovec-lmul
3645 2023-08-22 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
3647 * config/riscv/t-linux: Add MULTIARCH_DIRNAME.
3649 2023-08-22 Tobias Burnus <tobias@codesourcery.com>
3651 * tree-core.h (enum omp_clause_defaultmap_kind): Add
3652 OMP_CLAUSE_DEFAULTMAP_CATEGORY_ALL.
3653 * gimplify.cc (gimplify_scan_omp_clauses): Handle it.
3654 * tree-pretty-print.cc (dump_omp_clause): Likewise.
3656 2023-08-22 Jakub Jelinek <jakub@redhat.com>
3659 * doc/extend.texi (_Float<n>): Drop obsolete sentence that the
3660 types aren't supported in C++.
3662 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3664 * doc/md.texi: Add LEN_FOLD_EXTRACT_LAST pattern.
3665 * internal-fn.cc (fold_len_extract_direct): Ditto.
3666 (expand_fold_len_extract_optab_fn): Ditto.
3667 (direct_fold_len_extract_optab_supported_p): Ditto.
3668 * internal-fn.def (LEN_FOLD_EXTRACT_LAST): Ditto.
3669 * optabs.def (OPTAB_D): Ditto.
3671 2023-08-22 Richard Biener <rguenther@suse.de>
3673 * tree-vect-stmts.cc (vectorizable_store): Do not bump
3674 DR_GROUP_STORE_COUNT here. Remove early out.
3675 (vect_transform_stmt): Only call vectorizable_store on
3676 the last element of an interleaving chain.
3678 2023-08-22 Richard Biener <rguenther@suse.de>
3680 PR tree-optimization/94864
3681 PR tree-optimization/94865
3682 PR tree-optimization/93080
3683 * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): New pattern
3684 for vector insertion from vector extraction.
3686 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3687 Kewen.Lin <linkw@linux.ibm.com>
3689 * tree-vect-loop.cc (vect_verify_loop_lens): Add exists check.
3690 (vectorizable_live_operation): Add live vectorization for length loop
3693 2023-08-22 David Malcolm <dmalcolm@redhat.com>
3696 * doc/invoke.texi: Remove -Wanalyzer-unterminated-string.
3698 2023-08-22 Pan Li <pan2.li@intel.com>
3700 * config/riscv/riscv-vector-builtins-bases.cc
3701 (vfwredusum_frm_obj): New declaration.
3703 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3704 * config/riscv/riscv-vector-builtins-functions.def
3705 (vfwredusum_frm): New intrinsic function def.
3707 2023-08-21 David Faust <david.faust@oracle.com>
3709 * config/bpf/bpf.md (neg): Second operand must be a register.
3711 2023-08-21 Edwin Lu <ewlu@rivosinc.com>
3713 * config/riscv/bitmanip.md: Added bitmanip type to insns
3714 that are missing types.
3716 2023-08-21 Jeff Law <jlaw@ventanamicro.com>
3718 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Avoid extraenous
3721 2023-08-21 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
3723 * config/aarch64/falkor-tag-collision-avoidance.cc (dump_insn_list):
3724 Fix format specifier.
3726 2023-08-21 Aldy Hernandez <aldyh@redhat.com>
3728 * value-range.cc (frange::union_nans): Return false if nothing
3730 (range_tests_floats): New test.
3732 2023-08-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
3734 PR tree-optimization/111048
3735 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): Set arg_npatterns
3737 (fold_vec_perm_cst): Remove workaround and again call
3738 valid_mask_fold_vec_perm_cst_p for both VLS and VLA vectors.
3739 (test_fold_vec_perm_cst::test_nunits_min_4): Add test-case.
3741 2023-08-21 Richard Biener <rguenther@suse.de>
3743 PR tree-optimization/111082
3744 * tree-vect-slp.cc (vectorize_slp_instance_root_stmt): Only
3745 pun operations that can overflow.
3747 2023-08-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3749 * lcm.cc (compute_antinout_edge): Export as global use.
3750 (compute_earliest): Ditto.
3751 (compute_rev_insert_delete): Ditto.
3752 * lcm.h (compute_antinout_edge): Ditto.
3753 (compute_earliest): Ditto.
3755 2023-08-21 Richard Biener <rguenther@suse.de>
3757 PR tree-optimization/111070
3758 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check we have
3759 an SSA name before checking SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
3761 2023-08-21 Andrew Pinski <apinski@marvell.com>
3763 PR tree-optimization/111002
3764 * match.pd (view_convert(vec_cond(a,b,c))): New pattern.
3766 2023-08-21 liuhongt <hongtao.liu@intel.com>
3768 * common/config/i386/cpuinfo.h (get_intel_cpu): Detect
3770 * common/config/i386/i386-common.cc (alias_table): Support
3771 -march=gracemont as an alias of -march=alderlake.
3773 2023-08-20 Uros Bizjak <ubizjak@gmail.com>
3775 * config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1]
3776 instead of src in the call to ix86_expand_sse_cmp.
3777 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not
3778 force operands[1] to a register.
3779 (<any_extend:insn>v4hiv4si2): Ditto.
3780 (<any_extend:insn>v2siv2di2): Ditto.
3782 2023-08-20 Andrew Pinski <apinski@marvell.com>
3784 PR tree-optimization/111006
3785 PR tree-optimization/110986
3786 * match.pd: (op(vec_cond(a,b,c))): Handle convert for op.
3788 2023-08-20 Eric Gallager <egallager@gcc.gnu.org>
3791 * Makefile.in: improve error message when /usr/include is
3794 2023-08-19 Tobias Burnus <tobias@codesourcery.com>
3796 PR middle-end/111017
3797 * omp-expand.cc (expand_omp_for_init_vars): Pass after=true
3798 to expand_omp_build_cond for 'factor != 0' condition, resulting
3799 in pre-r12-5295-g47de0b56ee455e code for the gimple insert.
3801 2023-08-19 Guo Jie <guojie@loongson.cn>
3802 Lulu Cheng <chenglulu@loongson.cn>
3804 * config/loongarch/t-loongarch: Add loongarch-driver.h into
3805 TM_H. Add loongarch-def.h and loongarch-tune.h into
3808 2023-08-18 Uros Bizjak <ubizjak@gmail.com>
3811 * config/i386/i386-expand.cc (ix86_split_mmx_punpck):
3812 Also handle V2QImode.
3813 (ix86_expand_sse_extend): New function.
3814 * config/i386/i386-protos.h (ix86_expand_sse_extend): New prototype.
3815 * config/i386/mmx.md (<any_extend:insn>v4qiv4hi2): Enable for
3816 TARGET_SSE2. Expand through ix86_expand_sse_extend for !TARGET_SSE4_1.
3817 (<any_extend:insn>v2hiv2si2): Ditto.
3818 (<any_extend:insn>v2qiv2hi2): Ditto.
3819 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Ditto.
3820 (<any_extend:insn>v4hiv4si2): Ditto.
3821 (<any_extend:insn>v2siv2di2): Ditto.
3823 2023-08-18 Aldy Hernandez <aldyh@redhat.com>
3826 * value-range.cc (irange::union_bitmask): Return FALSE if updated
3827 bitmask is semantically equivalent to the original mask.
3828 (irange::intersect_bitmask): Same.
3829 (irange::get_bitmask): Add comment.
3831 2023-08-18 Richard Biener <rguenther@suse.de>
3833 PR tree-optimization/111019
3834 * tree-ssa-loop-im.cc (gather_mem_refs_stmt): When canonicalizing
3835 also scrap base and offset in case the ref is indirect.
3837 2023-08-18 Jose E. Marchesi <jose.marchesi@oracle.com>
3839 * config/bpf/bpf.opt (mframe-limit): Set default to 32767.
3841 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
3844 * Makefile.in (TM_P_H): Add $(TREE_H) as dependence.
3846 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
3848 * tree-vect-stmts.cc (vect_build_scatter_store_calls): New, factor
3850 (vectorizable_store): ... here.
3852 2023-08-18 Richard Biener <rguenther@suse.de>
3854 PR tree-optimization/111048
3855 * fold-const.cc (fold_vec_perm_cst): Check for non-VLA
3858 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
3861 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
3864 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
3866 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
3867 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
3868 and update the final nest accordingly.
3870 2023-08-18 Andrew Pinski <apinski@marvell.com>
3872 * doc/md.texi (Standard patterns): Document cond_neg, cond_one_cmpl,
3873 cond_len_neg and cond_len_one_cmpl.
3875 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
3877 * config/riscv/iterators.md (TARGET_HARD_FLOAT || TARGET_ZFINX): New.
3878 * config/riscv/pic.md (*local_pic_load<ANYF:mode>): Change ANYF.
3879 (*local_pic_load<ANYLSF:mode>): To ANYLSF.
3880 (*local_pic_load_32d<ANYF:mode>): Ditto.
3881 (*local_pic_load_32d<ANYLSF:mode>): Ditto.
3882 (*local_pic_store<ANYF:mode>): Ditto.
3883 (*local_pic_store<ANYLSF:mode>): Ditto.
3884 (*local_pic_store_32d<ANYF:mode>): Ditto.
3885 (*local_pic_store_32d<ANYLSF:mode>): Ditto.
3887 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
3888 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
3890 * config/riscv/predicates.md (vector_const_0_operand): New.
3891 * config/riscv/vector.md (*pred_broadcast<mode>_zero): Ditto.
3893 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
3895 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion):
3898 2023-08-17 Andrew MacLeod <amacleod@redhat.com>
3900 PR tree-optimization/111009
3901 * range-op.cc (operator_addr_expr::op1_range): Be more restrictive.
3903 2023-08-17 Vladimir N. Makarov <vmakarov@redhat.com>
3905 * lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Moving
3906 slots_num initialization from here ...
3907 (lra_spill): ... to here before the 1st call of
3908 assign_stack_slot_num_and_sort_pseudos. Add the 2nd call after
3911 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
3914 * doc/invoke.texi (Option Summary): Mention
3915 -Wcompare-distinct-pointer-types under `Warning Options'.
3916 (Warning Options): Document -Wcompare-distinct-pointer-types.
3918 2023-08-17 Jan-Benedict Glaw <jbglaw@lug-owl.de>
3920 * recog.cc (memory_address_addr_space_p): Mark possibly unused
3923 2023-08-17 Richard Biener <rguenther@suse.de>
3925 PR tree-optimization/111039
3926 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for
3927 SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
3929 2023-08-17 Alex Coplan <alex.coplan@arm.com>
3931 * doc/rtl.texi: Fix up sample code for RTL-SSA insn changes.
3933 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
3936 * config/bpf/bpf.cc (bpf_attribute_table): Add entry for the
3937 `naked' function attribute.
3938 (bpf_warn_func_return): New function.
3939 (TARGET_WARN_FUNC_RETURN): Define.
3940 (bpf_expand_prologue): Add preventive comment.
3941 (bpf_expand_epilogue): Likewise.
3942 * doc/extend.texi (BPF Function Attributes): Document the `naked'
3945 2023-08-17 Richard Biener <rguenther@suse.de>
3947 * tree-vect-slp.cc (vect_slp_check_for_roots): Use
3948 !needs_fold_left_reduction_p to decide whether we can
3949 handle the reduction with association.
3950 (vectorize_slp_instance_root_stmt): For TYPE_OVERFLOW_UNDEFINED
3951 reductions perform all arithmetic in an unsigned type.
3953 2023-08-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
3955 * configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v
3957 * configure: Regenerate.
3959 2023-08-17 Pan Li <pan2.li@intel.com>
3961 * config/riscv/riscv-vector-builtins-bases.cc
3962 (widen_freducop): Add frm_opt_type template arg.
3963 (vfwredosum_frm_obj): New declaration.
3965 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3966 * config/riscv/riscv-vector-builtins-functions.def
3967 (vfwredosum_frm): New intrinsic function def.
3969 2023-08-17 Pan Li <pan2.li@intel.com>
3971 * config/riscv/riscv-vector-builtins-bases.cc
3972 (vfredosum_frm_obj): New declaration.
3974 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3975 * config/riscv/riscv-vector-builtins-functions.def
3976 (vfredosum_frm): New intrinsic function def.
3978 2023-08-17 Pan Li <pan2.li@intel.com>
3980 * config/riscv/riscv-vector-builtins-bases.cc
3981 (class freducop): Add frm_op_type template arg.
3982 (vfredusum_frm_obj): New declaration.
3984 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3985 * config/riscv/riscv-vector-builtins-functions.def
3986 (vfredusum_frm): New intrinsic function def.
3987 * config/riscv/riscv-vector-builtins-shapes.cc
3988 (struct reduc_alu_frm_def): New class for frm shape.
3989 (SHAPE): New declaration.
3990 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
3992 2023-08-17 Pan Li <pan2.li@intel.com>
3994 * config/riscv/riscv-vector-builtins-bases.cc
3995 (class vfncvt_f): Add frm_op_type template arg.
3996 (vfncvt_f_frm_obj): New declaration.
3998 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3999 * config/riscv/riscv-vector-builtins-functions.def
4000 (vfncvt_f_frm): New intrinsic function def.
4002 2023-08-17 Pan Li <pan2.li@intel.com>
4004 * config/riscv/riscv-vector-builtins-bases.cc
4005 (vfncvt_xu_frm_obj): New declaration.
4007 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4008 * config/riscv/riscv-vector-builtins-functions.def
4009 (vfncvt_xu_frm): New intrinsic function def.
4011 2023-08-17 Pan Li <pan2.li@intel.com>
4013 * config/riscv/riscv-vector-builtins-bases.cc
4014 (class vfncvt_x): Add frm_op_type template arg.
4015 (BASE): New declaration.
4016 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4017 * config/riscv/riscv-vector-builtins-functions.def
4018 (vfncvt_x_frm): New intrinsic function def.
4019 * config/riscv/riscv-vector-builtins-shapes.cc
4020 (struct narrow_alu_frm_def): New shape function for frm.
4021 (SHAPE): New declaration.
4022 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
4024 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
4026 * config/i386/avx512vldqintrin.h: Remove target attribute.
4027 * config/i386/i386-builtin.def (BDESC):
4028 Add OPTION_MASK_ISA2_AVX10_1.
4029 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
4030 (VFH_AVX512VLDQ_AVX10_1): Ditto.
4031 (VF1_AVX512VLDQ_AVX10_1): Ditto.
4032 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
4033 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
4034 (vec_pack<floatprefix>_float_<mode>): Change iterator to
4035 VI8_AVX512VLDQ_AVX10_1. Remove target check.
4036 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
4037 VF1_AVX512VLDQ_AVX10_1. Remove target check.
4038 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
4039 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
4040 (avx512vl_vextractf128<mode>): Change iterator to
4041 VI48F_256_DQVL_AVX10_1. Remove target check.
4042 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
4043 (vec_extract_hi_<mode>): Ditto.
4044 (avx512vl_vinsert<mode>): Ditto.
4045 (vec_set_lo_<mode><mask_name>): Ditto.
4046 (vec_set_hi_<mode><mask_name>): Ditto.
4047 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
4048 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
4049 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
4050 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
4051 * config/i386/subst.md (mask_avx512dq_condition): Add
4053 (mask_scalar_merge): Ditto.
4055 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
4057 * config/i386/avx512vldqintrin.h: Remove target attribute.
4058 * config/i386/i386-builtin.def (BDESC):
4059 Add OPTION_MASK_ISA2_AVX10_1.
4060 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
4061 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
4062 (VI48_AVX512VLDQ_AVX10_1): Ditto.
4063 (VF2_AVX512VL): Remove.
4064 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
4066 (*<code><mode>3<mask_name>): Change isa attribute to
4067 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
4068 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
4069 to avx10_1_or_avx512vl.
4070 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
4071 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
4072 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
4074 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
4075 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
4076 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
4078 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
4079 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
4080 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
4081 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
4082 (float<floatunssuffix>v4div4sf2<mask_name>):
4084 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
4085 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
4086 (float<floatunssuffix>v2div2sf2): Ditto.
4087 (float<floatunssuffix>v2div2sf2_mask): Ditto.
4088 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
4089 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
4090 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
4091 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
4092 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
4093 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
4094 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
4095 Change when constraint is enabled.
4097 2023-08-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4100 * config/riscv/riscv-vsetvl.cc (float_insn_valid_sew_p): New function.
4101 (second_sew_less_than_first_sew_p): Fix bug.
4102 (first_sew_less_than_second_sew_p): Ditto.
4104 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
4106 * config/i386/avx512vldqintrin.h: Remove target attribute.
4107 * config/i386/i386-builtin.def (BDESC):
4108 Add OPTION_MASK_ISA2_AVX10_1.
4109 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
4110 * config/i386/i386-expand.cc
4111 (ix86_check_builtin_isa_match): Ditto.
4112 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
4113 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
4114 and avx10_1_or_avx512vl.
4115 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
4116 (VF1_128_256VLDQ_AVX10_1): Ditto.
4117 (VI8_AVX512VLDQ_AVX10_1): Ditto.
4118 (<sse>_andnot<mode>3<mask_name>):
4119 Add TARGET_AVX10_1 and change isa attr from avx512dq to
4120 avx10_1_or_avx512dq.
4121 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
4122 avx512vl to avx10_1_or_avx512vl.
4123 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
4124 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
4125 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
4127 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
4129 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
4130 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
4131 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
4133 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
4134 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
4135 Remove target check.
4136 (avx512dq_mul<mode>3<mask_name>): Ditto.
4137 (*avx512dq_mul<mode>3<mask_name>): Ditto.
4138 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
4139 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
4140 Remove target check.
4141 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
4142 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
4143 Remove target check.
4144 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
4145 (mask_avx512vl_condition): Ditto.
4148 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
4150 * common/config/i386/i386-common.cc
4151 (ix86_check_avx10_vector_width): New function to check isa_flags
4152 to emit a warning when there is a conflict in AVX10 options for
4154 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
4155 * config/i386/driver-i386.cc (host_detect_local_cpu):
4156 Do not append -mno-avx10-max-512bit for -march=native.
4158 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
4160 * common/config/i386/i386-common.cc
4161 (ix86_check_avx10): New function to check isa_flags and
4162 isa_flags_explicit to emit warning when AVX10 is enabled
4164 (ix86_check_avx512): New function to check isa_flags and
4165 isa_flags_explicit to emit warning when AVX512 is enabled
4167 (ix86_handle_option): Do not change the flags when warning
4169 * config/i386/driver-i386.cc (host_detect_local_cpu):
4170 Do not append -mno-avx10.1 for -march=native.
4172 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
4174 * common/config/i386/cpuinfo.h (get_available_features):
4175 Add avx10_set and version and detect avx10.1.
4176 (cpu_indicator_init): Handle avx10.1-512.
4177 * common/config/i386/i386-common.cc
4178 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
4179 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
4180 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
4181 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
4182 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
4183 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
4185 * common/config/i386/i386-cpuinfo.h (enum processor_features):
4186 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
4187 FEATURE_AVX10_512BIT.
4188 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
4189 AVX10_512BIT, AVX10_1 and AVX10_1_512.
4190 * config/i386/constraints.md (Yk): Add AVX10_1.
4193 * config/i386/cpuid.h (bit_AVX10): New.
4194 (bit_AVX10_256): Ditto.
4195 (bit_AVX10_512): Ditto.
4196 * config/i386/i386-c.cc (ix86_target_macros_internal):
4197 Define AVX10_512BIT and AVX10_1.
4198 * config/i386/i386-isa.def
4199 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
4200 (AVX10_1): Add DEF_PTA(AVX10_1).
4201 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
4202 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
4204 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
4205 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
4206 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
4207 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
4208 (ix86_conditional_register_usage): Ditto.
4209 (ix86_hard_regno_mode_ok): Ditto.
4210 (ix86_rtx_costs): Ditto.
4211 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
4212 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
4214 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
4215 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
4216 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
4219 2023-08-17 Sergei Trofimovich <siarheit@google.com>
4221 * flag-types.h (vrp_mode): Remove unused.
4223 2023-08-17 Yanzhang Wang <yanzhang.wang@intel.com>
4225 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Use
4228 2023-08-17 Andrew Pinski <apinski@marvell.com>
4230 * internal-fn.def (COND_NOT): New internal function.
4231 * match.pd (UNCOND_UNARY, COND_UNARY): Add bit_not/not
4233 (`vec (a ? -1 : 0) ^ b`): New pattern to convert
4234 into conditional not.
4235 * optabs.def (cond_one_cmpl): New optab.
4236 (cond_len_one_cmpl): Likewise.
4238 2023-08-16 Surya Kumari Jangala <jskumari@linux.ibm.com>
4240 PR rtl-optimization/110254
4241 * ira-color.cc (improve_allocation): Update array
4242 allocated_hard_reg_p.
4244 2023-08-16 Vladimir N. Makarov <vmakarov@redhat.com>
4246 * lra-int.h (lra_update_fp2sp_elimination): Change the prototype.
4247 * lra-eliminations.cc (spill_pseudos): Record spilled pseudos.
4248 (lra_update_fp2sp_elimination): Ditto.
4249 (update_reg_eliminate): Adjust spill_pseudos call.
4250 * lra-spills.cc (lra_spill): Assign stack slots to pseudos spilled
4251 in lra_update_fp2sp_elimination.
4253 2023-08-16 Richard Ball <richard.ball@arm.com>
4255 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A720 CPU.
4256 * config/aarch64/aarch64-tune.md: Regenerate.
4257 * doc/invoke.texi: Document Cortex-A720 CPU.
4259 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
4261 * config/riscv/autovec.md (<u>avg<v_double_trunc>3_floor):
4263 (<u>avg<v_double_trunc>3_ceil): Ditto.
4264 * config/riscv/vector-iterators.md (ashiftrt): New iterator.
4267 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
4269 * internal-fn.cc (vec_extract_direct): Change type argument
4271 (expand_vec_extract_optab_fn): Call convert_optab_fn.
4272 (direct_vec_extract_optab_supported_p): Use
4273 convert_optab_supported_p.
4275 2023-08-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
4276 Richard Sandiford <richard.sandiford@arm.com>
4278 * fold-const.cc (INCLUDE_ALGORITHM): Add Include.
4279 (valid_mask_for_fold_vec_perm_cst_p): New function.
4280 (fold_vec_perm_cst): Likewise.
4281 (fold_vec_perm): Adjust assert and call fold_vec_perm_cst.
4282 (test_fold_vec_perm_cst): New namespace.
4283 (test_fold_vec_perm_cst::build_vec_cst_rand): New function.
4284 (test_fold_vec_perm_cst::validate_res): Likewise.
4285 (test_fold_vec_perm_cst::validate_res_vls): Likewise.
4286 (test_fold_vec_perm_cst::builder_push_elems): Likewise.
4287 (test_fold_vec_perm_cst::test_vnx4si_v4si): Likewise.
4288 (test_fold_vec_perm_cst::test_v4si_vnx4si): Likewise.
4289 (test_fold_vec_perm_cst::test_all_nunits): Likewise.
4290 (test_fold_vec_perm_cst::test_nunits_min_2): Likewise.
4291 (test_fold_vec_perm_cst::test_nunits_min_4): Likewise.
4292 (test_fold_vec_perm_cst::test_nunits_min_8): Likewise.
4293 (test_fold_vec_perm_cst::test_nunits_max_4): Likewise.
4294 (test_fold_vec_perm_cst::is_simple_vla_size): Likewise.
4295 (test_fold_vec_perm_cst::test): Likewise.
4296 (fold_const_cc_tests): Call test_fold_vec_perm_cst::test.
4298 2023-08-16 Pan Li <pan2.li@intel.com>
4300 * config/riscv/riscv-vector-builtins-bases.cc
4301 (BASE): New declaration.
4302 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4303 * config/riscv/riscv-vector-builtins-functions.def
4304 (vfwcvt_xu_frm): New intrinsic function def.
4306 2023-08-16 Pan Li <pan2.li@intel.com>
4308 * config/riscv/riscv-vector-builtins-bases.cc: Use explicit argument.
4310 2023-08-16 Pan Li <pan2.li@intel.com>
4312 * config/riscv/riscv-vector-builtins-bases.cc
4313 (BASE): New declaration.
4314 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4315 * config/riscv/riscv-vector-builtins-functions.def
4316 (vfwcvt_x_frm): New intrinsic function def.
4318 2023-08-16 Pan Li <pan2.li@intel.com>
4320 * config/riscv/riscv-vector-builtins-bases.cc (BASE): New declaration.
4321 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4322 * config/riscv/riscv-vector-builtins-functions.def
4323 (vfcvt_f_frm): New intrinsic function def.
4325 2023-08-16 Pan Li <pan2.li@intel.com>
4327 * config/riscv/riscv-vector-builtins-bases.cc
4328 (BASE): New declaration.
4329 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4330 * config/riscv/riscv-vector-builtins-functions.def
4331 (vfcvt_xu_frm): New intrinsic function def..
4333 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
4336 * config/rs6000/vsx.md (*vsx_extract_<mode>_store_p9): Skip vector
4337 extract when the element is 7 on BE while 8 on LE for byte or 3 on
4338 BE while 4 on LE for halfword.
4340 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
4343 * config/rs6000/vsx.md (expand vsx_extract_<mode>): Set it only
4345 (vsx_extract_v4si): New expand for V4SI extraction.
4346 (vsx_extract_v4si_w1): New insn pattern for V4SI extraction on
4347 word 1 from BE order.
4348 (*mfvsrwz): New insn pattern for mfvsrwz.
4349 (*vsx_extract_<mode>_di_p9): Assert that it won't be generated on
4350 word 1 from BE order.
4351 (*vsx_extract_si): Remove.
4352 (*vsx_extract_v4si_w023): New insn and split pattern on word 0, 2,
4355 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4357 * config/riscv/autovec.md (vec_mask_len_load_lanes<mode><vsingle>):
4359 (vec_mask_len_store_lanes<mode><vsingle>): Ditto.
4360 * config/riscv/riscv-protos.h (expand_lanes_load_store): New function.
4361 * config/riscv/riscv-v.cc (get_mask_mode): Add tuple mask mode.
4362 (expand_lanes_load_store): New function.
4363 * config/riscv/vector-iterators.md: New iterator.
4365 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4367 * internal-fn.cc (internal_load_fn_p): Apply
4368 MASK_LEN_{LOAD_LANES,STORE_LANES} into vectorizer.
4369 (internal_store_fn_p): Ditto.
4370 (internal_fn_len_index): Ditto.
4371 (internal_fn_mask_index): Ditto.
4372 (internal_fn_stored_value_index): Ditto.
4373 * tree-vect-data-refs.cc (vect_store_lanes_supported): Ditto.
4374 (vect_load_lanes_supported): Ditto.
4375 * tree-vect-loop.cc: Ditto.
4376 * tree-vect-slp.cc (vect_slp_prefer_store_lanes_p): Ditto.
4377 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
4378 (get_group_load_store_type): Ditto.
4379 (vectorizable_store): Ditto.
4380 (vectorizable_load): Ditto.
4381 * tree-vectorizer.h (vect_store_lanes_supported): Ditto.
4382 (vect_load_lanes_supported): Ditto.
4384 2023-08-16 Pan Li <pan2.li@intel.com>
4386 * config/riscv/riscv-vector-builtins-bases.cc
4387 (enum frm_op_type): New type for frm.
4388 (BASE): New declaration.
4389 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4390 * config/riscv/riscv-vector-builtins-functions.def
4391 (vfcvt_x_frm): New intrinsic function def.
4393 2023-08-16 liuhongt <hongtao.liu@intel.com>
4395 * config/i386/i386-builtins.cc
4396 (ix86_vectorize_builtin_gather): Adjust for use_gather_8parts.
4397 * config/i386/i386-options.cc (parse_mtune_ctrl_str):
4398 Set/Clear tune features use_{gather,scatter}_{2parts, 4parts,
4399 8parts} for -mtune-crtl={,^}{use_gather,use_scatter}.
4400 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Adjust
4401 for use_scatter_8parts
4402 * config/i386/i386.h (TARGET_USE_GATHER): Rename to ..
4403 (TARGET_USE_GATHER_8PARTS): .. this.
4404 (TARGET_USE_SCATTER): Rename to ..
4405 (TARGET_USE_SCATTER_8PARTS): .. this.
4406 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Rename to
4407 (X86_TUNE_USE_GATHER_8PARTS): .. this.
4408 (X86_TUNE_USE_SCATTER): Rename to
4409 (X86_TUNE_USE_SCATTER_8PARTS): .. this.
4410 * config/i386/i386.opt: Add new options mgather, mscatter.
4412 2023-08-16 liuhongt <hongtao.liu@intel.com>
4414 * config/i386/i386-options.cc (m_GDS): New macro.
4415 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Don't
4417 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
4418 (X86_TUNE_USE_GATHER): Ditto.
4420 2023-08-16 liuhongt <hongtao.liu@intel.com>
4422 * config/i386/i386.md (movdf_internal): Generate vmovapd instead of
4423 vmovsd when moving DFmode between SSE_REGS.
4424 (movhi_internal): Generate vmovdqa instead of vmovsh when
4425 moving HImode between SSE_REGS.
4426 (mov<mode>_internal): Use vmovaps instead of vmovsh when
4427 moving HF/BFmode between SSE_REGS.
4429 2023-08-15 David Faust <david.faust@oracle.com>
4431 * config/bpf/bpf.md (extendsisi2): Delete useless define_insn.
4433 2023-08-15 David Faust <david.faust@oracle.com>
4436 * config/bpf/bpf.cc (bpf_print_register): Print 'w' registers
4437 for any mode 32-bits or smaller, not just SImode.
4439 2023-08-15 Martin Jambor <mjambor@suse.cz>
4443 * ipa-prop.h (ipcp_get_aggregate_const): Declare.
4444 * ipa-prop.cc (ipcp_get_aggregate_const): New function.
4445 (ipcp_transform_function): Do not deallocate transformation info.
4446 * tree-ssa-sccvn.cc: Include alloc-pool.h, symbol-summary.h and
4448 (vn_reference_lookup_2): When hitting default-def vuse, query
4449 IPA-CP transformation info for any known constants.
4451 2023-08-15 Chung-Lin Tang <cltang@codesourcery.com>
4452 Thomas Schwinge <thomas@codesourcery.com>
4454 * gimplify.cc (oacc_region_type_name): New function.
4455 (oacc_default_clause): If no 'default' clause appears on this
4456 compute construct, see if one appears on a lexically containing
4458 (gimplify_scan_omp_clauses): Upon OMP_CLAUSE_DEFAULT case, set
4459 ctx->oacc_default_clause_ctx to current context.
4461 2023-08-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4464 * config/riscv/predicates.md: Fix predicate.
4466 2023-08-15 Richard Biener <rguenther@suse.de>
4468 * tree-vect-slp.cc (vect_analyze_slp_instance): Remove
4469 slp_inst_kind_ctor handling.
4470 (vect_analyze_slp): Simplify.
4471 (vect_build_slp_instance): Dump when we analyze a CTOR.
4472 (vect_slp_check_for_constructors): Rename to ...
4473 (vect_slp_check_for_roots): ... this. Register a
4474 slp_root for CONSTRUCTORs instead of shoving them to
4475 the set of grouped stores.
4476 (vect_slp_analyze_bb_1): Adjust.
4478 2023-08-15 Richard Biener <rguenther@suse.de>
4480 * tree-vectorizer.h (_slp_instance::remain_stmts): Change
4482 (_slp_instance::remain_defs): ... this.
4483 (SLP_INSTANCE_REMAIN_STMTS): Rename to ...
4484 (SLP_INSTANCE_REMAIN_DEFS): ... this.
4485 (slp_root::remain): New.
4486 (slp_root::slp_root): Adjust.
4487 * tree-vect-slp.cc (vect_free_slp_instance): Adjust.
4488 (vect_build_slp_instance): Get extra remain parameter,
4489 adjust former handling of a cut off stmt.
4490 (vect_analyze_slp_instance): Adjust.
4491 (vect_analyze_slp): Likewise.
4492 (_bb_vec_info::~_bb_vec_info): Likewise.
4493 (vectorizable_bb_reduc_epilogue): Dump something if we fail.
4494 (vect_slp_check_for_constructors): Handle non-internal
4495 defs as remain defs of a reduction.
4496 (vectorize_slp_instance_root_stmt): Adjust.
4498 2023-08-15 Richard Biener <rguenther@suse.de>
4500 * tree-ssa-loop-ivcanon.cc: Include tree-vectorizer.h
4501 (canonicalize_loop_induction_variables): Use find_loop_location.
4503 2023-08-15 Hans-Peter Nilsson <hp@axis.com>
4506 * config/cris/cris-protos.h: Revert recent change.
4507 * config/cris/cris.cc (cris_legitimate_address_p): Remove
4508 code_helper unused parameter.
4509 (cris_legitimate_address_p_hook): New wrapper function.
4510 (TARGET_LEGITIMATE_ADDRESS_P): Change to
4511 cris_legitimate_address_p_hook.
4513 2023-08-15 Richard Biener <rguenther@suse.de>
4515 PR tree-optimization/110963
4516 * tree-ssa-pre.cc (do_pre_regular_insertion): Also insert
4517 a PHI node when the expression is available on all edges
4518 and we insert at most one copy from a constant.
4520 2023-08-15 Richard Biener <rguenther@suse.de>
4522 PR tree-optimization/110991
4523 * tree-ssa-loop-ivcanon.cc (constant_after_peeling): Handle
4524 VIEW_CONVERT_EXPR <op>, handle more simple IV-like SSA cycles
4525 that will end up constant.
4527 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
4530 * Makefile.in (RECOG_H): Add $(TREE_H) as dependence.
4532 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
4534 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
4535 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
4536 and update the final nest accordingly.
4538 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
4540 * tree-vect-stmts.cc (vectorizable_load): Remove some useless checks
4543 2023-08-15 Pan Li <pan2.li@intel.com>
4545 * mode-switching.cc (create_pre_exit): Add SET insn check.
4547 2023-08-15 Pan Li <pan2.li@intel.com>
4549 * config/riscv/riscv-vector-builtins-bases.cc
4550 (class vfrec7_frm): New class for frm.
4551 (vfrec7_frm_obj): New declaration.
4553 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4554 * config/riscv/riscv-vector-builtins-functions.def
4555 (vfrec7_frm): New intrinsic function definition.
4556 * config/riscv/vector-iterators.md
4557 (VFMISC): Remove VFREC7.
4559 (float_insn_type): Ditto.
4560 (VFMISC_FRM): New int iterator.
4561 (misc_frm_op): New op for frm.
4562 (float_frm_insn_type): New type for frm.
4563 * config/riscv/vector.md (@pred_<misc_frm_op><mode>):
4564 New pattern for misc frm.
4566 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
4568 * lra-constraints.cc (curr_insn_transform): Process output stack
4569 pointer reloads before emitting reload insns.
4571 2023-08-14 benjamin priour <vultkayn@gcc.gnu.org>
4574 * doc/invoke.texi: Add documentation of
4575 fanalyzer-show-events-in-system-headers
4577 2023-08-14 Jan Hubicka <jh@suse.cz>
4579 PR gcov-profile/110988
4580 * tree-cfg.cc (fold_loop_internal_call): Avoid division by zero.
4582 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
4584 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
4585 Enable compressed builtins when ZC* extensions enabled.
4586 * config/riscv/riscv-shorten-memrefs.cc:
4587 Enable shorten_memrefs pass when ZC* extensions enabled.
4588 * config/riscv/riscv.cc (riscv_compressed_reg_p):
4589 Enable compressible registers when ZC* extensions enabled.
4590 (riscv_rtx_costs): Allow adjusting rtx costs when ZC* extensions enabled.
4591 (riscv_address_cost): Allow adjusting address cost when ZC* extensions enabled.
4592 (riscv_first_stack_step): Allow compression of the register saves
4593 without adding extra instructions.
4594 * config/riscv/riscv.h (FUNCTION_BOUNDARY): Adjusts function boundary
4595 to 16 bits when ZC* extensions enabled.
4597 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
4599 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): New extensions.
4600 * config/riscv/riscv-opts.h (MASK_ZCA): New mask.
4607 (TARGET_ZCA): New target.
4608 (TARGET_ZCB): Ditto.
4609 (TARGET_ZCE): Ditto.
4610 (TARGET_ZCF): Ditto.
4611 (TARGET_ZCD): Ditto.
4612 (TARGET_ZCMP): Ditto.
4613 (TARGET_ZCMT): Ditto.
4614 * config/riscv/riscv.opt: New target variable.
4616 2023-08-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4619 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
4621 * genrecog.cc (print_nonbool_test): Fix type error of
4622 switch (SUBREG_BYTE (op))'.
4624 2023-08-14 Richard Biener <rguenther@suse.de>
4626 * tree-cfg.cc (print_loop_info): Dump to 'file', not 'dump_file'.
4628 2023-08-14 Pan Li <pan2.li@intel.com>
4630 * config/riscv/riscv-vector-builtins-bases.cc
4631 (class unop_frm): New class for frm.
4632 (vfsqrt_frm_obj): New declaration.
4634 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4635 * config/riscv/riscv-vector-builtins-functions.def
4636 (vfsqrt_frm): New intrinsic function definition.
4638 2023-08-14 Pan Li <pan2.li@intel.com>
4640 * config/riscv/riscv-vector-builtins-bases.cc
4641 (class vfwnmsac_frm): New class for frm.
4642 (vfwnmsac_frm_obj): New declaration.
4644 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4645 * config/riscv/riscv-vector-builtins-functions.def
4646 (vfwnmsac_frm): New intrinsic function definition.
4648 2023-08-14 Pan Li <pan2.li@intel.com>
4650 * config/riscv/riscv-vector-builtins-bases.cc
4651 (class vfwmsac_frm): New class for frm.
4652 (vfwmsac_frm_obj): New declaration.
4654 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4655 * config/riscv/riscv-vector-builtins-functions.def
4656 (vfwmsac_frm): New intrinsic function definition.
4658 2023-08-14 Pan Li <pan2.li@intel.com>
4660 * config/riscv/riscv-vector-builtins-bases.cc
4661 (class vfwnmacc_frm): New class for frm.
4662 (vfwnmacc_frm_obj): New declaration.
4664 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4665 * config/riscv/riscv-vector-builtins-functions.def
4666 (vfwnmacc_frm): New intrinsic function definition.
4668 2023-08-14 Cui, Lili <lili.cui@intel.com>
4670 * common/config/i386/cpuinfo.h (get_intel_cpu): Add model value 0xba
4673 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
4675 * config/mmix/predicates.md (mmix_address_operand): Use
4676 lra_in_progress, not reload_in_progress.
4678 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
4680 * config/mmix/mmix.cc: Re-enable LRA.
4682 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
4684 * config/mmix/predicates.md (frame_pointer_operand): Handle FP+offset
4685 when lra_in_progress.
4687 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
4689 * config/mmix/mmix.cc: Disable LRA for MMIX.
4691 2023-08-14 Pan Li <pan2.li@intel.com>
4693 * config/riscv/riscv-vector-builtins-bases.cc
4694 (class vfwmacc_frm): New class for vfwmacc frm.
4695 (vfwmacc_frm_obj): New declaration.
4697 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4698 * config/riscv/riscv-vector-builtins-functions.def
4699 (vfwmacc_frm): Function definition for vfwmacc.
4700 * config/riscv/riscv-vector-builtins.cc
4701 (function_expander::use_widen_ternop_insn): Add frm support.
4703 2023-08-14 Pan Li <pan2.li@intel.com>
4705 * config/riscv/riscv-vector-builtins-bases.cc
4706 (class vfnmsub_frm): New class for vfnmsub frm.
4707 (vfnmsub_frm): New declaration.
4709 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4710 * config/riscv/riscv-vector-builtins-functions.def
4711 (vfnmsub_frm): New function declaration.
4713 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
4715 * lra-constraints.cc (curr_insn_transform): Set done_p up and
4716 check it on true after processing output stack pointer reload.
4718 2023-08-12 Jakub Jelinek <jakub@redhat.com>
4720 * Makefile.in (USER_H): Add stdckdint.h.
4721 * ginclude/stdckdint.h: New file.
4723 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4726 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Add TARGET_VETOR.
4728 2023-08-12 Patrick Palka <ppalka@redhat.com>
4730 * tree-pretty-print.cc (dump_generic_node) <case TREE_VEC>:
4731 Delimit output with braces.
4733 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4736 * config/riscv/riscv-v.cc (expand_vec_series): Refactor the expander.
4738 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4740 * config/riscv/autovec.md: Add VLS CONST_VECTOR.
4741 * config/riscv/riscv.cc (riscv_const_insns): Ditto.
4742 * config/riscv/vector.md: Ditto.
4744 2023-08-11 David Malcolm <dmalcolm@redhat.com>
4747 * doc/analyzer.texi (__analyzer_get_strlen): New.
4748 * doc/invoke.texi: Add -Wanalyzer-unterminated-string.
4750 2023-08-11 Jeff Law <jlaw@ventanamicro.com>
4752 * config/rx/rx.md (subdi3): Fix test for borrow.
4754 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4756 PR middle-end/110989
4757 * tree-vect-stmts.cc (vectorizable_store): Replace iv_type with sizetype.
4758 (vectorizable_load): Ditto.
4760 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
4762 * config/bpf/bpf.md (allocate_stack): Define.
4763 * config/bpf/bpf.h (FIRST_PSEUDO_REGISTER): Make room for fake
4764 stack pointer register.
4765 (FIXED_REGISTERS): Adjust accordingly.
4766 (CALL_USED_REGISTERS): Likewise.
4767 (REG_CLASS_CONTENTS): Likewise.
4768 (REGISTER_NAMES): Likewise.
4769 * config/bpf/bpf.cc (bpf_compute_frame_layout): Do not reserve
4770 space for callee-saved registers.
4771 (bpf_expand_prologue): Do not save callee-saved registers in xbpf.
4772 (bpf_expand_epilogue): Do not restore callee-saved registers in
4775 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
4777 * config/bpf/bpf.cc (bpf_function_arg_advance): Do not complain
4778 about too many arguments if function is always inlined.
4780 2023-08-11 Patrick Palka <ppalka@redhat.com>
4782 * tree-pretty-print.cc (dump_generic_node) <case COMPONENT_REF>:
4783 Don't call component_ref_field_offset if the RHS isn't a decl.
4785 2023-08-11 John David Anglin <danglin@gcc.gnu.org>
4788 * gensupport.cc(class conlist): Use strtol instead of std::stoi.
4790 2023-08-11 Vladimir N. Makarov <vmakarov@redhat.com>
4792 * lra-constraints.cc (goal_alt_out_sp_reload_p): New flag.
4793 (process_alt_operands): Set the flag.
4794 (curr_insn_transform): Modify stack pointer offsets if output
4795 stack pointer reload is generated.
4797 2023-08-11 Joseph Myers <joseph@codesourcery.com>
4799 * configure: Regenerate.
4801 2023-08-11 Richard Biener <rguenther@suse.de>
4803 PR tree-optimization/110979
4804 * tree-vect-loop.cc (vectorizable_reduction): For
4805 FOLD_LEFT_REDUCTION without target support make sure
4806 we don't need to honor signed zeros and sign dependent rounding.
4808 2023-08-11 Richard Biener <rguenther@suse.de>
4810 * tree-vect-slp.cc (vect_slp_region): Provide opt-info for all SLP
4811 subgraph entries. Dump the used vector size based on the
4812 SLP subgraph entry root vector type.
4814 2023-08-11 Pan Li <pan2.li@intel.com>
4816 * config/riscv/riscv-vector-builtins-bases.cc
4817 (class vfmsub_frm): New class for vfmsub frm.
4818 (vfmsub_frm): New declaration.
4820 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4821 * config/riscv/riscv-vector-builtins-functions.def
4822 (vfmsub_frm): New function declaration.
4824 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4826 * doc/md.texi: Add vec_mask_len_{load_lanes,store_lanes} patterns.
4827 * internal-fn.cc (expand_partial_load_optab_fn): Ditto.
4828 (expand_partial_store_optab_fn): Ditto.
4829 * internal-fn.def (MASK_LEN_LOAD_LANES): Ditto.
4830 (MASK_LEN_STORE_LANES): Ditto.
4831 * optabs.def (OPTAB_CD): Ditto.
4833 2023-08-11 Pan Li <pan2.li@intel.com>
4835 * config/riscv/riscv-vector-builtins-bases.cc
4836 (class vfnmadd_frm): New class for vfnmadd frm.
4837 (vfnmadd_frm): New declaration.
4839 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4840 * config/riscv/riscv-vector-builtins-functions.def
4841 (vfnmadd_frm): New function declaration.
4843 2023-08-11 Drew Ross <drross@redhat.com>
4844 Jakub Jelinek <jakub@redhat.com>
4846 PR tree-optimization/109938
4847 * match.pd (((x ^ y) & z) | x -> (z & y) | x): New simplification.
4849 2023-08-11 Pan Li <pan2.li@intel.com>
4851 * config/riscv/riscv-vector-builtins-bases.cc
4852 (class vfmadd_frm): New class for vfmadd frm.
4853 (vfmadd_frm_obj): New declaration.
4855 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4856 * config/riscv/riscv-vector-builtins-functions.def
4857 (vfmadd_frm): New function definition.
4859 2023-08-11 Pan Li <pan2.li@intel.com>
4861 * config/riscv/riscv-vector-builtins-bases.cc
4862 (class vfnmsac_frm): New class for vfnmsac frm.
4863 (vfnmsac_frm_obj): New declaration.
4865 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4866 * config/riscv/riscv-vector-builtins-functions.def
4867 (vfnmsac_frm): New function definition.
4869 2023-08-11 Jakub Jelinek <jakub@redhat.com>
4871 * doc/extend.texi (Typeof): Document typeof_unqual
4872 and __typeof_unqual__.
4874 2023-08-11 Andrew Pinski <apinski@marvell.com>
4876 PR tree-optimization/110954
4877 * generic-match-head.cc (bitwise_inverted_equal_p): Add
4878 wascmp argument and set it accordingly.
4879 * gimple-match-head.cc (bitwise_inverted_equal_p): Add
4880 wascmp argument to the macro.
4881 (gimple_bitwise_inverted_equal_p): Add
4882 wascmp argument and set it accordingly.
4883 * match.pd (`a & ~a`, `a ^| ~a`): Update call
4884 to bitwise_inverted_equal_p and handle wascmp case.
4885 (`(~x | y) & x`, `(~x | y) & x`, `a?~t:t`): Update
4886 call to bitwise_inverted_equal_p and check to see
4887 if was !wascmp or if precision was 1.
4889 2023-08-11 Martin Uecker <uecker@tugraz.at>
4892 * doc/invoke.texi: Update.
4894 2023-08-11 Pan Li <pan2.li@intel.com>
4896 * config/riscv/riscv-vector-builtins-bases.cc
4897 (class vfmsac_frm): New class for vfmsac frm.
4898 (vfmsac_frm_obj): New declaration.
4900 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4901 * config/riscv/riscv-vector-builtins-functions.def
4902 (vfmsac_frm): New function definition
4904 2023-08-10 Jan Hubicka <jh@suse.cz>
4906 PR middle-end/110923
4907 * tree-ssa-loop-split.cc (split_loop): Watch for division by zero.
4909 2023-08-10 Patrick O'Neill <patrick@rivosinc.com>
4911 * common/config/riscv/riscv-common.cc: Add Ztso and mark Ztso as
4912 dependent on 'a' extension.
4913 * config/riscv/riscv-opts.h (MASK_ZTSO): New mask.
4914 (TARGET_ZTSO): New target.
4915 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_acquire): Add
4917 (riscv_memmodel_needs_amo_release): Add Ztso case.
4918 (riscv_print_operand): Add Ztso case for LR/SC annotations.
4919 * config/riscv/riscv.md: Import sync-rvwmo.md and sync-ztso.md.
4920 * config/riscv/riscv.opt: Add Ztso target variable.
4921 * config/riscv/sync.md (mem_thread_fence_1): Expand to RVWMO or
4923 (atomic_load<mode>): Expand to RVWMO or Ztso specific insn.
4924 (atomic_store<mode>): Expand to RVWMO or Ztso specific insn.
4925 * config/riscv/sync-rvwmo.md: New file. Seperate out RVWMO
4926 specific load/store/fence mappings.
4927 * config/riscv/sync-ztso.md: New file. Seperate out Ztso
4928 specific load/store/fence mappings.
4930 2023-08-10 Jan Hubicka <jh@suse.cz>
4932 * cfgloopmanip.cc (duplicate_loop_body_to_header_edge): Special case loops with
4935 2023-08-10 Jan Hubicka <jh@suse.cz>
4937 * tree-ssa-threadupdate.cc (ssa_fix_duplicate_block_edges): Fix profile update.
4939 2023-08-10 Jan Hubicka <jh@suse.cz>
4941 * profile-count.cc (profile_count::differs_from_p): Fix overflow and
4942 handling of undefined values.
4944 2023-08-10 Jakub Jelinek <jakub@redhat.com>
4947 * tree-ssa-phiopt.cc (single_non_singleton_phi_for_edges): Never
4948 return virtual phis and return NULL if there is a virtual phi
4949 where the arguments from E0 and E1 edges aren't equal.
4951 2023-08-10 Richard Biener <rguenther@suse.de>
4953 * internal-fn.def (VCOND, VCONDU, VCONDEQ, VCOND_MASK,
4954 VEC_SET, VEC_EXTRACT): Make ECF_CONST | ECF_NOTHROW.
4956 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4959 * config/riscv/autovec.md (vec_duplicate<mode>): New pattern.
4961 2023-08-10 Pan Li <pan2.li@intel.com>
4963 * config/riscv/riscv-vector-builtins-bases.cc
4964 (class vfnmacc_frm): New class for vfnmacc.
4965 (vfnmacc_frm_obj): New declaration.
4967 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4968 * config/riscv/riscv-vector-builtins-functions.def
4969 (vfnmacc_frm): New function definition.
4971 2023-08-10 Pan Li <pan2.li@intel.com>
4973 * config/riscv/riscv-vector-builtins-bases.cc
4974 (class vfmacc_frm): New class for vfmacc frm.
4975 (vfmacc_frm_obj): New declaration.
4977 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4978 * config/riscv/riscv-vector-builtins-functions.def
4979 (vfmacc_frm): New function definition.
4981 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4984 * config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary.
4986 2023-08-10 Richard Biener <rguenther@suse.de>
4988 * tree-vectorizer.h (vectorizable_live_operation): Remove
4989 gimple_stmt_iterator * argument.
4990 * tree-vect-loop.cc (vectorizable_live_operation): Likewise.
4991 Adjust plumbing around vect_get_loop_mask.
4992 (vect_analyze_loop_operations): Adjust.
4993 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Likewise.
4994 (vect_bb_slp_mark_live_stmts): Likewise.
4995 (vect_schedule_slp_node): Likewise.
4996 * tree-vect-stmts.cc (can_vectorize_live_stmts): Likewise.
4997 Remove gimple_stmt_iterator * argument.
4998 (vect_transform_stmt): Adjust.
5000 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5002 * config/riscv/vector-iterators.md: Add missing modes.
5004 2023-08-10 Jakub Jelinek <jakub@redhat.com>
5007 * lto-streamer-in.cc (lto_input_tree_1): Assert TYPE_PRECISION
5008 is up to WIDE_INT_MAX_PRECISION rather than MAX_BITSIZE_MODE_ANY_INT.
5010 2023-08-10 Jakub Jelinek <jakub@redhat.com>
5013 * expr.cc (expand_expr_real_1) <case MEM_REF>: Add an early return for
5014 EXPAND_WRITE or EXPAND_MEMORY modifiers to avoid testing it multiple
5017 2023-08-10 liuhongt <hongtao.liu@intel.com>
5020 * config/i386/mmx.md: (movq_<mode>_to_sse): Also do not
5021 sanitize upper part of V4HFmode register with
5023 (<insn>v4hf3): Enable for ix86_partial_vec_fp_math.
5025 (<insn>v2hf3): Ditto.
5027 (movd_v2hf_to_sse): Do not sanitize upper part of V2HFmode
5028 register with -fno-trapping-math.
5030 2023-08-10 Pan Li <pan2.li@intel.com>
5031 Kito Cheng <kito.cheng@sifive.com>
5033 * config/riscv/riscv-protos.h
5034 (enum floating_point_rounding_mode): Add NONE, DYN_EXIT and DYN_CALL.
5035 (get_frm_mode): New declaration.
5036 * config/riscv/riscv-v.cc (get_frm_mode): New function to get frm mode.
5037 * config/riscv/riscv-vector-builtins.cc
5038 (function_expander::use_ternop_insn): Take care of frm reg.
5039 * config/riscv/riscv.cc (riscv_static_frm_mode_p): Migrate to FRM_XXX.
5040 (riscv_emit_frm_mode_set): Ditto.
5041 (riscv_emit_mode_set): Ditto.
5042 (riscv_frm_adjust_mode_after_call): Ditto.
5043 (riscv_frm_mode_needed): Ditto.
5044 (riscv_frm_mode_after): Ditto.
5045 (riscv_mode_entry): Ditto.
5046 (riscv_mode_exit): Ditto.
5047 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
5048 * config/riscv/vector.md
5049 (rne,rtz,rdn,rup,rmm,dyn,dyn_exit,dyn_call,none): Removed
5050 (symbol_ref): * config/riscv/vector.md: Set frm_mode attr explicitly.
5052 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5054 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix
5055 incorrect anticipate info.
5057 2023-08-09 Tsukasa OI <research_trasio@irq.a4lg.com>
5059 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
5060 Remove 'Zve32d' from the version list.
5062 2023-08-09 Jin Ma <jinma@linux.alibaba.com>
5064 * config/riscv/riscv.cc (riscv_sched_variable_issue): New function.
5065 (TARGET_SCHED_VARIABLE_ISSUE): New macro.
5066 Co-authored-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
5067 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
5069 2023-08-09 Jivan Hakobyan <jivanhakobyan9@gmail.com>
5071 * config/riscv/riscv.cc (riscv_legitimize_address): Handle folding.
5072 (mem_shadd_or_shadd_rtx_p): New function.
5074 2023-08-09 Andrew Pinski <apinski@marvell.com>
5076 PR tree-optimization/110937
5077 PR tree-optimization/100798
5078 * match.pd (`a ? ~b : b`): Handle this
5081 2023-08-09 Uros Bizjak <ubizjak@gmail.com>
5083 * config/i386/i386.opt (mpartial-vector-fp-math): Add dot.
5085 2023-08-09 Richard Ball <richard.ball@arm.com>
5087 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A520 CPU.
5088 * config/aarch64/aarch64-tune.md: Regenerate.
5089 * doc/invoke.texi: Document Cortex-A520 CPU.
5091 2023-08-09 Carl Love <cel@us.ibm.com>
5093 * config/rs6000/rs6000-builtins.def (vcmpneb, vcmpneh, vcmpnew):
5094 Move definitions to Altivec stanza.
5095 * config/rs6000/altivec.md (vcmpneb, vcmpneh, vcmpnew): New
5098 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5101 * config/riscv/riscv-v.cc (expand_const_vector): Add NPATTERNS = 1
5102 stepped vector support.
5104 2023-08-09 liuhongt <hongtao.liu@intel.com>
5106 * common/config/i386/cpuinfo.h (get_available_features):
5107 Rename local variable subleaf_level to max_subleaf_level.
5109 2023-08-09 Richard Biener <rguenther@suse.de>
5111 PR rtl-optimization/110587
5112 * lra-assigns.cc (find_hard_regno_for_1): Re-order checks.
5114 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
5116 PR tree-optimization/110248
5117 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Check if
5118 the given code is for ifn LEN_{LOAD,STORE}, if yes then make it not
5119 legitimate when outer code is PLUS.
5121 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
5123 PR tree-optimization/110248
5124 * recog.cc (memory_address_addr_space_p): Add one more argument ch of
5125 type code_helper and pass it to targetm.addr_space.legitimate_address_p
5126 instead of ERROR_MARK.
5127 (offsettable_address_addr_space_p): Update one function pointer with
5128 one more argument of type code_helper as its assignees
5129 memory_address_addr_space_p and strict_memory_address_addr_space_p
5130 have been adjusted, and adjust some call sites with ERROR_MARK.
5131 * recog.h (tree.h): New include header file for tree_code ERROR_MARK.
5132 (memory_address_addr_space_p): Adjust with one more unnamed argument
5133 of type code_helper with default ERROR_MARK.
5134 (strict_memory_address_addr_space_p): Likewise.
5135 * reload.cc (strict_memory_address_addr_space_p): Add one unnamed
5136 argument of type code_helper.
5137 * tree-ssa-address.cc (valid_mem_ref_p): Add one more argument ch of
5138 type code_helper and pass it to memory_address_addr_space_p.
5139 * tree-ssa-address.h (valid_mem_ref_p): Adjust the declaration with
5140 one more unnamed argument of type code_helper with default value
5142 * tree-ssa-loop-ivopts.cc (get_address_cost): Use ERROR_MARK as code
5143 by default, change it with ifn code for USE_PTR_ADDRESS type use, and
5144 pass it to all valid_mem_ref_p calls.
5146 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
5148 PR tree-optimization/110248
5149 * coretypes.h (class code_helper): Add forward declaration.
5150 * doc/tm.texi: Regenerate.
5151 * lra-constraints.cc (valid_address_p): Call target hook
5152 targetm.addr_space.legitimate_address_p with an extra parameter
5153 ERROR_MARK as its prototype changes.
5154 * recog.cc (memory_address_addr_space_p): Likewise.
5155 * reload.cc (strict_memory_address_addr_space_p): Likewise.
5156 * target.def (legitimate_address_p, addr_space.legitimate_address_p):
5157 Extend with one more argument of type code_helper, update the
5158 documentation accordingly.
5159 * targhooks.cc (default_legitimate_address_p): Adjust for the
5160 new code_helper argument.
5161 (default_addr_space_legitimate_address_p): Likewise.
5162 * targhooks.h (default_legitimate_address_p): Likewise.
5163 (default_addr_space_legitimate_address_p): Likewise.
5164 * config/aarch64/aarch64.cc (aarch64_legitimate_address_hook_p): Adjust
5165 with extra unnamed code_helper argument with default ERROR_MARK.
5166 * config/alpha/alpha.cc (alpha_legitimate_address_p): Likewise.
5167 * config/arc/arc.cc (arc_legitimate_address_p): Likewise.
5168 * config/arm/arm-protos.h (arm_legitimate_address_p): Likewise.
5169 (tree.h): New include for tree_code ERROR_MARK.
5170 * config/arm/arm.cc (arm_legitimate_address_p): Adjust with extra
5171 unnamed code_helper argument with default ERROR_MARK.
5172 * config/avr/avr.cc (avr_addr_space_legitimate_address_p): Likewise.
5173 * config/bfin/bfin.cc (bfin_legitimate_address_p): Likewise.
5174 * config/bpf/bpf.cc (bpf_legitimate_address_p): Likewise.
5175 * config/c6x/c6x.cc (c6x_legitimate_address_p): Likewise.
5176 * config/cris/cris-protos.h (cris_legitimate_address_p): Likewise.
5177 (tree.h): New include for tree_code ERROR_MARK.
5178 * config/cris/cris.cc (cris_legitimate_address_p): Adjust with extra
5179 unnamed code_helper argument with default ERROR_MARK.
5180 * config/csky/csky.cc (csky_legitimate_address_p): Likewise.
5181 * config/epiphany/epiphany.cc (epiphany_legitimate_address_p):
5183 * config/frv/frv.cc (frv_legitimate_address_p): Likewise.
5184 * config/ft32/ft32.cc (ft32_addr_space_legitimate_address_p): Likewise.
5185 * config/gcn/gcn.cc (gcn_addr_space_legitimate_address_p): Likewise.
5186 * config/h8300/h8300.cc (h8300_legitimate_address_p): Likewise.
5187 * config/i386/i386.cc (ix86_legitimate_address_p): Likewise.
5188 * config/ia64/ia64.cc (ia64_legitimate_address_p): Likewise.
5189 * config/iq2000/iq2000.cc (iq2000_legitimate_address_p): Likewise.
5190 * config/lm32/lm32.cc (lm32_legitimate_address_p): Likewise.
5191 * config/loongarch/loongarch.cc (loongarch_legitimate_address_p):
5193 * config/m32c/m32c.cc (m32c_legitimate_address_p): Likewise.
5194 (m32c_addr_space_legitimate_address_p): Likewise.
5195 * config/m32r/m32r.cc (m32r_legitimate_address_p): Likewise.
5196 * config/m68k/m68k.cc (m68k_legitimate_address_p): Likewise.
5197 * config/mcore/mcore.cc (mcore_legitimate_address_p): Likewise.
5198 * config/microblaze/microblaze-protos.h (tree.h): New include for
5199 tree_code ERROR_MARK.
5200 (microblaze_legitimate_address_p): Adjust with extra unnamed
5201 code_helper argument with default ERROR_MARK.
5202 * config/microblaze/microblaze.cc (microblaze_legitimate_address_p):
5204 * config/mips/mips.cc (mips_legitimate_address_p): Likewise.
5205 * config/mmix/mmix.cc (mmix_legitimate_address_p): Likewise.
5206 * config/mn10300/mn10300.cc (mn10300_legitimate_address_p): Likewise.
5207 * config/moxie/moxie.cc (moxie_legitimate_address_p): Likewise.
5208 * config/msp430/msp430.cc (msp430_legitimate_address_p): Likewise.
5209 (msp430_addr_space_legitimate_address_p): Adjust with extra code_helper
5210 argument with default ERROR_MARK and adjust the call to function
5211 msp430_legitimate_address_p.
5212 * config/nds32/nds32.cc (nds32_legitimate_address_p): Adjust with extra
5213 unnamed code_helper argument with default ERROR_MARK.
5214 * config/nios2/nios2.cc (nios2_legitimate_address_p): Likewise.
5215 * config/nvptx/nvptx.cc (nvptx_legitimate_address_p): Likewise.
5216 * config/or1k/or1k.cc (or1k_legitimate_address_p): Likewise.
5217 * config/pa/pa.cc (pa_legitimate_address_p): Likewise.
5218 * config/pdp11/pdp11.cc (pdp11_legitimate_address_p): Likewise.
5219 * config/pru/pru.cc (pru_addr_space_legitimate_address_p): Likewise.
5220 * config/riscv/riscv.cc (riscv_legitimate_address_p): Likewise.
5221 * config/rl78/rl78-protos.h (rl78_as_legitimate_address): Likewise.
5222 (tree.h): New include for tree_code ERROR_MARK.
5223 * config/rl78/rl78.cc (rl78_as_legitimate_address): Adjust with
5224 extra unnamed code_helper argument with default ERROR_MARK.
5225 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Likewise.
5226 (rs6000_debug_legitimate_address_p): Adjust with extra code_helper
5227 argument and adjust the call to function rs6000_legitimate_address_p.
5228 * config/rx/rx.cc (rx_is_legitimate_address): Adjust with extra
5229 unnamed code_helper argument with default ERROR_MARK.
5230 * config/s390/s390.cc (s390_legitimate_address_p): Likewise.
5231 * config/sh/sh.cc (sh_legitimate_address_p): Likewise.
5232 * config/sparc/sparc.cc (sparc_legitimate_address_p): Likewise.
5233 * config/v850/v850.cc (v850_legitimate_address_p): Likewise.
5234 * config/vax/vax.cc (vax_legitimate_address_p): Likewise.
5235 * config/visium/visium.cc (visium_legitimate_address_p): Likewise.
5236 * config/xtensa/xtensa.cc (xtensa_legitimate_address_p): Likewise.
5237 * config/stormy16/stormy16-protos.h (xstormy16_legitimate_address_p):
5239 (tree.h): New include for tree_code ERROR_MARK.
5240 * config/stormy16/stormy16.cc (xstormy16_legitimate_address_p):
5241 Adjust with extra unnamed code_helper argument with default
5244 2023-08-09 liuhongt <hongtao.liu@intel.com>
5246 * common/config/i386/cpuinfo.h (get_available_features): Check
5247 EAX for valid subleaf before use CPUID.
5249 2023-08-08 Jeff Law <jlaw@ventanamicro.com>
5251 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use word_mode
5252 for the temporary when canonicalizing the condition.
5254 2023-08-08 Cupertino Miranda <cupertino.miranda@oracle.com>
5256 * config/bpf/core-builtins.cc: Cleaned include headers.
5257 (struct cr_builtins): Added GTY.
5258 (cr_builtins_ref): Created.
5259 (builtins_data) Changed to GC root.
5260 (allocate_builtin_data): Changed.
5261 Included gt-core-builtins.h.
5262 * config/bpf/coreout.cc: (bpf_core_extra) Added GTY.
5263 (bpf_core_extra_ref): Created.
5264 (bpf_comment_info): Changed to GC root.
5265 (bpf_core_reloc_add, output_btfext_header, btf_ext_init): Changed.
5267 2023-08-08 Uros Bizjak <ubizjak@gmail.com>
5270 * config/i386/i386.opt (mpartial-vector-fp-math): New option.
5271 * config/i386/mmx.md (movq_<mode>_to_sse): Do not sanitize
5272 upper part of V2SFmode register with -fno-trapping-math.
5273 (<plusminusmult:insn>v2sf3): Enable for ix86_partial_vec_fp_math.
5275 (<smaxmin:code>v2sf3): Ditto.
5277 (*mmx_haddv2sf3_low): Ditto.
5278 (*mmx_hsubv2sf3_low): Ditto.
5279 (vec_addsubv2sf3): Ditto.
5280 (vec_cmpv2sfv2si): Ditto.
5281 (vcond<V2FI:mode>v2sf): Ditto.
5286 (fix_truncv2sfv2si2): Ditto.
5287 (fixuns_truncv2sfv2si2): Ditto.
5288 (floatv2siv2sf2): Ditto.
5289 (floatunsv2siv2sf2): Ditto.
5290 (nearbyintv2sf2): Ditto.
5292 (lrintv2sfv2si2): Ditto.
5294 (lceilv2sfv2si2): Ditto.
5295 (floorv2sf2): Ditto.
5296 (lfloorv2sfv2si2): Ditto.
5297 (btruncv2sf2): Ditto.
5298 (roundv2sf2): Ditto.
5299 (lroundv2sfv2si2): Ditto.
5300 * doc/invoke.texi (x86 Options): Document
5301 -mpartial-vector-fp-math option.
5303 2023-08-08 Andrew Pinski <apinski@marvell.com>
5305 PR tree-optimization/103281
5306 PR tree-optimization/28794
5307 * vr-values.cc (simplify_using_ranges::simplify_cond_using_ranges_1): Split out
5309 (simplify_using_ranges::simplify_compare_using_ranges_1): Here.
5310 (simplify_using_ranges::simplify_casted_cond): Rename to ...
5311 (simplify_using_ranges::simplify_casted_compare): This
5312 and change arguments to take op0 and op1.
5313 (simplify_using_ranges::simplify_compare_assign_using_ranges_1): New method.
5314 (simplify_using_ranges::simplify): For tcc_comparison assignments call
5315 simplify_compare_assign_using_ranges_1.
5316 * vr-values.h (simplify_using_ranges): Add
5317 new methods, simplify_compare_using_ranges_1 and simplify_compare_assign_using_ranges_1.
5318 Rename simplify_casted_cond and simplify_casted_compare and
5319 update argument types.
5321 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
5323 * genmatch.cc: Log line numbers indirectly.
5325 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
5327 * genmatch.cc: Make sinfo map ordered.
5328 * Makefile.in: Require the ordered map header for genmatch.o.
5330 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
5332 * ordered-hash-map.h: Add get_or_insert.
5333 * ordered-hash-map-tests.cc: Use get_or_insert in tests.
5335 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5337 * config/riscv/autovec.md (cond_<optab><mode>): New pattern.
5338 (cond_len_<optab><mode>): Ditto.
5339 (cond_fma<mode>): Ditto.
5340 (cond_len_fma<mode>): Ditto.
5341 (cond_fnma<mode>): Ditto.
5342 (cond_len_fnma<mode>): Ditto.
5343 (cond_fms<mode>): Ditto.
5344 (cond_len_fms<mode>): Ditto.
5345 (cond_fnms<mode>): Ditto.
5346 (cond_len_fnms<mode>): Ditto.
5347 * config/riscv/riscv-protos.h (riscv_get_v_regno_alignment): Export
5349 (enum insn_type): Add new enum type.
5350 (prepare_ternary_operands): New function.
5351 * config/riscv/riscv-v.cc (emit_vlmax_masked_fp_mu_insn): Ditto.
5352 (emit_nonvlmax_tumu_insn): Ditto.
5353 (emit_nonvlmax_fp_tumu_insn): Ditto.
5354 (expand_cond_len_binop): Add condtional operations.
5355 (expand_cond_len_ternop): Ditto.
5356 (prepare_ternary_operands): New function.
5357 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_release): Export
5358 riscv_get_v_regno_alignment as global scope.
5359 * config/riscv/vector.md: Fix ternary bugs.
5361 2023-08-08 Richard Biener <rguenther@suse.de>
5363 PR tree-optimization/49955
5364 * tree-vectorizer.h (_slp_instance::remain_stmts): New.
5365 (SLP_INSTANCE_REMAIN_STMTS): Likewise.
5366 * tree-vect-slp.cc (vect_free_slp_instance): Release
5367 SLP_INSTANCE_REMAIN_STMTS.
5368 (vect_build_slp_instance): Make the number of lanes of
5369 a BB reduction even.
5370 (vectorize_slp_instance_root_stmt): Handle unvectorized
5371 defs of a BB reduction.
5373 2023-08-08 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
5375 * internal-fn.cc (get_len_internal_fn): New function.
5376 (DEF_INTERNAL_COND_FN): Ditto.
5377 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
5378 * internal-fn.h (get_len_internal_fn): Ditto.
5379 * tree-vect-stmts.cc (vectorizable_call): Add CALL auto-vectorization.
5381 2023-08-08 Richard Biener <rguenther@suse.de>
5383 PR tree-optimization/110924
5384 * tree-ssa-live.h (virtual_operand_live): Update comment.
5385 * tree-ssa-live.cc (virtual_operand_live::get_live_in): Remove
5386 optimization, look at each predecessor.
5387 * tree-ssa-sink.cc (pass_sink_code::execute): Mark backedges.
5389 2023-08-08 yulong <shiyulong@iscas.ac.cn>
5391 * config/riscv/riscv-v.cc (slide1_sew64_helper): Modify.
5393 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5395 * config/riscv/autovec-vls.md (<optab><mode>2): Add VLS neg.
5396 * config/riscv/vector.md: Ditto.
5398 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5400 * config/riscv/autovec.md: Add VLS shift.
5402 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5404 * config/riscv/autovec-vls.md (<optab><mode>3): Add VLS modes.
5405 * config/riscv/vector-iterators.md: Ditto.
5406 * config/riscv/vector.md: Ditto.
5408 2023-08-07 Jonathan Wakely <jwakely@redhat.com>
5410 * config/i386/i386.cc (ix86_invalid_conversion): Fix grammar.
5412 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
5414 * configure: Regenerate.
5416 2023-08-07 John Ericson <git@JohnEricson.me>
5418 * configure: Regenerate.
5420 2023-08-07 Alan Modra <amodra@gmail.com>
5422 * configure: Regenerate.
5424 2023-08-07 Alexander von Gluck IV <kallisti5@unixzen.com>
5426 * configure: Regenerate.
5428 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
5430 * configure: Regenerate.
5432 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
5434 * configure: Regenerate.
5436 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
5438 * configure: Regenerate.
5440 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
5442 * configure: Regenerate.
5444 2023-08-07 Jeff Law <jlaw@ventanamicro.com>
5446 * config/riscv/riscv.cc (riscv_expand_conditional_move): Allow
5447 VOIDmode operands to conditional before canonicalization.
5449 2023-08-07 Manolis Tsamis <manolis.tsamis@vrull.eu>
5451 * regcprop.cc (maybe_copy_reg_attrs): Remove unnecessary function.
5452 (find_oldest_value_reg): Inline stack_pointer_rtx check.
5453 (copyprop_hardreg_forward_1): Inline stack_pointer_rtx check.
5455 2023-08-07 Martin Jambor <mjambor@suse.cz>
5458 * ipa-param-manipulation.h (class ipa_param_body_adjustments): New
5459 members get_ddef_if_exists_and_is_used and mark_clobbers_dead.
5460 * ipa-sra.cc (isra_track_scalar_value_uses): Ignore clobbers.
5461 (ptr_parm_has_nonarg_uses): Likewise.
5462 * ipa-param-manipulation.cc
5463 (ipa_param_body_adjustments::get_ddef_if_exists_and_is_used): New.
5464 (ipa_param_body_adjustments::mark_dead_statements): Move initial
5465 checks to get_ddef_if_exists_and_is_used.
5466 (ipa_param_body_adjustments::mark_clobbers_dead): New.
5467 (ipa_param_body_adjustments::common_initialization): Call
5468 mark_clobbers_dead when splitting.
5470 2023-08-07 Raphael Zinsly <rzinsly@ventanamicro.com>
5472 * config/riscv/riscv.cc (riscv_expand_int_scc): Add invert_ptr
5473 as an argument and pass it to riscv_emit_int_order_test.
5474 (riscv_expand_conditional_move): Handle cases where the condition
5475 is not EQ/NE or the second argument to the conditional is not
5477 * config/riscv/riscv-protos.h (riscv_expand_int_scc): Update prototype.
5478 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
5480 2023-08-07 Andrew Pinski <apinski@marvell.com>
5482 PR tree-optimization/109959
5483 * match.pd (`(a > 1) ? 0 : (cast)a`, `(a <= 1) & (cast)a`):
5486 2023-08-07 Richard Biener <rguenther@suse.de>
5488 * tree-ssa-sink.cc (pass_sink_code::execute): Do not
5489 calculate post-dominators. Calculate RPO on the inverted
5490 graph and process blocks in that order.
5492 2023-08-07 liuhongt <hongtao.liu@intel.com>
5495 * config/i386/i386-protos.h
5496 (vpternlog_redundant_operand_mask): Adjust parameter type.
5497 * config/i386/i386.cc (vpternlog_redundant_operand_mask): Use
5498 INTVAL instead of XINT, also adjust parameter type from rtx*
5499 to rtx since the function only needs operands[4] in vpternlog
5501 (substitute_vpternlog_operands): Pass operands[4] instead of
5502 operands to vpternlog_redundant_operand_mask.
5503 * config/i386/sse.md: Ditto.
5505 2023-08-07 Richard Biener <rguenther@suse.de>
5507 * tree-vect-slp.cc (vect_slp_region): Save/restore vect_location
5508 around dumping code.
5510 2023-08-07 liuhongt <hongtao.liu@intel.com>
5513 * config/i386/mmx.md (<insn><mode>3): Changed from define_insn
5514 to define_expand and break into ..
5515 (<insn>v4hf3): .. this.
5516 (divv4hf3): .. this.
5517 (<insn>v2hf3): .. this.
5518 (divv2hf3): .. this.
5519 (movd_v2hf_to_sse): New define_expand.
5520 (movq_<mode>_to_sse): Extend to V4HFmode.
5521 (mmxdoublevecmode): Ditto.
5522 (V2FI_V4HF): New mode iterator.
5523 * config/i386/sse.md (*vec_concatv4sf): Extend to hanlde V8HF
5524 by using mode iterator V4SF_V8HF, renamed to ..
5525 (*vec_concat<mode>): .. this.
5526 (*vec_concatv4sf_0): Extend to handle V8HF by using mode
5527 iterator V4SF_V8HF, renamed to ..
5528 (*vec_concat<mode>_0): .. this.
5529 (*vec_concatv8hf_movss): New define_insn.
5530 (V4SF_V8HF): New mode iterator.
5532 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5534 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Add op vectype.
5536 2023-08-07 Jan Beulich <jbeulich@suse.com>
5538 * config/i386/mmx.md (*mmx_pinsrd): Drop "prefix_data16".
5539 (*mmx_pinsrb): Likewise.
5540 (*mmx_pextrb): Likewise.
5541 (*mmx_pextrb_zext): Likewise.
5542 (mmx_pshufbv8qi3): Likewise.
5543 (mmx_pshufbv4qi3): Likewise.
5544 (mmx_pswapdv2si2): Likewise.
5545 (*pinsrb): Likewise.
5546 (*pextrb): Likewise.
5547 (*pextrb_zext): Likewise.
5548 * config/i386/sse.md (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
5549 (*sse2_eq<mode>3): Likewise.
5550 (*sse2_gt<mode>3): Likewise.
5551 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
5552 (*vec_extract<mode>): Likewise.
5553 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
5554 (*vec_extractv16qi_zext): Likewise.
5555 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
5556 (ssse3_pmaddubsw128): Likewise.
5557 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
5558 (<ssse3_avx2>_pshufb<mode>3<mask_name>): Likewise.
5559 (<ssse3_avx2>_psign<mode>3): Likewise.
5560 (<ssse3_avx2>_palignr<mode>): Likewise.
5561 (*abs<mode>2): Likewise.
5562 (sse4_2_pcmpestr): Likewise.
5563 (sse4_2_pcmpestri): Likewise.
5564 (sse4_2_pcmpestrm): Likewise.
5565 (sse4_2_pcmpestr_cconly): Likewise.
5566 (sse4_2_pcmpistr): Likewise.
5567 (sse4_2_pcmpistri): Likewise.
5568 (sse4_2_pcmpistrm): Likewise.
5569 (sse4_2_pcmpistr_cconly): Likewise.
5570 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
5571 (vgf2p8affineqb_<mode><mask_name>): Likewise.
5572 (vgf2p8mulb_<mode><mask_name>): Likewise.
5573 (*<code>v8hi3 [smaxmin]): Drop "prefix_data16" and
5575 (*<code>v16qi3 [umaxmin]): Likewise.
5577 2023-08-07 Jan Beulich <jbeulich@suse.com>
5579 * config/i386/i386.md (sse4_1_round<mode>2): Make
5580 "length_immediate" uniformly 1.
5581 * config/i386/mmx.md (mmx_pblendvb_v8qi): Likewise.
5582 (mmx_pblendvb_<mode>): Likewise.
5584 2023-08-07 Jan Beulich <jbeulich@suse.com>
5586 * config/i386/sse.md
5587 (<avx512>_<complexopname>_<mode><maskc_name><round_name>): Add
5589 (avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
5592 2023-08-07 Jan Beulich <jbeulich@suse.com>
5594 * config/i386/sse.md (xop_phadd<u>bw): Add "prefix",
5595 "prefix_extra", and "mode" attributes.
5596 (xop_phadd<u>bd): Likewise.
5597 (xop_phadd<u>bq): Likewise.
5598 (xop_phadd<u>wd): Likewise.
5599 (xop_phadd<u>wq): Likewise.
5600 (xop_phadd<u>dq): Likewise.
5601 (xop_phsubbw): Likewise.
5602 (xop_phsubwd): Likewise.
5603 (xop_phsubdq): Likewise.
5604 (xop_rotl<mode>3): Add "prefix" and "prefix_extra" attributes.
5605 (xop_rotr<mode>3): Likewise.
5606 (xop_frcz<mode>2): Likewise.
5607 (*xop_vmfrcz<mode>2): Likewise.
5608 (xop_vrotl<mode>3): Add "prefix" attribute. Change
5609 "prefix_extra" to 1.
5610 (xop_sha<mode>3): Likewise.
5611 (xop_shl<mode>3): Likewise.
5613 2023-08-07 Jan Beulich <jbeulich@suse.com>
5615 * config/i386/sse.md
5616 (*<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Drop
5618 (avx512dq_vextract<shuffletype>64x2_1_mask): Likewise.
5619 (*avx512dq_vextract<shuffletype>64x2_1): Likewise.
5620 (avx512f_vextract<shuffletype>32x4_1_mask): Likewise.
5621 (*avx512f_vextract<shuffletype>32x4_1): Likewise.
5622 (vec_extract_lo_<mode>_mask [AVX512 forms]): Likewise.
5623 (vec_extract_lo_<mode> [AVX512 forms]): Likewise.
5624 (vec_extract_hi_<mode>_mask [AVX512 forms]): Likewise.
5625 (vec_extract_hi_<mode> [AVX512 forms]): Likewise.
5626 (@vec_extract_lo_<mode> [AVX512 forms]): Likewise.
5627 (@vec_extract_hi_<mode> [AVX512 forms]): Likewise.
5628 (vec_extract_lo_v64qi): Likewise.
5629 (vec_extract_hi_v64qi): Likewise.
5630 (*vec_widen_umult_even_v16si<mask_name>): Likewise.
5631 (*vec_widen_smult_even_v16si<mask_name>): Likewise.
5632 (*avx512f_<code><mode>3<mask_name>): Likewise.
5633 (*vec_extractv4ti): Likewise.
5634 (avx512bw_<code>v32qiv32hi2<mask_name>): Likewise.
5635 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): Likewise.
5636 Add "length_immediate".
5638 2023-08-07 Jan Beulich <jbeulich@suse.com>
5640 * config/i386/i386.md (@rdrand<mode>): Add "prefix_0f". Drop
5642 (@rdseed<mode>): Likewise.
5643 * config/i386/mmx.md (<code><mode>3 [smaxmin and umaxmin cases]):
5644 Adjust "prefix_extra".
5645 * config/i386/sse.md (@vec_set<mode>_0): Likewise.
5646 (*sse4_1_<code><mode>3<mask_name>): Likewise.
5647 (*avx2_eq<mode>3): Likewise.
5648 (avx2_gt<mode>3): Likewise.
5649 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
5650 (*vec_extract<mode>): Likewise.
5651 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
5653 2023-08-07 Jan Beulich <jbeulich@suse.com>
5655 * config/i386/i386.md (rd<fsgs>base<mode>): Add "prefix_0f" and
5656 "prefix_rep". Drop "prefix_extra".
5657 (wr<fsgs>base<mode>): Likewise.
5658 (ptwrite<mode>): Likewise.
5660 2023-08-07 Jan Beulich <jbeulich@suse.com>
5662 * config/i386/i386.md (isa): Move up.
5663 (length_immediate): Handle "fma4".
5664 (prefix): Handle "ssemuladd".
5665 * config/i386/sse.md (*fma_fmadd_<mode>): Add "prefix" attribute.
5666 (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>):
5668 (<avx512>_fmadd_<mode>_mask<round_name>): Likewise.
5669 (<avx512>_fmadd_<mode>_mask3<round_name>): Likewise.
5670 (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>):
5672 (<avx512>_fmsub_<mode>_mask<round_name>): Likewise.
5673 (<avx512>_fmsub_<mode>_mask3<round_name>): Likewise.
5674 (*fma_fnmadd_<mode>): Likewise.
5675 (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>):
5677 (<avx512>_fnmadd_<mode>_mask<round_name>): Likewise.
5678 (<avx512>_fnmadd_<mode>_mask3<round_name>): Likewise.
5679 (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>):
5681 (<avx512>_fnmsub_<mode>_mask<round_name>): Likewise.
5682 (<avx512>_fnmsub_<mode>_mask3<round_name>): Likewise.
5683 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
5685 (<avx512>_fmaddsub_<mode>_mask<round_name>): Likewise.
5686 (<avx512>_fmaddsub_<mode>_mask3<round_name>): Likewise.
5687 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
5689 (<avx512>_fmsubadd_<mode>_mask<round_name>): Likewise.
5690 (<avx512>_fmsubadd_<mode>_mask3<round_name>): Likewise.
5691 (*fmai_fmadd_<mode>): Likewise.
5692 (*fmai_fmsub_<mode>): Likewise.
5693 (*fmai_fnmadd_<mode><round_name>): Likewise.
5694 (*fmai_fnmsub_<mode><round_name>): Likewise.
5695 (avx512f_vmfmadd_<mode>_mask<round_name>): Likewise.
5696 (avx512f_vmfmadd_<mode>_mask3<round_name>): Likewise.
5697 (avx512f_vmfmadd_<mode>_maskz_1<round_name>): Likewise.
5698 (*avx512f_vmfmsub_<mode>_mask<round_name>): Likewise.
5699 (avx512f_vmfmsub_<mode>_mask3<round_name>): Likewise.
5700 (*avx512f_vmfmsub_<mode>_maskz_1<round_name>): Likewise.
5701 (avx512f_vmfnmadd_<mode>_mask<round_name>): Likewise.
5702 (avx512f_vmfnmadd_<mode>_mask3<round_name>): Likewise.
5703 (avx512f_vmfnmadd_<mode>_maskz_1<round_name>): Likewise.
5704 (*avx512f_vmfnmsub_<mode>_mask<round_name>): Likewise.
5705 (*avx512f_vmfnmsub_<mode>_mask3<round_name>): Likewise.
5706 (*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): Likewise.
5707 (*fma4i_vmfmadd_<mode>): Likewise.
5708 (*fma4i_vmfmsub_<mode>): Likewise.
5709 (*fma4i_vmfnmadd_<mode>): Likewise.
5710 (*fma4i_vmfnmsub_<mode>): Likewise.
5711 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>): Likewise.
5712 (<avx512>_<complexopname>_<mode>_mask<round_name>): Likewise.
5713 (avx512fp16_fma_<complexopname>sh_v8hf<mask_scalarcz_name><round_scalarcz_name>):
5715 (avx512fp16_<complexopname>sh_v8hf_mask<round_name>): Likewise.
5716 (xop_p<macs><ssemodesuffix><ssemodesuffix>): Likewise.
5717 (xop_p<macs>dql): Likewise.
5718 (xop_p<macs>dqh): Likewise.
5719 (xop_p<macs>wd): Likewise.
5720 (xop_p<madcs>wd): Likewise.
5721 (fma_<complexpairopname>_<mode>_pair): Likewise. Add "mode" attribute.
5723 2023-08-07 Jan Beulich <jbeulich@suse.com>
5725 * config/i386/i386.md (length_immediate): Handle "sse4arg".
5727 (*xop_pcmov_<mode>): Add "mode" attribute.
5728 * config/i386/mmx.md (*xop_maskcmp<mode>3): Drop "prefix_data16",
5729 "prefix_rep", "prefix_extra", and "length_immediate" attributes.
5730 (*xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
5731 (*xop_pcmov_<mode>): Add "mode" attribute.
5732 * config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Add "mode"
5734 (xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep",
5735 "prefix_extra", and "length_immediate" attributes.
5736 (xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
5737 (xop_maskcmp_uns2<mode>3): Drop "prefix_data16", "prefix_extra",
5738 and "length_immediate" attributes. Switch "type" to "sse4arg".
5739 (xop_pcom_tf<mode>3): Likewise.
5740 (xop_vpermil2<mode>3): Drop "length_immediate" attribute.
5742 2023-08-07 Jan Beulich <jbeulich@suse.com>
5744 * config/i386/i386.md (prefix_extra): Correct comment. Fold
5745 cases yielding 2 into ones yielding 1.
5747 2023-08-07 Jan Hubicka <jh@suse.cz>
5749 PR tree-optimization/106293
5750 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
5751 * tree-vect-loop.cc (vect_transform_loop): Likewise.
5753 2023-08-07 Andrew Pinski <apinski@marvell.com>
5755 PR tree-optimization/96695
5756 * match.pd (min_value, max_value): Extend to
5759 2023-08-06 Jan Hubicka <jh@suse.cz>
5761 * config/i386/cpuid.h (__get_cpuid_count, __get_cpuid_max): Add
5762 __builtin_expect that CPU likely supports cpuid.
5764 2023-08-06 Jan Hubicka <jh@suse.cz>
5766 * tree-loop-distribution.cc (loop_distribution::execute): Disable
5767 distribution for loops with estimated iterations 0.
5769 2023-08-06 Jan Hubicka <jh@suse.cz>
5771 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update of peeled epilogues.
5773 2023-08-04 Xiao Zeng <zengxiao@eswincomputing.com>
5775 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
5776 more Zicond patterns. Fix whitespace typo.
5777 (riscv_rtx_costs): Remove accidental code duplication.
5778 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
5780 2023-08-04 Yan Simonaytes <simonaytes.yan@ispras.ru>
5783 * config/i386/i386-protos.h
5784 (vpternlog_redundant_operand_mask): Declare.
5785 (substitute_vpternlog_operands): Declare.
5786 * config/i386/i386.cc
5787 (vpternlog_redundant_operand_mask): New helper.
5788 (substitute_vpternlog_operands): New function. Use them...
5789 * config/i386/sse.md: ... here in new VPTERNLOG define_splits.
5791 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
5793 * expmed.cc (extract_bit_field_1): Document that an UNSIGNEDP
5794 value of -1 is equivalent to don't care.
5795 (extract_integral_bit_field): Indicate that we don't require
5796 the most significant word to be zero extended, if we're about
5798 (extract_fixed_bit_field_1): Document that an UNSIGNEDP value
5799 of -1 is equivalent to don't care. Don't clear the most
5800 significant bits with AND mask when UNSIGNEDP is -1.
5802 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
5804 * config/i386/sse.md (define_split): Convert highpart:DF extract
5805 from V2DFmode register into a sse2_storehpd instruction.
5806 (define_split): Likewise, convert lowpart:DF extract from V2DF
5807 register into a sse2_storelpd instruction.
5809 2023-08-04 Qing Zhao <qing.zhao@oracle.com>
5811 * doc/invoke.texi (-Wflex-array-member-not-at-end): Document
5814 2023-08-04 Vladimir N. Makarov <vmakarov@redhat.com>
5816 * lra-lives.cc (process_bb_lives): Check input insn pattern hard regs
5817 against early clobber hard regs.
5819 2023-08-04 Tamar Christina <tamar.christina@arm.com>
5821 * doc/extend.texi: Document it.
5823 2023-08-04 Tamar Christina <tamar.christina@arm.com>
5826 * config/aarch64/aarch64-simd.md (vec_widen_<sur>shiftl_lo_<mode>,
5827 vec_widen_<sur>shiftl_hi_<mode>): Remove.
5828 (aarch64_<sur>shll<mode>_internal): Renamed to...
5829 (aarch64_<su>shll<mode>): .. This.
5830 (aarch64_<sur>shll2<mode>_internal): Renamed to...
5831 (aarch64_<su>shll2<mode>): .. This.
5832 (aarch64_<sur>shll_n<mode>, aarch64_<sur>shll2_n<mode>): Re-use new
5834 * config/aarch64/constraints.md (D2, DL): New.
5835 * config/aarch64/predicates.md (aarch64_simd_shll_imm_vec): New.
5837 2023-08-04 Tamar Christina <tamar.christina@arm.com>
5839 * gensupport.cc (conlist): Support length 0 attribute.
5841 2023-08-04 Tamar Christina <tamar.christina@arm.com>
5843 * config/aarch64/aarch64.cc (aarch64_bool_compound_p): New.
5844 (aarch64_adjust_stmt_cost, aarch64_vector_costs::count_ops): Use it.
5846 2023-08-04 Tamar Christina <tamar.christina@arm.com>
5848 * config/aarch64/aarch64.cc (aarch64_multiply_add_p): Update handling
5850 (aarch64_adjust_stmt_cost): Use it.
5851 (aarch64_vector_costs::count_ops): Likewise.
5852 (aarch64_vector_costs::add_stmt_cost): Pass vinfo to
5853 aarch64_adjust_stmt_cost.
5855 2023-08-04 Richard Biener <rguenther@suse.de>
5857 PR tree-optimization/110838
5858 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
5859 Fix right-shift value sanitizing. Properly emit external
5860 def mangling in the preheader rather than in the pattern
5861 def sequence where it will fail vectorizing.
5863 2023-08-04 Matthew Malcomson <matthew.malcomson@arm.com>
5865 PR middle-end/110316
5867 * timevar.cc (NANOSEC_PER_SEC, TICKS_TO_NANOSEC,
5868 CLOCKS_TO_NANOSEC, nanosec_to_floating_sec, percent_of): New.
5869 (TICKS_TO_MSEC, CLOCKS_TO_MSEC): Remove these macros.
5870 (timer::validate_phases): Use integral arithmetic to check
5872 (timer::print_row, timer::print): Convert from integral
5873 nanoseconds to floating point seconds before printing.
5874 (timer::all_zero): Change limit to nanosec count instead of
5875 fractional count of seconds.
5876 (make_json_for_timevar_time_def): Convert from integral
5877 nanoseconds to floating point seconds before recording.
5878 * timevar.h (struct timevar_time_def): Update all measurements
5879 to use uint64_t nanoseconds rather than seconds stored in a
5882 2023-08-04 Richard Biener <rguenther@suse.de>
5884 PR tree-optimization/110838
5885 * match.pd (([rl]shift @0 out-of-bounds) -> zero): Restrict
5886 the arithmetic right-shift case to non-negative operands.
5888 2023-08-04 Pan Li <pan2.li@intel.com>
5891 2023-08-04 Pan Li <pan2.li@intel.com>
5893 * config/riscv/riscv-vector-builtins-bases.cc
5894 (class vfmacc_frm): New class for vfmacc frm.
5895 (vfmacc_frm_obj): New declaration.
5897 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5898 * config/riscv/riscv-vector-builtins-functions.def
5899 (vfmacc_frm): New function definition.
5900 * config/riscv/riscv-vector-builtins.cc
5901 (function_expander::use_ternop_insn): Add frm operand support.
5902 * config/riscv/vector.md: Add vfmuladd to frm_mode.
5904 2023-08-04 Pan Li <pan2.li@intel.com>
5907 2023-08-04 Pan Li <pan2.li@intel.com>
5909 * config/riscv/riscv-vector-builtins-bases.cc
5910 (class vfnmacc_frm): New class for vfnmacc.
5911 (vfnmacc_frm_obj): New declaration.
5913 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5914 * config/riscv/riscv-vector-builtins-functions.def
5915 (vfnmacc_frm): New function definition.
5917 2023-08-04 Pan Li <pan2.li@intel.com>
5920 2023-08-04 Pan Li <pan2.li@intel.com>
5922 * config/riscv/riscv-vector-builtins-bases.cc
5923 (class vfmsac_frm): New class for vfmsac frm.
5924 (vfmsac_frm_obj): New declaration.
5926 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5927 * config/riscv/riscv-vector-builtins-functions.def
5928 (vfmsac_frm): New function definition.
5930 2023-08-04 Pan Li <pan2.li@intel.com>
5933 2023-08-04 Pan Li <pan2.li@intel.com>
5935 * config/riscv/riscv-vector-builtins-bases.cc
5936 (class vfnmsac_frm): New class for vfnmsac frm.
5937 (vfnmsac_frm_obj): New declaration.
5939 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5940 * config/riscv/riscv-vector-builtins-functions.def
5941 (vfnmsac_frm): New function definition.
5943 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
5945 * config/avr/avr-mcus.def (avr64dd14, avr64dd20, avr64dd28, avr64dd32)
5946 (avr64ea28, avr64ea32, avr64ea48, attiny424, attiny426, attiny427)
5947 (attiny824, attiny826, attiny827, attiny1624, attiny1626, attiny1627)
5948 (attiny3224, attiny3226, attiny3227, avr16dd14, avr16dd20, avr16dd28)
5949 (avr16dd32, avr32dd14, avr32dd20, avr32dd28, avr32dd32)
5950 (attiny102, attiny104): New devices.
5951 * doc/avr-mmcu.texi: Regenerate.
5953 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
5955 * config/avr/avr-mcus.def (avr128d*, avr64d*): Fix their FLASH_SIZE
5956 and PM_OFFSET entries.
5958 2023-08-04 Andrew Pinski <apinski@marvell.com>
5960 PR tree-optimization/110874
5961 * gimple-match-head.cc (gimple_bit_not_with_nop): New declaration.
5962 (gimple_maybe_cmp): Likewise.
5963 (gimple_bitwise_inverted_equal_p): Rewrite to use gimple_bit_not_with_nop
5964 and gimple_maybe_cmp instead of being recursive.
5965 * match.pd (bit_not_with_nop): New match pattern.
5966 (maybe_cmp): Likewise.
5968 2023-08-04 Drew Ross <drross@redhat.com>
5970 PR middle-end/101955
5971 * match.pd ((signed x << c) >> c): New canonicalization.
5973 2023-08-04 Pan Li <pan2.li@intel.com>
5975 * config/riscv/riscv-vector-builtins-bases.cc
5976 (class vfnmsac_frm): New class for vfnmsac frm.
5977 (vfnmsac_frm_obj): New declaration.
5979 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5980 * config/riscv/riscv-vector-builtins-functions.def
5981 (vfnmsac_frm): New function definition.
5983 2023-08-04 Pan Li <pan2.li@intel.com>
5985 * config/riscv/riscv-vector-builtins-bases.cc
5986 (class vfmsac_frm): New class for vfmsac frm.
5987 (vfmsac_frm_obj): New declaration.
5989 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5990 * config/riscv/riscv-vector-builtins-functions.def
5991 (vfmsac_frm): New function definition.
5993 2023-08-04 Pan Li <pan2.li@intel.com>
5995 * config/riscv/riscv-vector-builtins-bases.cc
5996 (class vfnmacc_frm): New class for vfnmacc.
5997 (vfnmacc_frm_obj): New declaration.
5999 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6000 * config/riscv/riscv-vector-builtins-functions.def
6001 (vfnmacc_frm): New function definition.
6003 2023-08-04 Hao Liu <hliu@os.amperecomputing.com>
6006 * config/aarch64/aarch64.cc (aarch64_force_single_cycle): check
6007 STMT_VINFO_REDUC_DEF to avoid failures in info_for_reduction.
6009 2023-08-04 Pan Li <pan2.li@intel.com>
6011 * config/riscv/riscv-vector-builtins-bases.cc
6012 (class vfmacc_frm): New class for vfmacc frm.
6013 (vfmacc_frm_obj): New declaration.
6015 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6016 * config/riscv/riscv-vector-builtins-functions.def
6017 (vfmacc_frm): New function definition.
6018 * config/riscv/riscv-vector-builtins.cc
6019 (function_expander::use_ternop_insn): Add frm operand support.
6020 * config/riscv/vector.md: Add vfmuladd to frm_mode.
6022 2023-08-04 Pan Li <pan2.li@intel.com>
6024 * config/riscv/riscv-vector-builtins-bases.cc
6025 (vfwmul_frm_obj): New declaration.
6026 (vfwmul_frm): Ditto.
6027 * config/riscv/riscv-vector-builtins-bases.h:
6028 (vfwmul_frm): Ditto.
6029 * config/riscv/riscv-vector-builtins-functions.def
6030 (vfwmul_frm): New function definition.
6031 * config/riscv/vector.md: (frm_mode) Add vfwmul to frm_mode.
6033 2023-08-04 Pan Li <pan2.li@intel.com>
6035 * config/riscv/riscv-vector-builtins-bases.cc
6036 (binop_frm): New declaration.
6037 (reverse_binop_frm): Likewise.
6039 * config/riscv/riscv-vector-builtins-bases.h:
6040 (vfdiv_frm): New extern declaration.
6041 (vfrdiv_frm): Likewise.
6042 * config/riscv/riscv-vector-builtins-functions.def
6043 (vfdiv_frm): New function definition.
6044 (vfrdiv_frm): Likewise.
6045 * config/riscv/vector.md: Add vfdiv to frm_mode.
6047 2023-08-03 Jan Hubicka <jh@suse.cz>
6049 * tree-cfg.cc (print_loop_info): Print entry count.
6051 2023-08-03 Jan Hubicka <jh@suse.cz>
6053 * tree-ssa-loop-split.cc (split_loop): Update estimated iteration counts.
6055 2023-08-03 Jan Hubicka <jh@suse.cz>
6058 * cfgloopmanip.cc (scale_loop_profile): (Un)initialize
6059 unadjusted_exit_count.
6061 2023-08-03 Aldy Hernandez <aldyh@redhat.com>
6063 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Read global
6066 2023-08-03 Xiao Zeng <zengxiao@eswincomputing.com>
6068 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
6069 various Zicond patterns.
6070 * config/riscv/riscv.md (mov<mode>cc): Allow TARGET_ZICOND. Use
6071 sfb_alu_operand for both arms of the conditional move.
6072 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
6074 2023-08-03 Cupertino Miranda <cupertino.miranda@oracle.com>
6080 * config.gcc: Added core-builtins.cc and .o files.
6081 * config/bpf/bpf-passes.def: Removed file.
6082 * config/bpf/bpf-protos.h (bpf_add_core_reloc,
6083 bpf_replace_core_move_operands): New prototypes.
6084 * config/bpf/bpf.cc (enum bpf_builtins, is_attr_preserve_access,
6085 maybe_make_core_relo, bpf_core_field_info, bpf_core_compute,
6086 bpf_core_get_index, bpf_core_new_decl, bpf_core_walk,
6087 bpf_is_valid_preserve_field_info_arg, is_attr_preserve_access,
6088 handle_attr_preserve, pass_data_bpf_core_attr, pass_bpf_core_attr):
6090 (def_builtin, bpf_expand_builtin, bpf_resolve_overloaded_builtin): Changed.
6091 * config/bpf/bpf.md (define_expand mov<MM:mode>): Changed.
6092 (mov_reloc_core<mode>): Added.
6093 * config/bpf/core-builtins.cc (struct cr_builtin, enum
6094 cr_decision struct cr_local, struct cr_final, struct
6095 core_builtin_helpers, enum bpf_plugin_states): Added types.
6096 (builtins_data, core_builtin_helpers, core_builtin_type_defs):
6098 (allocate_builtin_data, get_builtin-data, search_builtin_data,
6099 remove_parser_plugin, compare_same_kind, compare_same_ptr_expr,
6100 compare_same_ptr_type, is_attr_preserve_access, core_field_info,
6101 bpf_core_get_index, compute_field_expr,
6102 pack_field_expr_for_access_index, pack_field_expr_for_preserve_field,
6103 process_field_expr, pack_enum_value, process_enum_value, pack_type,
6104 process_type, bpf_require_core_support, make_core_relo, read_kind,
6105 kind_access_index, kind_preserve_field_info, kind_enum_value,
6106 kind_type_id, kind_preserve_type_info, get_core_builtin_fndecl_for_type,
6107 bpf_handle_plugin_finish_type, bpf_init_core_builtins,
6108 construct_builtin_core_reloc, bpf_resolve_overloaded_core_builtin,
6109 bpf_expand_core_builtin, bpf_add_core_reloc,
6110 bpf_replace_core_move_operands): Added functions.
6111 * config/bpf/core-builtins.h (enum bpf_builtins): Added.
6112 (bpf_init_core_builtins, bpf_expand_core_builtin,
6113 bpf_resolve_overloaded_core_builtin): Added functions.
6114 * config/bpf/coreout.cc (struct bpf_core_extra): Added.
6115 (bpf_core_reloc_add, output_asm_btfext_core_reloc): Changed.
6116 * config/bpf/coreout.h (bpf_core_reloc_add) Changed prototype.
6117 * config/bpf/t-bpf: Added core-builtins.o.
6118 * doc/extend.texi: Added documentation for new BPF builtins.
6120 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
6122 * gimple-range-fold.cc (fold_using_range::range_of_range_op): Add
6123 ranges to the call to relation_fold_and_or.
6124 (fold_using_range::relation_fold_and_or): Add op1 and op2 ranges.
6125 (fur_source::register_outgoing_edges): Add op1 and op2 ranges.
6126 * gimple-range-fold.h (relation_fold_and_or): Adjust params.
6127 * gimple-range-gori.cc (gori_compute::compute_operand_range): Add
6128 a varying op1 and op2 to call.
6129 * range-op-float.cc (range_operator::op1_op2_relation): New dafaults.
6130 (operator_equal::op1_op2_relation): New float version.
6131 (operator_not_equal::op1_op2_relation): Ditto.
6132 (operator_lt::op1_op2_relation): Ditto.
6133 (operator_le::op1_op2_relation): Ditto.
6134 (operator_gt::op1_op2_relation): Ditto.
6135 (operator_ge::op1_op2_relation) Ditto.
6136 * range-op-mixed.h (operator_equal::op1_op2_relation): New float
6138 (operator_not_equal::op1_op2_relation): Ditto.
6139 (operator_lt::op1_op2_relation): Ditto.
6140 (operator_le::op1_op2_relation): Ditto.
6141 (operator_gt::op1_op2_relation): Ditto.
6142 (operator_ge::op1_op2_relation): Ditto.
6143 * range-op.cc (range_op_handler::op1_op2_relation): Dispatch new
6145 (range_operator::op1_op2_relation): Add extra params.
6146 (operator_equal::op1_op2_relation): Ditto.
6147 (operator_not_equal::op1_op2_relation): Ditto.
6148 (operator_lt::op1_op2_relation): Ditto.
6149 (operator_le::op1_op2_relation): Ditto.
6150 (operator_gt::op1_op2_relation): Ditto.
6151 (operator_ge::op1_op2_relation): Ditto.
6152 * range-op.h (range_operator): New prototypes.
6153 (range_op_handler): Ditto.
6155 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
6157 * gimple-range-gori.cc (gori_compute::compute_operand1_range):
6158 Use identity relation.
6159 (gori_compute::compute_operand2_range): Ditto.
6160 * value-relation.cc (get_identity_relation): New.
6161 * value-relation.h (get_identity_relation): New prototype.
6163 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
6165 * value-range.h (Value_Range::set_varying): Set the type.
6166 (Value_Range::set_zero): Ditto.
6167 (Value_Range::set_nonzero): Ditto.
6169 2023-08-03 Jeff Law <jeffreyalaw@gmail.com>
6171 * config/riscv/riscv.cc (riscv_rtx_costs): Remove errant hunk from
6174 2023-08-03 Pan Li <pan2.li@intel.com>
6176 * config/riscv/riscv-vector-builtins-bases.cc: Add vfsub.
6178 2023-08-03 Richard Sandiford <richard.sandiford@arm.com>
6180 * poly-int.h (can_div_trunc_p): Succeed for more boundary conditions.
6182 2023-08-03 Richard Biener <rguenther@suse.de>
6184 PR tree-optimization/110838
6185 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
6186 Adjust the shift operand of RSHIFT_EXPRs.
6188 2023-08-03 Richard Biener <rguenther@suse.de>
6190 PR tree-optimization/110702
6191 * tree-ssa-loop-ivopts.cc (rewrite_use_address): When
6192 we created a NULL pointer based access rewrite that to
6195 2023-08-03 Richard Biener <rguenther@suse.de>
6197 * tree-ssa-sink.cc: Include tree-ssa-live.h.
6198 (pass_sink_code::execute): Instantiate virtual_operand_live
6200 (sink_code_in_bb): Pass down virtual_operand_live.
6201 (statement_sink_location): Get virtual_operand_live and
6202 verify we are not sinking loads across stores by looking up
6203 the live virtual operand at the sink location.
6205 2023-08-03 Richard Biener <rguenther@suse.de>
6207 * tree-ssa-live.h (class virtual_operand_live): New.
6208 * tree-ssa-live.cc (virtual_operand_live::init): New.
6209 (virtual_operand_live::get_live_in): Likewise.
6210 (virtual_operand_live::get_live_out): Likewise.
6212 2023-08-03 Richard Biener <rguenther@suse.de>
6214 * passes.def: Exchange loop splitting and final value
6217 2023-08-03 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6219 * config/s390/s390.cc (expand_perm_as_a_vlbr_vstbr_candidate):
6220 New function which handles bswap patterns for vec_perm_const.
6221 (vectorize_vec_perm_const_1): Call new function.
6222 * config/s390/vector.md (*bswap<mode>): Fix operands in output
6224 (*vstbr<mode>): New insn.
6226 2023-08-03 Alexandre Oliva <oliva@adacore.com>
6228 * config/vxworks-smp.opt: New. Introduce -msmp.
6229 * config.gcc: Enable it on powerpc* vxworks prior to 7r*.
6230 * config/rs6000/vxworks.h (STARTFILE_PREFIX_SPEC): Choose
6231 lib_smp when -msmp is present in the command line.
6232 * doc/invoke.texi: Document it.
6234 2023-08-03 Yanzhang Wang <yanzhang.wang@intel.com>
6236 * config/riscv/riscv.cc (riscv_save_reg_p): Save ra for leaf
6237 when enabling -mno-omit-leaf-frame-pointer
6238 (riscv_option_override): Override omit-frame-pointer.
6239 (riscv_frame_pointer_required): Save s0 for non-leaf function
6240 (TARGET_FRAME_POINTER_REQUIRED): Override defination
6241 * config/riscv/riscv.opt: Add option support.
6243 2023-08-03 Roger Sayle <roger@nextmovesoftware.com>
6246 * config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
6247 place operand in a register before gen_<insn>64ti2_doubleword.
6248 (<any_rotate>di3): Likewise, for rotations by 32 bits, place
6249 operand in a register before gen_<insn>32di2_doubleword.
6250 (<any_rotate>32di2_doubleword): Constrain operand to be in register.
6251 (<any_rotate>64ti2_doubleword): Likewise.
6253 2023-08-03 Pan Li <pan2.li@intel.com>
6255 * config/riscv/riscv-vector-builtins-bases.cc
6256 (vfmul_frm_obj): New declaration.
6258 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
6259 * config/riscv/riscv-vector-builtins-functions.def
6260 (vfmul_frm): New function definition.
6261 * config/riscv/vector.md: Add vfmul to frm_mode.
6263 2023-08-03 Andrew Pinski <apinski@marvell.com>
6265 * match.pd (`~X & X`): Check that the types match.
6266 (`~x | x`, `~x ^ x`): Likewise.
6268 2023-08-03 Pan Li <pan2.li@intel.com>
6270 * config/riscv/riscv-vector-builtins-bases.h: Remove
6271 redudant declaration.
6273 2023-08-03 Pan Li <pan2.li@intel.com>
6275 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add
6277 * config/riscv/riscv-vector-builtins-bases.h: Add declaration.
6278 * config/riscv/riscv-vector-builtins-functions.def (vfwsub_frm):
6279 Add vfwsub function definitions.
6281 2023-08-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6283 PR rtl-optimization/110867
6284 * combine.cc (simplify_compare_const): Try the optimization only
6285 in case the constant fits into the comparison mode.
6287 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
6289 * config/riscv/zicond.md: Remove incorrect zicond patterns and
6290 renumber/rename them.
6291 (zero.nez.<GPR:MODE><X:mode>.opt2): Fix output string.
6293 2023-08-02 Richard Biener <rguenther@suse.de>
6295 * tree-phinodes.h (add_phi_node_to_bb): Remove.
6296 * tree-phinodes.cc (add_phi_node_to_bb): Make static.
6298 2023-08-02 Jan Beulich <jbeulich@suse.com>
6300 * config/i386/sse.md (vec_dupv2df<mask_name>): Fold the middle
6301 two of the alternatives.
6303 2023-08-02 Richard Biener <rguenther@suse.de>
6305 PR tree-optimization/92335
6306 * tree-ssa-sink.cc (select_best_block): Before loop
6307 optimizations avoid sinking unconditional loads/stores
6308 in innermost loops to conditional executed places.
6310 2023-08-02 Andrew Pinski <apinski@marvell.com>
6312 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Valueize
6313 the comparison operands before comparing them.
6315 2023-08-02 Andrew Pinski <apinski@marvell.com>
6317 * match.pd (`~X & X`, `~X | X`): Move over to
6318 use bitwise_inverted_equal_p, removing :c as bitwise_inverted_equal_p
6319 handles that already.
6320 Remove range test simplifications to true/false as they
6321 are now handled by these patterns.
6323 2023-08-02 Andrew Pinski <apinski@marvell.com>
6325 * tree-ssa-phiopt.cc (match_simplify_replacement): Mark's cond
6326 statement's lhs and rhs to check if trivial dead.
6327 Rename inserted_exprs to exprs_maybe_dce; also move it so
6328 bitmap is not allocated if not needed.
6330 2023-08-02 Pan Li <pan2.li@intel.com>
6332 * config/riscv/riscv-vector-builtins-bases.cc
6333 (class widen_binop_frm): New class for binop frm.
6334 (BASE): Add vfwadd_frm.
6335 * config/riscv/riscv-vector-builtins-bases.h: New declaration.
6336 * config/riscv/riscv-vector-builtins-functions.def
6337 (vfwadd_frm): New function definition.
6338 * config/riscv/riscv-vector-builtins-shapes.cc
6339 (BASE_NAME_MAX_LEN): New macro.
6340 (struct alu_frm_def): Leverage new base class.
6341 (struct build_frm_base): New build base for frm.
6342 (struct widen_alu_frm_def): New struct for widen alu frm.
6343 (SHAPE): Add widen_alu_frm shape.
6344 * config/riscv/riscv-vector-builtins-shapes.h: New declaration.
6345 * config/riscv/vector.md (frm_mode): Add vfwalu type.
6347 2023-08-02 Jan Hubicka <jh@suse.cz>
6349 * cfgloop.h (loop_count_in): Declare.
6350 * cfgloopanal.cc (expected_loop_iterations_by_profile): Use count_in.
6351 (loop_count_in): Move here from ...
6352 * cfgloopmanip.cc (loop_count_in): ... here.
6353 (scale_loop_profile): Improve dumping; cast iteration bound to sreal.
6355 2023-08-02 Jan Hubicka <jh@suse.cz>
6357 * cfg.cc (scale_strictly_dominated_blocks): New function.
6358 * cfg.h (scale_strictly_dominated_blocks): Declare.
6359 * tree-cfg.cc (fold_loop_internal_call): Fixup CFG profile.
6361 2023-08-02 Richard Biener <rguenther@suse.de>
6363 PR rtl-optimization/110587
6364 * lra-spills.cc (return_regno_p): Remove.
6365 (regno_in_use_p): Likewise.
6366 (lra_final_code_change): Do not remove noop moves
6367 between hard registers.
6369 2023-08-02 liuhongt <hongtao.liu@intel.com>
6372 * config/i386/sse.md (vec_fmaddsub<mode>4): Extend to vector
6373 HFmode, use mode iterator VFH instead.
6374 (vec_fmsubadd<mode>4): Ditto.
6375 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
6376 Remove scalar mode from iterator, use VFH_AVX512VL instead.
6377 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
6380 2023-08-02 liuhongt <hongtao.liu@intel.com>
6382 * config/i386/sse.md (*avx2_lddqu_inserti_to_bcasti): New
6383 pre_reload define_insn_and_split.
6385 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
6387 * config/riscv/riscv.cc (riscv_rtx_costs): Add costing for
6388 using Zicond to implement some conditional moves.
6390 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
6392 * config/riscv/zicond.md: Use the X iterator instead of ANYI
6393 on the comparison input operands.
6395 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
6397 * config/riscv/riscv.cc (riscv_rtx_costs, case IF_THEN_ELSE): Add
6399 (case SET): For INSNs that just set a REG, take the cost from the
6401 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
6403 2023-08-02 Hu, Lin1 <lin1.hu@intel.com>
6405 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_INT8_SET):
6406 Change OPTION_MASK_ISA2_AMX_TILE to OPTION_MASK_ISA2_AMX_TILE_SET.
6407 (OPTION_MASK_ISA2_AMX_BF16_SET): Ditto
6408 (OPTION_MASK_ISA2_AMX_FP16_SET): Ditto
6409 (OPTION_MASK_ISA2_AMX_COMPLEX_SET): Ditto
6410 (OPTION_MASK_ISA_ABM_SET):
6411 Change OPTION_MASK_ISA_POPCNT to OPTION_MASK_ISA_POPCNT_SET.
6413 2023-08-01 Andreas Krebbel <krebbel@linux.ibm.com>
6415 * config/s390/s390.cc (s390_encode_section_info): Assume external
6416 symbols without explicit alignment to be unaligned if
6417 -munaligned-symbols has been specified.
6418 * config/s390/s390.opt (-munaligned-symbols): New option.
6420 2023-08-01 Richard Ball <richard.ball@arm.com>
6422 * gimple-fold.cc (fold_ctor_reference):
6423 Add support for poly_int.
6425 2023-08-01 Georg-Johann Lay <avr@gjlay.de>
6428 * config/avr/avr.cc (avr_optimize_casesi): Set JUMP_LABEL and
6429 LABEL_NUSES of new conditional branch instruction.
6431 2023-08-01 Jan Hubicka <jh@suse.cz>
6433 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update after
6434 constant prologue peeling.
6436 2023-08-01 Christophe Lyon <christophe.lyon@linaro.org>
6438 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Fix spelling.
6440 2023-08-01 Pan Li <pan2.li@intel.com>
6441 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6443 * config/riscv/riscv.cc (DYNAMIC_FRM_RTL): New macro.
6444 (STATIC_FRM_P): Ditto.
6445 (struct mode_switching_info): New struct for mode switching.
6446 (struct machine_function): Add new field mode switching.
6447 (riscv_emit_frm_mode_set): Add DYN_CALL emit.
6448 (riscv_frm_adjust_mode_after_call): New function for call mode.
6449 (riscv_frm_emit_after_call_in_bb_end): New function for emit
6450 insn when call as the end of bb.
6451 (riscv_frm_mode_needed): New function for frm mode needed.
6452 (frm_unknown_dynamic_p): Remove call check.
6453 (riscv_mode_needed): Extrac function for frm.
6454 (riscv_frm_mode_after): Add DYN_CALL after.
6455 (riscv_mode_entry): Remove backup rtl initialization.
6456 * config/riscv/vector.md (frm_mode): Add dyn_call.
6457 (fsrmsi_restore_exit): Rename to _volatile.
6458 (fsrmsi_restore_volatile): Likewise.
6460 2023-08-01 Pan Li <pan2.li@intel.com>
6462 * config/riscv/riscv-vector-builtins-bases.cc
6463 (class reverse_binop_frm): Add new template for reversed frm.
6464 (vfsub_frm_obj): New obj.
6465 (vfrsub_frm_obj): Likewise.
6466 * config/riscv/riscv-vector-builtins-bases.h:
6467 (vfsub_frm): New declaration.
6468 (vfrsub_frm): Likewise.
6469 * config/riscv/riscv-vector-builtins-functions.def
6470 (vfsub_frm): New function define.
6471 (vfrsub_frm): Likewise.
6473 2023-08-01 Andrew Pinski <apinski@marvell.com>
6475 PR tree-optimization/93044
6476 * match.pd (nested int casts): A truncation (to the same size or smaller)
6477 can always remove the inner cast.
6479 2023-07-31 Hamza Mahfooz <someguy@effective-light.com>
6482 * doc/invoke.texi (-Wmissing-variable-declarations): Document
6485 2023-07-31 Andrew Pinski <apinski@marvell.com>
6487 PR tree-optimization/106164
6488 * match.pd (`a != b & a <= b`, `a != b & a >= b`,
6489 `a == b | a < b`, `a == b | a > b`): Handle these cases
6492 2023-07-31 Andrew Pinski <apinski@marvell.com>
6494 PR tree-optimization/106164
6495 * match.pd: Extend the `(X CMP1 CST1) AND/IOR (X CMP2 CST2)`
6496 patterns to support `(X CMP1 Y) AND/IOR (X CMP2 Y)`.
6498 2023-07-31 Andrew Pinski <apinski@marvell.com>
6500 PR tree-optimization/100864
6501 * generic-match-head.cc (bitwise_inverted_equal_p): New function.
6502 * gimple-match-head.cc (bitwise_inverted_equal_p): New macro.
6503 (gimple_bitwise_inverted_equal_p): New function.
6504 * match.pd ((~x | y) & x): Use bitwise_inverted_equal_p
6505 instead of direct matching bit_not.
6507 2023-07-31 Costas Argyris <costas.argyris@gmail.com>
6510 * gcc-ar.cc (main): Expand argv and use
6511 temporary response file to call ar if any
6512 expansions were made.
6514 2023-07-31 Andrew MacLeod <amacleod@redhat.com>
6516 PR tree-optimization/110582
6517 * gimple-range-fold.cc (fur_list::get_operand): Do not use the
6518 range vector for non-ssa names.
6520 2023-07-31 David Malcolm <dmalcolm@redhat.com>
6523 * diagnostic-client-data-hooks.h (class sarif_object): New forward
6525 (diagnostic_client_data_hooks::add_sarif_invocation_properties):
6527 * diagnostic-format-sarif.cc: Include "diagnostic-format-sarif.h".
6528 (class sarif_invocation): Inherit from sarif_object rather than
6530 (class sarif_result): Likewise.
6531 (class sarif_ice_notification): Likewise.
6532 (sarif_object::get_or_create_properties): New.
6533 (sarif_invocation::prepare_to_flush): Add "context" param. Use it
6534 to call the context's add_sarif_invocation_properties hook.
6535 (sarif_builder::flush_to_file): Pass m_context to
6536 sarif_invocation::prepare_to_flush.
6537 * diagnostic-format-sarif.h: New header.
6538 * doc/invoke.texi (Developer Options): Clarify that -ftime-report
6539 writes to stderr. Document that if SARIF diagnostic output is
6540 requested then any timing information is written in JSON form as
6541 part of the SARIF output, rather than to stderr.
6542 * timevar.cc: Include "json.h".
6543 (timer::named_items::m_hash_map): Split out type into...
6544 (timer::named_items::hash_map_t): ...this new typedef.
6545 (timer::named_items::make_json): New function.
6546 (timevar_diff): New function.
6547 (make_json_for_timevar_time_def): New function.
6548 (timer::timevar_def::make_json): New function.
6549 (timer::make_json): New function.
6550 * timevar.h (class json::value): New forward decl.
6551 (timer::make_json): New decl.
6552 (timer::timevar_def::make_json): New decl.
6553 * tree-diagnostic-client-data-hooks.cc: Include
6554 "diagnostic-format-sarif.h" and "timevar.h".
6555 (compiler_data_hooks::add_sarif_invocation_properties): New vfunc
6558 2023-07-31 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6560 * combine.cc (simplify_compare_const): Narrow comparison of
6561 memory and constant.
6562 (try_combine): Adapt new function signature.
6563 (simplify_comparison): Adapt new function signature.
6565 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
6567 * config/riscv/riscv-v.cc (expand_vec_series): Drop unused
6569 (expand_vector_init_insert_elems): Ditto.
6571 2023-07-31 Hao Liu <hliu@os.amperecomputing.com>
6574 * config/aarch64/aarch64.cc (count_ops): Only '* count' for
6575 single_defuse_cycle while counting reduction_latency.
6577 2023-07-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
6579 * internal-fn.def (DEF_INTERNAL_COND_FN): New macro.
6580 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
6601 (COND_LEN_ADD): Ditto.
6602 (COND_LEN_SUB): Ditto.
6603 (COND_LEN_MUL): Ditto.
6604 (COND_LEN_DIV): Ditto.
6605 (COND_LEN_MOD): Ditto.
6606 (COND_LEN_RDIV): Ditto.
6607 (COND_LEN_MIN): Ditto.
6608 (COND_LEN_MAX): Ditto.
6609 (COND_LEN_FMIN): Ditto.
6610 (COND_LEN_FMAX): Ditto.
6611 (COND_LEN_AND): Ditto.
6612 (COND_LEN_IOR): Ditto.
6613 (COND_LEN_XOR): Ditto.
6614 (COND_LEN_SHL): Ditto.
6615 (COND_LEN_SHR): Ditto.
6616 (COND_LEN_FMA): Ditto.
6617 (COND_LEN_FMS): Ditto.
6618 (COND_LEN_FNMA): Ditto.
6619 (COND_LEN_FNMS): Ditto.
6620 (COND_LEN_NEG): Ditto.
6621 (ADD): New macro define.
6642 2023-07-31 Roger Sayle <roger@nextmovesoftware.com>
6645 * config/i386/i386-features.cc (compute_convert_gain): Check
6646 TARGET_AVX512VL (not TARGET_AVX512F) when considering V2DImode
6647 and V4SImode rotates in STV.
6648 (general_scalar_chain::convert_rotate): Likewise.
6650 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
6652 * config/riscv/autovec.md (abs<mode>2): Remove `.require ()`.
6653 * config/riscv/riscv-protos.h (get_mask_mode): Update return
6655 * config/riscv/riscv-v.cc (rvv_builder::rvv_builder): Remove
6657 (emit_vlmax_insn): Ditto.
6658 (emit_vlmax_fp_insn): Ditto.
6659 (emit_vlmax_ternary_insn): Ditto.
6660 (emit_vlmax_fp_ternary_insn): Ditto.
6661 (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
6662 (emit_nonvlmax_insn): Ditto.
6663 (emit_vlmax_slide_insn): Ditto.
6664 (emit_nonvlmax_slide_tu_insn): Ditto.
6665 (emit_vlmax_merge_insn): Ditto.
6666 (emit_vlmax_masked_insn): Ditto.
6667 (emit_nonvlmax_masked_insn): Ditto.
6668 (emit_vlmax_masked_store_insn): Ditto.
6669 (emit_nonvlmax_masked_store_insn): Ditto.
6670 (emit_vlmax_masked_mu_insn): Ditto.
6671 (emit_nonvlmax_tu_insn): Ditto.
6672 (emit_nonvlmax_fp_tu_insn): Ditto.
6673 (emit_scalar_move_insn): Ditto.
6674 (emit_vlmax_compress_insn): Ditto.
6675 (emit_vlmax_reduction_insn): Ditto.
6676 (emit_vlmax_fp_reduction_insn): Ditto.
6677 (emit_nonvlmax_fp_reduction_insn): Ditto.
6678 (expand_vec_series): Ditto.
6679 (expand_vector_init_merge_repeating_sequence): Ditto.
6680 (expand_vec_perm): Ditto.
6681 (shuffle_merge_patterns): Ditto.
6682 (shuffle_compress_patterns): Ditto.
6683 (shuffle_decompress_patterns): Ditto.
6684 (expand_reduction): Ditto.
6685 (get_mask_mode): Update return type.
6686 * config/riscv/riscv.cc (riscv_get_mask_mode): Check vector type
6687 is valid, and use new get_mask_mode interface.
6689 2023-07-31 Pan Li <pan2.li@intel.com>
6691 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_frm_def):
6692 Move rm suffix before mask.
6694 2023-07-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6696 * config/riscv/autovec-vls.md (@vec_duplicate<mode>): New pattern.
6697 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Add VLS autovec
6700 2023-07-29 Roger Sayle <roger@nextmovesoftware.com>
6703 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
6704 (extzv<mode>): Likewise.
6705 (insv<mode>): Likewise.
6706 (*testqi_ext_3): Likewise.
6707 (*btr<mode>_2): Likewise.
6708 (define_split): Likewise.
6709 (*btsq_imm): Likewise.
6710 (*btrq_imm): Likewise.
6711 (*btcq_imm): Likewise.
6712 (define_peephole2 x3): Likewise.
6713 (*bt<mode>): Likewise
6714 (*bt<mode>_mask): New define_insn_and_split.
6715 (*jcc_bt<mode>): Use QImode for offsets.
6716 (*jcc_bt<mode>_1): Delete obsolete pattern.
6717 (*jcc_bt<mode>_mask): Use QImode offsets.
6718 (*jcc_bt<mode>_mask_1): Likewise.
6719 (define_split): Likewise.
6720 (*bt<mode>_setcqi): Likewise.
6721 (*bt<mode>_setncqi): Likewise.
6722 (*bt<mode>_setnc<mode>): Likewise.
6723 (*bt<mode>_setncqi_2): Likewise.
6724 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
6725 (bmi2_bzhi_<mode>3): Use QImode offsets.
6726 (*bmi2_bzhi_<mode>3): Likewise.
6727 (*bmi2_bzhi_<mode>3_1): Likewise.
6728 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
6729 (@tbm_bextri_<mode>): Likewise.
6731 2023-07-29 Jan Hubicka <jh@suse.cz>
6733 * profile-count.cc (profile_probability::sqrt): New member function.
6734 (profile_probability::pow): Likewise.
6735 * profile-count.h: (profile_probability::sqrt): Declare
6736 (profile_probability::pow): Likewise.
6737 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
6739 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
6741 * gimple-range-cache.cc (ssa_cache::merge_range): New.
6742 (ssa_lazy_cache::merge_range): New.
6743 * gimple-range-cache.h (class ssa_cache): Adjust protoypes.
6744 (class ssa_lazy_cache): Ditto.
6745 * gimple-range.cc (assume_query::calculate_op): Use merge_range.
6747 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
6749 * tree-ssa-propagate.cc (substitute_and_fold_engine::value_on_edge):
6750 Move from value-query.cc.
6751 (substitute_and_fold_engine::value_of_stmt): Ditto.
6752 (substitute_and_fold_engine::range_of_expr): New.
6753 * tree-ssa-propagate.h (substitute_and_fold_engine): Inherit from
6754 range_query. New prototypes.
6755 * value-query.cc (value_query::value_on_edge): Relocate.
6756 (value_query::value_of_stmt): Ditto.
6757 * value-query.h (class value_query): Remove.
6758 (class range_query): Remove base class. Adjust prototypes.
6760 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
6762 PR tree-optimization/110205
6763 * gimple-range-cache.h (ranger_cache::m_estimate): Delete.
6764 * range-op-mixed.h (operator_bitwise_xor::op1_op2_relation_effect):
6766 * range-op.cc (operator_lshift): Add missing final overrides.
6767 (operator_rshift): Ditto.
6769 2023-07-28 Jose E. Marchesi <jose.marchesi@oracle.com>
6771 * config/bpf/bpf.cc (bpf_option_override): Disable tail-call
6772 optimizations in BPF target.
6774 2023-07-28 Honza <jh@ryzen4.suse.cz>
6776 * cfgloopmanip.cc (loop_count_in): Break out from ...
6777 (loop_exit_for_scaling): Break out from ...
6778 (update_loop_exit_probability_scale_dom_bbs): Break out from ...;
6779 add more sanity check and debug info.
6780 (scale_loop_profile): ... here.
6781 (create_empty_loop_on_edge): Fix whitespac.
6782 * cfgloopmanip.h (update_loop_exit_probability_scale_dom_bbs): Declare.
6783 * loop-unroll.cc (unroll_loop_constant_iterations): Use
6784 update_loop_exit_probability_scale_dom_bbs.
6785 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling): Remove.
6786 (tree_transform_and_unroll_loop): Use
6787 update_loop_exit_probability_scale_dom_bbs.
6788 * tree-ssa-loop-split.cc (split_loop): Use
6789 update_loop_exit_probability_scale_dom_bbs.
6791 2023-07-28 Jan Hubicka <jh@suse.cz>
6794 * tree-ssa-loop-split.cc: Include value-query.h.
6795 (split_at_bb_p): Analyze cases where EQ/NE can be turned
6796 into LT/LE/GT/GE; return updated guard code.
6797 (split_loop): Use guard code.
6799 2023-07-28 Roger Sayle <roger@nextmovesoftware.com>
6800 Richard Biener <rguenther@suse.de>
6803 PR rtl-optimization/110587
6804 * expr.cc (emit_group_load_1): Simplify logic for calling
6805 force_reg on ORIG_SRC, to avoid making a copy if the source
6806 is already in a pseudo register.
6808 2023-07-28 Jan Hubicka <jh@suse.cz>
6810 PR middle-end/106923
6811 * tree-ssa-loop-split.cc (connect_loops): Change probability
6812 of the test preconditioning second loop to very_likely.
6813 (fix_loop_bb_probability): Handle correctly case where
6814 on of the arms of the conditional is empty.
6815 (split_loop): Fold the test guarding first condition to
6816 see if it is constant true; Set correct entry block
6817 probabilities of the split loops; determine correct loop
6820 2023-07-28 xuli <xuli1@eswincomputing.com>
6822 * config/riscv/riscv-vector-builtins-bases.cc: remove rounding mode of
6823 vsadd[u] and vssub[u].
6824 * config/riscv/vector.md: Ditto.
6826 2023-07-28 Jan Hubicka <jh@suse.cz>
6828 * tree-ssa-loop-split.cc (split_loop): Also support NE driven
6829 loops when IV test is not overflowing.
6831 2023-07-28 liuhongt <hongtao.liu@intel.com>
6834 * config/i386/sse.md (avx512cd_maskb_vec_dup<mode>): Add
6836 (avx512cd_maskw_vec_dup<mode>): Ditto.
6838 2023-07-27 David Faust <david.faust@oracle.com>
6842 * config/bpf/bpf.opt (msmov): New option.
6843 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
6844 * config/bpf/bpf.md (*extendsidi2): New.
6850 * doc/invoke.texi (Option Summary): Add -msmov eBPF option.
6851 (eBPF Options): Add -m[no-]smov. Document that -mcpu=v4
6852 also enables -msmov.
6854 2023-07-27 David Faust <david.faust@oracle.com>
6856 * doc/invoke.texi (Option Summary): Remove -mkernel eBPF option.
6857 Add -mbswap and -msdiv eBPF options.
6858 (eBPF Options): Remove -mkernel. Add -mno-{jmpext, jmp32,
6859 alu32, v3-atomics, bswap, sdiv}. Document that -mcpu=v4 also
6862 2023-07-27 David Faust <david.faust@oracle.com>
6864 * config/bpf/bpf.md (add<AM:mode>3): Use %w2 instead of %w1
6865 in pseudo-C dialect output template.
6866 (sub<AM:mode>3): Likewise.
6868 2023-07-27 Jan Hubicka <jh@suse.cz>
6870 * tree-vect-loop.cc (optimize_mask_stores): Make store
6873 2023-07-27 Jan Hubicka <jh@suse.cz>
6875 * cfgloop.h (single_dom_exit): Declare.
6876 * cfgloopmanip.h (update_exit_probability_after_unrolling): Declare.
6877 * cfgrtl.cc (struct cfg_hooks): Fix comment.
6878 * loop-unroll.cc (unroll_loop_constant_iterations): Update exit edge.
6879 * tree-ssa-loop-ivopts.h (single_dom_exit): Do not declare it here.
6880 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling):
6882 (tree_transform_and_unroll_loop): ... here;
6884 2023-07-27 Jan Hubicka <jh@suse.cz>
6886 * cfgloopmanip.cc (scale_dominated_blocks_in_loop): Move here from
6887 tree-ssa-loop-manip.cc and avoid recursion.
6888 (scale_loop_profile): Use scale_dominated_blocks_in_loop.
6889 (duplicate_loop_body_to_header_edge): Add DLTHE_FLAG_FLAT_PROFILE
6891 * cfgloopmanip.h (DLTHE_FLAG_FLAT_PROFILE): Define.
6892 (scale_dominated_blocks_in_loop): Declare.
6893 * predict.cc (dump_prediction): Do not ICE on uninitialized probability.
6894 (change_edge_frequency): Remove.
6895 * predict.h (change_edge_frequency): Remove.
6896 * tree-ssa-loop-manip.cc (scale_dominated_blocks_in_loop): Move to
6898 (niter_for_unrolled_loop): Remove.
6899 (tree_transform_and_unroll_loop): Fix profile update.
6901 2023-07-27 Jan Hubicka <jh@suse.cz>
6903 * tree-ssa-loop-im.cc (execute_sm_if_changed): Turn cap probability
6904 to guessed; fix count of new_bb.
6906 2023-07-27 Jan Hubicka <jh@suse.cz>
6908 * profile-count.h (profile_count::apply_probability): Fix
6909 handling of uninitialized probabilities, optimize scaling
6912 2023-07-27 Richard Biener <rguenther@suse.de>
6914 PR tree-optimization/91838
6915 * gimple-match-head.cc: Include attribs.h and asan.h.
6916 * generic-match-head.cc: Likewise.
6917 * match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern.
6919 2023-07-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6921 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Add VLS modes.
6922 (ADJUST_ALIGNMENT): Ditto.
6923 (ADJUST_PRECISION): Ditto.
6925 (VECTOR_MODE_WITH_PREFIX): Ditto.
6926 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): New macro.
6927 * config/riscv/riscv-protos.h (riscv_v_ext_vls_mode_p): New function.
6928 * config/riscv/riscv-v.cc (INCLUDE_ALGORITHM): Add include.
6929 (legitimize_move): Enable basic VLS modes support.
6932 (get_vector_mode): Ditto.
6933 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Add vls modes.
6934 * config/riscv/riscv.cc (riscv_v_ext_vls_mode_p): New function.
6935 (VLS_ENTRY): New macro.
6936 (riscv_v_ext_mode_p): Add vls modes.
6937 (riscv_get_v_regno_alignment): New function.
6938 (riscv_print_operand): Add vls modes.
6939 (riscv_hard_regno_nregs): Ditto.
6940 (riscv_hard_regno_mode_ok): Ditto.
6941 (riscv_regmode_natural_size): Ditto.
6942 (riscv_vectorize_preferred_vector_alignment): Ditto.
6943 * config/riscv/riscv.md: Ditto.
6944 * config/riscv/vector-iterators.md: Ditto.
6945 * config/riscv/vector.md: Ditto.
6946 * config/riscv/autovec-vls.md: New file.
6948 2023-07-27 Pan Li <pan2.li@intel.com>
6950 * config/riscv/riscv_vector.h (enum RVV_CSR): Removed.
6952 (vwrite_csr): Ditto.
6954 2023-07-27 demin.han <demin.han@starfivetech.com>
6956 * config/riscv/autovec.md: Delete which_alternative use in split
6958 2023-07-27 Richard Biener <rguenther@suse.de>
6960 * tree-ssa-sink.cc (sink_code_in_bb): Remove recursion, instead
6962 (pass_sink_code::execute): ... in the caller.
6964 2023-07-27 Kewen Lin <linkw@linux.ibm.com>
6965 Richard Biener <rguenther@suse.de>
6967 PR tree-optimization/110776
6968 * tree-vect-stmts.cc (vectorizable_load): Always cost VMAT_ELEMENTWISE
6971 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
6973 * config/riscv/riscv.md: Include zicond.md
6974 * config/riscv/zicond.md: New file.
6976 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
6978 * common/config/riscv/riscv-common.cc: New extension.
6979 * config/riscv/riscv-opts.h (MASK_ZICOND): New mask.
6980 (TARGET_ZICOND): New target.
6982 2023-07-26 Carl Love <cel@us.ibm.com>
6984 * config/rs6000/rs6000-c.cc (find_instance): Add new parameter that
6985 specifies the number of built-in arguments to check.
6986 (altivec_resolve_overloaded_builtin): Update calls to find_instance
6987 to pass the number of built-in arguments to be checked.
6989 2023-07-26 David Faust <david.faust@oracle.com>
6991 * config/bpf/bpf.opt (mv3-atomics): New option.
6992 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
6993 * config/bpf/bpf.h (enum_reg_class): Add R0 class.
6994 (REG_CLASS_NAMES): Likewise.
6995 (REG_CLASS_CONTENTS): Likewise.
6996 (REGNO_REG_CLASS): Handle R0.
6997 * config/bpf/bpf.md (UNSPEC_XADD): Rename to UNSPEC_AADD.
6998 (UNSPEC_AAND): New unspec.
6999 (UNSPEC_AOR): Likewise.
7000 (UNSPEC_AXOR): Likewise.
7001 (UNSPEC_AFADD): Likewise.
7002 (UNSPEC_AFAND): Likewise.
7003 (UNSPEC_AFOR): Likewise.
7004 (UNSPEC_AFXOR): Likewise.
7005 (UNSPEC_AXCHG): Likewise.
7006 (UNSPEC_ACMPX): Likewise.
7007 (atomic_add<mode>): Use UNSPEC_AADD and atomic type attribute.
7009 * config/bpf/atomic.md: ...Here. New file.
7010 * config/bpf/constraints.md (t): New constraint for R0.
7011 * doc/invoke.texi (eBPF Options): Document -mv3-atomics.
7013 2023-07-26 Matthew Malcomson <matthew.malcomson@arm.com>
7015 * tree-vect-stmts.cc (get_group_load_store_type): Reformat
7018 2023-07-26 Carl Love <cel@us.ibm.com>
7020 * config/rs6000/rs6000-builtins.def: Rename
7021 __builtin_altivec_vreplace_un_uv2di as __builtin_altivec_vreplace_un_udi
7022 __builtin_altivec_vreplace_un_uv4si as __builtin_altivec_vreplace_un_usi
7023 __builtin_altivec_vreplace_un_v2df as __builtin_altivec_vreplace_un_df
7024 __builtin_altivec_vreplace_un_v2di as __builtin_altivec_vreplace_un_di
7025 __builtin_altivec_vreplace_un_v4sf as __builtin_altivec_vreplace_un_sf
7026 __builtin_altivec_vreplace_un_v4si as __builtin_altivec_vreplace_un_si.
7027 Rename VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_UV4SI as
7028 VREPLACE_UN_USI, VREPLACE_UN_V2DF as VREPLACE_UN_DF,
7029 VREPLACE_UN_V2DI as VREPLACE_UN_DI, VREPLACE_UN_V4SF as
7030 VREPLACE_UN_SF, VREPLACE_UN_V4SI as VREPLACE_UN_SI.
7031 Rename vreplace_un_v2di as vreplace_un_di, vreplace_un_v4si as
7032 vreplace_un_si, vreplace_un_v2df as vreplace_un_df,
7033 vreplace_un_v2di as vreplace_un_di, vreplace_un_v4sf as
7034 vreplace_un_sf, vreplace_un_v4si as vreplace_un_si.
7035 * config/rs6000/rs6000-c.cc (find_instance): Add case
7036 RS6000_OVLD_VEC_REPLACE_UN.
7037 * config/rs6000/rs6000-overload.def (__builtin_vec_replace_un):
7038 Fix first argument type. Rename VREPLACE_UN_UV4SI as
7039 VREPLACE_UN_USI, VREPLACE_UN_V4SI as VREPLACE_UN_SI,
7040 VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_V2DI as
7041 VREPLACE_UN_DI, VREPLACE_UN_V4SF as VREPLACE_UN_SF,
7042 VREPLACE_UN_V2DF as VREPLACE_UN_DF.
7043 * config/rs6000/vsx.md (REPLACE_ELT): Rename the mode_iterator
7044 REPLACE_ELT_V for vector modes.
7045 (REPLACE_ELT): New scalar mode iterator.
7046 (REPLACE_ELT_char): Add scalar attributes.
7047 (vreplace_un_<mode>): Change iterator and mode attribute.
7049 2023-07-26 David Malcolm <dmalcolm@redhat.com>
7052 * Makefile.in (ANALYZER_OBJS): Add analyzer/symbol.o.
7054 2023-07-26 Richard Biener <rguenther@suse.de>
7056 PR tree-optimization/106081
7057 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
7058 Assign layout -1 to splats.
7060 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
7062 * range-op-mixed.h (class operator_cast): Add update_bitmask.
7063 * range-op.cc (operator_cast::update_bitmask): New.
7064 (operator_cast::fold_range): Call update_bitmask.
7066 2023-07-26 Li Xu <xuli1@eswincomputing.com>
7068 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change
7069 scalar type to float16, eliminate warning.
7070 (vfloat16mf4x3_t): Ditto.
7071 (vfloat16mf4x4_t): Ditto.
7072 (vfloat16mf4x5_t): Ditto.
7073 (vfloat16mf4x6_t): Ditto.
7074 (vfloat16mf4x7_t): Ditto.
7075 (vfloat16mf4x8_t): Ditto.
7076 (vfloat16mf2x2_t): Ditto.
7077 (vfloat16mf2x3_t): Ditto.
7078 (vfloat16mf2x4_t): Ditto.
7079 (vfloat16mf2x5_t): Ditto.
7080 (vfloat16mf2x6_t): Ditto.
7081 (vfloat16mf2x7_t): Ditto.
7082 (vfloat16mf2x8_t): Ditto.
7083 (vfloat16m1x2_t): Ditto.
7084 (vfloat16m1x3_t): Ditto.
7085 (vfloat16m1x4_t): Ditto.
7086 (vfloat16m1x5_t): Ditto.
7087 (vfloat16m1x6_t): Ditto.
7088 (vfloat16m1x7_t): Ditto.
7089 (vfloat16m1x8_t): Ditto.
7090 (vfloat16m2x2_t): Ditto.
7091 (vfloat16m2x3_t): Ditto.
7092 (vfloat16m2x4_t): Ditto.
7093 (vfloat16m4x2_t): Ditto.
7094 * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T.
7095 * config/riscv/vector.md: add tuple mode in attr sew.
7097 2023-07-26 Uros Bizjak <ubizjak@gmail.com>
7100 * config/i386/i386.md (plusminusmult): New code iterator.
7101 * config/i386/mmx.md (mmxdoublevecmode): New mode attribute.
7102 (movq_<mode>_to_sse): New expander.
7103 (<plusminusmult:insn>v2sf3): Macroize expander from addv2sf3,
7104 subv2sf3 and mulv2sf3 using plusminusmult code iterator. Rewrite
7105 as a wrapper around V4SFmode operation.
7106 (mmx_addv2sf3): Change operand 1 and operand 2 predicates to
7107 nonimmediate_operand.
7108 (*mmx_addv2sf3): Remove SSE alternatives. Change operand 1 and
7109 operand 2 predicates to nonimmediate_operand.
7110 (mmx_subv2sf3): Change operand 2 predicate to nonimmediate_operand.
7111 (mmx_subrv2sf3): Change operand 1 predicate to nonimmediate_operand.
7112 (*mmx_subv2sf3): Remove SSE alternatives. Change operand 1 and
7113 operand 2 predicates to nonimmediate_operand.
7114 (mmx_mulv2sf3): Change operand 1 and operand 2 predicates to
7115 nonimmediate_operand.
7116 (*mmx_mulv2sf3): Remove SSE alternatives. Change operand 1 and
7117 operand 2 predicates to nonimmediate_operand.
7118 (divv2sf3): Rewrite as a wrapper around V4SFmode operation.
7119 (<smaxmin:code>v2sf3): Ditto.
7120 (mmx_<smaxmin:code>v2sf3): Change operand 1 and operand 2
7121 predicates to nonimmediate_operand.
7122 (*mmx_<smaxmin:code>v2sf3): Remove SSE alternatives. Change
7123 operand 1 and operand 2 predicates to nonimmediate_operand.
7124 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
7125 (sqrtv2sf2): Rewrite as a wrapper around V4SFmode operation.
7126 (*mmx_haddv2sf3_low): Ditto.
7127 (*mmx_hsubv2sf3_low): Ditto.
7128 (vec_addsubv2sf3): Ditto.
7129 (*mmx_maskcmpv2sf3_comm): Remove.
7130 (*mmx_maskcmpv2sf3): Remove.
7131 (vec_cmpv2sfv2si): Rewrite as a wrapper around V4SFmode operation.
7132 (vcond<V2FI:mode>v2sf): Ditto.
7137 (fix_truncv2sfv2si2): Ditto.
7138 (fixuns_truncv2sfv2si2): Ditto.
7139 (mmx_fix_truncv2sfv2si2): Remove SSE alternatives.
7140 Change operand 1 predicate to nonimmediate_operand.
7141 (floatv2siv2sf2): Rewrite as a wrapper around V4SFmode operation.
7142 (floatunsv2siv2sf2): Ditto.
7143 (mmx_floatv2siv2sf2): Remove SSE alternatives.
7144 Change operand 1 predicate to nonimmediate_operand.
7145 (nearbyintv2sf2): Rewrite as a wrapper around V4SFmode operation.
7147 (lrintv2sfv2si2): Ditto.
7149 (lceilv2sfv2si2): Ditto.
7150 (floorv2sf2): Ditto.
7151 (lfloorv2sfv2si2): Ditto.
7152 (btruncv2sf2): Ditto.
7153 (roundv2sf2): Ditto.
7154 (lroundv2sfv2si2): Ditto.
7155 (*mmx_roundv2sf2): Remove.
7157 2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com>
7159 * config/bpf/bpf.md: Fix neg{SI,DI}2 insn.
7161 2023-07-26 Richard Biener <rguenther@suse.de>
7163 PR tree-optimization/110799
7164 * tree-ssa-pre.cc (compute_avail): More thoroughly match
7165 up TBAA behavior of redundant loads.
7167 2023-07-26 Jakub Jelinek <jakub@redhat.com>
7169 PR tree-optimization/110755
7170 * range-op-float.cc (frange_arithmetic): Change +0 result to -0
7171 for PLUS_EXPR or MINUS_EXPR if -frounding-math, inf is negative and
7172 it is exact op1 + (-op1) or op1 - op1.
7174 2023-07-26 Kewen Lin <linkw@linux.ibm.com>
7177 * config/rs6000/vsx.md (define_insn xxeval): Correct vsx
7178 operands output with "x".
7180 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
7182 * range-op.cc (class operator_absu): Add update_bitmask.
7183 (operator_absu::update_bitmask): New.
7185 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
7187 * range-op-mixed.h (class operator_abs): Add update_bitmask.
7188 * range-op.cc (operator_abs::update_bitmask): New.
7190 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
7192 * range-op-mixed.h (class operator_bitwise_not): Add update_bitmask.
7193 * range-op.cc (operator_bitwise_not::update_bitmask): New.
7195 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
7197 * range-op.cc (update_known_bitmask): Handle unary operators.
7199 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
7201 * tree-ssa-ccp.cc (bit_value_unop): Initialize val when appropriate.
7203 2023-07-26 Jin Ma <jinma@linux.alibaba.com>
7205 * config/riscv/riscv.md: Likewise.
7207 2023-07-26 Jan Hubicka <jh@suse.cz>
7209 * profile-count.cc (profile_count::to_sreal_scale): Value is not know
7210 if we divide by zero.
7212 2023-07-25 David Faust <david.faust@oracle.com>
7214 * config/bpf/bpf.cc (bpf_print_operand_address): Don't print
7215 enclosing parentheses for pseudo-C dialect.
7216 * config/bpf/bpf.md (zero_exdendhidi2): Add parentheses around
7217 operands of pseudo-C dialect output templates where needed.
7218 (zero_extendqidi2): Likewise.
7219 (zero_extendsidi2): Likewise.
7220 (*mov<MM:mode>): Likewise.
7222 2023-07-25 Aldy Hernandez <aldyh@redhat.com>
7224 * tree-ssa-ccp.cc (value_mask_to_min_max): Make static.
7225 (bit_value_mult_const): Same.
7226 (get_individual_bits): Same.
7228 2023-07-25 Haochen Gui <guihaoc@gcc.gnu.org>
7231 * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Gimple
7232 fold RS6000_BIF_XSMINDP and RS6000_BIF_XSMAXDP when fast-math is set.
7233 * config/rs6000/rs6000.md (FMINMAX): New int iterator.
7234 (minmax_op): New int attribute.
7235 (UNSPEC_FMAX, UNSPEC_FMIN): New unspecs.
7236 (f<minmax_op><mode>3): New pattern by UNSPEC_FMAX and UNSPEC_FMIN.
7237 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xsmaxdp): Set
7239 (__builtin_vsx_xsmindp): Set pattern to fmindf3.
7241 2023-07-24 David Faust <david.faust@oracle.com>
7243 * config/bpf/bpf.md (nop): Add pseudo-c asm dialect template.
7245 2023-07-24 Drew Ross <drross@redhat.com>
7246 Jakub Jelinek <jakub@redhat.com>
7248 PR middle-end/109986
7249 * generic-match-head.cc (bitwise_equal_p): New macro.
7250 * gimple-match-head.cc (bitwise_equal_p): New macro.
7251 (gimple_nop_convert): Declare.
7252 (gimple_bitwise_equal_p): Helper for bitwise_equal_p.
7253 * match.pd ((~X | Y) ^ X -> ~(X & Y)): New simplification.
7255 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
7257 * common/config/riscv/riscv-common.cc (riscv_subset_list::add): Use
7258 single quote rather than backquote in diagnostic.
7260 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
7263 * config/bpf/bpf.opt: New command-line option -msdiv.
7264 * config/bpf/bpf.md: Conditionalize sdiv/smod on bpf_has_sdiv.
7265 * config/bpf/bpf.cc (bpf_option_override): Initialize
7267 * doc/invoke.texi (eBPF Options): Document -msdiv.
7269 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
7271 * config/riscv/riscv.cc (riscv_option_override): Spell out
7272 greater than and use cannot in diagnostic string.
7274 2023-07-24 Richard Biener <rguenther@suse.de>
7276 * tree-vectorizer.h (_slp_tree::push_vec_def): Add.
7277 (_slp_tree::vec_stmts): Remove.
7278 (SLP_TREE_VEC_STMTS): Remove.
7279 * tree-vect-slp.cc (_slp_tree::push_vec_def): Define.
7280 (_slp_tree::_slp_tree): Adjust.
7281 (_slp_tree::~_slp_tree): Likewise.
7282 (vect_get_slp_vect_def): Simplify.
7283 (vect_get_slp_defs): Likewise.
7284 (vect_transform_slp_perm_load_1): Adjust.
7285 (vect_add_slp_permutation): Likewise.
7286 (vect_schedule_slp_node): Likewise.
7287 (vectorize_slp_instance_root_stmt): Likewise.
7288 (vect_schedule_scc): Likewise.
7289 * tree-vect-stmts.cc (vectorizable_bswap): Use push_vec_def.
7290 (vectorizable_call): Likewise.
7291 (vectorizable_call): Likewise.
7292 (vect_create_vectorized_demotion_stmts): Likewise.
7293 (vectorizable_conversion): Likewise.
7294 (vectorizable_assignment): Likewise.
7295 (vectorizable_shift): Likewise.
7296 (vectorizable_operation): Likewise.
7297 (vectorizable_load): Likewise.
7298 (vectorizable_condition): Likewise.
7299 (vectorizable_comparison): Likewise.
7300 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Adjust.
7301 (vectorize_fold_left_reduction): Use push_vec_def.
7302 (vect_transform_reduction): Likewise.
7303 (vect_transform_cycle_phi): Likewise.
7304 (vectorizable_lc_phi): Likewise.
7305 (vectorizable_phi): Likewise.
7306 (vectorizable_recurr): Likewise.
7307 (vectorizable_induction): Likewise.
7308 (vectorizable_live_operation): Likewise.
7310 2023-07-24 Richard Biener <rguenther@suse.de>
7312 * tree-ssa-loop.cc: Remove unused tree-vectorizer.h include.
7314 2023-07-24 Richard Biener <rguenther@suse.de>
7316 * config/i386/i386-builtins.cc: Remove tree-vectorizer.h include.
7317 * config/i386/i386-expand.cc: Likewise.
7318 * config/i386/i386-features.cc: Likewise.
7319 * config/i386/i386-options.cc: Likewise.
7321 2023-07-24 Robin Dapp <rdapp@ventanamicro.com>
7323 * tree-vect-stmts.cc (vectorizable_conversion): Handle
7324 more demotion/promotion for modifier == NONE.
7326 2023-07-24 Roger Sayle <roger@nextmovesoftware.com>
7331 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
7332 (extzv<mode>): Likewise.
7333 (insv<mode>): Likewise.
7334 (*testqi_ext_3): Likewise.
7335 (*btr<mode>_2): Likewise.
7336 (define_split): Likewise.
7337 (*btsq_imm): Likewise.
7338 (*btrq_imm): Likewise.
7339 (*btcq_imm): Likewise.
7340 (define_peephole2 x3): Likewise.
7341 (*bt<mode>): Likewise
7342 (*bt<mode>_mask): New define_insn_and_split.
7343 (*jcc_bt<mode>): Use QImode for offsets.
7344 (*jcc_bt<mode>_1): Delete obsolete pattern.
7345 (*jcc_bt<mode>_mask): Use QImode offsets.
7346 (*jcc_bt<mode>_mask_1): Likewise.
7347 (define_split): Likewise.
7348 (*bt<mode>_setcqi): Likewise.
7349 (*bt<mode>_setncqi): Likewise.
7350 (*bt<mode>_setnc<mode>): Likewise.
7351 (*bt<mode>_setncqi_2): Likewise.
7352 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
7353 (bmi2_bzhi_<mode>3): Use QImode offsets.
7354 (*bmi2_bzhi_<mode>3): Likewise.
7355 (*bmi2_bzhi_<mode>3_1): Likewise.
7356 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
7357 (@tbm_bextri_<mode>): Likewise.
7359 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
7361 * config/bpf/bpf-opts.h (enum bpf_kernel_version): Remove enum.
7362 * config/bpf/bpf.opt (mkernel): Remove option.
7363 * config/bpf/bpf.cc (bpf_target_macros): Do not define
7364 BPF_KERNEL_VERSION_CODE.
7366 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
7369 * config/bpf/bpf.opt (mcpu): Add ISA_V4 and make it the default.
7370 (mbswap): New option.
7371 * config/bpf/bpf-opts.h (enum bpf_isa_version): New value ISA_V4.
7372 * config/bpf/bpf.cc (bpf_option_override): Set bpf_has_bswap.
7373 * config/bpf/bpf.md: Use bswap instructions if available for
7374 bswap* insn, and fix constraint.
7375 * doc/invoke.texi (eBPF Options): Document -mcpu=v4 and -mbswap.
7377 2023-07-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7379 * config/riscv/autovec.md (fold_left_plus_<mode>): New pattern.
7380 (mask_len_fold_left_plus_<mode>): Ditto.
7381 * config/riscv/riscv-protos.h (enum insn_type): New enum.
7382 (enum reduction_type): Ditto.
7383 (expand_reduction): Add in-order reduction.
7384 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_reduction_insn): New function.
7385 (expand_reduction): Add in-order reduction.
7387 2023-07-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
7389 * tree-vect-loop.cc (get_masked_reduction_fn): Add mask_len_fold_left_plus.
7390 (vectorize_fold_left_reduction): Ditto.
7391 (vectorizable_reduction): Ditto.
7392 (vect_transform_reduction): Ditto.
7394 2023-07-24 Richard Biener <rguenther@suse.de>
7396 PR tree-optimization/110777
7397 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
7398 Avoid propagating abnormals.
7400 2023-07-24 Richard Biener <rguenther@suse.de>
7402 PR tree-optimization/110766
7403 * tree-scalar-evolution.cc
7404 (analyze_and_compute_bitwise_induction_effect): Check the PHI
7405 is defined in the loop header.
7407 2023-07-24 Kewen Lin <linkw@linux.ibm.com>
7409 PR tree-optimization/110740
7410 * tree-vect-loop.cc (vect_analyze_loop_costing): Do not vectorize a
7411 loop with a single scalar iteration.
7413 2023-07-24 Pan Li <pan2.li@intel.com>
7415 * config/riscv/riscv-vector-builtins-shapes.cc
7416 (struct alu_frm_def): Take range check.
7418 2023-07-22 Vineet Gupta <vineetg@rivosinc.com>
7421 * config/riscv/predicates.md (const_0_operand): Add back
7424 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
7426 * config/i386/i386-expand.cc (ix86_expand_move): Disable the
7427 64-bit insertions into TImode optimizations with -O0, unless
7428 the function has the "naked" attribute (for PR target/110533).
7430 2023-07-22 Andrew Pinski <apinski@marvell.com>
7433 * rtl.h (extended_count): Change last argument type
7436 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
7438 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
7439 (extzv<mode>): Likewise.
7440 (insv<mode>): Likewise.
7441 (*testqi_ext_3): Likewise.
7442 (*btr<mode>_2): Likewise.
7443 (define_split): Likewise.
7444 (*btsq_imm): Likewise.
7445 (*btrq_imm): Likewise.
7446 (*btcq_imm): Likewise.
7447 (define_peephole2 x3): Likewise.
7448 (*bt<mode>): Likewise
7449 (*bt<mode>_mask): New define_insn_and_split.
7450 (*jcc_bt<mode>): Use QImode for offsets.
7451 (*jcc_bt<mode>_1): Delete obsolete pattern.
7452 (*jcc_bt<mode>_mask): Use QImode offsets.
7453 (*jcc_bt<mode>_mask_1): Likewise.
7454 (define_split): Likewise.
7455 (*bt<mode>_setcqi): Likewise.
7456 (*bt<mode>_setncqi): Likewise.
7457 (*bt<mode>_setnc<mode>): Likewise.
7458 (*bt<mode>_setncqi_2): Likewise.
7459 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
7460 (bmi2_bzhi_<mode>3): Use QImode offsets.
7461 (*bmi2_bzhi_<mode>3): Likewise.
7462 (*bmi2_bzhi_<mode>3_1): Likewise.
7463 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
7464 (@tbm_bextri_<mode>): Likewise.
7466 2023-07-22 Jeff Law <jlaw@ventanamicro.com>
7468 * config/bfin/bfin.md (ones): Fix length computation.
7470 2023-07-22 Vladimir N. Makarov <vmakarov@redhat.com>
7472 * lra-eliminations.cc (update_reg_eliminate): Fix the assert.
7473 (lra_update_fp2sp_elimination): Use HARD_FRAME_POINTER_REGNUM
7474 instead of FRAME_POINTER_REGNUM to spill pseudos.
7476 2023-07-21 Roger Sayle <roger@nextmovesoftware.com>
7477 Richard Biener <rguenther@suse.de>
7480 * gimplify.cc (gimplify_compound_lval): If the array's type
7481 is error_mark_node then return GS_ERROR.
7483 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
7486 * config/bpf/bpf.opt: Added option -masm=<dialect>.
7487 * config/bpf/bpf-opts.h (enum bpf_asm_dialect): New type.
7488 * config/bpf/bpf.cc (bpf_print_register): New function.
7489 (bpf_print_register): Support pseudo-c syntax for registers.
7490 (bpf_print_operand_address): Likewise.
7491 * config/bpf/bpf.h (ASM_SPEC): handle -msasm.
7492 (ASSEMBLER_DIALECT): Define.
7493 * config/bpf/bpf.md: Added pseudo-c templates.
7494 * doc/invoke.texi (-masm=): New eBPF option item.
7496 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
7498 * config/bpf/bpf.md: fixed template for neg instruction.
7500 2023-07-21 Jan Hubicka <jh@suse.cz>
7503 * tree-vect-loop.cc (scale_profile_for_vect_loop): Avoid scaling flat
7504 profiles by vectorization factor.
7505 (vect_transform_loop): Check for flat profiles.
7507 2023-07-21 Jan Hubicka <jh@suse.cz>
7509 * cfgloop.h (maybe_flat_loop_profile): Declare
7510 * cfgloopanal.cc (maybe_flat_loop_profile): New function.
7511 * tree-cfg.cc (print_loop_info): Print info about flat profiles.
7513 2023-07-21 Jan Hubicka <jh@suse.cz>
7515 * cfgloop.cc (get_estimated_loop_iterations): Use sreal::to_nearest_int
7516 * cfgloopanal.cc (expected_loop_iterations_unbounded): Likewise.
7517 * predict.cc (estimate_bb_frequencies): Likewise.
7518 * profile.cc (branch_prob): Likewise.
7519 * tree-ssa-loop-niter.cc (estimate_numbers_of_iterations): Likewise
7521 2023-07-21 Iain Sandoe <iain@sandoe.co.uk>
7523 * config.in: Regenerate.
7524 * config/darwin.h (DARWIN_LD_DEMANGLE): New.
7525 (LINK_COMMAND_SPEC_A): Add demangle handling.
7526 * configure: Regenerate.
7527 * configure.ac: Detect linker support for '-demangle'.
7529 2023-07-21 Jan Hubicka <jh@suse.cz>
7531 * sreal.cc (sreal::to_nearest_int): New.
7532 (sreal_verify_basics): Verify also to_nearest_int.
7533 (verify_aritmetics): Likewise.
7534 (sreal_verify_conversions): New.
7535 (sreal_cc_tests): Call sreal_verify_conversions.
7536 * sreal.h: (sreal::to_nearest_int): Declare
7538 2023-07-21 Jan Hubicka <jh@suse.cz>
7540 * tree-ssa-loop-ch.cc (enum ch_decision): New enum.
7541 (should_duplicate_loop_header_p): Return info on profitability.
7542 (do_while_loop_p): Watch for constant conditionals.
7543 (update_profile_after_ch): Do not sanity check that all
7544 static exits are taken.
7545 (ch_base::copy_headers): Run on all loops.
7546 (pass_ch::process_loop_p): Improve heuristics by handling also
7547 do_while loop and duplicating shortest sequence containing all
7550 2023-07-21 Jan Hubicka <jh@suse.cz>
7552 * tree-ssa-loop-niter.cc (finite_loop_p): Reorder to do cheap
7553 tests first; update finite_p flag.
7555 2023-07-21 Jan Hubicka <jh@suse.cz>
7557 * cfgloop.cc (flow_loop_dump): Use print_loop_info.
7558 * cfgloop.h (print_loop_info): Declare.
7559 * tree-cfg.cc (print_loop_info): Break out from ...; add
7560 printing of missing fields and profile
7561 (print_loop): ... here.
7563 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7565 * config/riscv/riscv-v.cc (expand_gather_scatter): Remove redundant variables.
7567 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7569 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Change condition order.
7570 (vectorizable_operation): Ditto.
7572 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7574 * config/riscv/autovec.md: Align order of mask and len.
7575 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
7576 (expand_gather_scatter): Ditto.
7577 * doc/md.texi: Ditto.
7578 * internal-fn.cc (add_len_and_mask_args): Ditto.
7579 (add_mask_and_len_args): Ditto.
7580 (expand_partial_load_optab_fn): Ditto.
7581 (expand_partial_store_optab_fn): Ditto.
7582 (expand_scatter_store_optab_fn): Ditto.
7583 (expand_gather_load_optab_fn): Ditto.
7584 (internal_fn_len_index): Ditto.
7585 (internal_fn_mask_index): Ditto.
7586 (internal_len_load_store_bias): Ditto.
7587 * tree-vect-stmts.cc (vectorizable_store): Ditto.
7588 (vectorizable_load): Ditto.
7590 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7592 * config/riscv/autovec.md (len_maskload<mode><vm>): Change LEN_MASK into MASK_LEN.
7593 (mask_len_load<mode><vm>): Ditto.
7594 (len_maskstore<mode><vm>): Ditto.
7595 (mask_len_store<mode><vm>): Ditto.
7596 (len_mask_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
7597 (mask_len_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
7598 (len_mask_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
7599 (mask_len_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
7600 (len_mask_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
7601 (mask_len_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
7602 (len_mask_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
7603 (mask_len_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
7604 (len_mask_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
7605 (mask_len_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
7606 (len_mask_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
7607 (mask_len_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
7608 (len_mask_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
7609 (mask_len_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
7610 (len_mask_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
7611 (mask_len_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
7612 (len_mask_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
7613 (mask_len_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
7614 (len_mask_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
7615 (mask_len_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
7616 (len_mask_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
7617 (mask_len_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
7618 (len_mask_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
7619 (mask_len_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
7620 (len_mask_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
7621 (mask_len_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
7622 (len_mask_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
7623 (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
7624 * doc/md.texi: Ditto.
7625 * genopinit.cc (main): Ditto.
7626 (CMP_NAME): Ditto. Ditto.
7627 * gimple-fold.cc (arith_overflowed_p): Ditto.
7628 (gimple_fold_partial_load_store_mem_ref): Ditto.
7629 (gimple_fold_call): Ditto.
7630 * internal-fn.cc (len_maskload_direct): Ditto.
7631 (mask_len_load_direct): Ditto.
7632 (len_maskstore_direct): Ditto.
7633 (mask_len_store_direct): Ditto.
7634 (expand_call_mem_ref): Ditto.
7635 (expand_len_maskload_optab_fn): Ditto.
7636 (expand_mask_len_load_optab_fn): Ditto.
7637 (expand_len_maskstore_optab_fn): Ditto.
7638 (expand_mask_len_store_optab_fn): Ditto.
7639 (direct_len_maskload_optab_supported_p): Ditto.
7640 (direct_mask_len_load_optab_supported_p): Ditto.
7641 (direct_len_maskstore_optab_supported_p): Ditto.
7642 (direct_mask_len_store_optab_supported_p): Ditto.
7643 (internal_load_fn_p): Ditto.
7644 (internal_store_fn_p): Ditto.
7645 (internal_gather_scatter_fn_p): Ditto.
7646 (internal_fn_len_index): Ditto.
7647 (internal_fn_mask_index): Ditto.
7648 (internal_fn_stored_value_index): Ditto.
7649 (internal_len_load_store_bias): Ditto.
7650 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
7651 (MASK_LEN_GATHER_LOAD): Ditto.
7652 (LEN_MASK_LOAD): Ditto.
7653 (MASK_LEN_LOAD): Ditto.
7654 (LEN_MASK_SCATTER_STORE): Ditto.
7655 (MASK_LEN_SCATTER_STORE): Ditto.
7656 (LEN_MASK_STORE): Ditto.
7657 (MASK_LEN_STORE): Ditto.
7658 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
7659 (supports_vec_scatter_store_p): Ditto.
7660 * optabs-tree.cc (target_supports_mask_load_store_p): Ditto.
7661 (target_supports_len_load_store_p): Ditto.
7662 * optabs.def (OPTAB_CD): Ditto.
7663 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Ditto.
7664 (call_may_clobber_ref_p_1): Ditto.
7665 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Ditto.
7666 (dse_optimize_stmt): Ditto.
7667 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
7668 (get_alias_ptr_type_for_ptr_address): Ditto.
7669 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
7670 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
7671 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
7672 (vect_get_strided_load_store_ops): Ditto.
7673 (vectorizable_store): Ditto.
7674 (vectorizable_load): Ditto.
7676 2023-07-21 Haochen Jiang <haochen.jiang@intel.com>
7678 * config/i386/i386.opt: Fix a typo.
7680 2023-07-21 Richard Biener <rguenther@suse.de>
7682 PR tree-optimization/88540
7683 * tree-ssa-phiopt.cc (minmax_replacement): Do not give up
7684 with NaNs but handle the simple case by if-converting to a
7687 2023-07-21 Andrew Pinski <apinski@marvell.com>
7689 * match.pd (minmax<minmax<a,b>,a>->minmax<a,b>): New
7692 2023-07-21 Richard Biener <rguenther@suse.de>
7694 PR tree-optimization/110742
7695 * tree-vect-slp.cc (vect_optimize_slp_pass::get_result_with_layout):
7696 Do not materialize an edge permutation in an external node with
7698 (vect_slp_analyze_node_operations_1): Guard purely internal
7701 2023-07-21 Jan Hubicka <jh@suse.cz>
7703 * cfgloop.cc: Include sreal.h.
7704 (flow_loop_dump): Dump sreal iteration exsitmate.
7705 (get_estimated_loop_iterations): Update.
7706 * cfgloop.h (expected_loop_iterations_by_profile): Declare.
7707 * cfgloopanal.cc (expected_loop_iterations_by_profile): New function.
7708 (expected_loop_iterations_unbounded): Use new API.
7709 * cfgloopmanip.cc (scale_loop_profile): Use
7710 expected_loop_iterations_by_profile
7711 * predict.cc (pass_profile::execute): Likewise.
7712 * profile.cc (branch_prob): Likewise.
7713 * tree-ssa-loop-niter.cc: Include sreal.h.
7714 (estimate_numbers_of_iterations): Likewise
7716 2023-07-21 Kewen Lin <linkw@linux.ibm.com>
7718 PR tree-optimization/110744
7719 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Correct the index of bias
7720 operand for ifn IFN_LEN_STORE.
7722 2023-07-21 liuhongt <hongtao.liu@intel.com>
7725 * common.opt: (fcf-protection=): Add EnumSet attribute to
7726 support combination of params.
7728 2023-07-21 David Malcolm <dmalcolm@redhat.com>
7730 PR middle-end/110612
7731 * text-art/table.cc (table_geometry::table_geometry): Drop m_table
7733 (table_geometry::table_x_to_canvas_x): Add cast to comparison.
7734 (table_geometry::table_y_to_canvas_y): Likewise.
7735 * text-art/table.h (table_geometry::m_table): Drop unused field.
7736 * text-art/widget.h (wrapper_widget::update_child_alloc_rects):
7739 2023-07-20 Uros Bizjak <ubizjak@gmail.com>
7742 * config/i386/i386-features.cc
7743 (general_scalar_chain::compute_convert_gain): Calculate gain
7744 for extend higpart case.
7745 (general_scalar_chain::convert_op): Handle
7746 ASHIFTRT/ASHIFT combined RTX.
7747 (general_scalar_to_vector_candidate_p): Enable ASHIFTRT for
7748 SImode for SSE2 targets. Handle ASHIFTRT/ASHIFT combined RTX.
7749 * config/i386/i386.md (*extend<dwi>2_doubleword_highpart):
7750 New define_insn_and_split pattern.
7751 (*extendv2di2_highpart_stv): Ditto.
7753 2023-07-20 Vladimir N. Makarov <vmakarov@redhat.com>
7755 * lra-constraints.cc (simplify_operand_subreg): Check frame pointer
7758 2023-07-20 Andrew Pinski <apinski@marvell.com>
7760 * combine.cc (dump_combine_stats): Remove.
7761 (dump_combine_total_stats): Remove.
7762 (total_attempts, total_merges, total_extras,
7763 total_successes): Remove.
7764 (combine_instructions): Don't increment total stats
7765 instead use statistics_counter_event.
7766 * dumpfile.cc (print_combine_total_stats): Remove.
7767 * dumpfile.h (print_combine_total_stats): Remove.
7768 (dump_combine_total_stats): Remove.
7769 * passes.cc (finish_optimization_passes):
7770 Don't call print_combine_total_stats.
7771 * rtl.h (dump_combine_total_stats): Remove.
7772 (dump_combine_stats): Remove.
7774 2023-07-20 Jan Hubicka <jh@suse.cz>
7776 * tree-ssa-loop-ch.cc (should_duplicate_loop_header_p): Use BIT instead of TRUTH
7779 2023-07-20 Martin Jambor <mjambor@suse.cz>
7781 * doc/invoke.texi (analyzer-text-art-string-ellipsis-threshold): New.
7782 (analyzer-text-art-ideal-canvas-width): Likewise.
7783 (analyzer-text-art-string-ellipsis-head-len): Likewise.
7784 (analyzer-text-art-string-ellipsis-tail-len): Likewise.
7786 2023-07-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
7788 * tree-vect-stmts.cc (check_load_store_for_partial_vectors):
7789 Refine code structure.
7791 2023-07-20 Jan Hubicka <jh@suse.cz>
7793 * tree-ssa-loop-ch.cc (edge_range_query): Rename to ...
7794 (get_range_query): ... this one; do
7795 (static_loop_exit): Add query parametr, turn ranger to reference.
7796 (loop_static_stmt_p): New function.
7797 (loop_static_op_p): New function.
7798 (loop_iv_derived_p): Remove.
7799 (loop_combined_static_and_iv_p): New function.
7800 (should_duplicate_loop_header_p): Discover combined onditionals;
7801 do not track iv derived; improve dumps.
7802 (pass_ch::execute): Fix whitespace.
7804 2023-07-20 Richard Biener <rguenther@suse.de>
7806 PR tree-optimization/110204
7807 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
7808 Look through copies generated by PRE.
7810 2023-07-20 Matthew Malcomson <matthew.malcomson@arm.com>
7812 * tree-vect-stmts.cc (get_group_load_store_type): Account for
7813 `gap` when checking if need to peel twice.
7815 2023-07-20 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
7818 * doc/extend.texi: Document iseqsig builtin.
7819 * builtins.cc (fold_builtin_iseqsig): New function.
7820 (fold_builtin_2): Handle BUILT_IN_ISEQSIG.
7821 (is_inexpensive_builtin): Handle BUILT_IN_ISEQSIG.
7822 * builtins.def (BUILT_IN_ISEQSIG): New built-in.
7824 2023-07-20 Pan Li <pan2.li@intel.com>
7826 * config/riscv/vector.md: Fix incorrect match_operand.
7828 2023-07-20 Roger Sayle <roger@nextmovesoftware.com>
7830 * config/i386/i386-expand.cc (ix86_expand_move): Don't call
7831 force_reg, to use SUBREG rather than create a new pseudo when
7832 inserting DFmode fields into TImode with insvti_{high,low}part.
7833 * config/i386/i386.md (*concat<mode><dwi>3_3): Split into two
7834 define_insn_and_split...
7835 (*concatditi3_3): 64-bit implementation. Provide alternative
7836 that allows register allocation to use SSE registers that is
7837 split into vec_concatv2di after reload.
7838 (*concatsidi3_3): 32-bit implementation.
7840 2023-07-20 Richard Biener <rguenther@suse.de>
7843 * internal-fn.cc (expand_vec_cond_optab_fn): When the
7844 value operands are equal to the original comparison operands
7845 preserve that equality by re-using the comparison expansion.
7846 * optabs.cc (emit_conditional_move): When the value operands
7847 are equal to the comparison operands and would be forced to
7848 a register by prepare_cmp_insn do so earlier, preserving the
7851 2023-07-20 Pan Li <pan2.li@intel.com>
7853 * config/riscv/vector.md: Align pattern format.
7855 2023-07-20 Haochen Jiang <haochen.jiang@intel.com>
7857 * doc/invoke.texi: Remove AVX512VP2INTERSECT in
7858 Granite Rapids{, D} from documentation.
7860 2023-07-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7862 * config/riscv/autovec.md
7863 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>):
7864 Refactor RVV machine modes.
7865 (len_mask_gather_load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
7866 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
7867 (len_mask_gather_load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
7868 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
7869 (len_mask_gather_load<mode><mode>): Ditto.
7870 (len_mask_gather_load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
7871 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
7872 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
7873 (len_mask_scatter_store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
7874 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
7875 (len_mask_scatter_store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
7876 (len_mask_scatter_store<mode><mode>): Ditto.
7877 (len_mask_scatter_store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
7878 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Ditto.
7879 (ADJUST_NUNITS): Ditto.
7880 (ADJUST_ALIGNMENT): Ditto.
7881 (ADJUST_BYTESIZE): Ditto.
7882 (ADJUST_PRECISION): Ditto.
7884 (RVV_WHOLE_MODES): Ditto.
7885 (RVV_FRACT_MODE): Ditto.
7886 (RVV_NF8_MODES): Ditto.
7887 (RVV_NF4_MODES): Ditto.
7888 (VECTOR_MODES_WITH_PREFIX): Ditto.
7889 (VECTOR_MODE_WITH_PREFIX): Ditto.
7890 (RVV_TUPLE_MODES): Ditto.
7891 (RVV_NF2_MODES): Ditto.
7892 (RVV_TUPLE_PARTIAL_MODES): Ditto.
7893 * config/riscv/riscv-v.cc (struct mode_vtype_group): Ditto.
7895 (TUPLE_ENTRY): Ditto.
7899 (preferred_simd_mode): Ditto.
7900 (autovectorize_vector_modes): Ditto.
7901 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
7902 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
7910 (vint8mf8_t): Ditto.
7911 (vuint8mf8_t): Ditto.
7912 (vint8mf4_t): Ditto.
7913 (vuint8mf4_t): Ditto.
7914 (vint8mf2_t): Ditto.
7915 (vuint8mf2_t): Ditto.
7917 (vuint8m1_t): Ditto.
7919 (vuint8m2_t): Ditto.
7921 (vuint8m4_t): Ditto.
7923 (vuint8m8_t): Ditto.
7924 (vint16mf4_t): Ditto.
7925 (vuint16mf4_t): Ditto.
7926 (vint16mf2_t): Ditto.
7927 (vuint16mf2_t): Ditto.
7928 (vint16m1_t): Ditto.
7929 (vuint16m1_t): Ditto.
7930 (vint16m2_t): Ditto.
7931 (vuint16m2_t): Ditto.
7932 (vint16m4_t): Ditto.
7933 (vuint16m4_t): Ditto.
7934 (vint16m8_t): Ditto.
7935 (vuint16m8_t): Ditto.
7936 (vint32mf2_t): Ditto.
7937 (vuint32mf2_t): Ditto.
7938 (vint32m1_t): Ditto.
7939 (vuint32m1_t): Ditto.
7940 (vint32m2_t): Ditto.
7941 (vuint32m2_t): Ditto.
7942 (vint32m4_t): Ditto.
7943 (vuint32m4_t): Ditto.
7944 (vint32m8_t): Ditto.
7945 (vuint32m8_t): Ditto.
7946 (vint64m1_t): Ditto.
7947 (vuint64m1_t): Ditto.
7948 (vint64m2_t): Ditto.
7949 (vuint64m2_t): Ditto.
7950 (vint64m4_t): Ditto.
7951 (vuint64m4_t): Ditto.
7952 (vint64m8_t): Ditto.
7953 (vuint64m8_t): Ditto.
7954 (vfloat16mf4_t): Ditto.
7955 (vfloat16mf2_t): Ditto.
7956 (vfloat16m1_t): Ditto.
7957 (vfloat16m2_t): Ditto.
7958 (vfloat16m4_t): Ditto.
7959 (vfloat16m8_t): Ditto.
7960 (vfloat32mf2_t): Ditto.
7961 (vfloat32m1_t): Ditto.
7962 (vfloat32m2_t): Ditto.
7963 (vfloat32m4_t): Ditto.
7964 (vfloat32m8_t): Ditto.
7965 (vfloat64m1_t): Ditto.
7966 (vfloat64m2_t): Ditto.
7967 (vfloat64m4_t): Ditto.
7968 (vfloat64m8_t): Ditto.
7969 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
7970 (TUPLE_ENTRY): Ditto.
7971 * config/riscv/riscv-vsetvl.cc (change_insn): Ditto.
7972 * config/riscv/riscv.cc (riscv_valid_lo_sum_p): Ditto.
7973 (riscv_v_adjust_nunits): Ditto.
7974 (riscv_v_adjust_bytesize): Ditto.
7975 (riscv_v_adjust_precision): Ditto.
7976 (riscv_convert_vector_bits): Ditto.
7977 * config/riscv/riscv.h (riscv_v_adjust_nunits): Ditto.
7978 * config/riscv/riscv.md: Ditto.
7979 * config/riscv/vector-iterators.md: Ditto.
7980 * config/riscv/vector.md
7981 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
7982 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
7983 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
7984 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
7985 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
7986 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
7987 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
7988 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
7989 (@pred_indexed_<order>load<V1T:mode><VNX1_QHSDI:mode>): Ditto.
7990 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
7991 (@pred_indexed_<order>load<V2T:mode><VNX2_QHSDI:mode>): Ditto.
7992 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
7993 (@pred_indexed_<order>load<V4T:mode><VNX4_QHSDI:mode>): Ditto.
7994 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
7995 (@pred_indexed_<order>load<V8T:mode><VNX8_QHSDI:mode>): Ditto.
7996 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
7997 (@pred_indexed_<order>load<V16T:mode><VNX16_QHSI:mode>): Ditto.
7998 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
7999 (@pred_indexed_<order>load<V32T:mode><VNX32_QHI:mode>): Ditto.
8000 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
8001 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
8002 (@pred_indexed_<order>store<V1T:mode><VNX1_QHSDI:mode>): Ditto.
8003 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
8004 (@pred_indexed_<order>store<V2T:mode><VNX2_QHSDI:mode>): Ditto.
8005 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
8006 (@pred_indexed_<order>store<V4T:mode><VNX4_QHSDI:mode>): Ditto.
8007 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
8008 (@pred_indexed_<order>store<V8T:mode><VNX8_QHSDI:mode>): Ditto.
8009 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
8010 (@pred_indexed_<order>store<V16T:mode><VNX16_QHSI:mode>): Ditto.
8011 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
8012 (@pred_indexed_<order>store<V32T:mode><VNX32_QHI:mode>): Ditto.
8013 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
8015 2023-07-19 Vladimir N. Makarov <vmakarov@redhat.com>
8017 * lra-int.h (lra_update_fp2sp_elimination): New prototype.
8018 (lra_asm_insn_error): New prototype.
8019 * lra-spills.cc (remove_pseudos): Add check for pseudo slot memory
8021 (lra_spill): Call lra_update_fp2sp_elimination.
8022 * lra-eliminations.cc: Remove trailing spaces.
8023 (elimination_fp2sp_occured_p): New static flag.
8024 (lra_eliminate_regs_1): Set the flag up.
8025 (update_reg_eliminate): Modify the assert for stack to frame
8026 pointer elimination.
8027 (lra_update_fp2sp_elimination): New function.
8028 (lra_eliminate): Clear flag elimination_fp2sp_occured_p.
8030 2023-07-19 Andrew Carlotti <andrew.carlotti@arm.com>
8032 * config/aarch64/aarch64.h (TARGET_MEMTAG): Remove armv8.5
8034 * config/aarch64/arm_acle.h: Remove unnecessary armv8.x
8035 dependencies from target pragmas.
8036 * config/aarch64/arm_fp16.h (target): Likewise.
8037 * config/aarch64/arm_neon.h (target): Likewise.
8039 2023-07-19 Andrew Pinski <apinski@marvell.com>
8041 PR tree-optimization/110252
8042 * tree-ssa-phiopt.cc (class auto_flow_sensitive): New class.
8043 (auto_flow_sensitive::auto_flow_sensitive): New constructor.
8044 (auto_flow_sensitive::~auto_flow_sensitive): New deconstructor.
8045 (match_simplify_replacement): Temporarily
8046 remove the flow sensitive info on the two statements that might
8049 2023-07-19 Andrew Pinski <apinski@marvell.com>
8051 * gimple-fold.cc (fosa_unwind): Replace `vrange_storage *`
8052 with flow_sensitive_info_storage.
8053 (follow_outer_ssa_edges): Update how to save off the flow
8055 (maybe_fold_comparisons_from_match_pd): Update restoring
8056 of flow sensitive info.
8057 * tree-ssanames.cc (flow_sensitive_info_storage::save): New method.
8058 (flow_sensitive_info_storage::restore): New method.
8059 (flow_sensitive_info_storage::save_and_clear): New method.
8060 (flow_sensitive_info_storage::clear_storage): New method.
8061 * tree-ssanames.h (class flow_sensitive_info_storage): New class.
8063 2023-07-19 Andrew Pinski <apinski@marvell.com>
8065 PR tree-optimization/110726
8066 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)):
8067 Add checks to make sure the type was one bit precision
8070 2023-07-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8072 * doc/md.texi: Add mask_len_fold_left_plus.
8073 * internal-fn.cc (mask_len_fold_left_direct): Ditto.
8074 (expand_mask_len_fold_left_optab_fn): Ditto.
8075 (direct_mask_len_fold_left_optab_supported_p): Ditto.
8076 * internal-fn.def (MASK_LEN_FOLD_LEFT_PLUS): Ditto.
8077 * optabs.def (OPTAB_D): Ditto.
8079 2023-07-19 Jakub Jelinek <jakub@redhat.com>
8081 * tree-switch-conversion.h (class bit_test_cluster): Fix comment typo.
8083 2023-07-19 Jakub Jelinek <jakub@redhat.com>
8085 PR tree-optimization/110731
8086 * wide-int.cc (wi::divmod_internal): Always unpack dividend and
8087 divisor as UNSIGNED regardless of sgn.
8089 2023-07-19 Lehua Ding <lehua.ding@rivai.ai>
8091 * common/config/riscv/riscv-common.cc (riscv_supported_std_ext): Init.
8092 (standard_extensions_p): Add check.
8093 (riscv_subset_list::add): Just return NULL if it failed before.
8094 (riscv_subset_list::parse_std_ext): Continue parse when find a error
8095 (riscv_subset_list::parse): Just return NULL if it failed before.
8096 * config/riscv/riscv-subset.h (class riscv_subset_list): Add field.
8098 2023-07-19 Jan Beulich <jbeulich@suse.com>
8100 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
8102 (ix86_expand_vector_extract): Use gen_vec_extract_lo /
8104 (expand_vec_perm_broadcast_1): Use gen_vec_interleave_high /
8105 gen_vec_interleave_low. Rename local variable.
8107 2023-07-19 Jan Beulich <jbeulich@suse.com>
8109 * config/i386/sse.md (vec_dupv2df<mask_name>): Add new AVX512F
8110 alternative. Move AVX512VL part of condition to new "enabled"
8113 2023-07-19 liuhongt <hongtao.liu@intel.com>
8116 * config/i386/i386-builtins.cc
8117 (ix86_register_float16_builtin_type): Remove TARGET_SSE2.
8118 (ix86_register_bf16_builtin_type): Ditto.
8119 * config/i386/i386-c.cc (ix86_target_macros): When TARGET_SSE2
8120 isn't available, undef the macros which are used to check the
8121 backend support of the _Float16/__bf16 types when building
8122 libstdc++ and libgcc.
8123 * config/i386/i386.cc (construct_container): Issue errors for
8124 HFmode/BFmode when TARGET_SSE2 is not available.
8125 (function_value_32): Ditto.
8126 (ix86_scalar_mode_supported_p): Remove TARGET_SSE2 for HFmode/BFmode.
8127 (ix86_libgcc_floating_mode_supported_p): Ditto.
8128 (ix86_emit_support_tinfos): Adjust codes.
8129 (ix86_invalid_conversion): Return diagnostic message string
8130 when there's conversion from/to BF/HFmode w/o TARGET_SSE2.
8131 (ix86_invalid_unary_op): New function.
8132 (ix86_invalid_binary_op): Ditto.
8133 (TARGET_INVALID_UNARY_OP): Define.
8134 (TARGET_INVALID_BINARY_OP): Define.
8135 * config/i386/immintrin.h [__SSE2__]: Remove for fp16/bf16
8136 related instrinsics header files.
8137 * config/i386/i386.h (VALID_SSE2_TYPE_MODE): New macro.
8139 2023-07-18 Uros Bizjak <ubizjak@gmail.com>
8141 * dwarf2asm.cc: Change FALSE to false.
8142 * dwarf2cfi.cc (execute_dwarf2_frame): Change return type to void.
8143 * dwarf2out.cc (matches_main_base): Change return type from
8144 int to bool. Change "last_match" variable to bool.
8145 (dump_struct_debug): Change return type from int to bool.
8146 Change "matches" and "result" function arguments to bool.
8147 (is_pseudo_reg): Change return type from int to bool.
8148 (is_tagged_type): Ditto.
8149 (same_loc_p): Ditto.
8150 (same_dw_val_p): Change return type from int to bool and adjust
8151 function body accordingly.
8152 (same_attr_p): Ditto.
8153 (same_die_p): Ditto.
8154 (is_type_die): Ditto.
8155 (is_declaration_die): Ditto.
8156 (should_move_die_to_comdat): Ditto.
8157 (is_base_type): Ditto.
8158 (is_based_loc): Ditto.
8159 (local_scope_p): Ditto.
8160 (class_scope_p): Ditto.
8161 (class_or_namespace_scope_p): Ditto.
8162 (is_tagged_type): Ditto.
8163 (is_rust): Use void argument.
8164 (is_nested_in_subprogram): Change return type from int to bool.
8165 (contains_subprogram_definition): Ditto.
8166 (gen_struct_or_union_type_die): Change "nested", "complete"
8167 and "ns_decl" variables to bool.
8168 (is_naming_typedef_decl): Change FALSE to false.
8170 2023-07-18 Jan Hubicka <jh@suse.cz>
8172 * tree-ssa-loop-ch.cc (edge_range_query): Take loop argument; be ready
8173 for queries not in headers.
8174 (static_loop_exit): Add basic blck parameter; update use of
8176 (should_duplicate_loop_header_p): Add ranger and static_exits
8177 parameter. Do not account statements that will be optimized
8178 out after duplicaiton in overall size. Add ranger query to
8180 (update_profile_after_ch): Take static_exits has set instead of
8181 single eliminated_edge.
8182 (ch_base::copy_headers): Do all analysis in the first pass;
8183 remember invariant_exits and static_exits.
8185 2023-07-18 Jason Merrill <jason@redhat.com>
8187 * fold-const.cc (native_interpret_aggregate): Skip empty fields.
8189 2023-07-18 Gaius Mulley <gaiusmod2@gmail.com>
8191 * doc/gm2.texi (Semantic checking): Change example testwithptr
8194 2023-07-18 Richard Biener <rguenther@suse.de>
8196 PR middle-end/105715
8197 * gimple-isel.cc (gimple_expand_vec_exprs): Merge into...
8198 (pass_gimple_isel::execute): ... this. Duplicate
8199 comparison defs of COND_EXPRs.
8201 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8203 * config/riscv/riscv-selftests.cc (run_poly_int_selftests): Add more selftests.
8204 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Dynamic adjust size of VLA vectors.
8205 (riscv_convert_vector_bits): Ditto.
8207 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8209 * config/riscv/autovec.md (vec_shl_insert_<mode>): New patterns.
8210 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix bugs.
8212 2023-07-18 Juergen Christ <jchrist@linux.ibm.com>
8214 * config/s390/vx-builtins.md: New vsel pattern.
8216 2023-07-18 liuhongt <hongtao.liu@intel.com>
8219 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>):
8220 Remove # from assemble output.
8222 2023-07-18 liuhongt <hongtao.liu@intel.com>
8225 * config/i386/sync.md (cmpccxadd_<mode>): Adjust the pattern
8226 to explicitly set FLAGS_REG like *cmp<mode>_1, also add extra
8227 3 define_peephole2 after the pattern.
8229 2023-07-18 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8231 * rtl-ssa/internals.inl: Fix when mode1 and mode2 are not ordred.
8233 2023-07-18 Pan Li <pan2.li@intel.com>
8234 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8236 * config/riscv/riscv.cc (struct machine_function): Add new field.
8237 (riscv_static_frm_mode_p): New function.
8238 (riscv_emit_frm_mode_set): New function for emit FRM.
8239 (riscv_emit_mode_set): Extract function for FRM.
8240 (riscv_mode_needed): Fix the TODO.
8241 (riscv_mode_entry): Initial dynamic frm RTL.
8242 (riscv_mode_exit): Return DYN_EXIT.
8243 * config/riscv/riscv.md: Add rdfrm.
8244 * config/riscv/vector-iterators.md (unspecv): Add DYN_EXIT unspecv.
8245 * config/riscv/vector.md (frm_modee): Add new mode dyn_exit.
8247 (fsrmsi_backup): New pattern for swap.
8248 (fsrmsi_restore): New pattern for restore.
8249 (fsrmsi_restore_exit): New pattern for restore exit.
8250 (frrmsi): New pattern for backup.
8252 2023-07-17 Arsen Arsenović <arsen@aarsen.me>
8254 * doc/extend.texi: Add @cindex on __auto_type.
8256 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
8258 * combine-stack-adj.cc (stack_memref_p): Change return type from
8259 int to bool and adjust function body accordingly.
8260 (rest_of_handle_stack_adjustments): Change return type to void.
8262 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
8264 * combine.cc (struct reg_stat_type): Change last_set_invalid to bool.
8265 (cant_combine_insn_p): Change return type from int to bool and adjust
8266 function body accordingly.
8267 (can_combine_p): Ditto.
8268 (combinable_i3pat): Ditto. Change "i1_not_in_src" and "i0_not_in_src"
8269 function arguments from int to bool.
8270 (contains_muldiv): Change return type from int to bool and adjust
8271 function body accordingly.
8272 (try_combine): Ditto. Change "new_direct_jump" pointer function
8273 argument from int to bool. Change "substed_i2", "substed_i1",
8274 "substed_i0", "added_sets_0", "added_sets_1", "added_sets_2",
8275 "i2dest_in_i2src", "i1dest_in_i1src", "i2dest_in_i1src",
8276 "i0dest_in_i0src", "i1dest_in_i0src", "i2dest_in_i0src",
8277 "i2dest_killed", "i1dest_killed", "i0dest_killed", "i1_feeds_i2_n",
8278 "i0_feeds_i2_n", "i0_feeds_i1_n", "i3_subst_into_i2", "have_mult",
8279 "swap_i2i3", "split_i2i3" and "changed_i3_dest" variables
8281 (subst): Change "in_dest", "in_cond" and "unique_copy" function
8282 arguments from int to bool.
8283 (combine_simplify_rtx): Change "in_dest" and "in_cond" function
8284 arguments from int to bool.
8285 (make_extraction): Change "unsignedp", "in_dest" and "in_compare"
8286 function argument from int to bool.
8287 (force_int_to_mode): Change "just_select" function argument
8288 from int to bool. Change "next_select" variable to bool.
8289 (rtx_equal_for_field_assignment_p): Change return type from
8290 int to bool and adjust function body accordingly.
8291 (merge_outer_ops): Ditto. Change "pcomp_p" pointer function
8292 argument from int to bool.
8293 (get_last_value_validate): Change return type from int to bool
8294 and adjust function body accordingly.
8295 (reg_dead_at_p): Ditto.
8296 (reg_bitfield_target_p): Ditto.
8297 (combine_instructions): Ditto. Change "new_direct_jump"
8299 (can_combine_p): Change return type from int to bool
8300 and adjust function body accordingly.
8301 (likely_spilled_retval_p): Ditto.
8302 (can_change_dest_mode): Change "added_sets" function argument
8304 (find_split_point): Change "unsignedp" variable to bool.
8305 (simplify_if_then_else): Change "comparison_p" and "swapped"
8307 (simplify_set): Change "other_changed" variable to bool.
8308 (expand_compound_operation): Change "unsignedp" variable to bool.
8309 (force_to_mode): Change "just_select" function argument
8310 from int to bool. Change "next_select" variable to bool.
8311 (extended_count): Change "unsignedp" function argument to bool.
8312 (simplify_shift_const_1): Change "complement_p" variable to bool.
8313 (simplify_comparison): Change "changed" variable to bool.
8314 (rest_of_handle_combine): Change return type to void.
8316 2023-07-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
8319 * Makefile.in (INTERNAL_FN_H): Add insn-opinit.h.
8321 2023-07-17 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
8323 * ira.cc (setup_reg_class_relations): Continue
8324 if regclass cl3 is hard_reg_set_empty_p.
8326 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8328 * config/riscv/riscv.cc (riscv_option_override): Add sorry check.
8330 2023-07-17 Martin Jambor <mjambor@suse.cz>
8332 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Remove unused variable
8335 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
8337 * tree-ssa-ccp.cc (ccp_finalize): Export value/mask known bits.
8339 2023-07-17 Lehua Ding <lehua.ding@rivai.ai>
8342 * common/config/riscv/riscv-common.cc (riscv_subset_list::handle_implied_ext):
8343 recur add all implied extensions.
8344 (riscv_subset_list::check_implied_ext): Add new method.
8345 (riscv_subset_list::parse): Call checker check_implied_ext.
8346 * config/riscv/riscv-subset.h: Add new method.
8348 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8350 * config/riscv/autovec.md (reduc_plus_scal_<mode>): New pattern.
8351 (reduc_smax_scal_<mode>): Ditto.
8352 (reduc_umax_scal_<mode>): Ditto.
8353 (reduc_smin_scal_<mode>): Ditto.
8354 (reduc_umin_scal_<mode>): Ditto.
8355 (reduc_and_scal_<mode>): Ditto.
8356 (reduc_ior_scal_<mode>): Ditto.
8357 (reduc_xor_scal_<mode>): Ditto.
8358 * config/riscv/riscv-protos.h (enum insn_type): Add reduction.
8359 (expand_reduction): New function.
8360 * config/riscv/riscv-v.cc (emit_vlmax_reduction_insn): Ditto.
8361 (emit_vlmax_fp_reduction_insn): Ditto.
8362 (get_m1_mode): Ditto.
8363 (expand_cond_len_binop): Fix name.
8364 (expand_reduction): New function
8365 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Fix VSETVL BUG.
8366 (validate_change_or_fail): New function.
8367 (change_insn): Fix VSETVL BUG.
8368 (change_vsetvl_insn): Ditto.
8369 (pass_vsetvl::backward_demand_fusion): Ditto.
8370 (pass_vsetvl::df_post_optimization): Ditto.
8372 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
8374 * ipa-prop.cc (ipcp_update_bits): Export value/mask known bits.
8376 2023-07-17 Christoph Müllner <christoph.muellner@vrull.eu>
8378 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p):
8379 Remove parameter name from declaration of unused parameter.
8381 2023-07-17 Kewen Lin <linkw@linux.ibm.com>
8383 PR tree-optimization/110652
8384 * tree-vect-stmts.cc (vectorizable_load): Initialize new_temp as
8387 2023-07-17 Richard Biener <rguenther@suse.de>
8389 PR tree-optimization/110669
8390 * tree-scalar-evolution.cc (analyze_and_compute_bitop_with_inv_effect):
8391 Check we matched a header PHI.
8393 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
8395 * tree-ssanames.cc (set_bitmask): New.
8396 * tree-ssanames.h (set_bitmask): New.
8398 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
8400 * value-range.cc (irange_bitmask::verify_mask): Mask need not be
8402 * value-range.h (irange_bitmask::union_): Normalize beforehand.
8403 (irange_bitmask::intersect): Same.
8405 2023-07-17 Andrew Pinski <apinski@marvell.com>
8407 PR tree-optimization/95923
8408 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)): New transformation.
8410 2023-07-17 Roger Sayle <roger@nextmovesoftware.com>
8412 * tree-if-conv.cc (predicate_scalar_phi): Make the arguments
8413 to the std::sort comparison lambda function const.
8415 2023-07-17 Andrew Pinski <apinski@marvell.com>
8417 PR tree-optimization/110666
8418 * match.pd (A NEEQ (A NEEQ CST)): Fix Outer EQ case.
8420 2023-07-17 Mo, Zewei <zewei.mo@intel.com>
8422 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Lunar Lake,
8423 Arrow Lake and Arrow Lake S.
8424 * common/config/i386/i386-common.cc:
8425 (processor_name): Add arrowlake.
8426 (processor_alias_table): Add arrow lake, arrow lake s and lunar
8428 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
8429 Add INTEL_COREI7_ARROWLAKE and INTEL_COREI7_ARROWLAKE_S.
8430 * config.gcc: Add -march=arrowlake and -march=arrowlake-s.
8431 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
8433 * config/i386/i386-c.cc (ix86_target_macros_internal): Add
8435 * config/i386/i386-options.cc (m_ARROWLAKE): New.
8436 (processor_cost_table): Add arrowlake.
8437 * config/i386/i386.h (enum processor_type):
8438 Add PROCESSOR_ARROWLAKE.
8439 * config/i386/x86-tune.def: Add m_ARROWLAKE.
8440 * doc/extend.texi: Add arrowlake and arrowlake-s.
8441 * doc/invoke.texi: Ditto.
8443 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
8445 * config/i386/sse.md (VI2_AVX2): Delete V32HI since we actually
8446 have the same iterator. Also renaming all the occurence to
8448 (usdot_prod<mode>): New define_expand.
8449 (udot_prod<mode>): Ditto.
8451 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
8453 * common/config/i386/cpuinfo.h (get_available_features):
8455 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM4_SET,
8456 OPTION_MASK_ISA2_SM4_UNSET): New.
8457 (OPTION_MASK_ISA2_AVX_UNSET): Add SM4.
8458 (ix86_handle_option): Handle -msm4.
8459 * common/config/i386/i386-cpuinfo.h (enum processor_features):
8461 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
8463 * config.gcc: Add sm4intrin.h.
8464 * config/i386/cpuid.h (bit_SM4): New.
8465 * config/i386/i386-builtin.def (BDESC): Add new builtins.
8466 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
8468 * config/i386/i386-isa.def (SM4): Add DEF_PTA(SM4).
8469 * config/i386/i386-options.cc (isa2_opts): Add -msm4.
8470 (ix86_valid_target_attribute_inner_p): Handle sm4.
8471 * config/i386/i386.opt: Add option -msm4.
8472 * config/i386/immintrin.h: Include sm4intrin.h
8473 * config/i386/sse.md (vsm4key4_<mode>): New define insn.
8474 (vsm4rnds4_<mode>): Ditto.
8475 * doc/extend.texi: Document sm4.
8476 * doc/invoke.texi: Document -msm4.
8477 * doc/sourcebuild.texi: Document target sm4.
8478 * config/i386/sm4intrin.h: New file.
8480 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
8482 * common/config/i386/cpuinfo.h (get_available_features):
8484 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SHA512_SET,
8485 OPTION_MASK_ISA2_SHA512_UNSET): New.
8486 (OPTION_MASK_ISA2_AVX_UNSET): Add SHA512.
8487 (ix86_handle_option): Handle -msha512.
8488 * common/config/i386/i386-cpuinfo.h (enum processor_features):
8490 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
8492 * config.gcc: Add sha512intrin.h.
8493 * config/i386/cpuid.h (bit_SHA512): New.
8494 * config/i386/i386-builtin-types.def:
8495 Add DEF_FUNCTION_TYPE (V4DI, V4DI, V4DI, V2DI).
8496 * config/i386/i386-builtin.def (BDESC): Add new builtins.
8497 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
8499 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
8500 V4DI_FTYPE_V4DI_V4DI_V2DI and V4DI_FTYPE_V4DI_V2DI.
8501 * config/i386/i386-isa.def (SHA512): Add DEF_PTA(SHA512).
8502 * config/i386/i386-options.cc (isa2_opts): Add -msha512.
8503 (ix86_valid_target_attribute_inner_p): Handle sha512.
8504 * config/i386/i386.opt: Add option -msha512.
8505 * config/i386/immintrin.h: Include sha512intrin.h.
8506 * config/i386/sse.md (vsha512msg1): New define insn.
8507 (vsha512msg2): Ditto.
8508 (vsha512rnds2): Ditto.
8509 * doc/extend.texi: Document sha512.
8510 * doc/invoke.texi: Document -msha512.
8511 * doc/sourcebuild.texi: Document target sha512.
8512 * config/i386/sha512intrin.h: New file.
8514 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
8516 * common/config/i386/cpuinfo.h (get_available_features):
8518 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM3_SET,
8519 OPTION_MASK_ISA2_SM3_UNSET): New.
8520 (OPTION_MASK_ISA2_AVX_UNSET): Add SM3.
8521 (ix86_handle_option): Handle -msm3.
8522 * common/config/i386/i386-cpuinfo.h (enum processor_features):
8524 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
8526 * config.gcc: Add sm3intrin.h
8527 * config/i386/cpuid.h (bit_SM3): New.
8528 * config/i386/i386-builtin-types.def:
8529 Add DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, V4SI, INT).
8530 * config/i386/i386-builtin.def (BDESC): Add new builtins.
8531 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
8533 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
8534 V4SI_FTYPE_V4SI_V4SI_V4SI_INT.
8535 * config/i386/i386-isa.def (SM3): Add DEF_PTA(SM3).
8536 * config/i386/i386-options.cc (isa2_opts): Add -msm3.
8537 (ix86_valid_target_attribute_inner_p): Handle sm3.
8538 * config/i386/i386.opt: Add option -msm3.
8539 * config/i386/immintrin.h: Include sm3intrin.h.
8540 * config/i386/sse.md (vsm3msg1): New define insn.
8543 * doc/extend.texi: Document sm3.
8544 * doc/invoke.texi: Document -msm3.
8545 * doc/sourcebuild.texi: Document target sm3.
8546 * config/i386/sm3intrin.h: New file.
8548 2023-07-17 Kong Lingling <lingling.kong@intel.com>
8549 Haochen Jiang <haochen.jiang@intel.com>
8551 * common/config/i386/cpuinfo.h (get_available_features): Detect
8553 * common/config/i386/i386-common.cc
8554 (OPTION_MASK_ISA2_AVXVNNIINT16_SET): New.
8555 (OPTION_MASK_ISA2_AVXVNNIINT16_UNSET): Ditto.
8556 (ix86_handle_option): Handle -mavxvnniint16.
8557 * common/config/i386/i386-cpuinfo.h (enum processor_features):
8558 Add FEATURE_AVXVNNIINT16.
8559 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
8561 * config.gcc: Add avxvnniint16.h.
8562 * config/i386/avxvnniint16intrin.h: New file.
8563 * config/i386/cpuid.h (bit_AVXVNNIINT16): New.
8564 * config/i386/i386-builtin.def: Add new builtins.
8565 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
8567 * config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint16.
8568 (ix86_valid_target_attribute_inner_p): Handle avxvnniint16intrin.h.
8569 * config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT16).
8570 * config/i386/i386.opt: Add option -mavxvnniint16.
8571 * config/i386/immintrin.h: Include avxvnniint16.h.
8572 * config/i386/sse.md
8573 (vpdp<vpdpwprodtype>_<mode>): New define_insn.
8574 * doc/extend.texi: Document avxvnniint16.
8575 * doc/invoke.texi: Document -mavxvnniint16.
8576 * doc/sourcebuild.texi: Document target avxvnniint16.
8578 2023-07-16 Jan Hubicka <jh@suse.cz>
8580 PR middle-end/110649
8581 * tree-vect-loop.cc (scale_profile_for_vect_loop): Rewrite.
8582 (vect_transform_loop): Move scale_profile_for_vect_loop after
8583 upper bound updates.
8585 2023-07-16 Jan Hubicka <jh@suse.cz>
8587 PR tree-optimization/110649
8588 * tree-vect-loop.cc (optimize_mask_stores): Set correctly
8589 probability of the if-then-else construct.
8591 2023-07-16 Jan Hubicka <jh@suse.cz>
8593 PR middle-end/110649
8594 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Avoid double profile update.
8596 2023-07-15 Andrew Pinski <apinski@marvell.com>
8598 * doc/contrib.texi: Update my entry.
8600 2023-07-15 John David Anglin <danglin@gcc.gnu.org>
8602 * config/pa/pa.md: Define constants R1_REGNUM, R19_REGNUM and
8604 (tgd_load): Restrict to !TARGET_64BIT. Use register constants.
8605 (tld_load): Likewise.
8606 (tgd_load_pic): Change to expander.
8607 (tld_load_pic, tld_offset_load, tp_load): Likewise.
8608 (tie_load_pic, tle_load): Likewise.
8609 (tgd_load_picsi, tgd_load_picdi): New.
8610 (tld_load_picsi, tld_load_picdi): New.
8611 (tld_offset_load<P:mode>): New.
8612 (tp_load<P:mode>): New.
8613 (tie_load_picsi, tie_load_picdi): New.
8614 (tle_load<P:mode>): New.
8616 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
8618 * config/arm/arm-mve-builtins-base.cc (vcmlaq, vcmlaq_rot90)
8619 (vcmlaq_rot180, vcmlaq_rot270): New.
8620 * config/arm/arm-mve-builtins-base.def (vcmlaq, vcmlaq_rot90)
8621 (vcmlaq_rot180, vcmlaq_rot270): New.
8622 * config/arm/arm-mve-builtins-base.h: (vcmlaq, vcmlaq_rot90)
8623 (vcmlaq_rot180, vcmlaq_rot270): New.
8624 * config/arm/arm-mve-builtins.cc
8625 (function_instance::has_inactive_argument): Handle vcmlaq,
8626 vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270.
8627 * config/arm/arm_mve.h (vcmlaq): Delete.
8628 (vcmlaq_rot180): Delete.
8629 (vcmlaq_rot270): Delete.
8630 (vcmlaq_rot90): Delete.
8632 (vcmlaq_rot180_m): Delete.
8633 (vcmlaq_rot270_m): Delete.
8634 (vcmlaq_rot90_m): Delete.
8635 (vcmlaq_f16): Delete.
8636 (vcmlaq_rot180_f16): Delete.
8637 (vcmlaq_rot270_f16): Delete.
8638 (vcmlaq_rot90_f16): Delete.
8639 (vcmlaq_f32): Delete.
8640 (vcmlaq_rot180_f32): Delete.
8641 (vcmlaq_rot270_f32): Delete.
8642 (vcmlaq_rot90_f32): Delete.
8643 (vcmlaq_m_f32): Delete.
8644 (vcmlaq_m_f16): Delete.
8645 (vcmlaq_rot180_m_f32): Delete.
8646 (vcmlaq_rot180_m_f16): Delete.
8647 (vcmlaq_rot270_m_f32): Delete.
8648 (vcmlaq_rot270_m_f16): Delete.
8649 (vcmlaq_rot90_m_f32): Delete.
8650 (vcmlaq_rot90_m_f16): Delete.
8651 (__arm_vcmlaq_f16): Delete.
8652 (__arm_vcmlaq_rot180_f16): Delete.
8653 (__arm_vcmlaq_rot270_f16): Delete.
8654 (__arm_vcmlaq_rot90_f16): Delete.
8655 (__arm_vcmlaq_f32): Delete.
8656 (__arm_vcmlaq_rot180_f32): Delete.
8657 (__arm_vcmlaq_rot270_f32): Delete.
8658 (__arm_vcmlaq_rot90_f32): Delete.
8659 (__arm_vcmlaq_m_f32): Delete.
8660 (__arm_vcmlaq_m_f16): Delete.
8661 (__arm_vcmlaq_rot180_m_f32): Delete.
8662 (__arm_vcmlaq_rot180_m_f16): Delete.
8663 (__arm_vcmlaq_rot270_m_f32): Delete.
8664 (__arm_vcmlaq_rot270_m_f16): Delete.
8665 (__arm_vcmlaq_rot90_m_f32): Delete.
8666 (__arm_vcmlaq_rot90_m_f16): Delete.
8667 (__arm_vcmlaq): Delete.
8668 (__arm_vcmlaq_rot180): Delete.
8669 (__arm_vcmlaq_rot270): Delete.
8670 (__arm_vcmlaq_rot90): Delete.
8671 (__arm_vcmlaq_m): Delete.
8672 (__arm_vcmlaq_rot180_m): Delete.
8673 (__arm_vcmlaq_rot270_m): Delete.
8674 (__arm_vcmlaq_rot90_m): Delete.
8676 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
8678 * config/arm/arm_mve_builtins.def (vcmlaq_rot90_f)
8679 (vcmlaq_rot270_f, vcmlaq_rot180_f, vcmlaq_f): Add "_f" suffix.
8680 * config/arm/iterators.md (MVE_VCMLAQ_M): New.
8681 (mve_insn): Add vcmla.
8682 (rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
8684 (mve_rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
8686 * config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Rename into ...
8687 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this.
8688 (mve_vcmlaq_m_f<mode>, mve_vcmlaq_rot180_m_f<mode>)
8689 (mve_vcmlaq_rot270_m_f<mode>, mve_vcmlaq_rot90_m_f<mode>): Merge
8691 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
8693 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
8695 * config/arm/arm-mve-builtins-base.cc (vcmulq, vcmulq_rot90)
8696 (vcmulq_rot180, vcmulq_rot270): New.
8697 * config/arm/arm-mve-builtins-base.def (vcmulq, vcmulq_rot90)
8698 (vcmulq_rot180, vcmulq_rot270): New.
8699 * config/arm/arm-mve-builtins-base.h: (vcmulq, vcmulq_rot90)
8700 (vcmulq_rot180, vcmulq_rot270): New.
8701 * config/arm/arm_mve.h (vcmulq_rot90): Delete.
8702 (vcmulq_rot270): Delete.
8703 (vcmulq_rot180): Delete.
8706 (vcmulq_rot180_m): Delete.
8707 (vcmulq_rot270_m): Delete.
8708 (vcmulq_rot90_m): Delete.
8710 (vcmulq_rot90_x): Delete.
8711 (vcmulq_rot180_x): Delete.
8712 (vcmulq_rot270_x): Delete.
8713 (vcmulq_rot90_f16): Delete.
8714 (vcmulq_rot270_f16): Delete.
8715 (vcmulq_rot180_f16): Delete.
8716 (vcmulq_f16): Delete.
8717 (vcmulq_rot90_f32): Delete.
8718 (vcmulq_rot270_f32): Delete.
8719 (vcmulq_rot180_f32): Delete.
8720 (vcmulq_f32): Delete.
8721 (vcmulq_m_f32): Delete.
8722 (vcmulq_m_f16): Delete.
8723 (vcmulq_rot180_m_f32): Delete.
8724 (vcmulq_rot180_m_f16): Delete.
8725 (vcmulq_rot270_m_f32): Delete.
8726 (vcmulq_rot270_m_f16): Delete.
8727 (vcmulq_rot90_m_f32): Delete.
8728 (vcmulq_rot90_m_f16): Delete.
8729 (vcmulq_x_f16): Delete.
8730 (vcmulq_x_f32): Delete.
8731 (vcmulq_rot90_x_f16): Delete.
8732 (vcmulq_rot90_x_f32): Delete.
8733 (vcmulq_rot180_x_f16): Delete.
8734 (vcmulq_rot180_x_f32): Delete.
8735 (vcmulq_rot270_x_f16): Delete.
8736 (vcmulq_rot270_x_f32): Delete.
8737 (__arm_vcmulq_rot90_f16): Delete.
8738 (__arm_vcmulq_rot270_f16): Delete.
8739 (__arm_vcmulq_rot180_f16): Delete.
8740 (__arm_vcmulq_f16): Delete.
8741 (__arm_vcmulq_rot90_f32): Delete.
8742 (__arm_vcmulq_rot270_f32): Delete.
8743 (__arm_vcmulq_rot180_f32): Delete.
8744 (__arm_vcmulq_f32): Delete.
8745 (__arm_vcmulq_m_f32): Delete.
8746 (__arm_vcmulq_m_f16): Delete.
8747 (__arm_vcmulq_rot180_m_f32): Delete.
8748 (__arm_vcmulq_rot180_m_f16): Delete.
8749 (__arm_vcmulq_rot270_m_f32): Delete.
8750 (__arm_vcmulq_rot270_m_f16): Delete.
8751 (__arm_vcmulq_rot90_m_f32): Delete.
8752 (__arm_vcmulq_rot90_m_f16): Delete.
8753 (__arm_vcmulq_x_f16): Delete.
8754 (__arm_vcmulq_x_f32): Delete.
8755 (__arm_vcmulq_rot90_x_f16): Delete.
8756 (__arm_vcmulq_rot90_x_f32): Delete.
8757 (__arm_vcmulq_rot180_x_f16): Delete.
8758 (__arm_vcmulq_rot180_x_f32): Delete.
8759 (__arm_vcmulq_rot270_x_f16): Delete.
8760 (__arm_vcmulq_rot270_x_f32): Delete.
8761 (__arm_vcmulq_rot90): Delete.
8762 (__arm_vcmulq_rot270): Delete.
8763 (__arm_vcmulq_rot180): Delete.
8764 (__arm_vcmulq): Delete.
8765 (__arm_vcmulq_m): Delete.
8766 (__arm_vcmulq_rot180_m): Delete.
8767 (__arm_vcmulq_rot270_m): Delete.
8768 (__arm_vcmulq_rot90_m): Delete.
8769 (__arm_vcmulq_x): Delete.
8770 (__arm_vcmulq_rot90_x): Delete.
8771 (__arm_vcmulq_rot180_x): Delete.
8772 (__arm_vcmulq_rot270_x): Delete.
8774 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
8776 * config/arm/arm_mve_builtins.def (vcmulq_rot90_f)
8777 (vcmulq_rot270_f, vcmulq_rot180_f, vcmulq_f): Add "_f" suffix.
8778 * config/arm/iterators.md (MVE_VCADDQ_VCMULQ)
8779 (MVE_VCADDQ_VCMULQ_M): New.
8780 (mve_insn): Add vcmul.
8781 (rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
8784 (mve_rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
8786 * config/arm/mve.md (mve_vcmulq<mve_rot><mode>): Merge into
8787 @mve_<mve_insn>q<mve_rot>_f<mode>.
8788 (mve_vcmulq_m_f<mode>, mve_vcmulq_rot180_m_f<mode>)
8789 (mve_vcmulq_rot270_m_f<mode>, mve_vcmulq_rot90_m_f<mode>): Merge
8790 into @mve_<mve_insn>q<mve_rot>_m_f<mode>.
8792 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
8794 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90)
8795 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
8796 * config/arm/arm-mve-builtins-base.def (vcaddq_rot90)
8797 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
8798 * config/arm/arm-mve-builtins-base.h: (vcaddq_rot90)
8799 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
8800 * config/arm/arm-mve-builtins-functions.h (class
8801 unspec_mve_function_exact_insn_rot): New.
8802 * config/arm/arm_mve.h (vcaddq_rot90): Delete.
8803 (vcaddq_rot270): Delete.
8804 (vhcaddq_rot90): Delete.
8805 (vhcaddq_rot270): Delete.
8806 (vcaddq_rot270_m): Delete.
8807 (vcaddq_rot90_m): Delete.
8808 (vhcaddq_rot270_m): Delete.
8809 (vhcaddq_rot90_m): Delete.
8810 (vcaddq_rot90_x): Delete.
8811 (vcaddq_rot270_x): Delete.
8812 (vhcaddq_rot90_x): Delete.
8813 (vhcaddq_rot270_x): Delete.
8814 (vcaddq_rot90_u8): Delete.
8815 (vcaddq_rot270_u8): Delete.
8816 (vhcaddq_rot90_s8): Delete.
8817 (vhcaddq_rot270_s8): Delete.
8818 (vcaddq_rot90_s8): Delete.
8819 (vcaddq_rot270_s8): Delete.
8820 (vcaddq_rot90_u16): Delete.
8821 (vcaddq_rot270_u16): Delete.
8822 (vhcaddq_rot90_s16): Delete.
8823 (vhcaddq_rot270_s16): Delete.
8824 (vcaddq_rot90_s16): Delete.
8825 (vcaddq_rot270_s16): Delete.
8826 (vcaddq_rot90_u32): Delete.
8827 (vcaddq_rot270_u32): Delete.
8828 (vhcaddq_rot90_s32): Delete.
8829 (vhcaddq_rot270_s32): Delete.
8830 (vcaddq_rot90_s32): Delete.
8831 (vcaddq_rot270_s32): Delete.
8832 (vcaddq_rot90_f16): Delete.
8833 (vcaddq_rot270_f16): Delete.
8834 (vcaddq_rot90_f32): Delete.
8835 (vcaddq_rot270_f32): Delete.
8836 (vcaddq_rot270_m_s8): Delete.
8837 (vcaddq_rot270_m_s32): Delete.
8838 (vcaddq_rot270_m_s16): Delete.
8839 (vcaddq_rot270_m_u8): Delete.
8840 (vcaddq_rot270_m_u32): Delete.
8841 (vcaddq_rot270_m_u16): Delete.
8842 (vcaddq_rot90_m_s8): Delete.
8843 (vcaddq_rot90_m_s32): Delete.
8844 (vcaddq_rot90_m_s16): Delete.
8845 (vcaddq_rot90_m_u8): Delete.
8846 (vcaddq_rot90_m_u32): Delete.
8847 (vcaddq_rot90_m_u16): Delete.
8848 (vhcaddq_rot270_m_s8): Delete.
8849 (vhcaddq_rot270_m_s32): Delete.
8850 (vhcaddq_rot270_m_s16): Delete.
8851 (vhcaddq_rot90_m_s8): Delete.
8852 (vhcaddq_rot90_m_s32): Delete.
8853 (vhcaddq_rot90_m_s16): Delete.
8854 (vcaddq_rot270_m_f32): Delete.
8855 (vcaddq_rot270_m_f16): Delete.
8856 (vcaddq_rot90_m_f32): Delete.
8857 (vcaddq_rot90_m_f16): Delete.
8858 (vcaddq_rot90_x_s8): Delete.
8859 (vcaddq_rot90_x_s16): Delete.
8860 (vcaddq_rot90_x_s32): Delete.
8861 (vcaddq_rot90_x_u8): Delete.
8862 (vcaddq_rot90_x_u16): Delete.
8863 (vcaddq_rot90_x_u32): Delete.
8864 (vcaddq_rot270_x_s8): Delete.
8865 (vcaddq_rot270_x_s16): Delete.
8866 (vcaddq_rot270_x_s32): Delete.
8867 (vcaddq_rot270_x_u8): Delete.
8868 (vcaddq_rot270_x_u16): Delete.
8869 (vcaddq_rot270_x_u32): Delete.
8870 (vhcaddq_rot90_x_s8): Delete.
8871 (vhcaddq_rot90_x_s16): Delete.
8872 (vhcaddq_rot90_x_s32): Delete.
8873 (vhcaddq_rot270_x_s8): Delete.
8874 (vhcaddq_rot270_x_s16): Delete.
8875 (vhcaddq_rot270_x_s32): Delete.
8876 (vcaddq_rot90_x_f16): Delete.
8877 (vcaddq_rot90_x_f32): Delete.
8878 (vcaddq_rot270_x_f16): Delete.
8879 (vcaddq_rot270_x_f32): Delete.
8880 (__arm_vcaddq_rot90_u8): Delete.
8881 (__arm_vcaddq_rot270_u8): Delete.
8882 (__arm_vhcaddq_rot90_s8): Delete.
8883 (__arm_vhcaddq_rot270_s8): Delete.
8884 (__arm_vcaddq_rot90_s8): Delete.
8885 (__arm_vcaddq_rot270_s8): Delete.
8886 (__arm_vcaddq_rot90_u16): Delete.
8887 (__arm_vcaddq_rot270_u16): Delete.
8888 (__arm_vhcaddq_rot90_s16): Delete.
8889 (__arm_vhcaddq_rot270_s16): Delete.
8890 (__arm_vcaddq_rot90_s16): Delete.
8891 (__arm_vcaddq_rot270_s16): Delete.
8892 (__arm_vcaddq_rot90_u32): Delete.
8893 (__arm_vcaddq_rot270_u32): Delete.
8894 (__arm_vhcaddq_rot90_s32): Delete.
8895 (__arm_vhcaddq_rot270_s32): Delete.
8896 (__arm_vcaddq_rot90_s32): Delete.
8897 (__arm_vcaddq_rot270_s32): Delete.
8898 (__arm_vcaddq_rot270_m_s8): Delete.
8899 (__arm_vcaddq_rot270_m_s32): Delete.
8900 (__arm_vcaddq_rot270_m_s16): Delete.
8901 (__arm_vcaddq_rot270_m_u8): Delete.
8902 (__arm_vcaddq_rot270_m_u32): Delete.
8903 (__arm_vcaddq_rot270_m_u16): Delete.
8904 (__arm_vcaddq_rot90_m_s8): Delete.
8905 (__arm_vcaddq_rot90_m_s32): Delete.
8906 (__arm_vcaddq_rot90_m_s16): Delete.
8907 (__arm_vcaddq_rot90_m_u8): Delete.
8908 (__arm_vcaddq_rot90_m_u32): Delete.
8909 (__arm_vcaddq_rot90_m_u16): Delete.
8910 (__arm_vhcaddq_rot270_m_s8): Delete.
8911 (__arm_vhcaddq_rot270_m_s32): Delete.
8912 (__arm_vhcaddq_rot270_m_s16): Delete.
8913 (__arm_vhcaddq_rot90_m_s8): Delete.
8914 (__arm_vhcaddq_rot90_m_s32): Delete.
8915 (__arm_vhcaddq_rot90_m_s16): Delete.
8916 (__arm_vcaddq_rot90_x_s8): Delete.
8917 (__arm_vcaddq_rot90_x_s16): Delete.
8918 (__arm_vcaddq_rot90_x_s32): Delete.
8919 (__arm_vcaddq_rot90_x_u8): Delete.
8920 (__arm_vcaddq_rot90_x_u16): Delete.
8921 (__arm_vcaddq_rot90_x_u32): Delete.
8922 (__arm_vcaddq_rot270_x_s8): Delete.
8923 (__arm_vcaddq_rot270_x_s16): Delete.
8924 (__arm_vcaddq_rot270_x_s32): Delete.
8925 (__arm_vcaddq_rot270_x_u8): Delete.
8926 (__arm_vcaddq_rot270_x_u16): Delete.
8927 (__arm_vcaddq_rot270_x_u32): Delete.
8928 (__arm_vhcaddq_rot90_x_s8): Delete.
8929 (__arm_vhcaddq_rot90_x_s16): Delete.
8930 (__arm_vhcaddq_rot90_x_s32): Delete.
8931 (__arm_vhcaddq_rot270_x_s8): Delete.
8932 (__arm_vhcaddq_rot270_x_s16): Delete.
8933 (__arm_vhcaddq_rot270_x_s32): Delete.
8934 (__arm_vcaddq_rot90_f16): Delete.
8935 (__arm_vcaddq_rot270_f16): Delete.
8936 (__arm_vcaddq_rot90_f32): Delete.
8937 (__arm_vcaddq_rot270_f32): Delete.
8938 (__arm_vcaddq_rot270_m_f32): Delete.
8939 (__arm_vcaddq_rot270_m_f16): Delete.
8940 (__arm_vcaddq_rot90_m_f32): Delete.
8941 (__arm_vcaddq_rot90_m_f16): Delete.
8942 (__arm_vcaddq_rot90_x_f16): Delete.
8943 (__arm_vcaddq_rot90_x_f32): Delete.
8944 (__arm_vcaddq_rot270_x_f16): Delete.
8945 (__arm_vcaddq_rot270_x_f32): Delete.
8946 (__arm_vcaddq_rot90): Delete.
8947 (__arm_vcaddq_rot270): Delete.
8948 (__arm_vhcaddq_rot90): Delete.
8949 (__arm_vhcaddq_rot270): Delete.
8950 (__arm_vcaddq_rot270_m): Delete.
8951 (__arm_vcaddq_rot90_m): Delete.
8952 (__arm_vhcaddq_rot270_m): Delete.
8953 (__arm_vhcaddq_rot90_m): Delete.
8954 (__arm_vcaddq_rot90_x): Delete.
8955 (__arm_vcaddq_rot270_x): Delete.
8956 (__arm_vhcaddq_rot90_x): Delete.
8957 (__arm_vhcaddq_rot270_x): Delete.
8959 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
8961 * config/arm/arm_mve_builtins.def (vcaddq_rot90_, vcaddq_rot270_)
8962 (vcaddq_rot90_f, vcaddq_rot90_f): Add "_" or "_f" suffix.
8963 * config/arm/iterators.md (mve_insn): Add vcadd, vhcadd.
8964 (isu): Add UNSPEC_VCADD90, UNSPEC_VCADD270, VCADDQ_ROT270_M_U,
8965 VCADDQ_ROT270_M_S, VCADDQ_ROT90_M_U, VCADDQ_ROT90_M_S,
8966 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S, VHCADDQ_ROT90_S,
8968 (rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S, VCADDQ_ROT90_M_U,
8969 VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S, VCADDQ_ROT270_M_U,
8970 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, VHCADDQ_ROT90_M_S,
8972 (mve_rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S,
8973 VCADDQ_ROT90_M_U, VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S,
8974 VCADDQ_ROT270_M_U, VHCADDQ_ROT90_S, VHCADDQ_ROT270_S,
8975 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S.
8976 (supf): Add VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S,
8977 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, UNSPEC_VCADD90,
8979 (VCADDQ_ROT270_M): Delete.
8980 (VCADDQ_M_F VxCADDQ VxCADDQ_M): New.
8981 (VCADDQ_ROT90_M): Delete.
8982 * config/arm/mve.md (mve_vcaddq<mve_rot><mode>)
8983 (mve_vhcaddq_rot270_s<mode>, mve_vhcaddq_rot90_s<mode>): Merge
8985 (@mve_<mve_insn>q<mve_rot>_<supf><mode>): ... this.
8986 (mve_vcaddq<mve_rot><mode>): Rename into ...
8987 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this
8988 (mve_vcaddq_rot270_m_<supf><mode>)
8989 (mve_vcaddq_rot90_m_<supf><mode>, mve_vhcaddq_rot270_m_s<mode>)
8990 (mve_vhcaddq_rot90_m_s<mode>): Merge into ...
8991 (@mve_<mve_insn>q<mve_rot>_m_<supf><mode>): ... this.
8992 (mve_vcaddq_rot270_m_f<mode>, mve_vcaddq_rot90_m_f<mode>): Merge
8994 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
8996 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
8999 * config/i386/i386.md (*bt<mode>_setcqi): Prefer string form
9000 preparation statement over braces for a single statement.
9001 (*bt<mode>_setncqi): Likewise.
9002 (*bt<mode>_setncqi_2): New define_insn_and_split.
9004 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
9006 * config/i386/i386-expand.cc (ix86_expand_move): Generalize special
9007 case inserting of 64-bit values into a TImode register, to handle
9008 both DImode and DFmode using either *insvti_lowpart_1
9009 or *isnvti_highpart_1.
9011 2023-07-14 Uros Bizjak <ubizjak@gmail.com>
9014 * fwprop.cc (contains_paradoxical_subreg_p): Move to ...
9015 * rtlanal.cc (contains_paradoxical_subreg_p): ... here.
9016 * rtlanal.h (contains_paradoxical_subreg_p): Add prototype.
9017 * cprop.cc (try_replace_reg): Do not set REG_EQUAL note
9018 when the original source contains a paradoxical subreg.
9020 2023-07-14 Jan Hubicka <jh@suse.cz>
9022 * passes.cc (execute_function_todo): Remove
9023 TODO_rebuild_frequencies
9024 * passes.def: Add rebuild_frequencies pass.
9025 * predict.cc (estimate_bb_frequencies): Drop
9027 (tree_estimate_probability): Update call of
9028 estimate_bb_frequencies.
9029 (rebuild_frequencies): Turn into a pass; verify CFG profile consistency
9030 first and do not rebuild if not necessary.
9031 (class pass_rebuild_frequencies): New.
9032 (make_pass_rebuild_frequencies): New.
9033 * profile-count.h: Add profile_count::very_large_p.
9034 * tree-inline.cc (optimize_inline_calls): Do not return
9035 TODO_rebuild_frequencies
9036 * tree-pass.h (TODO_rebuild_frequencies): Remove.
9037 (make_pass_rebuild_frequencies): Declare.
9039 2023-07-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9041 * config/riscv/autovec.md (cond_len_fma<mode>): New pattern.
9042 * config/riscv/riscv-protos.h (enum insn_type): New enum.
9043 (expand_cond_len_ternop): New function.
9044 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
9045 (expand_cond_len_ternop): Ditto.
9047 2023-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
9050 * config/bpf/bpf.md: Enable instruction scheduling.
9052 2023-07-14 Tamar Christina <tamar.christina@arm.com>
9054 PR tree-optimization/109154
9055 * tree-if-conv.cc (INCLUDE_ALGORITHM): Include.
9056 (struct bb_predicate): Add no_predicate_stmts.
9057 (set_bb_predicate): Increase predicate count.
9058 (set_bb_predicate_gimplified_stmts): Conditionally initialize
9060 (get_bb_num_predicate_stmts): New.
9061 (init_bb_predicate): Initialzie no_predicate_stmts.
9062 (release_bb_predicate): Cleanup no_predicate_stmts.
9063 (insert_gimplified_predicates): Preserve no_predicate_stmts.
9065 2023-07-14 Tamar Christina <tamar.christina@arm.com>
9067 PR tree-optimization/109154
9068 * tree-if-conv.cc (gen_simplified_condition,
9069 gen_phi_nest_statement): New.
9070 (gen_phi_arg_condition, predicate_scalar_phi): Use it.
9072 2023-07-14 Richard Biener <rguenther@suse.de>
9074 * gimple.h (gimple_phi_arg): New const overload.
9075 (gimple_phi_arg_def): Make gimple arg const.
9076 (gimple_phi_arg_def_from_edge): New inline function.
9077 * tree-phinodes.h (gimple_phi_arg_imm_use_ptr_from_edge):
9079 * tree-ssa-operands.h (PHI_ARG_DEF_FROM_EDGE): Direct to
9080 new inline function.
9081 (PHI_ARG_DEF_PTR_FROM_EDGE): Likewise.
9083 2023-07-14 Monk Chiang <monk.chiang@sifive.com>
9085 * common/config/riscv/riscv-common.cc:
9086 (riscv_implied_info): Add zihintntl item.
9087 (riscv_ext_version_table): Ditto.
9088 (riscv_ext_flag_table): Ditto.
9089 * config/riscv/riscv-opts.h (MASK_ZIHINTNTL): New macro.
9090 (TARGET_ZIHINTNTL): Ditto.
9092 2023-07-14 Die Li <lidie@eswincomputing.com>
9094 * config/riscv/riscv.md: Remove redundant portion in and<mode>3.
9096 2023-07-14 Oleg Endo <olegendo@gcc.gnu.org>
9099 * config/sh/sh.md (peephole2): Handle case where eliminated reg is also
9100 used by the address of the following memory operand.
9102 2023-07-13 Mikael Pettersson <mikpelinux@gmail.com>
9105 * config/pdp11/pdp11.cc (pdp11_expand_epilogue): Also
9106 deallocate alloca-only frame.
9108 2023-07-13 Iain Sandoe <iain@sandoe.co.uk>
9111 * config/darwin.h (DARWIN_PLATFORM_ID): New.
9112 (LINK_COMMAND_A): Use DARWIN_PLATFORM_ID to pass OS, OS version
9113 and SDK data to the static linker.
9115 2023-07-13 Carl Love <cel@us.ibm.com>
9117 * config/rs6000/rs6000-builtins.def (__builtin_set_fpscr_rn): Update
9118 built-in definition return type.
9119 * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Add check,
9120 define __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
9121 * config/rs6000/rs6000.md (rs6000_set_fpscr_rn): Add return
9122 argument to return FPSCR fields.
9123 * doc/extend.texi (__builtin_set_fpscr_rn): Update description for
9124 the return value. Add description for
9125 __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
9127 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
9130 * config/alpha/alpha.cc (alpha_emit_set_long_const):
9131 Always use DImode when constructing long const.
9133 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
9135 * haifa-sched.cc: Change TRUE/FALSE to true/false.
9137 * lra-assigns.cc: Ditto.
9138 * lra-constraints.cc: Ditto.
9139 * sel-sched.cc: Ditto.
9141 2023-07-13 Andrew Pinski <apinski@marvell.com>
9143 PR tree-optimization/110293
9144 PR tree-optimization/110539
9145 * match.pd: Expand the `x != (typeof x)(x == 0)`
9146 pattern to handle where the inner and outer comparsions
9147 are either `!=` or `==` and handle other constants
9150 2023-07-13 Vladimir N. Makarov <vmakarov@redhat.com>
9152 PR middle-end/109520
9153 * lra-int.h (lra_insn_recog_data): Add member asm_reloads_num.
9154 (lra_asm_insn_error): New prototype.
9155 * lra.cc: Include rtl_error.h.
9156 (lra_set_insn_recog_data): Initialize asm_reloads_num.
9157 (lra_asm_insn_error): New func whose code is taken from ...
9158 * lra-assigns.cc (lra_split_hard_reg_for): ... here. Use lra_asm_insn_error.
9159 * lra-constraints.cc (curr_insn_transform): Check reloads nummber for asm.
9161 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
9163 * genmatch.cc (commutative_op): Add COND_LEN_*
9164 * internal-fn.cc (first_commutative_argument): Ditto.
9166 (get_unconditional_internal_fn): Ditto.
9167 (can_interpret_as_conditional_op_p): Ditto.
9168 (internal_fn_len_index): Ditto.
9169 * internal-fn.h (can_interpret_as_conditional_op_p): Ditt.
9170 * tree-ssa-math-opts.cc (convert_mult_to_fma_1): Ditto.
9171 (convert_mult_to_fma): Ditto.
9172 (math_opts_dom_walker::after_dom_children): Ditto.
9174 2023-07-13 Pan Li <pan2.li@intel.com>
9176 * config/riscv/riscv.cc (vxrm_rtx): New static var.
9178 (global_state_unknown_p): Removed.
9179 (riscv_entity_mode_after): Removed.
9180 (asm_insn_p): New function.
9181 (vxrm_unknown_p): New function for fixed-point.
9182 (riscv_vxrm_mode_after): Ditto.
9183 (frm_unknown_dynamic_p): New function for floating-point.
9184 (riscv_frm_mode_after): Ditto.
9185 (riscv_mode_after): Leverage new functions.
9187 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
9189 * tree-vect-stmts.cc (vect_model_load_cost): Remove.
9190 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS without
9191 calling vect_model_load_cost.
9193 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
9195 * tree-vect-stmts.cc (vect_model_load_cost): Assert this function only
9196 handle memory_access_type VMAT_CONTIGUOUS, remove some
9197 VMAT_CONTIGUOUS_PERMUTE related handlings.
9198 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS_PERMUTE
9199 without calling vect_model_load_cost.
9201 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
9203 * tree-vect-stmts.cc (vect_model_load_cost): Assert it won't get
9204 VMAT_CONTIGUOUS_REVERSE any more.
9205 (vectorizable_load): Adjust the costing handling on
9206 VMAT_CONTIGUOUS_REVERSE without calling vect_model_load_cost.
9208 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
9210 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
9211 VMAT_LOAD_STORE_LANES without calling vect_model_load_cost.
9212 (vectorizable_load): Remove VMAT_LOAD_STORE_LANES related handling and
9213 assert it will never get VMAT_LOAD_STORE_LANES.
9215 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
9217 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
9218 VMAT_GATHER_SCATTER without calling vect_model_load_cost.
9219 (vect_model_load_cost): Adjut the assertion on VMAT_GATHER_SCATTER,
9220 remove VMAT_GATHER_SCATTER related handlings and the related parameter
9223 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
9225 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling
9226 on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP without calling
9227 vect_model_load_cost.
9228 (vect_model_load_cost): Assert it won't get VMAT_ELEMENTWISE and
9229 VMAT_STRIDED_SLP any more, and remove their related handlings.
9231 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
9233 * tree-vect-stmts.cc (hoist_defs_of_uses): Add one argument HOIST_P.
9234 (vectorizable_load): Adjust the handling on VMAT_INVARIANT to respect
9235 hoisting decision and without calling vect_model_load_cost.
9236 (vect_model_load_cost): Assert it won't get VMAT_INVARIANT any more
9237 and remove VMAT_INVARIANT related handlings.
9239 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
9241 * tree-vect-stmts.cc (vect_build_gather_load_calls): Add the handlings
9242 on costing with one extra argument cost_vec.
9243 (vectorizable_load): Adjust the call to vect_build_gather_load_calls.
9244 (vect_model_load_cost): Assert it won't get VMAT_GATHER_SCATTER with
9245 gs_info.decl set any more.
9247 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
9249 * tree-vect-stmts.cc (vectorizable_load): Move and duplicate the call
9250 to vect_model_load_cost down to some different transform paths
9251 according to the handlings of different vect_memory_access_types.
9253 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
9255 * tree.h (wi::from_mpz): Hide from GENERATOR_FILE.
9257 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
9259 * config/riscv/autovec.md
9260 (len_mask_gather_load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New pattern.
9261 (len_mask_gather_load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
9262 (len_mask_gather_load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
9263 (len_mask_gather_load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
9264 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
9265 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
9266 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
9267 (len_mask_gather_load<mode><mode>): Ditto.
9268 (len_mask_scatter_store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
9269 (len_mask_scatter_store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
9270 (len_mask_scatter_store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
9271 (len_mask_scatter_store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
9272 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
9273 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
9274 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
9275 (len_mask_scatter_store<mode><mode>): Ditto.
9276 * config/riscv/predicates.md (const_1_operand): New predicate.
9277 (vector_gs_scale_operand_16): Ditto.
9278 (vector_gs_scale_operand_32): Ditto.
9279 (vector_gs_scale_operand_64): Ditto.
9280 (vector_gs_extension_operand): Ditto.
9281 (vector_gs_scale_operand_16_rv32): Ditto.
9282 (vector_gs_scale_operand_32_rv32): Ditto.
9283 * config/riscv/riscv-protos.h (enum insn_type): Add gather/scatter.
9284 (expand_gather_scatter): New function.
9285 * config/riscv/riscv-v.cc (gen_const_vector_dup): Add gather/scatter.
9286 (emit_vlmax_masked_store_insn): New function.
9287 (emit_nonvlmax_masked_store_insn): Ditto.
9288 (modulo_sel_indices): Ditto.
9289 (expand_vec_perm): Fix SLP for gather/scatter.
9290 (prepare_gather_scatter): New function.
9291 (expand_gather_scatter): Ditto.
9292 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug of
9293 (subreg:SI (DI CONST_POLY_INT)).
9294 * config/riscv/vector-iterators.md: Add gather/scatter.
9295 * config/riscv/vector.md (vec_duplicate<mode>): Use "@" instead.
9296 (@vec_duplicate<mode>): Ditto.
9297 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>):
9299 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
9301 2023-07-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9303 * config/riscv/autovec.md (cond_len_<optab><mode>): New pattern.
9304 * config/riscv/riscv-protos.h (enum insn_type): New enum.
9305 (expand_cond_len_binop): New function.
9306 * config/riscv/riscv-v.cc (emit_nonvlmax_tu_insn): Ditto.
9307 (emit_nonvlmax_fp_tu_insn): Ditto.
9308 (need_fp_rounding_p): Ditto.
9309 (expand_cond_len_binop): Ditto.
9310 * config/riscv/riscv.cc (riscv_preferred_else_value): Ditto.
9311 (TARGET_PREFERRED_ELSE_VALUE): New target hook.
9313 2023-07-12 Jan Hubicka <jh@suse.cz>
9315 * tree-cfg.cc (gimple_duplicate_sese_region): Rename to ...
9316 (gimple_duplicate_seme_region): ... this; break out profile updating
9318 * tree-ssa-loop-ch.cc (update_profile_after_ch): ... here.
9319 (ch_base::copy_headers): Update.
9320 * tree-cfg.h (gimple_duplicate_sese_region): Rename to ...
9321 (gimple_duplicate_seme_region): ... this.
9323 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
9325 PR tree-optimization/107043
9326 * range-op.cc (operator_bitwise_and::op1_range): Update bitmask.
9328 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
9330 PR tree-optimization/107053
9331 * gimple-range-op.cc (cfn_popcount): Use known set bits.
9333 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
9335 * ira.cc (equiv_init_varies_p): Change return type from int to bool
9336 and adjust function body accordingly.
9337 (equiv_init_movable_p): Ditto.
9338 (memref_used_between_p): Ditto.
9339 * lra-constraints.cc (valid_address_p): Ditto.
9341 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
9343 * range-op.cc (irange_to_masked_value): Remove.
9344 (update_known_bitmask): Update irange value/mask pair instead of
9345 only updating nonzero bits.
9347 2023-07-12 Jan Hubicka <jh@suse.cz>
9349 * tree-cfg.cc (gimple_duplicate_sese_region): Add ORIG_ELIMINATED_EDGES
9350 parameter and rewrite profile updating code to handle edges elimination.
9351 * tree-cfg.h (gimple_duplicate_sese_region): Update prototpe.
9352 * tree-ssa-loop-ch.cc (loop_invariant_op_p): New function.
9353 (loop_iv_derived_p): New function.
9354 (should_duplicate_loop_header_p): Track invariant exit edges; fix handling
9355 of PHIs and propagation of IV derived variables.
9356 (ch_base::copy_headers): Pass around the invariant edges hash set.
9358 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
9360 * ifcvt.cc (cond_exec_changed_p): Change variable to bool.
9361 (last_active_insn): Change "skip_use_p" function argument to bool.
9362 (noce_operand_ok): Change return type from int to bool.
9363 (find_cond_trap): Ditto.
9364 (block_jumps_and_fallthru_p): Change "fallthru_p" and
9365 "jump_p" variables to bool.
9366 (noce_find_if_block): Change return type from int to bool.
9367 (cond_exec_find_if_block): Ditto.
9368 (find_if_case_1): Ditto.
9369 (find_if_case_2): Ditto.
9370 (dead_or_predicable): Ditto. Change "reversep" function arg to bool.
9371 (block_jumps_and_fallthru): Rename from block_jumps_and_fallthru_p.
9372 (cond_exec_process_insns): Change return type from int to bool.
9373 Change "mod_ok" function arg to bool.
9374 (cond_exec_process_if_block): Change return type from int to bool.
9375 Change "do_multiple_p" function arg to bool. Change "then_mod_ok"
9377 (noce_emit_store_flag): Change return type from int to bool.
9378 Change "reversep" function arg to bool. Change "cond_complex"
9380 (noce_try_move): Change return type from int to bool.
9381 (noce_try_ifelse_collapse): Ditto.
9382 (noce_try_store_flag): Ditto. Change "reversep" variable to bool.
9383 (noce_try_addcc): Change return type from int to bool. Change
9384 "subtract" variable to bool.
9385 (noce_try_store_flag_constants): Change return type from int to bool.
9386 (noce_try_store_flag_mask): Ditto. Change "reversep" variable to bool.
9387 (noce_try_cmove): Change return type from int to bool.
9388 (noce_try_cmove_arith): Ditto. Change "is_mem" variable to bool.
9389 (noce_try_minmax): Change return type from int to bool. Change
9390 "unsignedp" variable to bool.
9391 (noce_try_abs): Change return type from int to bool. Change
9392 "negate" variable to bool.
9393 (noce_try_sign_mask): Change return type from int to bool.
9394 (noce_try_move): Ditto.
9395 (noce_try_store_flag_constants): Ditto.
9396 (noce_try_cmove): Ditto.
9397 (noce_try_cmove_arith): Ditto.
9398 (noce_try_minmax): Ditto. Change "unsignedp" variable to bool.
9399 (noce_try_bitop): Change return type from int to bool.
9400 (noce_operand_ok): Ditto.
9401 (noce_convert_multiple_sets): Ditto.
9402 (noce_convert_multiple_sets_1): Ditto.
9403 (noce_process_if_block): Ditto.
9404 (check_cond_move_block): Ditto.
9405 (cond_move_process_if_block): Ditto. Change "success_p"
9407 (rest_of_handle_if_conversion): Change return type to void.
9409 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
9411 * internal-fn.cc (FOR_EACH_CODE_MAPPING): Adapt for COND_LEN_* support.
9413 (get_conditional_len_internal_fn): New function.
9414 * internal-fn.h (get_conditional_len_internal_fn): Ditto.
9415 * tree-vect-stmts.cc (vectorizable_operation): Adapt for COND_LEN_*
9418 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
9421 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): Typo.
9423 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
9426 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): New
9427 define_insn_and_split derived from *add<dwi>3_doubleword_concat
9428 and *add<dwi>3_doubleword_zext.
9430 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
9433 * config/i386/i386.md (peephole2): Check !reg_mentioned_p when
9434 optimizing rega = 0; rega op= regb for op in [XOR,IOR,PLUS].
9435 (peephole2): Simplify rega = 0; rega op= rega cases.
9437 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
9439 * config/i386/i386-expand.cc (ix86_expand_int_compare): If
9440 testing a TImode SUBREG of a 128-bit vector register against
9441 zero, use a PTEST instruction instead of first moving it to
9442 a pair of scalar registers.
9444 2023-07-12 Robin Dapp <rdapp@ventanamicro.com>
9446 * genopinit.cc (main): Adjust maximal number of optabs and
9448 * gensupport.cc (find_optab): Shift optab by 20 and mode by
9450 * optabs-query.h (optab_handler): Ditto.
9451 (convert_optab_handler): Ditto.
9453 2023-07-12 Richard Biener <rguenther@suse.de>
9455 PR tree-optimization/110630
9456 * tree-vect-slp.cc (vect_add_slp_permutation): New
9457 offset parameter, honor that for the extract code generation.
9458 (vectorizable_slp_permutation_1): Handle offsetted identities.
9460 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
9462 * config/riscv/autovec.md (smul<mode>3_highpart): New pattern.
9463 (umul<mode>3_highpart): Ditto.
9465 2023-07-12 Jan Beulich <jbeulich@suse.com>
9467 * config/i386/i386.md (extendbfsf2_1): Add new AVX512F
9468 alternative. Adjust original last alternative's "prefix"
9469 attribute to maybe_evex.
9471 2023-07-12 Jan Beulich <jbeulich@suse.com>
9473 * config/i386/sse.md (vec_dupv4sf): Make first alternative use
9474 vbroadcastss for AVX2. New AVX512F alternative.
9475 (*vec_dupv4si): New AVX2 and AVX512F alternatives using
9476 vpbroadcastd. Replace sselog1 by sseshuf1 in "type" attribute.
9478 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
9480 * config/riscv/peephole.md: Remove XThead* peephole passes.
9481 * config/riscv/thead.md: Include thead-peephole.md.
9482 * config/riscv/thead-peephole.md: New file.
9484 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
9486 * config/riscv/riscv-protos.h (riscv_regno_ok_for_index_p):
9488 (riscv_index_reg_class): Likewise.
9489 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p): New function.
9490 (riscv_index_reg_class): New function.
9491 * config/riscv/riscv.h (INDEX_REG_CLASS): Call new function
9492 riscv_index_reg_class().
9493 (REGNO_OK_FOR_INDEX_P): Call new function
9494 riscv_regno_ok_for_index_p().
9496 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
9498 * config/riscv/riscv-protos.h (enum riscv_address_type):
9499 New location of type definition.
9500 (struct riscv_address_info): Likewise.
9501 * config/riscv/riscv.cc (enum riscv_address_type):
9502 Old location of type definition.
9503 (struct riscv_address_info): Likewise.
9505 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
9507 * config/riscv/riscv.h (Xmode): New macro.
9509 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
9511 * config/riscv/riscv.cc (riscv_print_operand_address): Use
9512 output_addr_const rather than riscv_print_operand.
9514 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
9516 * config/riscv/thead.md: Adjust constraints of th_addsl.
9518 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
9520 * config/riscv/thead.cc (th_mempair_operands_p):
9521 Fix documentation of th_mempair_order_operands().
9523 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
9525 * config/riscv/thead.cc (th_mempair_save_regs):
9526 Emit REG_FRAME_RELATED_EXPR notes in prologue.
9528 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
9530 * config/riscv/riscv.md: No base-ISA extension splitter for XThead*.
9531 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
9532 New XThead extension INSN.
9533 (*zero_extendsidi2_th_extu): New XThead extension INSN.
9534 (*zero_extendhi<GPR:mode>2_th_extu): New XThead extension INSN.
9536 2023-07-12 liuhongt <hongtao.liu@intel.com>
9540 * config/i386/predicates.md
9541 (int_float_vector_all_ones_operand): New predicate.
9542 * config/i386/sse.md (*vmov<mode>_constm1_pternlog_false_dep): New
9544 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
9546 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
9548 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Adjust to
9549 define_insn_and_split to avoid false dependence.
9550 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
9551 (<mask_codefor>one_cmpl<mode>2<mask_name>): Adjust constraint
9552 of operands 1 to '0' to avoid false dependence.
9553 (*andnot<mode>3): Ditto.
9554 (iornot<mode>3): Ditto.
9555 (*<nlogic><mode>3): Ditto.
9557 2023-07-12 Mo, Zewei <zewei.mo@intel.com>
9559 * common/config/i386/cpuinfo.h
9560 (get_intel_cpu): Handle Granite Rapids D.
9561 * common/config/i386/i386-common.cc:
9562 (processor_alias_table): Add graniterapids-d.
9563 * common/config/i386/i386-cpuinfo.h
9564 (enum processor_subtypes): Add INTEL_COREI7_GRANITERAPIDS_D.
9565 * config.gcc: Add -march=graniterapids-d.
9566 * config/i386/driver-i386.cc (host_detect_local_cpu):
9567 Handle graniterapids-d.
9568 * config/i386/i386.h: (PTA_GRANITERAPIDS_D): New.
9569 * doc/extend.texi: Add graniterapids-d.
9570 * doc/invoke.texi: Ditto.
9572 2023-07-12 Haochen Jiang <haochen.jiang@intel.com>
9574 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
9575 Add OPTION_MASK_ISA_AVX512VL.
9576 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
9579 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
9581 * config/riscv/riscv-protos.h (enum insn_type): Add vcompress optimization.
9582 * config/riscv/riscv-v.cc (emit_vlmax_compress_insn): Ditto.
9583 (shuffle_compress_patterns): Ditto.
9584 (expand_vec_perm_const_1): Ditto.
9586 2023-07-11 Uros Bizjak <ubizjak@gmail.com>
9588 * cfghooks.cc (verify_flow_info): Change "err" variable to bool.
9589 * cfghooks.h (struct cfg_hooks): Change return type of
9590 verify_flow_info from integer to bool.
9591 * cfgrtl.cc (can_delete_note_p): Change return type from int to bool.
9592 (can_delete_label_p): Ditto.
9593 (rtl_verify_flow_info): Change return type from int to bool
9594 and adjust function body accordingly. Change "err" variable to bool.
9595 (rtl_verify_flow_info_1): Ditto.
9596 (free_bb_for_insn): Change return type to void.
9597 (rtl_merge_blocks): Change "b_empty" variable to bool.
9598 (try_redirect_by_replacing_jump): Change "fallthru" variable to bool.
9599 (verify_hot_cold_block_grouping): Change return type from int to bool.
9600 Change "err" variable to bool.
9601 (rtl_verify_edges): Ditto.
9602 (rtl_verify_bb_insns): Ditto.
9603 (rtl_verify_bb_pointers): Ditto.
9604 (rtl_verify_bb_insn_chain): Ditto.
9605 (rtl_verify_fallthru): Ditto.
9606 (rtl_verify_bb_layout): Ditto.
9607 (purge_all_dead_edges): Change "purged" variable to bool.
9608 * cfgrtl.h (free_bb_for_insn): Change return type from int to void.
9609 * postreload-gcse.cc (expr_hasher::equal): Change "equiv_p" to bool.
9610 (load_killed_in_block_p): Change return type from int to bool
9611 and adjust function body accordingly.
9612 (oprs_unchanged_p): Return true/false.
9613 (rest_of_handle_gcse2): Change return type to void.
9614 * tree-cfg.cc (gimple_verify_flow_info): Change return type from
9615 int to bool. Change "err" variable to bool.
9617 2023-07-11 Gaius Mulley <gaiusmod2@gmail.com>
9619 * doc/gm2.texi (-Wuninit-variable-checking=) New item.
9621 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
9623 * doc/md.texi: Add COND_LEN_* operations for loop control with length.
9624 * internal-fn.cc (cond_len_unary_direct): Ditto.
9625 (cond_len_binary_direct): Ditto.
9626 (cond_len_ternary_direct): Ditto.
9627 (expand_cond_len_unary_optab_fn): Ditto.
9628 (expand_cond_len_binary_optab_fn): Ditto.
9629 (expand_cond_len_ternary_optab_fn): Ditto.
9630 (direct_cond_len_unary_optab_supported_p): Ditto.
9631 (direct_cond_len_binary_optab_supported_p): Ditto.
9632 (direct_cond_len_ternary_optab_supported_p): Ditto.
9633 * internal-fn.def (COND_LEN_ADD): Ditto.
9634 (COND_LEN_SUB): Ditto.
9635 (COND_LEN_MUL): Ditto.
9636 (COND_LEN_DIV): Ditto.
9637 (COND_LEN_MOD): Ditto.
9638 (COND_LEN_RDIV): Ditto.
9639 (COND_LEN_MIN): Ditto.
9640 (COND_LEN_MAX): Ditto.
9641 (COND_LEN_FMIN): Ditto.
9642 (COND_LEN_FMAX): Ditto.
9643 (COND_LEN_AND): Ditto.
9644 (COND_LEN_IOR): Ditto.
9645 (COND_LEN_XOR): Ditto.
9646 (COND_LEN_SHL): Ditto.
9647 (COND_LEN_SHR): Ditto.
9648 (COND_LEN_FMA): Ditto.
9649 (COND_LEN_FMS): Ditto.
9650 (COND_LEN_FNMA): Ditto.
9651 (COND_LEN_FNMS): Ditto.
9652 (COND_LEN_NEG): Ditto.
9653 * optabs.def (OPTAB_D): Ditto.
9655 2023-07-11 Richard Biener <rguenther@suse.de>
9657 PR tree-optimization/110614
9658 * tree-vect-data-refs.cc (vect_supportable_dr_alignment):
9659 SLP splats are not suitable for re-align ops.
9661 2023-07-10 Peter Bergner <bergner@linux.ibm.com>
9663 * config/rs6000/predicates.md (quad_memory_operand): Remove redundant
9665 (vsx_quad_dform_memory_operand): Likewise.
9667 2023-07-10 Uros Bizjak <ubizjak@gmail.com>
9669 * reorg.cc (stop_search_p): Change return type from int to bool
9670 and adjust function body accordingly.
9671 (resource_conflicts_p): Ditto.
9672 (insn_references_resource_p): Change return type from int to bool.
9673 (insn_sets_resource_p): Ditto.
9674 (redirect_with_delay_slots_safe_p): Ditto.
9675 (condition_dominates_p): Change return type from int to bool
9676 and adjust function body accordingly.
9677 (redirect_with_delay_list_safe_p): Ditto.
9678 (check_annul_list_true_false): Ditto. Change "annul_true_p"
9679 function argument to bool.
9680 (steal_delay_list_from_target): Change "pannul_p" function
9681 argument to bool pointer. Change "must_annul" and "used_annul"
9682 variables from int to bool.
9683 (steal_delay_list_from_fallthrough): Ditto.
9684 (own_thread_p): Change return type from int to bool and adjust
9685 function body accordingly. Change "allow_fallthrough" function
9687 (reorg_redirect_jump): Change return type from int to bool.
9688 (fill_simple_delay_slots): Change "non_jumps_p" function
9689 argument from int to bool. Change "maybe_never" varible to bool.
9690 (fill_slots_from_thread): Change "likely", "thread_if_true" and
9691 "own_thread" function arguments to bool. Change "lose" and
9692 "must_annul" variables to bool.
9693 (delete_from_delay_slot): Change "had_barrier" variable to bool.
9694 (try_merge_delay_insns): Change "annul_p" variable to bool.
9695 (fill_eager_delay_slots): Change "own_target" and "own_fallthrouhg"
9697 (rest_of_handle_delay_slots): Change return type from int to void
9698 and adjust function body accordingly.
9700 2023-07-10 Kito Cheng <kito.cheng@sifive.com>
9702 * doc/extend.texi (RISC-V Operand Modifiers): New.
9704 2023-07-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
9706 * config/riscv/riscv-vsetvl.cc (add_label_notes): Remove it.
9707 (insert_insn_end_basic_block): Ditto.
9708 (pass_vsetvl::commit_vsetvls): Adapt for new helper function.
9709 * gcse.cc (insert_insn_end_basic_block): Export as global function.
9710 * gcse.h (insert_insn_end_basic_block): Ditto.
9712 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
9715 * config/arm/arm-builtins.cc (arm_init_mve_builtins): Handle LTO.
9716 (arm_builtin_decl): Hahndle MVE builtins.
9717 * config/arm/arm-mve-builtins.cc (builtin_decl): New function.
9718 (add_unique_function): Fix handling of
9719 __ARM_MVE_PRESERVE_USER_NAMESPACE.
9720 (add_overloaded_function): Likewise.
9721 * config/arm/arm-protos.h (builtin_decl): New declaration.
9723 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
9725 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Document.
9727 2023-07-10 Xi Ruoyao <xry111@xry111.site>
9729 PR tree-optimization/110557
9730 * tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern):
9731 Ensure the output sign-extended if necessary.
9733 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
9735 * config/i386/i386.md (peephole2): Transform xchg insn with a
9736 REG_UNUSED note to a (simple) move.
9737 (*insvti_lowpart_1): New define_insn_and_split.
9738 (*insvdi_lowpart_1): Likewise.
9740 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
9742 * config/i386/i386-features.cc (compute_convert_gain): Tweak
9743 gains/costs for ROTATE/ROTATERT by integer constant on AVX512VL.
9744 (general_scalar_chain::convert_rotate): On TARGET_AVX512F generate
9745 avx512vl_rolv2di or avx412vl_rolv4si when appropriate.
9747 2023-07-10 liuhongt <hongtao.liu@intel.com>
9750 * config/i386/i386.md (*ieee_max<mode>3_1): New pre_reload
9751 splitter to detect fp max pattern.
9752 (*ieee_min<mode>3_1): Ditto, but for fp min pattern.
9754 2023-07-09 Jan Hubicka <jh@suse.cz>
9756 * cfg.cc (check_bb_profile): Dump counts with relative frequency.
9757 (dump_edge_info): Likewise.
9758 (dump_bb_info): Likewise.
9759 * profile-count.cc (profile_count::dump): Add comma between quality and
9762 2023-07-08 Jan Hubicka <jh@suse.cz>
9764 PR tree-optimization/110600
9765 * cfgloopmanip.cc (scale_loop_profile): Add mising profile_dump check.
9767 2023-07-08 Jan Hubicka <jh@suse.cz>
9769 PR middle-end/110590
9770 * cfgloopmanip.cc (scale_loop_profile): Avoid scaling exits within
9771 inner loops and be more careful about inconsistent profiles.
9772 (duplicate_loop_body_to_header_edge): Fix profile update when eliminated
9773 exit is followed by other exit.
9775 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
9777 * cprop.cc (reg_available_p): Change return type from int to bool.
9778 (reg_not_set_p): Ditto.
9779 (try_replace_reg): Ditto. Change "success" variable to bool.
9780 (cprop_jump): Change return type from int to void
9781 and adjust function body accordingly.
9782 (constprop_register): Ditto.
9783 (cprop_insn): Ditto. Change "changed" variable to bool.
9784 (local_cprop_pass): Change return type from int to void
9785 and adjust function body accordingly.
9786 (bypass_block): Ditto. Change "change", "may_be_loop_header"
9787 and "removed_p" variables to bool.
9788 (bypass_conditional_jumps): Change return type from int to void
9789 and adjust function body accordingly. Change "changed"
9791 (one_cprop_pass): Ditto.
9793 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
9795 * gcse.cc (expr_equiv_p): Change return type from int to bool.
9796 (oprs_unchanged_p): Change return type from int to void
9797 and adjust function body accordingly.
9798 (oprs_anticipatable_p): Ditto.
9799 (oprs_available_p): Ditto.
9800 (insert_expr_in_table): Ditto. Change "antic_p" and "avail_p"
9801 arguments to bool. Change "found" variable to bool.
9802 (load_killed_in_block_p): Change return type from int to void and
9803 adjust function body accordingly. Change "avail_p" argument to bool.
9804 (pre_expr_reaches_here_p): Change return type from int to void
9805 and adjust function body accordingly.
9806 (pre_delete): Ditto. Change "changed" variable to bool.
9807 (pre_gcse): Change return type from int to void
9808 and adjust function body accordingly. Change "did_insert" and
9809 "changed" variables to bool.
9810 (one_pre_gcse_pass): Change return type from int to void
9811 and adjust function body accordingly. Change "changed" variable
9813 (should_hoist_expr_to_dom): Change return type from int to void
9814 and adjust function body accordingly. Change
9815 "visited_allocated_locally" variable to bool.
9816 (hoist_code): Change return type from int to void and adjust
9817 function body accordingly. Change "changed" variable to bool.
9818 (one_code_hoisting_pass): Ditto.
9819 (pre_edge_insert): Change return type from int to void and adjust
9820 function body accordingly. Change "did_insert" variable to bool.
9821 (pre_expr_reaches_here_p_work): Change return type from int to void
9822 and adjust function body accordingly.
9823 (simple_mem): Ditto.
9824 (want_to_gcse_p): Change return type from int to void
9825 and adjust function body accordingly.
9826 (can_assign_to_reg_without_clobbers_p): Update function body
9827 for bool return type.
9828 (hash_scan_set): Change "antic_p" and "avail_p" variables to bool.
9829 (pre_insert_copies): Change "added_copy" variable to bool.
9831 2023-07-08 Jonathan Wakely <jwakely@redhat.com>
9835 * doc/invoke.texi (Warning Options): Fix typos.
9837 2023-07-07 Jan Hubicka <jh@suse.cz>
9839 * profile-count.cc (profile_count::dump): Add FUN
9840 parameter; print relative frequency.
9841 (profile_count::debug): Update.
9842 * profile-count.h (profile_count::dump): Update
9845 2023-07-07 Roger Sayle <roger@nextmovesoftware.com>
9849 * config/i386/i386-expand.cc (ix86_expand_move): Convert SETs of
9850 TImode destinations from paradoxical SUBREGs (setting the lowpart)
9851 into explicit zero extensions. Use *insvti_highpart_1 instruction
9852 to set the highpart of a TImode destination.
9854 2023-07-07 Jan Hubicka <jh@suse.cz>
9856 * predict.cc (force_edge_cold): Use
9857 set_edge_probability_and_rescale_others; improve dumps.
9859 2023-07-07 Jan Hubicka <jh@suse.cz>
9861 * cfgloopmanip.cc (scale_loop_profile): Fix computation of count_in and scaling blocks
9863 * tree-vect-loop-manip.cc (vect_do_peeling): Scale loop profile of the epilogue if bound
9866 2023-07-07 Juergen Christ <jchrist@linux.ibm.com>
9868 * config/s390/s390.cc (vec_init): Fix default case
9870 2023-07-07 Vladimir N. Makarov <vmakarov@redhat.com>
9872 * lra-assigns.cc (assign_by_spills): Add reload insns involving
9873 reload pseudos with non-refined class to be processed on the next
9875 * lra-constraints.cc (enough_allocatable_hard_regs_p): New func.
9876 (in_class_p): Use it.
9877 (print_curr_insn_alt): New func.
9878 (process_alt_operands): Use it. Improve debug info.
9879 (curr_insn_transform): Use print_curr_insn_alt. Refine reload
9880 pseudo class if it is not refined yet.
9882 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
9884 * value-range.cc (irange::get_bitmask_from_range): Return all the
9885 known bits for a singleton.
9886 (irange::set_range_from_bitmask): Set a range of a singleton when
9889 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
9891 * value-range.cc (irange::intersect): Leave normalization to
9894 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
9896 * data-streamer-in.cc (streamer_read_value_range): Adjust for
9898 * data-streamer-out.cc (streamer_write_vrange): Same.
9899 * range-op.cc (operator_cast::fold_range): Same.
9900 * value-range-pretty-print.cc
9901 (vrange_printer::print_irange_bitmasks): Same.
9902 * value-range-storage.cc (irange_storage::write_lengths_address):
9904 (irange_storage::set_irange): Same.
9905 (irange_storage::get_irange): Same.
9906 (irange_storage::size): Same.
9907 (irange_storage::dump): Same.
9908 * value-range-storage.h: Same.
9909 * value-range.cc (debug): New.
9910 (irange_bitmask::dump): New.
9911 (add_vrange): Adjust for value/mask.
9912 (irange::operator=): Same.
9913 (irange::set): Same.
9914 (irange::verify_range): Same.
9915 (irange::operator==): Same.
9916 (irange::contains_p): Same.
9917 (irange::irange_single_pair_union): Same.
9918 (irange::union_): Same.
9919 (irange::intersect): Same.
9920 (irange::invert): Same.
9921 (irange::get_nonzero_bits_from_range): Rename to...
9922 (irange::get_bitmask_from_range): ...this.
9923 (irange::set_range_from_nonzero_bits): Rename to...
9924 (irange::set_range_from_bitmask): ...this.
9925 (irange::set_nonzero_bits): Rename to...
9926 (irange::update_bitmask): ...this.
9927 (irange::get_nonzero_bits): Rename to...
9928 (irange::get_bitmask): ...this.
9929 (irange::intersect_nonzero_bits): Rename to...
9930 (irange::intersect_bitmask): ...this.
9931 (irange::union_nonzero_bits): Rename to...
9932 (irange::union_bitmask): ...this.
9933 (irange_bitmask::verify_mask): New.
9934 * value-range.h (class irange_bitmask): New.
9935 (irange_bitmask::set_unknown): New.
9936 (irange_bitmask::unknown_p): New.
9937 (irange_bitmask::irange_bitmask): New.
9938 (irange_bitmask::get_precision): New.
9939 (irange_bitmask::get_nonzero_bits): New.
9940 (irange_bitmask::set_nonzero_bits): New.
9941 (irange_bitmask::operator==): New.
9942 (irange_bitmask::union_): New.
9943 (irange_bitmask::intersect): New.
9944 (class irange): Friend vrange_printer.
9945 (irange::varying_compatible_p): Adjust for bitmask.
9946 (irange::set_varying): Same.
9947 (irange::set_nonzero): Same.
9949 2023-07-07 Jan Beulich <jbeulich@suse.com>
9951 * config/i386/sse.md (*vec_extractv2ti): Drop g modifiers.
9953 2023-07-07 Jan Beulich <jbeulich@suse.com>
9955 * config/i386/sse.md (@vec_extract_hi_<mode>): Drop last
9956 alternative. Switch new last alternative's "isa" attribute to
9958 (vec_extract_hi_v32qi): Likewise.
9960 2023-07-07 Pan Li <pan2.li@intel.com>
9961 Robin Dapp <rdapp@ventanamicro.com>
9963 * config/riscv/riscv.cc (riscv_emit_mode_set): Avoid emit insn
9965 (riscv_mode_entry): Take FRM_MODE_DYN as entry mode.
9966 (riscv_mode_exit): Likewise for exit mode.
9967 (riscv_mode_needed): Likewise for needed mode.
9968 (riscv_mode_after): Likewise for after mode.
9970 2023-07-07 Pan Li <pan2.li@intel.com>
9972 * config/riscv/vector.md: Fix typo.
9974 2023-07-06 Jan Hubicka <jh@suse.cz>
9977 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Scale loop frequency to maximal number
9978 of iterations determined.
9979 * tree-ssa-loop-ivcanon.cc (try_unroll_loop_completely): Likewise.
9981 2023-07-06 Jan Hubicka <jh@suse.cz>
9983 * cfgloopmanip.cc (scale_loop_profile): Rewrite exit edge
9984 probability update to be safe on loops with subloops.
9985 Make bound parameter to be iteration bound.
9986 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Update call
9987 of scale_loop_profile.
9988 * tree-vect-loop-manip.cc (vect_do_peeling): Likewise.
9990 2023-07-06 Hao Liu OS <hliu@os.amperecomputing.com>
9992 PR tree-optimization/110449
9993 * tree-vect-loop.cc (vectorizable_induction): use vec_n to replace
9994 vec_loop for the unrolled loop.
9996 2023-07-06 Jan Hubicka <jh@suse.cz>
9998 * cfg.cc (set_edge_probability_and_rescale_others): New function.
9999 (update_bb_profile_for_threading): Use it; simplify the rest.
10000 * cfg.h (set_edge_probability_and_rescale_others): Declare.
10001 * profile-count.h (profile_probability::apply_scale): New.
10003 2023-07-06 Claudiu Zissulescu <claziss@gmail.com>
10005 * doc/extend.texi (ARC Built-in Functions): Update documentation
10006 with missing builtins.
10008 2023-07-06 Richard Biener <rguenther@suse.de>
10010 PR tree-optimization/110556
10011 * tree-ssa-tail-merge.cc (gimple_equal_p): Check
10012 assign code and all operands of non-stores.
10014 2023-07-06 Richard Biener <rguenther@suse.de>
10016 PR tree-optimization/110563
10017 * tree-vectorizer.h (vect_determine_partial_vectors_and_peeling):
10018 Remove second argument.
10019 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
10020 Remove for_epilogue_p argument. Merge assert ...
10021 (vect_analyze_loop_2): ... with check done before determining
10022 partial vectors by moving it after.
10023 * tree-vect-loop-manip.cc (vect_do_peeling): Adjust.
10025 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
10027 * ggc-common.cc (gt_pch_note_reorder, gt_pch_save): Tighten up a
10028 few things re 'reorder' option and strings.
10029 * stringpool.cc (gt_pch_p_S): This is now 'gcc_unreachable'.
10031 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
10033 * gengtype-parse.cc: Clean up obsolete parametrized structs
10035 * gengtype.cc: Likewise.
10036 * gengtype.h: Likewise.
10038 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
10040 * gengtype.cc (struct walk_type_data): Remove 'needs_cast_p'.
10043 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
10045 * gengtype-parse.cc (token_names): Add '"user"'.
10046 * gengtype.h (gty_token): Add 'UNUSED_PARAM_IS' for use with
10047 'FIRST_TOKEN_WITH_VALUE'.
10049 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
10051 * doc/gty.texi (GTY Options) <string_length>: Enhance.
10053 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
10055 * gengtype.cc (write_root, write_roots): Explicitly reject
10056 'string_length' option.
10057 * doc/gty.texi (GTY Options) <string_length>: Document.
10059 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
10061 * ggc-internal.h (ggc_pch_count_object, ggc_pch_alloc_object)
10062 (ggc_pch_write_object): Remove 'bool is_string' argument.
10063 * ggc-common.cc: Adjust.
10064 * ggc-page.cc: Likewise.
10066 2023-07-06 Roger Sayle <roger@nextmovesoftware.com>
10068 * dwarf2out.cc (mem_loc_descriptor): Handle COPYSIGN.
10070 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
10072 * doc/extend.texi: Move x86 inlining rule to a new subsubsection
10073 and add description for inling of function with arch and tune
10076 2023-07-06 Richard Biener <rguenther@suse.de>
10078 PR tree-optimization/110515
10079 * tree-ssa-pre.cc (compute_avail): Make code dealing
10080 with hoisting loads with different alias-sets more
10083 2023-07-06 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10085 * tree-vect-stmts.cc (vect_get_strided_load_store_ops): Fix ICE.
10087 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
10089 * config/i386/i386.cc (ix86_can_inline_p): If callee has
10090 default arch=x86-64 and tune=generic, do not block the
10091 inlining to its caller. Also allow callee with different
10092 arch= to be inlined if it has always_inline attribute and
10093 it's ISA is subset of caller's.
10095 2023-07-06 liuhongt <hongtao.liu@intel.com>
10097 * config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for
10098 DF/SFmode AND/IOR/XOR/ANDN operations.
10100 2023-07-06 Andrew Pinski <apinski@marvell.com>
10102 PR middle-end/110554
10103 * tree-vect-generic.cc (expand_vector_condition): For comparisons,
10104 just build using boolean_type_node instead of the cond_type.
10105 For non-comparisons/non-scalar-bitmask, build a ` != 0` gimple
10106 that will feed into the COND_EXPR.
10108 2023-07-06 liuhongt <hongtao.liu@intel.com>
10111 * config/i386/i386.md (movdf_internal): Disparage slightly for
10112 2 alternatives (r,v) and (v,r) by adding constraint modifier
10115 2023-07-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
10118 * config/rs6000/rs6000.cc (rs6000_expand_vector_extract): Remove redundant
10119 initialization of new_addr.
10121 2023-07-06 Hao Liu <hliu@os.amperecomputing.com>
10123 PR tree-optimization/110474
10124 * tree-vect-loop.cc (vect_analyze_loop_2): unscale the VF by suggested
10125 unroll factor while selecting the epilog vect loop VF.
10127 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
10129 * gimple-range-gori.cc (compute_operand_range): Convert to a tail
10132 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
10134 * gimple-range-gori.cc (compute_operand_range): After calling
10135 compute_operand2_range, recursively call self if needed.
10136 (compute_operand2_range): Turn into a leaf function.
10137 (gori_compute::compute_operand1_and_operand2_range): Finish
10138 operand2 calculation.
10139 * gimple-range-gori.h (compute_operand2_range): Remove name param.
10141 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
10143 * gimple-range-gori.cc (compute_operand_range): After calling
10144 compute_operand1_range, recursively call self if needed.
10145 (compute_operand1_range): Turn into a leaf function.
10146 (gori_compute::compute_operand1_and_operand2_range): Finish
10147 operand1 calculation.
10148 * gimple-range-gori.h (compute_operand1_range): Remove name param.
10150 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
10152 * gimple-range-gori.cc (compute_operand_range): Check for
10153 operand interdependence when both op1 and op2 are computed.
10154 (compute_operand1_and_operand2_range): No checks required now.
10156 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
10158 * gimple-range-gori.cc (compute_operand_range): Check for
10159 a relation between op1 and op2 and use that instead.
10160 (compute_operand1_range): Don't look for a relation override.
10161 (compute_operand2_range): Ditto.
10163 2023-07-05 Jonathan Wakely <jwakely@redhat.com>
10165 * doc/contrib.texi (Contributors): Update my entry.
10167 2023-07-05 Filip Kastl <filip.kastl@gmail.com>
10169 * value-prof.cc (gimple_mod_subtract_transform): Correct edge
10172 2023-07-05 Uros Bizjak <ubizjak@gmail.com>
10174 * sched-int.h (struct haifa_sched_info): Change can_schedule_ready_p,
10175 scehdule_more_p and contributes_to_priority indirect frunction
10176 type from int to bool.
10177 (no_real_insns_p): Change return type from int to bool.
10178 (contributes_to_priority): Ditto.
10179 * haifa-sched.cc (no_real_insns_p): Change return type from
10180 int to bool and adjust function body accordingly.
10181 * modulo-sched.cc (try_scheduling_node_in_cycle): Change "success"
10182 variable type from int to bool.
10183 (ps_insn_advance_column): Change return type from int to bool.
10184 (ps_has_conflicts): Ditto. Change "has_conflicts"
10185 variable type from int to bool.
10186 * sched-deps.cc (deps_may_trap_p): Change return type from int to bool.
10187 (conditions_mutex_p): Ditto.
10188 * sched-ebb.cc (schedule_more_p): Ditto.
10189 (ebb_contributes_to_priority): Change return type from
10190 int to bool and adjust function body accordingly.
10191 * sched-rgn.cc (is_cfg_nonregular): Ditto.
10192 (check_live_1): Ditto.
10194 (find_conditional_protection): Ditto.
10195 (is_conditionally_protected): Ditto.
10196 (is_prisky): Ditto.
10197 (is_exception_free): Ditto.
10198 (haifa_find_rgns): Change "unreachable" and "too_large_failure"
10199 variables from int to bool.
10200 (extend_rgns): Change "rescan" variable from int to bool.
10201 (check_live): Change return type from
10202 int to bool and adjust function body accordingly.
10203 (can_schedule_ready_p): Ditto.
10204 (schedule_more_p): Ditto.
10205 (contributes_to_priority): Ditto.
10207 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
10209 * doc/md.texi: Document that vec_set and vec_extract must not
10211 * gimple-isel.cc (gimple_expand_vec_set_expr): Rename this...
10212 (gimple_expand_vec_set_extract_expr): ...to this.
10213 (gimple_expand_vec_exprs): Call renamed function.
10214 * internal-fn.cc (vec_extract_direct): Add.
10215 (expand_vec_extract_optab_fn): New function to expand
10217 (direct_vec_extract_optab_supported_p): Add.
10218 * internal-fn.def (VEC_EXTRACT): Add.
10219 * optabs.cc (can_vec_extract_var_idx_p): New function.
10220 * optabs.h (can_vec_extract_var_idx_p): Declare.
10222 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
10224 * config/riscv/autovec.md: Add gen_lowpart.
10226 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
10228 * config/riscv/autovec.md: Allow register index operand.
10230 2023-07-05 Pan Li <pan2.li@intel.com>
10232 * config/riscv/riscv-vector-builtins.cc
10233 (function_expander::use_exact_insn): Use FRM_DYN instead of const0.
10235 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
10237 * config/riscv/autovec.md: Use float_truncate.
10239 2023-07-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10241 * internal-fn.cc (internal_fn_len_index): Apply
10242 LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer.
10243 (internal_fn_mask_index): Ditto.
10244 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
10245 (supports_vec_scatter_store_p): Ditto.
10246 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
10247 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
10248 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
10249 (vect_get_strided_load_store_ops): Ditto.
10250 (vectorizable_store): Ditto.
10251 (vectorizable_load): Ditto.
10253 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
10254 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10256 * simplify-rtx.cc (native_encode_rtx): Ditto.
10257 (native_decode_vector_rtx): Ditto.
10258 (simplify_const_vector_byte_offset): Ditto.
10259 (simplify_const_vector_subreg): Ditto.
10260 * tree.cc (build_truth_vector_type_for_mode): Ditto.
10261 * varasm.cc (output_constant_pool_2): Ditto.
10263 2023-07-05 YunQiang Su <yunqiang.su@cipunited.com>
10265 * config/mips/mips.cc (mips_expand_block_move): don't expand for
10266 r6 with -mno-unaligned-access option if one or both of src and
10267 dest are unaligned. restruct: return directly if length is not const.
10268 (mips_block_move_straight): emit_move if ISA_HAS_UNALIGNED_ACCESS.
10270 2023-07-05 Jan Beulich <jbeulich@suse.com>
10273 * config/i386/sse.md: New splitters to simplify
10274 not;vec_duplicate as a singular vpternlog.
10275 (one_cmpl<mode>2): Allow broadcast for operand 1.
10276 (<mask_codefor>one_cmpl<mode>2<mask_name>): Likewise.
10278 2023-07-05 Jan Beulich <jbeulich@suse.com>
10281 * config/i386/sse.md: New splitters to simplify
10282 not;vec_duplicate;{ior,xor} as vec_duplicate;{iornot,xnor}.
10284 2023-07-05 Jan Beulich <jbeulich@suse.com>
10287 * config/i386/sse.md: Permit non-immediate operand 1 in AVX2
10288 form of splitter for PR target/100711.
10290 2023-07-05 Richard Biener <rguenther@suse.de>
10292 PR middle-end/110541
10293 * tree.def (VEC_PERM_EXPR): Adjust documentation to reflect
10296 2023-07-05 Jan Beulich <jbeulich@suse.com>
10299 * config/i386/sse.md (*andnot<mode>3): Add new alternatives
10300 for memory form operand 1.
10302 2023-07-05 Jan Beulich <jbeulich@suse.com>
10305 * config/i386/i386.cc (ix86_rtx_costs): Further special-case
10306 bitwise vector operations.
10307 * config/i386/sse.md (*iornot<mode>3): New insn.
10308 (*xnor<mode>3): Likewise.
10309 (*<nlogic><mode>3): Likewise.
10310 (andor): New code iterator.
10311 (nlogic): New code attribute.
10312 (ternlog_nlogic): Likewise.
10314 2023-07-05 Richard Biener <rguenther@suse.de>
10316 * tree-vect-stmts.cc (vect_mark_relevant): Fix typo.
10318 2023-07-05 yulong <shiyulong@iscas.ac.cn>
10320 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
10322 2023-07-05 yulong <shiyulong@iscas.ac.cn>
10324 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
10325 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
10326 (ADJUST_ALIGNMENT): Ditto.
10327 (RVV_TUPLE_PARTIAL_MODES): Ditto.
10328 (ADJUST_NUNITS): Ditto.
10329 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
10331 (vfloat16mf4x3_t): Ditto.
10332 (vfloat16mf4x4_t): Ditto.
10333 (vfloat16mf4x5_t): Ditto.
10334 (vfloat16mf4x6_t): Ditto.
10335 (vfloat16mf4x7_t): Ditto.
10336 (vfloat16mf4x8_t): Ditto.
10337 (vfloat16mf2x2_t): Ditto.
10338 (vfloat16mf2x3_t): Ditto.
10339 (vfloat16mf2x4_t): Ditto.
10340 (vfloat16mf2x5_t): Ditto.
10341 (vfloat16mf2x6_t): Ditto.
10342 (vfloat16mf2x7_t): Ditto.
10343 (vfloat16mf2x8_t): Ditto.
10344 (vfloat16m1x2_t): Ditto.
10345 (vfloat16m1x3_t): Ditto.
10346 (vfloat16m1x4_t): Ditto.
10347 (vfloat16m1x5_t): Ditto.
10348 (vfloat16m1x6_t): Ditto.
10349 (vfloat16m1x7_t): Ditto.
10350 (vfloat16m1x8_t): Ditto.
10351 (vfloat16m2x2_t): Ditto.
10352 (vfloat16m2x3_t): Ditto.
10353 (vfloat16m2x4_t): Ditto.
10354 (vfloat16m4x2_t): Ditto.
10355 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
10356 (vfloat16mf4x3_t): Ditto.
10357 (vfloat16mf4x4_t): Ditto.
10358 (vfloat16mf4x5_t): Ditto.
10359 (vfloat16mf4x6_t): Ditto.
10360 (vfloat16mf4x7_t): Ditto.
10361 (vfloat16mf4x8_t): Ditto.
10362 (vfloat16mf2x2_t): Ditto.
10363 (vfloat16mf2x3_t): Ditto.
10364 (vfloat16mf2x4_t): Ditto.
10365 (vfloat16mf2x5_t): Ditto.
10366 (vfloat16mf2x6_t): Ditto.
10367 (vfloat16mf2x7_t): Ditto.
10368 (vfloat16mf2x8_t): Ditto.
10369 (vfloat16m1x2_t): Ditto.
10370 (vfloat16m1x3_t): Ditto.
10371 (vfloat16m1x4_t): Ditto.
10372 (vfloat16m1x5_t): Ditto.
10373 (vfloat16m1x6_t): Ditto.
10374 (vfloat16m1x7_t): Ditto.
10375 (vfloat16m1x8_t): Ditto.
10376 (vfloat16m2x2_t): Ditto.
10377 (vfloat16m2x3_t): Ditto.
10378 (vfloat16m2x4_t): Ditto.
10379 (vfloat16m4x2_t): Ditto.
10380 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
10381 * config/riscv/riscv.md: New.
10382 * config/riscv/vector-iterators.md: New.
10384 2023-07-04 Andrew Pinski <apinski@marvell.com>
10386 PR tree-optimization/110487
10387 * match.pd (a !=/== CST1 ? CST2 : CST3): Always
10388 build a nonstandard integer and use that.
10390 2023-07-04 Andrew Pinski <apinski@marvell.com>
10392 * match.pd (a?-1:0): Cast type an integer type
10393 rather the type before the negative.
10394 (a?0:-1): Likewise.
10396 2023-07-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
10398 * config/xtensa/xtensa.cc (machine_function, xtensa_expand_prologue):
10399 Change to use HARD_REG_BIT and its macros.
10400 * config/xtensa/xtensa.md
10401 (peephole2: regmove elimination during DFmode input reload):
10404 2023-07-04 Richard Biener <rguenther@suse.de>
10406 PR tree-optimization/110491
10407 * tree-ssa-phiopt.cc (match_simplify_replacement): Check
10408 whether the PHI args are possibly undefined before folding
10411 2023-07-04 Pan Li <pan2.li@intel.com>
10412 Thomas Schwinge <thomas@codesourcery.com>
10414 * lto-streamer-in.cc (lto_input_mode_table): Stream in the mode
10415 bits for machine mode table.
10416 * lto-streamer-out.cc (lto_write_mode_table): Stream out the
10417 HOST machine mode bits.
10418 * lto-streamer.h (struct lto_file_decl_data): New fields mode_bits.
10419 * tree-streamer.cc (streamer_mode_table): Take MAX_MACHINE_MODE
10421 * tree-streamer.h (streamer_mode_table): Ditto.
10422 (bp_pack_machine_mode): Take 1 << ceil_log2 (MAX_MACHINE_MODE)
10423 as the packing limit.
10424 (bp_unpack_machine_mode): Ditto with 'file_data->mode_bits'.
10426 2023-07-04 Thomas Schwinge <thomas@codesourcery.com>
10428 * lto-streamer.h (class lto_input_block): Capture
10429 'lto_file_decl_data *file_data' instead of just
10430 'unsigned char *mode_table'.
10431 * ipa-devirt.cc (ipa_odr_read_section): Adjust.
10432 * ipa-fnsummary.cc (inline_read_section): Likewise.
10433 * ipa-icf.cc (sem_item_optimizer::read_section): Likewise.
10434 * ipa-modref.cc (read_section): Likewise.
10435 * ipa-prop.cc (ipa_prop_read_section, read_replacements_section):
10437 * ipa-sra.cc (isra_read_summary_section): Likewise.
10438 * lto-cgraph.cc (input_cgraph_opt_section): Likewise.
10439 * lto-section-in.cc (lto_create_simple_input_block): Likewise.
10440 * lto-streamer-in.cc (lto_read_body_or_constructor)
10441 (lto_input_toplevel_asms): Likewise.
10442 * tree-streamer.h (bp_unpack_machine_mode): Likewise.
10444 2023-07-04 Richard Biener <rguenther@suse.de>
10446 * tree-ssa-phiopt.cc (pass_phiopt::execute): Mark SSA undefs.
10447 (empty_bb_or_one_feeding_into_p): Check for them.
10448 * tree-ssa.h (gimple_uses_undefined_value_p): Remove.
10449 * tree-ssa.cc (gimple_uses_undefined_value_p): Likewise.
10451 2023-07-04 Richard Biener <rguenther@suse.de>
10453 * tree-vect-loop.cc (vect_analyze_loop_costing): Remove
10454 check guarding scalar_niter underflow.
10456 2023-07-04 Hao Liu <hliu@os.amperecomputing.com>
10458 PR tree-optimization/110531
10459 * tree-vect-loop.cc (vect_analyze_loop_1): initialize
10460 slp_done_for_suggested_uf to false.
10462 2023-07-04 Richard Biener <rguenther@suse.de>
10464 PR tree-optimization/110228
10465 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute):
10466 Mark SSA may-undefs.
10467 (bb_no_side_effects_p): Check stmt uses for undefs.
10469 2023-07-04 Richard Biener <rguenther@suse.de>
10471 PR tree-optimization/110436
10472 * tree-vect-stmts.cc (vect_mark_relevant): Expand dumping,
10473 force live but not relevant pattern stmts relevant.
10475 2023-07-04 Lili Cui <lili.cui@intel.com>
10477 * config/i386/i386.h: Add PTA_ENQCMD and PTA_UINTR to PTA_SIERRAFOREST.
10478 * doc/invoke.texi: Update new isa to march=sierraforest and grandridge.
10480 2023-07-04 Richard Biener <rguenther@suse.de>
10482 PR middle-end/110495
10483 * tree.h (TREE_OVERFLOW): Do not mention VECTOR_CSTs
10484 since we do not set TREE_OVERFLOW on those since the
10485 introduction of VL vectors.
10486 * match.pd (x +- CST +- CST): For VECTOR_CST do not look
10487 at TREE_OVERFLOW to determine validity of association.
10489 2023-07-04 Richard Biener <rguenther@suse.de>
10491 PR tree-optimization/110310
10492 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
10493 Move costing part ...
10494 (vect_analyze_loop_costing): ... here. Integrate better
10495 estimate for epilogues from ...
10496 (vect_analyze_loop_2): Call vect_determine_partial_vectors_and_peeling
10497 with actual epilogue status.
10498 * tree-vect-loop-manip.cc (vect_do_peeling): ... here and
10499 avoid cancelling epilogue vectorization.
10500 (vect_update_epilogue_niters): Remove. No longer update
10501 epilogue LOOP_VINFO_NITERS.
10503 2023-07-04 Pan Li <pan2.li@intel.com>
10506 2023-07-03 Pan Li <pan2.li@intel.com>
10508 * config/riscv/vector.md: Fix typo.
10510 2023-07-04 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10512 * doc/md.texi: Add len_mask_gather_load/len_mask_scatter_store.
10513 * internal-fn.cc (expand_scatter_store_optab_fn): Ditto.
10514 (expand_gather_load_optab_fn): Ditto.
10515 (internal_load_fn_p): Ditto.
10516 (internal_store_fn_p): Ditto.
10517 (internal_gather_scatter_fn_p): Ditto.
10518 (internal_fn_len_index): Ditto.
10519 (internal_fn_mask_index): Ditto.
10520 (internal_fn_stored_value_index): Ditto.
10521 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
10522 (LEN_MASK_SCATTER_STORE): Ditto.
10523 * optabs.def (OPTAB_CD): Ditto.
10525 2023-07-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10527 * config/riscv/riscv-vsetvl.cc
10528 (vector_insn_info::parse_insn): Add early break.
10530 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
10532 * config/cris/cris.md (CRIS_UNSPEC_SWAP_BITS): Remove.
10533 ("cris_swap_bits", "ctzsi2"): Use bitreverse instead.
10535 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
10537 * dwarf2out.cc (mem_loc_descriptor): Handle BITREVERSE.
10539 2023-07-03 Christoph Müllner <christoph.muellner@vrull.eu>
10541 * common/config/riscv/riscv-common.cc: Add support for zvbb,
10542 zvbc, zvkg, zvkned, zvknha, zvknhb, zvksed, zvksh, zvkn,
10543 zvknc, zvkng, zvks, zvksc, zvksg, zvkt and the implied subsets.
10544 * config/riscv/arch-canonicalize: Add canonicalization info for
10545 zvkn, zvknc, zvkng, zvks, zvksc, zvksg.
10546 * config/riscv/riscv-opts.h (MASK_ZVBB): New macro.
10547 (MASK_ZVBC): Likewise.
10548 (TARGET_ZVBB): Likewise.
10549 (TARGET_ZVBC): Likewise.
10550 (MASK_ZVKG): Likewise.
10551 (MASK_ZVKNED): Likewise.
10552 (MASK_ZVKNHA): Likewise.
10553 (MASK_ZVKNHB): Likewise.
10554 (MASK_ZVKSED): Likewise.
10555 (MASK_ZVKSH): Likewise.
10556 (MASK_ZVKN): Likewise.
10557 (MASK_ZVKNC): Likewise.
10558 (MASK_ZVKNG): Likewise.
10559 (MASK_ZVKS): Likewise.
10560 (MASK_ZVKSC): Likewise.
10561 (MASK_ZVKSG): Likewise.
10562 (MASK_ZVKT): Likewise.
10563 (TARGET_ZVKG): Likewise.
10564 (TARGET_ZVKNED): Likewise.
10565 (TARGET_ZVKNHA): Likewise.
10566 (TARGET_ZVKNHB): Likewise.
10567 (TARGET_ZVKSED): Likewise.
10568 (TARGET_ZVKSH): Likewise.
10569 (TARGET_ZVKN): Likewise.
10570 (TARGET_ZVKNC): Likewise.
10571 (TARGET_ZVKNG): Likewise.
10572 (TARGET_ZVKS): Likewise.
10573 (TARGET_ZVKSC): Likewise.
10574 (TARGET_ZVKSG): Likewise.
10575 (TARGET_ZVKT): Likewise.
10576 * config/riscv/riscv.opt: Introduction of riscv_zv{b,k}_subext.
10578 2023-07-03 Andrew Pinski <apinski@marvell.com>
10580 PR middle-end/110510
10581 * except.h (struct eh_landing_pad_d): Add chain_next GTY.
10583 2023-07-03 Iain Sandoe <iain@sandoe.co.uk>
10585 * config/darwin.h: Avoid duplicate multiply_defined specs on
10586 earlier Darwin versions with shared libgcc.
10588 2023-07-03 Uros Bizjak <ubizjak@gmail.com>
10590 * tree.h (tree_int_cst_equal): Change return type from int to bool.
10591 (operand_equal_for_phi_arg_p): Ditto.
10592 (tree_map_base_marked_p): Ditto.
10593 * tree.cc (contains_placeholder_p): Update function body
10594 for bool return type.
10595 (type_cache_hasher::equal): Ditto.
10596 (tree_map_base_hash): Change return type
10597 from int to void and adjust function body accordingly.
10598 (tree_int_cst_equal): Ditto.
10599 (operand_equal_for_phi_arg_p): Ditto.
10600 (get_narrower): Change "first" variable to bool.
10601 (cl_option_hasher::equal): Update function body for bool return type.
10602 * ggc.h (ggc_set_mark): Change return type from int to bool.
10603 (ggc_marked_p): Ditto.
10604 * ggc-page.cc (gt_ggc_mx): Change return type
10605 from int to void and adjust function body accordingly.
10606 (ggc_set_mark): Ditto.
10608 2023-07-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10610 * config/riscv/autovec.md: Change order of
10611 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
10612 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
10613 * doc/md.texi: Ditto.
10614 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Ditto.
10615 * internal-fn.cc (len_maskload_direct): Ditto.
10616 (len_maskstore_direct): Ditto.
10617 (add_len_and_mask_args): New function.
10618 (expand_partial_load_optab_fn): Change order of
10619 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
10620 (expand_partial_store_optab_fn): Ditto.
10621 (internal_fn_len_index): New function.
10622 (internal_fn_mask_index): Change order of
10623 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
10624 (internal_fn_stored_value_index): Ditto.
10625 (internal_len_load_store_bias): Ditto.
10626 * internal-fn.h (internal_fn_len_index): New function.
10627 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Change order of
10628 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
10629 * tree-vect-stmts.cc (vectorizable_store): Ditto.
10630 (vectorizable_load): Ditto.
10632 2023-07-03 Gaius Mulley <gaiusmod2@gmail.com>
10635 * doc/gm2.texi (Semantic checking): Include examples using
10636 -Wuninit-variable-checking.
10638 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10640 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
10641 (*single_widen_fnma<mode>): Ditto.
10642 (*double_widen_fms<mode>): Ditto.
10643 (*single_widen_fms<mode>): Ditto.
10644 (*double_widen_fnms<mode>): Ditto.
10645 (*single_widen_fnms<mode>): Ditto.
10647 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10649 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>): Change "@"
10650 into "*" in pattern name which simplifies build files.
10651 (*pred_single_widen_mul<any_extend:su><mode>): Ditto.
10652 (*pred_single_widen_mul<mode>): New pattern.
10654 2023-07-03 Richard Sandiford <richard.sandiford@arm.com>
10656 * config/aarch64/aarch64-simd.md (vec_extract<mode><Vhalf>): Expect
10657 the index to be 0 or 1.
10659 2023-07-03 Lehua Ding <lehua.ding@rivai.ai>
10662 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10664 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
10665 (*single_widen_fnma<mode>): Ditto.
10666 (*double_widen_fms<mode>): Ditto.
10667 (*single_widen_fms<mode>): Ditto.
10668 (*double_widen_fnms<mode>): Ditto.
10669 (*single_widen_fnms<mode>): Ditto.
10671 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10673 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
10674 (*single_widen_fnma<mode>): Ditto.
10675 (*double_widen_fms<mode>): Ditto.
10676 (*single_widen_fms<mode>): Ditto.
10677 (*double_widen_fnms<mode>): Ditto.
10678 (*single_widen_fnms<mode>): Ditto.
10680 2023-07-03 Pan Li <pan2.li@intel.com>
10682 * config/riscv/vector.md: Fix typo.
10684 2023-07-03 Richard Biener <rguenther@suse.de>
10686 PR tree-optimization/110506
10687 * tree-vect-patterns.cc (vect_recog_rotate_pattern): Re-order
10688 TYPE_PRECISION access with INTEGRAL_TYPE_P check.
10690 2023-07-03 Richard Biener <rguenther@suse.de>
10692 PR tree-optimization/110506
10693 * tree-ssa-ccp.cc (get_value_for_expr): Check for integral
10694 type before relying on TYPE_PRECISION to produce a nonzero mask.
10696 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
10698 * config/mips/mips.md(*and<mode>3_mips16): Generates
10699 ZEB/ZEH instructions.
10701 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
10703 * config/mips/mips.cc(mips_9bit_offset_address_p): Restrict the
10704 address register to M16_REGS for MIPS16.
10705 (BUILTIN_AVAIL_MIPS16E2): Defined a new macro.
10706 (AVAIL_MIPS16E2_OR_NON_MIPS16): Same as above.
10707 (AVAIL_NON_MIPS16 (cache..)): Update to
10708 AVAIL_MIPS16E2_OR_NON_MIPS16.
10709 * config/mips/mips.h (ISA_HAS_CACHE): Add clause for ISA_HAS_MIPS16E2.
10710 * config/mips/mips.md (mips_cache): Mark as extended MIPS16.
10712 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
10714 * config/mips/mips.h(ISA_HAS_9BIT_DISPLACEMENT): Add clause
10715 for ISA_HAS_MIPS16E2.
10716 (ISA_HAS_SYNC): Same as above.
10717 (ISA_HAS_LL_SC): Same as above.
10719 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
10721 * config/mips/mips.cc(mips_expand_ins_as_unaligned_store):
10722 Add logics for generating instruction.
10723 * config/mips/mips.h(ISA_HAS_LWL_LWR): Add clause for ISA_HAS_MIPS16E2.
10724 * config/mips/mips.md(mov_<load>l): Generates instructions.
10725 (mov_<load>r): Same as above.
10726 (mov_<store>l): Adjusted for the conditions above.
10727 (mov_<store>r): Same as above.
10728 (mov_<store>l_mips16e2): Add machine description for `define_insn mov_<store>l_mips16e2`.
10729 (mov_<store>r_mips16e2): Add machine description for `define_insn mov_<store>r_mips16e2`.
10731 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
10733 * config/mips/mips.cc(mips_symbol_insns_1): Generates LUI instruction.
10734 (mips_const_insns): Same as above.
10735 (mips_output_move): Same as above.
10736 (mips_output_function_prologue): Same as above.
10737 * config/mips/mips.md: Same as above
10739 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
10741 * config/mips/constraints.md(Yz): New constraints for mips16e2.
10742 * config/mips/mips-protos.h(mips_bit_clear_p): Declared new function.
10743 (mips_bit_clear_info): Same as above.
10744 * config/mips/mips.cc(mips_bit_clear_info): New function for
10745 generating instructions.
10746 (mips_bit_clear_p): Same as above.
10747 * config/mips/mips.h(ISA_HAS_EXT_INS): Add clause for ISA_HAS_MIPS16E2.
10748 * config/mips/mips.md(extended_mips16): Generates EXT and INS instructions.
10749 (*and<mode>3): Generates INS instruction.
10750 (*and<mode>3_mips16): Generates EXT, INS and ANDI instructions.
10751 (ior<mode>3): Add logics for ORI instruction.
10752 (*ior<mode>3_mips16_asmacro): Generates ORI instrucion.
10753 (*ior<mode>3_mips16): Add logics for XORI instruction.
10754 (*xor<mode>3_mips16): Generates XORI instrucion.
10755 (*extzv<mode>): Add logics for EXT instruction.
10756 (*insv<mode>): Add logics for INS instruction.
10757 * config/mips/predicates.md(bit_clear_operand): New predicate for
10758 generating bitwise instructions.
10759 (and_reg_operand): Add logics for generating bitwise instructions.
10761 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
10763 * config/mips/mips.cc(mips_regno_mode_ok_for_base_p): Generate instructions
10764 that uses global pointer register.
10765 (mips16_unextended_reference_p): Same as above.
10766 (mips_pic_base_register): Same as above.
10767 (mips_init_relocs): Same as above.
10768 * config/mips/mips.h(MIPS16_GP_LOADS): Defined a new macro.
10769 (GLOBAL_POINTER_REGNUM): Moved to machine description `mips.md`.
10770 * config/mips/mips.md(GLOBAL_POINTER_REGNUM): Moved to here from above.
10771 (*lowsi_mips16_gp):New `define_insn *low<mode>_mips16`.
10773 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
10775 * config/mips/mips.h(ISA_HAS_CONDMOVE): Add condition for ISA_HAS_MIPS16E2.
10776 * config/mips/mips.md(*mov<GPR:mode>_on_<MOVECC:mode>): Add logics for MOVx insts.
10777 (*mov<GPR:mode>_on_<MOVECC:mode>_mips16e2): Generate MOVx instruction.
10778 (*mov<GPR:mode>_on_<GPR2:mode>_ne): Add logics for MOVx insts.
10779 (*mov<GPR:mode>_on_<GPR2:mode>_ne_mips16e2): Generate MOVx instruction.
10780 * config/mips/predicates.md(reg_or_0_operand_mips16e2): New predicate for MOVx insts.
10782 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
10784 * config/mips/mips.cc(mips_file_start): Add mips16e2 info
10786 * config/mips/mips.h(__mips_mips16e2): Defined a new
10788 (ISA_HAS_MIPS16E2): Defined a new macro.
10789 (ASM_SPEC): Pass mmips16e2 to the assembler.
10790 * config/mips/mips.opt: Add -m(no-)mips16e2 option.
10791 * config/mips/predicates.md: Add clause for TARGET_MIPS16E2.
10792 * doc/invoke.texi: Add -m(no-)mips16e2 option..
10794 2023-07-02 Jakub Jelinek <jakub@redhat.com>
10796 PR tree-optimization/110508
10797 * tree-ssa-math-opts.cc (match_uaddc_usubc): Only replace re2 with
10798 REALPART_EXPR opf nlhs if re2 is non-NULL.
10800 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
10802 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
10804 * config/xtensa/xtensa.md (*xtensa_clamps):
10805 Add TARGET_MINMAX to the condition.
10807 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
10809 * config/xtensa/xtensa.md (*eqne_INT_MIN):
10810 Add missing ":SI" to the match_operator.
10812 2023-07-02 Iain Sandoe <iain@sandoe.co.uk>
10815 * config/darwin.opt: Add fconstant-cfstrings alias to
10816 mconstant-cfstrings.
10817 * doc/invoke.texi: Amend invocation descriptions to reflect
10818 that the fconstant-cfstrings is a target-option alias and to
10819 add the missing mconstant-cfstrings option description to the
10822 2023-07-01 Jan Hubicka <jh@suse.cz>
10824 * tree-cfg.cc (gimple_duplicate_sese_region): Add elliminated_edge
10825 parmaeter; update profile.
10826 * tree-cfg.h (gimple_duplicate_sese_region): Update prototype.
10827 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Rename to ...
10828 (static_loop_exit): ... this; return the edge to be elliminated.
10829 (ch_base::copy_headers): Handle profile updating for eliminated exits.
10831 2023-07-01 Roger Sayle <roger@nextmovesoftware.com>
10833 * config/i386/i386-features.cc (compute_convert_gain): Provide
10834 gains/costs for ROTATE and ROTATERT (by an integer constant).
10835 (general_scalar_chain::convert_rotate): New helper function to
10836 convert a DImode or SImode rotation by an integer constant into
10838 (general_scalar_chain::convert_insn): Call the new convert_rotate
10839 for ROTATE and ROTATERT.
10840 (general_scalar_to_vector_candidate_p): Consider ROTATE and
10841 ROTATERT to be candidates if the second operand is an integer
10842 constant, valid for a rotation (or shift) in the given mode.
10843 * config/i386/i386-features.h (general_scalar_chain): Add new
10844 helper method convert_rotate.
10846 2023-07-01 Jan Hubicka <jh@suse.cz>
10848 PR tree-optimization/103680
10849 * cfg.cc (update_bb_profile_for_threading): Fix profile update;
10850 make message clearer.
10852 2023-06-30 Qing Zhao <qing.zhao@oracle.com>
10854 PR tree-optimization/101832
10855 * tree-object-size.cc (addr_object_size): Handle structure/union type
10856 when it has flexible size.
10858 2023-06-30 Eric Botcazou <ebotcazou@adacore.com>
10860 * gimple-fold.cc (fold_array_ctor_reference): Fix head comment.
10861 (fold_nonarray_ctor_reference): Likewise. Specifically deal
10862 with integral bit-fields.
10863 (fold_ctor_reference): Make sure that the constructor uses the
10864 native storage order.
10866 2023-06-30 Jan Hubicka <jh@suse.cz>
10868 PR middle-end/109849
10869 * predict.cc (estimate_bb_frequencies): Turn to static function.
10870 (expr_expected_value_1): Fix handling of binary expressions with
10872 * predict.def (PRED_MALLOC_NONNULL): Move later in the priority queue.
10873 (PRED_BUILTIN_EXPECT_WITH_PROBABILITY): Move to almost top of the priority
10875 * predict.h (estimate_bb_frequencies): No longer declare it.
10877 2023-06-30 Uros Bizjak <ubizjak@gmail.com>
10879 * fold-const.h (multiple_of_p): Change return type from int to bool.
10880 * fold-const.cc (split_tree): Change negl_p, neg_litp_p,
10881 neg_conp_p and neg_var_p variables to bool.
10882 (const_binop): Change sat_p variable to bool.
10883 (merge_ranges): Change no_overlap variable to bool.
10884 (extract_muldiv_1): Change same_p variable to bool.
10885 (tree_swap_operands_p): Update function body for bool return type.
10886 (fold_truth_andor): Change commutative variable to bool.
10887 (multiple_of_p): Change return type
10888 from int to void and adjust function body accordingly.
10889 * optabs.h (expand_twoval_unop): Change return type from int to bool.
10890 (expand_twoval_binop): Ditto.
10891 (can_compare_p): Ditto.
10892 (have_add2_insn): Ditto.
10893 (have_addptr3_insn): Ditto.
10894 (have_sub2_insn): Ditto.
10895 (have_insn_for): Ditto.
10896 * optabs.cc (add_equal_note): Ditto.
10897 (widen_operand): Change no_extend argument from int to bool.
10898 (expand_binop): Ditto.
10899 (expand_twoval_unop): Change return type
10900 from int to void and adjust function body accordingly.
10901 (expand_twoval_binop): Ditto.
10902 (can_compare_p): Ditto.
10903 (have_add2_insn): Ditto.
10904 (have_addptr3_insn): Ditto.
10905 (have_sub2_insn): Ditto.
10906 (have_insn_for): Ditto.
10908 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
10910 * config/aarch64/aarch64-simd.md
10911 (vec_widen_<su>abdl_lo_<mode>, vec_widen_<su>abdl_hi_<mode>):
10912 Expansions for abd vec widen optabs.
10913 (aarch64_<su>abdl<mode>_insn): VQW based abdl RTL.
10914 * config/aarch64/iterators.md (USMAX_EXT): Code attributes
10915 that give the appropriate extend RTL for the max RTL.
10917 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
10919 * internal-fn.def (VEC_WIDEN_ABD): New internal hilo optab.
10920 * optabs.def (vec_widen_sabd_optab,
10921 vec_widen_sabd_hi_optab, vec_widen_sabd_lo_optab,
10922 vec_widen_sabd_odd_even, vec_widen_sabd_even_optab,
10923 vec_widen_uabd_optab,
10924 vec_widen_uabd_hi_optab, vec_widen_uabd_lo_optab,
10925 vec_widen_uabd_odd_even, vec_widen_uabd_even_optab):
10927 * doc/md.texi: Document them.
10928 * tree-vect-patterns.cc (vect_recog_abd_pattern): Update to
10929 to build a VEC_WIDEN_ABD call if the input precision is smaller
10930 than the precision of the output.
10931 (vect_recog_widen_abd_pattern): Should an ABD expression be
10932 found preceeding an extension, replace the two with a
10935 2023-06-30 Pan Li <pan2.li@intel.com>
10937 * config/riscv/vector.md: Refactor the common condition.
10939 2023-06-30 Richard Biener <rguenther@suse.de>
10941 PR tree-optimization/110496
10942 * gimple-ssa-store-merging.cc (find_bswap_or_nop_1): Re-order
10943 verifying and TYPE_PRECISION query for the BIT_FIELD_REF case.
10945 2023-06-30 Richard Biener <rguenther@suse.de>
10947 PR middle-end/110489
10948 * statistics.cc (curr_statistics_hash): Add argument
10949 indicating whether we should allocate the hash.
10950 (statistics_fini_pass): If the hash isn't allocated
10951 only print the summary header.
10953 2023-06-30 Segher Boessenkool <segher@kernel.crashing.org>
10954 Thomas Schwinge <thomas@codesourcery.com>
10956 * config/nvptx/nvptx.cc (TARGET_LRA_P): Remove.
10958 2023-06-30 Jovan Dmitrović <jovan.dmitrovic@syrmia.com>
10961 * config/mips/mips.cc (mips_function_arg_alignment): Returns
10962 the alignment of function argument. In case of typedef type,
10963 it returns the aligment of the aliased type.
10964 (mips_function_arg_boundary): Relocated calculation of the
10965 aligment of function arguments.
10967 2023-06-29 Jan Hubicka <jh@suse.cz>
10969 PR tree-optimization/109849
10970 * ipa-fnsummary.cc (decompose_param_expr): Skip
10971 functions returning its parameter.
10972 (set_cond_stmt_execution_predicate): Return early
10973 if predicate was constructed.
10975 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
10978 * doc/extend.texi: Document GCC extension on a structure containing
10979 a flexible array member to be a member of another structure.
10981 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
10983 * print-tree.cc (print_node): Print new bit type_include_flexarray.
10984 * tree-core.h (struct tree_type_common): Use bit no_named_args_stdarg_p
10985 as type_include_flexarray for RECORD_TYPE or UNION_TYPE.
10986 * tree-streamer-in.cc (unpack_ts_type_common_value_fields): Stream
10987 in bit no_named_args_stdarg_p properly for its corresponding type.
10988 * tree-streamer-out.cc (pack_ts_type_common_value_fields): Stream
10989 out bit no_named_args_stdarg_p properly for its corresponding type.
10990 * tree.h (TYPE_INCLUDES_FLEXARRAY): New macro TYPE_INCLUDES_FLEXARRAY.
10992 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
10994 * tree-vrp.cc (maybe_set_nonzero_bits): Move from here...
10995 * tree-ssa-dom.cc (maybe_set_nonzero_bits): ...to here.
10996 * tree-vrp.h (maybe_set_nonzero_bits): Remove.
10998 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
11000 * value-range.cc (frange::set): Do not call verify_range.
11001 (frange::normalize_kind): Verify range.
11002 (frange::union_nans): Do not call verify_range.
11003 (frange::union_): Same.
11004 (frange::intersect): Same.
11005 (irange::irange_single_pair_union): Call normalize_kind if
11007 (irange::union_): Same.
11008 (irange::intersect): Same.
11009 (irange::set_range_from_nonzero_bits): Verify range.
11010 (irange::set_nonzero_bits): Call normalize_kind if necessary.
11011 (irange::get_nonzero_bits): Tweak comment.
11012 (irange::intersect_nonzero_bits): Call normalize_kind if
11014 (irange::union_nonzero_bits): Same.
11015 * value-range.h (irange::normalize_kind): Verify range.
11017 2023-06-29 Uros Bizjak <ubizjak@gmail.com>
11019 * cselib.h (rtx_equal_for_cselib_1):
11020 Change return type from int to bool.
11021 (references_value_p): Ditto.
11022 (rtx_equal_for_cselib_p): Ditto.
11023 * expr.h (can_store_by_pieces): Ditto.
11024 (try_casesi): Ditto.
11025 (try_tablejump): Ditto.
11026 (safe_from_p): Ditto.
11027 * sbitmap.h (bitmap_equal_p): Ditto.
11028 * cselib.cc (references_value_p): Change return type
11029 from int to void and adjust function body accordingly.
11030 (rtx_equal_for_cselib_1): Ditto.
11031 * expr.cc (is_aligning_offset): Ditto.
11032 (can_store_by_pieces): Ditto.
11033 (mostly_zeros_p): Ditto.
11034 (all_zeros_p): Ditto.
11035 (safe_from_p): Ditto.
11036 (is_aligning_offset): Ditto.
11037 (try_casesi): Ditto.
11038 (try_tablejump): Ditto.
11039 (store_constructor): Change "need_to_clear" and
11040 "const_bounds_p" variables to bool.
11041 * sbitmap.cc (bitmap_equal_p): Change return type from int to bool.
11043 2023-06-29 Robin Dapp <rdapp@ventanamicro.com>
11045 * tree-ssa-math-opts.cc (divmod_candidate_p): Use
11048 2023-06-29 Richard Biener <rguenther@suse.de>
11050 PR tree-optimization/110460
11051 * tree-vect-stmts.cc (get_related_vectype_for_scalar_type):
11052 Only allow integral, pointer and scalar float type scalar_type.
11054 2023-06-29 Lili Cui <lili.cui@intel.com>
11056 PR tree-optimization/110148
11057 * tree-ssa-reassoc.cc (rewrite_expr_tree_parallel): Handle loop-carried
11058 ops in this function.
11060 2023-06-29 Richard Biener <rguenther@suse.de>
11062 PR middle-end/110452
11063 * expr.cc (store_constructor): Handle uniform boolean
11064 vectors with integer mode specially.
11066 2023-06-29 Richard Biener <rguenther@suse.de>
11068 PR middle-end/110461
11069 * match.pd (bitop (convert@2 @0) (convert?@3 @1)): Disable
11072 2023-06-29 Richard Sandiford <richard.sandiford@arm.com>
11074 * vec.h (gt_pch_nx): Add overloads for va_gc_atomic.
11075 (array_slice): Relax va_gc constructor to handle all vectors
11076 with a vl_embed layout.
11078 2023-06-29 Pan Li <pan2.li@intel.com>
11080 * config/riscv/riscv.cc (riscv_emit_mode_set): Add emit for FRM.
11081 (riscv_mode_needed): Likewise.
11082 (riscv_entity_mode_after): Likewise.
11083 (riscv_mode_after): Likewise.
11084 (riscv_mode_entry): Likewise.
11085 (riscv_mode_exit): Likewise.
11086 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Add number
11088 * config/riscv/riscv.md: Add FRM register.
11089 * config/riscv/vector-iterators.md: Add FRM type.
11090 * config/riscv/vector.md (frm_mode): Define new attr for FRM mode.
11091 (fsrm): Define new insn for fsrm instruction.
11093 2023-06-29 Pan Li <pan2.li@intel.com>
11095 * config/riscv/riscv-protos.h (enum floating_point_rounding_mode):
11096 Add macro for static frm min and max.
11097 * config/riscv/riscv-vector-builtins-bases.cc
11098 (class binop_frm): New class for floating-point with frm.
11099 (BASE): Add vfadd for frm.
11100 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
11101 * config/riscv/riscv-vector-builtins-functions.def
11102 (vfadd_frm): Likewise.
11103 * config/riscv/riscv-vector-builtins-shapes.cc
11104 (struct alu_frm_def): New struct for alu with frm.
11105 (SHAPE): Add alu with frm.
11106 * config/riscv/riscv-vector-builtins-shapes.h: Likewise.
11107 * config/riscv/riscv-vector-builtins.cc
11108 (function_checker::report_out_of_range_and_not): New function
11109 for report out of range and not val.
11110 (function_checker::require_immediate_range_or): New function
11111 for checking in range or one val.
11112 * config/riscv/riscv-vector-builtins.h: Add function decl.
11114 2023-06-29 Cui, Lili <lili.cui@intel.com>
11116 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8
11117 from Rocketlake, move model value 0xbf from Alderlake to Raptorlake.
11119 2023-06-28 Hans-Peter Nilsson <hp@axis.com>
11122 * config/cris/cris.cc (cris_postdbr_cmpelim): Don't apply PATTERN
11123 to insn before validating it.
11125 2023-06-28 Jan Hubicka <jh@suse.cz>
11127 PR middle-end/110334
11128 * ipa-fnsummary.h (ipa_fn_summary): Add
11129 safe_to_inline_to_always_inline.
11130 * ipa-inline.cc (can_early_inline_edge_p): ICE
11131 if SSA is not built; do cycle checking for
11132 always_inline functions.
11133 (inline_always_inline_functions): Be recrusive;
11134 watch for cycles; do not updat overall summary.
11135 (early_inliner): Do not give up on always_inlines.
11136 * ipa-utils.cc (ipa_reverse_postorder): Do not skip
11139 2023-06-28 Uros Bizjak <ubizjak@gmail.com>
11141 * output.h (leaf_function_p): Change return type from int to bool.
11142 (final_forward_branch_p): Ditto.
11143 (only_leaf_regs_used): Ditto.
11144 (maybe_assemble_visibility): Ditto.
11145 * varasm.h (supports_one_only): Ditto.
11146 * rtl.h (compute_alignments): Change return type from int to void.
11147 * final.cc (app_on): Change return type from int to bool.
11148 (compute_alignments): Change return type from int to void
11149 and adjust function body accordingly.
11150 (shorten_branches): Change "something_changed" variable
11151 type from int to bool.
11152 (leaf_function_p): Change return type from int to bool
11153 and adjust function body accordingly.
11154 (final_forward_branch_p): Ditto.
11155 (only_leaf_regs_used): Ditto.
11156 * varasm.cc (contains_pointers_p): Change return type from
11157 int to bool and adjust function body accordingly.
11158 (compare_constant): Ditto.
11159 (maybe_assemble_visibility): Ditto.
11160 (supports_one_only): Ditto.
11162 2023-06-28 Manolis Tsamis <manolis.tsamis@vrull.eu>
11165 * regcprop.cc (maybe_mode_change): Check stack_pointer_rtx mode.
11166 (maybe_copy_reg_attrs): New function.
11167 (find_oldest_value_reg): Use maybe_copy_reg_attrs.
11168 (copyprop_hardreg_forward_1): Ditto.
11170 2023-06-28 Richard Biener <rguenther@suse.de>
11172 PR tree-optimization/110434
11173 * tree-nrv.cc (pass_nrv::execute): Remove CLOBBERs of
11174 VAR we replace with <retval>.
11176 2023-06-28 Richard Biener <rguenther@suse.de>
11178 PR tree-optimization/110451
11179 * tree-ssa-loop-im.cc (stmt_cost): [VEC_]COND_EXPR and
11180 tcc_comparison are expensive.
11182 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
11184 * config/i386/i386-expand.cc (ix86_expand_branch): Also use ptest
11185 for TImode comparisons on 32-bit architectures.
11186 * config/i386/i386.md (cbranch<mode>4): Change from SDWIM to
11187 SWIM1248x to exclude/avoid TImode being conditional on -m64.
11188 (cbranchti4): New define_expand for TImode on both TARGET_64BIT
11189 and/or with TARGET_SSE4_1.
11190 * config/i386/predicates.md (ix86_timode_comparison_operator):
11191 New predicate that depends upon TARGET_64BIT.
11192 (ix86_timode_comparison_operand): Likewise.
11194 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
11197 * config/i386/i386-features.cc (compute_convert_gain): Provide
11198 more accurate gains for conversion of scalar comparisons to
11201 2023-06-28 Richard Biener <rguenther@suse.de>
11203 PR tree-optimization/110443
11204 * tree-vect-slp.cc (vect_build_slp_tree_1): Reject non-grouped
11207 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
11209 * config/rs6000/rs6000.md (peephole2 for compare_and_move): New.
11210 (peephole2 for move_and_compare): New.
11211 (mode_iterator WORD): New. Set the mode to SI/DImode by
11213 (*mov<mode>_internal2): Change the mode iterator from P to WORD.
11214 (split pattern for compare_and_move): Likewise.
11216 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11218 * config/riscv/autovec-opt.md (*double_widen_fma<mode>): New pattern.
11219 (*single_widen_fma<mode>): Ditto.
11221 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
11224 * config/rs6000/altivec.md (*altivec_vupkhs<VU_char>_direct): Rename
11226 (altivec_vupkhs<VU_char>_direct): ...this.
11227 * config/rs6000/predicates.md (vspltisw_vupkhsw_constant_split): New
11228 predicate to test if a constant can be loaded with vspltisw and
11230 (easy_vector_constant): Call vspltisw_vupkhsw_constant_p to Check if
11231 a vector constant can be synthesized with a vspltisw and a vupkhsw.
11232 * config/rs6000/rs6000-protos.h (vspltisw_vupkhsw_constant_p):
11234 * config/rs6000/rs6000.cc (vspltisw_vupkhsw_constant_p): New
11235 function to return true if OP mode is V2DI and can be synthesized
11236 with vupkhsw and vspltisw.
11237 * config/rs6000/vsx.md (*vspltisw_v2di_split): New insn to load up
11238 constants with vspltisw and vupkhsw.
11240 2023-06-28 Jan Hubicka <jh@suse.cz>
11242 PR tree-optimization/110377
11243 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Pass statement to
11245 (ipa_analyze_node): Enable ranger.
11247 2023-06-28 Richard Biener <rguenther@suse.de>
11249 * tree.h (TYPE_PRECISION): Check for non-VECTOR_TYPE.
11250 (TYPE_PRECISION_RAW): Provide raw access to the precision
11252 * tree.cc (verify_type_variant): Compare TYPE_PRECISION_RAW.
11253 (gimple_canonical_types_compatible_p): Likewise.
11254 * tree-streamer-out.cc (pack_ts_type_common_value_fields):
11255 Stream TYPE_PRECISION_RAW.
11256 * tree-streamer-in.cc (unpack_ts_type_common_value_fields):
11258 * lto-streamer-out.cc (hash_tree): Hash TYPE_PRECISION_RAW.
11260 2023-06-28 Alexandre Oliva <oliva@adacore.com>
11262 * doc/extend.texi (zero-call-used-regs): Document leafy and
11264 * flag-types.h (zero_regs_flags): Add LEAFY_MODE, as well as
11265 LEAFY and variants.
11266 * function.cc (gen_call_ued_regs_seq): Set only_used for leaf
11267 functions in leafy mode.
11268 * opts.cc (zero_call_used_regs_opts): Add leafy and variants.
11270 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11272 * config/riscv/riscv-vector-builtins-bases.cc: Adapt expand.
11273 * config/riscv/vector.md (@pred_single_widen_<plus_minus:optab><mode>):
11275 (@pred_single_widen_add<mode>): New pattern.
11276 (@pred_single_widen_sub<mode>): New pattern.
11278 2023-06-28 liuhongt <hongtao.liu@intel.com>
11280 * config/i386/i386.cc (ix86_invalid_conversion): New function.
11281 (TARGET_INVALID_CONVERSION): Define as
11282 ix86_invalid_conversion.
11284 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
11286 * config/riscv/autovec.md (<optab><vnconvert><mode>2): New
11288 (<float_cvt><vnconvert><mode>2): Ditto.
11289 (<optab><mode><vnconvert>2): Ditto.
11290 (<float_cvt><mode><vnconvert>2): Ditto.
11291 * config/riscv/vector-iterators.md: Add vnconvert.
11293 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
11295 * config/riscv/autovec.md (extend<v_double_trunc><mode>2): New
11297 (extend<v_quad_trunc><mode>2): Ditto.
11298 (trunc<mode><v_double_trunc>2): Ditto.
11299 (trunc<mode><v_quad_trunc>2): Ditto.
11300 * config/riscv/vector-iterators.md: Add VQEXTF and HF to
11301 V_QUAD_TRUNC and v_quad_trunc.
11303 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
11305 * config/riscv/autovec.md (<float_cvt><vconvert><mode>2): New
11308 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
11310 * config/riscv/autovec.md (copysign<mode>3): Add expander.
11311 (xorsign<mode>3): Ditto.
11312 * config/riscv/riscv-vector-builtins-bases.cc (class vfsgnjn):
11314 * config/riscv/vector-iterators.md (copysign): Remove ncopysign.
11318 * config/riscv/vector.md (@pred_ncopysign<mode>): Split off.
11319 (@pred_ncopysign<mode>_scalar): Ditto.
11321 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
11323 * config/riscv/autovec.md: VF_AUTO -> VF.
11324 * config/riscv/vector-iterators.md: Introduce VF_ZVFHMIN,
11325 VWEXTF_ZVFHMIN and use TARGET_ZVFH in VWCONVERTI, VHF and
11327 * config/riscv/vector.md: Use new iterators.
11329 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
11331 * match.pd: Use element_mode and check if target supports
11332 operation with new type.
11334 2023-06-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
11336 * config/aarch64/aarch64-sve-builtins-base.cc
11337 (svdupq_impl::fold_nonconst_dupq): New method.
11338 (svdupq_impl::fold): Call fold_nonconst_dupq.
11340 2023-06-27 Andrew Pinski <apinski@marvell.com>
11342 PR middle-end/110420
11343 PR middle-end/103979
11344 PR middle-end/98619
11345 * gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile.
11347 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
11349 * ipa-cp.cc (decide_whether_version_node): Adjust comment.
11350 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Adjust
11352 (set_switch_stmt_execution_predicate): Same.
11353 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
11355 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
11357 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Adjust for use with
11358 ipa_vr instead of value_range.
11361 (ipa_get_value_range): Same.
11362 * value-range.cc (gt_pch_nx): Move to ipa-prop.cc and adjust for
11366 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
11368 * ipa-cp.cc (ipa_vr_operation_and_type_effects): New.
11369 * ipa-prop.cc (ipa_get_value_range): Adjust for ipa_vr.
11370 (ipa_set_jfunc_vr): Take a range.
11371 (ipa_compute_jump_functions_for_edge): Pass range to
11373 (ipa_write_jump_function): Call streamer write helper.
11374 (ipa_read_jump_function): Call streamer read helper.
11375 * ipa-prop.h (class ipa_vr): Change m_vr to an ipa_vr.
11377 2023-06-27 Richard Sandiford <richard.sandiford@arm.com>
11379 * gengtype-parse.cc (consume_until_comma_or_eos): Parse "= { ... }"
11380 as a probable initializer rather than a probable complete statement.
11382 2023-06-27 Richard Biener <rguenther@suse.de>
11384 PR tree-optimization/96208
11385 * tree-vect-slp.cc (vect_build_slp_tree_1): Allow
11386 a non-grouped load if it is the same for all lanes.
11387 (vect_build_slp_tree_2): Handle not grouped loads.
11388 (vect_optimize_slp_pass::remove_redundant_permutations):
11390 (vect_transform_slp_perm_load_1): Likewise.
11391 * tree-vect-stmts.cc (vect_model_load_cost): Likewise.
11392 (get_group_load_store_type): Likewise. Handle
11393 invariant accesses.
11394 (vectorizable_load): Likewise.
11396 2023-06-27 liuhongt <hongtao.liu@intel.com>
11398 PR rtl-optimization/110237
11399 * config/i386/sse.md (<avx512>_store<mode>_mask): Refine with
11401 (maskstore<mode><avx512fmaskmodelower): Ditto.
11402 (*<avx512>_store<mode>_mask): New define_insn, it's renamed
11403 from original <avx512>_store<mode>_mask.
11405 2023-06-27 liuhongt <hongtao.liu@intel.com>
11407 * config/i386/i386-features.cc (pass_insert_vzeroupper:gate):
11408 Move flag_expensive_optimizations && !optimize_size to ..
11409 * config/i386/i386-options.cc (ix86_option_override_internal):
11410 .. this, it makes -mvzeroupper independent of optimization
11411 level, but still keeps the behavior of architecture
11412 tuning(emit_vzeroupper) unchanged.
11414 2023-06-27 liuhongt <hongtao.liu@intel.com>
11417 * config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit
11418 vzeroupper for vzeroupper call_insn.
11420 2023-06-27 Andrew Pinski <apinski@marvell.com>
11422 * doc/extend.texi (__builtin_alloca_with_align_and_max): Fix
11425 2023-06-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11427 * config/riscv/riscv-v.cc (expand_const_vector): Fix stepped vector
11430 2023-06-26 Andrew Pinski <apinski@marvell.com>
11432 * doc/extend.texi (access attribute): Add
11434 (interrupt/interrupt_handler attribute):
11437 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
11439 * config/aarch64/aarch64-simd.md (aarch64_sqrshrun_n<mode>_insn):
11440 Use <DWI> instead of <V2XWIDE>.
11441 (aarch64_sqrshrun_n<mode>): Likewise.
11443 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
11445 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rsra_rnd_imm_p):
11447 (aarch64_rnd_imm_p): ... This.
11448 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec):
11450 (aarch64_int_rnd_operand): ... This.
11451 (aarch64_simd_rshrn_imm_vec): Delete.
11452 * config/aarch64/aarch64-simd.md (aarch64_<sra_op>rsra_n<mode>_insn):
11453 Adjust for the above.
11454 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): Likewise.
11455 (*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
11456 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
11457 (aarch64_sqrshrun_n<mode>_insn): Likewise.
11458 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): Likewise.
11459 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): Likewise.
11460 (aarch64_sqrshrun2_n<mode>_insn_le): Likewise.
11461 (aarch64_sqrshrun2_n<mode>_insn_be): Likewise.
11462 * config/aarch64/aarch64.cc (aarch64_const_vec_rsra_rnd_imm_p):
11464 (aarch64_rnd_imm_p): ... This.
11466 2023-06-26 Andreas Krebbel <krebbel@linux.ibm.com>
11468 * config/s390/s390.cc (s390_encode_section_info): Set
11469 SYMBOL_FLAG_SET_NOTALIGN2 only if the symbol has explicitely been
11472 2023-06-26 Jan Hubicka <jh@suse.cz>
11474 PR tree-optimization/109849
11475 * tree-ssa-dce.cc (make_forwarders_with_degenerate_phis): Fix profile
11476 count of newly constructed forwarder block.
11478 2023-06-26 Andrew Carlotti <andrew.carlotti@arm.com>
11480 * doc/optinfo.texi: Fix "steam" -> "stream".
11482 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11484 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Add LEN_MASK_STORE and
11486 (dse_optimize_stmt): Add LEN_MASK_STORE.
11488 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11490 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Fix gimple
11491 fold of LOAD/STORE with length.
11493 2023-06-26 Andrew MacLeod <amacleod@redhat.com>
11495 * gimple-range-gori.cc (compute_operand1_and_operand2_range):
11496 Check for interdependence between operands 1 and 2.
11498 2023-06-26 Richard Sandiford <richard.sandiford@arm.com>
11500 * tree-vect-stmts.cc (vectorizable_conversion): Take multi_step_cvt
11501 into account when costing non-widening/truncating conversions.
11503 2023-06-26 Richard Biener <rguenther@suse.de>
11505 PR tree-optimization/110381
11506 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
11507 Materialize permutes before fold-left reductions.
11509 2023-06-26 Pan Li <pan2.li@intel.com>
11511 * config/riscv/riscv-vector-builtins-bases.h: Remove duplicated decl.
11513 2023-06-26 Richard Biener <rguenther@suse.de>
11515 * varasm.cc (initializer_constant_valid_p_1): Also
11516 constrain the type of value to be scalar integral
11517 before dispatching to narrowing_initializer_constant_valid_p.
11519 2023-06-26 Richard Biener <rguenther@suse.de>
11521 * tree-ssa-scopedtables.cc (hashable_expr_equal_p):
11522 Use element_precision.
11524 2023-06-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11526 * config/riscv/autovec.md (vcond<V:mode><VI:mode>): Remove redundant
11528 (vcondu<V:mode><VI:mode>): Ditto.
11529 * config/riscv/riscv-protos.h (expand_vcond): Ditto.
11530 * config/riscv/riscv-v.cc (expand_vcond): Ditto.
11532 2023-06-26 Richard Biener <rguenther@suse.de>
11534 PR tree-optimization/110392
11535 * gimple-predicate-analysis.cc (uninit_analysis::is_use_guarded):
11536 Do early exits on true/false predicate only after normalization.
11538 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11540 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Change name "len" into
11543 2023-06-26 Roger Sayle <roger@nextmovesoftware.com>
11545 * config/i386/i386.md (peephole2): Simplify zeroing a register
11546 followed by an IOR, XOR or PLUS operation on it, into a move.
11547 (*ashl<dwi>3_doubleword_highpart): New define_insn_and_split to
11548 eliminate (and hide from reload) unnecessary word to doubleword
11549 extensions that are followed by left shifts by sufficiently large,
11550 but valid, bit counts.
11552 2023-06-26 liuhongt <hongtao.liu@intel.com>
11554 PR tree-optimization/110371
11555 PR tree-optimization/110018
11556 * tree-vect-stmts.cc (vectorizable_conversion): Use cvt_op to
11557 save intermediate type operand instead of "subtle" vec_dest
11560 2023-06-26 liuhongt <hongtao.liu@intel.com>
11562 PR tree-optimization/110371
11563 PR tree-optimization/110018
11564 * tree-vect-stmts.cc (vectorizable_conversion): Don't use
11565 intermiediate type for FIX_TRUNC_EXPR when ftrapping-math.
11567 2023-06-26 Hongyu Wang <hongyu.wang@intel.com>
11569 * config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
11570 Override tune_string with arch_string if tune_string is not
11571 explicitly specified.
11573 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11575 * config/riscv/riscv-vsetvl.cc (vector_insn_info::parse_insn): Ehance
11577 * config/riscv/riscv-vsetvl.h: New function.
11579 2023-06-25 Li Xu <xuli1@eswincomputing.com>
11581 * config/riscv/riscv-vector-builtins-bases.cc: change emit_insn to
11584 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11586 * config/riscv/autovec.md (len_load_<mode>): Remove.
11587 (len_maskload<mode><vm>): Remove.
11588 (len_store_<mode>): New pattern.
11589 (len_maskstore<mode><vm>): New pattern.
11590 * config/riscv/predicates.md (autovec_length_operand): New predicate.
11591 * config/riscv/riscv-protos.h (enum insn_type): New enum.
11592 (expand_load_store): New function.
11593 * config/riscv/riscv-v.cc (emit_vlmax_masked_insn): Ditto.
11594 (emit_nonvlmax_masked_insn): Ditto.
11595 (expand_load_store): Ditto.
11596 * config/riscv/riscv-vector-builtins.cc
11597 (function_expander::use_contiguous_store_insn): Add avl_type operand
11599 * config/riscv/vector.md: Ditto.
11601 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11603 * internal-fn.cc (expand_partial_store_optab_fn): Fix bug of BIAS
11606 2023-06-25 Pan Li <pan2.li@intel.com>
11608 * config/riscv/vector.md: Revert.
11610 2023-06-25 Pan Li <pan2.li@intel.com>
11612 * config/riscv/genrvv-type-indexer.cc (valid_type): Revert changes.
11613 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): Ditto.
11614 (ADJUST_ALIGNMENT): Ditto.
11615 (RVV_TUPLE_PARTIAL_MODES): Ditto.
11616 (ADJUST_NUNITS): Ditto.
11617 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t): Ditto.
11618 (vfloat16mf4x3_t): Ditto.
11619 (vfloat16mf4x4_t): Ditto.
11620 (vfloat16mf4x5_t): Ditto.
11621 (vfloat16mf4x6_t): Ditto.
11622 (vfloat16mf4x7_t): Ditto.
11623 (vfloat16mf4x8_t): Ditto.
11624 (vfloat16mf2x2_t): Ditto.
11625 (vfloat16mf2x3_t): Ditto.
11626 (vfloat16mf2x4_t): Ditto.
11627 (vfloat16mf2x5_t): Ditto.
11628 (vfloat16mf2x6_t): Ditto.
11629 (vfloat16mf2x7_t): Ditto.
11630 (vfloat16mf2x8_t): Ditto.
11631 (vfloat16m1x2_t): Ditto.
11632 (vfloat16m1x3_t): Ditto.
11633 (vfloat16m1x4_t): Ditto.
11634 (vfloat16m1x5_t): Ditto.
11635 (vfloat16m1x6_t): Ditto.
11636 (vfloat16m1x7_t): Ditto.
11637 (vfloat16m1x8_t): Ditto.
11638 (vfloat16m2x2_t): Ditto.
11639 (vfloat16m2x3_t): Diito.
11640 (vfloat16m2x4_t): Diito.
11641 (vfloat16m4x2_t): Diito.
11642 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Ditto.
11643 (vfloat16mf4x3_t): Ditto.
11644 (vfloat16mf4x4_t): Ditto.
11645 (vfloat16mf4x5_t): Ditto.
11646 (vfloat16mf4x6_t): Ditto.
11647 (vfloat16mf4x7_t): Ditto.
11648 (vfloat16mf4x8_t): Ditto.
11649 (vfloat16mf2x2_t): Ditto.
11650 (vfloat16mf2x3_t): Ditto.
11651 (vfloat16mf2x4_t): Ditto.
11652 (vfloat16mf2x5_t): Ditto.
11653 (vfloat16mf2x6_t): Ditto.
11654 (vfloat16mf2x7_t): Ditto.
11655 (vfloat16mf2x8_t): Ditto.
11656 (vfloat16m1x2_t): Ditto.
11657 (vfloat16m1x3_t): Ditto.
11658 (vfloat16m1x4_t): Ditto.
11659 (vfloat16m1x5_t): Ditto.
11660 (vfloat16m1x6_t): Ditto.
11661 (vfloat16m1x7_t): Ditto.
11662 (vfloat16m1x8_t): Ditto.
11663 (vfloat16m2x2_t): Ditto.
11664 (vfloat16m2x3_t): Ditto.
11665 (vfloat16m2x4_t): Ditto.
11666 (vfloat16m4x2_t): Ditto.
11667 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
11668 * config/riscv/riscv.md: Ditto.
11669 * config/riscv/vector-iterators.md: Ditto.
11671 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11673 * gimple-fold.cc (arith_overflowed_p): Apply LEN_MASK_{LOAD,STORE}.
11674 (gimple_fold_partial_load_store_mem_ref): Ditto.
11675 (gimple_fold_partial_store): Ditto.
11676 (gimple_fold_call): Ditto.
11678 2023-06-25 liuhongt <hongtao.liu@intel.com>
11681 * config/i386/sse.md (maskload<mode><avx512fmaskmodelower>):
11682 Refine pattern with UNSPEC_MASKLOAD.
11683 (maskload<mode><avx512fmaskmodelower>): Ditto.
11684 (*<avx512>_load<mode>_mask): Extend mode iterator to
11686 (*<avx512>_load<mode>): Ditto.
11688 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11690 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): Add LEN_MASK_STORE.
11692 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11694 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Apply
11695 LEN_MASK_{LOAD,STORE}
11697 2023-06-25 yulong <shiyulong@iscas.ac.cn>
11699 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
11701 2023-06-24 Roger Sayle <roger@nextmovesoftware.com>
11703 * config/i386/i386.md (*<code>qi_ext<mode>_3): New define_insn.
11705 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11707 * config/riscv/autovec.md (*fma<mode>): set clobber to Pmode in expand stage.
11708 (*fma<VI:mode><P:mode>): Ditto.
11709 (*fnma<mode>): Ditto.
11710 (*fnma<VI:mode><P:mode>): Ditto.
11712 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11714 * config/riscv/autovec.md (fma<mode>4): New pattern.
11715 (*fma<mode>): Ditto.
11716 (fnma<mode>4): Ditto.
11717 (*fnma<mode>): Ditto.
11718 (fms<mode>4): Ditto.
11719 (*fms<mode>): Ditto.
11720 (fnms<mode>4): Ditto.
11721 (*fnms<mode>): Ditto.
11722 * config/riscv/riscv-protos.h (emit_vlmax_fp_ternary_insn):
11724 * config/riscv/riscv-v.cc (emit_vlmax_fp_ternary_insn): Ditto.
11725 * config/riscv/vector.md: Fix attribute bug.
11727 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11729 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn):
11730 Apply LEN_MASK_{LOAD,STORE}.
11732 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11734 * tree-ssa-loop-ivopts.cc (get_alias_ptr_type_for_ptr_address):
11735 Add LEN_MASK_{LOAD,STORE}.
11737 2023-06-24 David Malcolm <dmalcolm@redhat.com>
11739 * diagnostic-format-sarif.cc: Add #define INCLUDE_VECTOR.
11740 * diagnostic.cc: Likewise.
11741 * text-art/box-drawing.cc: Likewise.
11742 * text-art/canvas.cc: Likewise.
11743 * text-art/ruler.cc: Likewise.
11744 * text-art/selftests.cc: Likewise.
11745 * text-art/selftests.h (text_art::canvas): New forward decl.
11746 * text-art/style.cc: Add #define INCLUDE_VECTOR.
11747 * text-art/styled-string.cc: Likewise.
11748 * text-art/table.cc: Likewise.
11749 * text-art/table.h: Remove #include <vector>.
11750 * text-art/theme.cc: Add #define INCLUDE_VECTOR.
11751 * text-art/types.h: Check that INCLUDE_VECTOR is defined.
11752 Remove #include of <vector> and <string>.
11753 * text-art/widget.cc: Add #define INCLUDE_VECTOR.
11754 * text-art/widget.h: Remove #include <vector>.
11756 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11758 * internal-fn.cc (expand_partial_store_optab_fn): Adapt for LEN_MASK_STORE.
11759 (internal_load_fn_p): Add LEN_MASK_LOAD.
11760 (internal_store_fn_p): Add LEN_MASK_STORE.
11761 (internal_fn_mask_index): Add LEN_MASK_{LOAD,STORE}.
11762 (internal_fn_stored_value_index): Add LEN_MASK_STORE.
11763 (internal_len_load_store_bias): Add LEN_MASK_{LOAD,STORE}.
11764 * optabs-tree.cc (can_vec_mask_load_store_p): Adapt for LEN_MASK_{LOAD,STORE}.
11765 (get_len_load_store_mode): Ditto.
11766 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
11767 (get_len_load_store_mode): Ditto.
11768 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
11769 (get_all_ones_mask): New function.
11770 (vectorizable_store): Apply LEN_MASK_{LOAD,STORE} into vectorizer.
11771 (vectorizable_load): Ditto.
11773 2023-06-23 Marek Polacek <polacek@redhat.com>
11775 * doc/cpp.texi (__cplusplus): Document value for -std=c++26 and
11776 -std=gnu++26. Document that for C++23, its value is 202302L.
11777 * doc/invoke.texi: Document -std=c++26 and -std=gnu++26.
11778 * dwarf2out.cc (highest_c_language): Handle GNU C++26.
11779 (gen_compile_unit_die): Likewise.
11781 2023-06-23 Jan Hubicka <jh@suse.cz>
11783 * tree-ssa-phiprop.cc (propagate_with_phi): Compute post dominators on
11785 (pass_phiprop::execute): Do not compute it here; return
11786 update_ssa_only_virtuals if something changed.
11787 (pass_data_phiprop): Remove TODO_update_ssa from todos.
11789 2023-06-23 Michael Meissner <meissner@linux.ibm.com>
11790 Aaron Sawdey <acsawdey@linux.ibm.com>
11793 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
11794 allowed prefixed lwa to be generated.
11795 * config/rs6000/fusion.md: Regenerate.
11796 * config/rs6000/predicates.md (ds_form_mem_operand): Delete.
11797 * config/rs6000/rs6000.md (prefixed attribute): Add support for load
11798 plus compare immediate fused insns.
11799 (maybe_prefixed): Likewise.
11801 2023-06-23 Roger Sayle <roger@nextmovesoftware.com>
11803 * simplify-rtx.cc (simplify_subreg): Optimize lowpart SUBREGs
11804 of ASHIFT to const0_rtx with sufficiently large shift count.
11805 Optimize highpart SUBREGs of ASHIFT as the shift operand when
11806 the shift count is the correct offset. Optimize SUBREGs of
11807 multi-word logic operations if the SUBREGs of both operands
11810 2023-06-23 Richard Biener <rguenther@suse.de>
11812 * varasm.cc (initializer_constant_valid_p_1): Only
11813 allow conversions between scalar floating point types.
11815 2023-06-23 Richard Biener <rguenther@suse.de>
11817 * tree-vect-stmts.cc (vectorizable_assignment):
11818 Properly handle non-integral operands when analyzing
11821 2023-06-23 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
11823 PR tree-optimization/110280
11824 * match.pd (vec_perm_expr(v, v, mask) -> v): Explicitly build vector
11825 using build_vector_from_val with the element of input operand, and
11826 mask's type if operand and mask's types don't match.
11828 2023-06-23 Richard Biener <rguenther@suse.de>
11830 * fold-const.cc (tree_simple_nonnegative_warnv_p): Guard
11831 the truth_value_p case with !VECTOR_TYPE_P.
11833 2023-06-23 Richard Biener <rguenther@suse.de>
11835 * tree-vect-patterns.cc (vect_look_through_possible_promotion):
11836 Exit early when the type isn't scalar integral.
11838 2023-06-23 Richard Biener <rguenther@suse.de>
11840 * match.pd ((outertype)((innertype0)a+(innertype1)b)
11841 -> ((newtype)a+(newtype)b)): Use element_precision
11844 2023-06-23 Richard Biener <rguenther@suse.de>
11846 * fold-const.cc (fold_binary_loc): Use element_precision
11847 when trying (double)float1 CMP (double)float2 to
11848 float1 CMP float2 simplification.
11849 * match.pd: Likewise.
11851 2023-06-23 Richard Biener <rguenther@suse.de>
11853 * tree-vect-stmts.cc (vectorizable_load): Avoid useless
11854 copies of VMAT_INVARIANT vectorized stmts, fix SLP support.
11856 2023-06-23 Richard Biener <rguenther@suse.de>
11858 * tree-vect-stmts.cc (vector_vector_composition_type):
11859 Handle composition of a vector from a number of elements that
11860 happens to match its number of lanes.
11862 2023-06-22 Marek Polacek <polacek@redhat.com>
11864 * configure.ac (--enable-host-bind-now): New check. Add
11865 -Wl,-z,now to LD_PICFLAG if --enable-host-bind-now.
11866 * configure: Regenerate.
11867 * doc/install.texi: Document --enable-host-bind-now.
11869 2023-06-22 Di Zhao OS <dizhao@os.amperecomputing.com>
11871 * config/aarch64/aarch64.cc: Change fma_reassoc_width for ampere1.
11873 2023-06-22 Richard Biener <rguenther@suse.de>
11875 PR tree-optimization/110332
11876 * tree-ssa-phiprop.cc (propagate_with_phi): Always
11877 check aliasing with edge inserted loads.
11879 2023-06-22 Roger Sayle <roger@nextmovesoftware.com>
11880 Uros Bizjak <ubizjak@gmail.com>
11882 * config/i386/i386-expand.cc (ix86_expand_sse_ptest): Recognize
11883 expansion of ptestc with equal operands as producing const1_rtx.
11884 * config/i386/i386.cc (ix86_rtx_costs): Provide accurate cost
11885 estimates of UNSPEC_PTEST, where the ptest performs the PAND
11886 or PAND of its operands.
11887 * config/i386/sse.md (define_split): Transform CCCmode UNSPEC_PTEST
11888 of reg_equal_p operands into an x86_stc instruction.
11889 (define_split): Split pandn/ptestz/set{n?}e into ptestc/set{n?}c.
11890 (define_split): Similar to above for strict_low_part destinations.
11891 (define_split): Split pandn/ptestz/j{n?}e into ptestc/j{n?}c.
11893 2023-06-22 David Malcolm <dmalcolm@redhat.com>
11896 * Makefile.in (ANALYZER_OBJS): Add analyzer/access-diagram.o.
11897 * doc/invoke.texi (Wanalyzer-out-of-bounds): Add description of
11899 (fanalyzer-debug-text-art): New.
11901 2023-06-22 David Malcolm <dmalcolm@redhat.com>
11903 * Makefile.in (OBJS-libcommon): Add text-art/box-drawing.o,
11904 text-art/canvas.o, text-art/ruler.o, text-art/selftests.o,
11905 text-art/style.o, text-art/styled-string.o, text-art/table.o,
11906 text-art/theme.o, and text-art/widget.o.
11907 * color-macros.h (COLOR_FG_BRIGHT_BLACK): New.
11908 (COLOR_FG_BRIGHT_RED): New.
11909 (COLOR_FG_BRIGHT_GREEN): New.
11910 (COLOR_FG_BRIGHT_YELLOW): New.
11911 (COLOR_FG_BRIGHT_BLUE): New.
11912 (COLOR_FG_BRIGHT_MAGENTA): New.
11913 (COLOR_FG_BRIGHT_CYAN): New.
11914 (COLOR_FG_BRIGHT_WHITE): New.
11915 (COLOR_BG_BRIGHT_BLACK): New.
11916 (COLOR_BG_BRIGHT_RED): New.
11917 (COLOR_BG_BRIGHT_GREEN): New.
11918 (COLOR_BG_BRIGHT_YELLOW): New.
11919 (COLOR_BG_BRIGHT_BLUE): New.
11920 (COLOR_BG_BRIGHT_MAGENTA): New.
11921 (COLOR_BG_BRIGHT_CYAN): New.
11922 (COLOR_BG_BRIGHT_WHITE): New.
11923 * common.opt (fdiagnostics-text-art-charset=): New option.
11924 (diagnostic-text-art.h): New SourceInclude.
11925 (diagnostic_text_art_charset) New Enum and EnumValues.
11926 * configure: Regenerate.
11927 * configure.ac (gccdepdir): Add text-art to loop.
11928 * diagnostic-diagram.h: New file.
11929 * diagnostic-format-json.cc (json_emit_diagram): New.
11930 (diagnostic_output_format_init_json): Wire it up to
11931 context->m_diagrams.m_emission_cb.
11932 * diagnostic-format-sarif.cc: Include "diagnostic-diagram.h" and
11933 "text-art/canvas.h".
11934 (sarif_result::on_nested_diagnostic): Move code to...
11935 (sarif_result::add_related_location): ...this new function.
11936 (sarif_result::on_diagram): New.
11937 (sarif_builder::emit_diagram): New.
11938 (sarif_builder::make_message_object_for_diagram): New.
11939 (sarif_emit_diagram): New.
11940 (diagnostic_output_format_init_sarif): Set
11941 context->m_diagrams.m_emission_cb to sarif_emit_diagram.
11942 * diagnostic-text-art.h: New file.
11943 * diagnostic.cc: Include "diagnostic-text-art.h",
11944 "diagnostic-diagram.h", and "text-art/theme.h".
11945 (diagnostic_initialize): Initialize context->m_diagrams and
11946 call diagnostics_text_art_charset_init.
11947 (diagnostic_finish): Clean up context->m_diagrams.m_theme.
11948 (diagnostic_emit_diagram): New.
11949 (diagnostics_text_art_charset_init): New.
11950 * diagnostic.h (text_art::theme): New forward decl.
11951 (class diagnostic_diagram): Likewise.
11952 (diagnostic_context::m_diagrams): New field.
11953 (diagnostic_emit_diagram): New decl.
11954 * doc/invoke.texi (Diagnostic Message Formatting Options): Add
11955 -fdiagnostics-text-art-charset=.
11956 (-fdiagnostics-plain-output): Add
11957 -fdiagnostics-text-art-charset=none.
11958 * gcc.cc: Include "diagnostic-text-art.h".
11959 (driver_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
11960 * opts-common.cc (decode_cmdline_options_to_array): Add
11961 "-fdiagnostics-text-art-charset=none" to expanded_args for
11962 -fdiagnostics-plain-output.
11963 * opts.cc: Include "diagnostic-text-art.h".
11964 (common_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
11965 * pretty-print.cc (pp_unicode_character): New.
11966 * pretty-print.h (pp_unicode_character): New decl.
11967 * selftest-run-tests.cc: Include "text-art/selftests.h".
11968 (selftest::run_tests): Call text_art_tests.
11969 * text-art/box-drawing-chars.inc: New file, generated by
11970 contrib/unicode/gen-box-drawing-chars.py.
11971 * text-art/box-drawing.cc: New file.
11972 * text-art/box-drawing.h: New file.
11973 * text-art/canvas.cc: New file.
11974 * text-art/canvas.h: New file.
11975 * text-art/ruler.cc: New file.
11976 * text-art/ruler.h: New file.
11977 * text-art/selftests.cc: New file.
11978 * text-art/selftests.h: New file.
11979 * text-art/style.cc: New file.
11980 * text-art/styled-string.cc: New file.
11981 * text-art/table.cc: New file.
11982 * text-art/table.h: New file.
11983 * text-art/theme.cc: New file.
11984 * text-art/theme.h: New file.
11985 * text-art/types.h: New file.
11986 * text-art/widget.cc: New file.
11987 * text-art/widget.h: New file.
11989 2023-06-21 Uros Bizjak <ubizjak@gmail.com>
11991 * function.h (emit_initial_value_sets):
11992 Change return type from int to void.
11993 (aggregate_value_p): Change return type from int to bool.
11994 (prologue_contains): Ditto.
11995 (epilogue_contains): Ditto.
11996 (prologue_epilogue_contains): Ditto.
11997 * function.cc (temp_slot): Make "in_use" variable bool.
11998 (make_slot_available): Update for changed "in_use" variable.
11999 (assign_stack_temp_for_type): Ditto.
12000 (emit_initial_value_sets): Change return type from int to void
12001 and update function body accordingly.
12002 (instantiate_virtual_regs): Ditto.
12003 (rest_of_handle_thread_prologue_and_epilogue): Ditto.
12004 (safe_insn_predicate): Change return type from int to bool.
12005 (aggregate_value_p): Change return type from int to bool
12006 and update function body accordingly.
12007 (prologue_contains): Change return type from int to bool.
12008 (prologue_epilogue_contains): Ditto.
12010 2023-06-21 Alexander Monakov <amonakov@ispras.ru>
12012 * common.opt (fp_contract_mode) [on]: Remove fallback.
12013 * config/sh/sh.md (*fmasf4): Correct flag_fp_contract_mode test.
12014 * doc/invoke.texi (-ffp-contract): Update.
12015 * trans-mem.cc (diagnose_tm_1): Skip internal function calls.
12017 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12019 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
12020 Add alternatives to prefer to avoid same input and output Z register.
12021 (mask_gather_load<mode><v_int_container>): Likewise.
12022 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
12023 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
12024 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
12025 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
12027 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
12029 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
12030 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
12031 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
12032 <SVE_2BHSI:mode>_sxtw): Likewise.
12033 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
12034 <SVE_2BHSI:mode>_uxtw): Likewise.
12035 (@aarch64_ldff1_gather<mode>): Likewise.
12036 (@aarch64_ldff1_gather<mode>): Likewise.
12037 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
12038 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
12039 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
12040 <VNx4_NARROW:mode>): Likewise.
12041 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
12042 <VNx2_NARROW:mode>): Likewise.
12043 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
12044 <VNx2_NARROW:mode>_sxtw): Likewise.
12045 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
12046 <VNx2_NARROW:mode>_uxtw): Likewise.
12047 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
12048 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
12049 <SVE_PARTIAL_I:mode>): Likewise.
12051 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12053 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
12054 Convert to compact alternatives syntax.
12055 (mask_gather_load<mode><v_int_container>): Likewise.
12056 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
12057 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
12058 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
12059 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
12061 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
12063 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
12064 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
12065 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
12066 <SVE_2BHSI:mode>_sxtw): Likewise.
12067 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
12068 <SVE_2BHSI:mode>_uxtw): Likewise.
12069 (@aarch64_ldff1_gather<mode>): Likewise.
12070 (@aarch64_ldff1_gather<mode>): Likewise.
12071 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
12072 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
12073 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
12074 <VNx4_NARROW:mode>): Likewise.
12075 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
12076 <VNx2_NARROW:mode>): Likewise.
12077 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
12078 <VNx2_NARROW:mode>_sxtw): Likewise.
12079 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
12080 <VNx2_NARROW:mode>_uxtw): Likewise.
12081 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
12082 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
12083 <SVE_PARTIAL_I:mode>): Likewise.
12085 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12088 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12090 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
12091 Convert to compact alternatives syntax.
12092 (mask_gather_load<mode><v_int_container>): Likewise.
12093 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
12094 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
12095 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
12096 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
12098 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
12100 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
12101 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
12102 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
12103 <SVE_2BHSI:mode>_sxtw): Likewise.
12104 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
12105 <SVE_2BHSI:mode>_uxtw): Likewise.
12106 (@aarch64_ldff1_gather<mode>): Likewise.
12107 (@aarch64_ldff1_gather<mode>): Likewise.
12108 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
12109 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
12110 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
12111 <VNx4_NARROW:mode>): Likewise.
12112 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
12113 <VNx2_NARROW:mode>): Likewise.
12114 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
12115 <VNx2_NARROW:mode>_sxtw): Likewise.
12116 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
12117 <VNx2_NARROW:mode>_uxtw): Likewise.
12118 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
12119 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
12120 <SVE_PARTIAL_I:mode>): Likewise.
12122 2023-06-21 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12124 * optabs-query.cc (can_vec_mask_load_store_p): Move to optabs-tree.cc.
12125 (get_len_load_store_mode): Ditto.
12126 * optabs-query.h (can_vec_mask_load_store_p): Move to optabs-tree.h.
12127 (get_len_load_store_mode): Ditto.
12128 * optabs-tree.cc (can_vec_mask_load_store_p): New function.
12129 (get_len_load_store_mode): Ditto.
12130 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
12131 (get_len_load_store_mode): Ditto.
12132 * tree-if-conv.cc: include optabs-tree instead of optabs-query
12134 2023-06-21 Richard Biener <rguenther@suse.de>
12136 * tree-ssa-loop-ivopts.cc (add_iv_candidate_for_use): Use
12137 split_constant_offset for the POINTER_PLUS_EXPR case.
12139 2023-06-21 Richard Biener <rguenther@suse.de>
12141 * tree-ssa-loop-ivopts.cc (record_group_use): Use
12142 split_constant_offset.
12144 2023-06-21 Richard Biener <rguenther@suse.de>
12146 * tree-loop-distribution.cc (classify_builtin_st): Use
12147 split_constant_offset.
12148 * tree-ssa-loop-ivopts.h (strip_offset): Remove.
12149 * tree-ssa-loop-ivopts.cc (strip_offset): Make static.
12151 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12153 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
12154 Convert to compact alternatives syntax.
12155 (mask_gather_load<mode><v_int_container>): Likewise.
12156 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
12157 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
12158 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
12159 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
12161 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
12163 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
12164 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
12165 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
12166 <SVE_2BHSI:mode>_sxtw): Likewise.
12167 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
12168 <SVE_2BHSI:mode>_uxtw): Likewise.
12169 (@aarch64_ldff1_gather<mode>): Likewise.
12170 (@aarch64_ldff1_gather<mode>): Likewise.
12171 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
12172 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
12173 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
12174 <VNx4_NARROW:mode>): Likewise.
12175 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
12176 <VNx2_NARROW:mode>): Likewise.
12177 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
12178 <VNx2_NARROW:mode>_sxtw): Likewise.
12179 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
12180 <VNx2_NARROW:mode>_uxtw): Likewise.
12181 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
12182 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
12183 <SVE_PARTIAL_I:mode>): Likewise.
12185 2023-06-21 Tamar Christina <tamar.christina@arm.com>
12188 * doc/md.texi: Replace backslashchar.
12190 2023-06-21 Richard Biener <rguenther@suse.de>
12192 * config/i386/i386.cc (ix86_vector_costs::finish_cost):
12193 Overload. For masked main loops make sure the vectorization
12194 factor isn't more than double the number of iterations.
12196 2023-06-21 Jan Beulich <jbeulich@suse.com>
12198 * config/i386/i386-expand.cc (ix86_expand_copysign): Request
12199 value duplication by ix86_build_signbit_mask() when AVX512F and
12201 * config/i386/sse.md (*<avx512>_vternlog<mode>_all): Convert to
12202 2-alternative form. Adjust "mode" attribute. Add "enabled"
12204 (*<avx512>_vpternlog<mode>_1): Also permit when TARGET_AVX512F
12205 && !TARGET_PREFER_AVX256.
12206 (*<avx512>_vpternlog<mode>_2): Likewise.
12207 (*<avx512>_vpternlog<mode>_3): Likewise.
12209 2023-06-21 liuhongt <hongtao.liu@intel.com>
12212 * tree-vect-stmts.cc (vectorizable_conversion): Use
12213 intermiediate integer type for float_expr/fix_trunc_expr when
12214 direct optab is not existed.
12216 2023-06-20 Tamar Christina <tamar.christina@arm.com>
12218 PR bootstrap/110324
12219 * gensupport.cc (convert_syntax): Explicitly check for RTX code.
12221 2023-06-20 Richard Sandiford <richard.sandiford@arm.com>
12223 * config/aarch64/aarch64.md (stack_tie): Hard-code the first
12224 register operand to the stack pointer. Require the second register
12225 operand to have the number specified in a separate const_int operand.
12226 * config/aarch64/aarch64.cc (aarch64_emit_stack_tie): New function.
12227 (aarch64_allocate_and_probe_stack_space): Use it.
12228 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
12229 (aarch64_expand_epilogue): Likewise.
12231 2023-06-20 Jakub Jelinek <jakub@redhat.com>
12233 PR middle-end/79173
12234 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember lhs of
12235 IMAGPART_EXPR of arg2/arg3 and use that as arg3 if it has the right
12238 2023-06-20 Uros Bizjak <ubizjak@gmail.com>
12240 * calls.h (setjmp_call_p): Change return type from int to bool.
12241 * calls.cc (struct arg_data): Change "pass_on_stack" to bool.
12242 (store_one_arg): Change return type from int to bool
12243 and adjust function body accordingly. Change "sibcall_failure"
12245 (finalize_must_preallocate): Ditto. Change *must_preallocate pointer
12246 argument to bool. Change "partial_seen" variable to bool.
12247 (load_register_parameters): Change *sibcall_failure
12248 pointer argument to bool.
12249 (check_sibcall_argument_overlap_1): Change return type from int to bool
12250 and adjust function body accordingly.
12251 (check_sibcall_argument_overlap): Ditto. Change
12252 "mark_stored_args_map" argument to bool.
12253 (emit_call_1): Change "already_popped" variable to bool.
12254 (setjmp_call_p): Change return type from int to bool
12255 and adjust function body accordingly.
12256 (initialize_argument_information): Change *must_preallocate
12257 pointer argument to bool.
12258 (expand_call): Change "pcc_struct_value", "must_preallocate"
12259 and "sibcall_failure" variables to bool.
12260 (emit_library_call_value_1): Change "pcc_struct_value"
12263 2023-06-20 Martin Jambor <mjambor@suse.cz>
12266 * ipa-sra.cc (struct caller_issues): New field there_is_one.
12267 (check_for_caller_issues): Set it.
12268 (check_all_callers_for_issues): Check it.
12270 2023-06-20 Martin Jambor <mjambor@suse.cz>
12272 * ipa-prop.h (ipa_uid_to_idx_map_elt): New type.
12273 (struct ipcp_transformation): Rearrange members according to
12274 C++ class coding convention, add m_uid_to_idx,
12275 get_param_index and maybe_create_parm_idx_map.
12276 * ipa-cp.cc (ipcp_transformation::get_param_index): New function.
12277 (compare_uids): Likewise.
12278 (ipcp_transformation::maype_create_parm_idx_map): Likewise.
12279 * ipa-prop.cc (ipcp_get_parm_bits): Use get_param_index.
12280 (ipcp_update_bits): Accept TS as a parameter, assume it is not NULL.
12281 (ipcp_update_vr): Likewise.
12282 (ipcp_transform_function): Call, maybe_create_parm_idx_map of TS, bail
12283 out quickly if empty, pass it to ipcp_update_bits and ipcp_update_vr.
12285 2023-06-20 Carl Love <cel@us.ibm.com>
12287 * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin):
12288 Rename CODE_FOR_xsxsigqp_tf to CODE_FOR_xsxsigqp_tf_ti.
12289 Rename CODE_FOR_xsxsigqp_kf to CODE_FOR_xsxsigqp_kf_ti.
12290 Rename CCDE_FOR_xsxexpqp_tf to CODE_FOR_xsxexpqp_tf_di.
12291 Rename CODE_FOR_xsxexpqp_kf to CODE_FOR_xsxexpqp_kf_di.
12292 (CODE_FOR_xsxexpqp_kf_v2di, CODE_FOR_xsxsigqp_kf_v1ti,
12293 CODE_FOR_xsiexpqp_kf_v2di): Add case statements.
12294 * config/rs6000/rs6000-builtins.def
12295 (__builtin_vsx_scalar_extract_exp_to_vec,
12296 __builtin_vsx_scalar_extract_sig_to_vec,
12297 __builtin_vsx_scalar_insert_exp_vqp): Add new builtin definitions.
12298 Rename xsxexpqp_kf, xsxsigqp_kf, xsiexpqp_kf to xsexpqp_kf_di,
12299 xsxsigqp_kf_ti, xsiexpqp_kf_di respectively.
12300 * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
12301 Update case RS6000_OVLD_VEC_VSIE to handle MODE_VECTOR_INT for new
12302 overloaded instance. Update comments.
12303 * config/rs6000/rs6000-overload.def
12304 (__builtin_vec_scalar_insert_exp): Add new overload definition with
12306 (scalar_extract_exp_to_vec, scalar_extract_sig_to_vec): New
12307 overloaded definitions.
12308 * config/rs6000/vsx.md (V2DI_DI): New mode iterator.
12309 (DI_to_TI): New mode attribute.
12310 Rename xsxexpqp_<mode> to sxexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
12311 Rename xsxsigqp_<mode> to xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>.
12312 Rename xsiexpqp_<mode> to xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
12313 * doc/extend.texi (scalar_extract_exp_to_vec,
12314 scalar_extract_sig_to_vec): Add documentation for new builtins.
12315 (scalar_insert_exp): Add new overloaded builtin definition.
12317 2023-06-20 Li Xu <xuli1@eswincomputing.com>
12319 * config/riscv/riscv.cc (riscv_regmode_natural_size): set the natural
12320 size of vector mask mode to one rvv register.
12322 2023-06-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12324 * config/riscv/riscv-v.cc (expand_const_vector): Optimize codegen.
12326 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
12328 * config/riscv/riscv.cc (riscv_arg_has_vector): Add default
12331 2023-06-20 Richard Biener <rguenther@suse.de>
12333 * tree-ssa-dse.cc (dse_classify_store): When we found
12334 no defs and the basic-block with the original definition
12335 ends in __builtin_unreachable[_trap] the store is dead.
12337 2023-06-20 Richard Biener <rguenther@suse.de>
12339 * tree-ssa-phiprop.cc (phiprop_insert_phi): For simple loads
12340 keep the virtual SSA form up-to-date.
12342 2023-06-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12344 * config/aarch64/aarch64-simd.md (*aarch64_addp_same_reg<mode>):
12345 New define_insn_and_split.
12347 2023-06-20 Tamar Christina <tamar.christina@arm.com>
12349 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Drop test comment.
12351 2023-06-20 Jan Beulich <jbeulich@suse.com>
12353 * config/i386/sse.md (vec_dupv2di): Correct %vmovddup input
12354 constraint. Add new AVX512F alternative.
12356 2023-06-20 Richard Biener <rguenther@suse.de>
12359 * dwarf2out.cc (process_scope_var): Continue processing
12360 the decl after setting a parent in case the existing DIE
12363 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
12365 * config/riscv/riscv.cc (riscv_scalable_vector_type_p): Delete.
12366 (riscv_arg_has_vector): Simplify.
12367 (riscv_pass_in_vector_p): Adjust warning message.
12369 2023-06-19 Jin Ma <jinma@linux.alibaba.com>
12371 * config/riscv/riscv.cc (riscv_compute_frame_info): Allocate frame for FCSR.
12372 (riscv_for_each_saved_reg): Save and restore FCSR in interrupt functions.
12373 * config/riscv/riscv.md (riscv_frcsr): New patterns.
12374 (riscv_fscsr): Likewise.
12376 2023-06-19 Toru Kisuki <tkisuki@tachyum.com>
12378 PR rtl-optimization/110305
12379 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
12380 Handle HONOR_SNANS for x + 0.0.
12382 2023-06-19 Jan Hubicka <jh@suse.cz>
12384 PR tree-optimization/109811
12385 PR tree-optimization/109849
12386 * passes.def: Add phiprop to early optimization passes.
12387 * tree-ssa-phiprop.cc: Allow clonning.
12389 2023-06-19 Tamar Christina <tamar.christina@arm.com>
12391 * config/aarch64/aarch64.md (arches): Add nosimd.
12392 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Rewrite to
12395 2023-06-19 Tamar Christina <tamar.christina@arm.com>
12396 Omar Tahir <Omar.Tahir2@arm.com>
12398 * gensupport.cc (class conlist, add_constraints, add_attributes,
12399 skip_spaces, expect_char, preprocess_compact_syntax,
12400 parse_section_layout, parse_section, convert_syntax): New.
12401 (process_rtx): Check for conversion.
12402 * genoutput.cc (process_template): Check for unresolved iterators.
12403 (class data): Add compact_syntax_p.
12404 (gen_insn): Use it.
12405 * gensupport.h (compact_syntax): New.
12406 (hash-set.h): Include.
12407 * doc/md.texi: Document it.
12409 2023-06-19 Uros Bizjak <ubizjak@gmail.com>
12411 * recog.h (check_asm_operands): Change return type from int to bool.
12412 (insn_invalid_p): Ditto.
12413 (verify_changes): Ditto.
12414 (apply_change_group): Ditto.
12415 (constrain_operands): Ditto.
12416 (constrain_operands_cached): Ditto.
12417 (validate_replace_rtx_subexp): Ditto.
12418 (validate_replace_rtx): Ditto.
12419 (validate_replace_rtx_part): Ditto.
12420 (validate_replace_rtx_part_nosimplify): Ditto.
12421 (added_clobbers_hard_reg_p): Ditto.
12422 (peep2_regno_dead_p): Ditto.
12423 (peep2_reg_dead_p): Ditto.
12424 (store_data_bypass_p): Ditto.
12425 (if_test_bypass_p): Ditto.
12426 * rtl.h (split_all_insns_noflow): Change
12427 return type from unsigned int to void.
12428 * genemit.cc (output_added_clobbers_hard_reg_p): Change return type
12429 of generated added_clobbers_hard_reg_p from int to bool and adjust
12430 function body accordingly. Change "used" variable type from
12432 * recog.cc (check_asm_operands): Change return type
12433 from int to bool and adjust function body accordingly.
12434 (insn_invalid_p): Ditto. Change "is_asm" variable to bool.
12435 (verify_changes): Change return type from int to bool.
12436 (apply_change_group): Change return type from int to bool
12437 and adjust function body accordingly.
12438 (validate_replace_rtx_subexp): Change return type from int to bool.
12439 (validate_replace_rtx): Ditto.
12440 (validate_replace_rtx_part): Ditto.
12441 (validate_replace_rtx_part_nosimplify): Ditto.
12442 (constrain_operands_cached): Ditto.
12443 (constrain_operands): Ditto. Change "lose" and "win"
12444 variables type from int to bool.
12445 (split_all_insns_noflow): Change return type from unsigned int
12446 to void and adjust function body accordingly.
12447 (peep2_regno_dead_p): Change return type from int to bool.
12448 (peep2_reg_dead_p): Ditto.
12449 (peep2_find_free_register): Change "success"
12450 variable type from int to bool
12451 (store_data_bypass_p_1): Change return type from int to bool.
12452 (store_data_bypass_p): Ditto.
12454 2023-06-19 Li Xu <xuli1@eswincomputing.com>
12456 * config/riscv/vector-iterators.md: zvfh/zvfhmin depends on the
12459 2023-06-19 Pan Li <pan2.li@intel.com>
12462 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
12464 * config/riscv/vector-iterators.md: Remove VWLMUL1, VWLMUL1_ZVE64,
12465 VWLMUL1_ZVE32, VI_ZVE64, VI_ZVE32, VWI, VWI_ZVE64, VWI_ZVE32,
12466 VF_ZVE63 and VF_ZVE32.
12467 * config/riscv/vector.md
12468 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Removed.
12469 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
12470 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>): Ditto.
12471 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
12472 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
12473 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): New pattern.
12474 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Ditto.
12475 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Ditto.
12476 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Ditto.
12477 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Ditto.
12479 2023-06-19 Pan Li <pan2.li@intel.com>
12482 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
12484 * config/riscv/vector-iterators.md: Add VHF, VSF, VDF,
12485 VHF_LMUL1, VSF_LMUL1, VDF_LMUL1, and remove unused attr.
12486 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): Removed.
12487 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
12488 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
12489 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
12490 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
12491 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
12492 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): New pattern.
12493 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Ditto.
12494 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Ditto.
12495 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Ditto.
12496 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Ditto.
12497 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Ditto.
12499 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
12501 * config/gcn/gcn.cc (gcn_expand_divmod_libfunc): New function.
12502 (gcn_init_libfuncs): Add div and mod functions for all modes.
12503 Add placeholders for divmod functions.
12504 (TARGET_EXPAND_DIVMOD_LIBFUNC): Define.
12506 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
12508 * tree-vect-generic.cc: Include optabs-libfuncs.h.
12509 (get_compute_type): Check optab_libfunc.
12510 * tree-vect-stmts.cc: Include optabs-libfuncs.h.
12511 (vectorizable_operation): Check optab_libfunc.
12513 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
12515 * config/gcn/gcn-protos.h (vgpr_4reg_mode_p): New function.
12516 * config/gcn/gcn-valu.md (V_4REG, V_4REG_ALT): New iterators.
12517 (V_MOV, V_MOV_ALT): Likewise.
12518 (scalar_mode, SCALAR_MODE): Add TImode.
12519 (vnsi, VnSI, vndi, VnDI): Likewise.
12520 (vec_merge, vec_merge_with_clobber, vec_merge_with_vcc): Use V_MOV.
12521 (mov<mode>, mov<mode>_unspec): Use V_MOV.
12522 (*mov<mode>_4reg): New insn.
12523 (mov<mode>_exec): New 4reg variant.
12524 (mov<mode>_sgprbase): Likewise.
12525 (reload_in<mode>, reload_out<mode>): Use V_MOV.
12526 (vec_set<mode>): Likewise.
12527 (vec_duplicate<mode><exec>): New 4reg variant.
12528 (vec_extract<mode><scalar_mode>): Likewise.
12529 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
12530 (vec_extract<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
12531 (vec_extract<V_4REG:mode><V_4REG_ALT:mode>_nop): New 4reg variant.
12532 (fold_extract_last_<mode>): Use V_MOV.
12533 (vec_init<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
12534 (vec_init<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
12535 (gather_load<mode><vnsi>, gather<mode>_expr<exec>,
12536 gather<mode>_insn_1offset<exec>, gather<mode>_insn_1offset_ds<exec>,
12537 gather<mode>_insn_2offsets<exec>): Use V_MOV.
12538 (scatter_store<mode><vnsi>, scatter<mode>_expr<exec_scatter>,
12539 scatter<mode>_insn_1offset<exec_scatter>,
12540 scatter<mode>_insn_1offset_ds<exec_scatter>,
12541 scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
12542 (maskload<mode>di, maskstore<mode>di, mask_gather_load<mode><vnsi>,
12543 mask_scatter_store<mode><vnsi>): Likewise.
12544 * config/gcn/gcn.cc (gcn_class_max_nregs): Use vgpr_4reg_mode_p.
12545 (gcn_hard_regno_mode_ok): Likewise.
12546 (GEN_VNM): Add TImode support.
12547 (USE_TI): New macro. Separate TImode operations from non-TImode ones.
12548 (gcn_vector_mode_supported_p): Add V64TImode, V32TImode, V16TImode,
12549 V8TImode, and V2TImode.
12550 (print_operand): Add 'J' and 'K' print codes.
12552 2023-06-19 Richard Biener <rguenther@suse.de>
12554 PR tree-optimization/110298
12555 * tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely):
12556 Clear number of iterations info before cleaning up the CFG.
12558 2023-06-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12560 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
12561 Simplify vec_concat of lowpart subreg and high part vec_select.
12563 2023-06-19 Tobias Burnus <tobias@codesourcery.com>
12565 * doc/invoke.texi (-foffload-options): Remove '-O3' from the examples.
12567 2023-06-19 Richard Sandiford <richard.sandiford@arm.com>
12569 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
12570 Handle null niters_skip.
12572 2023-06-19 Richard Biener <rguenther@suse.de>
12574 * config/aarch64/aarch64.cc
12575 (aarch64_vector_costs::analyze_loop_vinfo): Fix reference
12576 to LOOP_VINFO_MASKS.
12578 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
12581 * common/config/avr/avr-common.cc: Remove setting
12582 of OPT_fdelete_null_pointer_checks.
12583 * config/avr/avr.cc (avr_option_override): Clear
12584 flag_delete_null_pointer_checks if zero_address_valid.
12585 (avr_addr_space_zero_address_valid): New function.
12586 (TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID): Provide target
12589 2023-06-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12590 Robin Dapp <rdapp.gcc@gmail.com>
12592 * doc/md.texi: Add len_mask{load,store}.
12593 * genopinit.cc (main): Ditto.
12595 * internal-fn.cc (len_maskload_direct): Ditto.
12596 (len_maskstore_direct): Ditto.
12597 (expand_call_mem_ref): Ditto.
12598 (expand_partial_load_optab_fn): Ditto.
12599 (expand_len_maskload_optab_fn): Ditto.
12600 (expand_partial_store_optab_fn): Ditto.
12601 (expand_len_maskstore_optab_fn): Ditto.
12602 (direct_len_maskload_optab_supported_p): Ditto.
12603 (direct_len_maskstore_optab_supported_p): Ditto.
12604 * internal-fn.def (LEN_MASK_LOAD): Ditto.
12605 (LEN_MASK_STORE): Ditto.
12606 * optabs.def (OPTAB_CD): Ditto.
12608 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
12610 * config/riscv/autovec.md (<optab><mode>2): Add unop expanders.
12612 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
12614 * config/riscv/autovec.md (<optab><mode>3): Implement binop
12616 * config/riscv/riscv-protos.h (emit_vlmax_fp_insn): Declare.
12617 (enum vxrm_field_enum): Rename this...
12618 (enum fixed_point_rounding_mode): ...to this.
12619 (enum frm_field_enum): Rename this...
12620 (enum floating_point_rounding_mode): ...to this.
12621 * config/riscv/riscv-v.cc (emit_vlmax_fp_insn): New function
12622 * config/riscv/riscv.cc (riscv_const_insns): Clarify const
12624 (riscv_libgcc_floating_mode_supported_p): Adjust comment.
12625 (riscv_excess_precision): Do not convert to float for ZVFH.
12626 * config/riscv/vector-iterators.md: Add VF_AUTO iterator.
12628 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
12630 * config/riscv/vector-iterators.md: Add VI_QH iterator.
12631 * config/riscv/autovec-opt.md
12632 (@pred_extract_first_sextdi<mode>): New vmv.x.s pattern
12633 that includes sign extension.
12634 (@pred_extract_first_sextsi<mode>): Dito for SImode.
12636 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
12638 * config/riscv/autovec.md (vec_set<mode>): Implement.
12639 (vec_extract<mode><vel>): Implement.
12640 * config/riscv/riscv-protos.h (enum insn_type): Add slide insn.
12641 (emit_vlmax_slide_insn): Declare.
12642 (emit_nonvlmax_slide_tu_insn): Declare.
12643 (emit_scalar_move_insn): Export.
12644 (emit_nonvlmax_integer_move_insn): Export.
12645 * config/riscv/riscv-v.cc (emit_vlmax_slide_insn): New function.
12646 (emit_nonvlmax_slide_tu_insn): New function.
12647 (emit_vlmax_masked_mu_insn): No change.
12648 (emit_vlmax_integer_move_insn): Export.
12650 2023-06-19 Richard Biener <rguenther@suse.de>
12652 * tree-vectorizer.h (enum vect_partial_vector_style): New.
12653 (_loop_vec_info::partial_vector_style): Likewise.
12654 (LOOP_VINFO_PARTIAL_VECTORS_STYLE): Likewise.
12655 (rgroup_controls::compare_type): Add.
12656 (vec_loop_masks): Change from a typedef to auto_vec<>
12658 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
12659 Adjust. Convert niters_skip to compare_type.
12660 (vect_set_loop_condition_partial_vectors_avx512): New function
12661 implementing the AVX512 partial vector codegen.
12662 (vect_set_loop_condition): Dispatch to the correct
12663 vect_set_loop_condition_partial_vectors_* function based on
12664 LOOP_VINFO_PARTIAL_VECTORS_STYLE.
12665 (vect_prepare_for_masked_peels): Compute LOOP_VINFO_MASK_SKIP_NITERS
12666 in the original niter type.
12667 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Initialize
12668 partial_vector_style.
12669 (can_produce_all_loop_masks_p): Adjust.
12670 (vect_verify_full_masking): Produce the rgroup_controls vector
12671 here. Set LOOP_VINFO_PARTIAL_VECTORS_STYLE on success.
12672 (vect_verify_full_masking_avx512): New function implementing
12673 verification of AVX512 style masking.
12674 (vect_verify_loop_lens): Set LOOP_VINFO_PARTIAL_VECTORS_STYLE.
12675 (vect_analyze_loop_2): Also try AVX512 style masking.
12677 (vect_estimate_min_profitable_iters): Implement AVX512 style
12678 mask producing cost.
12679 (vect_record_loop_mask): Do not build the rgroup_controls
12680 vector here but record masks in a hash-set.
12681 (vect_get_loop_mask): Implement AVX512 style mask query,
12682 complementing the existing while_ult style.
12684 2023-06-19 Richard Biener <rguenther@suse.de>
12686 * tree-vectorizer.h (vect_get_loop_mask): Add loop_vec_info
12688 * tree-vect-loop.cc (vect_get_loop_mask): Likewise.
12689 (vectorize_fold_left_reduction): Adjust.
12690 (vect_transform_reduction): Likewise.
12691 (vectorizable_live_operation): Likewise.
12692 * tree-vect-stmts.cc (vectorizable_call): Likewise.
12693 (vectorizable_operation): Likewise.
12694 (vectorizable_store): Likewise.
12695 (vectorizable_load): Likewise.
12696 (vectorizable_condition): Likewise.
12698 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
12701 * config/avr/avr.opt (mgas-isr-prologues, mmain-is-OS_task):
12702 Add Optimization option property.
12704 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
12706 * config/xtensa/xtensa.cc (xtensa_constantsynth_2insn):
12707 Add new pattern for the abovementioned case.
12709 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
12711 * config/xtensa/xtensa.cc
12712 (TARGET_MEMORY_MOVE_COST, xtensa_memory_move_cost): Remove.
12714 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
12716 * config/rs6000/rs6000.cc (TARGET_CONST_ANCHOR): New define.
12718 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
12720 * cse.cc (try_const_anchors): Check SCALAR_INT_MODE.
12722 2023-06-19 liuhongt <hongtao.liu@intel.com>
12725 * config/i386/sse.md (<sse2_avx2>_packsswb<mask_name>):
12727 (sse2_packsswb<mask_name>): .. this, ..
12728 (avx2_packsswb<mask_name>): .. this and ..
12729 (avx512bw_packsswb<mask_name>): .. this.
12730 (<sse2_avx2>_packssdw<mask_name>): Substitute with ..
12731 (sse2_packssdw<mask_name>): .. this, ..
12732 (avx2_packssdw<mask_name>): .. this and ..
12733 (avx512bw_packssdw<mask_name>): .. this.
12735 2023-06-19 liuhongt <hongtao.liu@intel.com>
12738 * config/i386/i386-expand.cc (ix86_split_mmx_pack): Use
12739 UNSPEC_US_TRUNCATE instead of original us_truncate for
12741 * config/i386/mmx.md (mmx_pack<s_trunsuffix>swb): Substitute
12743 (mmx_packsswb): .. this and ..
12744 (mmx_packuswb): .. this.
12745 (mmx_packusdw): Use UNSPEC_US_TRUNCATE instead of original
12747 (s_trunsuffix): Removed code iterator.
12748 (any_s_truncate): Ditto.
12749 * config/i386/sse.md (<sse2_avx2>_packuswb<mask_name>): Use
12750 UNSPEC_US_TRUNCATE instead of original us_truncate.
12751 (<sse4_1_avx2>_packusdw<mask_name>): Ditto.
12752 * config/i386/i386.md (UNSPEC_US_TRUNCATE): New unspec_c_enum.
12754 2023-06-18 Pan Li <pan2.li@intel.com>
12756 * config/riscv/riscv-vector-builtins-bases.cc: Fix one typo.
12758 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
12760 * rtl.h (*rtx_equal_p_callback_function):
12761 Change return type from int to bool.
12762 (rtx_equal_p): Ditto.
12763 (*hash_rtx_callback_function): Ditto.
12764 * rtl.cc (rtx_equal_p): Change return type from int to bool
12765 and adjust function body accordingly.
12766 * early-remat.cc (scratch_equal): Ditto.
12767 * sel-sched-ir.cc (skip_unspecs_callback): Ditto.
12768 (hash_with_unspec_callback): Ditto.
12770 2023-06-18 Jeff Law <jlaw@ventanamicro.com>
12772 * config/arc/arc.md (movqi_insn): Allow certain constants to
12773 be stored into memory in the pattern's condition.
12774 (movsf_insn): Similarly.
12776 2023-06-18 Honza <jh@ryzen3.suse.cz>
12778 PR tree-optimization/109849
12779 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Add new parameter
12780 ES; handle ipa_predicate::not_sra_candidate.
12781 (evaluate_properties_for_edge): Pass es to
12782 evaluate_conditions_for_known_args.
12783 (ipa_fn_summary_t::duplicate): Handle sra candidates.
12784 (dump_ipa_call_summary): Dump points_to_possible_sra_candidate.
12785 (load_or_store_of_ptr_parameter): New function.
12786 (points_to_possible_sra_candidate_p): New function.
12787 (analyze_function_body): Initialize points_to_possible_sra_candidate;
12788 determine sra predicates.
12789 (estimate_ipcp_clone_size_and_time): Update call of
12790 evaluate_conditions_for_known_args.
12791 (remap_edge_params): Update points_to_possible_sra_candidate.
12792 (read_ipa_call_summary): Stream points_to_possible_sra_candidate
12793 (write_ipa_call_summary): Likewise.
12794 * ipa-predicate.cc (ipa_predicate::add_clause): Handle not_sra_candidate.
12795 (dump_condition): Dump it.
12796 * ipa-predicate.h (struct inline_param_summary): Add
12797 points_to_possible_sra_candidate.
12799 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
12801 * config/i386/i386-expand.cc (ix86_expand_carry): New helper
12802 function for setting the carry flag.
12803 (ix86_expand_builtin) <handlecarry>: Use it here.
12804 * config/i386/i386-protos.h (ix86_expand_carry): Prototype here.
12805 * config/i386/i386.md (uaddc<mode>5): Use ix86_expand_carry.
12806 (usubc<mode>5): Likewise.
12808 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
12810 * config/i386/i386.md (*concat<mode><dwi>3_1): Use QImode
12811 for the immediate constant shift count.
12812 (*concat<mode><dwi>3_2): Likewise.
12813 (*concat<mode><dwi>3_3): Likewise.
12814 (*concat<mode><dwi>3_4): Likewise.
12815 (*concat<mode><dwi>3_5): Likewise.
12816 (*concat<mode><dwi>3_6): Likewise.
12818 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
12820 * cse.cc (hash_rtx_cb): Rename to hash_rtx.
12821 (hash_rtx): Remove.
12822 * early-remat.cc (remat_candidate_hasher::equal): Update
12823 to call rtx_equal_p with rtx_equal_p_callback_function argument.
12824 * rtl.cc (rtx_equal_p_cb): Rename to rtx_equal_p.
12825 (rtx_equal_p): Remove.
12826 * rtl.h (rtx_equal_p): Add rtx_equal_p_callback_function
12827 argument with NULL default value.
12828 (rtx_equal_p_cb): Remove function declaration.
12829 (hash_rtx_cb): Ditto.
12830 (hash_rtx): Add hash_rtx_callback_function argument
12831 with NULL default value.
12832 * sel-sched-ir.cc (free_nop_pool): Update function comment.
12833 (skip_unspecs_callback): Ditto.
12834 (vinsn_init): Update to call hash_rtx with
12835 hash_rtx_callback_function argument.
12836 (vinsn_equal_p): Ditto.
12838 2023-06-18 yulong <shiyulong@iscas.ac.cn>
12840 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
12841 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
12842 (ADJUST_ALIGNMENT): Ditto.
12843 (RVV_TUPLE_PARTIAL_MODES): Ditto.
12844 (ADJUST_NUNITS): Ditto.
12845 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
12847 (vfloat16mf4x3_t): Ditto.
12848 (vfloat16mf4x4_t): Ditto.
12849 (vfloat16mf4x5_t): Ditto.
12850 (vfloat16mf4x6_t): Ditto.
12851 (vfloat16mf4x7_t): Ditto.
12852 (vfloat16mf4x8_t): Ditto.
12853 (vfloat16mf2x2_t): Ditto.
12854 (vfloat16mf2x3_t): Ditto.
12855 (vfloat16mf2x4_t): Ditto.
12856 (vfloat16mf2x5_t): Ditto.
12857 (vfloat16mf2x6_t): Ditto.
12858 (vfloat16mf2x7_t): Ditto.
12859 (vfloat16mf2x8_t): Ditto.
12860 (vfloat16m1x2_t): Ditto.
12861 (vfloat16m1x3_t): Ditto.
12862 (vfloat16m1x4_t): Ditto.
12863 (vfloat16m1x5_t): Ditto.
12864 (vfloat16m1x6_t): Ditto.
12865 (vfloat16m1x7_t): Ditto.
12866 (vfloat16m1x8_t): Ditto.
12867 (vfloat16m2x2_t): Ditto.
12868 (vfloat16m2x3_t): Ditto.
12869 (vfloat16m2x4_t): Ditto.
12870 (vfloat16m4x2_t): Ditto.
12871 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
12872 (vfloat16mf4x3_t): Ditto.
12873 (vfloat16mf4x4_t): Ditto.
12874 (vfloat16mf4x5_t): Ditto.
12875 (vfloat16mf4x6_t): Ditto.
12876 (vfloat16mf4x7_t): Ditto.
12877 (vfloat16mf4x8_t): Ditto.
12878 (vfloat16mf2x2_t): Ditto.
12879 (vfloat16mf2x3_t): Ditto.
12880 (vfloat16mf2x4_t): Ditto.
12881 (vfloat16mf2x5_t): Ditto.
12882 (vfloat16mf2x6_t): Ditto.
12883 (vfloat16mf2x7_t): Ditto.
12884 (vfloat16mf2x8_t): Ditto.
12885 (vfloat16m1x2_t): Ditto.
12886 (vfloat16m1x3_t): Ditto.
12887 (vfloat16m1x4_t): Ditto.
12888 (vfloat16m1x5_t): Ditto.
12889 (vfloat16m1x6_t): Ditto.
12890 (vfloat16m1x7_t): Ditto.
12891 (vfloat16m1x8_t): Ditto.
12892 (vfloat16m2x2_t): Ditto.
12893 (vfloat16m2x3_t): Ditto.
12894 (vfloat16m2x4_t): Ditto.
12895 (vfloat16m4x2_t): Ditto.
12896 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
12897 * config/riscv/riscv.md: New.
12898 * config/riscv/vector-iterators.md: New.
12900 2023-06-17 Roger Sayle <roger@nextmovesoftware.com>
12902 * config/i386/i386-expand.cc (ix86_expand_move): Check that OP1 is
12903 CONST_WIDE_INT_P before calling ix86_convert_wide_int_to_broadcast.
12904 Generalize special case for converting TImode to V1TImode to handle
12905 all 128-bit vector conversions.
12907 2023-06-17 Costas Argyris <costas.argyris@gmail.com>
12909 * gcc-ar.cc (main): Refactor to slightly reduce code
12910 duplication. Avoid unnecessary elements in nargv.
12912 2023-06-16 Pan Li <pan2.li@intel.com>
12915 * config/riscv/riscv-vector-builtins-bases.cc: Add ret_mode for
12916 integer reduction expand.
12917 * config/riscv/vector-iterators.md: Add VQI, VHI, VSI and VDI,
12918 and the LMUL1 attr respectively.
12919 * config/riscv/vector.md
12920 (@pred_reduc_<reduc><mode><vlmul1>): Removed.
12921 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Likewise.
12922 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Likewise.
12923 (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>): New pattern.
12924 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Likewise.
12925 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Likewise.
12926 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Likewise.
12928 2023-06-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12931 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Fix bug.
12933 2023-06-16 Jakub Jelinek <jakub@redhat.com>
12935 PR middle-end/79173
12936 * builtin-types.def (BT_FN_UINT_UINT_UINT_UINT_UINTPTR,
12937 BT_FN_ULONG_ULONG_ULONG_ULONG_ULONGPTR,
12938 BT_FN_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONGPTR): New
12940 * builtins.def (BUILT_IN_ADDC, BUILT_IN_ADDCL, BUILT_IN_ADDCLL,
12941 BUILT_IN_SUBC, BUILT_IN_SUBCL, BUILT_IN_SUBCLL): New builtins.
12942 * builtins.cc (fold_builtin_addc_subc): New function.
12943 (fold_builtin_varargs): Handle BUILT_IN_{ADD,SUB}C{,L,LL}.
12944 * doc/extend.texi (__builtin_addc, __builtin_subc): Document.
12946 2023-06-16 Jakub Jelinek <jakub@redhat.com>
12948 PR tree-optimization/110271
12949 * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children)
12950 <case PLUS_EXPR>: Ignore return value from match_arith_overflow,
12951 instead call match_uaddc_usubc only if gsi_stmt (gsi) is still stmt.
12953 2023-06-16 Martin Jambor <mjambor@suse.cz>
12955 * configure: Regenerate.
12957 2023-06-16 Roger Sayle <roger@nextmovesoftware.com>
12958 Uros Bizjak <ubizjak@gmail.com>
12961 * config/i386/i386.md (*add<dwi>3_doubleword_concat): New
12962 define_insn_and_split combine *add<dwi>3_doubleword with
12963 a *concat<mode><dwi>3 for more efficient lowering after reload.
12965 2023-06-16 Vladimir N. Makarov <vmakarov@redhat.com>
12967 * ira-lives.cc: Include except.h.
12968 (process_bb_node_lives): Ignore conflicts from cleanup exceptions
12969 when the pseudo does not live at the exception landing pad.
12971 2023-06-16 Alex Coplan <alex.coplan@arm.com>
12973 * doc/invoke.texi: Document -Welaborated-enum-base.
12975 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12977 * config/aarch64/aarch64-simd-builtins.def (shrn2_n): Rename builtins to...
12978 (ushrn2_n): ... This.
12979 (sqshrn2_n): Rename builtins to...
12980 (ssqshrn2_n): ... This.
12981 (uqshrn2_n): Rename builtins to...
12982 (uqushrn2_n): ... This.
12983 * config/aarch64/arm_neon.h (vqshrn_high_n_s16): Adjust for the above.
12984 (vqshrn_high_n_s32): Likewise.
12985 (vqshrn_high_n_s64): Likewise.
12986 (vqshrn_high_n_u16): Likewise.
12987 (vqshrn_high_n_u32): Likewise.
12988 (vqshrn_high_n_u64): Likewise.
12989 (vshrn_high_n_s16): Likewise.
12990 (vshrn_high_n_s32): Likewise.
12991 (vshrn_high_n_s64): Likewise.
12992 (vshrn_high_n_u16): Likewise.
12993 (vshrn_high_n_u32): Likewise.
12994 (vshrn_high_n_u64): Likewise.
12995 * config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn2_n<mode>_insn_le):
12997 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_le): ... This.
12998 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
12999 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): Rename to...
13000 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_be): ... This.
13001 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
13002 (aarch64_<shrn_op>shrn2_n<mode>): Rename to...
13003 (aarch64_<shrn_op><sra_op>shrn2_n<mode>): ... This.
13004 Update expander for the above.
13006 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13008 * config/aarch64/aarch64-simd-builtins.def (shrn2): Rename builtins to...
13009 (shrn2_n): ... This.
13010 (rshrn2): Rename builtins to...
13011 (rshrn2_n): ... This.
13012 * config/aarch64/arm_neon.h (vrshrn_high_n_s16): Adjust for the above.
13013 (vrshrn_high_n_s32): Likewise.
13014 (vrshrn_high_n_s64): Likewise.
13015 (vrshrn_high_n_u16): Likewise.
13016 (vrshrn_high_n_u32): Likewise.
13017 (vrshrn_high_n_u64): Likewise.
13018 (vshrn_high_n_s16): Likewise.
13019 (vshrn_high_n_s32): Likewise.
13020 (vshrn_high_n_s64): Likewise.
13021 (vshrn_high_n_u16): Likewise.
13022 (vshrn_high_n_u32): Likewise.
13023 (vshrn_high_n_u64): Likewise.
13024 * config/aarch64/aarch64-simd.md (*aarch64_<srn_op>shrn<mode>2_vect_le):
13026 (*aarch64_<srn_op>shrn<mode>2_vect_be): Likewise.
13027 (aarch64_shrn2<mode>_insn_le): Likewise.
13028 (aarch64_shrn2<mode>_insn_be): Likewise.
13029 (aarch64_shrn2<mode>): Likewise.
13030 (aarch64_rshrn2<mode>_insn_le): Likewise.
13031 (aarch64_rshrn2<mode>_insn_be): Likewise.
13032 (aarch64_rshrn2<mode>): Likewise.
13033 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_le): Likewise.
13034 (aarch64_<shrn_op>shrn2_n<mode>_insn_le): New define_insn.
13035 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_be): Delete.
13036 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): New define_insn.
13037 (aarch64_<sur>q<r>shr<u>n2_n<mode>): Delete.
13038 (aarch64_<shrn_op>shrn2_n<mode>): New define_expand.
13039 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): New define_insn.
13040 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): New define_insn.
13041 (aarch64_<shrn_op>rshrn2_n<mode>): New define_expand.
13042 (aarch64_sqshrun2_n<mode>_insn_le): New define_insn.
13043 (aarch64_sqshrun2_n<mode>_insn_be): New define_insn.
13044 (aarch64_sqshrun2_n<mode>): New define_expand.
13045 (aarch64_sqrshrun2_n<mode>_insn_le): New define_insn.
13046 (aarch64_sqrshrun2_n<mode>_insn_be): New define_insn.
13047 (aarch64_sqrshrun2_n<mode>): New define_expand.
13048 * config/aarch64/iterators.md (UNSPEC_SQSHRUN, UNSPEC_SQRSHRUN,
13049 UNSPEC_SQSHRN, UNSPEC_UQSHRN, UNSPEC_SQRSHRN, UNSPEC_UQRSHRN):
13050 Delete unspec values.
13051 (VQSHRN_N): Delete int iterator.
13053 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13055 * config/aarch64/aarch64.h (AARCH64_VALID_SHRN_OP): Define.
13056 * config/aarch64/aarch64-simd.md
13057 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): Rename to...
13058 (*aarch64_<shrn_op><shrn_s>shrn_n<mode>_insn<vczle><vczbe>): ... This.
13059 Use SHIFTRT iterator and add AARCH64_VALID_SHRN_OP to condition.
13060 * config/aarch64/iterators.md (shrn_s): New code attribute.
13062 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13064 * config/aarch64/aarch64-simd.md (aarch64_<sur>q<r>shr<u>n_n<mode>):
13066 (aarch64_<shrn_op>shrn_n<mode>): ... This. Reimplement with RTL codes.
13067 (*aarch64_<shrn_op>rshrn_n<mode>_insn): New define_insn.
13068 (aarch64_sqrshrun_n<mode>_insn): Likewise.
13069 (aarch64_sqshrun_n<mode>_insn): Likewise.
13070 (aarch64_<shrn_op>rshrn_n<mode>): New define_expand.
13071 (aarch64_sqshrun_n<mode>): Likewise.
13072 (aarch64_sqrshrun_n<mode>): Likewise.
13073 * config/aarch64/iterators.md (V2XWIDE): Add HI and SI modes.
13075 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13077 * config/aarch64/aarch64-simd-builtins.def (shrn): Rename builtins to...
13078 (shrn_n): ... This.
13079 (rshrn): Rename builtins to...
13080 (rshrn_n): ... This.
13081 * config/aarch64/arm_neon.h (vshrn_n_s16): Adjust for the above.
13082 (vshrn_n_s32): Likewise.
13083 (vshrn_n_s64): Likewise.
13084 (vshrn_n_u16): Likewise.
13085 (vshrn_n_u32): Likewise.
13086 (vshrn_n_u64): Likewise.
13087 (vrshrn_n_s16): Likewise.
13088 (vrshrn_n_s32): Likewise.
13089 (vrshrn_n_s64): Likewise.
13090 (vrshrn_n_u16): Likewise.
13091 (vrshrn_n_u32): Likewise.
13092 (vrshrn_n_u64): Likewise.
13093 * config/aarch64/aarch64-simd.md
13094 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): Delete.
13095 (aarch64_shrn<mode>): Likewise.
13096 (aarch64_rshrn<mode><vczle><vczbe>_insn): Likewise.
13097 (aarch64_rshrn<mode>): Likewise.
13098 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): Likewise.
13099 (aarch64_<sur>q<r>shr<u>n_n<mode>): Likewise.
13100 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): New define_insn.
13101 (*aarch64_<shrn_op>rshrn_n<mode>_insn<vczle><vczbe>): Likewise.
13102 (*aarch64_sqshrun_n<mode>_insn<vczle><vczbe>): Likewise.
13103 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
13104 (aarch64_<shrn_op>shrn_n<mode>): New define_expand.
13105 (aarch64_<shrn_op>rshrn_n<mode>): Likewise.
13106 (aarch64_sqshrun_n<mode>): Likewise.
13107 (aarch64_sqrshrun_n<mode>): Likewise.
13108 * config/aarch64/iterators.md (ALL_TRUNC): New code iterator.
13109 (TRUNCEXTEND): New code attribute.
13110 (TRUNC_SHIFT): Likewise.
13111 (shrn_op): Likewise.
13112 * config/aarch64/predicates.md (aarch64_simd_umax_quarter_mode):
13115 2023-06-16 Pan Li <pan2.li@intel.com>
13117 * config/riscv/riscv-vsetvl.cc
13118 (pass_vsetvl::global_eliminate_vsetvl_insn): Initialize var by NULL.
13120 2023-06-16 Richard Biener <rguenther@suse.de>
13122 PR tree-optimization/110278
13123 * match.pd (uns < (typeof uns)(uns != 0) -> false): New.
13124 (x != (typeof x)(x == 0) -> true): Likewise.
13126 2023-06-16 Pali Rohár <pali@kernel.org>
13128 * config/i386/mingw-w64.h (CPP_SPEC): Adjust for -mcrtdll=.
13129 (REAL_LIBGCC_SPEC): New define.
13130 * config/i386/mingw.opt: Add mcrtdll=
13131 * config/i386/mingw32.h (CPP_SPEC): Adjust for -mcrtdll=.
13132 (REAL_LIBGCC_SPEC): Adjust for -mcrtdll=.
13133 (STARTFILE_SPEC): Adjust for -mcrtdll=.
13134 * doc/invoke.texi: Add mcrtdll= documentation.
13136 2023-06-16 Simon Dardis <simon.dardis@imgtec.com>
13138 * config/mips/mips.cc (enum mips_code_readable_setting):New enmu.
13139 (mips_handle_code_readable_attr):New static function.
13140 (mips_get_code_readable_attr):New static enum function.
13141 (mips_set_current_function):Set the code_readable mode.
13142 (mips_option_override):Same as above.
13143 * doc/extend.texi:Document code_readable.
13145 2023-06-16 Richard Biener <rguenther@suse.de>
13147 PR tree-optimization/110269
13148 * fold-const.cc (fold_binary_loc): Merge x != 0 folding
13149 with tree_expr_nonzero_p ...
13150 * match.pd (cmp (convert? addr@0) integer_zerop): With this
13153 2023-06-15 Marek Polacek <polacek@redhat.com>
13155 * Makefile.in: Set LD_PICFLAG. Use it. Set enable_host_pie.
13156 Remove NO_PIE_CFLAGS and NO_PIE_FLAG. Pass LD_PICFLAG to
13157 ALL_LINKERFLAGS. Use the "pic" build of libiberty if --enable-host-pie.
13158 * configure.ac (--enable-host-shared): Don't set PICFLAG here.
13159 (--enable-host-pie): New check. Set PICFLAG and LD_PICFLAG after this
13161 * configure: Regenerate.
13162 * doc/install.texi: Document --enable-host-pie.
13164 2023-06-15 Manolis Tsamis <manolis.tsamis@vrull.eu>
13166 * regcprop.cc (maybe_mode_change): Enable stack pointer
13169 2023-06-15 Andrew MacLeod <amacleod@redhat.com>
13171 PR tree-optimization/110266
13172 * gimple-range-fold.cc (adjust_imagpart_expr): Check for integer
13174 (adjust_realpart_expr): Ditto.
13176 2023-06-15 Jan Beulich <jbeulich@suse.com>
13178 * config/i386/sse.md (<avx512>_vec_dup<mode><mask_name>): Use
13181 2023-06-15 Jan Beulich <jbeulich@suse.com>
13183 * config/i386/constraints.md: Mention k and r for B.
13185 2023-06-15 Lulu Cheng <chenglulu@loongson.cn>
13186 Andrew Pinski <apinski@marvell.com>
13189 * config/loongarch/loongarch.md: Modify the register constraints for template
13190 "jumptable" and "indirect_jump" from "r" to "e".
13192 2023-06-15 Xi Ruoyao <xry111@xry111.site>
13194 * config/loongarch/loongarch-tune.h (loongarch_align): New
13196 * config/loongarch/loongarch-def.h (loongarch_cpu_align): New
13198 * config/loongarch/loongarch-def.c (loongarch_cpu_align): Define
13200 * config/loongarch/loongarch.cc
13201 (loongarch_option_override_internal): Set the value of
13202 -falign-functions= if -falign-functions is enabled but no value
13203 is given. Likewise for -falign-labels=.
13205 2023-06-15 Jakub Jelinek <jakub@redhat.com>
13207 PR middle-end/79173
13208 * internal-fn.def (UADDC, USUBC): New internal functions.
13209 * internal-fn.cc (expand_UADDC, expand_USUBC): New functions.
13210 (commutative_ternary_fn_p): Return true also for IFN_UADDC.
13211 * optabs.def (uaddc5_optab, usubc5_optab): New optabs.
13212 * tree-ssa-math-opts.cc (uaddc_cast, uaddc_ne0, uaddc_is_cplxpart,
13213 match_uaddc_usubc): New functions.
13214 (math_opts_dom_walker::after_dom_children): Call match_uaddc_usubc
13215 for PLUS_EXPR, MINUS_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR unless
13216 other optimizations have been successful for those.
13217 * gimple-fold.cc (gimple_fold_call): Handle IFN_UADDC and IFN_USUBC.
13218 * fold-const-call.cc (fold_const_call): Likewise.
13219 * gimple-range-fold.cc (adjust_imagpart_expr): Likewise.
13220 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Likewise.
13221 * doc/md.texi (uaddc<mode>5, usubc<mode>5): Document new named
13223 * config/i386/i386.md (uaddc<mode>5, usubc<mode>5): New
13224 define_expand patterns.
13225 (*setcc_qi_addqi3_cconly_overflow_1_<mode>, *setccc): Split
13226 into NOTE_INSN_DELETED note rather than nop instruction.
13227 (*setcc_qi_negqi_ccc_1_<mode>, *setcc_qi_negqi_ccc_2_<mode>):
13230 2023-06-15 Jakub Jelinek <jakub@redhat.com>
13232 PR middle-end/79173
13233 * config/i386/i386.md (subborrow<mode>): Add alternative with
13234 memory destination and add for it define_peephole2
13235 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer using memory
13236 destination in these patterns.
13238 2023-06-15 Jakub Jelinek <jakub@redhat.com>
13240 PR middle-end/79173
13241 * config/i386/i386.md (*sub<mode>_3, @add<mode>3_carry,
13242 addcarry<mode>, @sub<mode>3_carry, *add<mode>3_cc_overflow_1): Add
13243 define_peephole2 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer
13244 using memory destination in these patterns.
13246 2023-06-15 Jakub Jelinek <jakub@redhat.com>
13248 * gimple-fold.cc (gimple_fold_call): Move handling of arg0
13249 as well as arg1 INTEGER_CSTs for .UBSAN_CHECK_{ADD,SUB,MUL}
13250 and .{ADD,SUB,MUL}_OVERFLOW calls from here...
13251 * fold-const-call.cc (fold_const_call): ... here.
13253 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
13255 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>):
13256 Rename to <su>abd<mode>3.
13257 * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Rename
13260 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
13262 * doc/md.texi (sabd, uabd): Document them.
13263 * internal-fn.def (ABD): Use new optab.
13264 * optabs.def (sabd_optab, uabd_optab): New optabs,
13265 * tree-vect-patterns.cc (vect_recog_absolute_difference):
13266 Recognize the following idiom abs (a - b).
13267 (vect_recog_sad_pattern): Refactor to use
13268 vect_recog_absolute_difference.
13269 (vect_recog_abd_pattern): Use patterns found by
13270 vect_recog_absolute_difference to build a new ABD
13273 2023-06-15 chenxiaolong <chenxl04200420@163.com>
13275 * config/loongarch/loongarch.h (LARCH_CALL_RATIO): Modify the value
13276 of macro LARCH_CALL_RATIO on LoongArch to make it perform optimally.
13278 2023-06-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13280 * config/riscv/riscv-v.cc (shuffle_merge_patterns): New pattern.
13281 (expand_vec_perm_const_1): Add merge optmization.
13283 2023-06-15 Lehua Ding <lehua.ding@rivai.ai>
13286 * config/riscv/riscv.cc (riscv_get_arg_info): Return NULL_RTX for vector mode
13287 (riscv_pass_by_reference): Return true for vector mode
13289 2023-06-15 Pan Li <pan2.li@intel.com>
13291 * config/riscv/autovec-opt.md: Align the predictor sytle.
13292 * config/riscv/autovec.md: Ditto.
13294 2023-06-15 Pan Li <pan2.li@intel.com>
13296 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
13297 Take elen instead of scalar BITS_PER_WORD.
13298 (expand_vector_init_merge_repeating_sequence): Use inner_bits_size
13299 instead of scaler BITS_PER_WORD.
13301 2023-06-14 Jivan Hakobyan <jivanhakobyan9@gmail.com>
13303 * config/moxie/uclinux.h (MFWRAP_SPEC): Remove
13305 2023-06-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13307 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold):
13308 Fix signed comparison warning in loop from npats to enelts.
13310 2023-06-14 Thomas Schwinge <thomas@codesourcery.com>
13312 * gcc.cc (driver_handle_option): Forward host '-lgfortran', '-lm'
13313 to offloading compilation.
13314 * config/gcn/mkoffload.cc (main): Adjust.
13315 * config/nvptx/mkoffload.cc (main): Likewise.
13316 * doc/invoke.texi (foffload-options): Update example.
13318 2023-06-14 liuhongt <hongtao.liu@intel.com>
13321 * config/i386/sse.md (mov<mode>_internal>): Use x instead of v
13322 for alternative 2 since there's no evex version for vpcmpeqd
13325 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
13327 * gcc.cc (LINK_COMMAND_SPEC): Remove mudflap spec handling.
13329 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
13331 * config/sh/divtab.cc: Remove.
13333 2023-06-13 Jakub Jelinek <jakub@redhat.com>
13335 * config/i386/i386.cc (standard_sse_constant_opcode): Remove
13336 superfluous spaces around \t for vpcmpeqd.
13338 2023-06-13 Roger Sayle <roger@nextmovesoftware.com>
13340 * expr.cc (store_constructor) <case VECTOR_TYPE>: Don't bother
13341 clearing vectors with only a single element. Set CLEARED if the
13342 vector was initialized to zero.
13344 2023-06-13 Lehua Ding <lehua.ding@rivai.ai>
13346 * config/riscv/riscv-v.cc (struct mode_vtype_group): Remove duplicate
13349 (TUPLE_ENTRY): Undef.
13351 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13353 * config/riscv/riscv-v.cc (rvv_builder::single_step_npatterns_p): Add comment.
13354 (shuffle_generic_patterns): Ditto.
13355 (expand_vec_perm_const_1): Ditto.
13357 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13359 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): Fix bug.
13360 (shuffle_decompress_patterns): Ditto.
13362 2023-06-13 Richard Biener <rguenther@suse.de>
13364 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Free loop BBs.
13366 2023-06-13 Yanzhang Wang <yanzhang.wang@intel.com>
13367 Kito Cheng <kito.cheng@sifive.com>
13369 * config/riscv/riscv-protos.h (riscv_init_cumulative_args): Set
13370 warning flag if func is not builtin
13371 * config/riscv/riscv.cc
13372 (riscv_scalable_vector_type_p): Determine whether the type is scalable vector.
13373 (riscv_arg_has_vector): Determine whether the arg is vector type.
13374 (riscv_pass_in_vector_p): Check the vector type param is passed by value.
13375 (riscv_init_cumulative_args): The same as header.
13376 (riscv_get_arg_info): Add the checking.
13377 (riscv_function_value): Check the func return and set warning flag
13378 * config/riscv/riscv.h (INIT_CUMULATIVE_ARGS): Add a flag to
13379 determine whether warning psabi or not.
13381 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13383 * config/arm/arm-opts.h (enum arm_tp_type): Remove TP_CP15.
13384 Add TP_TPIDRURW, TP_TPIDRURO, TP_TPIDRPRW values.
13385 * config/arm/arm-protos.h (arm_output_load_tpidr): Declare prototype.
13386 * config/arm/arm.cc (arm_option_reconfigure_globals): Replace TP_CP15
13388 (arm_output_load_tpidr): Define.
13389 * config/arm/arm.h (TARGET_HARD_TP): Define in terms of TARGET_SOFT_TP.
13390 * config/arm/arm.md (load_tp_hard): Call arm_output_load_tpidr to output
13392 (reload_tp_hard): Likewise.
13393 * config/arm/arm.opt (tpidrurw, tpidruro, tpidrprw): New values for
13395 * doc/invoke.texi (Arm Options, mtp): Document new values.
13397 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13400 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Add
13401 AARCH64_TPIDRRO_EL0 value.
13402 * config/aarch64/aarch64.cc (aarch64_output_load_tp): Define.
13403 * config/aarch64/aarch64.opt (tpidr_el0, tpidr_el1, tpidr_el2,
13404 tpidr_el3, tpidrro_el3): New accepted values to -mtp=.
13405 * doc/invoke.texi (AArch64 Options): Document new -mtp= options.
13407 2023-06-13 Alexandre Oliva <oliva@adacore.com>
13409 * range-op-float.cc (frange_nextafter): Drop inline.
13410 (frelop_early_resolve): Add static.
13411 (frange_float): Likewise.
13413 2023-06-13 Richard Biener <rguenther@suse.de>
13415 PR middle-end/110232
13416 * fold-const.cc (native_interpret_vector): Use TYPE_SIZE_UNIT
13417 to check whether the buffer covers the whole vector.
13419 2023-06-13 Richard Biener <rguenther@suse.de>
13421 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): For
13422 .MASK_LOAD and friends set the size of the access to unknown.
13424 2023-06-13 Tejas Belagod <tbelagod@arm.com>
13427 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold): Fold sve
13428 calls that have a constant input predicate vector.
13429 (svlast_impl::is_lasta): Query to check if intrinsic is svlasta.
13430 (svlast_impl::is_lastb): Query to check if intrinsic is svlastb.
13431 (svlast_impl::vect_all_same): Check if all vector elements are equal.
13433 2023-06-13 Andi Kleen <ak@linux.intel.com>
13435 * config/i386/gcc-auto-profile: Regenerate.
13437 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13439 * config/riscv/vector-iterators.md: Fix requirement.
13441 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13443 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): New function.
13444 (shuffle_decompress_patterns): New function.
13445 (expand_vec_perm_const_1): Add decompress optimization.
13447 2023-06-12 Jeff Law <jlaw@ventanamicro.com>
13449 PR rtl-optimization/101188
13450 * postreload.cc (reload_cse_move2add_invalidate): New function,
13452 (reload_cse_move2add): Call reload_cse_move2add_invalidate.
13454 2023-06-12 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
13456 * config/aarch64/aarch64.cc (aarch64_expand_vector_init): Tweak condition
13457 if (n_var == n_elts && n_elts <= 16) to allow a single constant,
13458 and if maxv == 1, use constant element for duplicating into register.
13460 2023-06-12 Tobias Burnus <tobias@codesourcery.com>
13462 * gimplify.cc (gimplify_adjust_omp_clauses_1): Use
13463 GOMP_MAP_FORCE_PRESENT for 'present alloc' implicit mapping.
13464 (gimplify_adjust_omp_clauses): Change
13465 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC} to the equivalent
13466 GOMP_MAP_FORCE_PRESENT.
13467 * omp-low.cc (lower_omp_target): Remove handling of no-longer valid
13468 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC}; update map kinds used for
13469 to/from clauses with present modifier.
13471 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
13473 PR tree-optimization/110205
13474 * range-op-float.cc (range_operator::fold_range): Add default FII
13476 * range-op-mixed.h (class operator_gt): Add missing final overrides.
13477 * range-op.cc (range_op_handler::fold_range): Add RO_FII case.
13478 (operator_lshift ::update_bitmask): Add final override.
13479 (operator_rshift ::update_bitmask): Add final override.
13480 * range-op.h (range_operator::fold_range): Add FII prototype.
13482 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
13484 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
13485 Use range_op_handler directly.
13486 * range-op.cc (range_op_handler::range_op_handler): Unsigned
13487 param instead of tree-code.
13488 (ptr_op_widen_plus_signed): Delete.
13489 (ptr_op_widen_plus_unsigned): Delete.
13490 (ptr_op_widen_mult_signed): Delete.
13491 (ptr_op_widen_mult_unsigned): Delete.
13492 (range_op_table::initialize_integral_ops): Add new opcodes.
13493 * range-op.h (range_op_handler): Use unsigned.
13494 (OP_WIDEN_MULT_SIGNED): New.
13495 (OP_WIDEN_MULT_UNSIGNED): New.
13496 (OP_WIDEN_PLUS_SIGNED): New.
13497 (OP_WIDEN_PLUS_UNSIGNED): New.
13498 (RANGE_OP_TABLE_SIZE): New.
13499 (range_op_table::operator []): Use unsigned.
13500 (range_op_table::set): Use unsigned.
13501 (m_range_tree): Make unsigned.
13502 (ptr_op_widen_mult_signed): Remove.
13503 (ptr_op_widen_mult_unsigned): Remove.
13504 (ptr_op_widen_plus_signed): Remove.
13505 (ptr_op_widen_plus_unsigned): Remove.
13507 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
13509 * gimple-range-op.cc (gimple_range_op_handler): Set m_operator
13510 manually as there is no access to the default operator.
13511 (cfn_copysign::fold_range): Don't check for validity.
13512 (cfn_ubsan::fold_range): Ditto.
13513 (gimple_range_op_handler::maybe_builtin_call): Don't set to NULL.
13514 * range-op.cc (default_operator): New.
13515 (range_op_handler::range_op_handler): Use default_operator
13517 (range_op_handler::operator bool): Move from header, compare
13518 against default operator.
13519 (range_op_handler::range_op): New.
13520 * range-op.h (range_op_handler::operator bool): Move.
13522 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
13524 * range-op.cc (unified_table): Delete.
13525 (range_op_table operator_table): Instantiate.
13526 (range_op_table::range_op_table): Rename from unified_table.
13527 (range_op_handler::range_op_handler): Use range_op_table.
13528 * range-op.h (range_op_table::operator []): Inline.
13529 (range_op_table::set): Inline.
13531 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
13533 * gimple-range-gori.cc (gori_compute::condexpr_adjust): Do not
13535 * gimple-range-op.cc (get_code): Rename from get_code_and_type
13537 (gimple_range_op_handler::supported_p): No need for type.
13538 (gimple_range_op_handler::gimple_range_op_handler): Ditto.
13539 (cfn_copysign::fold_range): Ditto.
13540 (cfn_ubsan::fold_range): Ditto.
13541 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Ditto.
13542 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Ditto.
13543 * range-op-float.cc (operator_plus::op1_range): Ditto.
13544 (operator_mult::op1_range): Ditto.
13545 (range_op_float_tests): Ditto.
13546 * range-op.cc (get_op_handler): Remove.
13547 (range_op_handler::set_op_handler): Remove.
13548 (operator_plus::op1_range): No need for type.
13549 (operator_minus::op1_range): Ditto.
13550 (operator_mult::op1_range): Ditto.
13551 (operator_exact_divide::op1_range): Ditto.
13552 (operator_cast::op1_range): Ditto.
13553 (perator_bitwise_not::fold_range): Ditto.
13554 (operator_negate::fold_range): Ditto.
13555 * range-op.h (range_op_handler::range_op_handler): Remove type param.
13556 (range_cast): No need for type.
13557 (range_op_table::operator[]): Check for enum_code >= 0.
13558 * tree-data-ref.cc (compute_distributive_range): No need for type.
13559 * tree-ssa-loop-unswitch.cc (unswitch_predicate): Ditto.
13560 * value-query.cc (range_query::get_tree_range): Ditto.
13561 * value-relation.cc (relation_oracle::validate_relation): Ditto.
13562 * vr-values.cc (range_of_var_in_loop): Ditto.
13563 (simplify_using_ranges::fold_cond_with_ops): Ditto.
13565 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
13567 * range-op-mixed.h (operator_max): Remove final.
13568 * range-op-ptr.cc (pointer_table::pointer_table): Remove MAX_EXPR.
13569 (pointer_table::pointer_table): Remove.
13570 (class hybrid_max_operator): New.
13571 (range_op_table::initialize_pointer_ops): Add hybrid_max_operator.
13572 * range-op.cc (pointer_tree_table): Remove.
13573 (unified_table::unified_table): Comment out MAX_EXPR.
13574 (get_op_handler): Remove check of pointer table.
13575 * range-op.h (class pointer_table): Remove.
13577 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
13579 * range-op-mixed.h (operator_min): Remove final.
13580 * range-op-ptr.cc (pointer_table::pointer_table): Remove MIN_EXPR.
13581 (class hybrid_min_operator): New.
13582 (range_op_table::initialize_pointer_ops): Add hybrid_min_operator.
13583 * range-op.cc (unified_table::unified_table): Comment out MIN_EXPR.
13585 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
13587 * range-op-mixed.h (operator_bitwise_or): Remove final.
13588 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_IOR_EXPR.
13589 (class hybrid_or_operator): New.
13590 (range_op_table::initialize_pointer_ops): Add hybrid_or_operator.
13591 * range-op.cc (unified_table::unified_table): Comment out BIT_IOR_EXPR.
13593 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
13595 * range-op-mixed.h (operator_bitwise_and): Remove final.
13596 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_AND_EXPR.
13597 (class hybrid_and_operator): New.
13598 (range_op_table::initialize_pointer_ops): Add hybrid_and_operator.
13599 * range-op.cc (unified_table::unified_table): Comment out BIT_AND_EXPR.
13601 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
13603 * Makefile.in (OBJS): Add range-op-ptr.o.
13604 * range-op-mixed.h (update_known_bitmask): Move prototype here.
13605 (minus_op1_op2_relation_effect): Move prototype here.
13606 (wi_includes_zero_p): Move function to here.
13607 (wi_zero_p): Ditto.
13608 * range-op.cc (update_known_bitmask): Remove static.
13609 (wi_includes_zero_p): Move to header.
13610 (wi_zero_p): Move to header.
13611 (minus_op1_op2_relation_effect): Remove static.
13612 (operator_pointer_diff): Move class and routines to range-op-ptr.cc.
13613 (pointer_plus_operator): Ditto.
13614 (pointer_min_max_operator): Ditto.
13615 (pointer_and_operator): Ditto.
13616 (pointer_or_operator): Ditto.
13617 (pointer_table): Ditto.
13618 (range_op_table::initialize_pointer_ops): Ditto.
13619 * range-op-ptr.cc: New.
13621 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
13623 * range-op-mixed.h (class operator_max): Move from...
13624 * range-op.cc (unified_table::unified_table): Add MAX_EXPR.
13625 (get_op_handler): Remove the integral table.
13626 (class operator_max): Move from here.
13627 (integral_table::integral_table): Delete.
13628 * range-op.h (class integral_table): Delete.
13630 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
13632 * range-op-mixed.h (class operator_min): Move from...
13633 * range-op.cc (unified_table::unified_table): Add MIN_EXPR.
13634 (class operator_min): Move from here.
13635 (integral_table::integral_table): Remove MIN_EXPR.
13637 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
13639 * range-op-mixed.h (class operator_bitwise_or): Move from...
13640 * range-op.cc (unified_table::unified_table): Add BIT_IOR_EXPR.
13641 (class operator_bitwise_or): Move from here.
13642 (integral_table::integral_table): Remove BIT_IOR_EXPR.
13644 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
13646 * range-op-mixed.h (class operator_bitwise_and): Move from...
13647 * range-op.cc (unified_table::unified_table): Add BIT_AND_EXPR.
13648 (get_op_handler): Check for a pointer table entry first.
13649 (class operator_bitwise_and): Move from here.
13650 (integral_table::integral_table): Remove BIT_AND_EXPR.
13652 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
13654 * range-op-mixed.h (class operator_bitwise_xor): Move from...
13655 * range-op.cc (unified_table::unified_table): Add BIT_XOR_EXPR.
13656 (class operator_bitwise_xor): Move from here.
13657 (integral_table::integral_table): Remove BIT_XOR_EXPR.
13658 (pointer_table::pointer_table): Remove BIT_XOR_EXPR.
13660 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
13662 * range-op-mixed.h (class operator_bitwise_not): Move from...
13663 * range-op.cc (unified_table::unified_table): Add BIT_NOT_EXPR.
13664 (class operator_bitwise_not): Move from here.
13665 (integral_table::integral_table): Remove BIT_NOT_EXPR.
13666 (pointer_table::pointer_table): Remove BIT_NOT_EXPR.
13668 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
13670 * range-op-mixed.h (class operator_addr_expr): Move from...
13671 * range-op.cc (unified_table::unified_table): Add ADDR_EXPR.
13672 (class operator_addr_expr): Move from here.
13673 (integral_table::integral_table): Remove ADDR_EXPR.
13674 (pointer_table::pointer_table): Remove ADDR_EXPR.
13676 2023-06-12 Pan Li <pan2.li@intel.com>
13678 * config/riscv/riscv-vector-builtins-types.def
13679 (vfloat16m1_t): Add type to lmul1 ops.
13680 (vfloat16m2_t): Likewise.
13681 (vfloat16m4_t): Likewise.
13683 2023-06-12 Richard Biener <rguenther@suse.de>
13685 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): For
13686 .MASK_STORE and friend set the size of the access to
13689 2023-06-12 Tamar Christina <tamar.christina@arm.com>
13691 * config.in: Regenerate.
13692 * configure: Regenerate.
13693 * configure.ac: Remove DEFAULT_MATCHPD_PARTITIONS.
13695 2023-06-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13697 * config/riscv/autovec-opt.md
13698 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): New pattern.
13699 (*<any_shiftrt:optab>trunc<mode>): Ditto.
13700 * config/riscv/autovec.md (<optab><mode>3): Change to
13701 define_insn_and_split.
13702 (v<optab><mode>3): Ditto.
13703 (trunc<mode><v_double_trunc>2): Ditto.
13705 2023-06-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13707 * simplify-rtx.cc (simplify_const_unary_operation):
13708 Handle US_TRUNCATE, SS_TRUNCATE.
13710 2023-06-12 Eric Botcazou <ebotcazou@adacore.com>
13713 * doc/gm2.texi (Standard procedures): Fix Next link.
13715 2023-06-12 Tamar Christina <tamar.christina@arm.com>
13717 * config.in: Regenerate.
13719 2023-06-12 Andre Vieira <andre.simoesdiasvieira@arm.com>
13721 PR middle-end/110142
13722 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Don't pass
13723 subtype to vect_widened_op_tree and remove subtype parameter, also
13724 remove superfluous overloaded function definition.
13725 (vect_recog_widen_plus_pattern): Remove subtype parameter and dont pass
13726 to call to vect_recog_widen_op_pattern.
13727 (vect_recog_widen_minus_pattern): Likewise.
13729 2023-06-12 liuhongt <hongtao.liu@intel.com>
13731 * config/i386/sse.md (vec_pack<floatprefix>_float_<mode>): New expander.
13732 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
13733 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
13734 (vec_unpacks_lo_<mode>): Ditto.
13735 (vec_unpacks_hi_<mode>): Ditto.
13736 (sse_movlhps_<mode>): New define_insn.
13737 (ssse3_palignr<mode>_perm): Extend to V_128H.
13738 (V_128H): New mode iterator.
13739 (ssepackPHmode): New mode attribute.
13740 (vunpck_extract_mode): Ditto.
13741 (vpckfloat_concat_mode): Extend to VxSI/VxSF for _Float16.
13742 (vpckfloat_temp_mode): Ditto.
13743 (vpckfloat_op_mode): Ditto.
13744 (vunpckfixt_mode): Extend to VxHF.
13745 (vunpckfixt_model): Ditto.
13746 (vunpckfixt_extract_mode): Ditto.
13748 2023-06-12 Richard Biener <rguenther@suse.de>
13750 PR middle-end/110200
13751 * genmatch.cc (expr::gen_transform): Put braces around
13752 the if arm for the (convert ...) short-cut.
13754 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
13757 * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
13758 __builtin_unpack_vector_int128): Move from stanza power7 to vsx.
13760 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
13763 * config/rs6000/rs6000.cc (output_toc): Use the mode of the 128-bit
13764 floating constant itself for real_to_target call.
13766 2023-06-12 Pan Li <pan2.li@intel.com>
13768 * config/riscv/riscv-vector-builtins-types.def
13769 (vfloat16mf4_t): Add type to X2/X4/X8/X16/X32 vlmul ext ops.
13770 (vfloat16mf2_t): Ditto.
13771 (vfloat16m1_t): Ditto.
13772 (vfloat16m2_t): Ditto.
13773 (vfloat16m4_t): Ditto.
13775 2023-06-12 David Edelsohn <dje.gcc@gmail.com>
13777 * config/rs6000/rs6000-logue.cc (rs6000_stack_info):
13778 Do not require a stack frame when debugging is enabled for AIX.
13780 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
13782 * config/avr/avr.md (adjust_len) [insv_notbit_0, insv_notbit_7]:
13783 Remove attribute values.
13784 (insv_notbit): New post-reload insn.
13785 (*insv.not-shiftrt_split, *insv.xor1-bit.0_split)
13786 (*insv.not-bit.0_split, *insv.not-bit.7_split)
13787 (*insv.xor-extract_split): Split to insv_notbit.
13788 (*insv.not-shiftrt, *insv.xor1-bit.0, *insv.not-bit.0, *insv.not-bit.7)
13789 (*insv.xor-extract): Remove post-reload insns.
13790 * config/avr/avr.cc (avr_out_insert_notbit) [bitno]: Remove parameter.
13791 (avr_adjust_insn_length): Adjust call of avr_out_insert_notbit.
13792 [ADJUST_LEN_INSV_NOTBIT_0, ADJUST_LEN_INSV_NOTBIT_7]: Remove cases.
13793 * config/avr/avr-protos.h (avr_out_insert_notbit): Adjust prototype.
13795 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
13798 * config/avr/avr.md (adjust_len) [extr, extr_not]: New elements.
13799 (MSB, SIZE): New mode attributes.
13800 (any_shift): New code iterator.
13801 (*lshr<mode>3_split, *lshr<mode>3, lshr<mode>3)
13802 (*lshr<mode>3_const_split): Add constraint alternative for
13803 the case of shift-offset = MSB. Ditch "length" attribute.
13804 (extzv<mode): New. replaces extzv. Adjust following patterns.
13805 Use avr_out_extr, avr_out_extr_not to print asm.
13806 (*extzv.subreg.<mode>, *extzv.<mode>.subreg, *extzv.xor)
13807 (*extzv<mode>.ge, *neg.ashiftrt<mode>.msb, *extzv.io.lsr7): New.
13808 * config/avr/constraints.md (C15, C23, C31, Yil): New
13809 * config/avr/predicates.md (reg_or_low_io_operand)
13810 (const7_operand, reg_or_low_io_operand)
13811 (const15_operand, const_0_to_15_operand)
13812 (const23_operand, const_0_to_23_operand)
13813 (const31_operand, const_0_to_31_operand): New.
13814 * config/avr/avr-protos.h (avr_out_extr, avr_out_extr_not): New.
13815 * config/avr/avr.cc (avr_out_extr, avr_out_extr_not): New funcs.
13816 (lshrqi3_out, lshrhi3_out, lshrpsi3_out, lshrsi3_out): Adjust
13817 MSB case to new insn constraint "r" for operands[1].
13818 (avr_adjust_insn_length) [ADJUST_LEN_EXTR_NOT, ADJUST_LEN_EXTR]:
13819 Handle these cases.
13820 (avr_rtx_costs_1): Adjust cost for a new pattern.
13822 2023-06-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13824 * config/riscv/riscv-vsetvl.cc (available_occurrence_p): Enhance user vsetvl optimization.
13825 (vector_insn_info::parse_insn): Add rtx_insn parse.
13826 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance user vsetvl optimization.
13827 (get_first_vsetvl): New function.
13828 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
13829 (pass_vsetvl::cleanup_insns): Remove it.
13830 (pass_vsetvl::ssa_post_optimization): New function.
13831 (has_no_uses): Ditto.
13832 (pass_vsetvl::propagate_avl): Remove it.
13833 (pass_vsetvl::df_post_optimization): New function.
13834 (pass_vsetvl::lazy_vsetvl): Rework Phase 5 && Phase 6.
13835 * config/riscv/riscv-vsetvl.h: Adapt declaration.
13837 2023-06-10 Aldy Hernandez <aldyh@redhat.com>
13839 * ipa-cp.cc (ipcp_vr_lattice::init): Take type argument.
13840 (ipcp_vr_lattice::print): Call dump method.
13841 (ipcp_vr_lattice::meet_with): Adjust for m_vr being a
13843 (ipcp_vr_lattice::meet_with_1): Make argument a reference.
13844 (ipcp_vr_lattice::set_to_bottom): Set varying for an unsupported
13846 (initialize_node_lattices): Pass type when appropriate.
13847 (ipa_vr_operation_and_type_effects): Make type agnostic.
13848 (ipa_value_range_from_jfunc): Same.
13849 (propagate_vr_across_jump_function): Same.
13850 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
13851 (evaluate_properties_for_edge): Same.
13852 * ipa-prop.cc (ipa_vr::get_vrange): Same.
13853 (ipcp_update_vr): Same.
13854 * ipa-prop.h (ipa_value_range_from_jfunc): Same.
13855 (ipa_range_set_and_normalize): Same.
13857 2023-06-10 Georg-Johann Lay <avr@gjlay.de>
13861 * config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass.
13862 * config/avr/avr.cc (avr_pass_ifelse): New RTL pass.
13863 (avr_pass_data_ifelse): New pass_data for it.
13864 (make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost)
13865 (avr_canonicalize_comparison, avr_out_plus_set_ZN)
13866 (avr_out_cmp_ext): New functions.
13867 (compare_condtition): Make sure REG_CC dies in the branch insn.
13868 (avr_rtx_costs_1): Add computation of cbranch costs.
13869 (avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]:
13870 [ADJUST_LEN_CMP_SEXT]Handle them.
13871 (TARGET_CANONICALIZE_COMPARISON): New define.
13872 (avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern)
13873 (avr_reorg_remove_redundant_compare, avr_reorg): Remove functions.
13874 (TARGET_MACHINE_DEPENDENT_REORG): Remove define.
13875 * config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto.
13876 (make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx)
13877 (avr_out_cmp_zext): New Protos
13878 * config/avr/avr.md (branch, difficult_branch): Don't split insns.
13879 (*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1")
13880 (*swapped_tst<mode>, *add.for.eqne.<mode>): New insns.
13881 (*cbranch<mode>4): Rename to cbranch<mode>4_insn.
13882 (define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed.
13883 (define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed.
13884 Add new RTL peepholes for decrement-and-branch and *swapped_tst<mode>.
13885 Rework signtest-and-branch peepholes for *sbrx_branch<mode>.
13886 (adjust_len) [add_set_ZN, cmp_zext]: New.
13887 (QIPSI): New mode iterator.
13888 (ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators.
13889 (gelt): New code iterator.
13890 (gelt_eqne): New code attribute.
13891 (rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch)
13892 (branch_unspec, *negated_tst<mode>, *reversed_tst<mode>)
13893 (*cmpqi_sign_extend): Remove insns.
13894 (define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove.
13895 * config/avr/avr-dimode.md (cbranch<mode>4): Canonicalize comparisons.
13896 * config/avr/predicates.md (scratch_or_d_register_operand): New.
13897 * config/avr/constraints.md (Yxx): New constraint.
13899 2023-06-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13901 * config/riscv/autovec.md (select_vl<mode>): New pattern.
13902 * config/riscv/riscv-protos.h (expand_select_vl): New function.
13903 * config/riscv/riscv-v.cc (expand_select_vl): Ditto.
13905 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
13907 * range-op-float.cc (foperator_mult_div_base): Delete.
13908 (foperator_mult_div_base::find_range): Make static local function.
13909 (foperator_mult): Remove. Move prototypes to range-op-mixed.h
13910 (operator_mult::op1_range): Rename from foperator_mult.
13911 (operator_mult::op2_range): Ditto.
13912 (operator_mult::rv_fold): Ditto.
13913 (float_table::float_table): Remove MULT_EXPR.
13914 (class foperator_div): Inherit from range_operator.
13915 (float_table::float_table): Delete.
13916 * range-op-mixed.h (class operator_mult): Combined from integer
13918 * range-op.cc (float_tree_table): Delete.
13919 (op_mult): New object.
13920 (unified_table::unified_table): Add MULT_EXPR.
13921 (get_op_handler): Do not check float table any longer.
13922 (class cross_product_operator): Move to range-op-mixed.h.
13923 (class operator_mult): Move to range-op-mixed.h.
13924 (integral_table::integral_table): Remove MULT_EXPR.
13925 (pointer_table::pointer_table): Remove MULT_EXPR.
13926 * range-op.h (float_table): Remove.
13928 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
13930 * range-op-float.cc (foperator_negate): Remove. Move prototypes
13931 to range-op-mixed.h
13932 (operator_negate::fold_range): Rename from foperator_negate.
13933 (operator_negate::op1_range): Ditto.
13934 (float_table::float_table): Remove NEGATE_EXPR.
13935 * range-op-mixed.h (class operator_negate): Combined from integer
13937 * range-op.cc (op_negate): New object.
13938 (unified_table::unified_table): Add NEGATE_EXPR.
13939 (class operator_negate): Move to range-op-mixed.h.
13940 (integral_table::integral_table): Remove NEGATE_EXPR.
13941 (pointer_table::pointer_table): Remove NEGATE_EXPR.
13943 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
13945 * range-op-float.cc (foperator_minus): Remove. Move prototypes
13946 to range-op-mixed.h
13947 (operator_minus::fold_range): Rename from foperator_minus.
13948 (operator_minus::op1_range): Ditto.
13949 (operator_minus::op2_range): Ditto.
13950 (operator_minus::rv_fold): Ditto.
13951 (float_table::float_table): Remove MINUS_EXPR.
13952 * range-op-mixed.h (class operator_minus): Combined from integer
13954 * range-op.cc (op_minus): New object.
13955 (unified_table::unified_table): Add MINUS_EXPR.
13956 (class operator_minus): Move to range-op-mixed.h.
13957 (integral_table::integral_table): Remove MINUS_EXPR.
13958 (pointer_table::pointer_table): Remove MINUS_EXPR.
13960 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
13962 * range-op-float.cc (foperator_abs): Remove. Move prototypes
13963 to range-op-mixed.h
13964 (operator_abs::fold_range): Rename from foperator_abs.
13965 (operator_abs::op1_range): Ditto.
13966 (float_table::float_table): Remove ABS_EXPR.
13967 * range-op-mixed.h (class operator_abs): Combined from integer
13969 * range-op.cc (op_abs): New object.
13970 (unified_table::unified_table): Add ABS_EXPR.
13971 (class operator_abs): Move to range-op-mixed.h.
13972 (integral_table::integral_table): Remove ABS_EXPR.
13973 (pointer_table::pointer_table): Remove ABS_EXPR.
13975 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
13977 * range-op-float.cc (foperator_plus): Remove. Move prototypes
13978 to range-op-mixed.h
13979 (operator_plus::fold_range): Rename from foperator_plus.
13980 (operator_plus::op1_range): Ditto.
13981 (operator_plus::op2_range): Ditto.
13982 (operator_plus::rv_fold): Ditto.
13983 (float_table::float_table): Remove PLUS_EXPR.
13984 * range-op-mixed.h (class operator_plus): Combined from integer
13986 * range-op.cc (op_plus): New object.
13987 (unified_table::unified_table): Add PLUS_EXPR.
13988 (class operator_plus): Move to range-op-mixed.h.
13989 (integral_table::integral_table): Remove PLUS_EXPR.
13990 (pointer_table::pointer_table): Remove PLUS_EXPR.
13992 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
13994 * range-op-mixed.h (class operator_cast): Combined from integer
13996 * range-op.cc (op_cast): New object.
13997 (unified_table::unified_table): Add op_cast
13998 (class operator_cast): Move to range-op-mixed.h.
13999 (integral_table::integral_table): Remove op_cast
14000 (pointer_table::pointer_table): Remove op_cast.
14002 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
14004 * range-op-float.cc (operator_cst::fold_range): New.
14005 * range-op-mixed.h (class operator_cst): Move from integer file.
14006 * range-op.cc (op_cst): New object.
14007 (unified_table::unified_table): Add op_cst. Also use for REAL_CST.
14008 (class operator_cst): Move to range-op-mixed.h.
14009 (integral_table::integral_table): Remove op_cst.
14010 (pointer_table::pointer_table): Remove op_cst.
14012 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
14014 * range-op-float.cc (foperator_identity): Remove. Move prototypes
14015 to range-op-mixed.h
14016 (operator_identity::fold_range): Rename from foperator_identity.
14017 (operator_identity::op1_range): Ditto.
14018 (float_table::float_table): Remove fop_identity.
14019 * range-op-mixed.h (class operator_identity): Combined from integer
14021 * range-op.cc (op_identity): New object.
14022 (unified_table::unified_table): Add op_identity.
14023 (class operator_identity): Move to range-op-mixed.h.
14024 (integral_table::integral_table): Remove identity.
14025 (pointer_table::pointer_table): Remove identity.
14027 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
14029 * range-op-float.cc (foperator_ge): Remove. Move prototypes
14030 to range-op-mixed.h
14031 (operator_ge::fold_range): Rename from foperator_ge.
14032 (operator_ge::op1_range): Ditto.
14033 (float_table::float_table): Remove GE_EXPR.
14034 * range-op-mixed.h (class operator_ge): Combined from integer
14036 * range-op.cc (op_ge): New object.
14037 (unified_table::unified_table): Add GE_EXPR.
14038 (class operator_ge): Move to range-op-mixed.h.
14039 (ge_op1_op2_relation): Fold into
14040 operator_ge::op1_op2_relation.
14041 (integral_table::integral_table): Remove GE_EXPR.
14042 (pointer_table::pointer_table): Remove GE_EXPR.
14043 * range-op.h (ge_op1_op2_relation): Delete.
14045 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
14047 * range-op-float.cc (foperator_gt): Remove. Move prototypes
14048 to range-op-mixed.h
14049 (operator_gt::fold_range): Rename from foperator_gt.
14050 (operator_gt::op1_range): Ditto.
14051 (float_table::float_table): Remove GT_EXPR.
14052 * range-op-mixed.h (class operator_gt): Combined from integer
14054 * range-op.cc (op_gt): New object.
14055 (unified_table::unified_table): Add GT_EXPR.
14056 (class operator_gt): Move to range-op-mixed.h.
14057 (gt_op1_op2_relation): Fold into
14058 operator_gt::op1_op2_relation.
14059 (integral_table::integral_table): Remove GT_EXPR.
14060 (pointer_table::pointer_table): Remove GT_EXPR.
14061 * range-op.h (gt_op1_op2_relation): Delete.
14063 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
14065 * range-op-float.cc (foperator_le): Remove. Move prototypes
14066 to range-op-mixed.h
14067 (operator_le::fold_range): Rename from foperator_le.
14068 (operator_le::op1_range): Ditto.
14069 (float_table::float_table): Remove LE_EXPR.
14070 * range-op-mixed.h (class operator_le): Combined from integer
14072 * range-op.cc (op_le): New object.
14073 (unified_table::unified_table): Add LE_EXPR.
14074 (class operator_le): Move to range-op-mixed.h.
14075 (le_op1_op2_relation): Fold into
14076 operator_le::op1_op2_relation.
14077 (integral_table::integral_table): Remove LE_EXPR.
14078 (pointer_table::pointer_table): Remove LE_EXPR.
14079 * range-op.h (le_op1_op2_relation): Delete.
14081 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
14083 * range-op-float.cc (foperator_lt): Remove. Move prototypes
14084 to range-op-mixed.h
14085 (operator_lt::fold_range): Rename from foperator_lt.
14086 (operator_lt::op1_range): Ditto.
14087 (float_table::float_table): Remove LT_EXPR.
14088 * range-op-mixed.h (class operator_lt): Combined from integer
14090 * range-op.cc (op_lt): New object.
14091 (unified_table::unified_table): Add LT_EXPR.
14092 (class operator_lt): Move to range-op-mixed.h.
14093 (lt_op1_op2_relation): Fold into
14094 operator_lt::op1_op2_relation.
14095 (integral_table::integral_table): Remove LT_EXPR.
14096 (pointer_table::pointer_table): Remove LT_EXPR.
14097 * range-op.h (lt_op1_op2_relation): Delete.
14099 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
14101 * range-op-float.cc (foperator_not_equal): Remove. Move prototypes
14102 to range-op-mixed.h
14103 (operator_equal::fold_range): Rename from foperator_not_equal.
14104 (operator_equal::op1_range): Ditto.
14105 (float_table::float_table): Remove NE_EXPR.
14106 * range-op-mixed.h (class operator_not_equal): Combined from integer
14108 * range-op.cc (op_equal): New object.
14109 (unified_table::unified_table): Add NE_EXPR.
14110 (class operator_not_equal): Move to range-op-mixed.h.
14111 (not_equal_op1_op2_relation): Fold into
14112 operator_not_equal::op1_op2_relation.
14113 (integral_table::integral_table): Remove NE_EXPR.
14114 (pointer_table::pointer_table): Remove NE_EXPR.
14115 * range-op.h (not_equal_op1_op2_relation): Delete.
14117 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
14119 * range-op-float.cc (foperator_equal): Remove. Move prototypes
14120 to range-op-mixed.h
14121 (operator_equal::fold_range): Rename from foperator_equal.
14122 (operator_equal::op1_range): Ditto.
14123 (float_table::float_table): Remove EQ_EXPR.
14124 * range-op-mixed.h (class operator_equal): Combined from integer
14126 * range-op.cc (op_equal): New object.
14127 (unified_table::unified_table): Add EQ_EXPR.
14128 (class operator_equal): Move to range-op-mixed.h.
14129 (equal_op1_op2_relation): Fold into
14130 operator_equal::op1_op2_relation.
14131 (integral_table::integral_table): Remove EQ_EXPR.
14132 (pointer_table::pointer_table): Remove EQ_EXPR.
14133 * range-op.h (equal_op1_op2_relation): Delete.
14135 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
14137 * range-op-float.cc (class float_table): Move to header.
14138 (float_table::float_table): Move float only operators to...
14139 (range_op_table::initialize_float_ops): Here.
14140 * range-op-mixed.h: New.
14141 * range-op.cc (integral_tree_table, pointer_tree_table): Moved
14143 (float_tree_table): Moved from range-op-float.cc.
14144 (unified_tree_table): New.
14145 (unified_table::unified_table): New. Call initialize routines.
14146 (get_op_handler): Check unified table first.
14147 (range_op_handler::range_op_handler): Handle no type constructor.
14148 (integral_table::integral_table): Move integral only operators to...
14149 (range_op_table::initialize_integral_ops): Here.
14150 (pointer_table::pointer_table): Move pointer only operators to...
14151 (range_op_table::initialize_pointer_ops): Here.
14152 * range-op.h (enum bool_range_state): Move to range-op-mixed.h.
14153 (get_bool_state): Ditto.
14154 (empty_range_varying): Ditto.
14155 (relop_early_resolve): Ditto.
14156 (class range_op_table): Add new init methods for range types.
14157 (class integral_table): Move declaration to here.
14158 (class pointer_table): Move declaration to here.
14159 (class float_table): Move declaration to here.
14161 2023-06-09 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14162 Richard Sandiford <richard.sandiford@arm.com>
14163 Richard Biener <rguenther@suse.de>
14165 * doc/md.texi: Add SELECT_VL support.
14166 * internal-fn.def (SELECT_VL): Ditto.
14167 * optabs.def (OPTAB_D): Ditto.
14168 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Ditto.
14169 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Ditto.
14170 * tree-vect-stmts.cc (get_select_vl_data_ref_ptr): Ditto.
14171 (vectorizable_store): Ditto.
14172 (vectorizable_load): Ditto.
14173 * tree-vectorizer.h (LOOP_VINFO_USING_SELECT_VL_P): Ditto.
14175 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
14178 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Check param
14181 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
14183 * range-op.cc (range_cast): Move to...
14184 * range-op.h (range_cast): Here and add generic a version.
14186 2023-06-09 Marek Polacek <polacek@redhat.com>
14190 * doc/invoke.texi: Clarify that -Wmissing-field-initializers doesn't
14191 warn about designated initializers in C only.
14193 2023-06-09 Andrew Pinski <apinski@marvell.com>
14195 PR tree-optimization/97711
14196 PR tree-optimization/110155
14197 * match.pd ((zero_one == 0) ? y : z <op> y): Add plus to the op.
14198 ((zero_one != 0) ? z <op> y : y): Likewise.
14200 2023-06-09 Andrew Pinski <apinski@marvell.com>
14202 * match.pd ((zero_one ==/!= 0) ? y : z <op> y): Use
14203 multiply rather than negation/bit_and.
14205 2023-06-09 Andrew Pinski <apinski@marvell.com>
14207 * match.pd (`X & -Y -> X * Y`): Allow for truncation
14208 and the same type for unsigned types.
14210 2023-06-09 Andrew Pinski <apinski@marvell.com>
14212 PR tree-optimization/110165
14213 PR tree-optimization/110166
14214 * match.pd (zero_one_valued_p): Don't accept
14215 signed 1-bit integers.
14217 2023-06-09 Richard Biener <rguenther@suse.de>
14219 * match.pd (two conversions in a row): Use element_precision
14220 to DTRT for VECTOR_TYPE.
14222 2023-06-09 Pan Li <pan2.li@intel.com>
14224 * config/riscv/riscv.md (enabled): Move to another place, and
14225 add fp_vector_disabled to the cond.
14226 (fp_vector_disabled): New attr defined for disabling fp.
14227 * config/riscv/vector-iterators.md: Fix V_WHOLE and V_FRACT.
14229 2023-06-09 Pan Li <pan2.li@intel.com>
14231 * config/riscv/riscv-protos.h (enum frm_field_enum): Adjust
14234 2023-06-09 liuhongt <hongtao.liu@intel.com>
14237 * config/i386/i386.cc (ix86_gimple_fold_builtin): Explicitly
14238 view_convert_expr mask to signed type when folding pblendvb
14241 2023-06-09 liuhongt <hongtao.liu@intel.com>
14244 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
14245 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} into gimple
14246 ABSU_EXPR + VCE, don't fold _mm_abs_{pi8,pi16,pi32} w/o
14248 * config/i386/i386-builtin.def: Replace CODE_FOR_nothing with
14249 real codename for __builtin_ia32_pabs{b,w,d}.
14251 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
14253 * gimple-range-op.cc
14254 (gimple_range_op_handler::gimple_range_op_handler): Adjust.
14255 (gimple_range_op_handler::maybe_builtin_call): Adjust.
14256 * gimple-range-op.h (operand1, operand2): Use m_operator.
14257 * range-op.cc (integral_table, pointer_table): Relocate.
14258 (get_op_handler): Rename from get_handler and handle all types.
14259 (range_op_handler::range_op_handler): Relocate.
14260 (range_op_handler::set_op_handler): Relocate and adjust.
14261 (range_op_handler::range_op_handler): Relocate.
14262 (dispatch_trio): New.
14263 (RO_III, RO_IFI, RO_IFF, RO_FFF, RO_FIF, RO_FII): New consts.
14264 (range_op_handler::dispatch_kind): New.
14265 (range_op_handler::fold_range): Relocate and Use new dispatch value.
14266 (range_op_handler::op1_range): Ditto.
14267 (range_op_handler::op2_range): Ditto.
14268 (range_op_handler::lhs_op1_relation): Ditto.
14269 (range_op_handler::lhs_op2_relation): Ditto.
14270 (range_op_handler::op1_op2_relation): Ditto.
14271 (range_op_handler::set_op_handler): Use m_operator member.
14272 * range-op.h (range_op_handler::operator bool): Use m_operator.
14273 (range_op_handler::dispatch_kind): New.
14274 (range_op_handler::m_valid): Delete.
14275 (range_op_handler::m_int): Delete
14276 (range_op_handler::m_float): Delete
14277 (range_op_handler::m_operator): New.
14278 (range_op_table::operator[]): Relocate from .cc file.
14279 (range_op_table::set): Ditto.
14280 * value-range.h (class vrange): Make range_op_handler a friend.
14282 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
14284 * gimple-range-op.cc (cfn_constant_float_p): Change base class.
14285 (cfn_pass_through_arg1): Adjust using statemenmt.
14286 (cfn_signbit): Change base class, adjust using statement.
14287 (cfn_copysign): Ditto.
14289 (cfn_sincos): Ditto.
14290 * range-op-float.cc (fold_range): Change class to range_operator.
14294 (lhs_op1_relation): Ditto.
14295 (lhs_op2_relation): Ditto.
14296 (op1_op2_relation): Ditto.
14297 (foperator_*): Ditto.
14298 (class float_table): New. Inherit from range_op_table.
14299 (floating_tree_table) Change to range_op_table pointer.
14300 (class floating_op_table): Delete.
14301 * range-op.cc (operator_equal): Adjust using statement.
14302 (operator_not_equal): Ditto.
14303 (operator_lt, operator_le, operator_gt, operator_ge): Ditto.
14304 (operator_minus, operator_cast): Ditto.
14305 (operator_bitwise_and, pointer_plus_operator): Ditto.
14306 (get_float_handle): Change return type.
14307 * range-op.h (range_operator_float): Delete. Relocate all methods
14308 into class range_operator.
14309 (range_op_handler::m_float): Change type to range_operator.
14310 (floating_op_table): Delete.
14311 (floating_tree_table): Change type.
14313 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
14315 * range-op.cc (range_operator::fold_range): Call virtual routine.
14316 (range_operator::update_bitmask): New.
14317 (operator_equal::update_bitmask): New.
14318 (operator_not_equal::update_bitmask): New.
14319 (operator_lt::update_bitmask): New.
14320 (operator_le::update_bitmask): New.
14321 (operator_gt::update_bitmask): New.
14322 (operator_ge::update_bitmask): New.
14323 (operator_ge::update_bitmask): New.
14324 (operator_plus::update_bitmask): New.
14325 (operator_minus::update_bitmask): New.
14326 (operator_pointer_diff::update_bitmask): New.
14327 (operator_min::update_bitmask): New.
14328 (operator_max::update_bitmask): New.
14329 (operator_mult::update_bitmask): New.
14330 (operator_div:operator_div):New.
14331 (operator_div::update_bitmask): New.
14332 (operator_div::m_code): New member.
14333 (operator_exact_divide::operator_exact_divide): New constructor.
14334 (operator_lshift::update_bitmask): New.
14335 (operator_rshift::update_bitmask): New.
14336 (operator_bitwise_and::update_bitmask): New.
14337 (operator_bitwise_or::update_bitmask): New.
14338 (operator_bitwise_xor::update_bitmask): New.
14339 (operator_trunc_mod::update_bitmask): New.
14340 (op_ident, op_unknown, op_ptr_min_max): New.
14341 (op_nop, op_convert): Delete.
14342 (op_ssa, op_paren, op_obj_type): Delete.
14343 (op_realpart, op_imagpart): Delete.
14344 (op_ptr_min, op_ptr_max): Delete.
14345 (pointer_plus_operator:update_bitmask): New.
14346 (range_op_table::set): Do not use m_code.
14347 (integral_table::integral_table): Adjust to single instances.
14348 * range-op.h (range_operator::range_operator): Delete.
14349 (range_operator::m_code): Delete.
14350 (range_operator::update_bitmask): New.
14352 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
14354 * range-op-float.cc (range_operator_float::fold_range): Return
14355 NAN of the result type.
14357 2023-06-08 Jakub Jelinek <jakub@redhat.com>
14359 * optabs.cc (expand_ffs): Add forward declaration.
14360 (expand_doubleword_clz): Rename to ...
14361 (expand_doubleword_clz_ctz_ffs): ... this. Add UNOPTAB argument,
14362 handle also doubleword CTZ and FFS in addition to CLZ.
14363 (expand_unop): Adjust caller. Also call it for doubleword
14364 ctz_optab and ffs_optab.
14366 2023-06-08 Jakub Jelinek <jakub@redhat.com>
14369 * config/i386/i386-expand.cc (ix86_expand_vector_init_general): For
14370 n_words == 2 recurse with mmx_ok as first argument rather than false.
14372 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
14374 * wide-int.cc (wi::bitreverse_large): Use HOST_WIDE_INT_1U to
14375 avoid sign extension/undefined behaviour when setting each bit.
14377 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
14378 Uros Bizjak <ubizjak@gmail.com>
14380 * config/i386/i386-expand.cc (ix86_expand_builtin) <handlecarry>:
14381 Use new x86_stc instruction when the carry flag must be set.
14382 * config/i386/i386.cc (ix86_cc_mode): Use CCCmode for *x86_cmc.
14383 (ix86_rtx_costs): Provide accurate rtx_costs for *x86_cmc.
14384 * config/i386/i386.h (TARGET_SLOW_STC): New define.
14385 * config/i386/i386.md (UNSPEC_STC): New UNSPEC for stc.
14386 (x86_stc): New define_insn.
14387 (define_peephole2): Convert x86_stc into alternate implementation
14388 on pentium4 without -Os when a QImode register is available.
14389 (*x86_cmc): New define_insn.
14390 (define_peephole2): Convert *x86_cmc into alternate implementation
14391 on pentium4 without -Os when a QImode register is available.
14392 (*setccc): New define_insn_and_split for a no-op CCCmode move.
14393 (*setcc_qi_negqi_ccc_1_<mode>): New define_insn_and_split to
14394 recognize (and eliminate) the carry flag being copied to itself.
14395 (*setcc_qi_negqi_ccc_2_<mode>): Likewise.
14396 * config/i386/x86-tune.def (X86_TUNE_SLOW_STC): New tuning flag.
14398 2023-06-07 Andrew Pinski <apinski@marvell.com>
14400 * match.pd: Fix comment for the
14401 `(zero_one ==/!= 0) ? y : z <op> y` patterns.
14403 2023-06-07 Jeff Law <jlaw@ventanamicro.com>
14404 Jeff Law <jlaw@ventanamicro.com>
14406 * config/riscv/bitmanip.md (rotrdi3, rotrsi3, rotlsi3): New expanders.
14407 (rotrsi3_sext): Expose generator.
14408 (rotlsi3 pattern): Hide generator.
14409 * config/riscv/riscv-protos.h (riscv_emit_binary): New function
14411 * config/riscv/riscv.cc (riscv_emit_binary): Removed static
14412 * config/riscv/riscv.md (addsi3, subsi3, negsi2): Hide generator.
14413 (mulsi3, <optab>si3): Likewise.
14414 (addsi3, subsi3, negsi2, mulsi3, <optab>si3): New expanders.
14415 (addv<mode>4, subv<mode>4, mulv<mode>4): Use riscv_emit_binary.
14416 (<u>mulsidi3): Likewise.
14417 (addsi3_extended, subsi3_extended, negsi2_extended): Expose generator.
14418 (mulsi3_extended, <optab>si3_extended): Likewise.
14419 (splitter for shadd feeding divison): Update RTL pattern to account
14420 for changes in how 32 bit ops are expanded for TARGET_64BIT.
14421 * loop-iv.cc (get_biv_step_1): Process src of extension when it PLUS.
14423 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
14426 * config/riscv/riscv.cc (riscv_print_operand): Calculate
14427 memmodel only when it is valid.
14429 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
14431 * config/riscv/riscv.cc (riscv_const_insns): Recursively call
14432 for constant element of a vector.
14434 2023-06-07 Jakub Jelinek <jakub@redhat.com>
14436 * match.pd (zero_one_valued_p): Don't handle integer_zerop specially,
14437 instead compare tree_nonzero_bits <= 1U rather than just == 1.
14439 2023-06-07 Alex Coplan <alex.coplan@arm.com>
14442 * config/aarch64/aarch64-builtins.cc (aarch64_general_simulate_builtin):
14444 (aarch64_init_ls64_builtins): ... here. Switch to declaring public ACLE
14445 names for builtins.
14446 (aarch64_general_init_builtins): Ensure we invoke the arm_acle.h
14447 setup if in_lto_p, just like we do for SVE.
14448 * config/aarch64/arm_acle.h: (__arm_ld64b): Delete.
14449 (__arm_st64b): Delete.
14450 (__arm_st64bv): Delete.
14451 (__arm_st64bv0): Delete.
14453 2023-06-07 Alex Coplan <alex.coplan@arm.com>
14456 * config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64):
14457 Use input operand for the destination address.
14458 * config/aarch64/aarch64.md (st64b): Fix constraint on address
14461 2023-06-07 Alex Coplan <alex.coplan@arm.com>
14464 * config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types):
14465 Replace eight consecutive spaces with tabs.
14466 (aarch64_init_ls64_builtins): Likewise.
14467 (aarch64_expand_builtin_ls64): Likewise.
14468 * config/aarch64/aarch64.md (ld64b): Likewise.
14471 (st64bv0): Likewise.
14473 2023-06-07 Vladimir N. Makarov <vmakarov@redhat.com>
14475 * ira-costs.cc: (find_costs_and_classes): Constrain classes of pic
14476 offset table pseudo to a general reg subset.
14478 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14480 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode><vczle><vczbe>):
14482 (*aarch64_sqmovun<mode>_insn<vczle><vczbe>): ... This. Reimplement
14484 (aarch64_sqmovun<mode> [SD_HSDI]): Reimplement with RTL codes.
14485 (aarch64_sqxtun2<mode>_le): Likewise.
14486 (aarch64_sqxtun2<mode>_be): Likewise.
14487 (aarch64_sqxtun2<mode>): Adjust for the above.
14488 (aarch64_sqmovun<mode>): New define_expand.
14489 * config/aarch64/iterators.md (UNSPEC_SQXTUN): Delete.
14490 (half_mask): New mode attribute.
14491 * config/aarch64/predicates.md (aarch64_simd_umax_half_mode):
14494 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14496 * config/aarch64/aarch64-simd.md (aarch64_addp<mode><vczle><vczbe>):
14498 (aarch64_addp<mode>_insn): ... This...
14499 (aarch64_addp<mode><vczle><vczbe>_insn): ... And this.
14500 (aarch64_addp<mode>): New define_expand.
14502 2023-06-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14504 * config/riscv/riscv-protos.h (expand_vec_perm_const): New function.
14505 * config/riscv/riscv-v.cc
14506 (rvv_builder::can_duplicate_repeating_sequence_p): Support POLY
14508 (rvv_builder::single_step_npatterns_p): New function.
14509 (rvv_builder::npatterns_all_equal_p): Ditto.
14510 (const_vec_all_in_range_p): Support POLY handling.
14511 (gen_const_vector_dup): Ditto.
14512 (emit_vlmax_gather_insn): Add vrgatherei16.
14513 (emit_vlmax_masked_gather_mu_insn): Ditto.
14514 (expand_const_vector): Add VLA SLP const vector support.
14515 (expand_vec_perm): Support POLY.
14516 (struct expand_vec_perm_d): New struct.
14517 (shuffle_generic_patterns): New function.
14518 (expand_vec_perm_const_1): Ditto.
14519 (expand_vec_perm_const): Ditto.
14520 * config/riscv/riscv.cc (riscv_vectorize_vec_perm_const): Ditto.
14521 (TARGET_VECTORIZE_VEC_PERM_CONST): New targethook.
14523 2023-06-07 Andrew Pinski <apinski@marvell.com>
14525 PR middle-end/110117
14526 * expr.cc (expand_single_bit_test): Handle
14527 const_int from expand_expr.
14529 2023-06-07 Andrew Pinski <apinski@marvell.com>
14531 * expr.cc (do_store_flag): Rearrange the
14532 TER code so that it overrides the nonzero bits
14533 info if we had `a & POW2`.
14535 2023-06-07 Andrew Pinski <apinski@marvell.com>
14537 PR tree-optimization/110134
14538 * match.pd (-A CMP -B -> B CMP A): Allow EQ/NE for all integer
14540 (-A CMP CST -> B CMP (-CST)): Likewise.
14542 2023-06-07 Andrew Pinski <apinski@marvell.com>
14544 PR tree-optimization/89263
14545 PR tree-optimization/99069
14546 PR tree-optimization/20083
14547 PR tree-optimization/94898
14548 * match.pd: Add patterns to optimize `a ? onezero : onezero` with
14549 one of the operands are constant.
14551 2023-06-07 Andrew Pinski <apinski@marvell.com>
14553 * match.pd (zero_one_valued_p): Match 0 integer constant
14556 2023-06-07 Pan Li <pan2.li@intel.com>
14558 * config/riscv/riscv-vector-builtins-types.def
14559 (vfloat32mf2_t): Take RVV_REQUIRE_ELEN_FP_16 as requirement.
14560 (vfloat32m1_t): Ditto.
14561 (vfloat32m2_t): Ditto.
14562 (vfloat32m4_t): Ditto.
14563 (vfloat32m8_t): Ditto.
14564 (vint16mf4_t): Ditto.
14565 (vint16mf2_t): Ditto.
14566 (vint16m1_t): Ditto.
14567 (vint16m2_t): Ditto.
14568 (vint16m4_t): Ditto.
14569 (vint16m8_t): Ditto.
14570 (vuint16mf4_t): Ditto.
14571 (vuint16mf2_t): Ditto.
14572 (vuint16m1_t): Ditto.
14573 (vuint16m2_t): Ditto.
14574 (vuint16m4_t): Ditto.
14575 (vuint16m8_t): Ditto.
14576 (vint32mf2_t): Ditto.
14577 (vint32m1_t): Ditto.
14578 (vint32m2_t): Ditto.
14579 (vint32m4_t): Ditto.
14580 (vint32m8_t): Ditto.
14581 (vuint32mf2_t): Ditto.
14582 (vuint32m1_t): Ditto.
14583 (vuint32m2_t): Ditto.
14584 (vuint32m4_t): Ditto.
14585 (vuint32m8_t): Ditto.
14587 2023-06-07 Jason Merrill <jason@redhat.com>
14590 * doc/invoke.texi: Document it.
14592 2023-06-06 Roger Sayle <roger@nextmovesoftware.com>
14594 * doc/rtl.texi (bitreverse, copysign): Document new RTX codes.
14595 * rtl.def (BITREVERSE, COPYSIGN): Define new RTX codes.
14596 * simplify-rtx.cc (simplify_unary_operation_1): Optimize
14597 NOT (BITREVERSE x) as BITREVERSE (NOT x).
14598 Optimize POPCOUNT (BITREVERSE x) as POPCOUNT x.
14599 Optimize PARITY (BITREVERSE x) as PARITY x.
14600 Optimize BITREVERSE (BITREVERSE x) as x.
14601 (simplify_const_unary_operation) <case BITREVERSE>: Evaluate
14602 BITREVERSE of a constant integer at compile-time.
14603 (simplify_binary_operation_1) <case COPYSIGN>: Optimize
14604 COPY_SIGN (x, x) as x. Optimize COPYSIGN (x, C) as ABS x
14605 or NEG (ABS x) for constant C. Optimize COPYSIGN (ABS x, y)
14606 and COPYSIGN (NEG x, y) as COPYSIGN (x, y).
14607 Optimize COPYSIGN (x, ABS y) as ABS x.
14608 Optimize COPYSIGN (COPYSIGN (x, y), z) as COPYSIGN (x, z).
14609 Optimize COPYSIGN (x, COPYSIGN (y, z)) as COPYSIGN (x, z).
14610 (simplify_const_binary_operation): Evaluate COPYSIGN of constant
14611 arguments at compile-time.
14613 2023-06-06 Uros Bizjak <ubizjak@gmail.com>
14615 * rtl.h (function_invariant_p): Change return type from int to bool.
14616 * reload1.cc (function_invariant_p): Change return type from
14617 int to bool and adjust function body accordingly.
14619 2023-06-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14621 * config/riscv/autovec-opt.md (*<optab>_fma<mode>): New pattern.
14622 (*single_<optab>mult_plus<mode>): Ditto.
14623 (*double_<optab>mult_plus<mode>): Ditto.
14624 (*sign_zero_extend_fma): Ditto.
14625 (*zero_sign_extend_fma): Ditto.
14626 * config/riscv/riscv-protos.h (enum insn_type): New enum.
14628 2023-06-06 Kwok Cheung Yeung <kcy@codesourcery.com>
14629 Tobias Burnus <tobias@codesourcery.com>
14631 * gimplify.cc (omp_notice_variable): Apply GOVD_MAP_ALLOC_ONLY flag
14632 and defaultmap flags if the defaultmap has GOVD_MAP_FORCE_PRESENT flag
14634 (omp_get_attachment): Handle map clauses with 'present' modifier.
14635 (omp_group_base): Likewise.
14636 (gimplify_scan_omp_clauses): Reorder present maps to come first.
14637 Set GOVD flags for present defaultmaps.
14638 (gimplify_adjust_omp_clauses_1): Set map kind for present defaultmaps.
14639 * omp-low.cc (scan_sharing_clauses): Handle 'always, present' map
14641 (lower_omp_target): Handle map clauses with 'present' modifier.
14642 Handle 'to' and 'from' clauses with 'present'.
14643 * tree-core.h (enum omp_clause_defaultmap_kind): Add
14644 OMP_CLAUSE_DEFAULTMAP_PRESENT defaultmap kind.
14645 * tree-pretty-print.cc (dump_omp_clause): Handle 'map', 'to' and
14646 'from' clauses with 'present' modifier. Handle present defaultmap.
14647 * tree.h (OMP_CLAUSE_MOTION_PRESENT): New #define.
14649 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
14651 * config/rs6000/genfusion.pl: Delete some dead code.
14653 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
14655 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): New, rewritten and
14657 (gen_ld_cmpi_p10): ... this.
14659 2023-06-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
14662 * config/rs6000/rs6000.cc (vec_const_128bit_to_bytes): Remove
14663 duplicate expression.
14665 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14667 * config/aarch64/aarch64-builtins.cc (aarch64_general_gimple_fold_builtin):
14668 Handle unsigned reduc_plus_scal_ builtins.
14669 * config/aarch64/aarch64-simd-builtins.def (addp): Delete DImode instances.
14670 * config/aarch64/aarch64-simd.md (aarch64_addpdi): Delete.
14671 * config/aarch64/arm_neon.h (vpaddd_s64): Reimplement with
14672 __builtin_aarch64_reduc_plus_scal_v2di.
14673 (vpaddd_u64): Reimplement with __builtin_aarch64_reduc_plus_scal_v2di_uu.
14675 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14677 * config/aarch64/aarch64-simd.md (aarch64_<sur>shr_n<mode>): Delete.
14678 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): New define_insn.
14679 (aarch64_<sra_op>rshr_n<mode>): New define_expand.
14681 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14683 * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Delete.
14684 (aarch64_shrn<mode>_insn_be): Delete.
14685 (*aarch64_<srn_op>shrn<mode>_vect): Rename to...
14686 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): ... This.
14687 (aarch64_shrn<mode>): Remove reference to the above deleted patterns.
14688 (aarch64_rshrn<mode>_insn_le): Delete.
14689 (aarch64_rshrn<mode>_insn_be): Delete.
14690 (aarch64_rshrn<mode><vczle><vczbe>_insn): New define_insn.
14691 (aarch64_rshrn<mode>): Remove references to the above deleted patterns.
14693 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14695 * config/aarch64/aarch64-protos.h (aarch64_parallel_select_half_p):
14697 (aarch64_pars_overlap_p): Likewise.
14698 * config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>):
14699 Express in terms of UNSPEC_ADDV.
14700 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): Likewise.
14701 (*aarch64_<su>addlv<mode>_reduction): Define.
14702 (*aarch64_uaddlv<mode>_reduction_2): Likewise.
14703 * config/aarch64/aarch64.cc (aarch64_parallel_select_half_p): Define.
14704 (aarch64_pars_overlap_p): Likewise.
14705 * config/aarch64/iterators.md (UNSPEC_SADDLV, UNSPEC_UADDLV): Delete.
14706 (VQUADW): New mode attribute.
14707 (VWIDE2X_S): Likewise.
14709 (su): Delete handling of UNSPEC_SADDLV, UNSPEC_UADDLV.
14710 * config/aarch64/predicates.md (vect_par_cnst_select_half): Define.
14712 2023-06-06 Richard Biener <rguenther@suse.de>
14714 PR middle-end/110055
14715 * gimplify.cc (gimplify_target_expr): Do not emit
14716 CLOBBERs for variables which have static storage duration
14717 after gimplifying their initializers.
14719 2023-06-06 Richard Biener <rguenther@suse.de>
14721 PR tree-optimization/109143
14722 * tree-ssa-structalias.cc (solution_set_expand): Avoid
14723 one bitmap iteration and optimize bit range setting.
14725 2023-06-06 Hans-Peter Nilsson <hp@axis.com>
14727 PR bootstrap/110120
14728 * postreload.cc (reload_cse_move2add, move2add_use_add2_insn): Use
14729 XVECEXP, not XEXP, to access first item of a PARALLEL.
14731 2023-06-06 Pan Li <pan2.li@intel.com>
14733 * config/riscv/riscv-vector-builtins-types.def
14734 (vfloat16mf4_t): Add vfloat16mf4_t to WF operations.
14735 (vfloat16mf2_t): Likewise.
14736 (vfloat16m1_t): Likewise.
14737 (vfloat16m2_t): Likewise.
14738 (vfloat16m4_t): Likewise.
14739 (vfloat16m8_t): Likewise.
14740 * config/riscv/vector-iterators.md: Add FP=16 to VWF, VWF_ZVE64,
14741 VWLMUL1, VWLMUL1_ZVE64, vwlmul1 and vwlmul1_zve64.
14743 2023-06-06 Fei Gao <gaofei@eswincomputing.com>
14745 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Use Pmode
14746 for cfi reg/mem machmode
14747 (riscv_adjust_libcall_cfi_epilogue): Use Pmode for cfi reg machmode
14749 2023-06-06 Li Xu <xuli1@eswincomputing.com>
14751 * config/riscv/vector-iterators.md:
14752 Fix 'REQUIREMENT' for machine_mode 'MODE'.
14753 * config/riscv/vector.md (@pred_indexed_<order>store<VNX16_QHS:mode>
14754 <VNX16_QHSI:mode>): change VNX16_QHSI to VNX16_QHSDI.
14755 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>): Ditto.
14757 2023-06-06 Pan Li <pan2.li@intel.com>
14759 * config/riscv/vector-iterators.md: Fix typo in mode attr.
14761 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
14762 Joel Hutton <joel.hutton@arm.com>
14764 * doc/generic.texi: Remove old tree codes.
14765 * expr.cc (expand_expr_real_2): Remove old tree code cases.
14766 * gimple-pretty-print.cc (dump_binary_rhs): Likewise.
14767 * optabs-tree.cc (optab_for_tree_code): Likewise.
14768 (supportable_half_widening_operation): Likewise.
14769 * tree-cfg.cc (verify_gimple_assign_binary): Likewise.
14770 * tree-inline.cc (estimate_operator_cost): Likewise.
14771 (op_symbol_code): Likewise.
14772 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Likewise.
14773 (vect_analyze_data_ref_accesses): Likewise.
14774 * tree-vect-generic.cc (expand_vector_operations_1): Likewise.
14775 * cfgexpand.cc (expand_debug_expr): Likewise.
14776 * tree-vect-stmts.cc (vectorizable_conversion): Likewise.
14777 (supportable_widening_operation): Likewise.
14778 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
14780 * optabs.def (vec_widen_ssubl_hi_optab, vec_widen_ssubl_lo_optab,
14781 vec_widen_saddl_hi_optab, vec_widen_saddl_lo_optab,
14782 vec_widen_usubl_hi_optab, vec_widen_usubl_lo_optab,
14783 vec_widen_uaddl_hi_optab, vec_widen_uaddl_lo_optab): Remove optabs.
14784 * tree-pretty-print.cc (dump_generic_node): Remove tree code definition.
14785 * tree.def (WIDEN_PLUS_EXPR, WIDEN_MINUS_EXPR, VEC_WIDEN_PLUS_HI_EXPR,
14786 VEC_WIDEN_PLUS_LO_EXPR, VEC_WIDEN_MINUS_HI_EXPR,
14787 VEC_WIDEN_MINUS_LO_EXPR): Likewise.
14789 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
14790 Joel Hutton <joel.hutton@arm.com>
14791 Tamar Christina <tamar.christina@arm.com>
14793 * config/aarch64/aarch64-simd.md (vec_widen_<su>addl_lo_<mode>): Rename
14795 (vec_widen_<su>add_lo_<mode>): ... to this.
14796 (vec_widen_<su>addl_hi_<mode>): Rename this ...
14797 (vec_widen_<su>add_hi_<mode>): ... to this.
14798 (vec_widen_<su>subl_lo_<mode>): Rename this ...
14799 (vec_widen_<su>sub_lo_<mode>): ... to this.
14800 (vec_widen_<su>subl_hi_<mode>): Rename this ...
14801 (vec_widen_<su>sub_hi_<mode>): ...to this.
14802 * doc/generic.texi: Document new IFN codes.
14803 * internal-fn.cc (lookup_hilo_internal_fn): Add lookup function.
14804 (commutative_binary_fn_p): Add widen_plus fn's.
14805 (widening_fn_p): New function.
14806 (narrowing_fn_p): New function.
14807 (direct_internal_fn_optab): Change visibility.
14808 * internal-fn.def (DEF_INTERNAL_WIDENING_OPTAB_FN): Macro to define an
14809 internal_fn that expands into multiple internal_fns for widening.
14810 (IFN_VEC_WIDEN_PLUS, IFN_VEC_WIDEN_PLUS_HI, IFN_VEC_WIDEN_PLUS_LO,
14811 IFN_VEC_WIDEN_PLUS_EVEN, IFN_VEC_WIDEN_PLUS_ODD,
14812 IFN_VEC_WIDEN_MINUS, IFN_VEC_WIDEN_MINUS_HI,
14813 IFN_VEC_WIDEN_MINUS_LO, IFN_VEC_WIDEN_MINUS_ODD,
14814 IFN_VEC_WIDEN_MINUS_EVEN): Define widening plus,minus functions.
14815 * internal-fn.h (direct_internal_fn_optab): Declare new prototype.
14816 (lookup_hilo_internal_fn): Likewise.
14817 (widening_fn_p): Likewise.
14818 (Narrowing_fn_p): Likewise.
14819 * optabs.cc (commutative_optab_p): Add widening plus optabs.
14820 * optabs.def (OPTAB_D): Define widen add, sub optabs.
14821 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Support
14822 patterns with a hi/lo or even/odd split.
14823 (vect_recog_sad_pattern): Refactor to use new IFN codes.
14824 (vect_recog_widen_plus_pattern): Likewise.
14825 (vect_recog_widen_minus_pattern): Likewise.
14826 (vect_recog_average_pattern): Likewise.
14827 * tree-vect-stmts.cc (vectorizable_conversion): Add support for
14829 (supportable_widening_operation): Likewise.
14830 * tree.def (WIDEN_SUM_EXPR): Update example to use new IFNs.
14832 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
14833 Joel Hutton <joel.hutton@arm.com>
14835 * tree-vect-patterns.cc: Add include for gimple-iterator.
14836 (vect_recog_widen_op_pattern): Refactor to use code_helper.
14837 (vect_gimple_build): New function.
14838 * tree-vect-stmts.cc (simple_integer_narrowing): Refactor to use
14840 (vectorizable_call): Likewise.
14841 (vect_gen_widened_results_half): Likewise.
14842 (vect_create_vectorized_demotion_stmts): Likewise.
14843 (vect_create_vectorized_promotion_stmts): Likewise.
14844 (vect_create_half_widening_stmts): Likewise.
14845 (vectorizable_conversion): Likewise.
14846 (supportable_widening_operation): Likewise.
14847 (supportable_narrowing_operation): Likewise.
14848 * tree-vectorizer.h (supportable_widening_operation): Change
14849 prototype to use code_helper.
14850 (supportable_narrowing_operation): Likewise.
14851 (vect_gimple_build): New function prototype.
14852 * tree.h (code_helper::safe_as_tree_code): New function.
14853 (code_helper::safe_as_fn_code): New function.
14855 2023-06-05 Roger Sayle <roger@nextmovesoftware.com>
14857 * wide-int.cc (wi::bitreverse_large): New function implementing
14858 bit reversal of an integer.
14859 * wide-int.h (wi::bitreverse): New (template) function prototype.
14860 (bitreverse_large): Prototype helper function/implementation.
14861 (wi::bitreverse): New template wrapper around bitreverse_large.
14863 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
14865 * rtl.h (print_rtl_single): Change return type from int to void.
14866 (print_rtl_single_with_indent): Ditto.
14867 * print-rtl.h (class rtx_writer): Ditto. Change m_sawclose to bool.
14868 * print-rtl.cc (rtx_writer::rtx_writer): Update for m_sawclose change.
14869 (rtx_writer::print_rtx_operand_code_0): Ditto.
14870 (rtx_writer::print_rtx_operand_codes_E_and_V): Ditto.
14871 (rtx_writer::print_rtx_operand_code_i): Ditto.
14872 (rtx_writer::print_rtx_operand_code_u): Ditto.
14873 (rtx_writer::print_rtx_operand): Ditto.
14874 (rtx_writer::print_rtx): Ditto.
14875 (rtx_writer::finish_directive): Ditto.
14876 (print_rtl_single): Change return type from int to void
14877 and adjust function body accordingly.
14878 (rtx_writer::print_rtl_single_with_indent): Ditto.
14880 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
14882 * rtl.h (reg_classes_intersect_p): Change return type from int to bool.
14883 (reg_class_subset_p): Ditto.
14884 * reginfo.cc (reg_classes_intersect_p): Ditto.
14885 (reg_class_subset_p): Ditto.
14887 2023-06-05 Pan Li <pan2.li@intel.com>
14889 * config/riscv/riscv-vector-builtins-types.def
14890 (vfloat32mf2_t): New type for DEF_RVV_WEXTF_OPS.
14891 (vfloat32m1_t): Ditto.
14892 (vfloat32m2_t): Ditto.
14893 (vfloat32m4_t): Ditto.
14894 (vfloat32m8_t): Ditto.
14895 (vint16mf4_t): New type for DEF_RVV_CONVERT_I_OPS.
14896 (vint16mf2_t): Ditto.
14897 (vint16m1_t): Ditto.
14898 (vint16m2_t): Ditto.
14899 (vint16m4_t): Ditto.
14900 (vint16m8_t): Ditto.
14901 (vuint16mf4_t): New type for DEF_RVV_CONVERT_U_OPS.
14902 (vuint16mf2_t): Ditto.
14903 (vuint16m1_t): Ditto.
14904 (vuint16m2_t): Ditto.
14905 (vuint16m4_t): Ditto.
14906 (vuint16m8_t): Ditto.
14907 (vint32mf2_t): New type for DEF_RVV_WCONVERT_I_OPS.
14908 (vint32m1_t): Ditto.
14909 (vint32m2_t): Ditto.
14910 (vint32m4_t): Ditto.
14911 (vint32m8_t): Ditto.
14912 (vuint32mf2_t): New type for DEF_RVV_WCONVERT_U_OPS.
14913 (vuint32m1_t): Ditto.
14914 (vuint32m2_t): Ditto.
14915 (vuint32m4_t): Ditto.
14916 (vuint32m8_t): Ditto.
14917 * config/riscv/vector-iterators.md: Add FP=16 support for V,
14918 VWCONVERTI, VCONVERT, VNCONVERT, VMUL1 and vlmul1.
14920 2023-06-05 Andrew Pinski <apinski@marvell.com>
14922 PR bootstrap/110085
14923 * Makefile.in (clean): Remove the removing of
14924 MULTILIB_DIR/MULTILIB_OPTIONS directories.
14926 2023-06-05 YunQiang Su <yunqiang.su@cipunited.com>
14928 * config/mips/mips-protos.h (mips_emit_speculation_barrier): New
14930 * config/mips/mips.cc (speculation_barrier_libfunc): New static
14932 (mips_init_libfuncs): Initialize it.
14933 (mips_emit_speculation_barrier): New function.
14934 * config/mips/mips.md (speculation_barrier): Call
14935 mips_emit_speculation_barrier.
14937 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14939 * config/riscv/riscv-v.cc (class rvv_builder): Reorganize functions.
14940 (rvv_builder::can_duplicate_repeating_sequence_p): Ditto.
14941 (rvv_builder::repeating_sequence_use_merge_profitable_p): Ditto.
14942 (rvv_builder::get_merged_repeating_sequence): Ditto.
14943 (rvv_builder::get_merge_scalar_mask): Ditto.
14944 (emit_scalar_move_insn): Ditto.
14945 (emit_vlmax_integer_move_insn): Ditto.
14946 (emit_nonvlmax_integer_move_insn): Ditto.
14947 (emit_vlmax_gather_insn): Ditto.
14948 (emit_vlmax_masked_gather_mu_insn): Ditto.
14949 (get_repeating_sequence_dup_machine_mode): Ditto.
14951 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14953 * config/riscv/autovec.md: Split arguments.
14954 * config/riscv/riscv-protos.h (expand_vec_perm): Ditto.
14955 * config/riscv/riscv-v.cc (expand_vec_perm): Ditto.
14957 2023-06-04 Andrew Pinski <apinski@marvell.com>
14959 * expr.cc (do_store_flag): Improve for single bit testing
14960 not against zero but against that single bit.
14962 2023-06-04 Andrew Pinski <apinski@marvell.com>
14964 * expr.cc (do_store_flag): Extend the one bit checking case
14965 to handle the case where we don't have an and but rather still
14966 one bit is known to be non-zero.
14968 2023-06-04 Jeff Law <jlaw@ventanamicro.com>
14970 * config/h8300/constraints.md (Zz): Make this a normal
14972 * config/h8300/h8300.cc (TARGET_LRA_P): Remove.
14973 * config/h8300/logical.md (H8/SX bit patterns): Remove.
14975 2023-06-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
14977 * config/xtensa/xtensa.md (*btrue_INT_MIN, *eqne_INT_MIN):
14978 New insn_and_split patterns.
14980 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14983 * config/riscv/riscv-vector-builtins-bases.cc: Change expand approach.
14984 * config/riscv/vector.md (@vlmul_extx2<mode>): Remove it.
14985 (@vlmul_extx4<mode>): Ditto.
14986 (@vlmul_extx8<mode>): Ditto.
14987 (@vlmul_extx16<mode>): Ditto.
14988 (@vlmul_extx32<mode>): Ditto.
14989 (@vlmul_extx64<mode>): Ditto.
14990 (*vlmul_extx2<mode>): Ditto.
14991 (*vlmul_extx4<mode>): Ditto.
14992 (*vlmul_extx8<mode>): Ditto.
14993 (*vlmul_extx16<mode>): Ditto.
14994 (*vlmul_extx32<mode>): Ditto.
14995 (*vlmul_extx64<mode>): Ditto.
14997 2023-06-04 Pan Li <pan2.li@intel.com>
14999 * config/riscv/riscv-vector-builtins-types.def
15000 (vfloat32mf2_t): Add vfloat32mf2_t type to vfncvt.f.f.w operations.
15001 (vfloat32m1_t): Likewise.
15002 (vfloat32m2_t): Likewise.
15003 (vfloat32m4_t): Likewise.
15004 (vfloat32m8_t): Likewise.
15005 * config/riscv/riscv-vector-builtins.def: Fix typo in comments.
15006 * config/riscv/vector-iterators.md: Add single to half machine
15009 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15011 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move to autovec-opt.md.
15012 (*n<optab><mode>): Ditto.
15013 * config/riscv/autovec.md (*<optab>not<mode>): Ditto.
15014 (*n<optab><mode>): Ditto.
15015 * config/riscv/vector.md: Ditto.
15017 2023-06-04 Roger Sayle <roger@nextmovesoftware.com>
15020 * config/i386/i386-features.cc (scalar_chain::convert_compare):
15021 Update or delete REG_EQUAL notes, converting CONST_INT and
15022 CONST_WIDE_INT immediate operands to a suitable CONST_VECTOR.
15024 2023-06-04 Jason Merrill <jason@redhat.com>
15027 * tree-eh.cc (lower_resx): Pass the exception pointer to the
15029 * except.h: Tweak comment.
15031 2023-06-04 Hans-Peter Nilsson <hp@axis.com>
15033 * postreload.cc (move2add_use_add2_insn): Handle
15034 trivial single_sets. Rename variable PAT to SET.
15035 (move2add_use_add3_insn, reload_cse_move2add): Similar.
15037 2023-06-04 Pan Li <pan2.li@intel.com>
15039 * config/riscv/riscv-vector-builtins-types.def
15040 (vfloat16mf4_t): Add the float16 type to DEF_RVV_F_OPS.
15041 (vfloat16mf2_t): Likewise.
15042 (vfloat16m1_t): Likewise.
15043 (vfloat16m2_t): Likewise.
15044 (vfloat16m4_t): Likewise.
15045 (vfloat16m8_t): Likewise.
15046 * config/riscv/riscv.md: Add vfloat16*_t to attr mode.
15047 * config/riscv/vector-iterators.md: Add vfloat16*_t machine mode
15048 to V, V_WHOLE, V_FRACT, VINDEX, VM, VEL and sew.
15049 * config/riscv/vector.md: Add vfloat16*_t machine mode to sew,
15052 2023-06-03 Fei Gao <gaofei@eswincomputing.com>
15054 * config/riscv/riscv.cc (riscv_expand_epilogue): fix cfi issue with
15057 2023-06-03 Die Li <lidie@eswincomputing.com>
15059 * config/riscv/thead.md (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Delete.
15061 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15063 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
15065 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15067 * config/riscv/vector.md: Add vector-opt.md.
15068 * config/riscv/autovec-opt.md: New file.
15070 2023-06-03 liuhongt <hongtao.liu@intel.com>
15072 PR tree-optimization/110067
15073 * gimple-ssa-store-merging.cc (find_bswap_or_nop): Don't try
15074 bswap + rotate when TYPE_PRECISION(n->type) > n->range.
15076 2023-06-03 liuhongt <hongtao.liu@intel.com>
15079 * config/i386/mmx.md (truncv2hiv2qi2): New define_insn.
15080 (truncv2si<mode>2): Ditto.
15082 2023-06-02 Andrew Pinski <apinski@marvell.com>
15084 PR rtl-optimization/102733
15085 * dse.cc (store_info): Add addrspace field.
15086 (record_store): Record the address space
15087 and check to make sure they are the same.
15089 2023-06-02 Andrew Pinski <apinski@marvell.com>
15091 PR rtl-optimization/110042
15092 * ifcvt.cc (bbs_ok_for_cmove_arith): Allow paradoxical subregs.
15093 (bb_valid_for_noce_process_p): Strip the subreg for the SET_DEST.
15095 2023-06-02 Iain Sandoe <iain@sandoe.co.uk>
15098 * config/rs6000/rs6000.cc (darwin_rs6000_special_round_type_align):
15099 Make sure that we do not have a cap on field alignment before altering
15100 the struct layout based on the type alignment of the first entry.
15102 2023-06-02 David Faust <david.faust@oracle.com>
15105 * btfout.cc (btf_absolute_func_id): New function.
15106 (btf_asm_func_type): Call it here. Change index parameter from
15107 size_t to ctf_id_t. Use PRIu64 formatter.
15109 2023-06-02 Alex Coplan <alex.coplan@arm.com>
15111 * btfout.cc (btf_asm_type): Use PRIu64 instead of %lu for uint64_t.
15112 (btf_asm_datasec_type): Likewise.
15114 2023-06-02 Carl Love <cel@us.ibm.com>
15116 * config/rs6000/rs6000-builtins.def (__builtin_altivec_tr_stxvrhx,
15117 __builtin_altivec_tr_stxvrwx): Fix type of third argument.
15119 2023-06-02 Jason Merrill <jason@redhat.com>
15123 * tree.h (DECL_MERGEABLE): New.
15124 * tree-core.h (struct tree_decl_common): Mention it.
15125 * gimplify.cc (gimplify_init_constructor): Check it.
15126 * cgraph.cc (symtab_node::address_can_be_compared_p): Likewise.
15127 * varasm.cc (categorize_decl_for_section): Likewise.
15129 2023-06-02 Uros Bizjak <ubizjak@gmail.com>
15131 * rtl.h (stack_regs_mentioned): Change return type from int to bool.
15132 * reg-stack.cc (struct_block_info_def): Change "done" to bool.
15133 (stack_regs_mentioned_p): Change return type from int to bool
15134 and adjust function body accordingly.
15135 (stack_regs_mentioned): Ditto.
15136 (check_asm_stack_operands): Ditto. Change "malformed_asm"
15138 (move_for_stack_reg): Recode handling of control_flow_insn_deleted.
15139 (swap_rtx_condition_1): Change return type from int to bool
15140 and adjust function body accordingly. Change "r" variable to bool.
15141 (swap_rtx_condition): Change return type from int to bool
15142 and adjust function body accordingly.
15143 (subst_stack_regs_pat): Recode handling of control_flow_insn_deleted.
15144 (subst_stack_regs): Ditto.
15145 (convert_regs_entry): Change return type from int to bool and adjust
15146 function body accordingly. Change "inserted" variable to bool.
15147 (convert_regs_1): Recode handling of control_flow_insn_deleted.
15148 (convert_regs_2): Recode handling of cfg_altered.
15149 (convert_regs): Ditto. Change "inserted" variable to bool.
15151 2023-06-02 Jason Merrill <jason@redhat.com>
15154 * varasm.cc (output_constant) [REAL_TYPE]: Check that sizes match.
15155 (initializer_constant_valid_p_1): Compare float precision.
15157 2023-06-02 Alexander Monakov <amonakov@ispras.ru>
15159 * doc/extend.texi (Vector Extensions): Clarify bitwise shift
15162 2023-06-02 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15164 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Change decrement IV flow.
15165 (vect_set_loop_condition_partial_vectors): Ditto.
15167 2023-06-02 Georg-Johann Lay <avr@gjlay.de>
15170 * config/avr/avr.md: Add an RTL peephole to optimize operations on
15171 non-LD_REGS after a move from LD_REGS.
15172 (piaop): New code iterator.
15174 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
15177 * doc/install.texi: Document (optional) Perl usage for parallel
15178 testing of libgomp.
15180 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
15183 * doc/install.texi (Perl): Back to requiring "Perl version 5.6.1 (or
15186 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15187 KuanLin Chen <best124612@gmail.com>
15189 * config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
15190 * config/riscv/riscv-vector-builtins-shapes.cc (struct fault_load_def): Ditto.
15192 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15194 * config/riscv/riscv-v.cc (expand_vec_series): Optimize reverse series index vector.
15196 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15198 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
15200 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15202 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_VXRM_ENUM): Add
15204 (DEF_RVV_FRM_ENUM): Ditto.
15206 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15208 * config/riscv/riscv-vector-builtins-bases.cc: Change vwadd.wv/vwsub.wv
15209 intrinsic API expander
15210 * config/riscv/vector.md
15211 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Remove it.
15212 (@pred_single_widen_sub<any_extend:su><mode>): New pattern.
15213 (@pred_single_widen_add<any_extend:su><mode>): New pattern.
15215 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15217 * config/riscv/autovec.md (vec_perm<mode>): New pattern.
15218 * config/riscv/predicates.md (vector_perm_operand): New predicate.
15219 * config/riscv/riscv-protos.h (enum insn_type): New enum.
15220 (expand_vec_perm): New function.
15221 * config/riscv/riscv-v.cc (const_vec_all_in_range_p): Ditto.
15222 (gen_const_vector_dup): Ditto.
15223 (emit_vlmax_gather_insn): Ditto.
15224 (emit_vlmax_masked_gather_mu_insn): Ditto.
15225 (expand_vec_perm): Ditto.
15227 2023-06-01 Jason Merrill <jason@redhat.com>
15229 * doc/invoke.texi (-Wpedantic): Improve clarity.
15231 2023-06-01 Uros Bizjak <ubizjak@gmail.com>
15233 * rtl.h (exp_equiv_p): Change return type from int to bool.
15234 * cse.cc (mention_regs): Change return type from int to bool
15235 and adjust function body accordingly.
15236 (exp_equiv_p): Ditto.
15237 (insert_regs): Ditto. Change "modified" function argument to bool
15238 and update usage accordingly.
15239 (record_jump_cond): Remove always zero "reversed_nonequality"
15240 function argument and update usage accordingly.
15241 (fold_rtx): Change "changed" variable to bool.
15242 (record_jump_equiv): Remove unneeded "reversed_nonequality" variable.
15243 (is_dead_reg): Change return type from int to bool.
15245 2023-06-01 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
15247 * config/xtensa/xtensa.md (adddi3, subdi3):
15248 New RTL generation patterns implemented according to the instruc-
15249 tion idioms described in the Xtensa ISA reference manual (p. 600).
15251 2023-06-01 Roger Sayle <roger@nextmovesoftware.com>
15252 Uros Bizjak <ubizjak@gmail.com>
15255 * config/i386/i386-builtin.def (__builtin_ia32_ptestz128): Use new
15256 CODE_for_sse4_1_ptestzv2di.
15257 (__builtin_ia32_ptestc128): Use new CODE_for_sse4_1_ptestcv2di.
15258 (__builtin_ia32_ptestz256): Use new CODE_for_avx_ptestzv4di.
15259 (__builtin_ia32_ptestc256): Use new CODE_for_avx_ptestcv4di.
15260 * config/i386/i386-expand.cc (ix86_expand_branch): Use CCZmode
15261 when expanding UNSPEC_PTEST to compare against zero.
15262 * config/i386/i386-features.cc (scalar_chain::convert_compare):
15263 Likewise generate CCZmode UNSPEC_PTESTs when converting comparisons.
15264 (general_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
15265 (timode_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
15266 * config/i386/i386-protos.h (ix86_match_ptest_ccmode): Prototype.
15267 * config/i386/i386.cc (ix86_match_ptest_ccmode): New predicate to
15268 check for suitable matching modes for the UNSPEC_PTEST pattern.
15269 * config/i386/sse.md (define_split): When splitting UNSPEC_MOVMSK
15270 to UNSPEC_PTEST, preserve the FLAG_REG mode as CCZ.
15271 (*<sse4_1>_ptest<mode>): Add asterisk to hide define_insn. Remove
15272 ":CC" mode of FLAGS_REG, instead use ix86_match_ptest_ccmode.
15273 (<sse4_1>_ptestz<mode>): New define_expand to specify CCZ.
15274 (<sse4_1>_ptestc<mode>): New define_expand to specify CCC.
15275 (<sse4_1>_ptest<mode>): A define_expand using CC to preserve the
15277 (*ptest<mode>_and): Specify CCZ to only perform this optimization
15278 when only the Z flag is required.
15280 2023-06-01 Jonathan Wakely <jwakely@redhat.com>
15283 * doc/invoke.texi (x86 Options): Fix description of -m32 option.
15285 2023-06-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15287 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
15288 Add =r,m and =r,m alternatives.
15289 (load_pair<DREG:mode><DREG2:mode>): Likewise.
15290 (vec_store_pair<DREG:mode><DREG2:mode>): Likewise.
15292 2023-06-01 Pan Li <pan2.li@intel.com>
15294 * common/config/riscv/riscv-common.cc: Add FP_16 mask to zvfhmin
15296 * config/riscv/genrvv-type-indexer.cc (valid_type): Allow FP16.
15297 (main): Disable FP16 tuple.
15298 * config/riscv/riscv-opts.h (MASK_VECTOR_ELEN_FP_16): New macro.
15299 (TARGET_VECTOR_ELEN_FP_16): Ditto.
15300 * config/riscv/riscv-vector-builtins.cc (check_required_extensions):
15302 * config/riscv/riscv-vector-builtins.def (vfloat16mf4_t): New type.
15303 (vfloat16mf2_t): Ditto.
15304 (vfloat16m1_t): Ditto.
15305 (vfloat16m2_t): Ditto.
15306 (vfloat16m4_t): Ditto.
15307 (vfloat16m8_t): Ditto.
15308 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ELEN_FP_16):
15310 * config/riscv/riscv-vector-switch.def (ENTRY): Allow FP16
15311 machine mode based on TARGET_VECTOR_ELEN_FP_16.
15313 2023-06-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15315 * config/riscv/riscv-vector-builtins.cc (register_frm): New function.
15316 (DEF_RVV_FRM_ENUM): New macro.
15317 (handle_pragma_vector): Add FRM enum
15318 * config/riscv/riscv-vector-builtins.def (DEF_RVV_FRM_ENUM): New macro.
15325 2023-05-31 Roger Sayle <roger@nextmovesoftware.com>
15326 Richard Sandiford <richard.sandiford@arm.com>
15328 * fold-const-call.cc (fold_const_call_ss) <CFN_BUILT_IN_BSWAP*>:
15329 Update call to wi::bswap.
15330 * simplify-rtx.cc (simplify_const_unary_operation) <case BSWAP>:
15331 Update call to wi::bswap.
15332 * tree-ssa-ccp.cc (evaluate_stmt) <case BUILT_IN_BSWAP*>:
15333 Update calls to wi::bswap.
15334 * wide-int.cc (wide_int_storage::bswap): Remove/rename to...
15335 (wi::bswap_large): New function, with revised API.
15336 * wide-int.h (wi::bswap): New (template) function prototype.
15337 (wide_int_storage::bswap): Remove method.
15338 (sext_large, zext_large): Consistent indentation/line wrapping.
15339 (bswap_large): Prototype helper function containing implementation.
15340 (wi::bswap): New template wrapper around bswap_large.
15342 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15345 * config/aarch64/aarch64-simd.md (<sur>dot_prod<vsi2qi>): Rename to...
15346 (<sur>dot_prod<vsi2qi><vczle><vczbe>): ... This.
15347 (usdot_prod<vsi2qi>): Rename to...
15348 (usdot_prod<vsi2qi><vczle><vczbe>): ... This.
15349 (aarch64_<sur>dot_lane<vsi2qi>): Rename to...
15350 (aarch64_<sur>dot_lane<vsi2qi><vczle><vczbe>): ... This.
15351 (aarch64_<sur>dot_laneq<vsi2qi>): Rename to...
15352 (aarch64_<sur>dot_laneq<vsi2qi><vczle><vczbe>): ... This.
15353 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi>): Rename to...
15354 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi><vczle><vczbe>):
15357 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15360 * config/aarch64/aarch64-simd.md (aarch64_sq<r>dmulh<mode>): Rename to...
15361 (aarch64_sq<r>dmulh<mode><vczle><vczbe>): ... This.
15362 (aarch64_sq<r>dmulh_n<mode>): Rename to...
15363 (aarch64_sq<r>dmulh_n<mode><vczle><vczbe>): ... This.
15364 (aarch64_sq<r>dmulh_lane<mode>): Rename to...
15365 (aarch64_sq<r>dmulh_lane<mode><vczle><vczbe>): ... This.
15366 (aarch64_sq<r>dmulh_laneq<mode>): Rename to...
15367 (aarch64_sq<r>dmulh_laneq<mode><vczle><vczbe>): ... This.
15368 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>): Rename to...
15369 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode><vczle><vczbe>): ... This.
15370 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>): Rename to...
15371 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode><vczle><vczbe>): ... This.
15372 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>): Rename to...
15373 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode><vczle><vczbe>): ... This.
15375 2023-05-31 David Faust <david.faust@oracle.com>
15377 * btfout.cc (btf_kind_names): New.
15378 (btf_kind_name): New.
15379 (btf_absolute_var_id): New utility function.
15380 (btf_relative_var_id): Likewise.
15381 (btf_relative_func_id): Likewise.
15382 (btf_absolute_datasec_id): Likewise.
15383 (btf_asm_type_ref): New.
15384 (btf_asm_type): Update asm comments and use btf_asm_type_ref ().
15385 (btf_asm_array): Likewise. Accept ctf_container_ref parameter.
15386 (btf_asm_varent): Likewise.
15387 (btf_asm_func_arg): Likewise.
15388 (btf_asm_datasec_entry): Likewise.
15389 (btf_asm_datasec_type): Likewise.
15390 (btf_asm_func_type): Likewise. Add index parameter.
15391 (btf_asm_enum_const): Likewise.
15392 (btf_asm_sou_member): Likewise.
15393 (output_btf_vars): Update btf_asm_* call accordingly.
15394 (output_asm_btf_sou_fields): Likewise.
15395 (output_asm_btf_enum_list): Likewise.
15396 (output_asm_btf_func_args_list): Likewise.
15397 (output_asm_btf_vlen_bytes): Likewise.
15398 (output_btf_func_types): Add ctf_container_ref parameter.
15399 Pass it to btf_asm_func_type.
15400 (output_btf_datasec_types): Update btf_asm_datsec_type call similarly.
15401 (btf_output): Update output_btf_func_types call similarly.
15403 2023-05-31 David Faust <david.faust@oracle.com>
15405 * btfout.cc (btf_asm_type): Add dedicated cases for BTF_KIND_ARRAY
15406 and BTF_KIND_FWD which do not use the size/type field at all.
15408 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
15410 * rtl.h (subreg_lowpart_p): Change return type from int to bool.
15411 (active_insn_p): Ditto.
15412 (in_sequence_p): Ditto.
15413 (unshare_all_rtl): Change return type from int to void.
15414 * emit-rtl.h (mem_expr_equal_p): Change return type from int to bool.
15415 * emit-rtl.cc (subreg_lowpart_p): Change return type from int to bool
15416 and adjust function body accordingly.
15417 (mem_expr_equal_p): Ditto.
15418 (unshare_all_rtl): Change return type from int to void
15419 and adjust function body accordingly.
15420 (verify_rtx_sharing): Remove unneeded return.
15421 (active_insn_p): Change return type from int to bool
15422 and adjust function body accordingly.
15423 (in_sequence_p): Ditto.
15425 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
15427 * rtl.h (true_dependence): Change return type from int to bool.
15428 (canon_true_dependence): Ditto.
15429 (read_dependence): Ditto.
15430 (anti_dependence): Ditto.
15431 (canon_anti_dependence): Ditto.
15432 (output_dependence): Ditto.
15433 (canon_output_dependence): Ditto.
15434 (may_alias_p): Ditto.
15435 * alias.h (alias_sets_conflict_p): Ditto.
15436 (alias_sets_must_conflict_p): Ditto.
15437 (objects_must_conflict_p): Ditto.
15438 (nonoverlapping_memrefs_p): Ditto.
15439 * alias.cc (rtx_equal_for_memref_p): Remove forward declaration.
15440 (record_set): Ditto.
15441 (base_alias_check): Ditto.
15442 (find_base_value): Ditto.
15443 (mems_in_disjoint_alias_sets_p): Ditto.
15444 (get_alias_set_entry): Ditto.
15445 (decl_for_component_ref): Ditto.
15446 (write_dependence_p): Ditto.
15447 (memory_modified_1): Ditto.
15448 (mems_in_disjoint_alias_set_p): Change return type from int to bool
15449 and adjust function body accordingly.
15450 (alias_sets_conflict_p): Ditto.
15451 (alias_sets_must_conflict_p): Ditto.
15452 (objects_must_conflict_p): Ditto.
15453 (rtx_equal_for_memref_p): Ditto.
15454 (base_alias_check): Ditto.
15455 (read_dependence): Ditto.
15456 (nonoverlapping_memrefs_p): Ditto.
15457 (true_dependence_1): Ditto.
15458 (true_dependence): Ditto.
15459 (canon_true_dependence): Ditto.
15460 (write_dependence_p): Ditto.
15461 (anti_dependence): Ditto.
15462 (canon_anti_dependence): Ditto.
15463 (output_dependence): Ditto.
15464 (canon_output_dependence): Ditto.
15465 (may_alias_p): Ditto.
15466 (init_alias_analysis): Change "changed" variable to bool.
15468 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15470 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): Change
15471 expand into define_insn_and_split.
15473 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15475 * config/riscv/vector.md: Remove FRM.
15477 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15479 * config/riscv/vector.md: Remove FRM.
15481 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15483 * config/riscv/vector.md: Remove FRM.
15485 2023-05-31 Christophe Lyon <christophe.lyon@linaro.org>
15488 * config/aarch64/aarch64.md (aarch64_rev16si2_alt3): New
15491 2023-05-31 Richard Biener <rguenther@suse.de>
15494 PR tree-optimization/109143
15495 * tree-ssa-structalias.cc (struct topo_info): Remove.
15496 (init_topo_info): Likewise.
15497 (free_topo_info): Likewise.
15498 (compute_topo_order): Simplify API, put the component
15499 with ESCAPED last so it's processed first.
15500 (topo_visit): Adjust.
15501 (solve_graph): Likewise.
15503 2023-05-31 Richard Biener <rguenther@suse.de>
15505 * tree-ssa-structalias.cc (constraint_stats::num_avoided_edges):
15507 (add_graph_edge): Count redundant edges we avoid to create.
15508 (dump_sa_stats): Dump them.
15509 (ipa_pta_execute): Do not dump generating constraints when
15510 we are not dumping them.
15512 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15514 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>): Rewrite
15515 output template to avoid explicit switch on which_alternative.
15516 (*aarch64_simd_mov<VQMOV:mode>): Likewise.
15517 (and<mode>3): Likewise.
15518 (ior<mode>3): Likewise.
15519 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Likewise.
15521 2023-05-31 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
15523 * config/xtensa/predicates.md (xtensa_bit_join_operator):
15525 * config/xtensa/xtensa.md (ior_op): Remove.
15526 (*shlrd_reg): Rename from "*shlrd_reg_<code>", and add the
15527 insn_and_split pattern of the same name to express and capture
15528 the bit-combining operation with both sides swapped.
15529 In addition, replace use of code iterator with new operator
15531 (*shlrd_const, *shlrd_per_byte):
15532 Likewise regarding the code iterator.
15534 2023-05-31 Cui, Lili <lili.cui@intel.com>
15536 PR tree-optimization/110038
15537 * params.opt: Add a limit on tree-reassoc-width.
15538 * tree-ssa-reassoc.cc
15539 (rewrite_expr_tree_parallel): Add width limit.
15541 2023-05-31 Pan Li <pan2.li@intel.com>
15543 * common/config/riscv/riscv-common.cc:
15544 (riscv_implied_info): Add zvfh item.
15545 (riscv_ext_version_table): Ditto.
15546 (riscv_ext_flag_table): Ditto.
15547 * config/riscv/riscv-opts.h (MASK_ZVFH): New macro.
15548 (TARGET_ZVFH): Ditto.
15550 2023-05-30 liuhongt <hongtao.liu@intel.com>
15552 PR tree-optimization/108804
15553 * tree-vect-patterns.cc (vect_get_range_info): Remove static.
15554 * tree-vect-stmts.cc (vect_create_vectorized_demotion_stmts):
15555 Add new parameter narrow_src_p.
15556 (vectorizable_conversion): Enhance NARROW FLOAT_EXPR
15557 vectorization by truncating to lower precision.
15558 * tree-vectorizer.h (vect_get_range_info): New declare.
15560 2023-05-30 Vladimir N. Makarov <vmakarov@redhat.com>
15562 * lra-int.h (lra_update_sp_offset): Add the prototype.
15563 * lra.cc (setup_sp_offset): Change the return type. Use
15564 lra_update_sp_offset.
15565 * lra-eliminations.cc (lra_update_sp_offset): New function.
15566 (lra_process_new_insns): Push the current insn to reprocess if the
15567 input reload changes sp offset.
15569 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
15572 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
15573 Fix misleading identation.
15575 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
15577 * rtl.h (comparison_dominates_p): Change return type from int to bool.
15578 (condjump_p): Ditto.
15579 (any_condjump_p): Ditto.
15580 (any_uncondjump_p): Ditto.
15581 (simplejump_p): Ditto.
15582 (returnjump_p): Ditto.
15583 (eh_returnjump_p): Ditto.
15584 (onlyjump_p): Ditto.
15585 (invert_jump_1): Ditto.
15586 (invert_jump): Ditto.
15587 (rtx_renumbered_equal_p): Ditto.
15588 (redirect_jump_1): Ditto.
15589 (redirect_jump): Ditto.
15590 (condjump_in_parallel_p): Ditto.
15591 * jump.cc (invert_exp_1): Adjust forward declaration.
15592 (comparison_dominates_p): Change return type from int to bool
15593 and adjust function body accordingly.
15594 (simplejump_p): Ditto.
15595 (condjump_p): Ditto.
15596 (condjump_in_parallel_p): Ditto.
15597 (any_uncondjump_p): Ditto.
15598 (any_condjump_p): Ditto.
15599 (returnjump_p): Ditto.
15600 (eh_returnjump_p): Ditto.
15601 (onlyjump_p): Ditto.
15602 (redirect_jump_1): Ditto.
15603 (redirect_jump): Ditto.
15604 (invert_exp_1): Ditto.
15605 (invert_jump_1): Ditto.
15606 (invert_jump): Ditto.
15607 (rtx_renumbered_equal_p): Ditto.
15609 2023-05-30 Andrew Pinski <apinski@marvell.com>
15611 * fold-const.cc (minmax_from_comparison): Add support for NE_EXPR.
15612 * match.pd ((cond (cmp (convert1? x) c1) (convert2? x) c2) pattern):
15613 Add ne as a possible cmp.
15614 ((a CMP b) ? minmax<a, c> : minmax<b, c> pattern): Likewise.
15616 2023-05-30 Andrew Pinski <apinski@marvell.com>
15618 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): New
15621 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
15623 * simplify-rtx.cc (simplify_binary_operation_1) <AND>: Use wide-int
15624 instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of
15625 (and (extend X) C) as (zero_extend (and X C)), to also optimize
15626 modes wider than HOST_WIDE_INT.
15628 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
15631 * simplify-rtx.cc (simplify_const_relational_operation): Return
15632 early if we have a MODE_CC comparison that isn't a COMPARE against
15635 2023-05-30 Robin Dapp <rdapp@ventanamicro.com>
15637 * config/riscv/riscv.cc (riscv_const_insns): Allow
15638 const_vec_duplicates.
15640 2023-05-30 liuhongt <hongtao.liu@intel.com>
15642 PR middle-end/108938
15643 * gimple-ssa-store-merging.cc (is_bswap_or_nop_p): New
15644 function, cut from original find_bswap_or_nop function.
15645 (find_bswap_or_nop): Add a new parameter, detect bswap +
15646 rotate and save rotate result in the new parameter.
15647 (bswap_replace): Add a new parameter to indicate rotate and
15648 generate rotate stmt if needed.
15649 (maybe_optimize_vector_constructor): Adjust for new rotate
15650 parameter in the upper 2 functions.
15651 (pass_optimize_bswap::execute): Ditto.
15652 (imm_store_chain_info::output_merged_store): Ditto.
15654 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15656 * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>): Delete.
15657 (aarch64_<su>adalp<mode>): New define_expand.
15658 (*aarch64_<su>adalp<mode><vczle><vczbe>_insn): New define_insn.
15659 (aarch64_<su>addlp<mode>): Convert to define_expand.
15660 (*aarch64_<su>addlp<mode><vczle><vczbe>_insn): New define_insn.
15661 * config/aarch64/iterators.md (UNSPEC_SADDLP, UNSPEC_UADDLP): Delete.
15663 (USADDLP): Likewise.
15664 * config/aarch64/predicates.md (vect_par_cnst_even_or_odd_half): Define.
15666 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15668 * config/aarch64/aarch64-builtins.cc (VAR1): Move to after inclusion of
15669 aarch64-builtin-iterators.h. Add definition to remap shadd, uhadd,
15670 srhadd, urhadd builtin codes for standard optab ones.
15671 * config/aarch64/aarch64-simd.md (<u>avg<mode>3_floor): Rename to...
15672 (<su_optab>avg<mode>3_floor): ... This. Expand to RTL codes rather than
15674 (<u>avg<mode>3_ceil): Rename to...
15675 (<su_optab>avg<mode>3_ceil): ... This. Expand to RTL codes rather than
15677 (aarch64_<su>hsub<mode>): New define_expand.
15678 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): Split into...
15679 (*aarch64_<su>h<ADDSUB:optab><mode><vczle><vczbe>_insn): ... This...
15680 (*aarch64_<su>rhadd<mode><vczle><vczbe>_insn): ... And this.
15682 2023-05-30 Andreas Schwab <schwab@suse.de>
15685 * config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to
15686 match libsanitizer.
15688 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15690 * config/aarch64/aarch64-modes.def (V16HI, V8SI, V4DI, V2TI): New modes.
15691 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rnd_cst_p):
15693 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
15694 * config/aarch64/aarch64-simd.md (*aarch64_simd_sra<mode>): Rename to...
15695 (aarch64_<sra_op>sra_n<mode>_insn): ... This.
15696 (aarch64_<sra_op>rsra_n<mode>_insn): New define_insn.
15697 (aarch64_<sra_op>sra_n<mode>): New define_expand.
15698 (aarch64_<sra_op>rsra_n<mode>): Likewise.
15699 (aarch64_<sur>sra_n<mode>): Rename to...
15700 (aarch64_<sur>sra_ndi): ... This.
15701 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode): Add
15702 any_target_p argument.
15703 (aarch64_extract_vec_duplicate_wide_int): Define.
15704 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
15705 (aarch64_const_vec_rnd_cst_p): Likewise.
15706 (aarch64_vector_mode_supported_any_target_p): Likewise.
15707 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise.
15708 * config/aarch64/iterators.md (UNSPEC_SRSRA, UNSPEC_URSRA): Delete.
15709 (VSRA): Adjust for the above.
15711 (V2XWIDE): New mode_attr.
15712 (vec_or_offset): Likewise.
15713 (SHIFTEXTEND): Likewise.
15714 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec): New
15716 * doc/tm.texi (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
15717 clarify that it applies to current target options.
15718 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Document.
15719 * doc/tm.texi.in: Regenerate.
15720 * stor-layout.cc (mode_for_vector): Check
15721 vector_mode_supported_any_target_p when iterating through vector modes.
15722 * target.def (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
15723 clarify that it applies to current target options.
15724 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Define.
15726 2023-05-30 Lili Cui <lili.cui@intel.com>
15728 PR tree-optimization/98350
15729 * tree-ssa-reassoc.cc
15730 (rewrite_expr_tree_parallel): Rewrite this function.
15731 (rank_ops_for_fma): New.
15732 (reassociate_bb): Handle new function.
15734 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
15736 * rtl.h (rtx_addr_can_trap_p): Change return type from int to bool.
15737 (rtx_unstable_p): Ditto.
15738 (reg_mentioned_p): Ditto.
15739 (reg_referenced_p): Ditto.
15740 (reg_used_between_p): Ditto.
15741 (reg_set_between_p): Ditto.
15742 (modified_between_p): Ditto.
15743 (no_labels_between_p): Ditto.
15744 (modified_in_p): Ditto.
15745 (reg_set_p): Ditto.
15746 (multiple_sets): Ditto.
15747 (set_noop_p): Ditto.
15748 (noop_move_p): Ditto.
15749 (reg_overlap_mentioned_p): Ditto.
15750 (dead_or_set_p): Ditto.
15751 (dead_or_set_regno_p): Ditto.
15752 (find_reg_fusage): Ditto.
15753 (find_regno_fusage): Ditto.
15754 (side_effects_p): Ditto.
15755 (volatile_refs_p): Ditto.
15756 (volatile_insn_p): Ditto.
15757 (may_trap_p_1): Ditto.
15758 (may_trap_p): Ditto.
15759 (may_trap_or_fault_p): Ditto.
15760 (computed_jump_p): Ditto.
15761 (auto_inc_p): Ditto.
15762 (loc_mentioned_in_p): Ditto.
15763 * rtlanal.cc (computed_jump_p_1): Adjust forward declaration.
15764 (rtx_unstable_p): Change return type from int to bool
15765 and adjust function body accordingly.
15766 (rtx_addr_can_trap_p): Ditto.
15767 (reg_mentioned_p): Ditto.
15768 (no_labels_between_p): Ditto.
15769 (reg_used_between_p): Ditto.
15770 (reg_referenced_p): Ditto.
15771 (reg_set_between_p): Ditto.
15772 (reg_set_p): Ditto.
15773 (modified_between_p): Ditto.
15774 (modified_in_p): Ditto.
15775 (multiple_sets): Ditto.
15776 (set_noop_p): Ditto.
15777 (noop_move_p): Ditto.
15778 (reg_overlap_mentioned_p): Ditto.
15779 (dead_or_set_p): Ditto.
15780 (dead_or_set_regno_p): Ditto.
15781 (find_reg_fusage): Ditto.
15782 (find_regno_fusage): Ditto.
15783 (remove_node_from_insn_list): Ditto.
15784 (volatile_insn_p): Ditto.
15785 (volatile_refs_p): Ditto.
15786 (side_effects_p): Ditto.
15787 (may_trap_p_1): Ditto.
15788 (may_trap_p): Ditto.
15789 (may_trap_or_fault_p): Ditto.
15790 (computed_jump_p): Ditto.
15791 (auto_inc_p): Ditto.
15792 (loc_mentioned_in_p): Ditto.
15793 * combine.cc (can_combine_p): Update indirect function.
15795 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15797 * config/riscv/autovec.md (<optab><mode><vconvert>2): New pattern.
15798 * config/riscv/iterators.md: New attribute.
15799 * config/riscv/vector-iterators.md: New attribute.
15801 2023-05-30 From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
15803 * config/riscv/riscv.md: Fix signed and unsigned comparison
15806 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15808 * config/riscv/autovec.md (fnma<mode>4): New pattern.
15809 (*fnma<mode>): Ditto.
15811 2023-05-29 Die Li <lidie@eswincomputing.com>
15813 * config/riscv/riscv.cc (riscv_expand_conditional_move_onesided):
15815 (riscv_expand_conditional_move): Reuse the TARGET_SFB_ALU expand
15816 process for TARGET_XTHEADCONDMOV
15818 2023-05-29 Uros Bizjak <ubizjak@gmail.com>
15821 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also require
15822 TARGET_AVX512BW to generate truncv16hiv16qi2.
15824 2023-05-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
15826 * config/riscv/riscv.md (and<mode>3): New expander.
15827 (*and<mode>3) New pattern.
15828 * config/riscv/predicates.md (arith_operand_or_mode_mask): New
15831 2023-05-29 Pan Li <pan2.li@intel.com>
15833 * config/riscv/riscv-v.cc (emit_vlmax_insn): Remove unnecessary
15834 comments and rename local variables.
15835 (emit_nonvlmax_insn): Diito.
15836 (emit_vlmax_merge_insn): Ditto.
15837 (emit_vlmax_cmp_insn): Ditto.
15838 (emit_vlmax_cmp_mu_insn): Ditto.
15839 (emit_scalar_move_insn): Ditto.
15841 2023-05-29 Pan Li <pan2.li@intel.com>
15843 * config/riscv/riscv-v.cc (emit_vlmax_insn): Eliminate the
15845 (emit_nonvlmax_insn): Ditto.
15846 (emit_vlmax_merge_insn): Ditto.
15847 (emit_vlmax_cmp_insn): Ditto.
15848 (emit_vlmax_cmp_mu_insn): Ditto.
15849 (expand_vec_series): Ditto.
15851 2023-05-29 Pan Li <pan2.li@intel.com>
15853 * config/riscv/riscv-protos.h (enum insn_type): New type.
15854 * config/riscv/riscv-v.cc (RVV_INSN_OPERANDS_MAX): New macro.
15855 (rvv_builder::can_duplicate_repeating_sequence_p): Align the referenced
15857 (rvv_builder::get_merged_repeating_sequence): Ditto.
15858 (rvv_builder::repeating_sequence_use_merge_profitable_p): New function
15859 to evaluate the optimization cost.
15860 (rvv_builder::get_merge_scalar_mask): New function to get the merge
15862 (emit_scalar_move_insn): New function to emit vmv.s.x.
15863 (emit_vlmax_integer_move_insn): New function to emit vlmax vmv.v.x.
15864 (emit_nonvlmax_integer_move_insn): New function to emit nonvlmax
15866 (get_repeating_sequence_dup_machine_mode): New function to get the dup
15868 (expand_vector_init_merge_repeating_sequence): New function to perform
15870 (expand_vec_init): Add this vector init optimization.
15871 * config/riscv/riscv.h (BITS_PER_WORD): New macro.
15873 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
15875 * tree-ssa-loop-manip.cc (create_iv): Try harder to find a SLOC to
15876 put onto the increment when it is inserted after the position.
15878 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
15880 * match.pd ((T)P - (T)(P + A) -> -(T) A): Avoid artificial overflow
15883 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15885 * config/riscv/riscv-vsetvl.cc (source_equal_p): Fix ICE.
15887 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15889 * config/riscv/autovec.md (fma<mode>4): New pattern.
15890 (*fma<mode>): Ditto.
15891 * config/riscv/riscv-protos.h (enum insn_type): New enum.
15892 (emit_vlmax_ternary_insn): New function.
15893 * config/riscv/riscv-v.cc (emit_vlmax_ternary_insn): Ditto.
15895 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15897 * config/riscv/vector.md: Fix vimuladd instruction bug.
15899 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15901 * config/riscv/riscv.cc (global_state_unknown_p): New function.
15902 (riscv_mode_after): Fix incorrect VXM.
15904 2023-05-29 Pan Li <pan2.li@intel.com>
15906 * common/config/riscv/riscv-common.cc:
15907 (riscv_implied_info): Add zvfhmin item.
15908 (riscv_ext_version_table): Ditto.
15909 (riscv_ext_flag_table): Ditto.
15910 * config/riscv/riscv-opts.h (MASK_ZVFHMIN): New macro.
15911 (TARGET_ZFHMIN): Align indent.
15912 (TARGET_ZFH): Ditto.
15913 (TARGET_ZVFHMIN): New macro.
15915 2023-05-27 liuhongt <hongtao.liu@intel.com>
15918 * config/i386/sse.md (*andnot<mode>3): Extend below splitter
15919 to VI_AVX2 to cover more modes.
15921 2023-05-27 liuhongt <hongtao.liu@intel.com>
15923 * config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI):
15924 Remove ATOM and ICELAKE(and later) core processors.
15926 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
15928 * config/riscv/autovec.md (<optab><mode>2): Add vneg/vnot.
15930 * config/riscv/riscv-protos.h (emit_vlmax_masked_mu_insn):
15932 * config/riscv/riscv-v.cc (emit_vlmax_masked_mu_insn): New
15935 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
15936 Juzhe Zhong <juzhe.zhong@rivai.ai>
15938 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): New
15940 (<optab><v_quad_trunc><mode>2): Dito.
15941 (<optab><v_oct_trunc><mode>2): Dito.
15942 (trunc<mode><v_double_trunc>2): Dito.
15943 (trunc<mode><v_quad_trunc>2): Dito.
15944 (trunc<mode><v_oct_trunc>2): Dito.
15945 * config/riscv/riscv-protos.h (vectorize_related_mode): Define.
15946 (autovectorize_vector_modes): Define.
15947 * config/riscv/riscv-v.cc (vectorize_related_mode): Implement
15949 (autovectorize_vector_modes): Implement hook.
15950 * config/riscv/riscv.cc (riscv_autovectorize_vector_modes):
15951 Implement target hook.
15952 (riscv_vectorize_related_mode): Implement target hook.
15953 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
15954 (TARGET_VECTORIZE_RELATED_MODE): Define.
15955 * config/riscv/vector-iterators.md: Add lowercase versions of
15956 mode_attr iterators.
15958 2023-05-26 Andrew Stubbs <ams@codesourcery.com>
15959 Tobias Burnus <tobias@codesourcery.com>
15961 * config/gcn/gcn-hsa.h (XNACKOPT): New macro.
15962 (ASM_SPEC): Use XNACKOPT.
15963 * config/gcn/gcn-opts.h (enum sram_ecc_type): Rename to ...
15964 (enum hsaco_attr_type): ... this, and generalize the names.
15965 (TARGET_XNACK): New macro.
15966 * config/gcn/gcn.cc (gcn_option_override): Update to sorry for all
15968 (output_file_start): Update xnack handling.
15969 (gcn_hsa_declare_function_name): Use TARGET_XNACK.
15970 * config/gcn/gcn.opt (-mxnack): Add the "on/off/any" syntax.
15971 (sram_ecc_type): Rename to ...
15972 (hsaco_attr_type: ... this.)
15973 * config/gcn/mkoffload.cc (SET_XNACK_ANY): New macro.
15974 (TEST_XNACK): Delete.
15975 (TEST_XNACK_ANY): New macro.
15976 (TEST_XNACK_ON): New macro.
15977 (main): Support the new -mxnack=on/off/any syntax.
15978 * doc/invoke.texi (-mxnack): Update for new syntax.
15980 2023-05-26 Andrew Pinski <apinski@marvell.com>
15982 * genmatch.cc (emit_debug_printf): New function.
15983 (dt_simplify::gen_1): Emit printf into the code
15984 before the `return true` or returning the folded result
15985 instead of emitting it always.
15987 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
15989 * config/xtensa/xtensa-protos.h
15990 (xtensa_expand_block_set_unrolled_loop,
15991 xtensa_expand_block_set_small_loop): Remove.
15992 (xtensa_expand_block_set): New prototype.
15993 * config/xtensa/xtensa.cc
15994 (xtensa_expand_block_set_libcall): New subfunction.
15995 (xtensa_expand_block_set_unrolled_loop,
15996 xtensa_expand_block_set_small_loop): Rewrite as subfunctions.
15997 (xtensa_expand_block_set): New function that calls the above
15999 * config/xtensa/xtensa.md (memsetsi): Change to invoke only
16000 xtensa_expand_block_set().
16002 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
16004 * config/xtensa/xtensa-protos.h (xtensa_m1_or_1_thru_15):
16006 * config/xtensa/xtensa.cc (xtensa_m1_or_1_thru_15):
16008 * config/xtensa/constraints.md (O):
16009 Change to use the above function.
16010 * config/xtensa/xtensa.md (*subsi3_from_const):
16011 New insn_and_split pattern.
16013 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
16015 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3):
16016 Retract excessive line folding, and correct the value of
16017 the "length" insn attribute related to TARGET_DENSITY.
16018 (*extzvsi-1bit_addsubx): Ditto.
16020 2023-05-26 Uros Bizjak <ubizjak@gmail.com>
16022 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi):
16023 Do not disable call to ix86_expand_vecop_qihi2.
16025 2023-05-26 liuhongt <hongtao.liu@intel.com>
16029 * ira-costs.cc (scan_one_insn): Only use NO_REGS in cost
16030 calculation when !hard_regno_mode_ok for GENERAL_REGS and
16031 mode, otherwise still use GENERAL_REGS.
16033 2023-05-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16035 * config/riscv/riscv.cc (vector_zero_call_used_regs): Add
16036 explict VL and drop VL in ops.
16038 2023-05-25 Jin Ma <jinma@linux.alibaba.com>
16040 * sched-deps.cc (sched_macro_fuse_insns): Insns should not be fusion
16041 in different BB blocks.
16043 2023-05-25 Uros Bizjak <ubizjak@gmail.com>
16045 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
16046 Rewrite to expand to 2x-wider (e.g. V16QI -> V16HImode)
16047 instructions when available. Emulate truncation via
16048 ix86_expand_vec_perm_const_1 when native truncate insn
16050 (ix86_expand_vecop_qihi_partial) <case MULT>: Use pmovzx
16051 when available. Trivially rename some variables.
16052 (ix86_expand_vecop_qihi): Unconditionally call ix86_expand_vecop_qihi2.
16053 * config/i386/i386.cc (ix86_multiplication_cost): Rewrite cost
16054 calculation of V*QImode emulations to account for generation of
16055 2x-wider mode instructions.
16056 (ix86_shift_rotate_cost): Update cost calculation of V*QImode
16057 emulations to account for generation of 2x-wider mode instructions.
16059 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
16062 * config/avr/avr.cc (avr_can_inline_p): New static function.
16063 (TARGET_CAN_INLINE_P): Define to that function.
16065 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
16068 * config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6.
16069 Handle any bit position and use mode QISI.
16070 * config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
16071 of 2 insns for bit-transfer of respective style.
16073 2023-05-25 Christophe Lyon <christophe.lyon@linaro.org>
16075 * config/arm/iterators.md (MVE_6): Remove.
16076 * config/arm/mve.md: Replace MVE_6 with MVE_5.
16078 2023-05-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16079 Richard Sandiford <richard.sandiford@arm.com>
16081 * tree-vect-loop-manip.cc (vect_adjust_loop_lens_control): New
16083 (vect_set_loop_controls_directly): Add decrement IV support.
16084 (vect_set_loop_condition_partial_vectors): Ditto.
16085 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): New
16087 * tree-vectorizer.h (LOOP_VINFO_USING_DECREMENTING_IV_P): New
16090 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16093 * config/aarch64/aarch64-simd.md (aarch64_fcadd<rot><mode>): Rename to...
16094 (aarch64_fcadd<rot><mode><vczle><vczbe>): ... This.
16095 Fix canonicalization of PLUS operands.
16096 (aarch64_fcmla<rot><mode>): Rename to...
16097 (aarch64_fcmla<rot><mode><vczle><vczbe>): ... This.
16098 Fix canonicalization of PLUS operands.
16099 (aarch64_fcmla_lane<rot><mode>): Rename to...
16100 (aarch64_fcmla_lane<rot><mode><vczle><vczbe>): ... This.
16101 Fix canonicalization of PLUS operands.
16102 (aarch64_fcmla_laneq<rot>v4hf): Rename to...
16103 (aarch64_fcmla_laneq<rot>v4hf<vczle><vczbe>): ... This.
16104 Fix canonicalization of PLUS operands.
16105 (aarch64_fcmlaq_lane<rot><mode>): Fix canonicalization of PLUS operands.
16107 2023-05-25 Chris Sidebottom <chris.sidebottom@arm.com>
16109 * config/arm/arm.md (rbitsi2): Rename to...
16110 (arm_rbit): ... This.
16111 (ctzsi2): Adjust for the above.
16112 (arm_rev16si2): Convert to define_expand.
16113 (arm_rev16si2_alt1): New pattern.
16114 (arm_rev16si2_alt): Rename to...
16115 (*arm_rev16si2_alt2): ... This.
16116 * config/arm/arm_acle.h (__ror, __rorl, __rorll, __clz, __clzl, __clzll,
16117 __cls, __clsl, __clsll, __revsh, __rev, __revl, __revll, __rev16,
16118 __rev16l, __rev16ll, __rbit, __rbitl, __rbitll): Define intrinsics.
16119 * config/arm/arm_acle_builtins.def (rbit, rev16si2): Define builtins.
16121 2023-05-25 Alex Coplan <alex.coplan@arm.com>
16124 * config/arm/arm.md (movdf): Generate temporary pseudo in DImode
16126 * config/arm/vfp.md (no_literal_pool_df_immediate): Rather than punning an
16127 lvalue DFmode pseudo into DImode, use a DImode pseudo and pun it into
16128 DFmode as an rvalue.
16130 2023-05-25 Richard Biener <rguenther@suse.de>
16133 * tree-vect-stmts.cc (vectorizable_condition): For
16134 embedded comparisons also handle the case when the target
16135 only provides vec_cmp and vcond_mask.
16137 2023-05-25 Claudiu Zissulescu <claziss@gmail.com>
16139 * config/arc/arc.cc (arc_call_tls_get_addr): Simplify access using
16142 2023-05-25 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
16144 * config/aarch64/aarch64.cc (scalar_move_insn_p): New function.
16145 (seq_cost_ignoring_scalar_moves): Likewise.
16146 (aarch64_expand_vector_init): Call seq_cost_ignoring_scalar_moves.
16148 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16150 * config/aarch64/arm_neon.h (vcage_f64): Reimplement with builtins.
16151 (vcage_f32): Likewise.
16152 (vcages_f32): Likewise.
16153 (vcageq_f32): Likewise.
16154 (vcaged_f64): Likewise.
16155 (vcageq_f64): Likewise.
16156 (vcagts_f32): Likewise.
16157 (vcagt_f32): Likewise.
16158 (vcagt_f64): Likewise.
16159 (vcagtq_f32): Likewise.
16160 (vcagtd_f64): Likewise.
16161 (vcagtq_f64): Likewise.
16162 (vcale_f32): Likewise.
16163 (vcale_f64): Likewise.
16164 (vcaled_f64): Likewise.
16165 (vcales_f32): Likewise.
16166 (vcaleq_f32): Likewise.
16167 (vcaleq_f64): Likewise.
16168 (vcalt_f32): Likewise.
16169 (vcalt_f64): Likewise.
16170 (vcaltd_f64): Likewise.
16171 (vcaltq_f32): Likewise.
16172 (vcaltq_f64): Likewise.
16173 (vcalts_f32): Likewise.
16175 2023-05-25 Hu, Lin1 <lin1.hu@intel.com>
16179 * config/i386/avx512bwintrin.h (_mm512_srli_epi16): Change type from
16180 int to const int or const int to const unsigned int.
16181 (_mm512_mask_srli_epi16): Ditto.
16182 (_mm512_slli_epi16): Ditto.
16183 (_mm512_mask_slli_epi16): Ditto.
16184 (_mm512_maskz_slli_epi16): Ditto.
16185 (_mm512_srai_epi16): Ditto.
16186 (_mm512_mask_srai_epi16): Ditto.
16187 (_mm512_maskz_srai_epi16): Ditto.
16188 * config/i386/avx512fintrin.h (_mm512_slli_epi64): Ditto.
16189 (_mm512_mask_slli_epi64): Ditto.
16190 (_mm512_maskz_slli_epi64): Ditto.
16191 (_mm512_srli_epi64): Ditto.
16192 (_mm512_mask_srli_epi64): Ditto.
16193 (_mm512_maskz_srli_epi64): Ditto.
16194 (_mm512_srai_epi64): Ditto.
16195 (_mm512_mask_srai_epi64): Ditto.
16196 (_mm512_maskz_srai_epi64): Ditto.
16197 (_mm512_slli_epi32): Ditto.
16198 (_mm512_mask_slli_epi32): Ditto.
16199 (_mm512_maskz_slli_epi32): Ditto.
16200 (_mm512_srli_epi32): Ditto.
16201 (_mm512_mask_srli_epi32): Ditto.
16202 (_mm512_maskz_srli_epi32): Ditto.
16203 (_mm512_srai_epi32): Ditto.
16204 (_mm512_mask_srai_epi32): Ditto.
16205 (_mm512_maskz_srai_epi32): Ditto.
16206 * config/i386/avx512vlbwintrin.h (_mm256_mask_srai_epi16): Ditto.
16207 (_mm256_maskz_srai_epi16): Ditto.
16208 (_mm_mask_srai_epi16): Ditto.
16209 (_mm_maskz_srai_epi16): Ditto.
16210 (_mm256_mask_slli_epi16): Ditto.
16211 (_mm256_maskz_slli_epi16): Ditto.
16212 (_mm_mask_slli_epi16): Ditto.
16213 (_mm_maskz_slli_epi16): Ditto.
16214 (_mm_maskz_srli_epi16): Ditto.
16215 * config/i386/avx512vlintrin.h (_mm256_mask_srli_epi32): Ditto.
16216 (_mm256_maskz_srli_epi32): Ditto.
16217 (_mm_mask_srli_epi32): Ditto.
16218 (_mm_maskz_srli_epi32): Ditto.
16219 (_mm256_mask_srli_epi64): Ditto.
16220 (_mm256_maskz_srli_epi64): Ditto.
16221 (_mm_mask_srli_epi64): Ditto.
16222 (_mm_maskz_srli_epi64): Ditto.
16223 (_mm256_mask_srai_epi32): Ditto.
16224 (_mm256_maskz_srai_epi32): Ditto.
16225 (_mm_mask_srai_epi32): Ditto.
16226 (_mm_maskz_srai_epi32): Ditto.
16227 (_mm256_srai_epi64): Ditto.
16228 (_mm256_mask_srai_epi64): Ditto.
16229 (_mm256_maskz_srai_epi64): Ditto.
16230 (_mm_srai_epi64): Ditto.
16231 (_mm_mask_srai_epi64): Ditto.
16232 (_mm_maskz_srai_epi64): Ditto.
16233 (_mm_mask_slli_epi32): Ditto.
16234 (_mm_maskz_slli_epi32): Ditto.
16235 (_mm_mask_slli_epi64): Ditto.
16236 (_mm_maskz_slli_epi64): Ditto.
16237 (_mm256_mask_slli_epi32): Ditto.
16238 (_mm256_maskz_slli_epi32): Ditto.
16239 (_mm256_mask_slli_epi64): Ditto.
16240 (_mm256_maskz_slli_epi64): Ditto.
16242 2023-05-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16244 * config/riscv/vector.md: Remove FRM_REGNUM dependency in rtz
16247 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
16249 * data-streamer-in.cc (streamer_read_value_range): Handle NANs.
16250 * data-streamer-out.cc (streamer_write_vrange): Same.
16251 * value-range.h (class vrange): Make streamer_write_vrange a friend.
16253 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
16255 * value-query.cc (range_query::get_tree_range): Set NAN directly
16257 * value-range.cc (frange::set): Assert that bounds are not NAN.
16259 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
16261 * value-range.cc (add_vrange): Handle known NANs.
16263 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
16265 * value-range.h (frange::set_nan): New.
16267 2023-05-25 Alexandre Oliva <oliva@adacore.com>
16270 * emit-rtl.cc (validate_subreg): Reject a SUBREG of a MEM that
16271 requires stricter alignment than MEM's.
16273 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
16275 PR tree-optimization/107822
16276 PR tree-optimization/107986
16277 * Makefile.in (OBJS): Add gimple-range-phi.o.
16278 * gimple-range-cache.h (ranger_cache::m_estimate): New
16279 phi_analyzer pointer member.
16280 * gimple-range-fold.cc (fold_using_range::range_of_phi): Use
16281 phi_analyzer if no loop info is available.
16282 * gimple-range-phi.cc: New file.
16283 * gimple-range-phi.h: New file.
16284 * tree-vrp.cc (execute_ranger_vrp): Utililze a phi_analyzer.
16286 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
16288 * gimple-range-fold.cc (fur_list::fur_list): Add range_query param
16290 (fold_range): Add range_query parameter.
16291 (fur_relation::fur_relation): New.
16292 (fur_relation::trio): New.
16293 (fur_relation::register_relation): New.
16294 (fold_relations): New.
16295 * gimple-range-fold.h (fold_range): Adjust prototypes.
16296 (fold_relations): New.
16298 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
16300 * gimple-range-cache.cc (ssa_cache::range_of_expr): New.
16301 * gimple-range-cache.h (class ssa_cache): Inherit from range_query.
16302 (ranger_cache::const_query): New.
16303 * gimple-range.cc (gimple_ranger::const_query): New.
16304 * gimple-range.h (gimple_ranger::const_query): New prototype.
16306 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
16308 * gimple-range-cache.cc (ssa_cache::dump): Use get_range.
16309 (ssa_cache::dump_range_query): Delete.
16310 (ssa_lazy_cache::dump_range_query): Delete.
16311 (ssa_lazy_cache::get_range): Move from header file.
16312 (ssa_lazy_cache::clear_range): ditto.
16313 (ssa_lazy_cache::clear): Ditto.
16314 * gimple-range-cache.h (class ssa_cache): Virtualize.
16315 (class ssa_lazy_cache): Inherit and virtualize.
16317 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
16319 * value-range.h (vrange::kind): Remove.
16321 2023-05-24 Roger Sayle <roger@nextmovesoftware.com>
16323 PR middle-end/109840
16324 * match.pd <popcount optimizations>: Preserve zero-extension when
16325 optimizing popcount((T)bswap(x)) and popcount((T)rotate(x,y)) as
16326 popcount((T)x), so the popcount's argument keeps the same type.
16327 <parity optimizations>: Likewise preserve extensions when
16328 simplifying parity((T)bswap(x)) and parity((T)rotate(x,y)) as
16329 parity((T)x), so that the parity's argument type is the same.
16331 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
16333 * ipa-cp.cc (ipa_value_range_from_jfunc): Use new ipa_vr API.
16334 (ipcp_store_vr_results): Same.
16335 * ipa-prop.cc (ipa_vr::ipa_vr): New.
16336 (ipa_vr::get_vrange): New.
16337 (ipa_vr::set_unknown): New.
16338 (ipa_vr::streamer_read): New.
16339 (ipa_vr::streamer_write): New.
16340 (write_ipcp_transformation_info): Use new ipa_vr API.
16341 (read_ipcp_transformation_info): Same.
16342 (ipa_vr::nonzero_p): Delete.
16343 (ipcp_update_vr): Use new ipa_vr API.
16344 * ipa-prop.h (class ipa_vr): Provide an API and hide internals.
16345 * ipa-sra.cc (zap_useless_ipcp_results): Use new ipa_vr API.
16347 2023-05-24 Jan-Benedict Glaw <jbglaw@lug-owl.de>
16349 * config/mcore/mcore.cc (output_inline_const) Make buffer smaller to
16350 silence overflow warnings later on.
16352 2023-05-24 Uros Bizjak <ubizjak@gmail.com>
16354 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
16355 Remove handling of V8QImode.
16356 * config/i386/mmx.md (v<insn>v8qi3): Move from sse.md.
16357 Call ix86_expand_vecop_qihi_partial. Enable for TARGET_MMX_WITH_SSE.
16358 (v<insn>v4qi3): Ditto.
16359 * config/i386/sse.md (v<insn>v8qi3): Remove.
16361 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16364 * config/aarch64/aarch64-simd.md (aarch64_simd_lshr<mode>): Rename to...
16365 (aarch64_simd_lshr<mode><vczle><vczbe>): ... This.
16366 (aarch64_simd_ashr<mode>): Rename to...
16367 (aarch64_simd_ashr<mode><vczle><vczbe>): ... This.
16368 (aarch64_simd_imm_shl<mode>): Rename to...
16369 (aarch64_simd_imm_shl<mode><vczle><vczbe>): ... This.
16370 (aarch64_simd_reg_sshl<mode>): Rename to...
16371 (aarch64_simd_reg_sshl<mode><vczle><vczbe>): ... This.
16372 (aarch64_simd_reg_shl<mode>_unsigned): Rename to...
16373 (aarch64_simd_reg_shl<mode>_unsigned<vczle><vczbe>): ... This.
16374 (aarch64_simd_reg_shl<mode>_signed): Rename to...
16375 (aarch64_simd_reg_shl<mode>_signed<vczle><vczbe>): ... This.
16376 (vec_shr_<mode>): Rename to...
16377 (vec_shr_<mode><vczle><vczbe>): ... This.
16378 (aarch64_<sur>shl<mode>): Rename to...
16379 (aarch64_<sur>shl<mode><vczle><vczbe>): ... This.
16380 (aarch64_<sur>q<r>shl<mode>): Rename to...
16381 (aarch64_<sur>q<r>shl<mode><vczle><vczbe>): ... This.
16383 2023-05-24 Richard Biener <rguenther@suse.de>
16386 * config/i386/i386-expand.cc (ix86_expand_vector_init_general):
16387 Perform final vector composition using
16388 ix86_expand_vector_init_general instead of setting
16389 the highpart and lowpart which causes spilling.
16391 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
16393 PR tree-optimization/109695
16394 * gimple-range-cache.cc (ranger_cache::get_global_range): Add
16396 * gimple-range-cache.h (ranger_cache::get_global_range): Ditto.
16397 * gimple-range.cc (gimple_ranger::range_of_stmt): Pass changed
16398 flag to set_global_range.
16399 (gimple_ranger::prefill_stmt_dependencies): Ditto.
16401 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
16403 PR tree-optimization/109695
16404 * gimple-range-cache.cc (temporal_cache::temporal_value): Return
16406 (temporal_cache::current_p): Check always_current method.
16407 (temporal_cache::set_always_current): Add param and set value
16409 (temporal_cache::always_current_p): New.
16410 (ranger_cache::get_global_range): Adjust.
16411 (ranger_cache::set_global_range): set always current first.
16413 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
16415 PR tree-optimization/109695
16416 * gimple-range-cache.cc (ranger_cache::get_global_range): Call
16417 fold_range with global query to choose an initial value.
16419 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16421 * config/riscv/riscv-protos.h (enum frm_field_enum): Add FRM_
16424 2023-05-24 Richard Biener <rguenther@suse.de>
16426 PR tree-optimization/109849
16427 * tree-ssa-pre.cc (do_hoist_insertion): Do not intersect
16428 expressions but take the first sets.
16430 2023-05-24 Gaius Mulley <gaiusmod2@gmail.com>
16433 * doc/gm2.texi (High procedure function): New node.
16434 (Using): New menu entry for High procedure function.
16436 2023-05-24 Richard Sandiford <richard.sandiford@arm.com>
16438 PR rtl-optimization/109940
16439 * early-remat.cc (postorder_index): Rename to...
16440 (rpo_index): ...this.
16441 (compare_candidates): Sort by decreasing rpo_index rather than
16442 increasing postorder_index.
16443 (early_remat::sort_candidates): Calculate the forward RPO from
16445 (early_remat::local_phase): Follow forward RPO using DF_FORWARD,
16446 rather than DF_BACKWARD in reverse.
16448 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16451 * config/arm/arm-builtins.cc (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS): Use
16452 qualifier_none for the return operand.
16454 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16456 * config/riscv/autovec.md (<optab><mode>3): New pattern.
16457 (one_cmpl<mode>2): Ditto.
16458 (*<optab>not<mode>): Ditto.
16459 (*n<optab><mode>): Ditto.
16460 * config/riscv/riscv-v.cc (expand_vec_cmp_float): Change to
16463 2023-05-24 Kewen Lin <linkw@linux.ibm.com>
16465 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Adjust the
16466 calculation on n_perms by considering nvectors_per_build.
16468 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16469 Richard Sandiford <richard.sandiford@arm.com>
16471 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): New pattern.
16472 (vec_cmp<mode><vm>): New pattern.
16473 (vec_cmpu<mode><vm>): New pattern.
16474 (vcond<V:mode><VI:mode>): New pattern.
16475 (vcondu<V:mode><VI:mode>): New pattern.
16476 * config/riscv/riscv-protos.h (enum insn_type): Add new enum.
16477 (emit_vlmax_merge_insn): New function.
16478 (emit_vlmax_cmp_insn): Ditto.
16479 (emit_vlmax_cmp_mu_insn): Ditto.
16480 (expand_vec_cmp): Ditto.
16481 (expand_vec_cmp_float): Ditto.
16482 (expand_vcond): Ditto.
16483 * config/riscv/riscv-v.cc (emit_vlmax_merge_insn): Ditto.
16484 (emit_vlmax_cmp_insn): Ditto.
16485 (emit_vlmax_cmp_mu_insn): Ditto.
16486 (get_cmp_insn_code): Ditto.
16487 (expand_vec_cmp): Ditto.
16488 (expand_vec_cmp_float): Ditto.
16489 (expand_vcond): Ditto.
16491 2023-05-24 Pan Li <pan2.li@intel.com>
16493 * config/riscv/genrvv-type-indexer.cc (main): Add
16494 unsigned_eew*_lmul1_interpret for indexer.
16495 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
16496 Register vuint*m1_t interpret function.
16497 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
16498 New macro for vuint8m1_t.
16499 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
16500 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
16501 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
16502 (vbool1_t): Add to unsigned_eew*_interpret_ops.
16503 (vbool2_t): Likewise.
16504 (vbool4_t): Likewise.
16505 (vbool8_t): Likewise.
16506 (vbool16_t): Likewise.
16507 (vbool32_t): Likewise.
16508 (vbool64_t): Likewise.
16509 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
16510 New macro for vuint*m1_t.
16511 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
16512 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
16513 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
16514 (required_extensions_p): Add vuint*m1_t interpret case.
16515 * config/riscv/riscv-vector-builtins.def (unsigned_eew8_lmul1_interpret):
16516 Add vuint*m1_t interpret to base type.
16517 (unsigned_eew16_lmul1_interpret): Likewise.
16518 (unsigned_eew32_lmul1_interpret): Likewise.
16519 (unsigned_eew64_lmul1_interpret): Likewise.
16521 2023-05-24 Pan Li <pan2.li@intel.com>
16523 * config/riscv/genrvv-type-indexer.cc (EEW_SIZE_LIST): New macro
16524 for the eew size list.
16525 (LMUL1_LOG2): New macro for the log2 value of lmul=1.
16526 (main): Add signed_eew*_lmul1_interpret for indexer.
16527 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
16528 Register vint*m1_t interpret function.
16529 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
16530 New macro for vint8m1_t.
16531 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
16532 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
16533 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
16534 (vbool1_t): Add to signed_eew*_interpret_ops.
16535 (vbool2_t): Likewise.
16536 (vbool4_t): Likewise.
16537 (vbool8_t): Likewise.
16538 (vbool16_t): Likewise.
16539 (vbool32_t): Likewise.
16540 (vbool64_t): Likewise.
16541 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
16542 New macro for vint*m1_t.
16543 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
16544 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
16545 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
16546 (required_extensions_p): Add vint8m1_t interpret case.
16547 * config/riscv/riscv-vector-builtins.def (signed_eew8_lmul1_interpret):
16548 Add vint*m1_t interpret to base type.
16549 (signed_eew16_lmul1_interpret): Likewise.
16550 (signed_eew32_lmul1_interpret): Likewise.
16551 (signed_eew64_lmul1_interpret): Likewise.
16553 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16555 * config/riscv/autovec.md: Adjust for new interface.
16556 * config/riscv/riscv-protos.h (emit_vlmax_insn): Add VL operand.
16557 (emit_nonvlmax_insn): Add AVL operand.
16558 * config/riscv/riscv-v.cc (emit_vlmax_insn): Add VL operand.
16559 (emit_nonvlmax_insn): Add AVL operand.
16560 (sew64_scalar_helper): Adjust for new interface.
16561 (expand_tuple_move): Ditto.
16562 * config/riscv/vector.md: Ditto.
16564 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16566 * config/riscv/riscv-v.cc (expand_vec_series): Remove magic number.
16567 (expand_const_vector): Ditto.
16568 (legitimize_move): Ditto.
16569 (sew64_scalar_helper): Ditto.
16570 (expand_tuple_move): Ditto.
16571 (expand_vector_init_insert_elems): Ditto.
16572 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
16574 2023-05-24 liuhongt <hongtao.liu@intel.com>
16577 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
16578 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} and
16579 _mm_abs_{pi8,pi16,pi32} into gimple ABS_EXPR.
16580 (ix86_masked_all_ones): Handle 64-bit mask.
16581 * config/i386/i386-builtin.def: Replace icode of related
16582 non-mask simd abs builtins with CODE_FOR_nothing.
16584 2023-05-23 Martin Uecker <uecker@tugraz.at>
16587 * function.cc (gimplify_parm_type): Remove function.
16588 (gimplify_parameters): Call gimplify_type_sizes.
16590 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
16592 * config/xtensa/xtensa.md (*addsubx): Rename from '*addx',
16593 and change to also accept '*subx' pattern.
16596 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
16598 * config/xtensa/predicates.md (addsub_operator): New.
16599 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3,
16600 *extzvsi-1bit_addsubx): New insn_and_split patterns.
16601 * config/xtensa/xtensa.cc (xtensa_rtx_costs):
16602 Add a special case about ifcvt 'noce_try_cmove()' to handle
16603 constant loads that do not fit into signed 12 bits in the
16604 patterns added above.
16606 2023-05-23 Richard Biener <rguenther@suse.de>
16608 PR tree-optimization/109747
16609 * tree-vect-slp.cc (vect_prologue_cost_for_slp): Pass down
16610 the SLP node only once to the cost hook.
16612 2023-05-23 Georg-Johann Lay <avr@gjlay.de>
16614 * config/avr/avr.cc (avr_insn_cost): New static function.
16615 (TARGET_INSN_COST): Define to that function.
16617 2023-05-23 Richard Biener <rguenther@suse.de>
16620 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
16621 For vector construction or splats apply GPR->XMM move
16622 costing. QImode memory can be handled directly only
16623 with SSE4.1 pinsrb.
16625 2023-05-23 Richard Biener <rguenther@suse.de>
16627 PR tree-optimization/108752
16628 * tree-vect-stmts.cc (vectorizable_operation): For bit
16629 operations with generic word_mode vectors do not cost
16630 an extra stmt. For plus, minus and negate also cost the
16631 constant materialization.
16633 2023-05-23 Uros Bizjak <ubizjak@gmail.com>
16635 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial):
16636 Call ix86_expand_vec_shift_qihi_constant for shifts
16637 with constant count operand.
16638 * config/i386/i386.cc (ix86_shift_rotate_cost):
16639 Handle V4QImode and V8QImode.
16640 * config/i386/mmx.md (<insn>v8qi3): New insn pattern.
16641 (<insn>v4qi3): Ditto.
16643 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16645 * config/riscv/vector.md: Add mode.
16647 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
16649 PR tree-optimization/109934
16650 * value-range.cc (irange::invert): Remove buggy special case.
16652 2023-05-23 Richard Biener <rguenther@suse.de>
16654 * tree-ssa-pre.cc (compute_antic_aux): Dump the correct
16657 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
16660 * config/aarch64/aarch64.cc (aarch64_modes_tieable_p): Allow
16661 subregs between any scalars that are 64 bits or smaller.
16662 * config/aarch64/iterators.md (SUBDI_BITS): New int iterator.
16663 (bits_etype): New int attribute.
16664 * config/aarch64/aarch64.md (*insv_reg<mode>_<SUBDI_BITS>)
16665 (*aarch64_bfi<GPI:mode><ALLX:mode>_<SUBDI_BITS>): New patterns.
16666 (*aarch64_bfidi<ALLX:mode>_subreg_<SUBDI_BITS>): Likewise.
16668 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
16670 * doc/md.texi: Document that <FOO> can be used to refer to the
16671 numerical value of an int iterator FOO. Tweak other parts of
16672 the int iterator documentation.
16673 * read-rtl.cc (iterator_group::has_self_attr): New field.
16674 (map_attr_string): When has_self_attr is true, make <FOO>
16675 expand to the current value of iterator FOO.
16676 (initialize_iterators): Set has_self_attr for int iterators.
16678 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16680 * config/riscv/autovec.md: Refactor the framework of RVV auto-vectorization.
16681 * config/riscv/riscv-protos.h (RVV_MISC_OP_NUM): Ditto.
16682 (RVV_UNOP_NUM): New macro.
16683 (RVV_BINOP_NUM): Ditto.
16684 (legitimize_move): Refactor the framework of RVV auto-vectorization.
16685 (emit_vlmax_op): Ditto.
16686 (emit_vlmax_reg_op): Ditto.
16687 (emit_len_op): Ditto.
16688 (emit_len_binop): Ditto.
16689 (emit_vlmax_tany_many): Ditto.
16690 (emit_nonvlmax_tany_many): Ditto.
16691 (sew64_scalar_helper): Ditto.
16692 (expand_tuple_move): Ditto.
16693 * config/riscv/riscv-v.cc (emit_pred_op): Ditto.
16694 (emit_pred_binop): Ditto.
16695 (emit_vlmax_op): Ditto.
16696 (emit_vlmax_tany_many): New function.
16697 (emit_len_op): Remove.
16698 (emit_nonvlmax_tany_many): New function.
16699 (emit_vlmax_reg_op): Remove.
16700 (emit_len_binop): Ditto.
16701 (emit_index_op): Ditto.
16702 (expand_vec_series): Refactor the framework of RVV auto-vectorization.
16703 (expand_const_vector): Ditto.
16704 (legitimize_move): Ditto.
16705 (sew64_scalar_helper): Ditto.
16706 (expand_tuple_move): Ditto.
16707 (expand_vector_init_insert_elems): Ditto.
16708 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
16709 * config/riscv/vector.md: Ditto.
16711 2023-05-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16714 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Add predicate
16715 and constraint for operand 0.
16716 (add_vec_concat_subst_be): Likewise.
16718 2023-05-23 Richard Biener <rguenther@suse.de>
16720 PR tree-optimization/109849
16721 * tree-ssa-pre.cc (do_hoist_insertion): Compute ANTIC_OUT
16722 and use that to determine what to hoist.
16724 2023-05-23 Eric Botcazou <ebotcazou@adacore.com>
16726 * fold-const.cc (native_encode_initializer) <CONSTRUCTOR>: Apply the
16727 specific treatment for bit-fields only if they have an integral type
16728 and filter out non-integral bit-fields that do not start and end on
16731 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
16733 PR tree-optimization/109920
16734 * value-range.h (RESIZABLE>::~int_range): Use delete[].
16736 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
16738 * config/i386/i386.cc (ix86_shift_rotate_cost): Correct
16739 calcuation of integer vector mode costs to reflect generated
16740 instruction sequences of different integer vector modes and
16741 different target ABIs. Remove "speed" function argument.
16742 (ix86_rtx_costs): Update call for removed function argument.
16743 (ix86_vector_costs::add_stmt_cost): Ditto.
16745 2023-05-22 Aldy Hernandez <aldyh@redhat.com>
16747 * value-range.h (class Value_Range): Implement set_zero,
16748 set_nonzero, and nonzero_p.
16750 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
16752 * config/i386/i386.cc (ix86_multiplication_cost): Add
16753 the cost of a memory read to the cost of V?QImode sequences.
16755 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16757 * config/riscv/riscv-v.cc: Add "m_" prefix.
16759 2023-05-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16761 * tree-vect-loop.cc (vect_get_loop_len): Fix issue for
16762 multiple-rgroup of length.
16763 * tree-vect-stmts.cc (vectorizable_store): Ditto.
16764 (vectorizable_load): Ditto.
16765 * tree-vectorizer.h (vect_get_loop_len): Ditto.
16767 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16769 * config/riscv/riscv.cc (riscv_const_insns): Reorganize the
16772 2023-05-22 Kewen Lin <linkw@linux.ibm.com>
16774 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Refactor the
16775 handling for the case index == count.
16777 2023-05-21 Georg-Johann Lay <avr@gjlay.de>
16780 * config/avr/avr.cc (avr_fold_builtin) [AVR_BUILTIN_INSERT_BITS]:
16781 Don't fold to XOR / AND / XOR if just one bit is copied to the
16784 2023-05-21 Roger Sayle <roger@nextmovesoftware.com>
16786 * config/nvptx/nvptx.cc (nvptx_expand_brev): Expand target
16787 builtin for bit reversal using brev instruction.
16788 (enum nvptx_builtins): Add NVPTX_BUILTIN_BREV and
16789 NVPTX_BUILTIN_BREVLL.
16790 (nvptx_init_builtins): Define "brev" and "brevll".
16791 (nvptx_expand_builtin): Expand NVPTX_BUILTIN_BREV and
16792 NVPTX_BUILTIN_BREVLL via nvptx_expand_brev function.
16793 * doc/extend.texi (Nvidia PTX Builtin-in Functions): New
16794 section, document __builtin_nvptx_brev{,ll}.
16796 2023-05-21 Jakub Jelinek <jakub@redhat.com>
16798 PR tree-optimization/109505
16799 * match.pd ((x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2),
16800 Combine successive equal operations with constants,
16801 (A +- CST1) +- CST2 -> A + CST3, (CST1 - A) +- CST2 -> CST3 - A,
16802 CST1 - (CST2 - A) -> CST3 + A): Use ! on ops with 2 CONSTANT_CLASS_P
16805 2023-05-21 Andrew Pinski <apinski@marvell.com>
16807 * expr.cc (expand_single_bit_test): Correct bitpos for big-endian.
16809 2023-05-21 Pan Li <pan2.li@intel.com>
16811 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): Add the
16812 rest bool size, aka 2, 4, 8, 16, 32, 64.
16813 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
16814 Register vbool[2|4|8|16|32|64] interpret function.
16815 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_BOOL2_INTERPRET_OPS):
16816 New macro for vbool2_t.
16817 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
16818 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
16819 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
16820 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
16821 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
16822 (vint8m1_t): Add the type to bool[2|4|8|16|32|64]_interpret_ops.
16823 (vint16m1_t): Likewise.
16824 (vint32m1_t): Likewise.
16825 (vint64m1_t): Likewise.
16826 (vuint8m1_t): Likewise.
16827 (vuint16m1_t): Likewise.
16828 (vuint32m1_t): Likewise.
16829 (vuint64m1_t): Likewise.
16830 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_BOOL2_INTERPRET_OPS):
16831 New macro for vbool2_t.
16832 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
16833 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
16834 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
16835 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
16836 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
16837 (required_extensions_p): Add vbool[2|4|8|16|32|64] interpret case.
16838 * config/riscv/riscv-vector-builtins.def (bool2_interpret): Add
16839 vbool2_t interprect to base type.
16840 (bool4_interpret): Likewise.
16841 (bool8_interpret): Likewise.
16842 (bool16_interpret): Likewise.
16843 (bool32_interpret): Likewise.
16844 (bool64_interpret): Likewise.
16846 2023-05-21 Andrew Pinski <apinski@marvell.com>
16848 PR middle-end/109919
16849 * expr.cc (expand_single_bit_test): Don't use the
16850 target for expand_expr.
16852 2023-05-20 Gerald Pfeifer <gerald@pfeifer.com>
16854 * doc/install.texi (Specific): Remove de facto empty alpha*-*-*
16857 2023-05-20 Pan Li <pan2.li@intel.com>
16859 * mode-switching.cc (entity_map): Initialize the array to zero.
16862 2023-05-20 Triffid Hunter <triffid.hunter@gmail.com>
16865 * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi):
16866 Remove superfluous "parallel" in insn pattern.
16867 ([u]divmod<mode>4): Tidy code. Use gcc_unreachable() instead of
16868 printing error text to assembly.
16870 2023-05-20 Andrew Pinski <apinski@marvell.com>
16872 * expr.cc (fold_single_bit_test): Rename to ...
16873 (expand_single_bit_test): This and expand directly.
16874 (do_store_flag): Update for the rename function.
16876 2023-05-20 Andrew Pinski <apinski@marvell.com>
16878 * expr.cc (fold_single_bit_test): Use BIT_FIELD_REF
16879 instead of shift/and.
16881 2023-05-20 Andrew Pinski <apinski@marvell.com>
16883 * expr.cc (fold_single_bit_test): Add an assert
16884 and simplify based on code being NE_EXPR or EQ_EXPR.
16886 2023-05-20 Andrew Pinski <apinski@marvell.com>
16888 * expr.cc (fold_single_bit_test): Take inner and bitnum
16889 instead of arg0 and arg1. Update the code.
16890 (do_store_flag): Don't create a tree when calling
16891 fold_single_bit_test instead just call it with the bitnum
16892 and the inner tree.
16894 2023-05-20 Andrew Pinski <apinski@marvell.com>
16896 * expr.cc (fold_single_bit_test): Use get_def_for_expr
16897 instead of checking the inner's code.
16899 2023-05-20 Andrew Pinski <apinski@marvell.com>
16901 * expr.cc (fold_single_bit_test_into_sign_test): Inline into ...
16902 (fold_single_bit_test): This and simplify.
16904 2023-05-20 Andrew Pinski <apinski@marvell.com>
16906 * fold-const.cc (fold_single_bit_test_into_sign_test): Move to
16908 (fold_single_bit_test): Likewise.
16909 * expr.cc (fold_single_bit_test_into_sign_test): Move from fold-const.cc
16910 (fold_single_bit_test): Likewise and make static.
16911 * fold-const.h (fold_single_bit_test): Remove declaration.
16913 2023-05-20 Die Li <lidie@eswincomputing.com>
16915 * config/riscv/riscv.cc (riscv_expand_conditional_move): Fix mode
16918 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
16920 * config/riscv/bitmanip.md (branch<X:mode>_bext): New split pattern.
16922 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
16925 * config/riscv/bitmanip.md
16926 (<bitmanip_optab>disi2): Match with any_extend.
16927 (<bitmanip_optab>disi2_sext): New pattern to match
16928 with sign extend using an ANDI instruction.
16930 2023-05-19 Nathan Sidwell <nathan@acm.org>
16933 * opts.h (handle_deferred_dump_options): Declare.
16934 * opts-global.cc (handle_common_deferred_options): Do not handle
16936 (handle_deferred_dump_options): New.
16937 * toplev.cc (toplev::main): Call it after plugin init.
16939 2023-05-19 Joern Rennecke <joern.rennecke@embecosm.com>
16941 * config/riscv/constraints.md (DsS, DsD): Restore agreement
16942 with shiftm1 mode attribute.
16944 2023-05-19 Andrew Pinski <apinski@marvell.com>
16947 * gcc.cc (default_compilers["@c-header"]): Add %w
16948 after the --output-pch.
16950 2023-05-19 Vineet Gupta <vineetg@rivosinc.com>
16952 * config/riscv/riscv.cc (riscv_split_integer): if loval is equal
16953 to hival, ASHIFT the corresponding regs.
16955 2023-05-19 Robin Dapp <rdapp@ventanamicro.com>
16957 * config/riscv/riscv.cc (riscv_const_insns): Remove else.
16959 2023-05-19 Jakub Jelinek <jakub@redhat.com>
16961 PR tree-optimization/105776
16962 * tree-ssa-math-opts.cc (arith_overflow_check_p): If cast_stmt is
16963 non-NULL, allow division statement to have a cast as single imm use
16964 rather than comparison/condition.
16965 (match_arith_overflow): In that case remove the cast stmt in addition
16966 to the division statement.
16968 2023-05-19 Jakub Jelinek <jakub@redhat.com>
16970 PR tree-optimization/101856
16971 * tree-ssa-math-opts.cc (match_arith_overflow): Pattern detect
16972 unsigned __builtin_mul_overflow_p even when umulv4_optab doesn't
16973 support it but umul_highpart_optab does.
16975 2023-05-19 Eric Botcazou <ebotcazou@adacore.com>
16977 * varasm.cc (output_constructor_bitfield): Call tree_to_uhwi instead
16978 of tree_to_shwi on array indices. Minor tweaks.
16980 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
16982 * alias.cc (ref_all_alias_ptr_type_p): Use _P() defines from tree.h.
16983 * attribs.cc (diag_attr_exclusions): Ditto.
16984 (decl_attributes): Ditto.
16985 (build_type_attribute_qual_variant): Ditto.
16986 * builtins.cc (fold_builtin_carg): Ditto.
16987 (fold_builtin_next_arg): Ditto.
16988 (do_mpc_arg2): Ditto.
16989 * cfgexpand.cc (expand_return): Ditto.
16990 * cgraph.h (decl_in_symtab_p): Ditto.
16991 (symtab_node::get_create): Ditto.
16992 * dwarf2out.cc (base_type_die): Ditto.
16993 (implicit_ptr_descriptor): Ditto.
16994 (gen_array_type_die): Ditto.
16995 (gen_type_die_with_usage): Ditto.
16996 (optimize_location_into_implicit_ptr): Ditto.
16997 * expr.cc (do_store_flag): Ditto.
16998 * fold-const.cc (negate_expr_p): Ditto.
16999 (fold_negate_expr_1): Ditto.
17000 (fold_convert_const): Ditto.
17001 (fold_convert_loc): Ditto.
17002 (constant_boolean_node): Ditto.
17003 (fold_binary_op_with_conditional_arg): Ditto.
17004 (build_fold_addr_expr_with_type_loc): Ditto.
17005 (fold_comparison): Ditto.
17006 (fold_checksum_tree): Ditto.
17007 (tree_unary_nonnegative_warnv_p): Ditto.
17008 (integer_valued_real_unary_p): Ditto.
17009 (fold_read_from_constant_string): Ditto.
17010 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text): Ditto.
17011 * gimple-expr.cc (useless_type_conversion_p): Ditto.
17012 (is_gimple_reg): Ditto.
17013 (is_gimple_asm_val): Ditto.
17014 (mark_addressable): Ditto.
17015 * gimple-expr.h (is_gimple_variable): Ditto.
17016 (virtual_operand_p): Ditto.
17017 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores): Ditto.
17018 * gimplify.cc (gimplify_bind_expr): Ditto.
17019 (gimplify_return_expr): Ditto.
17020 (gimple_add_padding_init_for_auto_var): Ditto.
17021 (gimplify_addr_expr): Ditto.
17022 (omp_add_variable): Ditto.
17023 (omp_notice_variable): Ditto.
17024 (omp_get_base_pointer): Ditto.
17025 (omp_strip_components_and_deref): Ditto.
17026 (omp_strip_indirections): Ditto.
17027 (omp_accumulate_sibling_list): Ditto.
17028 (omp_build_struct_sibling_lists): Ditto.
17029 (gimplify_adjust_omp_clauses_1): Ditto.
17030 (gimplify_adjust_omp_clauses): Ditto.
17031 (gimplify_omp_for): Ditto.
17032 (goa_lhs_expr_p): Ditto.
17033 (gimplify_one_sizepos): Ditto.
17034 * graphite-scop-detection.cc (scop_detection::graphite_can_represent_scev): Ditto.
17035 * ipa-devirt.cc (odr_types_equivalent_p): Ditto.
17036 * ipa-prop.cc (ipa_set_jf_constant): Ditto.
17037 (propagate_controlled_uses): Ditto.
17038 * ipa-sra.cc (type_prevails_p): Ditto.
17039 (scan_expr_access): Ditto.
17040 * optabs-tree.cc (optab_for_tree_code): Ditto.
17041 * toplev.cc (wrapup_global_declaration_1): Ditto.
17042 * trans-mem.cc (transaction_invariant_address_p): Ditto.
17043 * tree-cfg.cc (verify_types_in_gimple_reference): Ditto.
17044 (verify_gimple_comparison): Ditto.
17045 (verify_gimple_assign_binary): Ditto.
17046 (verify_gimple_assign_single): Ditto.
17047 * tree-complex.cc (get_component_ssa_name): Ditto.
17048 * tree-emutls.cc (lower_emutls_2): Ditto.
17049 * tree-inline.cc (copy_tree_body_r): Ditto.
17050 (estimate_move_cost): Ditto.
17051 (copy_decl_for_dup_finish): Ditto.
17052 * tree-nested.cc (convert_nonlocal_omp_clauses): Ditto.
17053 (note_nonlocal_vla_type): Ditto.
17054 (convert_local_omp_clauses): Ditto.
17055 (remap_vla_decls): Ditto.
17056 (fixup_vla_decls): Ditto.
17057 * tree-parloops.cc (loop_has_vector_phi_nodes): Ditto.
17058 * tree-pretty-print.cc (print_declaration): Ditto.
17059 (print_call_name): Ditto.
17060 * tree-sra.cc (compare_access_positions): Ditto.
17061 * tree-ssa-alias.cc (compare_type_sizes): Ditto.
17062 * tree-ssa-ccp.cc (get_default_value): Ditto.
17063 * tree-ssa-coalesce.cc (populate_coalesce_list_for_outofssa): Ditto.
17064 * tree-ssa-dom.cc (reduce_vector_comparison_to_scalar_comparison): Ditto.
17065 * tree-ssa-forwprop.cc (can_propagate_from): Ditto.
17066 * tree-ssa-propagate.cc (may_propagate_copy): Ditto.
17067 * tree-ssa-sccvn.cc (fully_constant_vn_reference_p): Ditto.
17068 * tree-ssa-sink.cc (statement_sink_location): Ditto.
17069 * tree-ssa-structalias.cc (type_must_have_pointers): Ditto.
17070 * tree-ssa-ter.cc (find_replaceable_in_bb): Ditto.
17071 * tree-ssa-uninit.cc (warn_uninit): Ditto.
17072 * tree-ssa.cc (maybe_rewrite_mem_ref_base): Ditto.
17073 (non_rewritable_mem_ref_base): Ditto.
17074 * tree-streamer-in.cc (lto_input_ts_type_non_common_tree_pointers): Ditto.
17075 * tree-streamer-out.cc (write_ts_type_non_common_tree_pointers): Ditto.
17076 * tree-vect-generic.cc (do_binop): Ditto.
17078 * tree-vect-stmts.cc (vect_init_vector): Ditto.
17079 * tree-vector-builder.h (tree_vector_builder::note_representative): Ditto.
17080 * tree.cc (sign_mask_for): Ditto.
17081 (verify_type_variant): Ditto.
17082 (gimple_canonical_types_compatible_p): Ditto.
17083 (verify_type): Ditto.
17084 * ubsan.cc (get_ubsan_type_info_for_type): Ditto.
17085 * var-tracking.cc (prepare_call_arguments): Ditto.
17086 (vt_add_function_parameters): Ditto.
17087 * varasm.cc (decode_addr_const): Ditto.
17089 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
17091 * omp-low.cc (scan_sharing_clauses): Use _P() defines from tree.h.
17092 (lower_reduction_clauses): Ditto.
17093 (lower_send_clauses): Ditto.
17094 (lower_omp_task_reductions): Ditto.
17095 * omp-oacc-neuter-broadcast.cc (install_var_field): Ditto.
17096 (worker_single_copy): Ditto.
17097 * omp-offload.cc (oacc_rewrite_var_decl): Ditto.
17098 * omp-simd-clone.cc (plausible_type_for_simd_clone): Ditto.
17100 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
17102 * lto-streamer-in.cc (lto_input_var_decl_ref): Use _P defines from
17104 (lto_read_body_or_constructor): Ditto.
17105 * lto-streamer-out.cc (tree_is_indexable): Ditto.
17106 (lto_output_var_decl_ref): Ditto.
17107 (DFS::DFS_write_tree_body): Ditto.
17108 (wrap_refs): Ditto.
17109 (write_symbol_extension_info): Ditto.
17111 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
17113 * config/aarch64/aarch64.cc (aarch64_short_vector_p): Use _P
17114 defines from tree.h.
17115 (aarch64_mangle_type): Ditto.
17116 * config/alpha/alpha.cc (alpha_in_small_data_p): Ditto.
17117 (alpha_gimplify_va_arg_1): Ditto.
17118 * config/arc/arc.cc (arc_encode_section_info): Ditto.
17119 (arc_is_aux_reg_p): Ditto.
17120 (arc_is_uncached_mem_p): Ditto.
17121 (arc_handle_aux_attribute): Ditto.
17122 * config/arm/arm.cc (arm_handle_isr_attribute): Ditto.
17123 (arm_handle_cmse_nonsecure_call): Ditto.
17124 (arm_set_default_type_attributes): Ditto.
17125 (arm_is_segment_info_known): Ditto.
17126 (arm_mangle_type): Ditto.
17127 * config/arm/unknown-elf.h (IN_NAMED_SECTION_P): Ditto.
17128 * config/avr/avr.cc (avr_lookup_function_attribute1): Ditto.
17129 (avr_decl_absdata_p): Ditto.
17130 (avr_insert_attributes): Ditto.
17131 (avr_section_type_flags): Ditto.
17132 (avr_encode_section_info): Ditto.
17133 * config/bfin/bfin.cc (bfin_handle_l2_attribute): Ditto.
17134 * config/bpf/bpf.cc (bpf_core_compute): Ditto.
17135 * config/c6x/c6x.cc (c6x_in_small_data_p): Ditto.
17136 * config/csky/csky.cc (csky_handle_isr_attribute): Ditto.
17137 (csky_mangle_type): Ditto.
17138 * config/darwin-c.cc (darwin_pragma_unused): Ditto.
17139 * config/darwin.cc (is_objc_metadata): Ditto.
17140 * config/epiphany/epiphany.cc (epiphany_function_ok_for_sibcall): Ditto.
17141 * config/epiphany/epiphany.h (ROUND_TYPE_ALIGN): Ditto.
17142 * config/frv/frv.cc (frv_emit_movsi): Ditto.
17143 * config/gcn/gcn-tree.cc (gcn_lockless_update): Ditto.
17144 * config/gcn/gcn.cc (gcn_asm_output_symbol_ref): Ditto.
17145 * config/h8300/h8300.cc (h8300_encode_section_info): Ditto.
17146 * config/i386/i386-expand.cc: Ditto.
17147 * config/i386/i386.cc (type_natural_mode): Ditto.
17148 (ix86_function_arg): Ditto.
17149 (ix86_data_alignment): Ditto.
17150 (ix86_local_alignment): Ditto.
17151 (ix86_simd_clone_compute_vecsize_and_simdlen): Ditto.
17152 * config/i386/winnt-cxx.cc (i386_pe_type_dllimport_p): Ditto.
17153 (i386_pe_type_dllexport_p): Ditto.
17154 (i386_pe_adjust_class_at_definition): Ditto.
17155 * config/i386/winnt.cc (i386_pe_determine_dllimport_p): Ditto.
17156 (i386_pe_binds_local_p): Ditto.
17157 (i386_pe_section_type_flags): Ditto.
17158 * config/ia64/ia64.cc (ia64_encode_section_info): Ditto.
17159 (ia64_gimplify_va_arg): Ditto.
17160 (ia64_in_small_data_p): Ditto.
17161 * config/iq2000/iq2000.cc (iq2000_function_arg): Ditto.
17162 * config/lm32/lm32.cc (lm32_in_small_data_p): Ditto.
17163 * config/loongarch/loongarch.cc (loongarch_handle_model_attribute): Ditto.
17164 * config/m32c/m32c.cc (m32c_insert_attributes): Ditto.
17165 * config/mcore/mcore.cc (mcore_mark_dllimport): Ditto.
17166 (mcore_encode_section_info): Ditto.
17167 * config/microblaze/microblaze.cc (microblaze_elf_in_small_data_p): Ditto.
17168 * config/mips/mips.cc (mips_output_aligned_decl_common): Ditto.
17169 * config/mmix/mmix.cc (mmix_encode_section_info): Ditto.
17170 * config/nvptx/nvptx.cc (nvptx_encode_section_info): Ditto.
17171 (pass_in_memory): Ditto.
17172 (nvptx_generate_vector_shuffle): Ditto.
17173 (nvptx_lockless_update): Ditto.
17174 * config/pa/pa.cc (pa_function_arg_padding): Ditto.
17175 (pa_function_value): Ditto.
17176 (pa_function_arg): Ditto.
17177 * config/pa/pa.h (IN_NAMED_SECTION_P): Ditto.
17178 (TEXT_SPACE_P): Ditto.
17179 * config/pa/som.h (MAKE_DECL_ONE_ONLY): Ditto.
17180 * config/pdp11/pdp11.cc (pdp11_return_in_memory): Ditto.
17181 * config/riscv/riscv.cc (riscv_in_small_data_p): Ditto.
17182 (riscv_mangle_type): Ditto.
17183 * config/rl78/rl78.cc (rl78_insert_attributes): Ditto.
17184 (rl78_addsi3_internal): Ditto.
17185 * config/rs6000/aix.h (ROUND_TYPE_ALIGN): Ditto.
17186 * config/rs6000/darwin.h (ROUND_TYPE_ALIGN): Ditto.
17187 * config/rs6000/freebsd64.h (ROUND_TYPE_ALIGN): Ditto.
17188 * config/rs6000/linux64.h (ROUND_TYPE_ALIGN): Ditto.
17189 * config/rs6000/rs6000-call.cc (rs6000_function_arg_boundary): Ditto.
17190 (rs6000_function_arg_advance_1): Ditto.
17191 (rs6000_function_arg): Ditto.
17192 (rs6000_pass_by_reference): Ditto.
17193 * config/rs6000/rs6000-logue.cc (rs6000_function_ok_for_sibcall): Ditto.
17194 * config/rs6000/rs6000.cc (rs6000_data_alignment): Ditto.
17195 (rs6000_set_default_type_attributes): Ditto.
17196 (rs6000_elf_in_small_data_p): Ditto.
17197 (IN_NAMED_SECTION): Ditto.
17198 (rs6000_xcoff_encode_section_info): Ditto.
17199 (rs6000_function_value): Ditto.
17200 (invalid_arg_for_unprototyped_fn): Ditto.
17201 * config/s390/s390-c.cc (s390_fn_types_compatible): Ditto.
17202 (s390_vec_n_elem): Ditto.
17203 * config/s390/s390.cc (s390_check_type_for_vector_abi): Ditto.
17204 (s390_function_arg_integer): Ditto.
17205 (s390_return_in_memory): Ditto.
17206 (s390_encode_section_info): Ditto.
17207 * config/sh/sh.cc (sh_gimplify_va_arg_expr): Ditto.
17208 (sh_function_value): Ditto.
17209 * config/sol2.cc (solaris_insert_attributes): Ditto.
17210 * config/sparc/sparc.cc (function_arg_slotno): Ditto.
17211 * config/sparc/sparc.h (ROUND_TYPE_ALIGN): Ditto.
17212 * config/stormy16/stormy16.cc (xstormy16_encode_section_info): Ditto.
17213 (xstormy16_handle_below100_attribute): Ditto.
17214 * config/v850/v850.cc (v850_encode_section_info): Ditto.
17215 (v850_insert_attributes): Ditto.
17216 * config/visium/visium.cc (visium_pass_by_reference): Ditto.
17217 (visium_return_in_memory): Ditto.
17218 * config/xtensa/xtensa.cc (xtensa_multibss_section_type_flags): Ditto.
17220 2023-05-18 Uros Bizjak <ubizjak@gmail.com>
17222 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial): New.
17223 (ix86_expand_vecop_qihi): Add op2vec bool variable.
17224 Do not set REG_EQUAL note.
17225 * config/i386/i386-protos.h (ix86_expand_vecop_qihi_partial):
17227 * config/i386/i386.cc (ix86_multiplication_cost): Handle
17228 V4QImode and V8QImode.
17229 * config/i386/mmx.md (mulv8qi3): New expander.
17231 * config/i386/sse.md (mulv8qi3): Remove.
17233 2023-05-18 Georg-Johann Lay <avr@gjlay.de>
17235 * config/avr/gen-avr-mmcu-specs.cc: Remove stale */ after // comment.
17237 2023-05-18 Jonathan Wakely <jwakely@redhat.com>
17239 PR bootstrap/105831
17240 * config.gcc: Use = operator instead of ==.
17242 2023-05-18 Michael Bäuerle <micha@NetBSD.org>
17244 PR bootstrap/105831
17245 * config/nvptx/gen-opt.sh: Use = operator instead of ==.
17246 * configure.ac: Likewise.
17247 * configure: Regenerate.
17249 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
17251 * config/arm/arm_mve.h: (__ARM_mve_typeid): Add more pointer types.
17252 (__ARM_mve_coerce1): Remove.
17253 (__ARM_mve_coerce2): Remove.
17254 (__ARM_mve_coerce3): Remove.
17255 (__ARM_mve_coerce_i_scalar): New.
17256 (__ARM_mve_coerce_s8_ptr): New.
17257 (__ARM_mve_coerce_u8_ptr): New.
17258 (__ARM_mve_coerce_s16_ptr): New.
17259 (__ARM_mve_coerce_u16_ptr): New.
17260 (__ARM_mve_coerce_s32_ptr): New.
17261 (__ARM_mve_coerce_u32_ptr): New.
17262 (__ARM_mve_coerce_s64_ptr): New.
17263 (__ARM_mve_coerce_u64_ptr): New.
17264 (__ARM_mve_coerce_f_scalar): New.
17265 (__ARM_mve_coerce_f16_ptr): New.
17266 (__ARM_mve_coerce_f32_ptr): New.
17267 (__arm_vst4q): Change _coerce_ overloads.
17268 (__arm_vbicq): Change _coerce_ overloads.
17269 (__arm_vld1q): Change _coerce_ overloads.
17270 (__arm_vld1q_z): Change _coerce_ overloads.
17271 (__arm_vld2q): Change _coerce_ overloads.
17272 (__arm_vld4q): Change _coerce_ overloads.
17273 (__arm_vldrhq_gather_offset): Change _coerce_ overloads.
17274 (__arm_vldrhq_gather_offset_z): Change _coerce_ overloads.
17275 (__arm_vldrhq_gather_shifted_offset): Change _coerce_ overloads.
17276 (__arm_vldrhq_gather_shifted_offset_z): Change _coerce_ overloads.
17277 (__arm_vldrwq_gather_offset): Change _coerce_ overloads.
17278 (__arm_vldrwq_gather_offset_z): Change _coerce_ overloads.
17279 (__arm_vldrwq_gather_shifted_offset): Change _coerce_ overloads.
17280 (__arm_vldrwq_gather_shifted_offset_z): Change _coerce_ overloads.
17281 (__arm_vst1q_p): Change _coerce_ overloads.
17282 (__arm_vst2q): Change _coerce_ overloads.
17283 (__arm_vst1q): Change _coerce_ overloads.
17284 (__arm_vstrhq): Change _coerce_ overloads.
17285 (__arm_vstrhq_p): Change _coerce_ overloads.
17286 (__arm_vstrhq_scatter_offset_p): Change _coerce_ overloads.
17287 (__arm_vstrhq_scatter_offset): Change _coerce_ overloads.
17288 (__arm_vstrhq_scatter_shifted_offset_p): Change _coerce_ overloads.
17289 (__arm_vstrhq_scatter_shifted_offset): Change _coerce_ overloads.
17290 (__arm_vstrwq_p): Change _coerce_ overloads.
17291 (__arm_vstrwq): Change _coerce_ overloads.
17292 (__arm_vstrwq_scatter_offset): Change _coerce_ overloads.
17293 (__arm_vstrwq_scatter_offset_p): Change _coerce_ overloads.
17294 (__arm_vstrwq_scatter_shifted_offset): Change _coerce_ overloads.
17295 (__arm_vstrwq_scatter_shifted_offset_p): Change _coerce_ overloads.
17296 (__arm_vsetq_lane): Change _coerce_ overloads.
17297 (__arm_vldrbq_gather_offset): Change _coerce_ overloads.
17298 (__arm_vdwdupq_x_u8): Change _coerce_ overloads.
17299 (__arm_vdwdupq_x_u16): Change _coerce_ overloads.
17300 (__arm_vdwdupq_x_u32): Change _coerce_ overloads.
17301 (__arm_viwdupq_x_u8): Change _coerce_ overloads.
17302 (__arm_viwdupq_x_u16): Change _coerce_ overloads.
17303 (__arm_viwdupq_x_u32): Change _coerce_ overloads.
17304 (__arm_vidupq_x_u8): Change _coerce_ overloads.
17305 (__arm_vddupq_x_u8): Change _coerce_ overloads.
17306 (__arm_vidupq_x_u16): Change _coerce_ overloads.
17307 (__arm_vddupq_x_u16): Change _coerce_ overloads.
17308 (__arm_vidupq_x_u32): Change _coerce_ overloads.
17309 (__arm_vddupq_x_u32): Change _coerce_ overloads.
17310 (__arm_vldrdq_gather_offset): Change _coerce_ overloads.
17311 (__arm_vldrdq_gather_offset_z): Change _coerce_ overloads.
17312 (__arm_vldrdq_gather_shifted_offset): Change _coerce_ overloads.
17313 (__arm_vldrdq_gather_shifted_offset_z): Change _coerce_ overloads.
17314 (__arm_vldrbq_gather_offset_z): Change _coerce_ overloads.
17315 (__arm_vidupq_u16): Change _coerce_ overloads.
17316 (__arm_vidupq_u32): Change _coerce_ overloads.
17317 (__arm_vidupq_u8): Change _coerce_ overloads.
17318 (__arm_vddupq_u16): Change _coerce_ overloads.
17319 (__arm_vddupq_u32): Change _coerce_ overloads.
17320 (__arm_vddupq_u8): Change _coerce_ overloads.
17321 (__arm_viwdupq_m): Change _coerce_ overloads.
17322 (__arm_viwdupq_u16): Change _coerce_ overloads.
17323 (__arm_viwdupq_u32): Change _coerce_ overloads.
17324 (__arm_viwdupq_u8): Change _coerce_ overloads.
17325 (__arm_vdwdupq_m): Change _coerce_ overloads.
17326 (__arm_vdwdupq_u16): Change _coerce_ overloads.
17327 (__arm_vdwdupq_u32): Change _coerce_ overloads.
17328 (__arm_vdwdupq_u8): Change _coerce_ overloads.
17329 (__arm_vstrbq): Change _coerce_ overloads.
17330 (__arm_vstrbq_p): Change _coerce_ overloads.
17331 (__arm_vstrbq_scatter_offset_p): Change _coerce_ overloads.
17332 (__arm_vstrdq_scatter_offset_p): Change _coerce_ overloads.
17333 (__arm_vstrdq_scatter_offset): Change _coerce_ overloads.
17334 (__arm_vstrdq_scatter_shifted_offset_p): Change _coerce_ overloads.
17335 (__arm_vstrdq_scatter_shifted_offset): Change _coerce_ overloads.
17337 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
17339 * config/arm/arm_mve.h (__arm_vbicq): Change coerce on
17342 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
17344 * config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic.
17345 (__arm_vadcq_u32): Likewise.
17346 (__arm_vadcq_m_s32): Likewise.
17347 (__arm_vadcq_m_u32): Likewise.
17348 (__arm_vsbcq_s32): Likewise.
17349 (__arm_vsbcq_u32): Likewise.
17350 (__arm_vsbcq_m_s32): Likewise.
17351 (__arm_vsbcq_m_u32): Likewise.
17352 * config/arm/mve.md (get_fpscr_nzcvqc): Make unspec_volatile.
17354 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
17356 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrev64q_f<mode>)
17357 (mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf)
17358 (mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_<supf><mode>)
17359 (mve_vrev64q_<supf><mode>, mve_vcvtq_from_f_<supf><mode>)
17360 (mve_vmovltq_<supf><mode>, mve_vmovlbq_<supf><mode>)
17361 (mve_vcvtpq_<supf><mode>, mve_vcvtnq_<supf><mode>)
17362 (mve_vcvtmq_<supf><mode>, mve_vcvtaq_<supf><mode>)
17363 (mve_vmvnq_n_<supf><mode>, mve_vrev16q_<supf>v16qi)
17364 (mve_vctp<MVE_vctp>q<MVE_vpred>, mve_vbrsrq_n_f<mode>)
17365 (mve_vbrsrq_n_<supf><mode>, mve_vandq_f<mode>, mve_vbicq_f<mode>)
17366 (mve_vctp<MVE_vctp>q_m<MVE_vpred>, mve_vcvtbq_f16_f32v8hf)
17367 (mve_vcvttq_f16_f32v8hf, mve_veorq_f<mode>)
17368 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
17369 (mve_vmlsldavxq_s<mode>, mve_vornq_f<mode>, mve_vorrq_f<mode>)
17370 (mve_vrmlaldavhxq_sv4si, mve_vcvtq_m_to_f_<supf><mode>)
17371 (mve_vshlcq_<supf><mode>, mve_vmvnq_m_<supf><mode>)
17372 (mve_vpselq_<supf><mode>, mve_vcvtbq_m_f16_f32v8hf)
17373 (mve_vcvtbq_m_f32_f16v4sf, mve_vcvttq_m_f16_f32v8hf)
17374 (mve_vcvttq_m_f32_f16v4sf, mve_vmlaldavq_p_<supf><mode>)
17375 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
17376 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>)
17377 (mve_vmvnq_m_n_<supf><mode>, mve_vorrq_m_n_<supf><mode>)
17378 (mve_vpselq_f<mode>, mve_vrev32q_m_fv8hf)
17379 (mve_vrev32q_m_<supf><mode>, mve_vrev64q_m_f<mode>)
17380 (mve_vrmlaldavhaxq_sv4si, mve_vrmlaldavhxq_p_sv4si)
17381 (mve_vrmlsldavhaxq_sv4si, mve_vrmlsldavhq_p_sv4si)
17382 (mve_vrmlsldavhxq_p_sv4si, mve_vrev16q_m_<supf>v16qi)
17383 (mve_vrmlaldavhq_p_<supf>v4si, mve_vrmlsldavhaq_sv4si)
17384 (mve_vandq_m_<supf><mode>, mve_vbicq_m_<supf><mode>)
17385 (mve_veorq_m_<supf><mode>, mve_vornq_m_<supf><mode>)
17386 (mve_vorrq_m_<supf><mode>, mve_vandq_m_f<mode>)
17387 (mve_vbicq_m_f<mode>, mve_veorq_m_f<mode>, mve_vornq_m_f<mode>)
17388 (mve_vorrq_m_f<mode>)
17389 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn)
17390 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn)
17391 (mve_vstrdq_scatter_base_wb_p_<supf>v2di) : Fix spacing and
17392 capitalization in the emitted asm.
17394 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
17396 * config/arm/constraints.md (mve_vldrd_immediate): Move it to
17398 (Ri): Move constraint definition from predicates.md.
17399 (Rl): Define new constraint.
17400 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Add
17401 missing constraint.
17402 (mve_vstrwq_scatter_base_wb_p_fv4sf): Add missing Up constraint
17403 for op 1, use mve_vstrw_immediate predicate and Rl constraint for
17404 op 2. Fix asm output spacing.
17405 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Add missing constraint.
17406 * config/arm/predicates.md (Ri) Move constraint to constraints.md
17407 (mve_vldrd_immediate): Move it from
17409 (mve_vstrw_immediate): New predicate.
17411 2023-05-18 Pan Li <pan2.li@intel.com>
17412 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
17413 Kito Cheng <kito.cheng@sifive.com>
17414 Richard Biener <rguenther@suse.de>
17415 Richard Sandiford <richard.sandiford@arm.com>
17417 * combine.cc (struct reg_stat_type): Extend machine_mode to 16 bits.
17418 * cse.cc (struct qty_table_elem): Extend machine_mode to 16 bits
17419 (struct table_elt): Extend machine_mode to 16 bits.
17420 (struct set): Ditto.
17421 * genmodes.cc (emit_mode_wider): Extend type from char to short.
17422 (emit_mode_complex): Ditto.
17423 (emit_mode_inner): Ditto.
17424 (emit_class_narrowest_mode): Ditto.
17425 * genopinit.cc (main): Extend the machine_mode limit.
17426 * ira-int.h (struct ira_allocno): Extend machine_mode to 16 bits and
17427 re-ordered the struct fields for padding.
17428 * machmode.h (MACHINE_MODE_BITSIZE): New macro.
17429 (GET_MODE_2XWIDER_MODE): Extend type from char to short.
17430 (get_mode_alignment): Extend type from char to short.
17431 * ree.cc (struct ext_modified): Extend machine_mode to 16 bits and
17432 removed the ATTRIBUTE_PACKED.
17433 * rtl-ssa/accesses.h: Extend machine_mode to 16 bits, narrow
17434 * rtl-ssa/internals.inl (rtl_ssa::access_info): Adjust the assignment.
17435 m_kind to 2 bits and remove m_spare.
17436 * rtl.h (RTX_CODE_BITSIZE): New macro.
17437 (struct rtx_def): Swap both the bit size and location between the
17438 rtx_code and the machine_mode.
17439 (subreg_shape::unique_id): Extend the machine_mode limit.
17440 * rtlanal.h: Extend machine_mode to 16 bits.
17441 * tree-core.h (struct tree_type_common): Extend machine_mode to 16
17442 bits and re-ordered the struct fields for padding.
17443 (struct tree_decl_common): Extend machine_mode to 16 bits.
17445 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
17447 * genrecog.cc (print_nonbool_test): Fix type error of
17448 switch (SUBREG_BYTE (op))'.
17450 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
17452 * common/config/riscv/riscv-common.cc: Remove
17453 trailing spaces on lines.
17454 * config/riscv/riscv.cc (riscv_legitimize_move): Likewise.
17455 * config/riscv/riscv.h (enum reg_class): Likewise.
17456 * config/riscv/riscv.md: Likewise.
17458 2023-05-17 John David Anglin <danglin@gcc.gnu.org>
17460 * config/pa/pa.md (clear_cache): New.
17462 2023-05-17 Arsen Arsenović <arsen@aarsen.me>
17464 * doc/extend.texi (C++ Concepts) <forall>: Remove extraneous
17465 parenthesis. Fix misnamed index entry.
17466 <concept>: Fix misnamed index entry.
17468 2023-05-17 Jivan Hakobyan <jivanhakobyan9@gmail.com>
17470 * config/riscv/riscv.md (*<optab><GPR:mode>3_mask): New pattern,
17472 (*<optab>si3_mask, *<optab>di3_mask): Here.
17473 (*<optab>si3_mask_1, *<optab>di3_mask_1): And here.
17474 * config/riscv/bitmanip.md (*<bitmanip_optab><GPR:mode>3_mask): New
17476 (*<bitmanip_optab>si3_sext_mask): Likewise.
17477 * config/riscv/iterators.md (shiftm1): Use const_si_mask_operand
17478 and const_di_mask_operand.
17479 (bitmanip_rotate): New iterator.
17480 (bitmanip_optab): Add rotates.
17481 * config/riscv/predicates.md (const_si_mask_operand): Renamed
17482 from const31_operand. Generalize to handle more mask constants.
17483 (const_di_mask_operand): Similarly.
17485 2023-05-17 Jakub Jelinek <jakub@redhat.com>
17488 * config/i386/i386-builtin-types.def (FLOAT128): Use
17489 float128t_type_node rather than float128_type_node.
17491 2023-05-17 Alexander Monakov <amonakov@ispras.ru>
17493 * tree-ssa-math-opts.cc (convert_mult_to_fma): Enable only for
17494 FP_CONTRACT_FAST (no functional change).
17496 2023-05-17 Uros Bizjak <ubizjak@gmail.com>
17498 * config/i386/i386.cc (ix86_multiplication_cost): Correct
17499 calcuation of integer vector mode costs to reflect generated
17500 instruction sequences of different integer vector modes and
17501 different target ABIs.
17503 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17505 * config/riscv/riscv-opts.h (enum riscv_entity): New enum.
17506 * config/riscv/riscv.cc (riscv_emit_mode_set): New function.
17507 (riscv_mode_needed): Ditto.
17508 (riscv_mode_after): Ditto.
17509 (riscv_mode_entry): Ditto.
17510 (riscv_mode_exit): Ditto.
17511 (riscv_mode_priority): Ditto.
17512 (TARGET_MODE_EMIT): New target hook.
17513 (TARGET_MODE_NEEDED): Ditto.
17514 (TARGET_MODE_AFTER): Ditto.
17515 (TARGET_MODE_ENTRY): Ditto.
17516 (TARGET_MODE_EXIT): Ditto.
17517 (TARGET_MODE_PRIORITY): Ditto.
17518 * config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto.
17519 (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
17520 * config/riscv/riscv.md: Add csrwvxrm.
17521 * config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute.
17522 (vxrmsi): New pattern.
17524 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17526 * config/riscv/riscv-vector-builtins-bases.cc: Introduce rounding mode.
17527 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
17528 (struct narrow_alu_def): Ditto.
17529 * config/riscv/riscv-vector-builtins.cc (function_builder::apply_predication): Ditto.
17530 (function_expander::use_exact_insn): Ditto.
17531 * config/riscv/riscv-vector-builtins.h (function_checker::arg_num): New function.
17532 (function_base::has_rounding_mode_operand_p): New function.
17534 2023-05-17 Andrew Pinski <apinski@marvell.com>
17536 * tree-ssa-forwprop.cc (simplify_builtin_call): Check
17537 against 0 instead of calling integer_zerop.
17539 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17541 * config/riscv/riscv-vector-builtins.cc (register_vxrm): New function.
17542 (DEF_RVV_VXRM_ENUM): New macro.
17543 (handle_pragma_vector): Add vxrm enum register.
17544 * config/riscv/riscv-vector-builtins.def (DEF_RVV_VXRM_ENUM): New macro.
17550 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
17552 * value-range.h (Value_Range::operator=): New.
17554 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
17556 * value-range.cc (vrange::operator=): Add a stub to copy
17557 unsupported ranges.
17558 * value-range.h (is_a <unsupported_range>): New.
17559 (Value_Range::operator=): Support copying unsupported ranges.
17561 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
17563 * data-streamer-in.cc (streamer_read_real_value): New.
17564 (streamer_read_value_range): New.
17565 * data-streamer-out.cc (streamer_write_real_value): New.
17566 (streamer_write_vrange): New.
17567 * data-streamer.h (streamer_write_vrange): New.
17568 (streamer_read_value_range): New.
17570 2023-05-17 Jonathan Wakely <jwakely@redhat.com>
17573 * doc/invoke.texi (Code Gen Options): Note that -fshort-enums
17574 is ignored for a fixed underlying type.
17575 (C++ Dialect Options): Likewise for -fstrict-enums.
17577 2023-05-17 Tobias Burnus <tobias@codesourcery.com>
17579 * gimplify.cc (gimplify_scan_omp_clauses): Remove Fortran
17582 2023-05-17 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
17584 * config/s390/s390.cc (TARGET_ATOMIC_ALIGN_FOR_MODE):
17586 (s390_atomic_align_for_mode): New.
17588 2023-05-17 Jakub Jelinek <jakub@redhat.com>
17590 * wide-int.cc (wi::from_array): Add missing closing paren in function
17593 2023-05-17 Kewen Lin <linkw@linux.ibm.com>
17595 * tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with
17596 suggested unroll factor once the previous analysis fails.
17598 2023-05-17 Pan Li <pan2.li@intel.com>
17600 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): New
17602 (main): Add bool1 to the type indexer.
17603 * config/riscv/riscv-vector-builtins-functions.def
17604 (vreinterpret): Register vbool1 interpret function.
17605 * config/riscv/riscv-vector-builtins-types.def
17606 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
17607 (vint8m1_t): Add the type to bool1_interpret_ops.
17608 (vint16m1_t): Ditto.
17609 (vint32m1_t): Ditto.
17610 (vint64m1_t): Ditto.
17611 (vuint8m1_t): Ditto.
17612 (vuint16m1_t): Ditto.
17613 (vuint32m1_t): Ditto.
17614 (vuint64m1_t): Ditto.
17615 * config/riscv/riscv-vector-builtins.cc
17616 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
17617 (required_extensions_p): Add bool1 interpret case.
17618 * config/riscv/riscv-vector-builtins.def
17619 (bool1_interpret): Add bool1 interpret to base type.
17620 * config/riscv/vector.md (@vreinterpret<mode>): Add new expand
17621 with VB dest for vreinterpret.
17623 2023-05-17 Jiufu Guo <guojiufu@linux.ibm.com>
17626 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Support building
17627 constants through "lis; xoris".
17629 2023-05-16 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
17631 * common/config/rs6000/rs6000-common.cc: Add REE pass as a
17632 default rs6000 target pass for O2 and above.
17633 * doc/invoke.texi: Document -free
17635 2023-05-16 Kito Cheng <kito.cheng@sifive.com>
17637 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
17638 Fix wrong select_kind...
17640 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
17642 * config/s390/s390-protos.h (s390_expand_setmem): Change
17643 function signature.
17644 * config/s390/s390.cc (s390_expand_setmem): For memset's less
17645 than or equal to 256 byte do not perform a libc call.
17646 * config/s390/s390.md: Change expander into a version which
17649 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
17651 * config/s390/s390-protos.h (s390_expand_movmem): New.
17652 * config/s390/s390.cc (s390_expand_movmem): New.
17653 * config/s390/s390.md (movmem<mode>): New.
17657 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
17659 * config/s390/s390-protos.h (s390_expand_cpymem): Change
17660 function signature.
17661 * config/s390/s390.cc (s390_expand_cpymem): For memcpy's less
17662 than or equal to 256 byte do not perform a libc call.
17663 (s390_expand_insv): Adapt new function signature of
17664 s390_expand_cpymem.
17665 * config/s390/s390.md: Change expander into a version which
17668 2023-05-16 Andrew Pinski <apinski@marvell.com>
17670 PR tree-optimization/109424
17671 * match.pd: Add patterns for min/max of zero_one_valued
17674 2023-05-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17676 * config/riscv/riscv-protos.h (enum frm_field_enum): New enum.
17677 * config/riscv/riscv-vector-builtins.cc
17678 (function_expander::use_ternop_insn): Add default rounding mode.
17679 (function_expander::use_widen_ternop_insn): Ditto.
17680 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add FRM REGNUM.
17681 (riscv_hard_regno_mode_ok): Ditto.
17682 (riscv_conditional_register_usage): Ditto.
17683 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
17684 (FRM_REG_P): Ditto.
17685 (RISCV_DWARF_FRM): Ditto.
17686 * config/riscv/riscv.md: Ditto.
17687 * config/riscv/vector-iterators.md: split no frm and has frm operations.
17688 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
17689 (@pred_<optab><mode>): Ditto.
17691 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
17693 PR tree-optimization/109695
17694 * value-range.cc (irange::operator=): Resize range.
17695 (irange::union_): Same.
17696 (irange::intersect): Same.
17697 (irange::invert): Same.
17698 (int_range_max): Default to 3 sub-ranges and resize as needed.
17699 * value-range.h (irange::maybe_resize): New.
17701 (int_range::int_range): Adjust for resizing.
17702 (int_range::operator=): Same.
17704 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
17706 * ipa-cp.cc (ipcp_vr_lattice::meet_with_1): Avoid unnecessary
17708 * value-range.cc (irange::union_nonzero_bits): Return TRUE only
17709 when range changed.
17711 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17713 * config/riscv/riscv-protos.h (enum vxrm_field_enum): New enum.
17714 * config/riscv/riscv-vector-builtins.cc
17715 (function_expander::use_exact_insn): Add default rounding mode operand.
17716 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add VXRM_REGNUM.
17717 (riscv_hard_regno_mode_ok): Ditto.
17718 (riscv_conditional_register_usage): Ditto.
17719 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
17720 (VXRM_REG_P): Ditto.
17721 (RISCV_DWARF_VXRM): Ditto.
17722 * config/riscv/riscv.md: Ditto.
17723 * config/riscv/vector.md: Ditto
17725 2023-05-15 Pan Li <pan2.li@intel.com>
17727 * optabs.cc (maybe_gen_insn): Add case to generate instruction
17728 that has 11 operands.
17730 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17732 * config/aarch64/aarch64.cc (aarch64_rtx_costs, NEG case): Add costing
17733 logic for vector modes.
17735 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17738 * config/aarch64/aarch64-simd.md (aarch64_cm<optab><mode>): Rename to...
17739 (aarch64_cm<optab><mode><vczle><vczbe>): ... This.
17740 (aarch64_cmtst<mode>): Rename to...
17741 (aarch64_cmtst<mode><vczle><vczbe>): ... This.
17742 (*aarch64_cmtst_same_<mode>): Rename to...
17743 (*aarch64_cmtst_same_<mode><vczle><vczbe>): ... This.
17744 (*aarch64_cmtstdi): Rename to...
17745 (*aarch64_cmtstdi<vczle><vczbe>): ... This.
17746 (aarch64_fac<optab><mode>): Rename to...
17747 (aarch64_fac<optab><mode><vczle><vczbe>): ... This.
17749 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17752 * config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>): Rename to...
17753 (aarch64_s<optab><mode><vczle><vczbe>): ... This.
17755 2023-05-15 Pan Li <pan2.li@intel.com>
17756 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17757 kito-cheng <kito.cheng@sifive.com>
17759 * config/riscv/riscv-v.cc (const_vlmax_p): New function for
17760 deciding the mode is constant or not.
17761 (set_len_and_policy): Optimize VLS-VLMAX code gen to vsetivli.
17763 2023-05-15 Richard Biener <rguenther@suse.de>
17765 PR tree-optimization/109848
17766 * tree-ssa-forwprop.cc (pass_forwprop::execute): Put the
17767 TARGET_MEM_REF address preparation before the store, not
17770 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17772 * config/riscv/riscv.cc
17773 (riscv_vectorize_preferred_vector_alignment): New function.
17774 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): New target hook.
17776 2023-05-14 Andrew Pinski <apinski@marvell.com>
17778 PR tree-optimization/109829
17779 * match.pd: Add pattern for `signbit(x) !=/== 0 ? x : -x`.
17781 2023-05-14 Uros Bizjak <ubizjak@gmail.com>
17784 * config/i386/i386.cc: Revert the 2023-05-11 change.
17785 (ix86_widen_mult_cost): Return high value instead of
17786 ICEing for unsupported modes.
17788 2023-05-14 Ard Biesheuvel <ardb@kernel.org>
17790 * config/i386/i386.cc (x86_function_profiler): Take
17791 ix86_direct_extern_access into account when generating calls
17794 2023-05-14 Pan Li <pan2.li@intel.com>
17796 * config/riscv/riscv-vector-builtins.cc (required_extensions_p):
17797 Refactor the or pattern to switch cases.
17799 2023-05-13 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
17801 * config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback): Rename
17802 aarch64_expand_vector_init to this, and remove interleaving case.
17803 Recursively call aarch64_expand_vector_init_fallback, instead of
17804 aarch64_expand_vector_init.
17805 (aarch64_unzip_vector_init): New function.
17806 (aarch64_expand_vector_init): Likewise.
17808 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
17810 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns):
17811 Pull out function call from the gcc_assert.
17813 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
17815 * config/riscv/riscv-vsetvl.cc (vlmul_to_str): New.
17816 (policy_to_str): New.
17817 (vector_insn_info::dump): Use vlmul_to_str and policy_to_str.
17819 2023-05-13 Andrew Pinski <apinski@marvell.com>
17821 PR tree-optimization/109834
17822 * match.pd (popcount(bswap(x))->popcount(x)): Fix up unsigned type checking.
17823 (popcount(rotate(x,y))->popcount(x)): Likewise.
17825 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
17827 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also
17828 reject ymm instructions for TARGET_PREFER_AVX128. Use generic
17829 gen_extend_insn to generate zero/sign extension instructions.
17831 (ix86_expand_vecop_qihi): Initialize interleave functions
17832 for MULT code only. Fix comments.
17834 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
17837 * config/i386/mmx.md (mulv2si3): Remove expander.
17838 (mulv2si3): Rename insn pattern from *mulv2si.
17840 2023-05-12 Tobias Burnus <tobias@codesourcery.com>
17842 PR libstdc++/109816
17843 * lto-cgraph.cc (output_symtab): Guard lto_output_toplevel_asms by
17844 '!lto_stream_offload_p'.
17846 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
17847 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17850 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vsetvl_at_end): New.
17851 (local_avl_compatible_p): New.
17852 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance local optimizations
17853 for LCM, rewrite as a backward algorithm.
17854 (pass_vsetvl::cleanup_insns): Use new local_eliminate_vsetvl_insn
17855 interface, handle a BB at once.
17857 2023-05-12 Richard Biener <rguenther@suse.de>
17859 PR tree-optimization/64731
17860 * tree-ssa-forwprop.cc (pass_forwprop::execute): Also
17861 handle TARGET_MEM_REF destinations of stores from vector
17864 2023-05-12 Richard Biener <rguenther@suse.de>
17866 PR tree-optimization/109791
17867 * match.pd (minus (convert ADDR_EXPR@0) (convert (pointer_plus @1 @2))):
17869 (minus (convert (pointer_plus @1 @2)) (convert ADDR_EXPR@0)):
17872 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17874 * config/arm/arm-mve-builtins-base.cc (vsriq): New.
17875 * config/arm/arm-mve-builtins-base.def (vsriq): New.
17876 * config/arm/arm-mve-builtins-base.h (vsriq): New.
17877 * config/arm/arm-mve-builtins.cc
17878 (function_instance::has_inactive_argument): Handle vsriq.
17879 * config/arm/arm_mve.h (vsriq): Remove.
17881 (vsriq_n_u8): Remove.
17882 (vsriq_n_s8): Remove.
17883 (vsriq_n_u16): Remove.
17884 (vsriq_n_s16): Remove.
17885 (vsriq_n_u32): Remove.
17886 (vsriq_n_s32): Remove.
17887 (vsriq_m_n_s8): Remove.
17888 (vsriq_m_n_u8): Remove.
17889 (vsriq_m_n_s16): Remove.
17890 (vsriq_m_n_u16): Remove.
17891 (vsriq_m_n_s32): Remove.
17892 (vsriq_m_n_u32): Remove.
17893 (__arm_vsriq_n_u8): Remove.
17894 (__arm_vsriq_n_s8): Remove.
17895 (__arm_vsriq_n_u16): Remove.
17896 (__arm_vsriq_n_s16): Remove.
17897 (__arm_vsriq_n_u32): Remove.
17898 (__arm_vsriq_n_s32): Remove.
17899 (__arm_vsriq_m_n_s8): Remove.
17900 (__arm_vsriq_m_n_u8): Remove.
17901 (__arm_vsriq_m_n_s16): Remove.
17902 (__arm_vsriq_m_n_u16): Remove.
17903 (__arm_vsriq_m_n_s32): Remove.
17904 (__arm_vsriq_m_n_u32): Remove.
17905 (__arm_vsriq): Remove.
17906 (__arm_vsriq_m): Remove.
17908 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17910 * config/arm/iterators.md (mve_insn): Add vsri.
17911 * config/arm/mve.md (mve_vsriq_n_<supf><mode>): Rename into ...
17912 (@mve_<mve_insn>q_n_<supf><mode>): .,. this.
17913 (mve_vsriq_m_n_<supf><mode>): Rename into ...
17914 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
17916 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17918 * config/arm/arm-mve-builtins-shapes.cc (ternary_rshift): New.
17919 * config/arm/arm-mve-builtins-shapes.h (ternary_rshift): New.
17921 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17923 * config/arm/arm-mve-builtins-base.cc (vsliq): New.
17924 * config/arm/arm-mve-builtins-base.def (vsliq): New.
17925 * config/arm/arm-mve-builtins-base.h (vsliq): New.
17926 * config/arm/arm-mve-builtins.cc
17927 (function_instance::has_inactive_argument): Handle vsliq.
17928 * config/arm/arm_mve.h (vsliq): Remove.
17930 (vsliq_n_u8): Remove.
17931 (vsliq_n_s8): Remove.
17932 (vsliq_n_u16): Remove.
17933 (vsliq_n_s16): Remove.
17934 (vsliq_n_u32): Remove.
17935 (vsliq_n_s32): Remove.
17936 (vsliq_m_n_s8): Remove.
17937 (vsliq_m_n_s32): Remove.
17938 (vsliq_m_n_s16): Remove.
17939 (vsliq_m_n_u8): Remove.
17940 (vsliq_m_n_u32): Remove.
17941 (vsliq_m_n_u16): Remove.
17942 (__arm_vsliq_n_u8): Remove.
17943 (__arm_vsliq_n_s8): Remove.
17944 (__arm_vsliq_n_u16): Remove.
17945 (__arm_vsliq_n_s16): Remove.
17946 (__arm_vsliq_n_u32): Remove.
17947 (__arm_vsliq_n_s32): Remove.
17948 (__arm_vsliq_m_n_s8): Remove.
17949 (__arm_vsliq_m_n_s32): Remove.
17950 (__arm_vsliq_m_n_s16): Remove.
17951 (__arm_vsliq_m_n_u8): Remove.
17952 (__arm_vsliq_m_n_u32): Remove.
17953 (__arm_vsliq_m_n_u16): Remove.
17954 (__arm_vsliq): Remove.
17955 (__arm_vsliq_m): Remove.
17957 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17959 * config/arm/iterators.md (mve_insn>): Add vsli.
17960 * config/arm/mve.md (mve_vsliq_n_<supf><mode>): Rename into ...
17961 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
17962 (mve_vsliq_m_n_<supf><mode>): Rename into ...
17963 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
17965 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17967 * config/arm/arm-mve-builtins-shapes.cc (ternary_lshift): New.
17968 * config/arm/arm-mve-builtins-shapes.h (ternary_lshift): New.
17970 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17972 * config/arm/arm-mve-builtins-base.cc (vpselq): New.
17973 * config/arm/arm-mve-builtins-base.def (vpselq): New.
17974 * config/arm/arm-mve-builtins-base.h (vpselq): New.
17975 * config/arm/arm_mve.h (vpselq): Remove.
17976 (vpselq_u8): Remove.
17977 (vpselq_s8): Remove.
17978 (vpselq_u16): Remove.
17979 (vpselq_s16): Remove.
17980 (vpselq_u32): Remove.
17981 (vpselq_s32): Remove.
17982 (vpselq_u64): Remove.
17983 (vpselq_s64): Remove.
17984 (vpselq_f16): Remove.
17985 (vpselq_f32): Remove.
17986 (__arm_vpselq_u8): Remove.
17987 (__arm_vpselq_s8): Remove.
17988 (__arm_vpselq_u16): Remove.
17989 (__arm_vpselq_s16): Remove.
17990 (__arm_vpselq_u32): Remove.
17991 (__arm_vpselq_s32): Remove.
17992 (__arm_vpselq_u64): Remove.
17993 (__arm_vpselq_s64): Remove.
17994 (__arm_vpselq_f16): Remove.
17995 (__arm_vpselq_f32): Remove.
17996 (__arm_vpselq): Remove.
17998 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
18000 * config/arm/arm-mve-builtins-shapes.cc (vpsel): New.
18001 * config/arm/arm-mve-builtins-shapes.h (vpsel): New.
18003 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
18005 * config/arm/arm.cc (arm_expand_vcond): Use gen_mve_q instead of
18007 * config/arm/iterators.md (MVE_VPSELQ_F): New.
18008 (mve_insn): Add vpsel.
18009 * config/arm/mve.md (@mve_vpselq_<supf><mode>): Rename into ...
18010 (@mve_<mve_insn>q_<supf><mode>): ... this.
18011 (@mve_vpselq_f<mode>): Rename into ...
18012 (@mve_<mve_insn>q_f<mode>): ... this.
18014 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
18016 * config/arm/arm-mve-builtins-base.cc (vfmaq, vfmasq, vfmsq): New.
18017 * config/arm/arm-mve-builtins-base.def (vfmaq, vfmasq, vfmsq): New.
18018 * config/arm/arm-mve-builtins-base.h (vfmaq, vfmasq, vfmsq): New.
18019 * config/arm/arm-mve-builtins.cc
18020 (function_instance::has_inactive_argument): Handle vfmaq, vfmasq,
18022 * config/arm/arm_mve.h (vfmaq): Remove.
18026 (vfmasq_m): Remove.
18028 (vfmaq_f16): Remove.
18029 (vfmaq_n_f16): Remove.
18030 (vfmasq_n_f16): Remove.
18031 (vfmsq_f16): Remove.
18032 (vfmaq_f32): Remove.
18033 (vfmaq_n_f32): Remove.
18034 (vfmasq_n_f32): Remove.
18035 (vfmsq_f32): Remove.
18036 (vfmaq_m_f32): Remove.
18037 (vfmaq_m_f16): Remove.
18038 (vfmaq_m_n_f32): Remove.
18039 (vfmaq_m_n_f16): Remove.
18040 (vfmasq_m_n_f32): Remove.
18041 (vfmasq_m_n_f16): Remove.
18042 (vfmsq_m_f32): Remove.
18043 (vfmsq_m_f16): Remove.
18044 (__arm_vfmaq_f16): Remove.
18045 (__arm_vfmaq_n_f16): Remove.
18046 (__arm_vfmasq_n_f16): Remove.
18047 (__arm_vfmsq_f16): Remove.
18048 (__arm_vfmaq_f32): Remove.
18049 (__arm_vfmaq_n_f32): Remove.
18050 (__arm_vfmasq_n_f32): Remove.
18051 (__arm_vfmsq_f32): Remove.
18052 (__arm_vfmaq_m_f32): Remove.
18053 (__arm_vfmaq_m_f16): Remove.
18054 (__arm_vfmaq_m_n_f32): Remove.
18055 (__arm_vfmaq_m_n_f16): Remove.
18056 (__arm_vfmasq_m_n_f32): Remove.
18057 (__arm_vfmasq_m_n_f16): Remove.
18058 (__arm_vfmsq_m_f32): Remove.
18059 (__arm_vfmsq_m_f16): Remove.
18060 (__arm_vfmaq): Remove.
18061 (__arm_vfmasq): Remove.
18062 (__arm_vfmsq): Remove.
18063 (__arm_vfmaq_m): Remove.
18064 (__arm_vfmasq_m): Remove.
18065 (__arm_vfmsq_m): Remove.
18067 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
18069 * config/arm/iterators.md (MVE_FP_M_BINARY): Add VFMAQ_M_F,
18071 (MVE_FP_M_N_BINARY): Add VFMAQ_M_N_F, VFMASQ_M_N_F.
18072 (MVE_VFMxQ_F, MVE_VFMAxQ_N_F): New.
18073 (mve_insn): Add vfma, vfmas, vfms.
18074 * config/arm/mve.md (mve_vfmaq_f<mode>, mve_vfmsq_f<mode>): Merge
18076 (@mve_<mve_insn>q_f<mode>): ... this.
18077 (mve_vfmaq_n_f<mode>, mve_vfmasq_n_f<mode>): Merge into ...
18078 (@mve_<mve_insn>q_n_f<mode>): ... this.
18079 (mve_vfmaq_m_f<mode>, mve_vfmsq_m_f<mode>): Merge into
18080 @mve_<mve_insn>q_m_f<mode>.
18081 (mve_vfmaq_m_n_f<mode>, mve_vfmasq_m_n_f<mode>): Merge into
18082 @mve_<mve_insn>q_m_n_f<mode>.
18084 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
18086 * config/arm/arm-mve-builtins-shapes.cc (ternary_opt_n): New.
18087 * config/arm/arm-mve-builtins-shapes.h (ternary_opt_n): New.
18089 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
18091 * config/arm/arm-mve-builtins-base.cc
18092 (FUNCTION_WITH_RTX_M_N_NO_F): New.
18094 * config/arm/arm-mve-builtins-base.def (vmvnq): New.
18095 * config/arm/arm-mve-builtins-base.h (vmvnq): New.
18096 * config/arm/arm_mve.h (vmvnq): Remove.
18099 (vmvnq_s8): Remove.
18100 (vmvnq_s16): Remove.
18101 (vmvnq_s32): Remove.
18102 (vmvnq_n_s16): Remove.
18103 (vmvnq_n_s32): Remove.
18104 (vmvnq_u8): Remove.
18105 (vmvnq_u16): Remove.
18106 (vmvnq_u32): Remove.
18107 (vmvnq_n_u16): Remove.
18108 (vmvnq_n_u32): Remove.
18109 (vmvnq_m_u8): Remove.
18110 (vmvnq_m_s8): Remove.
18111 (vmvnq_m_u16): Remove.
18112 (vmvnq_m_s16): Remove.
18113 (vmvnq_m_u32): Remove.
18114 (vmvnq_m_s32): Remove.
18115 (vmvnq_m_n_s16): Remove.
18116 (vmvnq_m_n_u16): Remove.
18117 (vmvnq_m_n_s32): Remove.
18118 (vmvnq_m_n_u32): Remove.
18119 (vmvnq_x_s8): Remove.
18120 (vmvnq_x_s16): Remove.
18121 (vmvnq_x_s32): Remove.
18122 (vmvnq_x_u8): Remove.
18123 (vmvnq_x_u16): Remove.
18124 (vmvnq_x_u32): Remove.
18125 (vmvnq_x_n_s16): Remove.
18126 (vmvnq_x_n_s32): Remove.
18127 (vmvnq_x_n_u16): Remove.
18128 (vmvnq_x_n_u32): Remove.
18129 (__arm_vmvnq_s8): Remove.
18130 (__arm_vmvnq_s16): Remove.
18131 (__arm_vmvnq_s32): Remove.
18132 (__arm_vmvnq_n_s16): Remove.
18133 (__arm_vmvnq_n_s32): Remove.
18134 (__arm_vmvnq_u8): Remove.
18135 (__arm_vmvnq_u16): Remove.
18136 (__arm_vmvnq_u32): Remove.
18137 (__arm_vmvnq_n_u16): Remove.
18138 (__arm_vmvnq_n_u32): Remove.
18139 (__arm_vmvnq_m_u8): Remove.
18140 (__arm_vmvnq_m_s8): Remove.
18141 (__arm_vmvnq_m_u16): Remove.
18142 (__arm_vmvnq_m_s16): Remove.
18143 (__arm_vmvnq_m_u32): Remove.
18144 (__arm_vmvnq_m_s32): Remove.
18145 (__arm_vmvnq_m_n_s16): Remove.
18146 (__arm_vmvnq_m_n_u16): Remove.
18147 (__arm_vmvnq_m_n_s32): Remove.
18148 (__arm_vmvnq_m_n_u32): Remove.
18149 (__arm_vmvnq_x_s8): Remove.
18150 (__arm_vmvnq_x_s16): Remove.
18151 (__arm_vmvnq_x_s32): Remove.
18152 (__arm_vmvnq_x_u8): Remove.
18153 (__arm_vmvnq_x_u16): Remove.
18154 (__arm_vmvnq_x_u32): Remove.
18155 (__arm_vmvnq_x_n_s16): Remove.
18156 (__arm_vmvnq_x_n_s32): Remove.
18157 (__arm_vmvnq_x_n_u16): Remove.
18158 (__arm_vmvnq_x_n_u32): Remove.
18159 (__arm_vmvnq): Remove.
18160 (__arm_vmvnq_m): Remove.
18161 (__arm_vmvnq_x): Remove.
18163 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
18165 * config/arm/iterators.md (mve_insn): Add vmvn.
18166 * config/arm/mve.md (mve_vmvnq_n_<supf><mode>): Rename into ...
18167 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
18168 (mve_vmvnq_m_<supf><mode>): Rename into ...
18169 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
18170 (mve_vmvnq_m_n_<supf><mode>): Rename into ...
18171 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
18173 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
18175 * config/arm/arm-mve-builtins-shapes.cc (mvn): New.
18176 * config/arm/arm-mve-builtins-shapes.h (mvn): New.
18178 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
18180 * config/arm/arm-mve-builtins-base.cc (vbrsrq): New.
18181 * config/arm/arm-mve-builtins-base.def (vbrsrq): New.
18182 * config/arm/arm-mve-builtins-base.h (vbrsrq): New.
18183 * config/arm/arm_mve.h (vbrsrq): Remove.
18184 (vbrsrq_m): Remove.
18185 (vbrsrq_x): Remove.
18186 (vbrsrq_n_f16): Remove.
18187 (vbrsrq_n_f32): Remove.
18188 (vbrsrq_n_u8): Remove.
18189 (vbrsrq_n_s8): Remove.
18190 (vbrsrq_n_u16): Remove.
18191 (vbrsrq_n_s16): Remove.
18192 (vbrsrq_n_u32): Remove.
18193 (vbrsrq_n_s32): Remove.
18194 (vbrsrq_m_n_s8): Remove.
18195 (vbrsrq_m_n_s32): Remove.
18196 (vbrsrq_m_n_s16): Remove.
18197 (vbrsrq_m_n_u8): Remove.
18198 (vbrsrq_m_n_u32): Remove.
18199 (vbrsrq_m_n_u16): Remove.
18200 (vbrsrq_m_n_f32): Remove.
18201 (vbrsrq_m_n_f16): Remove.
18202 (vbrsrq_x_n_s8): Remove.
18203 (vbrsrq_x_n_s16): Remove.
18204 (vbrsrq_x_n_s32): Remove.
18205 (vbrsrq_x_n_u8): Remove.
18206 (vbrsrq_x_n_u16): Remove.
18207 (vbrsrq_x_n_u32): Remove.
18208 (vbrsrq_x_n_f16): Remove.
18209 (vbrsrq_x_n_f32): Remove.
18210 (__arm_vbrsrq_n_u8): Remove.
18211 (__arm_vbrsrq_n_s8): Remove.
18212 (__arm_vbrsrq_n_u16): Remove.
18213 (__arm_vbrsrq_n_s16): Remove.
18214 (__arm_vbrsrq_n_u32): Remove.
18215 (__arm_vbrsrq_n_s32): Remove.
18216 (__arm_vbrsrq_m_n_s8): Remove.
18217 (__arm_vbrsrq_m_n_s32): Remove.
18218 (__arm_vbrsrq_m_n_s16): Remove.
18219 (__arm_vbrsrq_m_n_u8): Remove.
18220 (__arm_vbrsrq_m_n_u32): Remove.
18221 (__arm_vbrsrq_m_n_u16): Remove.
18222 (__arm_vbrsrq_x_n_s8): Remove.
18223 (__arm_vbrsrq_x_n_s16): Remove.
18224 (__arm_vbrsrq_x_n_s32): Remove.
18225 (__arm_vbrsrq_x_n_u8): Remove.
18226 (__arm_vbrsrq_x_n_u16): Remove.
18227 (__arm_vbrsrq_x_n_u32): Remove.
18228 (__arm_vbrsrq_n_f16): Remove.
18229 (__arm_vbrsrq_n_f32): Remove.
18230 (__arm_vbrsrq_m_n_f32): Remove.
18231 (__arm_vbrsrq_m_n_f16): Remove.
18232 (__arm_vbrsrq_x_n_f16): Remove.
18233 (__arm_vbrsrq_x_n_f32): Remove.
18234 (__arm_vbrsrq): Remove.
18235 (__arm_vbrsrq_m): Remove.
18236 (__arm_vbrsrq_x): Remove.
18238 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
18240 * config/arm/iterators.md (MVE_VBRSR_M_N_FP, MVE_VBRSR_N_FP): New.
18241 (mve_insn): Add vbrsr.
18242 * config/arm/mve.md (mve_vbrsrq_n_f<mode>): Rename into ...
18243 (@mve_<mve_insn>q_n_f<mode>): ... this.
18244 (mve_vbrsrq_n_<supf><mode>): Rename into ...
18245 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
18246 (mve_vbrsrq_m_n_<supf><mode>): Rename into ...
18247 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
18248 (mve_vbrsrq_m_n_f<mode>): Rename into ...
18249 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
18251 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
18253 * config/arm/arm-mve-builtins-shapes.cc (binary_imm32): New.
18254 * config/arm/arm-mve-builtins-shapes.h (binary_imm32): New.
18256 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
18258 * config/arm/arm-mve-builtins-base.cc (vqshluq): New.
18259 * config/arm/arm-mve-builtins-base.def (vqshluq): New.
18260 * config/arm/arm-mve-builtins-base.h (vqshluq): New.
18261 * config/arm/arm_mve.h (vqshluq): Remove.
18262 (vqshluq_m): Remove.
18263 (vqshluq_n_s8): Remove.
18264 (vqshluq_n_s16): Remove.
18265 (vqshluq_n_s32): Remove.
18266 (vqshluq_m_n_s8): Remove.
18267 (vqshluq_m_n_s16): Remove.
18268 (vqshluq_m_n_s32): Remove.
18269 (__arm_vqshluq_n_s8): Remove.
18270 (__arm_vqshluq_n_s16): Remove.
18271 (__arm_vqshluq_n_s32): Remove.
18272 (__arm_vqshluq_m_n_s8): Remove.
18273 (__arm_vqshluq_m_n_s16): Remove.
18274 (__arm_vqshluq_m_n_s32): Remove.
18275 (__arm_vqshluq): Remove.
18276 (__arm_vqshluq_m): Remove.
18278 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
18280 * config/arm/iterators.md (mve_insn): Add vqshlu.
18281 (supf): Add VQSHLUQ_M_N_S, VQSHLUQ_N_S.
18282 (VQSHLUQ_M_N, VQSHLUQ_N): New.
18283 * config/arm/mve.md (mve_vqshluq_n_s<mode>): Change name into ...
18284 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
18285 (mve_vqshluq_m_n_s<mode>): Change name into ...
18286 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
18288 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
18290 * config/arm/arm-mve-builtins-shapes.cc
18291 (binary_lshift_unsigned): New.
18292 * config/arm/arm-mve-builtins-shapes.h
18293 (binary_lshift_unsigned): New.
18295 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
18297 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhaq)
18298 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
18299 * config/arm/arm-mve-builtins-base.def (vrmlaldavhaq)
18300 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
18301 * config/arm/arm-mve-builtins-base.h (vrmlaldavhaq)
18302 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
18303 * config/arm/arm-mve-builtins-functions.h: Handle vrmlaldavhaq,
18304 vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq.
18305 * config/arm/arm_mve.h (vrmlaldavhaq): Remove.
18306 (vrmlaldavhaxq): Remove.
18307 (vrmlsldavhaq): Remove.
18308 (vrmlsldavhaxq): Remove.
18309 (vrmlaldavhaq_p): Remove.
18310 (vrmlaldavhaxq_p): Remove.
18311 (vrmlsldavhaq_p): Remove.
18312 (vrmlsldavhaxq_p): Remove.
18313 (vrmlaldavhaq_s32): Remove.
18314 (vrmlaldavhaq_u32): Remove.
18315 (vrmlaldavhaxq_s32): Remove.
18316 (vrmlsldavhaq_s32): Remove.
18317 (vrmlsldavhaxq_s32): Remove.
18318 (vrmlaldavhaq_p_s32): Remove.
18319 (vrmlaldavhaq_p_u32): Remove.
18320 (vrmlaldavhaxq_p_s32): Remove.
18321 (vrmlsldavhaq_p_s32): Remove.
18322 (vrmlsldavhaxq_p_s32): Remove.
18323 (__arm_vrmlaldavhaq_s32): Remove.
18324 (__arm_vrmlaldavhaq_u32): Remove.
18325 (__arm_vrmlaldavhaxq_s32): Remove.
18326 (__arm_vrmlsldavhaq_s32): Remove.
18327 (__arm_vrmlsldavhaxq_s32): Remove.
18328 (__arm_vrmlaldavhaq_p_s32): Remove.
18329 (__arm_vrmlaldavhaq_p_u32): Remove.
18330 (__arm_vrmlaldavhaxq_p_s32): Remove.
18331 (__arm_vrmlsldavhaq_p_s32): Remove.
18332 (__arm_vrmlsldavhaxq_p_s32): Remove.
18333 (__arm_vrmlaldavhaq): Remove.
18334 (__arm_vrmlaldavhaxq): Remove.
18335 (__arm_vrmlsldavhaq): Remove.
18336 (__arm_vrmlsldavhaxq): Remove.
18337 (__arm_vrmlaldavhaq_p): Remove.
18338 (__arm_vrmlaldavhaxq_p): Remove.
18339 (__arm_vrmlsldavhaq_p): Remove.
18340 (__arm_vrmlsldavhaxq_p): Remove.
18342 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
18344 * config/arm/iterators.md (MVE_VRMLxLDAVHAxQ)
18345 (MVE_VRMLxLDAVHAxQ_P): New.
18346 (mve_insn): Add vrmlaldavha, vrmlaldavhax, vrmlsldavha,
18348 (supf): Add VRMLALDAVHAXQ_P_S, VRMLALDAVHAXQ_S, VRMLSLDAVHAQ_P_S,
18349 VRMLSLDAVHAQ_S, VRMLSLDAVHAXQ_P_S, VRMLSLDAVHAXQ_S,
18351 * config/arm/mve.md (mve_vrmlaldavhaq_<supf>v4si)
18352 (mve_vrmlaldavhaxq_sv4si, mve_vrmlsldavhaxq_sv4si)
18353 (mve_vrmlsldavhaq_sv4si): Merge into ...
18354 (@mve_<mve_insn>q_<supf>v4si): ... this.
18355 (mve_vrmlaldavhaq_p_sv4si, mve_vrmlaldavhaq_p_uv4si)
18356 (mve_vrmlaldavhaxq_p_sv4si, mve_vrmlsldavhaq_p_sv4si)
18357 (mve_vrmlsldavhaxq_p_sv4si): Merge into ...
18358 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
18360 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
18362 * config/arm/arm-mve-builtins-base.cc (vqdmullbq, vqdmulltq): New.
18363 * config/arm/arm-mve-builtins-base.def (vqdmullbq, vqdmulltq):
18365 * config/arm/arm-mve-builtins-base.h (vqdmullbq, vqdmulltq): New.
18366 * config/arm/arm_mve.h (vqdmulltq): Remove.
18367 (vqdmullbq): Remove.
18368 (vqdmullbq_m): Remove.
18369 (vqdmulltq_m): Remove.
18370 (vqdmulltq_s16): Remove.
18371 (vqdmulltq_n_s16): Remove.
18372 (vqdmullbq_s16): Remove.
18373 (vqdmullbq_n_s16): Remove.
18374 (vqdmulltq_s32): Remove.
18375 (vqdmulltq_n_s32): Remove.
18376 (vqdmullbq_s32): Remove.
18377 (vqdmullbq_n_s32): Remove.
18378 (vqdmullbq_m_n_s32): Remove.
18379 (vqdmullbq_m_n_s16): Remove.
18380 (vqdmullbq_m_s32): Remove.
18381 (vqdmullbq_m_s16): Remove.
18382 (vqdmulltq_m_n_s32): Remove.
18383 (vqdmulltq_m_n_s16): Remove.
18384 (vqdmulltq_m_s32): Remove.
18385 (vqdmulltq_m_s16): Remove.
18386 (__arm_vqdmulltq_s16): Remove.
18387 (__arm_vqdmulltq_n_s16): Remove.
18388 (__arm_vqdmullbq_s16): Remove.
18389 (__arm_vqdmullbq_n_s16): Remove.
18390 (__arm_vqdmulltq_s32): Remove.
18391 (__arm_vqdmulltq_n_s32): Remove.
18392 (__arm_vqdmullbq_s32): Remove.
18393 (__arm_vqdmullbq_n_s32): Remove.
18394 (__arm_vqdmullbq_m_n_s32): Remove.
18395 (__arm_vqdmullbq_m_n_s16): Remove.
18396 (__arm_vqdmullbq_m_s32): Remove.
18397 (__arm_vqdmullbq_m_s16): Remove.
18398 (__arm_vqdmulltq_m_n_s32): Remove.
18399 (__arm_vqdmulltq_m_n_s16): Remove.
18400 (__arm_vqdmulltq_m_s32): Remove.
18401 (__arm_vqdmulltq_m_s16): Remove.
18402 (__arm_vqdmulltq): Remove.
18403 (__arm_vqdmullbq): Remove.
18404 (__arm_vqdmullbq_m): Remove.
18405 (__arm_vqdmulltq_m): Remove.
18407 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
18409 * config/arm/iterators.md (MVE_VQDMULLxQ, MVE_VQDMULLxQ_M)
18410 (MVE_VQDMULLxQ_M_N, MVE_VQDMULLxQ_N): New.
18411 (mve_insn): Add vqdmullb, vqdmullt.
18412 (supf): Add VQDMULLBQ_S, VQDMULLBQ_M_S, VQDMULLBQ_M_N_S,
18413 VQDMULLBQ_N_S, VQDMULLTQ_S, VQDMULLTQ_M_S, VQDMULLTQ_M_N_S,
18415 * config/arm/mve.md (mve_vqdmullbq_n_s<mode>)
18416 (mve_vqdmulltq_n_s<mode>): Merge into ...
18417 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
18418 (mve_vqdmullbq_s<mode>, mve_vqdmulltq_s<mode>): Merge into ...
18419 (@mve_<mve_insn>q_<supf><mode>): ... this.
18420 (mve_vqdmullbq_m_n_s<mode>, mve_vqdmulltq_m_n_s<mode>): Merge into
18422 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
18423 (mve_vqdmullbq_m_s<mode>, mve_vqdmulltq_m_s<mode>): Merge into ...
18424 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
18426 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
18428 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_opt_n): New.
18429 * config/arm/arm-mve-builtins-shapes.h (binary_widen_opt_n): New.
18431 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
18433 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi):
18434 Drop unused parameter.
18435 (riscv_select_multilib): Ditto.
18436 (riscv_compute_multilib): Update call site of
18437 riscv_select_multilib_by_abi and riscv_select_multilib_by_abi.
18439 2023-05-12 Juzhe Zhong <juzhe.zhong@rivai.ai>
18441 * config/riscv/autovec.md (vec_init<mode><vel>): New pattern.
18442 * config/riscv/riscv-protos.h (expand_vec_init): New function.
18443 * config/riscv/riscv-v.cc (class rvv_builder): New class.
18444 (rvv_builder::can_duplicate_repeating_sequence_p): New function.
18445 (rvv_builder::get_merged_repeating_sequence): Ditto.
18446 (expand_vector_init_insert_elems): Ditto.
18447 (expand_vec_init): Ditto.
18448 * config/riscv/vector-iterators.md: New attribute.
18450 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
18452 * config/rs6000/rs6000-builtins.def
18453 (__builtin_vsx_scalar_insert_exp): Replace bif-pattern from xsiexpdp
18455 (__builtin_vsx_scalar_insert_exp_dp): Replace bif-pattern from
18456 xsiexpdpf to xsiexpdpf_di.
18457 * config/rs6000/vsx.md (xsiexpdp): Rename to...
18458 (xsiexpdp_<mode>): ..., set the mode of second operand to GPR and
18459 replace TARGET_64BIT with TARGET_POWERPC64.
18460 (xsiexpdpf): Rename to...
18461 (xsiexpdpf_<mode>): ..., set the mode of second operand to GPR and
18462 replace TARGET_64BIT with TARGET_POWERPC64.
18464 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
18466 * config/rs6000/rs6000-builtins.def
18467 (__builtin_vsx_scalar_extract_sig): Set return type to const signed
18469 * config/rs6000/vsx.md (xsxsigdp): Replace TARGET_64BIT with
18472 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
18474 * config/rs6000/rs6000-builtins.def
18475 (__builtin_vsx_scalar_extract_exp): Set return type to const signed
18476 int and set its bif-pattern to xsxexpdp_si, move it from power9-64
18478 * config/rs6000/vsx.md (xsxexpdp): Rename to ...
18479 (xsxexpdp_<mode>): ..., set mode of operand 0 to GPR and remove
18480 TARGET_64BIT check.
18481 * doc/extend.texi (scalar_extract_exp): Remove 64-bit environment
18482 requirement when it has a 64-bit argument.
18484 2023-05-12 Pan Li <pan2.li@intel.com>
18485 Richard Sandiford <richard.sandiford@arm.com>
18486 Richard Biener <rguenther@suse.de>
18487 Jakub Jelinek <jakub@redhat.com>
18489 * mux-utils.h: Add overload operator == and != for pointer_mux.
18490 * var-tracking.cc: Included mux-utils.h for pointer_tmux.
18491 (decl_or_value): Changed from void * to pointer_mux<tree_node, rtx_def>.
18492 (dv_is_decl_p): Reconciled to the new type, aka pointer_mux.
18493 (dv_as_decl): Ditto.
18494 (dv_as_opaque): Removed due to unnecessary.
18495 (struct variable_hasher): Take decl_or_value as compare_type.
18496 (variable_hasher::equal): Diito.
18497 (dv_from_decl): Reconciled to the new type, aka pointer_mux.
18498 (dv_from_value): Ditto.
18499 (attrs_list_member): Ditto.
18500 (vars_copy): Ditto.
18501 (var_reg_decl_set): Ditto.
18502 (var_reg_delete_and_set): Ditto.
18503 (find_loc_in_1pdv): Ditto.
18504 (canonicalize_values_star): Ditto.
18505 (variable_post_merge_new_vals): Ditto.
18506 (dump_onepart_variable_differences): Ditto.
18507 (variable_different_p): Ditto.
18508 (set_slot_part): Ditto.
18509 (clobber_slot_part): Ditto.
18510 (clobber_variable_part): Ditto.
18512 2023-05-11 mtsamis <manolis.tsamis@vrull.eu>
18514 * match.pd: simplify vector shift + bit_and + multiply.
18516 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18518 * config/arm/arm-mve-builtins-base.cc (vmlaq, vmlasq, vqdmlahq)
18519 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
18520 * config/arm/arm-mve-builtins-base.def (vmlaq, vmlasq, vqdmlahq)
18521 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
18522 * config/arm/arm-mve-builtins-base.h (vmlaq, vmlasq, vqdmlahq)
18523 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
18524 * config/arm/arm-mve-builtins.cc
18525 (function_instance::has_inactive_argument): Handle vmlaq, vmlasq,
18526 vqdmlahq, vqdmlashq, vqrdmlahq, vqrdmlashq.
18527 * config/arm/arm_mve.h (vqrdmlashq): Remove.
18528 (vqrdmlahq): Remove.
18529 (vqdmlashq): Remove.
18530 (vqdmlahq): Remove.
18534 (vmlasq_m): Remove.
18535 (vqdmlashq_m): Remove.
18536 (vqdmlahq_m): Remove.
18537 (vqrdmlahq_m): Remove.
18538 (vqrdmlashq_m): Remove.
18539 (vmlasq_n_u8): Remove.
18540 (vmlaq_n_u8): Remove.
18541 (vqrdmlashq_n_s8): Remove.
18542 (vqrdmlahq_n_s8): Remove.
18543 (vqdmlahq_n_s8): Remove.
18544 (vqdmlashq_n_s8): Remove.
18545 (vmlasq_n_s8): Remove.
18546 (vmlaq_n_s8): Remove.
18547 (vmlasq_n_u16): Remove.
18548 (vmlaq_n_u16): Remove.
18549 (vqrdmlashq_n_s16): Remove.
18550 (vqrdmlahq_n_s16): Remove.
18551 (vqdmlashq_n_s16): Remove.
18552 (vqdmlahq_n_s16): Remove.
18553 (vmlasq_n_s16): Remove.
18554 (vmlaq_n_s16): Remove.
18555 (vmlasq_n_u32): Remove.
18556 (vmlaq_n_u32): Remove.
18557 (vqrdmlashq_n_s32): Remove.
18558 (vqrdmlahq_n_s32): Remove.
18559 (vqdmlashq_n_s32): Remove.
18560 (vqdmlahq_n_s32): Remove.
18561 (vmlasq_n_s32): Remove.
18562 (vmlaq_n_s32): Remove.
18563 (vmlaq_m_n_s8): Remove.
18564 (vmlaq_m_n_s32): Remove.
18565 (vmlaq_m_n_s16): Remove.
18566 (vmlaq_m_n_u8): Remove.
18567 (vmlaq_m_n_u32): Remove.
18568 (vmlaq_m_n_u16): Remove.
18569 (vmlasq_m_n_s8): Remove.
18570 (vmlasq_m_n_s32): Remove.
18571 (vmlasq_m_n_s16): Remove.
18572 (vmlasq_m_n_u8): Remove.
18573 (vmlasq_m_n_u32): Remove.
18574 (vmlasq_m_n_u16): Remove.
18575 (vqdmlashq_m_n_s8): Remove.
18576 (vqdmlashq_m_n_s32): Remove.
18577 (vqdmlashq_m_n_s16): Remove.
18578 (vqdmlahq_m_n_s8): Remove.
18579 (vqdmlahq_m_n_s32): Remove.
18580 (vqdmlahq_m_n_s16): Remove.
18581 (vqrdmlahq_m_n_s8): Remove.
18582 (vqrdmlahq_m_n_s32): Remove.
18583 (vqrdmlahq_m_n_s16): Remove.
18584 (vqrdmlashq_m_n_s8): Remove.
18585 (vqrdmlashq_m_n_s32): Remove.
18586 (vqrdmlashq_m_n_s16): Remove.
18587 (__arm_vmlasq_n_u8): Remove.
18588 (__arm_vmlaq_n_u8): Remove.
18589 (__arm_vqrdmlashq_n_s8): Remove.
18590 (__arm_vqdmlashq_n_s8): Remove.
18591 (__arm_vqrdmlahq_n_s8): Remove.
18592 (__arm_vqdmlahq_n_s8): Remove.
18593 (__arm_vmlasq_n_s8): Remove.
18594 (__arm_vmlaq_n_s8): Remove.
18595 (__arm_vmlasq_n_u16): Remove.
18596 (__arm_vmlaq_n_u16): Remove.
18597 (__arm_vqrdmlashq_n_s16): Remove.
18598 (__arm_vqdmlashq_n_s16): Remove.
18599 (__arm_vqrdmlahq_n_s16): Remove.
18600 (__arm_vqdmlahq_n_s16): Remove.
18601 (__arm_vmlasq_n_s16): Remove.
18602 (__arm_vmlaq_n_s16): Remove.
18603 (__arm_vmlasq_n_u32): Remove.
18604 (__arm_vmlaq_n_u32): Remove.
18605 (__arm_vqrdmlashq_n_s32): Remove.
18606 (__arm_vqdmlashq_n_s32): Remove.
18607 (__arm_vqrdmlahq_n_s32): Remove.
18608 (__arm_vqdmlahq_n_s32): Remove.
18609 (__arm_vmlasq_n_s32): Remove.
18610 (__arm_vmlaq_n_s32): Remove.
18611 (__arm_vmlaq_m_n_s8): Remove.
18612 (__arm_vmlaq_m_n_s32): Remove.
18613 (__arm_vmlaq_m_n_s16): Remove.
18614 (__arm_vmlaq_m_n_u8): Remove.
18615 (__arm_vmlaq_m_n_u32): Remove.
18616 (__arm_vmlaq_m_n_u16): Remove.
18617 (__arm_vmlasq_m_n_s8): Remove.
18618 (__arm_vmlasq_m_n_s32): Remove.
18619 (__arm_vmlasq_m_n_s16): Remove.
18620 (__arm_vmlasq_m_n_u8): Remove.
18621 (__arm_vmlasq_m_n_u32): Remove.
18622 (__arm_vmlasq_m_n_u16): Remove.
18623 (__arm_vqdmlahq_m_n_s8): Remove.
18624 (__arm_vqdmlahq_m_n_s32): Remove.
18625 (__arm_vqdmlahq_m_n_s16): Remove.
18626 (__arm_vqrdmlahq_m_n_s8): Remove.
18627 (__arm_vqrdmlahq_m_n_s32): Remove.
18628 (__arm_vqrdmlahq_m_n_s16): Remove.
18629 (__arm_vqrdmlashq_m_n_s8): Remove.
18630 (__arm_vqrdmlashq_m_n_s32): Remove.
18631 (__arm_vqrdmlashq_m_n_s16): Remove.
18632 (__arm_vqdmlashq_m_n_s8): Remove.
18633 (__arm_vqdmlashq_m_n_s16): Remove.
18634 (__arm_vqdmlashq_m_n_s32): Remove.
18635 (__arm_vmlasq): Remove.
18636 (__arm_vmlaq): Remove.
18637 (__arm_vqrdmlashq): Remove.
18638 (__arm_vqdmlashq): Remove.
18639 (__arm_vqrdmlahq): Remove.
18640 (__arm_vqdmlahq): Remove.
18641 (__arm_vmlaq_m): Remove.
18642 (__arm_vmlasq_m): Remove.
18643 (__arm_vqdmlahq_m): Remove.
18644 (__arm_vqrdmlahq_m): Remove.
18645 (__arm_vqrdmlashq_m): Remove.
18646 (__arm_vqdmlashq_m): Remove.
18648 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18650 * config/arm/iterators.md (MVE_VMLxQ_N): New.
18651 (mve_insn): Add vmla, vmlas, vqdmlah, vqdmlash, vqrdmlah,
18653 (supf): Add VQDMLAHQ_N_S, VQDMLASHQ_N_S, VQRDMLAHQ_N_S,
18655 * config/arm/mve.md (mve_vmlaq_n_<supf><mode>)
18656 (mve_vmlasq_n_<supf><mode>, mve_vqdmlahq_n_<supf><mode>)
18657 (mve_vqdmlashq_n_<supf><mode>, mve_vqrdmlahq_n_<supf><mode>)
18658 (mve_vqrdmlashq_n_<supf><mode>): Merge into ...
18659 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
18661 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18663 * config/arm/arm-mve-builtins-shapes.cc (ternary_n): New.
18664 * config/arm/arm-mve-builtins-shapes.h (ternary_n): New.
18666 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18668 * config/arm/arm-mve-builtins-base.cc (vqdmladhq, vqdmladhxq)
18669 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
18670 (vqrdmlsdhxq): New.
18671 * config/arm/arm-mve-builtins-base.def (vqdmladhq, vqdmladhxq)
18672 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
18673 (vqrdmlsdhxq): New.
18674 * config/arm/arm-mve-builtins-base.h (vqdmladhq, vqdmladhxq)
18675 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
18676 (vqrdmlsdhxq): New.
18677 * config/arm/arm-mve-builtins.cc
18678 (function_instance::has_inactive_argument): Handle vqrdmladhq,
18679 vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq vqdmladhq, vqdmladhxq,
18680 vqdmlsdhq, vqdmlsdhxq.
18681 * config/arm/arm_mve.h (vqrdmlsdhxq): Remove.
18682 (vqrdmlsdhq): Remove.
18683 (vqrdmladhxq): Remove.
18684 (vqrdmladhq): Remove.
18685 (vqdmlsdhxq): Remove.
18686 (vqdmlsdhq): Remove.
18687 (vqdmladhxq): Remove.
18688 (vqdmladhq): Remove.
18689 (vqdmladhq_m): Remove.
18690 (vqdmladhxq_m): Remove.
18691 (vqdmlsdhq_m): Remove.
18692 (vqdmlsdhxq_m): Remove.
18693 (vqrdmladhq_m): Remove.
18694 (vqrdmladhxq_m): Remove.
18695 (vqrdmlsdhq_m): Remove.
18696 (vqrdmlsdhxq_m): Remove.
18697 (vqrdmlsdhxq_s8): Remove.
18698 (vqrdmlsdhq_s8): Remove.
18699 (vqrdmladhxq_s8): Remove.
18700 (vqrdmladhq_s8): Remove.
18701 (vqdmlsdhxq_s8): Remove.
18702 (vqdmlsdhq_s8): Remove.
18703 (vqdmladhxq_s8): Remove.
18704 (vqdmladhq_s8): Remove.
18705 (vqrdmlsdhxq_s16): Remove.
18706 (vqrdmlsdhq_s16): Remove.
18707 (vqrdmladhxq_s16): Remove.
18708 (vqrdmladhq_s16): Remove.
18709 (vqdmlsdhxq_s16): Remove.
18710 (vqdmlsdhq_s16): Remove.
18711 (vqdmladhxq_s16): Remove.
18712 (vqdmladhq_s16): Remove.
18713 (vqrdmlsdhxq_s32): Remove.
18714 (vqrdmlsdhq_s32): Remove.
18715 (vqrdmladhxq_s32): Remove.
18716 (vqrdmladhq_s32): Remove.
18717 (vqdmlsdhxq_s32): Remove.
18718 (vqdmlsdhq_s32): Remove.
18719 (vqdmladhxq_s32): Remove.
18720 (vqdmladhq_s32): Remove.
18721 (vqdmladhq_m_s8): Remove.
18722 (vqdmladhq_m_s32): Remove.
18723 (vqdmladhq_m_s16): Remove.
18724 (vqdmladhxq_m_s8): Remove.
18725 (vqdmladhxq_m_s32): Remove.
18726 (vqdmladhxq_m_s16): Remove.
18727 (vqdmlsdhq_m_s8): Remove.
18728 (vqdmlsdhq_m_s32): Remove.
18729 (vqdmlsdhq_m_s16): Remove.
18730 (vqdmlsdhxq_m_s8): Remove.
18731 (vqdmlsdhxq_m_s32): Remove.
18732 (vqdmlsdhxq_m_s16): Remove.
18733 (vqrdmladhq_m_s8): Remove.
18734 (vqrdmladhq_m_s32): Remove.
18735 (vqrdmladhq_m_s16): Remove.
18736 (vqrdmladhxq_m_s8): Remove.
18737 (vqrdmladhxq_m_s32): Remove.
18738 (vqrdmladhxq_m_s16): Remove.
18739 (vqrdmlsdhq_m_s8): Remove.
18740 (vqrdmlsdhq_m_s32): Remove.
18741 (vqrdmlsdhq_m_s16): Remove.
18742 (vqrdmlsdhxq_m_s8): Remove.
18743 (vqrdmlsdhxq_m_s32): Remove.
18744 (vqrdmlsdhxq_m_s16): Remove.
18745 (__arm_vqrdmlsdhxq_s8): Remove.
18746 (__arm_vqrdmlsdhq_s8): Remove.
18747 (__arm_vqrdmladhxq_s8): Remove.
18748 (__arm_vqrdmladhq_s8): Remove.
18749 (__arm_vqdmlsdhxq_s8): Remove.
18750 (__arm_vqdmlsdhq_s8): Remove.
18751 (__arm_vqdmladhxq_s8): Remove.
18752 (__arm_vqdmladhq_s8): Remove.
18753 (__arm_vqrdmlsdhxq_s16): Remove.
18754 (__arm_vqrdmlsdhq_s16): Remove.
18755 (__arm_vqrdmladhxq_s16): Remove.
18756 (__arm_vqrdmladhq_s16): Remove.
18757 (__arm_vqdmlsdhxq_s16): Remove.
18758 (__arm_vqdmlsdhq_s16): Remove.
18759 (__arm_vqdmladhxq_s16): Remove.
18760 (__arm_vqdmladhq_s16): Remove.
18761 (__arm_vqrdmlsdhxq_s32): Remove.
18762 (__arm_vqrdmlsdhq_s32): Remove.
18763 (__arm_vqrdmladhxq_s32): Remove.
18764 (__arm_vqrdmladhq_s32): Remove.
18765 (__arm_vqdmlsdhxq_s32): Remove.
18766 (__arm_vqdmlsdhq_s32): Remove.
18767 (__arm_vqdmladhxq_s32): Remove.
18768 (__arm_vqdmladhq_s32): Remove.
18769 (__arm_vqdmladhq_m_s8): Remove.
18770 (__arm_vqdmladhq_m_s32): Remove.
18771 (__arm_vqdmladhq_m_s16): Remove.
18772 (__arm_vqdmladhxq_m_s8): Remove.
18773 (__arm_vqdmladhxq_m_s32): Remove.
18774 (__arm_vqdmladhxq_m_s16): Remove.
18775 (__arm_vqdmlsdhq_m_s8): Remove.
18776 (__arm_vqdmlsdhq_m_s32): Remove.
18777 (__arm_vqdmlsdhq_m_s16): Remove.
18778 (__arm_vqdmlsdhxq_m_s8): Remove.
18779 (__arm_vqdmlsdhxq_m_s32): Remove.
18780 (__arm_vqdmlsdhxq_m_s16): Remove.
18781 (__arm_vqrdmladhq_m_s8): Remove.
18782 (__arm_vqrdmladhq_m_s32): Remove.
18783 (__arm_vqrdmladhq_m_s16): Remove.
18784 (__arm_vqrdmladhxq_m_s8): Remove.
18785 (__arm_vqrdmladhxq_m_s32): Remove.
18786 (__arm_vqrdmladhxq_m_s16): Remove.
18787 (__arm_vqrdmlsdhq_m_s8): Remove.
18788 (__arm_vqrdmlsdhq_m_s32): Remove.
18789 (__arm_vqrdmlsdhq_m_s16): Remove.
18790 (__arm_vqrdmlsdhxq_m_s8): Remove.
18791 (__arm_vqrdmlsdhxq_m_s32): Remove.
18792 (__arm_vqrdmlsdhxq_m_s16): Remove.
18793 (__arm_vqrdmlsdhxq): Remove.
18794 (__arm_vqrdmlsdhq): Remove.
18795 (__arm_vqrdmladhxq): Remove.
18796 (__arm_vqrdmladhq): Remove.
18797 (__arm_vqdmlsdhxq): Remove.
18798 (__arm_vqdmlsdhq): Remove.
18799 (__arm_vqdmladhxq): Remove.
18800 (__arm_vqdmladhq): Remove.
18801 (__arm_vqdmladhq_m): Remove.
18802 (__arm_vqdmladhxq_m): Remove.
18803 (__arm_vqdmlsdhq_m): Remove.
18804 (__arm_vqdmlsdhxq_m): Remove.
18805 (__arm_vqrdmladhq_m): Remove.
18806 (__arm_vqrdmladhxq_m): Remove.
18807 (__arm_vqrdmlsdhq_m): Remove.
18808 (__arm_vqrdmlsdhxq_m): Remove.
18810 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18812 * config/arm/iterators.md (MVE_VQxDMLxDHxQ_S): New.
18813 (mve_insn): Add vqdmladh, vqdmladhx, vqdmlsdh, vqdmlsdhx,
18814 vqrdmladh, vqrdmladhx, vqrdmlsdh, vqrdmlsdhx.
18815 (supf): Add VQDMLADHQ_S, VQDMLADHXQ_S, VQDMLSDHQ_S, VQDMLSDHXQ_S,
18816 VQRDMLADHQ_S,VQRDMLADHXQ_S, VQRDMLSDHQ_S, VQRDMLSDHXQ_S.
18817 * config/arm/mve.md (mve_vqrdmladhq_s<mode>)
18818 (mve_vqrdmladhxq_s<mode>, mve_vqrdmlsdhq_s<mode>)
18819 (mve_vqrdmlsdhxq_s<mode>, mve_vqdmlsdhxq_s<mode>)
18820 (mve_vqdmlsdhq_s<mode>, mve_vqdmladhxq_s<mode>)
18821 (mve_vqdmladhq_s<mode>): Merge into ...
18822 (@mve_<mve_insn>q_<supf><mode>): ... this.
18824 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18826 * config/arm/arm-mve-builtins-shapes.cc (ternary): New.
18827 * config/arm/arm-mve-builtins-shapes.h (ternary): New.
18829 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18831 * config/arm/arm-mve-builtins-base.cc (vmlaldavaq, vmlaldavaxq)
18832 (vmlsldavaq, vmlsldavaxq): New.
18833 * config/arm/arm-mve-builtins-base.def (vmlaldavaq, vmlaldavaxq)
18834 (vmlsldavaq, vmlsldavaxq): New.
18835 * config/arm/arm-mve-builtins-base.h (vmlaldavaq, vmlaldavaxq)
18836 (vmlsldavaq, vmlsldavaxq): New.
18837 * config/arm/arm_mve.h (vmlaldavaq): Remove.
18838 (vmlaldavaxq): Remove.
18839 (vmlsldavaq): Remove.
18840 (vmlsldavaxq): Remove.
18841 (vmlaldavaq_p): Remove.
18842 (vmlaldavaxq_p): Remove.
18843 (vmlsldavaq_p): Remove.
18844 (vmlsldavaxq_p): Remove.
18845 (vmlaldavaq_s16): Remove.
18846 (vmlaldavaxq_s16): Remove.
18847 (vmlsldavaq_s16): Remove.
18848 (vmlsldavaxq_s16): Remove.
18849 (vmlaldavaq_u16): Remove.
18850 (vmlaldavaq_s32): Remove.
18851 (vmlaldavaxq_s32): Remove.
18852 (vmlsldavaq_s32): Remove.
18853 (vmlsldavaxq_s32): Remove.
18854 (vmlaldavaq_u32): Remove.
18855 (vmlaldavaq_p_s32): Remove.
18856 (vmlaldavaq_p_s16): Remove.
18857 (vmlaldavaq_p_u32): Remove.
18858 (vmlaldavaq_p_u16): Remove.
18859 (vmlaldavaxq_p_s32): Remove.
18860 (vmlaldavaxq_p_s16): Remove.
18861 (vmlsldavaq_p_s32): Remove.
18862 (vmlsldavaq_p_s16): Remove.
18863 (vmlsldavaxq_p_s32): Remove.
18864 (vmlsldavaxq_p_s16): Remove.
18865 (__arm_vmlaldavaq_s16): Remove.
18866 (__arm_vmlaldavaxq_s16): Remove.
18867 (__arm_vmlsldavaq_s16): Remove.
18868 (__arm_vmlsldavaxq_s16): Remove.
18869 (__arm_vmlaldavaq_u16): Remove.
18870 (__arm_vmlaldavaq_s32): Remove.
18871 (__arm_vmlaldavaxq_s32): Remove.
18872 (__arm_vmlsldavaq_s32): Remove.
18873 (__arm_vmlsldavaxq_s32): Remove.
18874 (__arm_vmlaldavaq_u32): Remove.
18875 (__arm_vmlaldavaq_p_s32): Remove.
18876 (__arm_vmlaldavaq_p_s16): Remove.
18877 (__arm_vmlaldavaq_p_u32): Remove.
18878 (__arm_vmlaldavaq_p_u16): Remove.
18879 (__arm_vmlaldavaxq_p_s32): Remove.
18880 (__arm_vmlaldavaxq_p_s16): Remove.
18881 (__arm_vmlsldavaq_p_s32): Remove.
18882 (__arm_vmlsldavaq_p_s16): Remove.
18883 (__arm_vmlsldavaxq_p_s32): Remove.
18884 (__arm_vmlsldavaxq_p_s16): Remove.
18885 (__arm_vmlaldavaq): Remove.
18886 (__arm_vmlaldavaxq): Remove.
18887 (__arm_vmlsldavaq): Remove.
18888 (__arm_vmlsldavaxq): Remove.
18889 (__arm_vmlaldavaq_p): Remove.
18890 (__arm_vmlaldavaxq_p): Remove.
18891 (__arm_vmlsldavaq_p): Remove.
18892 (__arm_vmlsldavaxq_p): Remove.
18894 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18896 * config/arm/iterators.md (MVE_VMLxLDAVAxQ, MVE_VMLxLDAVAxQ_P):
18898 (mve_insn): Add vmlaldava, vmlaldavax, vmlsldava, vmlsldavax.
18899 (supf): Add VMLALDAVAXQ_P_S, VMLALDAVAXQ_S, VMLSLDAVAQ_P_S,
18900 VMLSLDAVAQ_S, VMLSLDAVAXQ_P_S, VMLSLDAVAXQ_S.
18901 * config/arm/mve.md (mve_vmlaldavaq_<supf><mode>)
18902 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
18903 (mve_vmlaldavaxq_s<mode>): Merge into ...
18904 (@mve_<mve_insn>q_<supf><mode>): ... this.
18905 (mve_vmlaldavaq_p_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>)
18906 (mve_vmlsldavaq_p_s<mode>, mve_vmlsldavaxq_p_s<mode>): Merge into
18908 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
18910 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18912 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int64): New.
18913 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int64): New.
18915 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18917 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhq, vrmlaldavhxq)
18918 (vrmlsldavhq, vrmlsldavhxq): New.
18919 * config/arm/arm-mve-builtins-base.def (vrmlaldavhq, vrmlaldavhxq)
18920 (vrmlsldavhq, vrmlsldavhxq): New.
18921 * config/arm/arm-mve-builtins-base.h (vrmlaldavhq, vrmlaldavhxq)
18922 (vrmlsldavhq, vrmlsldavhxq): New.
18923 * config/arm/arm-mve-builtins-functions.h
18924 (unspec_mve_function_exact_insn_pred_p): Handle vrmlaldavhq,
18925 vrmlaldavhxq, vrmlsldavhq, vrmlsldavhxq.
18926 * config/arm/arm_mve.h (vrmlaldavhq): Remove.
18927 (vrmlsldavhxq): Remove.
18928 (vrmlsldavhq): Remove.
18929 (vrmlaldavhxq): Remove.
18930 (vrmlaldavhq_p): Remove.
18931 (vrmlaldavhxq_p): Remove.
18932 (vrmlsldavhq_p): Remove.
18933 (vrmlsldavhxq_p): Remove.
18934 (vrmlaldavhq_u32): Remove.
18935 (vrmlsldavhxq_s32): Remove.
18936 (vrmlsldavhq_s32): Remove.
18937 (vrmlaldavhxq_s32): Remove.
18938 (vrmlaldavhq_s32): Remove.
18939 (vrmlaldavhq_p_s32): Remove.
18940 (vrmlaldavhxq_p_s32): Remove.
18941 (vrmlsldavhq_p_s32): Remove.
18942 (vrmlsldavhxq_p_s32): Remove.
18943 (vrmlaldavhq_p_u32): Remove.
18944 (__arm_vrmlaldavhq_u32): Remove.
18945 (__arm_vrmlsldavhxq_s32): Remove.
18946 (__arm_vrmlsldavhq_s32): Remove.
18947 (__arm_vrmlaldavhxq_s32): Remove.
18948 (__arm_vrmlaldavhq_s32): Remove.
18949 (__arm_vrmlaldavhq_p_s32): Remove.
18950 (__arm_vrmlaldavhxq_p_s32): Remove.
18951 (__arm_vrmlsldavhq_p_s32): Remove.
18952 (__arm_vrmlsldavhxq_p_s32): Remove.
18953 (__arm_vrmlaldavhq_p_u32): Remove.
18954 (__arm_vrmlaldavhq): Remove.
18955 (__arm_vrmlsldavhxq): Remove.
18956 (__arm_vrmlsldavhq): Remove.
18957 (__arm_vrmlaldavhxq): Remove.
18958 (__arm_vrmlaldavhq_p): Remove.
18959 (__arm_vrmlaldavhxq_p): Remove.
18960 (__arm_vrmlsldavhq_p): Remove.
18961 (__arm_vrmlsldavhxq_p): Remove.
18963 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18965 * config/arm/iterators.md (MVE_VRMLxLDAVxQ, MVE_VRMLxLDAVHxQ_P):
18967 (mve_insn): Add vrmlaldavh, vrmlaldavhx, vrmlsldavh, vrmlsldavhx.
18968 (supf): Add VRMLALDAVHXQ_P_S, VRMLALDAVHXQ_S, VRMLSLDAVHQ_P_S,
18969 VRMLSLDAVHQ_S, VRMLSLDAVHXQ_P_S, VRMLSLDAVHXQ_S.
18970 * config/arm/mve.md (mve_vrmlaldavhxq_sv4si)
18971 (mve_vrmlsldavhq_sv4si, mve_vrmlsldavhxq_sv4si)
18972 (mve_vrmlaldavhq_<supf>v4si): Merge into ...
18973 (@mve_<mve_insn>q_<supf>v4si): ... this.
18974 (mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhq_p_sv4si)
18975 (mve_vrmlsldavhxq_p_sv4si, mve_vrmlaldavhq_p_<supf>v4si): Merge
18977 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
18979 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18981 * config/arm/arm-mve-builtins-base.cc (vmlaldavq, vmlaldavxq)
18982 (vmlsldavq, vmlsldavxq): New.
18983 * config/arm/arm-mve-builtins-base.def (vmlaldavq, vmlaldavxq)
18984 (vmlsldavq, vmlsldavxq): New.
18985 * config/arm/arm-mve-builtins-base.h (vmlaldavq, vmlaldavxq)
18986 (vmlsldavq, vmlsldavxq): New.
18987 * config/arm/arm_mve.h (vmlaldavq): Remove.
18988 (vmlsldavxq): Remove.
18989 (vmlsldavq): Remove.
18990 (vmlaldavxq): Remove.
18991 (vmlaldavq_p): Remove.
18992 (vmlaldavxq_p): Remove.
18993 (vmlsldavq_p): Remove.
18994 (vmlsldavxq_p): Remove.
18995 (vmlaldavq_u16): Remove.
18996 (vmlsldavxq_s16): Remove.
18997 (vmlsldavq_s16): Remove.
18998 (vmlaldavxq_s16): Remove.
18999 (vmlaldavq_s16): Remove.
19000 (vmlaldavq_u32): Remove.
19001 (vmlsldavxq_s32): Remove.
19002 (vmlsldavq_s32): Remove.
19003 (vmlaldavxq_s32): Remove.
19004 (vmlaldavq_s32): Remove.
19005 (vmlaldavq_p_s16): Remove.
19006 (vmlaldavxq_p_s16): Remove.
19007 (vmlsldavq_p_s16): Remove.
19008 (vmlsldavxq_p_s16): Remove.
19009 (vmlaldavq_p_u16): Remove.
19010 (vmlaldavq_p_s32): Remove.
19011 (vmlaldavxq_p_s32): Remove.
19012 (vmlsldavq_p_s32): Remove.
19013 (vmlsldavxq_p_s32): Remove.
19014 (vmlaldavq_p_u32): Remove.
19015 (__arm_vmlaldavq_u16): Remove.
19016 (__arm_vmlsldavxq_s16): Remove.
19017 (__arm_vmlsldavq_s16): Remove.
19018 (__arm_vmlaldavxq_s16): Remove.
19019 (__arm_vmlaldavq_s16): Remove.
19020 (__arm_vmlaldavq_u32): Remove.
19021 (__arm_vmlsldavxq_s32): Remove.
19022 (__arm_vmlsldavq_s32): Remove.
19023 (__arm_vmlaldavxq_s32): Remove.
19024 (__arm_vmlaldavq_s32): Remove.
19025 (__arm_vmlaldavq_p_s16): Remove.
19026 (__arm_vmlaldavxq_p_s16): Remove.
19027 (__arm_vmlsldavq_p_s16): Remove.
19028 (__arm_vmlsldavxq_p_s16): Remove.
19029 (__arm_vmlaldavq_p_u16): Remove.
19030 (__arm_vmlaldavq_p_s32): Remove.
19031 (__arm_vmlaldavxq_p_s32): Remove.
19032 (__arm_vmlsldavq_p_s32): Remove.
19033 (__arm_vmlsldavxq_p_s32): Remove.
19034 (__arm_vmlaldavq_p_u32): Remove.
19035 (__arm_vmlaldavq): Remove.
19036 (__arm_vmlsldavxq): Remove.
19037 (__arm_vmlsldavq): Remove.
19038 (__arm_vmlaldavxq): Remove.
19039 (__arm_vmlaldavq_p): Remove.
19040 (__arm_vmlaldavxq_p): Remove.
19041 (__arm_vmlsldavq_p): Remove.
19042 (__arm_vmlsldavxq_p): Remove.
19044 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19046 * config/arm/iterators.md (MVE_VMLxLDAVxQ, MVE_VMLxLDAVxQ_P): New.
19047 (mve_insn): Add vmlaldav, vmlaldavx, vmlsldav, vmlsldavx.
19048 (supf): Add VMLALDAVXQ_S, VMLSLDAVQ_S, VMLSLDAVXQ_S,
19049 VMLALDAVXQ_P_S, VMLSLDAVQ_P_S, VMLSLDAVXQ_P_S.
19050 * config/arm/mve.md (mve_vmlaldavq_<supf><mode>)
19051 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
19052 (mve_vmlsldavxq_s<mode>): Merge into ...
19053 (@mve_<mve_insn>q_<supf><mode>): ... this.
19054 (mve_vmlaldavq_p_<supf><mode>, mve_vmlaldavxq_p_s<mode>)
19055 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>): Merge into
19057 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
19059 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19061 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int64): New.
19062 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int64): New.
19064 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19066 * config/arm/arm-mve-builtins-base.cc (vabavq): New.
19067 * config/arm/arm-mve-builtins-base.def (vabavq): New.
19068 * config/arm/arm-mve-builtins-base.h (vabavq): New.
19069 * config/arm/arm_mve.h (vabavq): Remove.
19070 (vabavq_p): Remove.
19071 (vabavq_s8): Remove.
19072 (vabavq_s16): Remove.
19073 (vabavq_s32): Remove.
19074 (vabavq_u8): Remove.
19075 (vabavq_u16): Remove.
19076 (vabavq_u32): Remove.
19077 (vabavq_p_s8): Remove.
19078 (vabavq_p_u8): Remove.
19079 (vabavq_p_s16): Remove.
19080 (vabavq_p_u16): Remove.
19081 (vabavq_p_s32): Remove.
19082 (vabavq_p_u32): Remove.
19083 (__arm_vabavq_s8): Remove.
19084 (__arm_vabavq_s16): Remove.
19085 (__arm_vabavq_s32): Remove.
19086 (__arm_vabavq_u8): Remove.
19087 (__arm_vabavq_u16): Remove.
19088 (__arm_vabavq_u32): Remove.
19089 (__arm_vabavq_p_s8): Remove.
19090 (__arm_vabavq_p_u8): Remove.
19091 (__arm_vabavq_p_s16): Remove.
19092 (__arm_vabavq_p_u16): Remove.
19093 (__arm_vabavq_p_s32): Remove.
19094 (__arm_vabavq_p_u32): Remove.
19095 (__arm_vabavq): Remove.
19096 (__arm_vabavq_p): Remove.
19098 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19100 * config/arm/iterators.md (mve_insn): Add vabav.
19101 * config/arm/mve.md (mve_vabavq_<supf><mode>): Rename into ...
19102 (@mve_<mve_insn>q_<supf><mode>): ... this,.
19103 (mve_vabavq_p_<supf><mode>): Rename into ...
19104 (@mve_<mve_insn>q_p_<supf><mode>): ... this,.
19106 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19108 * config/arm/arm-mve-builtins-base.cc (vmladavaxq, vmladavaq)
19109 (vmlsdavaq, vmlsdavaxq): New.
19110 * config/arm/arm-mve-builtins-base.def (vmladavaxq, vmladavaq)
19111 (vmlsdavaq, vmlsdavaxq): New.
19112 * config/arm/arm-mve-builtins-base.h (vmladavaxq, vmladavaq)
19113 (vmlsdavaq, vmlsdavaxq): New.
19114 * config/arm/arm_mve.h (vmladavaq): Remove.
19115 (vmlsdavaxq): Remove.
19116 (vmlsdavaq): Remove.
19117 (vmladavaxq): Remove.
19118 (vmladavaq_p): Remove.
19119 (vmladavaxq_p): Remove.
19120 (vmlsdavaq_p): Remove.
19121 (vmlsdavaxq_p): Remove.
19122 (vmladavaq_u8): Remove.
19123 (vmlsdavaxq_s8): Remove.
19124 (vmlsdavaq_s8): Remove.
19125 (vmladavaxq_s8): Remove.
19126 (vmladavaq_s8): Remove.
19127 (vmladavaq_u16): Remove.
19128 (vmlsdavaxq_s16): Remove.
19129 (vmlsdavaq_s16): Remove.
19130 (vmladavaxq_s16): Remove.
19131 (vmladavaq_s16): Remove.
19132 (vmladavaq_u32): Remove.
19133 (vmlsdavaxq_s32): Remove.
19134 (vmlsdavaq_s32): Remove.
19135 (vmladavaxq_s32): Remove.
19136 (vmladavaq_s32): Remove.
19137 (vmladavaq_p_s8): Remove.
19138 (vmladavaq_p_s32): Remove.
19139 (vmladavaq_p_s16): Remove.
19140 (vmladavaq_p_u8): Remove.
19141 (vmladavaq_p_u32): Remove.
19142 (vmladavaq_p_u16): Remove.
19143 (vmladavaxq_p_s8): Remove.
19144 (vmladavaxq_p_s32): Remove.
19145 (vmladavaxq_p_s16): Remove.
19146 (vmlsdavaq_p_s8): Remove.
19147 (vmlsdavaq_p_s32): Remove.
19148 (vmlsdavaq_p_s16): Remove.
19149 (vmlsdavaxq_p_s8): Remove.
19150 (vmlsdavaxq_p_s32): Remove.
19151 (vmlsdavaxq_p_s16): Remove.
19152 (__arm_vmladavaq_u8): Remove.
19153 (__arm_vmlsdavaxq_s8): Remove.
19154 (__arm_vmlsdavaq_s8): Remove.
19155 (__arm_vmladavaxq_s8): Remove.
19156 (__arm_vmladavaq_s8): Remove.
19157 (__arm_vmladavaq_u16): Remove.
19158 (__arm_vmlsdavaxq_s16): Remove.
19159 (__arm_vmlsdavaq_s16): Remove.
19160 (__arm_vmladavaxq_s16): Remove.
19161 (__arm_vmladavaq_s16): Remove.
19162 (__arm_vmladavaq_u32): Remove.
19163 (__arm_vmlsdavaxq_s32): Remove.
19164 (__arm_vmlsdavaq_s32): Remove.
19165 (__arm_vmladavaxq_s32): Remove.
19166 (__arm_vmladavaq_s32): Remove.
19167 (__arm_vmladavaq_p_s8): Remove.
19168 (__arm_vmladavaq_p_s32): Remove.
19169 (__arm_vmladavaq_p_s16): Remove.
19170 (__arm_vmladavaq_p_u8): Remove.
19171 (__arm_vmladavaq_p_u32): Remove.
19172 (__arm_vmladavaq_p_u16): Remove.
19173 (__arm_vmladavaxq_p_s8): Remove.
19174 (__arm_vmladavaxq_p_s32): Remove.
19175 (__arm_vmladavaxq_p_s16): Remove.
19176 (__arm_vmlsdavaq_p_s8): Remove.
19177 (__arm_vmlsdavaq_p_s32): Remove.
19178 (__arm_vmlsdavaq_p_s16): Remove.
19179 (__arm_vmlsdavaxq_p_s8): Remove.
19180 (__arm_vmlsdavaxq_p_s32): Remove.
19181 (__arm_vmlsdavaxq_p_s16): Remove.
19182 (__arm_vmladavaq): Remove.
19183 (__arm_vmlsdavaxq): Remove.
19184 (__arm_vmlsdavaq): Remove.
19185 (__arm_vmladavaxq): Remove.
19186 (__arm_vmladavaq_p): Remove.
19187 (__arm_vmladavaxq_p): Remove.
19188 (__arm_vmlsdavaq_p): Remove.
19189 (__arm_vmlsdavaxq_p): Remove.
19191 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19193 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): New.
19194 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int32): New.
19196 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19198 * config/arm/arm-mve-builtins-base.cc (vmladavq, vmladavxq)
19199 (vmlsdavq, vmlsdavxq): New.
19200 * config/arm/arm-mve-builtins-base.def (vmladavq, vmladavxq)
19201 (vmlsdavq, vmlsdavxq): New.
19202 * config/arm/arm-mve-builtins-base.h (vmladavq, vmladavxq)
19203 (vmlsdavq, vmlsdavxq): New.
19204 * config/arm/arm_mve.h (vmladavq): Remove.
19205 (vmlsdavxq): Remove.
19206 (vmlsdavq): Remove.
19207 (vmladavxq): Remove.
19208 (vmladavq_p): Remove.
19209 (vmlsdavxq_p): Remove.
19210 (vmlsdavq_p): Remove.
19211 (vmladavxq_p): Remove.
19212 (vmladavq_u8): Remove.
19213 (vmlsdavxq_s8): Remove.
19214 (vmlsdavq_s8): Remove.
19215 (vmladavxq_s8): Remove.
19216 (vmladavq_s8): Remove.
19217 (vmladavq_u16): Remove.
19218 (vmlsdavxq_s16): Remove.
19219 (vmlsdavq_s16): Remove.
19220 (vmladavxq_s16): Remove.
19221 (vmladavq_s16): Remove.
19222 (vmladavq_u32): Remove.
19223 (vmlsdavxq_s32): Remove.
19224 (vmlsdavq_s32): Remove.
19225 (vmladavxq_s32): Remove.
19226 (vmladavq_s32): Remove.
19227 (vmladavq_p_u8): Remove.
19228 (vmlsdavxq_p_s8): Remove.
19229 (vmlsdavq_p_s8): Remove.
19230 (vmladavxq_p_s8): Remove.
19231 (vmladavq_p_s8): Remove.
19232 (vmladavq_p_u16): Remove.
19233 (vmlsdavxq_p_s16): Remove.
19234 (vmlsdavq_p_s16): Remove.
19235 (vmladavxq_p_s16): Remove.
19236 (vmladavq_p_s16): Remove.
19237 (vmladavq_p_u32): Remove.
19238 (vmlsdavxq_p_s32): Remove.
19239 (vmlsdavq_p_s32): Remove.
19240 (vmladavxq_p_s32): Remove.
19241 (vmladavq_p_s32): Remove.
19242 (__arm_vmladavq_u8): Remove.
19243 (__arm_vmlsdavxq_s8): Remove.
19244 (__arm_vmlsdavq_s8): Remove.
19245 (__arm_vmladavxq_s8): Remove.
19246 (__arm_vmladavq_s8): Remove.
19247 (__arm_vmladavq_u16): Remove.
19248 (__arm_vmlsdavxq_s16): Remove.
19249 (__arm_vmlsdavq_s16): Remove.
19250 (__arm_vmladavxq_s16): Remove.
19251 (__arm_vmladavq_s16): Remove.
19252 (__arm_vmladavq_u32): Remove.
19253 (__arm_vmlsdavxq_s32): Remove.
19254 (__arm_vmlsdavq_s32): Remove.
19255 (__arm_vmladavxq_s32): Remove.
19256 (__arm_vmladavq_s32): Remove.
19257 (__arm_vmladavq_p_u8): Remove.
19258 (__arm_vmlsdavxq_p_s8): Remove.
19259 (__arm_vmlsdavq_p_s8): Remove.
19260 (__arm_vmladavxq_p_s8): Remove.
19261 (__arm_vmladavq_p_s8): Remove.
19262 (__arm_vmladavq_p_u16): Remove.
19263 (__arm_vmlsdavxq_p_s16): Remove.
19264 (__arm_vmlsdavq_p_s16): Remove.
19265 (__arm_vmladavxq_p_s16): Remove.
19266 (__arm_vmladavq_p_s16): Remove.
19267 (__arm_vmladavq_p_u32): Remove.
19268 (__arm_vmlsdavxq_p_s32): Remove.
19269 (__arm_vmlsdavq_p_s32): Remove.
19270 (__arm_vmladavxq_p_s32): Remove.
19271 (__arm_vmladavq_p_s32): Remove.
19272 (__arm_vmladavq): Remove.
19273 (__arm_vmlsdavxq): Remove.
19274 (__arm_vmlsdavq): Remove.
19275 (__arm_vmladavxq): Remove.
19276 (__arm_vmladavq_p): Remove.
19277 (__arm_vmlsdavxq_p): Remove.
19278 (__arm_vmlsdavq_p): Remove.
19279 (__arm_vmladavxq_p): Remove.
19281 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19283 * config/arm/iterators.md (MVE_VMLxDAVQ, MVE_VMLxDAVQ_P)
19284 (MVE_VMLxDAVAQ, MVE_VMLxDAVAQ_P): New.
19285 (mve_insn): Add vmladava, vmladavax, vmladav, vmladavx, vmlsdava,
19286 vmlsdavax, vmlsdav, vmlsdavx.
19287 (supf): Add VMLADAVAXQ_P_S, VMLADAVAXQ_S, VMLADAVXQ_P_S,
19288 VMLADAVXQ_S, VMLSDAVAQ_P_S, VMLSDAVAQ_S, VMLSDAVAXQ_P_S,
19289 VMLSDAVAXQ_S, VMLSDAVQ_P_S, VMLSDAVQ_S, VMLSDAVXQ_P_S,
19291 * config/arm/mve.md (mve_vmladavq_<supf><mode>)
19292 (mve_vmladavxq_s<mode>, mve_vmlsdavq_s<mode>)
19293 (mve_vmlsdavxq_s<mode>): Merge into ...
19294 (@mve_<mve_insn>q_<supf><mode>): ... this.
19295 (mve_vmlsdavaq_s<mode>, mve_vmladavaxq_s<mode>)
19296 (mve_vmlsdavaxq_s<mode>, mve_vmladavaq_<supf><mode>): Merge into
19298 (@mve_<mve_insn>q_<supf><mode>): ... this.
19299 (mve_vmladavq_p_<supf><mode>, mve_vmladavxq_p_s<mode>)
19300 (mve_vmlsdavq_p_s<mode>, mve_vmlsdavxq_p_s<mode>): Merge into ...
19301 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
19302 (mve_vmladavaq_p_<supf><mode>, mve_vmladavaxq_p_s<mode>)
19303 (mve_vmlsdavaq_p_s<mode>, mve_vmlsdavaxq_p_s<mode>): Merge into
19305 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
19307 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19309 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int32): New.
19310 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int32): New.
19312 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19314 * config/arm/arm-mve-builtins-base.cc (vaddlvaq): New.
19315 * config/arm/arm-mve-builtins-base.def (vaddlvaq): New.
19316 * config/arm/arm-mve-builtins-base.h (vaddlvaq): New.
19317 * config/arm/arm_mve.h (vaddlvaq): Remove.
19318 (vaddlvaq_p): Remove.
19319 (vaddlvaq_u32): Remove.
19320 (vaddlvaq_s32): Remove.
19321 (vaddlvaq_p_s32): Remove.
19322 (vaddlvaq_p_u32): Remove.
19323 (__arm_vaddlvaq_u32): Remove.
19324 (__arm_vaddlvaq_s32): Remove.
19325 (__arm_vaddlvaq_p_s32): Remove.
19326 (__arm_vaddlvaq_p_u32): Remove.
19327 (__arm_vaddlvaq): Remove.
19328 (__arm_vaddlvaq_p): Remove.
19330 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19332 * config/arm/arm-mve-builtins-shapes.cc (unary_widen_acc): New.
19333 * config/arm/arm-mve-builtins-shapes.h (unary_widen_acc): New.
19335 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19337 * config/arm/iterators.md (mve_insn): Add vaddlva.
19338 * config/arm/mve.md (mve_vaddlvaq_<supf>v4si): Rename into ...
19339 (@mve_<mve_insn>q_<supf>v4si): ... this.
19340 (mve_vaddlvaq_p_<supf>v4si): Rename into ...
19341 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
19343 2023-05-11 Uros Bizjak <ubizjak@gmail.com>
19346 * config/i386/i386.cc (ix86_widen_mult_cost):
19347 Handle V4HImode and V2SImode.
19349 2023-05-11 Andrew Pinski <apinski@marvell.com>
19351 * tree-ssa-dce.cc (simple_dce_from_worklist): For ssa names
19352 defined by a phi node with more than one uses, allow for the
19353 only uses are in that same defining statement.
19355 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
19357 * config/riscv/riscv.cc (riscv_const_insns): Add permissible
19360 2023-05-11 Pan Li <pan2.li@intel.com>
19362 * config/riscv/vector.md: Add comments for simplifying to vmset.
19364 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
19366 * config/riscv/autovec.md (<optab><mode>3): Add scalar shift
19368 (v<optab><mode>3): Add vector shift pattern.
19369 * config/riscv/vector-iterators.md: New iterator.
19371 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
19373 * config/riscv/autovec.md: Use renamed functions.
19374 * config/riscv/riscv-protos.h (emit_vlmax_op): Rename.
19375 (emit_vlmax_reg_op): To this.
19376 (emit_nonvlmax_op): Rename.
19377 (emit_len_op): To this.
19378 (emit_nonvlmax_binop): Rename.
19379 (emit_len_binop): To this.
19380 * config/riscv/riscv-v.cc (emit_pred_op): Add default parameter.
19381 (emit_pred_binop): Remove vlmax_p.
19382 (emit_vlmax_op): Rename.
19383 (emit_vlmax_reg_op): To this.
19384 (emit_nonvlmax_op): Rename.
19385 (emit_len_op): To this.
19386 (emit_nonvlmax_binop): Rename.
19387 (emit_len_binop): To this.
19388 (sew64_scalar_helper): Use renamed functions.
19389 (expand_tuple_move): Use renamed functions.
19390 * config/riscv/riscv.cc (vector_zero_call_used_regs): Use
19392 * config/riscv/vector.md: Use renamed functions.
19394 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
19395 Michael Collison <collison@rivosinc.com>
19397 * config/riscv/autovec.md (<optab><mode>3): Add integer binops.
19398 * config/riscv/riscv-protos.h (emit_nonvlmax_binop): Declare.
19399 * config/riscv/riscv-v.cc (emit_pred_op): New function.
19400 (set_expander_dest_and_mask): New function.
19401 (emit_pred_binop): New function.
19402 (emit_nonvlmax_binop): New function.
19404 2023-05-11 Pan Li <pan2.li@intel.com>
19406 * cfgloopmanip.cc (create_empty_loop_on_edge): Add PLUS_EXPR.
19407 * gimple-loop-interchange.cc
19408 (tree_loop_interchange::map_inductions_to_loop): Ditto.
19409 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Ditto.
19410 * tree-ssa-loop-ivopts.cc (create_new_iv): Ditto.
19411 * tree-ssa-loop-manip.cc (create_iv): Ditto.
19412 (tree_transform_and_unroll_loop): Ditto.
19413 (canonicalize_loop_ivs): Ditto.
19414 * tree-ssa-loop-manip.h (create_iv): Ditto.
19415 * tree-vect-data-refs.cc (vect_create_data_ref_ptr): Ditto.
19416 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly):
19418 (vect_set_loop_condition_normal): Ditto.
19419 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Ditto.
19420 * tree-vect-stmts.cc (vectorizable_store): Ditto.
19421 (vectorizable_load): Ditto.
19423 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19425 * config/arm/arm-mve-builtins-base.cc (vmovlbq, vmovltq): New.
19426 * config/arm/arm-mve-builtins-base.def (vmovlbq, vmovltq): New.
19427 * config/arm/arm-mve-builtins-base.h (vmovlbq, vmovltq): New.
19428 * config/arm/arm_mve.h (vmovlbq): Remove.
19430 (vmovlbq_m): Remove.
19431 (vmovltq_m): Remove.
19432 (vmovlbq_x): Remove.
19433 (vmovltq_x): Remove.
19434 (vmovlbq_s8): Remove.
19435 (vmovlbq_s16): Remove.
19436 (vmovltq_s8): Remove.
19437 (vmovltq_s16): Remove.
19438 (vmovltq_u8): Remove.
19439 (vmovltq_u16): Remove.
19440 (vmovlbq_u8): Remove.
19441 (vmovlbq_u16): Remove.
19442 (vmovlbq_m_s8): Remove.
19443 (vmovltq_m_s8): Remove.
19444 (vmovlbq_m_u8): Remove.
19445 (vmovltq_m_u8): Remove.
19446 (vmovlbq_m_s16): Remove.
19447 (vmovltq_m_s16): Remove.
19448 (vmovlbq_m_u16): Remove.
19449 (vmovltq_m_u16): Remove.
19450 (vmovlbq_x_s8): Remove.
19451 (vmovlbq_x_s16): Remove.
19452 (vmovlbq_x_u8): Remove.
19453 (vmovlbq_x_u16): Remove.
19454 (vmovltq_x_s8): Remove.
19455 (vmovltq_x_s16): Remove.
19456 (vmovltq_x_u8): Remove.
19457 (vmovltq_x_u16): Remove.
19458 (__arm_vmovlbq_s8): Remove.
19459 (__arm_vmovlbq_s16): Remove.
19460 (__arm_vmovltq_s8): Remove.
19461 (__arm_vmovltq_s16): Remove.
19462 (__arm_vmovltq_u8): Remove.
19463 (__arm_vmovltq_u16): Remove.
19464 (__arm_vmovlbq_u8): Remove.
19465 (__arm_vmovlbq_u16): Remove.
19466 (__arm_vmovlbq_m_s8): Remove.
19467 (__arm_vmovltq_m_s8): Remove.
19468 (__arm_vmovlbq_m_u8): Remove.
19469 (__arm_vmovltq_m_u8): Remove.
19470 (__arm_vmovlbq_m_s16): Remove.
19471 (__arm_vmovltq_m_s16): Remove.
19472 (__arm_vmovlbq_m_u16): Remove.
19473 (__arm_vmovltq_m_u16): Remove.
19474 (__arm_vmovlbq_x_s8): Remove.
19475 (__arm_vmovlbq_x_s16): Remove.
19476 (__arm_vmovlbq_x_u8): Remove.
19477 (__arm_vmovlbq_x_u16): Remove.
19478 (__arm_vmovltq_x_s8): Remove.
19479 (__arm_vmovltq_x_s16): Remove.
19480 (__arm_vmovltq_x_u8): Remove.
19481 (__arm_vmovltq_x_u16): Remove.
19482 (__arm_vmovlbq): Remove.
19483 (__arm_vmovltq): Remove.
19484 (__arm_vmovlbq_m): Remove.
19485 (__arm_vmovltq_m): Remove.
19486 (__arm_vmovlbq_x): Remove.
19487 (__arm_vmovltq_x): Remove.
19489 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19491 * config/arm/arm-mve-builtins-shapes.cc (unary_widen): New.
19492 * config/arm/arm-mve-builtins-shapes.h (unary_widen): New.
19494 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19496 * config/arm/iterators.md (mve_insn): Add vmovlb, vmovlt.
19497 (VMOVLBQ, VMOVLTQ): Merge into ...
19498 (VMOVLxQ): ... this.
19499 (VMOVLTQ_M, VMOVLBQ_M): Merge into ...
19500 (VMOVLxQ_M): ... this.
19501 * config/arm/mve.md (mve_vmovltq_<supf><mode>)
19502 (mve_vmovlbq_<supf><mode>): Merge into ...
19503 (@mve_<mve_insn>q_<supf><mode>): ... this.
19504 (mve_vmovlbq_m_<supf><mode>, mve_vmovltq_m_<supf><mode>): Merge
19506 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
19508 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19510 * config/arm/arm-mve-builtins-base.cc (vaddlvq): New.
19511 * config/arm/arm-mve-builtins-base.def (vaddlvq): New.
19512 * config/arm/arm-mve-builtins-base.h (vaddlvq): New.
19513 * config/arm/arm-mve-builtins-functions.h
19514 (unspec_mve_function_exact_insn_pred_p): Handle vaddlvq.
19515 * config/arm/arm_mve.h (vaddlvq): Remove.
19516 (vaddlvq_p): Remove.
19517 (vaddlvq_s32): Remove.
19518 (vaddlvq_u32): Remove.
19519 (vaddlvq_p_s32): Remove.
19520 (vaddlvq_p_u32): Remove.
19521 (__arm_vaddlvq_s32): Remove.
19522 (__arm_vaddlvq_u32): Remove.
19523 (__arm_vaddlvq_p_s32): Remove.
19524 (__arm_vaddlvq_p_u32): Remove.
19525 (__arm_vaddlvq): Remove.
19526 (__arm_vaddlvq_p): Remove.
19528 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19530 * config/arm/iterators.md (mve_insn): Add vaddlv.
19531 * config/arm/mve.md (mve_vaddlvq_<supf>v4si): Rename into ...
19532 (@mve_<mve_insn>q_<supf>v4si): ... this.
19533 (mve_vaddlvq_p_<supf>v4si): Rename into ...
19534 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
19536 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19538 * config/arm/arm-mve-builtins-shapes.cc (unary_acc): New.
19539 * config/arm/arm-mve-builtins-shapes.h (unary_acc): New.
19541 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19543 * config/arm/arm-mve-builtins-base.cc (vaddvaq): New.
19544 * config/arm/arm-mve-builtins-base.def (vaddvaq): New.
19545 * config/arm/arm-mve-builtins-base.h (vaddvaq): New.
19546 * config/arm/arm_mve.h (vaddvaq): Remove.
19547 (vaddvaq_p): Remove.
19548 (vaddvaq_u8): Remove.
19549 (vaddvaq_s8): Remove.
19550 (vaddvaq_u16): Remove.
19551 (vaddvaq_s16): Remove.
19552 (vaddvaq_u32): Remove.
19553 (vaddvaq_s32): Remove.
19554 (vaddvaq_p_u8): Remove.
19555 (vaddvaq_p_s8): Remove.
19556 (vaddvaq_p_u16): Remove.
19557 (vaddvaq_p_s16): Remove.
19558 (vaddvaq_p_u32): Remove.
19559 (vaddvaq_p_s32): Remove.
19560 (__arm_vaddvaq_u8): Remove.
19561 (__arm_vaddvaq_s8): Remove.
19562 (__arm_vaddvaq_u16): Remove.
19563 (__arm_vaddvaq_s16): Remove.
19564 (__arm_vaddvaq_u32): Remove.
19565 (__arm_vaddvaq_s32): Remove.
19566 (__arm_vaddvaq_p_u8): Remove.
19567 (__arm_vaddvaq_p_s8): Remove.
19568 (__arm_vaddvaq_p_u16): Remove.
19569 (__arm_vaddvaq_p_s16): Remove.
19570 (__arm_vaddvaq_p_u32): Remove.
19571 (__arm_vaddvaq_p_s32): Remove.
19572 (__arm_vaddvaq): Remove.
19573 (__arm_vaddvaq_p): Remove.
19575 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19577 * config/arm/arm-mve-builtins-shapes.cc (unary_int32_acc): New.
19578 * config/arm/arm-mve-builtins-shapes.h (unary_int32_acc): New.
19580 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19582 * config/arm/iterators.md (mve_insn): Add vaddva.
19583 * config/arm/mve.md (mve_vaddvaq_<supf><mode>): Rename into ...
19584 (@mve_<mve_insn>q_<supf><mode>): ... this.
19585 (mve_vaddvaq_p_<supf><mode>): Rename into ...
19586 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
19588 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19590 * config/arm/arm-mve-builtins-base.cc (vaddvq): New.
19591 * config/arm/arm-mve-builtins-base.def (vaddvq): New.
19592 * config/arm/arm-mve-builtins-base.h (vaddvq): New.
19593 * config/arm/arm_mve.h (vaddvq): Remove.
19594 (vaddvq_p): Remove.
19595 (vaddvq_s8): Remove.
19596 (vaddvq_s16): Remove.
19597 (vaddvq_s32): Remove.
19598 (vaddvq_u8): Remove.
19599 (vaddvq_u16): Remove.
19600 (vaddvq_u32): Remove.
19601 (vaddvq_p_u8): Remove.
19602 (vaddvq_p_s8): Remove.
19603 (vaddvq_p_u16): Remove.
19604 (vaddvq_p_s16): Remove.
19605 (vaddvq_p_u32): Remove.
19606 (vaddvq_p_s32): Remove.
19607 (__arm_vaddvq_s8): Remove.
19608 (__arm_vaddvq_s16): Remove.
19609 (__arm_vaddvq_s32): Remove.
19610 (__arm_vaddvq_u8): Remove.
19611 (__arm_vaddvq_u16): Remove.
19612 (__arm_vaddvq_u32): Remove.
19613 (__arm_vaddvq_p_u8): Remove.
19614 (__arm_vaddvq_p_s8): Remove.
19615 (__arm_vaddvq_p_u16): Remove.
19616 (__arm_vaddvq_p_s16): Remove.
19617 (__arm_vaddvq_p_u32): Remove.
19618 (__arm_vaddvq_p_s32): Remove.
19619 (__arm_vaddvq): Remove.
19620 (__arm_vaddvq_p): Remove.
19622 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19624 * config/arm/arm-mve-builtins-shapes.cc (unary_int32): New.
19625 * config/arm/arm-mve-builtins-shapes.h (unary_int32): New.
19627 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19629 * config/arm/iterators.md (mve_insn): Add vaddv.
19630 * config/arm/mve.md (@mve_vaddvq_<supf><mode>): Rename into ...
19631 (@mve_<mve_insn>q_<supf><mode>): ... this.
19632 (mve_vaddvq_p_<supf><mode>): Rename into ...
19633 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
19634 * config/arm/vec-common.md: Use gen_mve_q instead of
19637 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19639 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N): New.
19641 * config/arm/arm-mve-builtins-base.def (vdupq): New.
19642 * config/arm/arm-mve-builtins-base.h: (vdupq): New.
19643 * config/arm/arm_mve.h (vdupq_n): Remove.
19645 (vdupq_n_f16): Remove.
19646 (vdupq_n_f32): Remove.
19647 (vdupq_n_s8): Remove.
19648 (vdupq_n_s16): Remove.
19649 (vdupq_n_s32): Remove.
19650 (vdupq_n_u8): Remove.
19651 (vdupq_n_u16): Remove.
19652 (vdupq_n_u32): Remove.
19653 (vdupq_m_n_u8): Remove.
19654 (vdupq_m_n_s8): Remove.
19655 (vdupq_m_n_u16): Remove.
19656 (vdupq_m_n_s16): Remove.
19657 (vdupq_m_n_u32): Remove.
19658 (vdupq_m_n_s32): Remove.
19659 (vdupq_m_n_f16): Remove.
19660 (vdupq_m_n_f32): Remove.
19661 (vdupq_x_n_s8): Remove.
19662 (vdupq_x_n_s16): Remove.
19663 (vdupq_x_n_s32): Remove.
19664 (vdupq_x_n_u8): Remove.
19665 (vdupq_x_n_u16): Remove.
19666 (vdupq_x_n_u32): Remove.
19667 (vdupq_x_n_f16): Remove.
19668 (vdupq_x_n_f32): Remove.
19669 (__arm_vdupq_n_s8): Remove.
19670 (__arm_vdupq_n_s16): Remove.
19671 (__arm_vdupq_n_s32): Remove.
19672 (__arm_vdupq_n_u8): Remove.
19673 (__arm_vdupq_n_u16): Remove.
19674 (__arm_vdupq_n_u32): Remove.
19675 (__arm_vdupq_m_n_u8): Remove.
19676 (__arm_vdupq_m_n_s8): Remove.
19677 (__arm_vdupq_m_n_u16): Remove.
19678 (__arm_vdupq_m_n_s16): Remove.
19679 (__arm_vdupq_m_n_u32): Remove.
19680 (__arm_vdupq_m_n_s32): Remove.
19681 (__arm_vdupq_x_n_s8): Remove.
19682 (__arm_vdupq_x_n_s16): Remove.
19683 (__arm_vdupq_x_n_s32): Remove.
19684 (__arm_vdupq_x_n_u8): Remove.
19685 (__arm_vdupq_x_n_u16): Remove.
19686 (__arm_vdupq_x_n_u32): Remove.
19687 (__arm_vdupq_n_f16): Remove.
19688 (__arm_vdupq_n_f32): Remove.
19689 (__arm_vdupq_m_n_f16): Remove.
19690 (__arm_vdupq_m_n_f32): Remove.
19691 (__arm_vdupq_x_n_f16): Remove.
19692 (__arm_vdupq_x_n_f32): Remove.
19693 (__arm_vdupq_n): Remove.
19694 (__arm_vdupq_m): Remove.
19696 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19698 * config/arm/arm-mve-builtins-shapes.cc (unary_n): New.
19699 * config/arm/arm-mve-builtins-shapes.h (unary_n): New.
19701 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19703 * config/arm/iterators.md (MVE_FP_M_N_VDUPQ_ONLY)
19704 (MVE_FP_N_VDUPQ_ONLY): New.
19705 (mve_insn): Add vdupq.
19706 * config/arm/mve.md (mve_vdupq_n_f<mode>): Rename into ...
19707 (@mve_<mve_insn>q_n_f<mode>): ... this.
19708 (mve_vdupq_n_<supf><mode>): Rename into ...
19709 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
19710 (mve_vdupq_m_n_<supf><mode>): Rename into ...
19711 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
19712 (mve_vdupq_m_n_f<mode>): Rename into ...
19713 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
19715 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19717 * config/arm/arm-mve-builtins-base.cc (vrev16q, vrev32q, vrev64q):
19719 * config/arm/arm-mve-builtins-base.def (vrev16q, vrev32q)
19721 * config/arm/arm-mve-builtins-base.h (vrev16q, vrev32q)
19723 * config/arm/arm_mve.h (vrev16q): Remove.
19726 (vrev64q_m): Remove.
19727 (vrev16q_m): Remove.
19728 (vrev32q_m): Remove.
19729 (vrev16q_x): Remove.
19730 (vrev32q_x): Remove.
19731 (vrev64q_x): Remove.
19732 (vrev64q_f16): Remove.
19733 (vrev64q_f32): Remove.
19734 (vrev32q_f16): Remove.
19735 (vrev16q_s8): Remove.
19736 (vrev32q_s8): Remove.
19737 (vrev32q_s16): Remove.
19738 (vrev64q_s8): Remove.
19739 (vrev64q_s16): Remove.
19740 (vrev64q_s32): Remove.
19741 (vrev64q_u8): Remove.
19742 (vrev64q_u16): Remove.
19743 (vrev64q_u32): Remove.
19744 (vrev32q_u8): Remove.
19745 (vrev32q_u16): Remove.
19746 (vrev16q_u8): Remove.
19747 (vrev64q_m_u8): Remove.
19748 (vrev64q_m_s8): Remove.
19749 (vrev64q_m_u16): Remove.
19750 (vrev64q_m_s16): Remove.
19751 (vrev64q_m_u32): Remove.
19752 (vrev64q_m_s32): Remove.
19753 (vrev16q_m_s8): Remove.
19754 (vrev32q_m_f16): Remove.
19755 (vrev16q_m_u8): Remove.
19756 (vrev32q_m_s8): Remove.
19757 (vrev64q_m_f16): Remove.
19758 (vrev32q_m_u8): Remove.
19759 (vrev32q_m_s16): Remove.
19760 (vrev64q_m_f32): Remove.
19761 (vrev32q_m_u16): Remove.
19762 (vrev16q_x_s8): Remove.
19763 (vrev16q_x_u8): Remove.
19764 (vrev32q_x_s8): Remove.
19765 (vrev32q_x_s16): Remove.
19766 (vrev32q_x_u8): Remove.
19767 (vrev32q_x_u16): Remove.
19768 (vrev64q_x_s8): Remove.
19769 (vrev64q_x_s16): Remove.
19770 (vrev64q_x_s32): Remove.
19771 (vrev64q_x_u8): Remove.
19772 (vrev64q_x_u16): Remove.
19773 (vrev64q_x_u32): Remove.
19774 (vrev32q_x_f16): Remove.
19775 (vrev64q_x_f16): Remove.
19776 (vrev64q_x_f32): Remove.
19777 (__arm_vrev16q_s8): Remove.
19778 (__arm_vrev32q_s8): Remove.
19779 (__arm_vrev32q_s16): Remove.
19780 (__arm_vrev64q_s8): Remove.
19781 (__arm_vrev64q_s16): Remove.
19782 (__arm_vrev64q_s32): Remove.
19783 (__arm_vrev64q_u8): Remove.
19784 (__arm_vrev64q_u16): Remove.
19785 (__arm_vrev64q_u32): Remove.
19786 (__arm_vrev32q_u8): Remove.
19787 (__arm_vrev32q_u16): Remove.
19788 (__arm_vrev16q_u8): Remove.
19789 (__arm_vrev64q_m_u8): Remove.
19790 (__arm_vrev64q_m_s8): Remove.
19791 (__arm_vrev64q_m_u16): Remove.
19792 (__arm_vrev64q_m_s16): Remove.
19793 (__arm_vrev64q_m_u32): Remove.
19794 (__arm_vrev64q_m_s32): Remove.
19795 (__arm_vrev16q_m_s8): Remove.
19796 (__arm_vrev16q_m_u8): Remove.
19797 (__arm_vrev32q_m_s8): Remove.
19798 (__arm_vrev32q_m_u8): Remove.
19799 (__arm_vrev32q_m_s16): Remove.
19800 (__arm_vrev32q_m_u16): Remove.
19801 (__arm_vrev16q_x_s8): Remove.
19802 (__arm_vrev16q_x_u8): Remove.
19803 (__arm_vrev32q_x_s8): Remove.
19804 (__arm_vrev32q_x_s16): Remove.
19805 (__arm_vrev32q_x_u8): Remove.
19806 (__arm_vrev32q_x_u16): Remove.
19807 (__arm_vrev64q_x_s8): Remove.
19808 (__arm_vrev64q_x_s16): Remove.
19809 (__arm_vrev64q_x_s32): Remove.
19810 (__arm_vrev64q_x_u8): Remove.
19811 (__arm_vrev64q_x_u16): Remove.
19812 (__arm_vrev64q_x_u32): Remove.
19813 (__arm_vrev64q_f16): Remove.
19814 (__arm_vrev64q_f32): Remove.
19815 (__arm_vrev32q_f16): Remove.
19816 (__arm_vrev32q_m_f16): Remove.
19817 (__arm_vrev64q_m_f16): Remove.
19818 (__arm_vrev64q_m_f32): Remove.
19819 (__arm_vrev32q_x_f16): Remove.
19820 (__arm_vrev64q_x_f16): Remove.
19821 (__arm_vrev64q_x_f32): Remove.
19822 (__arm_vrev16q): Remove.
19823 (__arm_vrev32q): Remove.
19824 (__arm_vrev64q): Remove.
19825 (__arm_vrev64q_m): Remove.
19826 (__arm_vrev16q_m): Remove.
19827 (__arm_vrev32q_m): Remove.
19828 (__arm_vrev16q_x): Remove.
19829 (__arm_vrev32q_x): Remove.
19830 (__arm_vrev64q_x): Remove.
19832 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19834 * config/arm/iterators.md (MVE_V8HF, MVE_V16QI)
19835 (MVE_FP_VREV64Q_ONLY, MVE_FP_M_VREV64Q_ONLY, MVE_FP_VREV32Q_ONLY)
19836 (MVE_FP_M_VREV32Q_ONLY): New iterators.
19837 (mve_insn): Add vrev16q, vrev32q, vrev64q.
19838 * config/arm/mve.md (mve_vrev64q_f<mode>): Rename into ...
19839 (@mve_<mve_insn>q_f<mode>): ... this
19840 (mve_vrev32q_fv8hf): Rename into @mve_<mve_insn>q_f<mode>.
19841 (mve_vrev64q_<supf><mode>): Rename into ...
19842 (@mve_<mve_insn>q_<supf><mode>): ... this.
19843 (mve_vrev32q_<supf><mode>): Rename into
19844 @mve_<mve_insn>q_<supf><mode>.
19845 (mve_vrev16q_<supf>v16qi): Rename into
19846 @mve_<mve_insn>q_<supf><mode>.
19847 (mve_vrev64q_m_<supf><mode>): Rename into
19848 @mve_<mve_insn>q_m_<supf><mode>.
19849 (mve_vrev32q_m_fv8hf): Rename into @mve_<mve_insn>q_m_f<mode>.
19850 (mve_vrev32q_m_<supf><mode>): Rename into
19851 @mve_<mve_insn>q_m_<supf><mode>.
19852 (mve_vrev64q_m_f<mode>): Rename into @mve_<mve_insn>q_m_f<mode>.
19853 (mve_vrev16q_m_<supf>v16qi): Rename into
19854 @mve_<mve_insn>q_m_<supf><mode>.
19856 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19858 * config/arm/arm-mve-builtins-base.cc (vcmpeqq, vcmpneq, vcmpgeq)
19859 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
19860 * config/arm/arm-mve-builtins-base.def (vcmpeqq, vcmpneq, vcmpgeq)
19861 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
19862 * config/arm/arm-mve-builtins-base.h (vcmpeqq, vcmpneq, vcmpgeq)
19863 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
19864 * config/arm/arm-mve-builtins-functions.h (class
19865 unspec_based_mve_function_exact_insn_vcmp): New.
19866 * config/arm/arm-mve-builtins.cc
19867 (function_instance::has_inactive_argument): Handle vcmp.
19868 * config/arm/arm_mve.h (vcmpneq): Remove.
19876 (vcmpneq_m): Remove.
19877 (vcmphiq_m): Remove.
19878 (vcmpeqq_m): Remove.
19879 (vcmpcsq_m): Remove.
19880 (vcmpcsq_m_n): Remove.
19881 (vcmpltq_m): Remove.
19882 (vcmpleq_m): Remove.
19883 (vcmpgtq_m): Remove.
19884 (vcmpgeq_m): Remove.
19885 (vcmpneq_s8): Remove.
19886 (vcmpneq_s16): Remove.
19887 (vcmpneq_s32): Remove.
19888 (vcmpneq_u8): Remove.
19889 (vcmpneq_u16): Remove.
19890 (vcmpneq_u32): Remove.
19891 (vcmpneq_n_u8): Remove.
19892 (vcmphiq_u8): Remove.
19893 (vcmphiq_n_u8): Remove.
19894 (vcmpeqq_u8): Remove.
19895 (vcmpeqq_n_u8): Remove.
19896 (vcmpcsq_u8): Remove.
19897 (vcmpcsq_n_u8): Remove.
19898 (vcmpneq_n_s8): Remove.
19899 (vcmpltq_s8): Remove.
19900 (vcmpltq_n_s8): Remove.
19901 (vcmpleq_s8): Remove.
19902 (vcmpleq_n_s8): Remove.
19903 (vcmpgtq_s8): Remove.
19904 (vcmpgtq_n_s8): Remove.
19905 (vcmpgeq_s8): Remove.
19906 (vcmpgeq_n_s8): Remove.
19907 (vcmpeqq_s8): Remove.
19908 (vcmpeqq_n_s8): Remove.
19909 (vcmpneq_n_u16): Remove.
19910 (vcmphiq_u16): Remove.
19911 (vcmphiq_n_u16): Remove.
19912 (vcmpeqq_u16): Remove.
19913 (vcmpeqq_n_u16): Remove.
19914 (vcmpcsq_u16): Remove.
19915 (vcmpcsq_n_u16): Remove.
19916 (vcmpneq_n_s16): Remove.
19917 (vcmpltq_s16): Remove.
19918 (vcmpltq_n_s16): Remove.
19919 (vcmpleq_s16): Remove.
19920 (vcmpleq_n_s16): Remove.
19921 (vcmpgtq_s16): Remove.
19922 (vcmpgtq_n_s16): Remove.
19923 (vcmpgeq_s16): Remove.
19924 (vcmpgeq_n_s16): Remove.
19925 (vcmpeqq_s16): Remove.
19926 (vcmpeqq_n_s16): Remove.
19927 (vcmpneq_n_u32): Remove.
19928 (vcmphiq_u32): Remove.
19929 (vcmphiq_n_u32): Remove.
19930 (vcmpeqq_u32): Remove.
19931 (vcmpeqq_n_u32): Remove.
19932 (vcmpcsq_u32): Remove.
19933 (vcmpcsq_n_u32): Remove.
19934 (vcmpneq_n_s32): Remove.
19935 (vcmpltq_s32): Remove.
19936 (vcmpltq_n_s32): Remove.
19937 (vcmpleq_s32): Remove.
19938 (vcmpleq_n_s32): Remove.
19939 (vcmpgtq_s32): Remove.
19940 (vcmpgtq_n_s32): Remove.
19941 (vcmpgeq_s32): Remove.
19942 (vcmpgeq_n_s32): Remove.
19943 (vcmpeqq_s32): Remove.
19944 (vcmpeqq_n_s32): Remove.
19945 (vcmpneq_n_f16): Remove.
19946 (vcmpneq_f16): Remove.
19947 (vcmpltq_n_f16): Remove.
19948 (vcmpltq_f16): Remove.
19949 (vcmpleq_n_f16): Remove.
19950 (vcmpleq_f16): Remove.
19951 (vcmpgtq_n_f16): Remove.
19952 (vcmpgtq_f16): Remove.
19953 (vcmpgeq_n_f16): Remove.
19954 (vcmpgeq_f16): Remove.
19955 (vcmpeqq_n_f16): Remove.
19956 (vcmpeqq_f16): Remove.
19957 (vcmpneq_n_f32): Remove.
19958 (vcmpneq_f32): Remove.
19959 (vcmpltq_n_f32): Remove.
19960 (vcmpltq_f32): Remove.
19961 (vcmpleq_n_f32): Remove.
19962 (vcmpleq_f32): Remove.
19963 (vcmpgtq_n_f32): Remove.
19964 (vcmpgtq_f32): Remove.
19965 (vcmpgeq_n_f32): Remove.
19966 (vcmpgeq_f32): Remove.
19967 (vcmpeqq_n_f32): Remove.
19968 (vcmpeqq_f32): Remove.
19969 (vcmpeqq_m_f16): Remove.
19970 (vcmpeqq_m_f32): Remove.
19971 (vcmpneq_m_u8): Remove.
19972 (vcmpneq_m_n_u8): Remove.
19973 (vcmphiq_m_u8): Remove.
19974 (vcmphiq_m_n_u8): Remove.
19975 (vcmpeqq_m_u8): Remove.
19976 (vcmpeqq_m_n_u8): Remove.
19977 (vcmpcsq_m_u8): Remove.
19978 (vcmpcsq_m_n_u8): Remove.
19979 (vcmpneq_m_s8): Remove.
19980 (vcmpneq_m_n_s8): Remove.
19981 (vcmpltq_m_s8): Remove.
19982 (vcmpltq_m_n_s8): Remove.
19983 (vcmpleq_m_s8): Remove.
19984 (vcmpleq_m_n_s8): Remove.
19985 (vcmpgtq_m_s8): Remove.
19986 (vcmpgtq_m_n_s8): Remove.
19987 (vcmpgeq_m_s8): Remove.
19988 (vcmpgeq_m_n_s8): Remove.
19989 (vcmpeqq_m_s8): Remove.
19990 (vcmpeqq_m_n_s8): Remove.
19991 (vcmpneq_m_u16): Remove.
19992 (vcmpneq_m_n_u16): Remove.
19993 (vcmphiq_m_u16): Remove.
19994 (vcmphiq_m_n_u16): Remove.
19995 (vcmpeqq_m_u16): Remove.
19996 (vcmpeqq_m_n_u16): Remove.
19997 (vcmpcsq_m_u16): Remove.
19998 (vcmpcsq_m_n_u16): Remove.
19999 (vcmpneq_m_s16): Remove.
20000 (vcmpneq_m_n_s16): Remove.
20001 (vcmpltq_m_s16): Remove.
20002 (vcmpltq_m_n_s16): Remove.
20003 (vcmpleq_m_s16): Remove.
20004 (vcmpleq_m_n_s16): Remove.
20005 (vcmpgtq_m_s16): Remove.
20006 (vcmpgtq_m_n_s16): Remove.
20007 (vcmpgeq_m_s16): Remove.
20008 (vcmpgeq_m_n_s16): Remove.
20009 (vcmpeqq_m_s16): Remove.
20010 (vcmpeqq_m_n_s16): Remove.
20011 (vcmpneq_m_u32): Remove.
20012 (vcmpneq_m_n_u32): Remove.
20013 (vcmphiq_m_u32): Remove.
20014 (vcmphiq_m_n_u32): Remove.
20015 (vcmpeqq_m_u32): Remove.
20016 (vcmpeqq_m_n_u32): Remove.
20017 (vcmpcsq_m_u32): Remove.
20018 (vcmpcsq_m_n_u32): Remove.
20019 (vcmpneq_m_s32): Remove.
20020 (vcmpneq_m_n_s32): Remove.
20021 (vcmpltq_m_s32): Remove.
20022 (vcmpltq_m_n_s32): Remove.
20023 (vcmpleq_m_s32): Remove.
20024 (vcmpleq_m_n_s32): Remove.
20025 (vcmpgtq_m_s32): Remove.
20026 (vcmpgtq_m_n_s32): Remove.
20027 (vcmpgeq_m_s32): Remove.
20028 (vcmpgeq_m_n_s32): Remove.
20029 (vcmpeqq_m_s32): Remove.
20030 (vcmpeqq_m_n_s32): Remove.
20031 (vcmpeqq_m_n_f16): Remove.
20032 (vcmpgeq_m_f16): Remove.
20033 (vcmpgeq_m_n_f16): Remove.
20034 (vcmpgtq_m_f16): Remove.
20035 (vcmpgtq_m_n_f16): Remove.
20036 (vcmpleq_m_f16): Remove.
20037 (vcmpleq_m_n_f16): Remove.
20038 (vcmpltq_m_f16): Remove.
20039 (vcmpltq_m_n_f16): Remove.
20040 (vcmpneq_m_f16): Remove.
20041 (vcmpneq_m_n_f16): Remove.
20042 (vcmpeqq_m_n_f32): Remove.
20043 (vcmpgeq_m_f32): Remove.
20044 (vcmpgeq_m_n_f32): Remove.
20045 (vcmpgtq_m_f32): Remove.
20046 (vcmpgtq_m_n_f32): Remove.
20047 (vcmpleq_m_f32): Remove.
20048 (vcmpleq_m_n_f32): Remove.
20049 (vcmpltq_m_f32): Remove.
20050 (vcmpltq_m_n_f32): Remove.
20051 (vcmpneq_m_f32): Remove.
20052 (vcmpneq_m_n_f32): Remove.
20053 (__arm_vcmpneq_s8): Remove.
20054 (__arm_vcmpneq_s16): Remove.
20055 (__arm_vcmpneq_s32): Remove.
20056 (__arm_vcmpneq_u8): Remove.
20057 (__arm_vcmpneq_u16): Remove.
20058 (__arm_vcmpneq_u32): Remove.
20059 (__arm_vcmpneq_n_u8): Remove.
20060 (__arm_vcmphiq_u8): Remove.
20061 (__arm_vcmphiq_n_u8): Remove.
20062 (__arm_vcmpeqq_u8): Remove.
20063 (__arm_vcmpeqq_n_u8): Remove.
20064 (__arm_vcmpcsq_u8): Remove.
20065 (__arm_vcmpcsq_n_u8): Remove.
20066 (__arm_vcmpneq_n_s8): Remove.
20067 (__arm_vcmpltq_s8): Remove.
20068 (__arm_vcmpltq_n_s8): Remove.
20069 (__arm_vcmpleq_s8): Remove.
20070 (__arm_vcmpleq_n_s8): Remove.
20071 (__arm_vcmpgtq_s8): Remove.
20072 (__arm_vcmpgtq_n_s8): Remove.
20073 (__arm_vcmpgeq_s8): Remove.
20074 (__arm_vcmpgeq_n_s8): Remove.
20075 (__arm_vcmpeqq_s8): Remove.
20076 (__arm_vcmpeqq_n_s8): Remove.
20077 (__arm_vcmpneq_n_u16): Remove.
20078 (__arm_vcmphiq_u16): Remove.
20079 (__arm_vcmphiq_n_u16): Remove.
20080 (__arm_vcmpeqq_u16): Remove.
20081 (__arm_vcmpeqq_n_u16): Remove.
20082 (__arm_vcmpcsq_u16): Remove.
20083 (__arm_vcmpcsq_n_u16): Remove.
20084 (__arm_vcmpneq_n_s16): Remove.
20085 (__arm_vcmpltq_s16): Remove.
20086 (__arm_vcmpltq_n_s16): Remove.
20087 (__arm_vcmpleq_s16): Remove.
20088 (__arm_vcmpleq_n_s16): Remove.
20089 (__arm_vcmpgtq_s16): Remove.
20090 (__arm_vcmpgtq_n_s16): Remove.
20091 (__arm_vcmpgeq_s16): Remove.
20092 (__arm_vcmpgeq_n_s16): Remove.
20093 (__arm_vcmpeqq_s16): Remove.
20094 (__arm_vcmpeqq_n_s16): Remove.
20095 (__arm_vcmpneq_n_u32): Remove.
20096 (__arm_vcmphiq_u32): Remove.
20097 (__arm_vcmphiq_n_u32): Remove.
20098 (__arm_vcmpeqq_u32): Remove.
20099 (__arm_vcmpeqq_n_u32): Remove.
20100 (__arm_vcmpcsq_u32): Remove.
20101 (__arm_vcmpcsq_n_u32): Remove.
20102 (__arm_vcmpneq_n_s32): Remove.
20103 (__arm_vcmpltq_s32): Remove.
20104 (__arm_vcmpltq_n_s32): Remove.
20105 (__arm_vcmpleq_s32): Remove.
20106 (__arm_vcmpleq_n_s32): Remove.
20107 (__arm_vcmpgtq_s32): Remove.
20108 (__arm_vcmpgtq_n_s32): Remove.
20109 (__arm_vcmpgeq_s32): Remove.
20110 (__arm_vcmpgeq_n_s32): Remove.
20111 (__arm_vcmpeqq_s32): Remove.
20112 (__arm_vcmpeqq_n_s32): Remove.
20113 (__arm_vcmpneq_m_u8): Remove.
20114 (__arm_vcmpneq_m_n_u8): Remove.
20115 (__arm_vcmphiq_m_u8): Remove.
20116 (__arm_vcmphiq_m_n_u8): Remove.
20117 (__arm_vcmpeqq_m_u8): Remove.
20118 (__arm_vcmpeqq_m_n_u8): Remove.
20119 (__arm_vcmpcsq_m_u8): Remove.
20120 (__arm_vcmpcsq_m_n_u8): Remove.
20121 (__arm_vcmpneq_m_s8): Remove.
20122 (__arm_vcmpneq_m_n_s8): Remove.
20123 (__arm_vcmpltq_m_s8): Remove.
20124 (__arm_vcmpltq_m_n_s8): Remove.
20125 (__arm_vcmpleq_m_s8): Remove.
20126 (__arm_vcmpleq_m_n_s8): Remove.
20127 (__arm_vcmpgtq_m_s8): Remove.
20128 (__arm_vcmpgtq_m_n_s8): Remove.
20129 (__arm_vcmpgeq_m_s8): Remove.
20130 (__arm_vcmpgeq_m_n_s8): Remove.
20131 (__arm_vcmpeqq_m_s8): Remove.
20132 (__arm_vcmpeqq_m_n_s8): Remove.
20133 (__arm_vcmpneq_m_u16): Remove.
20134 (__arm_vcmpneq_m_n_u16): Remove.
20135 (__arm_vcmphiq_m_u16): Remove.
20136 (__arm_vcmphiq_m_n_u16): Remove.
20137 (__arm_vcmpeqq_m_u16): Remove.
20138 (__arm_vcmpeqq_m_n_u16): Remove.
20139 (__arm_vcmpcsq_m_u16): Remove.
20140 (__arm_vcmpcsq_m_n_u16): Remove.
20141 (__arm_vcmpneq_m_s16): Remove.
20142 (__arm_vcmpneq_m_n_s16): Remove.
20143 (__arm_vcmpltq_m_s16): Remove.
20144 (__arm_vcmpltq_m_n_s16): Remove.
20145 (__arm_vcmpleq_m_s16): Remove.
20146 (__arm_vcmpleq_m_n_s16): Remove.
20147 (__arm_vcmpgtq_m_s16): Remove.
20148 (__arm_vcmpgtq_m_n_s16): Remove.
20149 (__arm_vcmpgeq_m_s16): Remove.
20150 (__arm_vcmpgeq_m_n_s16): Remove.
20151 (__arm_vcmpeqq_m_s16): Remove.
20152 (__arm_vcmpeqq_m_n_s16): Remove.
20153 (__arm_vcmpneq_m_u32): Remove.
20154 (__arm_vcmpneq_m_n_u32): Remove.
20155 (__arm_vcmphiq_m_u32): Remove.
20156 (__arm_vcmphiq_m_n_u32): Remove.
20157 (__arm_vcmpeqq_m_u32): Remove.
20158 (__arm_vcmpeqq_m_n_u32): Remove.
20159 (__arm_vcmpcsq_m_u32): Remove.
20160 (__arm_vcmpcsq_m_n_u32): Remove.
20161 (__arm_vcmpneq_m_s32): Remove.
20162 (__arm_vcmpneq_m_n_s32): Remove.
20163 (__arm_vcmpltq_m_s32): Remove.
20164 (__arm_vcmpltq_m_n_s32): Remove.
20165 (__arm_vcmpleq_m_s32): Remove.
20166 (__arm_vcmpleq_m_n_s32): Remove.
20167 (__arm_vcmpgtq_m_s32): Remove.
20168 (__arm_vcmpgtq_m_n_s32): Remove.
20169 (__arm_vcmpgeq_m_s32): Remove.
20170 (__arm_vcmpgeq_m_n_s32): Remove.
20171 (__arm_vcmpeqq_m_s32): Remove.
20172 (__arm_vcmpeqq_m_n_s32): Remove.
20173 (__arm_vcmpneq_n_f16): Remove.
20174 (__arm_vcmpneq_f16): Remove.
20175 (__arm_vcmpltq_n_f16): Remove.
20176 (__arm_vcmpltq_f16): Remove.
20177 (__arm_vcmpleq_n_f16): Remove.
20178 (__arm_vcmpleq_f16): Remove.
20179 (__arm_vcmpgtq_n_f16): Remove.
20180 (__arm_vcmpgtq_f16): Remove.
20181 (__arm_vcmpgeq_n_f16): Remove.
20182 (__arm_vcmpgeq_f16): Remove.
20183 (__arm_vcmpeqq_n_f16): Remove.
20184 (__arm_vcmpeqq_f16): Remove.
20185 (__arm_vcmpneq_n_f32): Remove.
20186 (__arm_vcmpneq_f32): Remove.
20187 (__arm_vcmpltq_n_f32): Remove.
20188 (__arm_vcmpltq_f32): Remove.
20189 (__arm_vcmpleq_n_f32): Remove.
20190 (__arm_vcmpleq_f32): Remove.
20191 (__arm_vcmpgtq_n_f32): Remove.
20192 (__arm_vcmpgtq_f32): Remove.
20193 (__arm_vcmpgeq_n_f32): Remove.
20194 (__arm_vcmpgeq_f32): Remove.
20195 (__arm_vcmpeqq_n_f32): Remove.
20196 (__arm_vcmpeqq_f32): Remove.
20197 (__arm_vcmpeqq_m_f16): Remove.
20198 (__arm_vcmpeqq_m_f32): Remove.
20199 (__arm_vcmpeqq_m_n_f16): Remove.
20200 (__arm_vcmpgeq_m_f16): Remove.
20201 (__arm_vcmpgeq_m_n_f16): Remove.
20202 (__arm_vcmpgtq_m_f16): Remove.
20203 (__arm_vcmpgtq_m_n_f16): Remove.
20204 (__arm_vcmpleq_m_f16): Remove.
20205 (__arm_vcmpleq_m_n_f16): Remove.
20206 (__arm_vcmpltq_m_f16): Remove.
20207 (__arm_vcmpltq_m_n_f16): Remove.
20208 (__arm_vcmpneq_m_f16): Remove.
20209 (__arm_vcmpneq_m_n_f16): Remove.
20210 (__arm_vcmpeqq_m_n_f32): Remove.
20211 (__arm_vcmpgeq_m_f32): Remove.
20212 (__arm_vcmpgeq_m_n_f32): Remove.
20213 (__arm_vcmpgtq_m_f32): Remove.
20214 (__arm_vcmpgtq_m_n_f32): Remove.
20215 (__arm_vcmpleq_m_f32): Remove.
20216 (__arm_vcmpleq_m_n_f32): Remove.
20217 (__arm_vcmpltq_m_f32): Remove.
20218 (__arm_vcmpltq_m_n_f32): Remove.
20219 (__arm_vcmpneq_m_f32): Remove.
20220 (__arm_vcmpneq_m_n_f32): Remove.
20221 (__arm_vcmpneq): Remove.
20222 (__arm_vcmphiq): Remove.
20223 (__arm_vcmpeqq): Remove.
20224 (__arm_vcmpcsq): Remove.
20225 (__arm_vcmpltq): Remove.
20226 (__arm_vcmpleq): Remove.
20227 (__arm_vcmpgtq): Remove.
20228 (__arm_vcmpgeq): Remove.
20229 (__arm_vcmpneq_m): Remove.
20230 (__arm_vcmphiq_m): Remove.
20231 (__arm_vcmpeqq_m): Remove.
20232 (__arm_vcmpcsq_m): Remove.
20233 (__arm_vcmpltq_m): Remove.
20234 (__arm_vcmpleq_m): Remove.
20235 (__arm_vcmpgtq_m): Remove.
20236 (__arm_vcmpgeq_m): Remove.
20238 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20240 * config/arm/arm-mve-builtins-shapes.cc (cmp): New.
20241 * config/arm/arm-mve-builtins-shapes.h (cmp): New.
20243 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20245 * config/arm/iterators.md (MVE_CMP_M, MVE_CMP_M_F, MVE_CMP_M_N)
20246 (MVE_CMP_M_N_F, mve_cmp_op1): New.
20249 * config/arm/mve.md (mve_vcmp<mve_cmp_op>q_n_<mode>): Rename into ...
20250 (@mve_vcmp<mve_cmp_op>q_n_<mode>): ... this.
20251 (mve_vcmpeqq_m_f<mode>, mve_vcmpgeq_m_f<mode>)
20252 (mve_vcmpgtq_m_f<mode>, mve_vcmpleq_m_f<mode>)
20253 (mve_vcmpltq_m_f<mode>, mve_vcmpneq_m_f<mode>): Merge into ...
20254 (@mve_vcmp<mve_cmp_op1>q_m_f<mode>): ... this.
20255 (mve_vcmpcsq_m_u<mode>, mve_vcmpeqq_m_<supf><mode>)
20256 (mve_vcmpgeq_m_s<mode>, mve_vcmpgtq_m_s<mode>)
20257 (mve_vcmphiq_m_u<mode>, mve_vcmpleq_m_s<mode>)
20258 (mve_vcmpltq_m_s<mode>, mve_vcmpneq_m_<supf><mode>): Merge into
20260 (@mve_vcmp<mve_cmp_op1>q_m_<supf><mode>): ... this.
20261 (mve_vcmpcsq_m_n_u<mode>, mve_vcmpeqq_m_n_<supf><mode>)
20262 (mve_vcmpgeq_m_n_s<mode>, mve_vcmpgtq_m_n_s<mode>)
20263 (mve_vcmphiq_m_n_u<mode>, mve_vcmpleq_m_n_s<mode>)
20264 (mve_vcmpltq_m_n_s<mode>, mve_vcmpneq_m_n_<supf><mode>): Merge
20266 (@mve_vcmp<mve_cmp_op1>q_m_n_<supf><mode>): ... this.
20267 (mve_vcmpeqq_m_n_f<mode>, mve_vcmpgeq_m_n_f<mode>)
20268 (mve_vcmpgtq_m_n_f<mode>, mve_vcmpleq_m_n_f<mode>)
20269 (mve_vcmpltq_m_n_f<mode>, mve_vcmpneq_m_n_f<mode>): Merge into ...
20270 (@mve_vcmp<mve_cmp_op1>q_m_n_f<mode>): ... this.
20272 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
20274 * match.pd <popcount optimizations>: Simplify popcount(X|Y) +
20275 popcount(X&Y) as popcount(X)+popcount(Y). Likewise, simplify
20276 popcount(X)+popcount(Y)-popcount(X&Y) as popcount(X|Y), and
20279 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
20281 * match.pd <popcount optimizations>: Simplify popcount(bswap(x))
20282 as popcount(x). Simplify popcount(rotate(x,y)) as popcount(x).
20283 <parity optimizations>: Simplify parity(bswap(x)) as parity(x).
20284 Simplify parity(rotate(x,y)) as parity(x).
20286 2023-05-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20288 * config/riscv/autovec.md (@vec_series<mode>): New pattern
20289 * config/riscv/riscv-protos.h (expand_vec_series): New function.
20290 * config/riscv/riscv-v.cc (emit_binop): Ditto.
20291 (emit_index_op): Ditto.
20292 (expand_vec_series): Ditto.
20293 (expand_const_vector): Add series vector handling.
20294 * config/riscv/riscv.cc (riscv_const_insns): Enable series vector for testing.
20296 2023-05-10 Roger Sayle <roger@nextmovesoftware.com>
20298 * config/i386/i386.md (*concat<mode><dwi>3_1): Use preferred
20299 [(const_int 0)] idiom, instead of [(clobber (const_int 0))].
20300 (*concat<mode><dwi>3_2): Likewise.
20301 (*concat<mode><dwi>3_3): Likewise.
20302 (*concat<mode><dwi>3_4): Likewise.
20303 (*concat<mode><dwi>3_5): Likewise.
20304 (*concat<mode><dwi>3_6): Likewise.
20305 (*concat<mode><dwi>3_7): Likewise.
20307 2023-05-10 Uros Bizjak <ubizjak@gmail.com>
20310 * config/i386/mmx.md (sse4_1_<code>v2qiv2si2): New insn pattern.
20311 (<insn>v4qiv4hi2): New expander.
20312 (<insn>v2hiv2si2): Ditto.
20313 (<insn>v2qiv2si2): Ditto.
20314 (<insn>v2qiv2hi2): Ditto.
20316 2023-05-10 Jeff Law <jlaw@ventanamicro>
20318 * config/h8300/constraints.md (Q): Make this a special memory
20322 2023-05-10 Jakub Jelinek <jakub@redhat.com>
20325 * ipa-prop.cc (ipa_get_callee_param_type): Don't return TREE_VALUE (t)
20326 if t is void_list_node.
20328 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20330 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode>_insn_le): Delete.
20331 (aarch64_sqmovun<mode>_insn_be): Delete.
20332 (aarch64_sqmovun<mode><vczle><vczbe>): New define_insn.
20333 (aarch64_sqmovun<mode>): Delete expander.
20335 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20338 * config/aarch64/aarch64-simd.md (aarch64_<PERMUTE:perm_insn><mode>):
20340 (aarch64_<PERMUTE:perm_insn><mode><vczle><vczbe>): ... This.
20341 (aarch64_rev<REVERSE:rev_op><mode>): Rename to...
20342 (aarch64_rev<REVERSE:rev_op><mode><vczle><vczbe>): ... This.
20344 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20347 * config/aarch64/aarch64-simd.md (aarch64_<su_optab>q<addsub><mode>):
20349 (aarch64_<su_optab>q<addsub><mode><vczle><vczbe>): ... This.
20350 (aarch64_<sur>qadd<mode>): Rename to...
20351 (aarch64_<sur>qadd<mode><vczle><vczbe>): ... This.
20353 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20355 * config/aarch64/aarch64-simd.md
20356 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_le): Delete.
20357 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_be): Delete.
20358 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): New define_insn.
20359 (aarch64_<sur>q<r>shr<u>n_n<mode>): Simplify expander.
20361 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20364 * config/aarch64/aarch64-simd.md (aarch64_xtn<mode>_insn_le): Delete.
20365 (aarch64_xtn<mode>_insn_be): Likewise.
20366 (trunc<mode><Vnarrowq>2): Rename to...
20367 (trunc<mode><Vnarrowq>2<vczle><vczbe>): ... This.
20368 (aarch64_xtn<mode>): Move under the above. Just emit the truncate RTL.
20369 (aarch64_<su>qmovn<mode>): Likewise.
20370 (aarch64_<su>qmovn<mode><vczle><vczbe>): New define_insn.
20371 (aarch64_<su>qmovn<mode>_insn_le): Delete.
20372 (aarch64_<su>qmovn<mode>_insn_be): Likewise.
20374 2023-05-10 Li Xu <xuli1@eswincomputing.com>
20376 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): For vfmv.f.s/vmv.x.s
20377 intruction replace null avl with (const_int 0).
20379 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20381 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Fix
20384 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20387 * config/riscv/riscv-vsetvl.cc (avl_source_has_vsetvl_p): New function.
20388 (source_equal_p): Fix dead loop in vsetvl avl checking.
20390 2023-05-10 Hans-Peter Nilsson <hp@axis.com>
20392 * config/cris/cris.cc (cris_postdbr_cmpelim): Correct mode
20393 of modeadjusted_dccr.
20395 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20397 * config/arm/arm-mve-builtins-base.cc (vmaxaq, vminaq): New.
20398 * config/arm/arm-mve-builtins-base.def (vmaxaq, vminaq): New.
20399 * config/arm/arm-mve-builtins-base.h (vmaxaq, vminaq): New.
20400 * config/arm/arm-mve-builtins.cc
20401 (function_instance::has_inactive_argument): Handle vmaxaq and
20403 * config/arm/arm_mve.h (vminaq): Remove.
20405 (vminaq_m): Remove.
20406 (vmaxaq_m): Remove.
20407 (vminaq_s8): Remove.
20408 (vmaxaq_s8): Remove.
20409 (vminaq_s16): Remove.
20410 (vmaxaq_s16): Remove.
20411 (vminaq_s32): Remove.
20412 (vmaxaq_s32): Remove.
20413 (vminaq_m_s8): Remove.
20414 (vmaxaq_m_s8): Remove.
20415 (vminaq_m_s16): Remove.
20416 (vmaxaq_m_s16): Remove.
20417 (vminaq_m_s32): Remove.
20418 (vmaxaq_m_s32): Remove.
20419 (__arm_vminaq_s8): Remove.
20420 (__arm_vmaxaq_s8): Remove.
20421 (__arm_vminaq_s16): Remove.
20422 (__arm_vmaxaq_s16): Remove.
20423 (__arm_vminaq_s32): Remove.
20424 (__arm_vmaxaq_s32): Remove.
20425 (__arm_vminaq_m_s8): Remove.
20426 (__arm_vmaxaq_m_s8): Remove.
20427 (__arm_vminaq_m_s16): Remove.
20428 (__arm_vmaxaq_m_s16): Remove.
20429 (__arm_vminaq_m_s32): Remove.
20430 (__arm_vmaxaq_m_s32): Remove.
20431 (__arm_vminaq): Remove.
20432 (__arm_vmaxaq): Remove.
20433 (__arm_vminaq_m): Remove.
20434 (__arm_vmaxaq_m): Remove.
20436 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20438 * config/arm/iterators.md (MVE_VMAXAVMINAQ, MVE_VMAXAVMINAQ_M):
20440 (mve_insn): Add vmaxa, vmina.
20441 (supf): Add VMAXAQ_S, VMAXAQ_M_S, VMINAQ_S, VMINAQ_M_S.
20442 * config/arm/mve.md (mve_vmaxaq_s<mode>, mve_vminaq_s<mode>):
20444 (@mve_<mve_insn>q_<supf><mode>): ... this.
20445 (mve_vmaxaq_m_s<mode>, mve_vminaq_m_s<mode>): Merge into ...
20446 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
20448 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20450 * config/arm/arm-mve-builtins-shapes.cc (binary_maxamina): New.
20451 * config/arm/arm-mve-builtins-shapes.h (binary_maxamina): New.
20453 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20455 * config/arm/arm-mve-builtins-base.cc (vmaxnmaq, vminnmaq): New.
20456 * config/arm/arm-mve-builtins-base.def (vmaxnmaq, vminnmaq): New.
20457 * config/arm/arm-mve-builtins-base.h (vmaxnmaq, vminnmaq): New.
20458 * config/arm/arm-mve-builtins.cc
20459 (function_instance::has_inactive_argument): Handle vmaxnmaq and
20461 * config/arm/arm_mve.h (vminnmaq): Remove.
20462 (vmaxnmaq): Remove.
20463 (vmaxnmaq_m): Remove.
20464 (vminnmaq_m): Remove.
20465 (vminnmaq_f16): Remove.
20466 (vmaxnmaq_f16): Remove.
20467 (vminnmaq_f32): Remove.
20468 (vmaxnmaq_f32): Remove.
20469 (vmaxnmaq_m_f16): Remove.
20470 (vminnmaq_m_f16): Remove.
20471 (vmaxnmaq_m_f32): Remove.
20472 (vminnmaq_m_f32): Remove.
20473 (__arm_vminnmaq_f16): Remove.
20474 (__arm_vmaxnmaq_f16): Remove.
20475 (__arm_vminnmaq_f32): Remove.
20476 (__arm_vmaxnmaq_f32): Remove.
20477 (__arm_vmaxnmaq_m_f16): Remove.
20478 (__arm_vminnmaq_m_f16): Remove.
20479 (__arm_vmaxnmaq_m_f32): Remove.
20480 (__arm_vminnmaq_m_f32): Remove.
20481 (__arm_vminnmaq): Remove.
20482 (__arm_vmaxnmaq): Remove.
20483 (__arm_vmaxnmaq_m): Remove.
20484 (__arm_vminnmaq_m): Remove.
20486 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20488 * config/arm/iterators.md (MVE_VMAXNMA_VMINNMAQ)
20489 (MVE_VMAXNMA_VMINNMAQ_M): New.
20490 (mve_insn): Add vmaxnma, vminnma.
20491 * config/arm/mve.md (mve_vmaxnmaq_f<mode>, mve_vminnmaq_f<mode>):
20493 (@mve_<mve_insn>q_f<mode>): ... this.
20494 (mve_vmaxnmaq_m_f<mode>, mve_vminnmaq_m_f<mode>): Merge into ...
20495 (@mve_<mve_insn>q_m_f<mode>): ... this.
20497 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20499 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_F): New.
20500 (vmaxnmavq, vmaxnmvq, vminnmavq, vminnmvq): New.
20501 * config/arm/arm-mve-builtins-base.def (vmaxnmavq, vmaxnmvq)
20502 (vminnmavq, vminnmvq): New.
20503 * config/arm/arm-mve-builtins-base.h (vmaxnmavq, vmaxnmvq)
20504 (vminnmavq, vminnmvq): New.
20505 * config/arm/arm_mve.h (vminnmvq): Remove.
20506 (vminnmavq): Remove.
20507 (vmaxnmvq): Remove.
20508 (vmaxnmavq): Remove.
20509 (vmaxnmavq_p): Remove.
20510 (vmaxnmvq_p): Remove.
20511 (vminnmavq_p): Remove.
20512 (vminnmvq_p): Remove.
20513 (vminnmvq_f16): Remove.
20514 (vminnmavq_f16): Remove.
20515 (vmaxnmvq_f16): Remove.
20516 (vmaxnmavq_f16): Remove.
20517 (vminnmvq_f32): Remove.
20518 (vminnmavq_f32): Remove.
20519 (vmaxnmvq_f32): Remove.
20520 (vmaxnmavq_f32): Remove.
20521 (vmaxnmavq_p_f16): Remove.
20522 (vmaxnmvq_p_f16): Remove.
20523 (vminnmavq_p_f16): Remove.
20524 (vminnmvq_p_f16): Remove.
20525 (vmaxnmavq_p_f32): Remove.
20526 (vmaxnmvq_p_f32): Remove.
20527 (vminnmavq_p_f32): Remove.
20528 (vminnmvq_p_f32): Remove.
20529 (__arm_vminnmvq_f16): Remove.
20530 (__arm_vminnmavq_f16): Remove.
20531 (__arm_vmaxnmvq_f16): Remove.
20532 (__arm_vmaxnmavq_f16): Remove.
20533 (__arm_vminnmvq_f32): Remove.
20534 (__arm_vminnmavq_f32): Remove.
20535 (__arm_vmaxnmvq_f32): Remove.
20536 (__arm_vmaxnmavq_f32): Remove.
20537 (__arm_vmaxnmavq_p_f16): Remove.
20538 (__arm_vmaxnmvq_p_f16): Remove.
20539 (__arm_vminnmavq_p_f16): Remove.
20540 (__arm_vminnmvq_p_f16): Remove.
20541 (__arm_vmaxnmavq_p_f32): Remove.
20542 (__arm_vmaxnmvq_p_f32): Remove.
20543 (__arm_vminnmavq_p_f32): Remove.
20544 (__arm_vminnmvq_p_f32): Remove.
20545 (__arm_vminnmvq): Remove.
20546 (__arm_vminnmavq): Remove.
20547 (__arm_vmaxnmvq): Remove.
20548 (__arm_vmaxnmavq): Remove.
20549 (__arm_vmaxnmavq_p): Remove.
20550 (__arm_vmaxnmvq_p): Remove.
20551 (__arm_vminnmavq_p): Remove.
20552 (__arm_vminnmvq_p): Remove.
20553 (__arm_vmaxnmavq_m): Remove.
20554 (__arm_vmaxnmvq_m): Remove.
20556 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20558 * config/arm/arm-mve-builtins-functions.h
20559 (unspec_mve_function_exact_insn_pred_p): Use code_for_mve_q_p_f.
20561 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20563 * config/arm/iterators.md (MVE_VMAXNMxV_MINNMxVQ)
20564 (MVE_VMAXNMxV_MINNMxVQ_P): New.
20565 (mve_insn): Add vmaxnmav, vmaxnmv, vminnmav, vminnmv.
20566 * config/arm/mve.md (mve_vmaxnmavq_f<mode>, mve_vmaxnmvq_f<mode>)
20567 (mve_vminnmavq_f<mode>, mve_vminnmvq_f<mode>): Merge into ...
20568 (@mve_<mve_insn>q_f<mode>): ... this.
20569 (mve_vmaxnmavq_p_f<mode>, mve_vmaxnmvq_p_f<mode>)
20570 (mve_vminnmavq_p_f<mode>, mve_vminnmvq_p_f<mode>): Merge into ...
20571 (@mve_<mve_insn>q_p_f<mode>): ... this.
20573 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20575 * config/arm/arm-mve-builtins-base.cc (vmaxnmq, vminnmq): New.
20576 * config/arm/arm-mve-builtins-base.def (vmaxnmq, vminnmq): New.
20577 * config/arm/arm-mve-builtins-base.h (vmaxnmq, vminnmq): New.
20578 * config/arm/arm_mve.h (vminnmq): Remove.
20580 (vmaxnmq_m): Remove.
20581 (vminnmq_m): Remove.
20582 (vminnmq_x): Remove.
20583 (vmaxnmq_x): Remove.
20584 (vminnmq_f16): Remove.
20585 (vmaxnmq_f16): Remove.
20586 (vminnmq_f32): Remove.
20587 (vmaxnmq_f32): Remove.
20588 (vmaxnmq_m_f32): Remove.
20589 (vmaxnmq_m_f16): Remove.
20590 (vminnmq_m_f32): Remove.
20591 (vminnmq_m_f16): Remove.
20592 (vminnmq_x_f16): Remove.
20593 (vminnmq_x_f32): Remove.
20594 (vmaxnmq_x_f16): Remove.
20595 (vmaxnmq_x_f32): Remove.
20596 (__arm_vminnmq_f16): Remove.
20597 (__arm_vmaxnmq_f16): Remove.
20598 (__arm_vminnmq_f32): Remove.
20599 (__arm_vmaxnmq_f32): Remove.
20600 (__arm_vmaxnmq_m_f32): Remove.
20601 (__arm_vmaxnmq_m_f16): Remove.
20602 (__arm_vminnmq_m_f32): Remove.
20603 (__arm_vminnmq_m_f16): Remove.
20604 (__arm_vminnmq_x_f16): Remove.
20605 (__arm_vminnmq_x_f32): Remove.
20606 (__arm_vmaxnmq_x_f16): Remove.
20607 (__arm_vmaxnmq_x_f32): Remove.
20608 (__arm_vminnmq): Remove.
20609 (__arm_vmaxnmq): Remove.
20610 (__arm_vmaxnmq_m): Remove.
20611 (__arm_vminnmq_m): Remove.
20612 (__arm_vminnmq_x): Remove.
20613 (__arm_vmaxnmq_x): Remove.
20615 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20617 * config/arm/iterators.md (MAX_MIN_F): New.
20618 (MVE_FP_M_BINARY): Add VMAXNMQ_M_F, VMINNMQ_M_F.
20619 (mve_insn): Add vmaxnm, vminnm.
20620 (max_min_f_str): New.
20621 * config/arm/mve.md (mve_vmaxnmq_f<mode>, mve_vminnmq_f<mode>):
20623 (@mve_<max_min_f_str>q_f<mode>): ... this.
20624 (mve_vmaxnmq_m_f<mode>, mve_vminnmq_m_f<mode>): Merge into ...
20625 (@mve_<mve_insn>q_m_f<mode>): ... this.
20627 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20629 * config/arm/vec-common.md (smin<mode>3): Use VDQWH iterator.
20630 (smax<mode>3): Likewise.
20632 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20634 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_S_U)
20635 (FUNCTION_PRED_P_S): New.
20636 (vmaxavq, vminavq, vmaxvq, vminvq): New.
20637 * config/arm/arm-mve-builtins-base.def (vmaxavq, vminavq, vmaxvq)
20639 * config/arm/arm-mve-builtins-base.h (vmaxavq, vminavq, vmaxvq)
20641 * config/arm/arm_mve.h (vminvq): Remove.
20643 (vminvq_p): Remove.
20644 (vmaxvq_p): Remove.
20645 (vminvq_u8): Remove.
20646 (vmaxvq_u8): Remove.
20647 (vminvq_s8): Remove.
20648 (vmaxvq_s8): Remove.
20649 (vminvq_u16): Remove.
20650 (vmaxvq_u16): Remove.
20651 (vminvq_s16): Remove.
20652 (vmaxvq_s16): Remove.
20653 (vminvq_u32): Remove.
20654 (vmaxvq_u32): Remove.
20655 (vminvq_s32): Remove.
20656 (vmaxvq_s32): Remove.
20657 (vminvq_p_u8): Remove.
20658 (vmaxvq_p_u8): Remove.
20659 (vminvq_p_s8): Remove.
20660 (vmaxvq_p_s8): Remove.
20661 (vminvq_p_u16): Remove.
20662 (vmaxvq_p_u16): Remove.
20663 (vminvq_p_s16): Remove.
20664 (vmaxvq_p_s16): Remove.
20665 (vminvq_p_u32): Remove.
20666 (vmaxvq_p_u32): Remove.
20667 (vminvq_p_s32): Remove.
20668 (vmaxvq_p_s32): Remove.
20669 (__arm_vminvq_u8): Remove.
20670 (__arm_vmaxvq_u8): Remove.
20671 (__arm_vminvq_s8): Remove.
20672 (__arm_vmaxvq_s8): Remove.
20673 (__arm_vminvq_u16): Remove.
20674 (__arm_vmaxvq_u16): Remove.
20675 (__arm_vminvq_s16): Remove.
20676 (__arm_vmaxvq_s16): Remove.
20677 (__arm_vminvq_u32): Remove.
20678 (__arm_vmaxvq_u32): Remove.
20679 (__arm_vminvq_s32): Remove.
20680 (__arm_vmaxvq_s32): Remove.
20681 (__arm_vminvq_p_u8): Remove.
20682 (__arm_vmaxvq_p_u8): Remove.
20683 (__arm_vminvq_p_s8): Remove.
20684 (__arm_vmaxvq_p_s8): Remove.
20685 (__arm_vminvq_p_u16): Remove.
20686 (__arm_vmaxvq_p_u16): Remove.
20687 (__arm_vminvq_p_s16): Remove.
20688 (__arm_vmaxvq_p_s16): Remove.
20689 (__arm_vminvq_p_u32): Remove.
20690 (__arm_vmaxvq_p_u32): Remove.
20691 (__arm_vminvq_p_s32): Remove.
20692 (__arm_vmaxvq_p_s32): Remove.
20693 (__arm_vminvq): Remove.
20694 (__arm_vmaxvq): Remove.
20695 (__arm_vminvq_p): Remove.
20696 (__arm_vmaxvq_p): Remove.
20699 (vminavq_p): Remove.
20700 (vmaxavq_p): Remove.
20701 (vminavq_s8): Remove.
20702 (vmaxavq_s8): Remove.
20703 (vminavq_s16): Remove.
20704 (vmaxavq_s16): Remove.
20705 (vminavq_s32): Remove.
20706 (vmaxavq_s32): Remove.
20707 (vminavq_p_s8): Remove.
20708 (vmaxavq_p_s8): Remove.
20709 (vminavq_p_s16): Remove.
20710 (vmaxavq_p_s16): Remove.
20711 (vminavq_p_s32): Remove.
20712 (vmaxavq_p_s32): Remove.
20713 (__arm_vminavq_s8): Remove.
20714 (__arm_vmaxavq_s8): Remove.
20715 (__arm_vminavq_s16): Remove.
20716 (__arm_vmaxavq_s16): Remove.
20717 (__arm_vminavq_s32): Remove.
20718 (__arm_vmaxavq_s32): Remove.
20719 (__arm_vminavq_p_s8): Remove.
20720 (__arm_vmaxavq_p_s8): Remove.
20721 (__arm_vminavq_p_s16): Remove.
20722 (__arm_vmaxavq_p_s16): Remove.
20723 (__arm_vminavq_p_s32): Remove.
20724 (__arm_vmaxavq_p_s32): Remove.
20725 (__arm_vminavq): Remove.
20726 (__arm_vmaxavq): Remove.
20727 (__arm_vminavq_p): Remove.
20728 (__arm_vmaxavq_p): Remove.
20730 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20732 * config/arm/iterators.md (MVE_VMAXVQ_VMINVQ, MVE_VMAXVQ_VMINVQ_P): New.
20733 (mve_insn): Add vmaxav, vmaxv, vminav, vminv.
20734 (supf): Add VMAXAVQ_S, VMAXAVQ_P_S, VMINAVQ_S, VMINAVQ_P_S.
20735 * config/arm/mve.md (mve_vmaxavq_s<mode>, mve_vmaxvq_<supf><mode>)
20736 (mve_vminavq_s<mode>, mve_vminvq_<supf><mode>): Merge into ...
20737 (@mve_<mve_insn>q_<supf><mode>): ... this.
20738 (mve_vmaxavq_p_s<mode>, mve_vmaxvq_p_<supf><mode>)
20739 (mve_vminavq_p_s<mode>, mve_vminvq_p_<supf><mode>): Merge into ...
20740 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
20742 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20744 * config/arm/arm-mve-builtins-functions.h (class
20745 unspec_mve_function_exact_insn_pred_p): New.
20747 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20749 * config/arm/arm-mve-builtins-shapes.cc (binary_maxavminav): New.
20750 * config/arm/arm-mve-builtins-shapes.h (binary_maxavminav): New.
20752 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20754 * config/arm/arm-mve-builtins-shapes.cc (binary_maxvminv): New.
20755 * config/arm/arm-mve-builtins-shapes.h (binary_maxvminv): New.
20757 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
20759 * config/aarch64/aarch64-protos.h (aarch64_adjust_reg_alloc_order):
20761 * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define.
20762 (ADJUST_REG_ALLOC_ORDER): Likewise.
20763 * config/aarch64/aarch64.cc (aarch64_adjust_reg_alloc_order): New
20765 * config/aarch64/aarch64-sve.md (*vcond_mask_<mode><vpred>): Use
20766 Upa rather than Upl for unpredicated movprfx alternatives.
20768 2023-05-09 Jeff Law <jlaw@ventanamicro>
20770 * config/h8300/testcompare.md: Add peephole2 which uses a memory
20771 load to set flags, thus eliminating a compare against zero.
20773 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20775 * config/arm/arm-mve-builtins-base.cc (vshllbq, vshlltq): New.
20776 * config/arm/arm-mve-builtins-base.def (vshllbq, vshlltq): New.
20777 * config/arm/arm-mve-builtins-base.h (vshllbq, vshlltq): New.
20778 * config/arm/arm_mve.h (vshlltq): Remove.
20780 (vshllbq_m): Remove.
20781 (vshlltq_m): Remove.
20782 (vshllbq_x): Remove.
20783 (vshlltq_x): Remove.
20784 (vshlltq_n_u8): Remove.
20785 (vshllbq_n_u8): Remove.
20786 (vshlltq_n_s8): Remove.
20787 (vshllbq_n_s8): Remove.
20788 (vshlltq_n_u16): Remove.
20789 (vshllbq_n_u16): Remove.
20790 (vshlltq_n_s16): Remove.
20791 (vshllbq_n_s16): Remove.
20792 (vshllbq_m_n_s8): Remove.
20793 (vshllbq_m_n_s16): Remove.
20794 (vshllbq_m_n_u8): Remove.
20795 (vshllbq_m_n_u16): Remove.
20796 (vshlltq_m_n_s8): Remove.
20797 (vshlltq_m_n_s16): Remove.
20798 (vshlltq_m_n_u8): Remove.
20799 (vshlltq_m_n_u16): Remove.
20800 (vshllbq_x_n_s8): Remove.
20801 (vshllbq_x_n_s16): Remove.
20802 (vshllbq_x_n_u8): Remove.
20803 (vshllbq_x_n_u16): Remove.
20804 (vshlltq_x_n_s8): Remove.
20805 (vshlltq_x_n_s16): Remove.
20806 (vshlltq_x_n_u8): Remove.
20807 (vshlltq_x_n_u16): Remove.
20808 (__arm_vshlltq_n_u8): Remove.
20809 (__arm_vshllbq_n_u8): Remove.
20810 (__arm_vshlltq_n_s8): Remove.
20811 (__arm_vshllbq_n_s8): Remove.
20812 (__arm_vshlltq_n_u16): Remove.
20813 (__arm_vshllbq_n_u16): Remove.
20814 (__arm_vshlltq_n_s16): Remove.
20815 (__arm_vshllbq_n_s16): Remove.
20816 (__arm_vshllbq_m_n_s8): Remove.
20817 (__arm_vshllbq_m_n_s16): Remove.
20818 (__arm_vshllbq_m_n_u8): Remove.
20819 (__arm_vshllbq_m_n_u16): Remove.
20820 (__arm_vshlltq_m_n_s8): Remove.
20821 (__arm_vshlltq_m_n_s16): Remove.
20822 (__arm_vshlltq_m_n_u8): Remove.
20823 (__arm_vshlltq_m_n_u16): Remove.
20824 (__arm_vshllbq_x_n_s8): Remove.
20825 (__arm_vshllbq_x_n_s16): Remove.
20826 (__arm_vshllbq_x_n_u8): Remove.
20827 (__arm_vshllbq_x_n_u16): Remove.
20828 (__arm_vshlltq_x_n_s8): Remove.
20829 (__arm_vshlltq_x_n_s16): Remove.
20830 (__arm_vshlltq_x_n_u8): Remove.
20831 (__arm_vshlltq_x_n_u16): Remove.
20832 (__arm_vshlltq): Remove.
20833 (__arm_vshllbq): Remove.
20834 (__arm_vshllbq_m): Remove.
20835 (__arm_vshlltq_m): Remove.
20836 (__arm_vshllbq_x): Remove.
20837 (__arm_vshlltq_x): Remove.
20839 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20841 * config/arm/iterators.md (mve_insn): Add vshllb, vshllt.
20842 (VSHLLBQ_N, VSHLLTQ_N): Remove.
20844 (VSHLLBQ_M_N, VSHLLTQ_M_N): Remove.
20845 (VSHLLxQ_M_N): New.
20846 * config/arm/mve.md (mve_vshllbq_n_<supf><mode>)
20847 (mve_vshlltq_n_<supf><mode>): Merge into ...
20848 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
20849 (mve_vshllbq_m_n_<supf><mode>, mve_vshlltq_m_n_<supf><mode>):
20851 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
20853 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20855 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_n): New.
20856 * config/arm/arm-mve-builtins-shapes.h (binary_widen_n): New.
20858 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20860 * config/arm/arm-mve-builtins-base.cc (vmovnbq, vmovntq, vqmovnbq)
20861 (vqmovntq, vqmovunbq, vqmovuntq): New.
20862 * config/arm/arm-mve-builtins-base.def (vmovnbq, vmovntq)
20863 (vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq): New.
20864 * config/arm/arm-mve-builtins-base.h (vmovnbq, vmovntq, vqmovnbq)
20865 (vqmovntq, vqmovunbq, vqmovuntq): New.
20866 * config/arm/arm-mve-builtins.cc
20867 (function_instance::has_inactive_argument): Handle vmovnbq,
20868 vmovntq, vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq.
20869 * config/arm/arm_mve.h (vqmovntq): Remove.
20870 (vqmovnbq): Remove.
20871 (vqmovnbq_m): Remove.
20872 (vqmovntq_m): Remove.
20873 (vqmovntq_u16): Remove.
20874 (vqmovnbq_u16): Remove.
20875 (vqmovntq_s16): Remove.
20876 (vqmovnbq_s16): Remove.
20877 (vqmovntq_u32): Remove.
20878 (vqmovnbq_u32): Remove.
20879 (vqmovntq_s32): Remove.
20880 (vqmovnbq_s32): Remove.
20881 (vqmovnbq_m_s16): Remove.
20882 (vqmovntq_m_s16): Remove.
20883 (vqmovnbq_m_u16): Remove.
20884 (vqmovntq_m_u16): Remove.
20885 (vqmovnbq_m_s32): Remove.
20886 (vqmovntq_m_s32): Remove.
20887 (vqmovnbq_m_u32): Remove.
20888 (vqmovntq_m_u32): Remove.
20889 (__arm_vqmovntq_u16): Remove.
20890 (__arm_vqmovnbq_u16): Remove.
20891 (__arm_vqmovntq_s16): Remove.
20892 (__arm_vqmovnbq_s16): Remove.
20893 (__arm_vqmovntq_u32): Remove.
20894 (__arm_vqmovnbq_u32): Remove.
20895 (__arm_vqmovntq_s32): Remove.
20896 (__arm_vqmovnbq_s32): Remove.
20897 (__arm_vqmovnbq_m_s16): Remove.
20898 (__arm_vqmovntq_m_s16): Remove.
20899 (__arm_vqmovnbq_m_u16): Remove.
20900 (__arm_vqmovntq_m_u16): Remove.
20901 (__arm_vqmovnbq_m_s32): Remove.
20902 (__arm_vqmovntq_m_s32): Remove.
20903 (__arm_vqmovnbq_m_u32): Remove.
20904 (__arm_vqmovntq_m_u32): Remove.
20905 (__arm_vqmovntq): Remove.
20906 (__arm_vqmovnbq): Remove.
20907 (__arm_vqmovnbq_m): Remove.
20908 (__arm_vqmovntq_m): Remove.
20911 (vmovnbq_m): Remove.
20912 (vmovntq_m): Remove.
20913 (vmovntq_u16): Remove.
20914 (vmovnbq_u16): Remove.
20915 (vmovntq_s16): Remove.
20916 (vmovnbq_s16): Remove.
20917 (vmovntq_u32): Remove.
20918 (vmovnbq_u32): Remove.
20919 (vmovntq_s32): Remove.
20920 (vmovnbq_s32): Remove.
20921 (vmovnbq_m_s16): Remove.
20922 (vmovntq_m_s16): Remove.
20923 (vmovnbq_m_u16): Remove.
20924 (vmovntq_m_u16): Remove.
20925 (vmovnbq_m_s32): Remove.
20926 (vmovntq_m_s32): Remove.
20927 (vmovnbq_m_u32): Remove.
20928 (vmovntq_m_u32): Remove.
20929 (__arm_vmovntq_u16): Remove.
20930 (__arm_vmovnbq_u16): Remove.
20931 (__arm_vmovntq_s16): Remove.
20932 (__arm_vmovnbq_s16): Remove.
20933 (__arm_vmovntq_u32): Remove.
20934 (__arm_vmovnbq_u32): Remove.
20935 (__arm_vmovntq_s32): Remove.
20936 (__arm_vmovnbq_s32): Remove.
20937 (__arm_vmovnbq_m_s16): Remove.
20938 (__arm_vmovntq_m_s16): Remove.
20939 (__arm_vmovnbq_m_u16): Remove.
20940 (__arm_vmovntq_m_u16): Remove.
20941 (__arm_vmovnbq_m_s32): Remove.
20942 (__arm_vmovntq_m_s32): Remove.
20943 (__arm_vmovnbq_m_u32): Remove.
20944 (__arm_vmovntq_m_u32): Remove.
20945 (__arm_vmovntq): Remove.
20946 (__arm_vmovnbq): Remove.
20947 (__arm_vmovnbq_m): Remove.
20948 (__arm_vmovntq_m): Remove.
20949 (vqmovuntq): Remove.
20950 (vqmovunbq): Remove.
20951 (vqmovunbq_m): Remove.
20952 (vqmovuntq_m): Remove.
20953 (vqmovuntq_s16): Remove.
20954 (vqmovunbq_s16): Remove.
20955 (vqmovuntq_s32): Remove.
20956 (vqmovunbq_s32): Remove.
20957 (vqmovunbq_m_s16): Remove.
20958 (vqmovuntq_m_s16): Remove.
20959 (vqmovunbq_m_s32): Remove.
20960 (vqmovuntq_m_s32): Remove.
20961 (__arm_vqmovuntq_s16): Remove.
20962 (__arm_vqmovunbq_s16): Remove.
20963 (__arm_vqmovuntq_s32): Remove.
20964 (__arm_vqmovunbq_s32): Remove.
20965 (__arm_vqmovunbq_m_s16): Remove.
20966 (__arm_vqmovuntq_m_s16): Remove.
20967 (__arm_vqmovunbq_m_s32): Remove.
20968 (__arm_vqmovuntq_m_s32): Remove.
20969 (__arm_vqmovuntq): Remove.
20970 (__arm_vqmovunbq): Remove.
20971 (__arm_vqmovunbq_m): Remove.
20972 (__arm_vqmovuntq_m): Remove.
20974 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20976 * config/arm/iterators.md (MVE_MOVN, MVE_MOVN_M): New.
20977 (mve_insn): Add vmovnb, vmovnt, vqmovnb, vqmovnt, vqmovunb,
20980 (supf): Add VQMOVUNBQ_M_S, VQMOVUNBQ_S, VQMOVUNTQ_M_S,
20982 * config/arm/mve.md (mve_vmovnbq_<supf><mode>)
20983 (mve_vmovntq_<supf><mode>, mve_vqmovnbq_<supf><mode>)
20984 (mve_vqmovntq_<supf><mode>, mve_vqmovunbq_s<mode>)
20985 (mve_vqmovuntq_s<mode>): Merge into ...
20986 (@mve_<mve_insn>q_<supf><mode>): ... this.
20987 (mve_vmovnbq_m_<supf><mode>, mve_vmovntq_m_<supf><mode>)
20988 (mve_vqmovnbq_m_<supf><mode>, mve_vqmovntq_m_<supf><mode>)
20989 (mve_vqmovunbq_m_s<mode>, mve_vqmovuntq_m_s<mode>): Merge into ...
20990 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
20992 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20994 * config/arm/arm-mve-builtins-shapes.cc (binary_move_narrow): New.
20995 (binary_move_narrow_unsigned): New.
20996 * config/arm/arm-mve-builtins-shapes.h (binary_move_narrow): New.
20997 (binary_move_narrow_unsigned): New.
20999 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
21001 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_F): New.
21002 (vrndaq, vrndmq, vrndnq, vrndpq, vrndq, vrndxq): New.
21003 * config/arm/arm-mve-builtins-base.def (vrndaq, vrndmq, vrndnq)
21004 (vrndpq, vrndq, vrndxq): New.
21005 * config/arm/arm-mve-builtins-base.h (vrndaq, vrndmq, vrndnq)
21006 (vrndpq, vrndq, vrndxq): New.
21007 * config/arm/arm_mve.h (vrndxq): Remove.
21013 (vrndaq_m): Remove.
21014 (vrndmq_m): Remove.
21015 (vrndnq_m): Remove.
21016 (vrndpq_m): Remove.
21018 (vrndxq_m): Remove.
21020 (vrndnq_x): Remove.
21021 (vrndmq_x): Remove.
21022 (vrndpq_x): Remove.
21023 (vrndaq_x): Remove.
21024 (vrndxq_x): Remove.
21025 (vrndxq_f16): Remove.
21026 (vrndxq_f32): Remove.
21027 (vrndq_f16): Remove.
21028 (vrndq_f32): Remove.
21029 (vrndpq_f16): Remove.
21030 (vrndpq_f32): Remove.
21031 (vrndnq_f16): Remove.
21032 (vrndnq_f32): Remove.
21033 (vrndmq_f16): Remove.
21034 (vrndmq_f32): Remove.
21035 (vrndaq_f16): Remove.
21036 (vrndaq_f32): Remove.
21037 (vrndaq_m_f16): Remove.
21038 (vrndmq_m_f16): Remove.
21039 (vrndnq_m_f16): Remove.
21040 (vrndpq_m_f16): Remove.
21041 (vrndq_m_f16): Remove.
21042 (vrndxq_m_f16): Remove.
21043 (vrndaq_m_f32): Remove.
21044 (vrndmq_m_f32): Remove.
21045 (vrndnq_m_f32): Remove.
21046 (vrndpq_m_f32): Remove.
21047 (vrndq_m_f32): Remove.
21048 (vrndxq_m_f32): Remove.
21049 (vrndq_x_f16): Remove.
21050 (vrndq_x_f32): Remove.
21051 (vrndnq_x_f16): Remove.
21052 (vrndnq_x_f32): Remove.
21053 (vrndmq_x_f16): Remove.
21054 (vrndmq_x_f32): Remove.
21055 (vrndpq_x_f16): Remove.
21056 (vrndpq_x_f32): Remove.
21057 (vrndaq_x_f16): Remove.
21058 (vrndaq_x_f32): Remove.
21059 (vrndxq_x_f16): Remove.
21060 (vrndxq_x_f32): Remove.
21061 (__arm_vrndxq_f16): Remove.
21062 (__arm_vrndxq_f32): Remove.
21063 (__arm_vrndq_f16): Remove.
21064 (__arm_vrndq_f32): Remove.
21065 (__arm_vrndpq_f16): Remove.
21066 (__arm_vrndpq_f32): Remove.
21067 (__arm_vrndnq_f16): Remove.
21068 (__arm_vrndnq_f32): Remove.
21069 (__arm_vrndmq_f16): Remove.
21070 (__arm_vrndmq_f32): Remove.
21071 (__arm_vrndaq_f16): Remove.
21072 (__arm_vrndaq_f32): Remove.
21073 (__arm_vrndaq_m_f16): Remove.
21074 (__arm_vrndmq_m_f16): Remove.
21075 (__arm_vrndnq_m_f16): Remove.
21076 (__arm_vrndpq_m_f16): Remove.
21077 (__arm_vrndq_m_f16): Remove.
21078 (__arm_vrndxq_m_f16): Remove.
21079 (__arm_vrndaq_m_f32): Remove.
21080 (__arm_vrndmq_m_f32): Remove.
21081 (__arm_vrndnq_m_f32): Remove.
21082 (__arm_vrndpq_m_f32): Remove.
21083 (__arm_vrndq_m_f32): Remove.
21084 (__arm_vrndxq_m_f32): Remove.
21085 (__arm_vrndq_x_f16): Remove.
21086 (__arm_vrndq_x_f32): Remove.
21087 (__arm_vrndnq_x_f16): Remove.
21088 (__arm_vrndnq_x_f32): Remove.
21089 (__arm_vrndmq_x_f16): Remove.
21090 (__arm_vrndmq_x_f32): Remove.
21091 (__arm_vrndpq_x_f16): Remove.
21092 (__arm_vrndpq_x_f32): Remove.
21093 (__arm_vrndaq_x_f16): Remove.
21094 (__arm_vrndaq_x_f32): Remove.
21095 (__arm_vrndxq_x_f16): Remove.
21096 (__arm_vrndxq_x_f32): Remove.
21097 (__arm_vrndxq): Remove.
21098 (__arm_vrndq): Remove.
21099 (__arm_vrndpq): Remove.
21100 (__arm_vrndnq): Remove.
21101 (__arm_vrndmq): Remove.
21102 (__arm_vrndaq): Remove.
21103 (__arm_vrndaq_m): Remove.
21104 (__arm_vrndmq_m): Remove.
21105 (__arm_vrndnq_m): Remove.
21106 (__arm_vrndpq_m): Remove.
21107 (__arm_vrndq_m): Remove.
21108 (__arm_vrndxq_m): Remove.
21109 (__arm_vrndq_x): Remove.
21110 (__arm_vrndnq_x): Remove.
21111 (__arm_vrndmq_x): Remove.
21112 (__arm_vrndpq_x): Remove.
21113 (__arm_vrndaq_x): Remove.
21114 (__arm_vrndxq_x): Remove.
21116 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
21118 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N_NO_U_F): New.
21119 (vabsq, vnegq, vclsq, vclzq, vqabsq, vqnegq): New.
21120 * config/arm/arm-mve-builtins-base.def (vabsq, vnegq, vclsq)
21121 (vclzq, vqabsq, vqnegq): New.
21122 * config/arm/arm-mve-builtins-base.h (vabsq, vnegq, vclsq, vclzq)
21123 (vqabsq, vqnegq): New.
21124 * config/arm/arm_mve.h (vabsq): Remove.
21127 (vabsq_f16): Remove.
21128 (vabsq_f32): Remove.
21129 (vabsq_s8): Remove.
21130 (vabsq_s16): Remove.
21131 (vabsq_s32): Remove.
21132 (vabsq_m_s8): Remove.
21133 (vabsq_m_s16): Remove.
21134 (vabsq_m_s32): Remove.
21135 (vabsq_m_f16): Remove.
21136 (vabsq_m_f32): Remove.
21137 (vabsq_x_s8): Remove.
21138 (vabsq_x_s16): Remove.
21139 (vabsq_x_s32): Remove.
21140 (vabsq_x_f16): Remove.
21141 (vabsq_x_f32): Remove.
21142 (__arm_vabsq_s8): Remove.
21143 (__arm_vabsq_s16): Remove.
21144 (__arm_vabsq_s32): Remove.
21145 (__arm_vabsq_m_s8): Remove.
21146 (__arm_vabsq_m_s16): Remove.
21147 (__arm_vabsq_m_s32): Remove.
21148 (__arm_vabsq_x_s8): Remove.
21149 (__arm_vabsq_x_s16): Remove.
21150 (__arm_vabsq_x_s32): Remove.
21151 (__arm_vabsq_f16): Remove.
21152 (__arm_vabsq_f32): Remove.
21153 (__arm_vabsq_m_f16): Remove.
21154 (__arm_vabsq_m_f32): Remove.
21155 (__arm_vabsq_x_f16): Remove.
21156 (__arm_vabsq_x_f32): Remove.
21157 (__arm_vabsq): Remove.
21158 (__arm_vabsq_m): Remove.
21159 (__arm_vabsq_x): Remove.
21163 (vnegq_f16): Remove.
21164 (vnegq_f32): Remove.
21165 (vnegq_s8): Remove.
21166 (vnegq_s16): Remove.
21167 (vnegq_s32): Remove.
21168 (vnegq_m_s8): Remove.
21169 (vnegq_m_s16): Remove.
21170 (vnegq_m_s32): Remove.
21171 (vnegq_m_f16): Remove.
21172 (vnegq_m_f32): Remove.
21173 (vnegq_x_s8): Remove.
21174 (vnegq_x_s16): Remove.
21175 (vnegq_x_s32): Remove.
21176 (vnegq_x_f16): Remove.
21177 (vnegq_x_f32): Remove.
21178 (__arm_vnegq_s8): Remove.
21179 (__arm_vnegq_s16): Remove.
21180 (__arm_vnegq_s32): Remove.
21181 (__arm_vnegq_m_s8): Remove.
21182 (__arm_vnegq_m_s16): Remove.
21183 (__arm_vnegq_m_s32): Remove.
21184 (__arm_vnegq_x_s8): Remove.
21185 (__arm_vnegq_x_s16): Remove.
21186 (__arm_vnegq_x_s32): Remove.
21187 (__arm_vnegq_f16): Remove.
21188 (__arm_vnegq_f32): Remove.
21189 (__arm_vnegq_m_f16): Remove.
21190 (__arm_vnegq_m_f32): Remove.
21191 (__arm_vnegq_x_f16): Remove.
21192 (__arm_vnegq_x_f32): Remove.
21193 (__arm_vnegq): Remove.
21194 (__arm_vnegq_m): Remove.
21195 (__arm_vnegq_x): Remove.
21199 (vclsq_s8): Remove.
21200 (vclsq_s16): Remove.
21201 (vclsq_s32): Remove.
21202 (vclsq_m_s8): Remove.
21203 (vclsq_m_s16): Remove.
21204 (vclsq_m_s32): Remove.
21205 (vclsq_x_s8): Remove.
21206 (vclsq_x_s16): Remove.
21207 (vclsq_x_s32): Remove.
21208 (__arm_vclsq_s8): Remove.
21209 (__arm_vclsq_s16): Remove.
21210 (__arm_vclsq_s32): Remove.
21211 (__arm_vclsq_m_s8): Remove.
21212 (__arm_vclsq_m_s16): Remove.
21213 (__arm_vclsq_m_s32): Remove.
21214 (__arm_vclsq_x_s8): Remove.
21215 (__arm_vclsq_x_s16): Remove.
21216 (__arm_vclsq_x_s32): Remove.
21217 (__arm_vclsq): Remove.
21218 (__arm_vclsq_m): Remove.
21219 (__arm_vclsq_x): Remove.
21223 (vclzq_s8): Remove.
21224 (vclzq_s16): Remove.
21225 (vclzq_s32): Remove.
21226 (vclzq_u8): Remove.
21227 (vclzq_u16): Remove.
21228 (vclzq_u32): Remove.
21229 (vclzq_m_u8): Remove.
21230 (vclzq_m_s8): Remove.
21231 (vclzq_m_u16): Remove.
21232 (vclzq_m_s16): Remove.
21233 (vclzq_m_u32): Remove.
21234 (vclzq_m_s32): Remove.
21235 (vclzq_x_s8): Remove.
21236 (vclzq_x_s16): Remove.
21237 (vclzq_x_s32): Remove.
21238 (vclzq_x_u8): Remove.
21239 (vclzq_x_u16): Remove.
21240 (vclzq_x_u32): Remove.
21241 (__arm_vclzq_s8): Remove.
21242 (__arm_vclzq_s16): Remove.
21243 (__arm_vclzq_s32): Remove.
21244 (__arm_vclzq_u8): Remove.
21245 (__arm_vclzq_u16): Remove.
21246 (__arm_vclzq_u32): Remove.
21247 (__arm_vclzq_m_u8): Remove.
21248 (__arm_vclzq_m_s8): Remove.
21249 (__arm_vclzq_m_u16): Remove.
21250 (__arm_vclzq_m_s16): Remove.
21251 (__arm_vclzq_m_u32): Remove.
21252 (__arm_vclzq_m_s32): Remove.
21253 (__arm_vclzq_x_s8): Remove.
21254 (__arm_vclzq_x_s16): Remove.
21255 (__arm_vclzq_x_s32): Remove.
21256 (__arm_vclzq_x_u8): Remove.
21257 (__arm_vclzq_x_u16): Remove.
21258 (__arm_vclzq_x_u32): Remove.
21259 (__arm_vclzq): Remove.
21260 (__arm_vclzq_m): Remove.
21261 (__arm_vclzq_x): Remove.
21264 (vqnegq_m): Remove.
21265 (vqabsq_m): Remove.
21266 (vqabsq_s8): Remove.
21267 (vqabsq_s16): Remove.
21268 (vqabsq_s32): Remove.
21269 (vqnegq_s8): Remove.
21270 (vqnegq_s16): Remove.
21271 (vqnegq_s32): Remove.
21272 (vqnegq_m_s8): Remove.
21273 (vqabsq_m_s8): Remove.
21274 (vqnegq_m_s16): Remove.
21275 (vqabsq_m_s16): Remove.
21276 (vqnegq_m_s32): Remove.
21277 (vqabsq_m_s32): Remove.
21278 (__arm_vqabsq_s8): Remove.
21279 (__arm_vqabsq_s16): Remove.
21280 (__arm_vqabsq_s32): Remove.
21281 (__arm_vqnegq_s8): Remove.
21282 (__arm_vqnegq_s16): Remove.
21283 (__arm_vqnegq_s32): Remove.
21284 (__arm_vqnegq_m_s8): Remove.
21285 (__arm_vqabsq_m_s8): Remove.
21286 (__arm_vqnegq_m_s16): Remove.
21287 (__arm_vqabsq_m_s16): Remove.
21288 (__arm_vqnegq_m_s32): Remove.
21289 (__arm_vqabsq_m_s32): Remove.
21290 (__arm_vqabsq): Remove.
21291 (__arm_vqnegq): Remove.
21292 (__arm_vqnegq_m): Remove.
21293 (__arm_vqabsq_m): Remove.
21295 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
21297 * config/arm/iterators.md (MVE_INT_M_UNARY, MVE_INT_UNARY)
21298 (MVE_FP_UNARY, MVE_FP_M_UNARY): New.
21299 (mve_insn): Add vabs, vcls, vclz, vneg, vqabs, vqneg, vrnda,
21300 vrndm, vrndn, vrndp, vrnd, vrndx.
21301 (isu): Add VABSQ_M_S, VCLSQ_M_S, VCLZQ_M_S, VCLZQ_M_U, VNEGQ_M_S,
21302 VQABSQ_M_S, VQNEGQ_M_S.
21304 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrndxq_f<mode>)
21305 (mve_vrndq_f<mode>, mve_vrndpq_f<mode>, mve_vrndnq_f<mode>)
21306 (mve_vrndmq_f<mode>, mve_vrndaq_f<mode>): Merge into ...
21307 (@mve_<mve_insn>q_f<mode>): ... this.
21308 (mve_vnegq_f<mode>, mve_vabsq_f<mode>): Merge into ...
21309 (mve_v<absneg_str>q_f<mode>): ... this.
21310 (mve_vnegq_s<mode>, mve_vabsq_s<mode>): Merge into ...
21311 (mve_v<absneg_str>q_s<mode>): ... this.
21312 (mve_vclsq_s<mode>, mve_vqnegq_s<mode>, mve_vqabsq_s<mode>): Merge into ...
21313 (@mve_<mve_insn>q_<supf><mode>): ... this.
21314 (mve_vabsq_m_s<mode>, mve_vclsq_m_s<mode>)
21315 (mve_vclzq_m_<supf><mode>, mve_vnegq_m_s<mode>)
21316 (mve_vqabsq_m_s<mode>, mve_vqnegq_m_s<mode>): Merge into ...
21317 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
21318 (mve_vabsq_m_f<mode>, mve_vnegq_m_f<mode>, mve_vrndaq_m_f<mode>)
21319 (mve_vrndmq_m_f<mode>, mve_vrndnq_m_f<mode>, mve_vrndpq_m_f<mode>)
21320 (mve_vrndxq_m_f<mode>): Merge into ...
21321 (@mve_<mve_insn>q_m_f<mode>): ... this.
21323 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
21325 * config/arm/arm-mve-builtins-shapes.cc (unary): New.
21326 * config/arm/arm-mve-builtins-shapes.h (unary): New.
21328 2023-05-09 Jakub Jelinek <jakub@redhat.com>
21330 * mux-utils.h: Fix comment typo, avoides -> avoids.
21332 2023-05-09 Jakub Jelinek <jakub@redhat.com>
21334 PR tree-optimization/109778
21335 * wide-int.h (wi::lrotate, wi::rrotate): Call wi::lrshift on
21336 wi::zext (x, width) rather than x if width != precision, rather
21337 than using wi::zext (right, width) after the shift.
21338 * tree-ssa-ccp.cc (bit_value_binop): Call wi::ext on the results
21339 of wi::lrotate or wi::rrotate.
21341 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
21343 * genmatch.cc (get_out_file): Make static and rename to ...
21344 (choose_output): ... this. Reimplement. Update all uses ...
21345 (decision_tree::gen): ... here and ...
21348 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
21350 * genmatch.cc (showUsage): Reimplement as ...
21351 (usage): ...this. Adjust all uses.
21352 (main): Print usage when no arguments. Add missing 'return 1'.
21354 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
21356 * genmatch.cc (header_file): Make static.
21357 (emit_func): Rename to...
21358 (fp_decl): ... this. Adjust all uses.
21359 (fp_decl_done): New function. Use it...
21360 (decision_tree::gen): ... here and...
21361 (write_predicate): ... here.
21364 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
21366 * ira-conflicts.cc (can_use_same_reg_p): Skip over non-matching
21369 2023-05-08 Roger Sayle <roger@nextmovesoftware.com>
21370 Uros Bizjak <ubizjak@gmail.com>
21372 * config/i386/i386.md (any_or_plus): Move definition earlier.
21373 (*insvti_highpart_1): New define_insn_and_split to overwrite
21374 (insv) the highpart of a TImode register/memory.
21376 2023-05-08 Eugene Rozenfeld <erozen@microsoft.com>
21378 * auto-profile.cc (auto_profile): Check todo from early_inline
21379 to see if cleanup_tree_vfg needs to be called.
21380 (early_inline): Return todo from early_inliner.
21382 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
21384 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vector_info):
21386 (pass_vsetvl::get_block_info): New.
21387 (pass_vsetvl::update_vector_info): New.
21388 (pass_vsetvl::simple_vsetvl): Use get_vector_info.
21389 (pass_vsetvl::compute_local_backward_infos): Ditto.
21390 (pass_vsetvl::transfer_before): Ditto.
21391 (pass_vsetvl::transfer_after): Ditto.
21392 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
21393 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
21394 (pass_vsetvl::cleanup_insns): Ditto.
21395 (pass_vsetvl::compute_local_backward_infos): Use
21396 update_vector_info.
21398 2023-05-08 Jeff Law <jlaw@ventanamicro>
21400 * config/stormy16/stormy16.md (zero_extendhisi2): Fix length.
21402 2023-05-08 Richard Biener <rguenther@suse.de>
21403 Michael Meissner <meissner@linux.ibm.com>
21405 PR middle-end/108623
21406 * tree-core.h (tree_type_common): Bump up precision field to 16 bits.
21407 Align bit fields > 1 bit to at least an 8-bit boundary.
21409 2023-05-08 Andrew Pinski <apinski@marvell.com>
21411 PR tree-optimization/109424
21412 PR tree-optimization/59424
21413 * tree-ssa-phiopt.cc (factor_out_conditional_conversion): Rename to ...
21414 (factor_out_conditional_operation): This and add support for all unary
21416 (pass_phiopt::execute): Update call to factor_out_conditional_conversion
21417 to call factor_out_conditional_operation instead.
21419 2023-05-08 Andrew Pinski <apinski@marvell.com>
21421 * tree-ssa-phiopt.cc (pass_phiopt::execute): Loop
21422 over factor_out_conditional_conversion.
21424 2023-05-08 Andrew Pinski <apinski@marvell.com>
21426 PR tree-optimization/49959
21427 PR tree-optimization/103771
21428 * tree-ssa-phiopt.cc (pass_phiopt::execute): Support
21429 Diamond shapped bb form for factor_out_conditional_conversion.
21431 2023-05-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21433 * config/riscv/autovec.md (movmisalign<mode>): New pattern.
21434 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): Delete.
21435 (riscv_vector_get_mask_mode): Ditto.
21436 (get_mask_policy_no_pred): Ditto.
21437 (get_tail_policy_no_pred): Ditto.
21438 (get_mask_mode): New function.
21439 * config/riscv/riscv-v.cc (get_mask_policy_no_pred): Delete.
21440 (get_tail_policy_no_pred): Ditto.
21441 (riscv_vector_mask_mode_p): Ditto.
21442 (riscv_vector_get_mask_mode): Ditto.
21443 (get_mask_mode): New function.
21444 * config/riscv/riscv-vector-builtins.cc (use_real_merge_p): Remove
21446 (get_tail_policy_for_pred): Ditto.
21447 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred): Ditto.
21448 (get_mask_policy_for_pred): Ditto
21449 * config/riscv/riscv.cc (riscv_get_mask_mode): Refine codes.
21451 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
21453 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi): New.
21454 (riscv_select_multilib): New.
21455 (riscv_compute_multilib): Extract logic to riscv_select_multilib and
21456 also handle select_by_abi.
21457 * config/riscv/elf.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Change it
21458 to select_by_abi_arch_cmodel from 1.
21459 * config/riscv/linux.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Define.
21460 * config/riscv/riscv-opts.h (enum riscv_multilib_select_kind): New.
21462 2023-05-08 Alexander Monakov <amonakov@ispras.ru>
21464 * Makefile.in: (gimple-match-head.o-warn): Remove.
21465 (GIMPLE_MATCH_PD_SEQ_SRC): Do not depend on
21466 gimple-match-exports.cc.
21467 (gimple-match-auto.h): Only depend on s-gimple-match.
21468 (generic-match-auto.h): Likewise.
21470 2023-05-08 Andrew Pinski <apinski@marvell.com>
21472 PR tree-optimization/109691
21473 * tree-ssa-dce.cc (simple_dce_from_worklist): Add need_eh_cleanup
21475 If the removed statement can throw, have need_eh_cleanup
21476 include the bb of that statement.
21477 * tree-ssa-dce.h (simple_dce_from_worklist): Update declaration.
21478 * tree-ssa-propagate.cc (struct prop_stats_d): Remove
21480 (substitute_and_fold_dom_walker::substitute_and_fold_dom_walker):
21481 Initialize dceworklist instead of stmts_to_remove.
21482 (substitute_and_fold_dom_walker::~substitute_and_fold_dom_walker):
21483 Destore dceworklist instead of stmts_to_remove.
21484 (substitute_and_fold_dom_walker::before_dom_children):
21485 Set dceworklist instead of adding to stmts_to_remove.
21486 (substitute_and_fold_engine::substitute_and_fold):
21487 Call simple_dce_from_worklist instead of poping
21489 Don't update the stat on removal statements.
21491 2023-05-07 Andrew Pinski <apinski@marvell.com>
21494 * config/aarch64/aarch64-builtins.cc (aarch64_simd_switcher::aarch64_simd_switcher):
21495 Change argument type to aarch64_feature_flags.
21496 * config/aarch64/aarch64-protos.h (aarch64_simd_switcher): Change
21497 constructor argument type to aarch64_feature_flags.
21498 Change m_old_asm_isa_flags to be aarch64_feature_flags.
21500 2023-05-07 Jiufu Guo <guojiufu@linux.ibm.com>
21502 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Generate
21503 more parallel code if can_create_pseudo_p.
21505 2023-05-07 Roger Sayle <roger@nextmovesoftware.com>
21508 * lower-subreg.cc (resolve_simple_move): Don't emit a clobber
21509 immediately before moving a multi-word register by parts.
21511 2023-05-06 Jeff Law <jlaw@ventanamicro>
21513 * config/riscv/riscv-v.cc (riscv_vector_preferred_simd_mode): Delete.
21515 2023-05-06 Michael Collison <collison@rivosinc.com>
21517 * tree-vect-slp.cc (can_duplicate_and_interleave_p):
21518 Check that GET_MODE_NUNITS is a multiple of 2.
21520 2023-05-06 Michael Collison <collison@rivosinc.com>
21522 * config/riscv/riscv.cc
21523 (riscv_estimated_poly_value): Implement
21524 TARGET_ESTIMATED_POLY_VALUE.
21525 (riscv_preferred_simd_mode): Implement
21526 TARGET_VECTORIZE_PREFERRED_SIMD_MODE.
21527 (riscv_get_mask_mode): Implement TARGET_VECTORIZE_GET_MASK_MODE.
21528 (riscv_empty_mask_is_expensive): Implement
21529 TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE.
21530 (riscv_vectorize_create_costs): Implement
21531 TARGET_VECTORIZE_CREATE_COSTS.
21532 (riscv_support_vector_misalignment): Implement
21533 TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT.
21534 (TARGET_ESTIMATED_POLY_VALUE): Register target macro.
21535 (TARGET_VECTORIZE_GET_MASK_MODE): Ditto.
21536 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Ditto.
21537 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
21539 2023-05-06 Jeff Law <jlaw@ventanamicro>
21541 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Remove
21542 duplicate definition.
21544 2023-05-06 Michael Collison <collison@rivosinc.com>
21546 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): New function.
21547 (riscv_vector_preferred_simd_mode): Ditto.
21548 (get_mask_policy_no_pred): Ditto.
21549 (get_tail_policy_no_pred): Ditto.
21550 (riscv_vector_mask_mode_p): Ditto.
21551 (riscv_vector_get_mask_mode): Ditto.
21553 2023-05-06 Michael Collison <collison@rivosinc.com>
21555 * config/riscv/riscv-vector-builtins.cc (get_tail_policy_for_pred):
21556 Remove static declaration to to make externally visible.
21557 (get_mask_policy_for_pred): Ditto.
21558 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred):
21559 New external declaration.
21560 (get_mask_policy_for_pred): Ditto.
21562 2023-05-06 Michael Collison <collison@rivosinc.com>
21564 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): New.
21565 (riscv_vector_get_mask_mode): Ditto.
21566 (get_mask_policy_no_pred): Ditto.
21567 (get_tail_policy_no_pred): Ditto.
21569 2023-05-06 Xi Ruoyao <xry111@xry111.site>
21571 * config/loongarch/loongarch.h (struct machine_function): Add
21572 reg_is_wrapped_separately array for register wrapping
21574 * config/loongarch/loongarch.cc
21575 (loongarch_get_separate_components): New function.
21576 (loongarch_components_for_bb): Likewise.
21577 (loongarch_disqualify_components): Likewise.
21578 (loongarch_process_components): Likewise.
21579 (loongarch_emit_prologue_components): Likewise.
21580 (loongarch_emit_epilogue_components): Likewise.
21581 (loongarch_set_handled_components): Likewise.
21582 (TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS): Define.
21583 (TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB): Likewise.
21584 (TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS): Likewise.
21585 (TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS): Likewise.
21586 (TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS): Likewise.
21587 (TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS): Likewise.
21588 (loongarch_for_each_saved_reg): Skip registers that are wrapped
21591 2023-05-06 Xi Ruoyao <xry111@xry111.site>
21594 * Makefile.in (s-macro_list): Pass -nostdinc to
21597 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21599 * config/riscv/riscv-protos.h (preferred_simd_mode): New function.
21600 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Ditto.
21601 (preferred_simd_mode): Ditto.
21602 * config/riscv/riscv.cc (riscv_get_arg_info): Handle RVV type in function arg.
21603 (riscv_convert_vector_bits): Adjust for RVV auto-vectorization.
21604 (riscv_preferred_simd_mode): New function.
21605 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): New target hook support.
21606 * config/riscv/vector.md: Add autovec.md.
21607 * config/riscv/autovec.md: New file.
21609 2023-05-06 Jakub Jelinek <jakub@redhat.com>
21611 * real.h (dconst_pi): Define.
21612 (dconst_e_ptr): Formatting fix.
21613 (dconst_pi_ptr): Declare.
21614 * real.cc (dconst_pi_ptr): New function.
21615 * gimple-range-op.cc (cfn_sincos::fold_range): Intersect the generic
21616 boundaries range with range computed from sin/cos of the particular
21617 bounds if the argument range is shorter than 2*pi.
21618 (cfn_sincos::op1_range): Take bulps into account when determining
21619 which result ranges are always invalid or behave like known NAN.
21621 2023-05-06 Aldy Hernandez <aldyh@redhat.com>
21623 * gimple-range-cache.cc (sbr_sparse_bitmap::set_bb_range): Do not
21624 pass type to vrange_storage::equal_p.
21625 * value-range-storage.cc (vrange_storage::equal_p): Remove type.
21626 (irange_storage::equal_p): Same.
21627 (frange_storage::equal_p): Same.
21628 * value-range-storage.h (class frange_storage): Same.
21630 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21633 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): Remove it.
21634 (pass_vsetvl::local_eliminate_vsetvl_insn): New function.
21636 2023-05-06 liuhongt <hongtao.liu@intel.com>
21638 * combine.cc (maybe_swap_commutative_operands): Canonicalize
21639 vec_merge when mask is constant.
21640 * doc/md.texi: Document vec_merge canonicalization.
21642 2023-05-06 Jakub Jelinek <jakub@redhat.com>
21644 * value-range.h (frange_arithmetic): Declare.
21645 * range-op-float.cc (frange_arithmetic): No longer static.
21646 * gimple-range-op.cc (frange_mpfr_arg1): New function.
21647 (cfn_sqrt::fold_range): Intersect the generic boundaries range
21648 with range computed from sqrt of the particular bounds.
21649 (cfn_sqrt::op1_range): Intersect the generic boundaries range
21650 with range computed from squared particular bounds.
21652 2023-05-06 Jakub Jelinek <jakub@redhat.com>
21654 * Makefile.in (check_p_numbers): Rename to one_to_9999, move
21655 earlier with helper variables also renamed.
21656 (MATCH_SPLUT_SEQ): Use $(wordlist 1,$(NUM_MATCH_SPLITS),$(one_to_9999))
21657 instead of $(shell seq 1 $(NUM_MATCH_SPLITS)).
21658 (check_p_subdirs): Use $(one_to_9999) instead of $(check_p_numbers).
21660 2023-05-06 Hans-Peter Nilsson <hp@axis.com>
21662 * config/cris/cris.md (splitop): Add PLUS.
21663 * config/cris/cris.cc (cris_split_constant): Also handle
21664 PLUS when a split into two insns may be useful.
21666 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
21668 * config/cris/cris.md (movandsplit1): New define_peephole2.
21670 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
21672 * config/cris/cris.md (lsrandsplit1): New define_peephole2.
21674 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
21676 * doc/md.texi (define_peephole2): Document order of scanning.
21678 2023-05-05 Pan Li <pan2.li@intel.com>
21679 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21681 * config/riscv/vector.md: Allow const as the operand of RVV
21682 indexed load/store.
21684 2023-05-05 Pan Li <pan2.li@intel.com>
21686 * config/riscv/riscv.h (VECTOR_STORE_FLAG_VALUE): Add new macro
21687 consumed by simplify_rtx.
21689 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21691 * config/arm/arm-mve-builtins-base.cc (vrshrq, vshrq): New.
21692 * config/arm/arm-mve-builtins-base.def (vrshrq, vshrq): New.
21693 * config/arm/arm-mve-builtins-base.h (vrshrq, vshrq): New.
21694 * config/arm/arm_mve.h (vshrq): Remove.
21696 (vrshrq_m): Remove.
21698 (vrshrq_x): Remove.
21700 (vshrq_n_s8): Remove.
21701 (vshrq_n_s16): Remove.
21702 (vshrq_n_s32): Remove.
21703 (vshrq_n_u8): Remove.
21704 (vshrq_n_u16): Remove.
21705 (vshrq_n_u32): Remove.
21706 (vrshrq_n_u8): Remove.
21707 (vrshrq_n_s8): Remove.
21708 (vrshrq_n_u16): Remove.
21709 (vrshrq_n_s16): Remove.
21710 (vrshrq_n_u32): Remove.
21711 (vrshrq_n_s32): Remove.
21712 (vrshrq_m_n_s8): Remove.
21713 (vrshrq_m_n_s32): Remove.
21714 (vrshrq_m_n_s16): Remove.
21715 (vrshrq_m_n_u8): Remove.
21716 (vrshrq_m_n_u32): Remove.
21717 (vrshrq_m_n_u16): Remove.
21718 (vshrq_m_n_s8): Remove.
21719 (vshrq_m_n_s32): Remove.
21720 (vshrq_m_n_s16): Remove.
21721 (vshrq_m_n_u8): Remove.
21722 (vshrq_m_n_u32): Remove.
21723 (vshrq_m_n_u16): Remove.
21724 (vrshrq_x_n_s8): Remove.
21725 (vrshrq_x_n_s16): Remove.
21726 (vrshrq_x_n_s32): Remove.
21727 (vrshrq_x_n_u8): Remove.
21728 (vrshrq_x_n_u16): Remove.
21729 (vrshrq_x_n_u32): Remove.
21730 (vshrq_x_n_s8): Remove.
21731 (vshrq_x_n_s16): Remove.
21732 (vshrq_x_n_s32): Remove.
21733 (vshrq_x_n_u8): Remove.
21734 (vshrq_x_n_u16): Remove.
21735 (vshrq_x_n_u32): Remove.
21736 (__arm_vshrq_n_s8): Remove.
21737 (__arm_vshrq_n_s16): Remove.
21738 (__arm_vshrq_n_s32): Remove.
21739 (__arm_vshrq_n_u8): Remove.
21740 (__arm_vshrq_n_u16): Remove.
21741 (__arm_vshrq_n_u32): Remove.
21742 (__arm_vrshrq_n_u8): Remove.
21743 (__arm_vrshrq_n_s8): Remove.
21744 (__arm_vrshrq_n_u16): Remove.
21745 (__arm_vrshrq_n_s16): Remove.
21746 (__arm_vrshrq_n_u32): Remove.
21747 (__arm_vrshrq_n_s32): Remove.
21748 (__arm_vrshrq_m_n_s8): Remove.
21749 (__arm_vrshrq_m_n_s32): Remove.
21750 (__arm_vrshrq_m_n_s16): Remove.
21751 (__arm_vrshrq_m_n_u8): Remove.
21752 (__arm_vrshrq_m_n_u32): Remove.
21753 (__arm_vrshrq_m_n_u16): Remove.
21754 (__arm_vshrq_m_n_s8): Remove.
21755 (__arm_vshrq_m_n_s32): Remove.
21756 (__arm_vshrq_m_n_s16): Remove.
21757 (__arm_vshrq_m_n_u8): Remove.
21758 (__arm_vshrq_m_n_u32): Remove.
21759 (__arm_vshrq_m_n_u16): Remove.
21760 (__arm_vrshrq_x_n_s8): Remove.
21761 (__arm_vrshrq_x_n_s16): Remove.
21762 (__arm_vrshrq_x_n_s32): Remove.
21763 (__arm_vrshrq_x_n_u8): Remove.
21764 (__arm_vrshrq_x_n_u16): Remove.
21765 (__arm_vrshrq_x_n_u32): Remove.
21766 (__arm_vshrq_x_n_s8): Remove.
21767 (__arm_vshrq_x_n_s16): Remove.
21768 (__arm_vshrq_x_n_s32): Remove.
21769 (__arm_vshrq_x_n_u8): Remove.
21770 (__arm_vshrq_x_n_u16): Remove.
21771 (__arm_vshrq_x_n_u32): Remove.
21772 (__arm_vshrq): Remove.
21773 (__arm_vrshrq): Remove.
21774 (__arm_vrshrq_m): Remove.
21775 (__arm_vshrq_m): Remove.
21776 (__arm_vrshrq_x): Remove.
21777 (__arm_vshrq_x): Remove.
21779 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21781 * config/arm/iterators.md (MVE_VSHRQ_M_N, MVE_VSHRQ_N): New.
21782 (mve_insn): Add vrshr, vshr.
21783 * config/arm/mve.md (mve_vshrq_n_<supf><mode>)
21784 (mve_vrshrq_n_<supf><mode>): Merge into ...
21785 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
21786 (mve_vrshrq_m_n_<supf><mode>, mve_vshrq_m_n_<supf><mode>): Merge
21788 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
21790 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21792 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift): New.
21793 * config/arm/arm-mve-builtins-shapes.h (binary_rshift): New.
21795 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21797 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_U_F): New.
21798 (vqshrunbq, vqshruntq, vqrshrunbq, vqrshruntq): New.
21799 * config/arm/arm-mve-builtins-base.def (vqshrunbq, vqshruntq)
21800 (vqrshrunbq, vqrshruntq): New.
21801 * config/arm/arm-mve-builtins-base.h (vqshrunbq, vqshruntq)
21802 (vqrshrunbq, vqrshruntq): New.
21803 * config/arm/arm-mve-builtins.cc
21804 (function_instance::has_inactive_argument): Handle vqshrunbq,
21805 vqshruntq, vqrshrunbq, vqrshruntq.
21806 * config/arm/arm_mve.h (vqrshrunbq): Remove.
21807 (vqrshruntq): Remove.
21808 (vqrshrunbq_m): Remove.
21809 (vqrshruntq_m): Remove.
21810 (vqrshrunbq_n_s16): Remove.
21811 (vqrshrunbq_n_s32): Remove.
21812 (vqrshruntq_n_s16): Remove.
21813 (vqrshruntq_n_s32): Remove.
21814 (vqrshrunbq_m_n_s32): Remove.
21815 (vqrshrunbq_m_n_s16): Remove.
21816 (vqrshruntq_m_n_s32): Remove.
21817 (vqrshruntq_m_n_s16): Remove.
21818 (__arm_vqrshrunbq_n_s16): Remove.
21819 (__arm_vqrshrunbq_n_s32): Remove.
21820 (__arm_vqrshruntq_n_s16): Remove.
21821 (__arm_vqrshruntq_n_s32): Remove.
21822 (__arm_vqrshrunbq_m_n_s32): Remove.
21823 (__arm_vqrshrunbq_m_n_s16): Remove.
21824 (__arm_vqrshruntq_m_n_s32): Remove.
21825 (__arm_vqrshruntq_m_n_s16): Remove.
21826 (__arm_vqrshrunbq): Remove.
21827 (__arm_vqrshruntq): Remove.
21828 (__arm_vqrshrunbq_m): Remove.
21829 (__arm_vqrshruntq_m): Remove.
21830 (vqshrunbq): Remove.
21831 (vqshruntq): Remove.
21832 (vqshrunbq_m): Remove.
21833 (vqshruntq_m): Remove.
21834 (vqshrunbq_n_s16): Remove.
21835 (vqshruntq_n_s16): Remove.
21836 (vqshrunbq_n_s32): Remove.
21837 (vqshruntq_n_s32): Remove.
21838 (vqshrunbq_m_n_s32): Remove.
21839 (vqshrunbq_m_n_s16): Remove.
21840 (vqshruntq_m_n_s32): Remove.
21841 (vqshruntq_m_n_s16): Remove.
21842 (__arm_vqshrunbq_n_s16): Remove.
21843 (__arm_vqshruntq_n_s16): Remove.
21844 (__arm_vqshrunbq_n_s32): Remove.
21845 (__arm_vqshruntq_n_s32): Remove.
21846 (__arm_vqshrunbq_m_n_s32): Remove.
21847 (__arm_vqshrunbq_m_n_s16): Remove.
21848 (__arm_vqshruntq_m_n_s32): Remove.
21849 (__arm_vqshruntq_m_n_s16): Remove.
21850 (__arm_vqshrunbq): Remove.
21851 (__arm_vqshruntq): Remove.
21852 (__arm_vqshrunbq_m): Remove.
21853 (__arm_vqshruntq_m): Remove.
21855 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21857 * config/arm/iterators.md (MVE_SHRN_N): Add VQRSHRUNBQ,
21858 VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
21859 (MVE_SHRN_M_N): Likewise.
21860 (mve_insn): Add vqrshrunb, vqrshrunt, vqshrunb, vqshrunt.
21861 (isu): Add VQRSHRUNBQ, VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
21863 * config/arm/mve.md (mve_vqrshrunbq_n_s<mode>): Remove.
21864 (mve_vqrshruntq_n_s<mode>): Remove.
21865 (mve_vqshrunbq_n_s<mode>): Remove.
21866 (mve_vqshruntq_n_s<mode>): Remove.
21867 (mve_vqrshrunbq_m_n_s<mode>): Remove.
21868 (mve_vqrshruntq_m_n_s<mode>): Remove.
21869 (mve_vqshrunbq_m_n_s<mode>): Remove.
21870 (mve_vqshruntq_m_n_s<mode>): Remove.
21872 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21874 * config/arm/arm-mve-builtins-shapes.cc
21875 (binary_rshift_narrow_unsigned): New.
21876 * config/arm/arm-mve-builtins-shapes.h
21877 (binary_rshift_narrow_unsigned): New.
21879 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21881 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_F): New.
21882 (vshrnbq, vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq)
21883 (vqrshrnbq, vqrshrntq): New.
21884 * config/arm/arm-mve-builtins-base.def (vshrnbq, vshrntq)
21885 (vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq):
21887 * config/arm/arm-mve-builtins-base.h (vshrnbq, vshrntq, vrshrnbq)
21888 (vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq): New.
21889 * config/arm/arm-mve-builtins.cc
21890 (function_instance::has_inactive_argument): Handle vshrnbq,
21891 vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq,
21893 * config/arm/arm_mve.h (vshrnbq): Remove.
21895 (vshrnbq_m): Remove.
21896 (vshrntq_m): Remove.
21897 (vshrnbq_n_s16): Remove.
21898 (vshrntq_n_s16): Remove.
21899 (vshrnbq_n_u16): Remove.
21900 (vshrntq_n_u16): Remove.
21901 (vshrnbq_n_s32): Remove.
21902 (vshrntq_n_s32): Remove.
21903 (vshrnbq_n_u32): Remove.
21904 (vshrntq_n_u32): Remove.
21905 (vshrnbq_m_n_s32): Remove.
21906 (vshrnbq_m_n_s16): Remove.
21907 (vshrnbq_m_n_u32): Remove.
21908 (vshrnbq_m_n_u16): Remove.
21909 (vshrntq_m_n_s32): Remove.
21910 (vshrntq_m_n_s16): Remove.
21911 (vshrntq_m_n_u32): Remove.
21912 (vshrntq_m_n_u16): Remove.
21913 (__arm_vshrnbq_n_s16): Remove.
21914 (__arm_vshrntq_n_s16): Remove.
21915 (__arm_vshrnbq_n_u16): Remove.
21916 (__arm_vshrntq_n_u16): Remove.
21917 (__arm_vshrnbq_n_s32): Remove.
21918 (__arm_vshrntq_n_s32): Remove.
21919 (__arm_vshrnbq_n_u32): Remove.
21920 (__arm_vshrntq_n_u32): Remove.
21921 (__arm_vshrnbq_m_n_s32): Remove.
21922 (__arm_vshrnbq_m_n_s16): Remove.
21923 (__arm_vshrnbq_m_n_u32): Remove.
21924 (__arm_vshrnbq_m_n_u16): Remove.
21925 (__arm_vshrntq_m_n_s32): Remove.
21926 (__arm_vshrntq_m_n_s16): Remove.
21927 (__arm_vshrntq_m_n_u32): Remove.
21928 (__arm_vshrntq_m_n_u16): Remove.
21929 (__arm_vshrnbq): Remove.
21930 (__arm_vshrntq): Remove.
21931 (__arm_vshrnbq_m): Remove.
21932 (__arm_vshrntq_m): Remove.
21933 (vrshrnbq): Remove.
21934 (vrshrntq): Remove.
21935 (vrshrnbq_m): Remove.
21936 (vrshrntq_m): Remove.
21937 (vrshrnbq_n_s16): Remove.
21938 (vrshrntq_n_s16): Remove.
21939 (vrshrnbq_n_u16): Remove.
21940 (vrshrntq_n_u16): Remove.
21941 (vrshrnbq_n_s32): Remove.
21942 (vrshrntq_n_s32): Remove.
21943 (vrshrnbq_n_u32): Remove.
21944 (vrshrntq_n_u32): Remove.
21945 (vrshrnbq_m_n_s32): Remove.
21946 (vrshrnbq_m_n_s16): Remove.
21947 (vrshrnbq_m_n_u32): Remove.
21948 (vrshrnbq_m_n_u16): Remove.
21949 (vrshrntq_m_n_s32): Remove.
21950 (vrshrntq_m_n_s16): Remove.
21951 (vrshrntq_m_n_u32): Remove.
21952 (vrshrntq_m_n_u16): Remove.
21953 (__arm_vrshrnbq_n_s16): Remove.
21954 (__arm_vrshrntq_n_s16): Remove.
21955 (__arm_vrshrnbq_n_u16): Remove.
21956 (__arm_vrshrntq_n_u16): Remove.
21957 (__arm_vrshrnbq_n_s32): Remove.
21958 (__arm_vrshrntq_n_s32): Remove.
21959 (__arm_vrshrnbq_n_u32): Remove.
21960 (__arm_vrshrntq_n_u32): Remove.
21961 (__arm_vrshrnbq_m_n_s32): Remove.
21962 (__arm_vrshrnbq_m_n_s16): Remove.
21963 (__arm_vrshrnbq_m_n_u32): Remove.
21964 (__arm_vrshrnbq_m_n_u16): Remove.
21965 (__arm_vrshrntq_m_n_s32): Remove.
21966 (__arm_vrshrntq_m_n_s16): Remove.
21967 (__arm_vrshrntq_m_n_u32): Remove.
21968 (__arm_vrshrntq_m_n_u16): Remove.
21969 (__arm_vrshrnbq): Remove.
21970 (__arm_vrshrntq): Remove.
21971 (__arm_vrshrnbq_m): Remove.
21972 (__arm_vrshrntq_m): Remove.
21973 (vqshrnbq): Remove.
21974 (vqshrntq): Remove.
21975 (vqshrnbq_m): Remove.
21976 (vqshrntq_m): Remove.
21977 (vqshrnbq_n_s16): Remove.
21978 (vqshrntq_n_s16): Remove.
21979 (vqshrnbq_n_u16): Remove.
21980 (vqshrntq_n_u16): Remove.
21981 (vqshrnbq_n_s32): Remove.
21982 (vqshrntq_n_s32): Remove.
21983 (vqshrnbq_n_u32): Remove.
21984 (vqshrntq_n_u32): Remove.
21985 (vqshrnbq_m_n_s32): Remove.
21986 (vqshrnbq_m_n_s16): Remove.
21987 (vqshrnbq_m_n_u32): Remove.
21988 (vqshrnbq_m_n_u16): Remove.
21989 (vqshrntq_m_n_s32): Remove.
21990 (vqshrntq_m_n_s16): Remove.
21991 (vqshrntq_m_n_u32): Remove.
21992 (vqshrntq_m_n_u16): Remove.
21993 (__arm_vqshrnbq_n_s16): Remove.
21994 (__arm_vqshrntq_n_s16): Remove.
21995 (__arm_vqshrnbq_n_u16): Remove.
21996 (__arm_vqshrntq_n_u16): Remove.
21997 (__arm_vqshrnbq_n_s32): Remove.
21998 (__arm_vqshrntq_n_s32): Remove.
21999 (__arm_vqshrnbq_n_u32): Remove.
22000 (__arm_vqshrntq_n_u32): Remove.
22001 (__arm_vqshrnbq_m_n_s32): Remove.
22002 (__arm_vqshrnbq_m_n_s16): Remove.
22003 (__arm_vqshrnbq_m_n_u32): Remove.
22004 (__arm_vqshrnbq_m_n_u16): Remove.
22005 (__arm_vqshrntq_m_n_s32): Remove.
22006 (__arm_vqshrntq_m_n_s16): Remove.
22007 (__arm_vqshrntq_m_n_u32): Remove.
22008 (__arm_vqshrntq_m_n_u16): Remove.
22009 (__arm_vqshrnbq): Remove.
22010 (__arm_vqshrntq): Remove.
22011 (__arm_vqshrnbq_m): Remove.
22012 (__arm_vqshrntq_m): Remove.
22013 (vqrshrnbq): Remove.
22014 (vqrshrntq): Remove.
22015 (vqrshrnbq_m): Remove.
22016 (vqrshrntq_m): Remove.
22017 (vqrshrnbq_n_s16): Remove.
22018 (vqrshrnbq_n_u16): Remove.
22019 (vqrshrnbq_n_s32): Remove.
22020 (vqrshrnbq_n_u32): Remove.
22021 (vqrshrntq_n_s16): Remove.
22022 (vqrshrntq_n_u16): Remove.
22023 (vqrshrntq_n_s32): Remove.
22024 (vqrshrntq_n_u32): Remove.
22025 (vqrshrnbq_m_n_s32): Remove.
22026 (vqrshrnbq_m_n_s16): Remove.
22027 (vqrshrnbq_m_n_u32): Remove.
22028 (vqrshrnbq_m_n_u16): Remove.
22029 (vqrshrntq_m_n_s32): Remove.
22030 (vqrshrntq_m_n_s16): Remove.
22031 (vqrshrntq_m_n_u32): Remove.
22032 (vqrshrntq_m_n_u16): Remove.
22033 (__arm_vqrshrnbq_n_s16): Remove.
22034 (__arm_vqrshrnbq_n_u16): Remove.
22035 (__arm_vqrshrnbq_n_s32): Remove.
22036 (__arm_vqrshrnbq_n_u32): Remove.
22037 (__arm_vqrshrntq_n_s16): Remove.
22038 (__arm_vqrshrntq_n_u16): Remove.
22039 (__arm_vqrshrntq_n_s32): Remove.
22040 (__arm_vqrshrntq_n_u32): Remove.
22041 (__arm_vqrshrnbq_m_n_s32): Remove.
22042 (__arm_vqrshrnbq_m_n_s16): Remove.
22043 (__arm_vqrshrnbq_m_n_u32): Remove.
22044 (__arm_vqrshrnbq_m_n_u16): Remove.
22045 (__arm_vqrshrntq_m_n_s32): Remove.
22046 (__arm_vqrshrntq_m_n_s16): Remove.
22047 (__arm_vqrshrntq_m_n_u32): Remove.
22048 (__arm_vqrshrntq_m_n_u16): Remove.
22049 (__arm_vqrshrnbq): Remove.
22050 (__arm_vqrshrntq): Remove.
22051 (__arm_vqrshrnbq_m): Remove.
22052 (__arm_vqrshrntq_m): Remove.
22054 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
22056 * config/arm/iterators.md (MVE_SHRN_N, MVE_SHRN_M_N): New.
22057 (mve_insn): Add vqrshrnb, vqrshrnt, vqshrnb, vqshrnt, vrshrnb,
22058 vrshrnt, vshrnb, vshrnt.
22060 * config/arm/mve.md (mve_vqrshrnbq_n_<supf><mode>)
22061 (mve_vqrshrntq_n_<supf><mode>, mve_vqshrnbq_n_<supf><mode>)
22062 (mve_vqshrntq_n_<supf><mode>, mve_vrshrnbq_n_<supf><mode>)
22063 (mve_vrshrntq_n_<supf><mode>, mve_vshrnbq_n_<supf><mode>)
22064 (mve_vshrntq_n_<supf><mode>): Merge into ...
22065 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
22066 (mve_vqrshrnbq_m_n_<supf><mode>, mve_vqrshrntq_m_n_<supf><mode>)
22067 (mve_vqshrnbq_m_n_<supf><mode>, mve_vqshrntq_m_n_<supf><mode>)
22068 (mve_vrshrnbq_m_n_<supf><mode>, mve_vrshrntq_m_n_<supf><mode>)
22069 (mve_vshrnbq_m_n_<supf><mode>, mve_vshrntq_m_n_<supf><mode>):
22071 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
22073 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
22075 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift_narrow):
22077 * config/arm/arm-mve-builtins-shapes.h (binary_rshift_narrow): New.
22079 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
22081 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_NO_F): New.
22082 (vmaxq, vminq): New.
22083 * config/arm/arm-mve-builtins-base.def (vmaxq, vminq): New.
22084 * config/arm/arm-mve-builtins-base.h (vmaxq, vminq): New.
22085 * config/arm/arm_mve.h (vminq): Remove.
22091 (vminq_u8): Remove.
22092 (vmaxq_u8): Remove.
22093 (vminq_s8): Remove.
22094 (vmaxq_s8): Remove.
22095 (vminq_u16): Remove.
22096 (vmaxq_u16): Remove.
22097 (vminq_s16): Remove.
22098 (vmaxq_s16): Remove.
22099 (vminq_u32): Remove.
22100 (vmaxq_u32): Remove.
22101 (vminq_s32): Remove.
22102 (vmaxq_s32): Remove.
22103 (vmaxq_m_s8): Remove.
22104 (vmaxq_m_s32): Remove.
22105 (vmaxq_m_s16): Remove.
22106 (vmaxq_m_u8): Remove.
22107 (vmaxq_m_u32): Remove.
22108 (vmaxq_m_u16): Remove.
22109 (vminq_m_s8): Remove.
22110 (vminq_m_s32): Remove.
22111 (vminq_m_s16): Remove.
22112 (vminq_m_u8): Remove.
22113 (vminq_m_u32): Remove.
22114 (vminq_m_u16): Remove.
22115 (vminq_x_s8): Remove.
22116 (vminq_x_s16): Remove.
22117 (vminq_x_s32): Remove.
22118 (vminq_x_u8): Remove.
22119 (vminq_x_u16): Remove.
22120 (vminq_x_u32): Remove.
22121 (vmaxq_x_s8): Remove.
22122 (vmaxq_x_s16): Remove.
22123 (vmaxq_x_s32): Remove.
22124 (vmaxq_x_u8): Remove.
22125 (vmaxq_x_u16): Remove.
22126 (vmaxq_x_u32): Remove.
22127 (__arm_vminq_u8): Remove.
22128 (__arm_vmaxq_u8): Remove.
22129 (__arm_vminq_s8): Remove.
22130 (__arm_vmaxq_s8): Remove.
22131 (__arm_vminq_u16): Remove.
22132 (__arm_vmaxq_u16): Remove.
22133 (__arm_vminq_s16): Remove.
22134 (__arm_vmaxq_s16): Remove.
22135 (__arm_vminq_u32): Remove.
22136 (__arm_vmaxq_u32): Remove.
22137 (__arm_vminq_s32): Remove.
22138 (__arm_vmaxq_s32): Remove.
22139 (__arm_vmaxq_m_s8): Remove.
22140 (__arm_vmaxq_m_s32): Remove.
22141 (__arm_vmaxq_m_s16): Remove.
22142 (__arm_vmaxq_m_u8): Remove.
22143 (__arm_vmaxq_m_u32): Remove.
22144 (__arm_vmaxq_m_u16): Remove.
22145 (__arm_vminq_m_s8): Remove.
22146 (__arm_vminq_m_s32): Remove.
22147 (__arm_vminq_m_s16): Remove.
22148 (__arm_vminq_m_u8): Remove.
22149 (__arm_vminq_m_u32): Remove.
22150 (__arm_vminq_m_u16): Remove.
22151 (__arm_vminq_x_s8): Remove.
22152 (__arm_vminq_x_s16): Remove.
22153 (__arm_vminq_x_s32): Remove.
22154 (__arm_vminq_x_u8): Remove.
22155 (__arm_vminq_x_u16): Remove.
22156 (__arm_vminq_x_u32): Remove.
22157 (__arm_vmaxq_x_s8): Remove.
22158 (__arm_vmaxq_x_s16): Remove.
22159 (__arm_vmaxq_x_s32): Remove.
22160 (__arm_vmaxq_x_u8): Remove.
22161 (__arm_vmaxq_x_u16): Remove.
22162 (__arm_vmaxq_x_u32): Remove.
22163 (__arm_vminq): Remove.
22164 (__arm_vmaxq): Remove.
22165 (__arm_vmaxq_m): Remove.
22166 (__arm_vminq_m): Remove.
22167 (__arm_vminq_x): Remove.
22168 (__arm_vmaxq_x): Remove.
22170 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
22172 * config/arm/iterators.md (MAX_MIN_SU): New.
22173 (max_min_su_str): New.
22174 (max_min_supf): New.
22175 * config/arm/mve.md (mve_vmaxq_s<mode>, mve_vmaxq_u<mode>)
22176 (mve_vminq_s<mode>, mve_vminq_u<mode>): Merge into ...
22177 (mve_<max_min_su_str>q_<max_min_supf><mode>): ... this.
22179 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
22181 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_R): New.
22182 (vqshlq, vshlq): New.
22183 * config/arm/arm-mve-builtins-base.def (vqshlq, vshlq): New.
22184 * config/arm/arm-mve-builtins-base.h (vqshlq, vshlq): New.
22185 * config/arm/arm_mve.h (vshlq): Remove.
22188 (vshlq_m_r): Remove.
22190 (vshlq_m_n): Remove.
22192 (vshlq_x_n): Remove.
22193 (vshlq_s8): Remove.
22194 (vshlq_s16): Remove.
22195 (vshlq_s32): Remove.
22196 (vshlq_u8): Remove.
22197 (vshlq_u16): Remove.
22198 (vshlq_u32): Remove.
22199 (vshlq_r_u8): Remove.
22200 (vshlq_n_u8): Remove.
22201 (vshlq_r_s8): Remove.
22202 (vshlq_n_s8): Remove.
22203 (vshlq_r_u16): Remove.
22204 (vshlq_n_u16): Remove.
22205 (vshlq_r_s16): Remove.
22206 (vshlq_n_s16): Remove.
22207 (vshlq_r_u32): Remove.
22208 (vshlq_n_u32): Remove.
22209 (vshlq_r_s32): Remove.
22210 (vshlq_n_s32): Remove.
22211 (vshlq_m_r_u8): Remove.
22212 (vshlq_m_r_s8): Remove.
22213 (vshlq_m_r_u16): Remove.
22214 (vshlq_m_r_s16): Remove.
22215 (vshlq_m_r_u32): Remove.
22216 (vshlq_m_r_s32): Remove.
22217 (vshlq_m_u8): Remove.
22218 (vshlq_m_s8): Remove.
22219 (vshlq_m_u16): Remove.
22220 (vshlq_m_s16): Remove.
22221 (vshlq_m_u32): Remove.
22222 (vshlq_m_s32): Remove.
22223 (vshlq_m_n_s8): Remove.
22224 (vshlq_m_n_s32): Remove.
22225 (vshlq_m_n_s16): Remove.
22226 (vshlq_m_n_u8): Remove.
22227 (vshlq_m_n_u32): Remove.
22228 (vshlq_m_n_u16): Remove.
22229 (vshlq_x_s8): Remove.
22230 (vshlq_x_s16): Remove.
22231 (vshlq_x_s32): Remove.
22232 (vshlq_x_u8): Remove.
22233 (vshlq_x_u16): Remove.
22234 (vshlq_x_u32): Remove.
22235 (vshlq_x_n_s8): Remove.
22236 (vshlq_x_n_s16): Remove.
22237 (vshlq_x_n_s32): Remove.
22238 (vshlq_x_n_u8): Remove.
22239 (vshlq_x_n_u16): Remove.
22240 (vshlq_x_n_u32): Remove.
22241 (__arm_vshlq_s8): Remove.
22242 (__arm_vshlq_s16): Remove.
22243 (__arm_vshlq_s32): Remove.
22244 (__arm_vshlq_u8): Remove.
22245 (__arm_vshlq_u16): Remove.
22246 (__arm_vshlq_u32): Remove.
22247 (__arm_vshlq_r_u8): Remove.
22248 (__arm_vshlq_n_u8): Remove.
22249 (__arm_vshlq_r_s8): Remove.
22250 (__arm_vshlq_n_s8): Remove.
22251 (__arm_vshlq_r_u16): Remove.
22252 (__arm_vshlq_n_u16): Remove.
22253 (__arm_vshlq_r_s16): Remove.
22254 (__arm_vshlq_n_s16): Remove.
22255 (__arm_vshlq_r_u32): Remove.
22256 (__arm_vshlq_n_u32): Remove.
22257 (__arm_vshlq_r_s32): Remove.
22258 (__arm_vshlq_n_s32): Remove.
22259 (__arm_vshlq_m_r_u8): Remove.
22260 (__arm_vshlq_m_r_s8): Remove.
22261 (__arm_vshlq_m_r_u16): Remove.
22262 (__arm_vshlq_m_r_s16): Remove.
22263 (__arm_vshlq_m_r_u32): Remove.
22264 (__arm_vshlq_m_r_s32): Remove.
22265 (__arm_vshlq_m_u8): Remove.
22266 (__arm_vshlq_m_s8): Remove.
22267 (__arm_vshlq_m_u16): Remove.
22268 (__arm_vshlq_m_s16): Remove.
22269 (__arm_vshlq_m_u32): Remove.
22270 (__arm_vshlq_m_s32): Remove.
22271 (__arm_vshlq_m_n_s8): Remove.
22272 (__arm_vshlq_m_n_s32): Remove.
22273 (__arm_vshlq_m_n_s16): Remove.
22274 (__arm_vshlq_m_n_u8): Remove.
22275 (__arm_vshlq_m_n_u32): Remove.
22276 (__arm_vshlq_m_n_u16): Remove.
22277 (__arm_vshlq_x_s8): Remove.
22278 (__arm_vshlq_x_s16): Remove.
22279 (__arm_vshlq_x_s32): Remove.
22280 (__arm_vshlq_x_u8): Remove.
22281 (__arm_vshlq_x_u16): Remove.
22282 (__arm_vshlq_x_u32): Remove.
22283 (__arm_vshlq_x_n_s8): Remove.
22284 (__arm_vshlq_x_n_s16): Remove.
22285 (__arm_vshlq_x_n_s32): Remove.
22286 (__arm_vshlq_x_n_u8): Remove.
22287 (__arm_vshlq_x_n_u16): Remove.
22288 (__arm_vshlq_x_n_u32): Remove.
22289 (__arm_vshlq): Remove.
22290 (__arm_vshlq_r): Remove.
22291 (__arm_vshlq_n): Remove.
22292 (__arm_vshlq_m_r): Remove.
22293 (__arm_vshlq_m): Remove.
22294 (__arm_vshlq_m_n): Remove.
22295 (__arm_vshlq_x): Remove.
22296 (__arm_vshlq_x_n): Remove.
22298 (vqshlq_r): Remove.
22299 (vqshlq_n): Remove.
22300 (vqshlq_m_r): Remove.
22301 (vqshlq_m_n): Remove.
22302 (vqshlq_m): Remove.
22303 (vqshlq_u8): Remove.
22304 (vqshlq_r_u8): Remove.
22305 (vqshlq_n_u8): Remove.
22306 (vqshlq_s8): Remove.
22307 (vqshlq_r_s8): Remove.
22308 (vqshlq_n_s8): Remove.
22309 (vqshlq_u16): Remove.
22310 (vqshlq_r_u16): Remove.
22311 (vqshlq_n_u16): Remove.
22312 (vqshlq_s16): Remove.
22313 (vqshlq_r_s16): Remove.
22314 (vqshlq_n_s16): Remove.
22315 (vqshlq_u32): Remove.
22316 (vqshlq_r_u32): Remove.
22317 (vqshlq_n_u32): Remove.
22318 (vqshlq_s32): Remove.
22319 (vqshlq_r_s32): Remove.
22320 (vqshlq_n_s32): Remove.
22321 (vqshlq_m_r_u8): Remove.
22322 (vqshlq_m_r_s8): Remove.
22323 (vqshlq_m_r_u16): Remove.
22324 (vqshlq_m_r_s16): Remove.
22325 (vqshlq_m_r_u32): Remove.
22326 (vqshlq_m_r_s32): Remove.
22327 (vqshlq_m_n_s8): Remove.
22328 (vqshlq_m_n_s32): Remove.
22329 (vqshlq_m_n_s16): Remove.
22330 (vqshlq_m_n_u8): Remove.
22331 (vqshlq_m_n_u32): Remove.
22332 (vqshlq_m_n_u16): Remove.
22333 (vqshlq_m_s8): Remove.
22334 (vqshlq_m_s32): Remove.
22335 (vqshlq_m_s16): Remove.
22336 (vqshlq_m_u8): Remove.
22337 (vqshlq_m_u32): Remove.
22338 (vqshlq_m_u16): Remove.
22339 (__arm_vqshlq_u8): Remove.
22340 (__arm_vqshlq_r_u8): Remove.
22341 (__arm_vqshlq_n_u8): Remove.
22342 (__arm_vqshlq_s8): Remove.
22343 (__arm_vqshlq_r_s8): Remove.
22344 (__arm_vqshlq_n_s8): Remove.
22345 (__arm_vqshlq_u16): Remove.
22346 (__arm_vqshlq_r_u16): Remove.
22347 (__arm_vqshlq_n_u16): Remove.
22348 (__arm_vqshlq_s16): Remove.
22349 (__arm_vqshlq_r_s16): Remove.
22350 (__arm_vqshlq_n_s16): Remove.
22351 (__arm_vqshlq_u32): Remove.
22352 (__arm_vqshlq_r_u32): Remove.
22353 (__arm_vqshlq_n_u32): Remove.
22354 (__arm_vqshlq_s32): Remove.
22355 (__arm_vqshlq_r_s32): Remove.
22356 (__arm_vqshlq_n_s32): Remove.
22357 (__arm_vqshlq_m_r_u8): Remove.
22358 (__arm_vqshlq_m_r_s8): Remove.
22359 (__arm_vqshlq_m_r_u16): Remove.
22360 (__arm_vqshlq_m_r_s16): Remove.
22361 (__arm_vqshlq_m_r_u32): Remove.
22362 (__arm_vqshlq_m_r_s32): Remove.
22363 (__arm_vqshlq_m_n_s8): Remove.
22364 (__arm_vqshlq_m_n_s32): Remove.
22365 (__arm_vqshlq_m_n_s16): Remove.
22366 (__arm_vqshlq_m_n_u8): Remove.
22367 (__arm_vqshlq_m_n_u32): Remove.
22368 (__arm_vqshlq_m_n_u16): Remove.
22369 (__arm_vqshlq_m_s8): Remove.
22370 (__arm_vqshlq_m_s32): Remove.
22371 (__arm_vqshlq_m_s16): Remove.
22372 (__arm_vqshlq_m_u8): Remove.
22373 (__arm_vqshlq_m_u32): Remove.
22374 (__arm_vqshlq_m_u16): Remove.
22375 (__arm_vqshlq): Remove.
22376 (__arm_vqshlq_r): Remove.
22377 (__arm_vqshlq_n): Remove.
22378 (__arm_vqshlq_m_r): Remove.
22379 (__arm_vqshlq_m_n): Remove.
22380 (__arm_vqshlq_m): Remove.
22382 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
22384 * config/arm/arm-mve-builtins-functions.h (class
22385 unspec_mve_function_exact_insn_vshl): New.
22387 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
22389 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift_r): New.
22390 * config/arm/arm-mve-builtins-shapes.h (binary_lshift_r): New.
22392 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
22394 * config/arm/arm-mve-builtins.cc (has_inactive_argument)
22395 (finish_opt_n_resolution): Handle MODE_r.
22396 * config/arm/arm-mve-builtins.def (r): New mode.
22398 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
22400 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift): New.
22401 * config/arm/arm-mve-builtins-shapes.h (binary_lshift): New.
22403 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
22405 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N): New.
22407 * config/arm/arm-mve-builtins-base.def (vabdq): New.
22408 * config/arm/arm-mve-builtins-base.h (vabdq): New.
22409 * config/arm/arm_mve.h (vabdq): Remove.
22412 (vabdq_u8): Remove.
22413 (vabdq_s8): Remove.
22414 (vabdq_u16): Remove.
22415 (vabdq_s16): Remove.
22416 (vabdq_u32): Remove.
22417 (vabdq_s32): Remove.
22418 (vabdq_f16): Remove.
22419 (vabdq_f32): Remove.
22420 (vabdq_m_s8): Remove.
22421 (vabdq_m_s32): Remove.
22422 (vabdq_m_s16): Remove.
22423 (vabdq_m_u8): Remove.
22424 (vabdq_m_u32): Remove.
22425 (vabdq_m_u16): Remove.
22426 (vabdq_m_f32): Remove.
22427 (vabdq_m_f16): Remove.
22428 (vabdq_x_s8): Remove.
22429 (vabdq_x_s16): Remove.
22430 (vabdq_x_s32): Remove.
22431 (vabdq_x_u8): Remove.
22432 (vabdq_x_u16): Remove.
22433 (vabdq_x_u32): Remove.
22434 (vabdq_x_f16): Remove.
22435 (vabdq_x_f32): Remove.
22436 (__arm_vabdq_u8): Remove.
22437 (__arm_vabdq_s8): Remove.
22438 (__arm_vabdq_u16): Remove.
22439 (__arm_vabdq_s16): Remove.
22440 (__arm_vabdq_u32): Remove.
22441 (__arm_vabdq_s32): Remove.
22442 (__arm_vabdq_m_s8): Remove.
22443 (__arm_vabdq_m_s32): Remove.
22444 (__arm_vabdq_m_s16): Remove.
22445 (__arm_vabdq_m_u8): Remove.
22446 (__arm_vabdq_m_u32): Remove.
22447 (__arm_vabdq_m_u16): Remove.
22448 (__arm_vabdq_x_s8): Remove.
22449 (__arm_vabdq_x_s16): Remove.
22450 (__arm_vabdq_x_s32): Remove.
22451 (__arm_vabdq_x_u8): Remove.
22452 (__arm_vabdq_x_u16): Remove.
22453 (__arm_vabdq_x_u32): Remove.
22454 (__arm_vabdq_f16): Remove.
22455 (__arm_vabdq_f32): Remove.
22456 (__arm_vabdq_m_f32): Remove.
22457 (__arm_vabdq_m_f16): Remove.
22458 (__arm_vabdq_x_f16): Remove.
22459 (__arm_vabdq_x_f32): Remove.
22460 (__arm_vabdq): Remove.
22461 (__arm_vabdq_m): Remove.
22462 (__arm_vabdq_x): Remove.
22464 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
22466 * config/arm/iterators.md (MVE_FP_M_BINARY): Add vabdq.
22467 (MVE_FP_VABDQ_ONLY): New.
22468 (mve_insn): Add vabd.
22469 * config/arm/mve.md (mve_vabdq_f<mode>): Move into ...
22470 (@mve_<mve_insn>q_f<mode>): ... this.
22471 (mve_vabdq_m_f<mode>): Remove.
22473 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
22475 * config/arm/arm-mve-builtins-base.cc (vqrdmulhq): New.
22476 * config/arm/arm-mve-builtins-base.def (vqrdmulhq): New.
22477 * config/arm/arm-mve-builtins-base.h (vqrdmulhq): New.
22478 * config/arm/arm_mve.h (vqrdmulhq): Remove.
22479 (vqrdmulhq_m): Remove.
22480 (vqrdmulhq_s8): Remove.
22481 (vqrdmulhq_n_s8): Remove.
22482 (vqrdmulhq_s16): Remove.
22483 (vqrdmulhq_n_s16): Remove.
22484 (vqrdmulhq_s32): Remove.
22485 (vqrdmulhq_n_s32): Remove.
22486 (vqrdmulhq_m_n_s8): Remove.
22487 (vqrdmulhq_m_n_s32): Remove.
22488 (vqrdmulhq_m_n_s16): Remove.
22489 (vqrdmulhq_m_s8): Remove.
22490 (vqrdmulhq_m_s32): Remove.
22491 (vqrdmulhq_m_s16): Remove.
22492 (__arm_vqrdmulhq_s8): Remove.
22493 (__arm_vqrdmulhq_n_s8): Remove.
22494 (__arm_vqrdmulhq_s16): Remove.
22495 (__arm_vqrdmulhq_n_s16): Remove.
22496 (__arm_vqrdmulhq_s32): Remove.
22497 (__arm_vqrdmulhq_n_s32): Remove.
22498 (__arm_vqrdmulhq_m_n_s8): Remove.
22499 (__arm_vqrdmulhq_m_n_s32): Remove.
22500 (__arm_vqrdmulhq_m_n_s16): Remove.
22501 (__arm_vqrdmulhq_m_s8): Remove.
22502 (__arm_vqrdmulhq_m_s32): Remove.
22503 (__arm_vqrdmulhq_m_s16): Remove.
22504 (__arm_vqrdmulhq): Remove.
22505 (__arm_vqrdmulhq_m): Remove.
22507 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
22509 * config/arm/iterators.md (MVE_SHIFT_M_R, MVE_SHIFT_M_N)
22510 (MVE_SHIFT_N, MVE_SHIFT_R): New.
22511 (mve_insn): Add vqshl, vshl.
22512 * config/arm/mve.md (mve_vqshlq_n_<supf><mode>)
22513 (mve_vshlq_n_<supf><mode>): Merge into ...
22514 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
22515 (mve_vqshlq_r_<supf><mode>, mve_vshlq_r_<supf><mode>): Merge into
22517 (@mve_<mve_insn>q_r_<supf><mode>): ... this.
22518 (mve_vqshlq_m_r_<supf><mode>, mve_vshlq_m_r_<supf><mode>): Merge
22520 (@mve_<mve_insn>q_m_r_<supf><mode>): ... this.
22521 (mve_vqshlq_m_n_<supf><mode>, mve_vshlq_m_n_<supf><mode>): Merge
22523 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
22524 * config/arm/vec-common.md (mve_vshlq_<supf><mode>): Transform
22526 (@mve_<mve_insn>q_<supf><mode>): ... this.
22528 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
22530 * config/arm/arm-mve-builtins-base.cc (vqrshlq, vrshlq): New.
22531 * config/arm/arm-mve-builtins-base.def (vqrshlq, vrshlq): New.
22532 * config/arm/arm-mve-builtins-base.h (vqrshlq, vrshlq): New.
22533 * config/arm/arm-mve-builtins.cc (has_inactive_argument): Handle
22535 * config/arm/arm_mve.h (vrshlq): Remove.
22536 (vrshlq_m_n): Remove.
22537 (vrshlq_m): Remove.
22538 (vrshlq_x): Remove.
22539 (vrshlq_u8): Remove.
22540 (vrshlq_n_u8): Remove.
22541 (vrshlq_s8): Remove.
22542 (vrshlq_n_s8): Remove.
22543 (vrshlq_u16): Remove.
22544 (vrshlq_n_u16): Remove.
22545 (vrshlq_s16): Remove.
22546 (vrshlq_n_s16): Remove.
22547 (vrshlq_u32): Remove.
22548 (vrshlq_n_u32): Remove.
22549 (vrshlq_s32): Remove.
22550 (vrshlq_n_s32): Remove.
22551 (vrshlq_m_n_u8): Remove.
22552 (vrshlq_m_n_s8): Remove.
22553 (vrshlq_m_n_u16): Remove.
22554 (vrshlq_m_n_s16): Remove.
22555 (vrshlq_m_n_u32): Remove.
22556 (vrshlq_m_n_s32): Remove.
22557 (vrshlq_m_s8): Remove.
22558 (vrshlq_m_s32): Remove.
22559 (vrshlq_m_s16): Remove.
22560 (vrshlq_m_u8): Remove.
22561 (vrshlq_m_u32): Remove.
22562 (vrshlq_m_u16): Remove.
22563 (vrshlq_x_s8): Remove.
22564 (vrshlq_x_s16): Remove.
22565 (vrshlq_x_s32): Remove.
22566 (vrshlq_x_u8): Remove.
22567 (vrshlq_x_u16): Remove.
22568 (vrshlq_x_u32): Remove.
22569 (__arm_vrshlq_u8): Remove.
22570 (__arm_vrshlq_n_u8): Remove.
22571 (__arm_vrshlq_s8): Remove.
22572 (__arm_vrshlq_n_s8): Remove.
22573 (__arm_vrshlq_u16): Remove.
22574 (__arm_vrshlq_n_u16): Remove.
22575 (__arm_vrshlq_s16): Remove.
22576 (__arm_vrshlq_n_s16): Remove.
22577 (__arm_vrshlq_u32): Remove.
22578 (__arm_vrshlq_n_u32): Remove.
22579 (__arm_vrshlq_s32): Remove.
22580 (__arm_vrshlq_n_s32): Remove.
22581 (__arm_vrshlq_m_n_u8): Remove.
22582 (__arm_vrshlq_m_n_s8): Remove.
22583 (__arm_vrshlq_m_n_u16): Remove.
22584 (__arm_vrshlq_m_n_s16): Remove.
22585 (__arm_vrshlq_m_n_u32): Remove.
22586 (__arm_vrshlq_m_n_s32): Remove.
22587 (__arm_vrshlq_m_s8): Remove.
22588 (__arm_vrshlq_m_s32): Remove.
22589 (__arm_vrshlq_m_s16): Remove.
22590 (__arm_vrshlq_m_u8): Remove.
22591 (__arm_vrshlq_m_u32): Remove.
22592 (__arm_vrshlq_m_u16): Remove.
22593 (__arm_vrshlq_x_s8): Remove.
22594 (__arm_vrshlq_x_s16): Remove.
22595 (__arm_vrshlq_x_s32): Remove.
22596 (__arm_vrshlq_x_u8): Remove.
22597 (__arm_vrshlq_x_u16): Remove.
22598 (__arm_vrshlq_x_u32): Remove.
22599 (__arm_vrshlq): Remove.
22600 (__arm_vrshlq_m_n): Remove.
22601 (__arm_vrshlq_m): Remove.
22602 (__arm_vrshlq_x): Remove.
22604 (vqrshlq_m_n): Remove.
22605 (vqrshlq_m): Remove.
22606 (vqrshlq_u8): Remove.
22607 (vqrshlq_n_u8): Remove.
22608 (vqrshlq_s8): Remove.
22609 (vqrshlq_n_s8): Remove.
22610 (vqrshlq_u16): Remove.
22611 (vqrshlq_n_u16): Remove.
22612 (vqrshlq_s16): Remove.
22613 (vqrshlq_n_s16): Remove.
22614 (vqrshlq_u32): Remove.
22615 (vqrshlq_n_u32): Remove.
22616 (vqrshlq_s32): Remove.
22617 (vqrshlq_n_s32): Remove.
22618 (vqrshlq_m_n_u8): Remove.
22619 (vqrshlq_m_n_s8): Remove.
22620 (vqrshlq_m_n_u16): Remove.
22621 (vqrshlq_m_n_s16): Remove.
22622 (vqrshlq_m_n_u32): Remove.
22623 (vqrshlq_m_n_s32): Remove.
22624 (vqrshlq_m_s8): Remove.
22625 (vqrshlq_m_s32): Remove.
22626 (vqrshlq_m_s16): Remove.
22627 (vqrshlq_m_u8): Remove.
22628 (vqrshlq_m_u32): Remove.
22629 (vqrshlq_m_u16): Remove.
22630 (__arm_vqrshlq_u8): Remove.
22631 (__arm_vqrshlq_n_u8): Remove.
22632 (__arm_vqrshlq_s8): Remove.
22633 (__arm_vqrshlq_n_s8): Remove.
22634 (__arm_vqrshlq_u16): Remove.
22635 (__arm_vqrshlq_n_u16): Remove.
22636 (__arm_vqrshlq_s16): Remove.
22637 (__arm_vqrshlq_n_s16): Remove.
22638 (__arm_vqrshlq_u32): Remove.
22639 (__arm_vqrshlq_n_u32): Remove.
22640 (__arm_vqrshlq_s32): Remove.
22641 (__arm_vqrshlq_n_s32): Remove.
22642 (__arm_vqrshlq_m_n_u8): Remove.
22643 (__arm_vqrshlq_m_n_s8): Remove.
22644 (__arm_vqrshlq_m_n_u16): Remove.
22645 (__arm_vqrshlq_m_n_s16): Remove.
22646 (__arm_vqrshlq_m_n_u32): Remove.
22647 (__arm_vqrshlq_m_n_s32): Remove.
22648 (__arm_vqrshlq_m_s8): Remove.
22649 (__arm_vqrshlq_m_s32): Remove.
22650 (__arm_vqrshlq_m_s16): Remove.
22651 (__arm_vqrshlq_m_u8): Remove.
22652 (__arm_vqrshlq_m_u32): Remove.
22653 (__arm_vqrshlq_m_u16): Remove.
22654 (__arm_vqrshlq): Remove.
22655 (__arm_vqrshlq_m_n): Remove.
22656 (__arm_vqrshlq_m): Remove.
22658 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
22660 * config/arm/iterators.md (MVE_RSHIFT_M_N, MVE_RSHIFT_N): New.
22661 (mve_insn): Add vqrshl, vrshl.
22662 * config/arm/mve.md (mve_vqrshlq_n_<supf><mode>)
22663 (mve_vrshlq_n_<supf><mode>): Merge into ...
22664 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
22665 (mve_vqrshlq_m_n_<supf><mode>, mve_vrshlq_m_n_<supf><mode>): Merge
22667 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
22669 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
22671 * config/arm/arm-mve-builtins-shapes.cc (binary_round_lshift): New.
22672 * config/arm/arm-mve-builtins-shapes.h (binary_round_lshift): New.
22674 2023-05-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22677 * config/riscv/riscv-vsetvl.cc (avl_info::multiple_source_equal_p): Add
22678 denegrate PHI optmization.
22680 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
22682 * config/i386/predicates.md (register_no_SP_operand):
22683 Rename from index_register_operand.
22684 (call_register_operand): Update for rename.
22685 * config/i386/i386.md (*lea<mode>_general_[1234]): Update for rename.
22687 2023-05-05 Tamar Christina <tamar.christina@arm.com>
22690 * Makefile.in (NUM_MATCH_SPLITS, MATCH_SPLITS_SEQ,
22691 GIMPLE_MATCH_PD_SEQ_SRC, GIMPLE_MATCH_PD_SEQ_O,
22692 GENERIC_MATCH_PD_SEQ_SRC, GENERIC_MATCH_PD_SEQ_O): New.
22693 (OBJS, MOSTLYCLEANFILES, .PRECIOUS): Use them.
22694 (s-match): Split into s-generic-match and s-gimple-match.
22695 * configure.ac (with-matchpd-partitions,
22696 DEFAULT_MATCHPD_PARTITIONS): New.
22697 * configure: Regenerate.
22699 2023-05-05 Tamar Christina <tamar.christina@arm.com>
22702 * genmatch.cc (emit_func, SIZED_BASED_CHUNKS, get_out_file): New.
22703 (decision_tree::gen): Accept list of files instead of single and update
22704 to write function definition to header and main file.
22705 (write_predicate): Likewise.
22706 (write_header): Emit pragmas and new includes.
22707 (main): Create file buffers and cleanup.
22708 (showUsage, write_header_includes): New.
22710 2023-05-05 Tamar Christina <tamar.christina@arm.com>
22713 * Makefile.in (OBJS): Add gimple-match-exports.o.
22714 * genmatch.cc (decision_tree::gen): Export gimple_gimplify helpers.
22715 * gimple-match-head.cc (gimple_simplify, gimple_resimplify1,
22716 gimple_resimplify2, gimple_resimplify3, gimple_resimplify4,
22717 gimple_resimplify5, constant_for_folding, convert_conditional_op,
22718 maybe_resimplify_conditional_op, gimple_match_op::resimplify,
22719 maybe_build_generic_op, build_call_internal, maybe_push_res_to_seq,
22720 do_valueize, try_conditional_simplification, gimple_extract,
22721 gimple_extract_op, canonicalize_code, commutative_binary_op_p,
22722 commutative_ternary_op_p, first_commutative_argument,
22723 associative_binary_op_p, directly_supported_p,
22724 get_conditional_internal_fn): Moved to gimple-match-exports.cc
22725 * gimple-match-exports.cc: New file.
22727 2023-05-05 Tamar Christina <tamar.christina@arm.com>
22730 * genmatch.cc (decision_tree::gen, write_predicate): Generate new
22732 (dt_simplify::gen_1): Use it.
22734 2023-05-05 Tamar Christina <tamar.christina@arm.com>
22737 * genmatch.cc (output_line_directive): Only emit commented directive
22740 2023-05-05 Tamar Christina <tamar.christina@arm.com>
22743 * genmatch.cc (dt_simplify::gen_1): Only emit labels if used.
22745 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
22747 * config/gcn/gcn.cc (gcn_vectorize_builtin_vectorized_function): Remove
22748 unused in_mode/in_n variables.
22750 2023-05-05 Richard Biener <rguenther@suse.de>
22752 PR tree-optimization/109735
22753 * tree-vect-stmts.cc (vectorizable_operation): Perform
22754 conversion for POINTER_DIFF_EXPR unconditionally.
22756 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
22758 * config/i386/mmx.md (mulv2si3): New expander.
22759 (*mulv2si3): New insn pattern.
22761 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
22762 Thomas Schwinge <thomas@codesourcery.com>
22765 * config/nvptx/mkoffload.cc (process): Emit dummy procedure
22766 alongside reverse-offload function table to prevent NULL values
22767 of the function addresses.
22769 2023-05-05 Jakub Jelinek <jakub@redhat.com>
22771 * builtins.cc (do_mpfr_ckconv, do_mpc_ckconv): Fix comment typo,
22773 * fold-const-call.cc (do_mpfr_ckconv, do_mpc_ckconv): Likewise.
22775 2023-05-05 Andrew Pinski <apinski@marvell.com>
22777 PR tree-optimization/109732
22778 * tree-ssa-phiopt.cc (match_simplify_replacement): Fix the selection
22779 of the argtrue/argfalse.
22781 2023-05-05 Andrew Pinski <apinski@marvell.com>
22783 PR tree-optimization/109722
22784 * match.pd: Extend the `ABS<a> == 0` pattern
22785 to cover `ABSU<a> == 0` too.
22787 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
22790 * config/i386/predicates.md (index_reg_operand): New predicate.
22791 * config/i386/i386.md (ashift to lea spliter): Use
22792 general_reg_operand and index_reg_operand predicates.
22794 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22796 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn2<mode>_insn_le):
22797 Rename and reimplement with RTL codes to...
22798 (aarch64_<optab>hn2<mode>_insn_le): .. This.
22799 (aarch64_r<optab>hn2<mode>_insn_le): New pattern.
22800 (aarch64_<sur><addsub>hn2<mode>_insn_be): Rename and reimplement with RTL
22802 (aarch64_<optab>hn2<mode>_insn_be): ... This.
22803 (aarch64_r<optab>hn2<mode>_insn_be): New pattern.
22804 (aarch64_<sur><addsub>hn2<mode>): Rename and adjust expander to...
22805 (aarch64_<optab>hn2<mode>): ... This.
22806 (aarch64_r<optab>hn2<mode>): New expander.
22807 * config/aarch64/iterators.md (UNSPEC_ADDHN, UNSPEC_RADDHN,
22808 UNSPEC_SUBHN, UNSPEC_RSUBHN): Delete unspecs.
22809 (ADDSUBHN): Delete.
22810 (sur): Remove handling of the above.
22811 (addsub): Likewise.
22813 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22815 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn<mode>_insn_le):
22817 (aarch64_<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
22818 (aarch64_<sur><addsub>hn<mode>_insn_be): Delete.
22819 (aarch64_r<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
22820 (aarch64_<sur><addsub>hn<mode>): Delete.
22821 (aarch64_<optab>hn<mode>): New define_expand.
22822 (aarch64_r<optab>hn<mode>): Likewise.
22823 * config/aarch64/predicates.md (aarch64_simd_raddsubhn_imm_vec):
22826 2023-05-04 Andrew Pinski <apinski@marvell.com>
22828 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Handle
22829 diamond form bb with forwarder only empty blocks better.
22831 2023-05-04 Andrew Pinski <apinski@marvell.com>
22833 * tree-ssa-threadupdate.cc (copy_phi_arg_into_existing_phi): Move to ...
22834 * tree-cfg.cc (copy_phi_arg_into_existing_phi): Here and remove static.
22835 (gimple_duplicate_sese_tail): Use copy_phi_arg_into_existing_phi instead
22836 of an inline version of it.
22837 * tree-cfgcleanup.cc (remove_forwarder_block): Likewise.
22838 * tree-cfg.h (copy_phi_arg_into_existing_phi): New declaration.
22840 2023-05-04 Andrew Pinski <apinski@marvell.com>
22842 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Change
22843 the default argument value for dce_ssa_names to nullptr.
22844 Check to make sure dce_ssa_names is a non-nullptr before
22845 calling simple_dce_from_worklist.
22847 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
22849 * config/i386/predicates.md (index_register_operand): Reject
22850 arg_pointer_rtx, frame_pointer_rtx, stack_pointer_rtx and
22851 VIRTUAL_REGISTER_P operands. Allow subregs of memory before reload.
22852 (call_register_no_elim_operand): Rewrite as ...
22853 (call_register_operand): ... this.
22854 (call_insn_operand): Use call_register_operand predicate.
22856 2023-05-04 Richard Biener <rguenther@suse.de>
22858 PR tree-optimization/109721
22859 * tree-vect-stmts.cc (vectorizable_operation): Make sure
22860 to test word_mode for all !target_support_p operations.
22862 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22865 * config/aarch64/aarch64-simd.md (aarch64_<su>aba<mode>): Rename to...
22866 (aarch64_<su>aba<mode><vczle><vczbe>): ... This.
22867 (aarch64_mla<mode>): Rename to...
22868 (aarch64_mla<mode><vczle><vczbe>): ... This.
22869 (*aarch64_mla_elt<mode>): Rename to...
22870 (*aarch64_mla_elt<mode><vczle><vczbe>): ... This.
22871 (*aarch64_mla_elt_<vswap_width_name><mode>): Rename to...
22872 (*aarch64_mla_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
22873 (aarch64_mla_n<mode>): Rename to...
22874 (aarch64_mla_n<mode><vczle><vczbe>): ... This.
22875 (aarch64_mls<mode>): Rename to...
22876 (aarch64_mls<mode><vczle><vczbe>): ... This.
22877 (*aarch64_mls_elt<mode>): Rename to...
22878 (*aarch64_mls_elt<mode><vczle><vczbe>): ... This.
22879 (*aarch64_mls_elt_<vswap_width_name><mode>): Rename to...
22880 (*aarch64_mls_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
22881 (aarch64_mls_n<mode>): Rename to...
22882 (aarch64_mls_n<mode><vczle><vczbe>): ... This.
22883 (fma<mode>4): Rename to...
22884 (fma<mode>4<vczle><vczbe>): ... This.
22885 (*aarch64_fma4_elt<mode>): Rename to...
22886 (*aarch64_fma4_elt<mode><vczle><vczbe>): ... This.
22887 (*aarch64_fma4_elt_<vswap_width_name><mode>): Rename to...
22888 (*aarch64_fma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
22889 (*aarch64_fma4_elt_from_dup<mode>): Rename to...
22890 (*aarch64_fma4_elt_from_dup<mode><vczle><vczbe>): ... This.
22891 (fnma<mode>4): Rename to...
22892 (fnma<mode>4<vczle><vczbe>): ... This.
22893 (*aarch64_fnma4_elt<mode>): Rename to...
22894 (*aarch64_fnma4_elt<mode><vczle><vczbe>): ... This.
22895 (*aarch64_fnma4_elt_<vswap_width_name><mode>): Rename to...
22896 (*aarch64_fnma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
22897 (*aarch64_fnma4_elt_from_dup<mode>): Rename to...
22898 (*aarch64_fnma4_elt_from_dup<mode><vczle><vczbe>): ... This.
22899 (aarch64_simd_bsl<mode>_internal): Rename to...
22900 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>): ... This.
22901 (*aarch64_simd_bsl<mode>_alt): Rename to...
22902 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>): ... This.
22904 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22907 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>): Rename to...
22908 (aarch64_<su>abd<mode><vczle><vczbe>): ... This.
22909 (fabd<mode>3): Rename to...
22910 (fabd<mode>3<vczle><vczbe>): ... This.
22911 (aarch64_<optab>p<mode>): Rename to...
22912 (aarch64_<optab>p<mode><vczle><vczbe>): ... This.
22913 (aarch64_faddp<mode>): Rename to...
22914 (aarch64_faddp<mode><vczle><vczbe>): ... This.
22916 2023-05-04 Martin Liska <mliska@suse.cz>
22918 * gcov.cc (GCOV_JSON_FORMAT_VERSION): New definition.
22919 (print_version): Use it.
22920 (generate_results): Likewise.
22922 2023-05-04 Richard Biener <rguenther@suse.de>
22924 * tree-cfg.h (last_stmt): Rename to ...
22925 (last_nondebug_stmt): ... this.
22926 * tree-cfg.cc (last_stmt): Rename to ...
22927 (last_nondebug_stmt): ... this.
22928 (assign_discriminators): Adjust.
22929 (group_case_labels_stmt): Likewise.
22930 (gimple_can_duplicate_bb_p): Likewise.
22931 (execute_fixup_cfg): Likewise.
22932 * auto-profile.cc (afdo_propagate_circuit): Likewise.
22933 * gimple-range.cc (gimple_ranger::range_on_exit): Likewise.
22934 * omp-expand.cc (workshare_safe_to_combine_p): Likewise.
22935 (determine_parallel_type): Likewise.
22936 (adjust_context_and_scope): Likewise.
22937 (expand_task_call): Likewise.
22938 (remove_exit_barrier): Likewise.
22939 (expand_omp_taskreg): Likewise.
22940 (expand_omp_for_init_counts): Likewise.
22941 (expand_omp_for_init_vars): Likewise.
22942 (expand_omp_for_static_chunk): Likewise.
22943 (expand_omp_simd): Likewise.
22944 (expand_oacc_for): Likewise.
22945 (expand_omp_for): Likewise.
22946 (expand_omp_sections): Likewise.
22947 (expand_omp_atomic_fetch_op): Likewise.
22948 (expand_omp_atomic_cas): Likewise.
22949 (expand_omp_atomic): Likewise.
22950 (expand_omp_target): Likewise.
22951 (expand_omp): Likewise.
22952 (omp_make_gimple_edges): Likewise.
22953 * trans-mem.cc (tm_region_init): Likewise.
22954 * tree-inline.cc (redirect_all_calls): Likewise.
22955 * tree-parloops.cc (gen_parallel_loop): Likewise.
22956 * tree-ssa-loop-ch.cc (do_while_loop_p): Likewise.
22957 * tree-ssa-loop-ivcanon.cc (canonicalize_loop_induction_variables):
22959 * tree-ssa-loop-ivopts.cc (stmt_after_ip_normal_pos): Likewise.
22960 (may_eliminate_iv): Likewise.
22961 * tree-ssa-loop-manip.cc (standard_iv_increment_position): Likewise.
22962 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations):
22964 (estimate_numbers_of_iterations): Likewise.
22965 * tree-ssa-loop-split.cc (compute_added_num_insns): Likewise.
22966 * tree-ssa-loop-unswitch.cc (get_predicates_for_bb): Likewise.
22967 (set_predicates_for_bb): Likewise.
22968 (init_loop_unswitch_info): Likewise.
22969 (hoist_guard): Likewise.
22970 * tree-ssa-phiopt.cc (match_simplify_replacement): Likewise.
22971 (minmax_replacement): Likewise.
22972 * tree-ssa-reassoc.cc (update_range_test): Likewise.
22973 (optimize_range_tests_to_bit_test): Likewise.
22974 (optimize_range_tests_var_bound): Likewise.
22975 (optimize_range_tests): Likewise.
22976 (no_side_effect_bb): Likewise.
22977 (suitable_cond_bb): Likewise.
22978 (maybe_optimize_range_tests): Likewise.
22979 (reassociate_bb): Likewise.
22980 * tree-vrp.cc (rvrp_folder::pre_fold_bb): Likewise.
22982 2023-05-04 Jakub Jelinek <jakub@redhat.com>
22985 * config/i386/i386-features.cc (timode_scalar_chain::convert_insn):
22986 If src is REG, change its mode to V1TImode and call fix_debug_reg_uses
22987 for it only if it still has TImode. Don't decide whether to call
22988 fix_debug_reg_uses based on whether SRC is ever set or not.
22990 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
22992 * config/cris/cris.cc (cris_split_constant): New function.
22993 * config/cris/cris.md (splitop): New iterator.
22994 (opsplit1): New define_peephole2.
22995 * config/cris/cris-protos.h (cris_split_constant): Declare.
22996 (cris_splittable_constant_p): New macro.
22998 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
23000 * config/cris/cris.cc (TARGET_SPILL_CLASS): Define
23003 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
23005 * config/cris/cris.cc (cris_side_effect_mode_ok): Use
23006 lra_in_progress, not reload_in_progress.
23007 * config/cris/cris.md ("movdi", "*addi_reload"): Ditto.
23008 * config/cris/constraints.md ("Q"): Ditto.
23010 2023-05-03 Andrew Pinski <apinski@marvell.com>
23012 * tree-ssa-dce.cc (simple_dce_from_worklist): Record
23013 stats on removed number of statements and phis.
23015 2023-05-03 Aldy Hernandez <aldyh@redhat.com>
23017 PR tree-optimization/109711
23018 * value-range.cc (irange::verify_range): Allow types of
23021 2023-05-03 Alexander Monakov <amonakov@ispras.ru>
23024 * calls.cc (can_implement_as_sibling_call_p): Reject calls
23025 to __sanitizer_cov_trace_pc.
23027 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
23030 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Add
23031 a new ABI break parameter for GCC 14. Set it to the alignment
23032 of enums that have an underlying type. Take the true alignment
23033 of such enums from the TYPE_ALIGN of the underlying type's
23035 (aarch64_function_arg_boundary): Update accordingly.
23036 (aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Likewise.
23037 Warn about ABI differences.
23039 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
23042 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Rename
23043 ABI break variables to abi_break_gcc_9 and abi_break_gcc_13.
23044 (aarch64_layout_arg, aarch64_function_arg_boundary): Likewise.
23045 (aarch64_gimplify_va_arg_expr): Likewise.
23047 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
23049 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_NO_F)
23050 (FUNCTION_WITHOUT_N_NO_F, FUNCTION_WITH_M_N_NO_U_F): New.
23051 (vhaddq, vhsubq, vmulhq, vqaddq, vqsubq, vqdmulhq, vrhaddq)
23053 * config/arm/arm-mve-builtins-base.def (vhaddq, vhsubq, vmulhq)
23054 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
23055 * config/arm/arm-mve-builtins-base.h (vhaddq, vhsubq, vmulhq)
23056 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
23057 * config/arm/arm_mve.h (vhsubq): Remove.
23059 (vhaddq_m): Remove.
23060 (vhsubq_m): Remove.
23061 (vhaddq_x): Remove.
23062 (vhsubq_x): Remove.
23063 (vhsubq_u8): Remove.
23064 (vhsubq_n_u8): Remove.
23065 (vhaddq_u8): Remove.
23066 (vhaddq_n_u8): Remove.
23067 (vhsubq_s8): Remove.
23068 (vhsubq_n_s8): Remove.
23069 (vhaddq_s8): Remove.
23070 (vhaddq_n_s8): Remove.
23071 (vhsubq_u16): Remove.
23072 (vhsubq_n_u16): Remove.
23073 (vhaddq_u16): Remove.
23074 (vhaddq_n_u16): Remove.
23075 (vhsubq_s16): Remove.
23076 (vhsubq_n_s16): Remove.
23077 (vhaddq_s16): Remove.
23078 (vhaddq_n_s16): Remove.
23079 (vhsubq_u32): Remove.
23080 (vhsubq_n_u32): Remove.
23081 (vhaddq_u32): Remove.
23082 (vhaddq_n_u32): Remove.
23083 (vhsubq_s32): Remove.
23084 (vhsubq_n_s32): Remove.
23085 (vhaddq_s32): Remove.
23086 (vhaddq_n_s32): Remove.
23087 (vhaddq_m_n_s8): Remove.
23088 (vhaddq_m_n_s32): Remove.
23089 (vhaddq_m_n_s16): Remove.
23090 (vhaddq_m_n_u8): Remove.
23091 (vhaddq_m_n_u32): Remove.
23092 (vhaddq_m_n_u16): Remove.
23093 (vhaddq_m_s8): Remove.
23094 (vhaddq_m_s32): Remove.
23095 (vhaddq_m_s16): Remove.
23096 (vhaddq_m_u8): Remove.
23097 (vhaddq_m_u32): Remove.
23098 (vhaddq_m_u16): Remove.
23099 (vhsubq_m_n_s8): Remove.
23100 (vhsubq_m_n_s32): Remove.
23101 (vhsubq_m_n_s16): Remove.
23102 (vhsubq_m_n_u8): Remove.
23103 (vhsubq_m_n_u32): Remove.
23104 (vhsubq_m_n_u16): Remove.
23105 (vhsubq_m_s8): Remove.
23106 (vhsubq_m_s32): Remove.
23107 (vhsubq_m_s16): Remove.
23108 (vhsubq_m_u8): Remove.
23109 (vhsubq_m_u32): Remove.
23110 (vhsubq_m_u16): Remove.
23111 (vhaddq_x_n_s8): Remove.
23112 (vhaddq_x_n_s16): Remove.
23113 (vhaddq_x_n_s32): Remove.
23114 (vhaddq_x_n_u8): Remove.
23115 (vhaddq_x_n_u16): Remove.
23116 (vhaddq_x_n_u32): Remove.
23117 (vhaddq_x_s8): Remove.
23118 (vhaddq_x_s16): Remove.
23119 (vhaddq_x_s32): Remove.
23120 (vhaddq_x_u8): Remove.
23121 (vhaddq_x_u16): Remove.
23122 (vhaddq_x_u32): Remove.
23123 (vhsubq_x_n_s8): Remove.
23124 (vhsubq_x_n_s16): Remove.
23125 (vhsubq_x_n_s32): Remove.
23126 (vhsubq_x_n_u8): Remove.
23127 (vhsubq_x_n_u16): Remove.
23128 (vhsubq_x_n_u32): Remove.
23129 (vhsubq_x_s8): Remove.
23130 (vhsubq_x_s16): Remove.
23131 (vhsubq_x_s32): Remove.
23132 (vhsubq_x_u8): Remove.
23133 (vhsubq_x_u16): Remove.
23134 (vhsubq_x_u32): Remove.
23135 (__arm_vhsubq_u8): Remove.
23136 (__arm_vhsubq_n_u8): Remove.
23137 (__arm_vhaddq_u8): Remove.
23138 (__arm_vhaddq_n_u8): Remove.
23139 (__arm_vhsubq_s8): Remove.
23140 (__arm_vhsubq_n_s8): Remove.
23141 (__arm_vhaddq_s8): Remove.
23142 (__arm_vhaddq_n_s8): Remove.
23143 (__arm_vhsubq_u16): Remove.
23144 (__arm_vhsubq_n_u16): Remove.
23145 (__arm_vhaddq_u16): Remove.
23146 (__arm_vhaddq_n_u16): Remove.
23147 (__arm_vhsubq_s16): Remove.
23148 (__arm_vhsubq_n_s16): Remove.
23149 (__arm_vhaddq_s16): Remove.
23150 (__arm_vhaddq_n_s16): Remove.
23151 (__arm_vhsubq_u32): Remove.
23152 (__arm_vhsubq_n_u32): Remove.
23153 (__arm_vhaddq_u32): Remove.
23154 (__arm_vhaddq_n_u32): Remove.
23155 (__arm_vhsubq_s32): Remove.
23156 (__arm_vhsubq_n_s32): Remove.
23157 (__arm_vhaddq_s32): Remove.
23158 (__arm_vhaddq_n_s32): Remove.
23159 (__arm_vhaddq_m_n_s8): Remove.
23160 (__arm_vhaddq_m_n_s32): Remove.
23161 (__arm_vhaddq_m_n_s16): Remove.
23162 (__arm_vhaddq_m_n_u8): Remove.
23163 (__arm_vhaddq_m_n_u32): Remove.
23164 (__arm_vhaddq_m_n_u16): Remove.
23165 (__arm_vhaddq_m_s8): Remove.
23166 (__arm_vhaddq_m_s32): Remove.
23167 (__arm_vhaddq_m_s16): Remove.
23168 (__arm_vhaddq_m_u8): Remove.
23169 (__arm_vhaddq_m_u32): Remove.
23170 (__arm_vhaddq_m_u16): Remove.
23171 (__arm_vhsubq_m_n_s8): Remove.
23172 (__arm_vhsubq_m_n_s32): Remove.
23173 (__arm_vhsubq_m_n_s16): Remove.
23174 (__arm_vhsubq_m_n_u8): Remove.
23175 (__arm_vhsubq_m_n_u32): Remove.
23176 (__arm_vhsubq_m_n_u16): Remove.
23177 (__arm_vhsubq_m_s8): Remove.
23178 (__arm_vhsubq_m_s32): Remove.
23179 (__arm_vhsubq_m_s16): Remove.
23180 (__arm_vhsubq_m_u8): Remove.
23181 (__arm_vhsubq_m_u32): Remove.
23182 (__arm_vhsubq_m_u16): Remove.
23183 (__arm_vhaddq_x_n_s8): Remove.
23184 (__arm_vhaddq_x_n_s16): Remove.
23185 (__arm_vhaddq_x_n_s32): Remove.
23186 (__arm_vhaddq_x_n_u8): Remove.
23187 (__arm_vhaddq_x_n_u16): Remove.
23188 (__arm_vhaddq_x_n_u32): Remove.
23189 (__arm_vhaddq_x_s8): Remove.
23190 (__arm_vhaddq_x_s16): Remove.
23191 (__arm_vhaddq_x_s32): Remove.
23192 (__arm_vhaddq_x_u8): Remove.
23193 (__arm_vhaddq_x_u16): Remove.
23194 (__arm_vhaddq_x_u32): Remove.
23195 (__arm_vhsubq_x_n_s8): Remove.
23196 (__arm_vhsubq_x_n_s16): Remove.
23197 (__arm_vhsubq_x_n_s32): Remove.
23198 (__arm_vhsubq_x_n_u8): Remove.
23199 (__arm_vhsubq_x_n_u16): Remove.
23200 (__arm_vhsubq_x_n_u32): Remove.
23201 (__arm_vhsubq_x_s8): Remove.
23202 (__arm_vhsubq_x_s16): Remove.
23203 (__arm_vhsubq_x_s32): Remove.
23204 (__arm_vhsubq_x_u8): Remove.
23205 (__arm_vhsubq_x_u16): Remove.
23206 (__arm_vhsubq_x_u32): Remove.
23207 (__arm_vhsubq): Remove.
23208 (__arm_vhaddq): Remove.
23209 (__arm_vhaddq_m): Remove.
23210 (__arm_vhsubq_m): Remove.
23211 (__arm_vhaddq_x): Remove.
23212 (__arm_vhsubq_x): Remove.
23214 (vmulhq_m): Remove.
23215 (vmulhq_x): Remove.
23216 (vmulhq_u8): Remove.
23217 (vmulhq_s8): Remove.
23218 (vmulhq_u16): Remove.
23219 (vmulhq_s16): Remove.
23220 (vmulhq_u32): Remove.
23221 (vmulhq_s32): Remove.
23222 (vmulhq_m_s8): Remove.
23223 (vmulhq_m_s32): Remove.
23224 (vmulhq_m_s16): Remove.
23225 (vmulhq_m_u8): Remove.
23226 (vmulhq_m_u32): Remove.
23227 (vmulhq_m_u16): Remove.
23228 (vmulhq_x_s8): Remove.
23229 (vmulhq_x_s16): Remove.
23230 (vmulhq_x_s32): Remove.
23231 (vmulhq_x_u8): Remove.
23232 (vmulhq_x_u16): Remove.
23233 (vmulhq_x_u32): Remove.
23234 (__arm_vmulhq_u8): Remove.
23235 (__arm_vmulhq_s8): Remove.
23236 (__arm_vmulhq_u16): Remove.
23237 (__arm_vmulhq_s16): Remove.
23238 (__arm_vmulhq_u32): Remove.
23239 (__arm_vmulhq_s32): Remove.
23240 (__arm_vmulhq_m_s8): Remove.
23241 (__arm_vmulhq_m_s32): Remove.
23242 (__arm_vmulhq_m_s16): Remove.
23243 (__arm_vmulhq_m_u8): Remove.
23244 (__arm_vmulhq_m_u32): Remove.
23245 (__arm_vmulhq_m_u16): Remove.
23246 (__arm_vmulhq_x_s8): Remove.
23247 (__arm_vmulhq_x_s16): Remove.
23248 (__arm_vmulhq_x_s32): Remove.
23249 (__arm_vmulhq_x_u8): Remove.
23250 (__arm_vmulhq_x_u16): Remove.
23251 (__arm_vmulhq_x_u32): Remove.
23252 (__arm_vmulhq): Remove.
23253 (__arm_vmulhq_m): Remove.
23254 (__arm_vmulhq_x): Remove.
23257 (vqaddq_m): Remove.
23258 (vqsubq_m): Remove.
23259 (vqsubq_u8): Remove.
23260 (vqsubq_n_u8): Remove.
23261 (vqaddq_u8): Remove.
23262 (vqaddq_n_u8): Remove.
23263 (vqsubq_s8): Remove.
23264 (vqsubq_n_s8): Remove.
23265 (vqaddq_s8): Remove.
23266 (vqaddq_n_s8): Remove.
23267 (vqsubq_u16): Remove.
23268 (vqsubq_n_u16): Remove.
23269 (vqaddq_u16): Remove.
23270 (vqaddq_n_u16): Remove.
23271 (vqsubq_s16): Remove.
23272 (vqsubq_n_s16): Remove.
23273 (vqaddq_s16): Remove.
23274 (vqaddq_n_s16): Remove.
23275 (vqsubq_u32): Remove.
23276 (vqsubq_n_u32): Remove.
23277 (vqaddq_u32): Remove.
23278 (vqaddq_n_u32): Remove.
23279 (vqsubq_s32): Remove.
23280 (vqsubq_n_s32): Remove.
23281 (vqaddq_s32): Remove.
23282 (vqaddq_n_s32): Remove.
23283 (vqaddq_m_n_s8): Remove.
23284 (vqaddq_m_n_s32): Remove.
23285 (vqaddq_m_n_s16): Remove.
23286 (vqaddq_m_n_u8): Remove.
23287 (vqaddq_m_n_u32): Remove.
23288 (vqaddq_m_n_u16): Remove.
23289 (vqaddq_m_s8): Remove.
23290 (vqaddq_m_s32): Remove.
23291 (vqaddq_m_s16): Remove.
23292 (vqaddq_m_u8): Remove.
23293 (vqaddq_m_u32): Remove.
23294 (vqaddq_m_u16): Remove.
23295 (vqsubq_m_n_s8): Remove.
23296 (vqsubq_m_n_s32): Remove.
23297 (vqsubq_m_n_s16): Remove.
23298 (vqsubq_m_n_u8): Remove.
23299 (vqsubq_m_n_u32): Remove.
23300 (vqsubq_m_n_u16): Remove.
23301 (vqsubq_m_s8): Remove.
23302 (vqsubq_m_s32): Remove.
23303 (vqsubq_m_s16): Remove.
23304 (vqsubq_m_u8): Remove.
23305 (vqsubq_m_u32): Remove.
23306 (vqsubq_m_u16): Remove.
23307 (__arm_vqsubq_u8): Remove.
23308 (__arm_vqsubq_n_u8): Remove.
23309 (__arm_vqaddq_u8): Remove.
23310 (__arm_vqaddq_n_u8): Remove.
23311 (__arm_vqsubq_s8): Remove.
23312 (__arm_vqsubq_n_s8): Remove.
23313 (__arm_vqaddq_s8): Remove.
23314 (__arm_vqaddq_n_s8): Remove.
23315 (__arm_vqsubq_u16): Remove.
23316 (__arm_vqsubq_n_u16): Remove.
23317 (__arm_vqaddq_u16): Remove.
23318 (__arm_vqaddq_n_u16): Remove.
23319 (__arm_vqsubq_s16): Remove.
23320 (__arm_vqsubq_n_s16): Remove.
23321 (__arm_vqaddq_s16): Remove.
23322 (__arm_vqaddq_n_s16): Remove.
23323 (__arm_vqsubq_u32): Remove.
23324 (__arm_vqsubq_n_u32): Remove.
23325 (__arm_vqaddq_u32): Remove.
23326 (__arm_vqaddq_n_u32): Remove.
23327 (__arm_vqsubq_s32): Remove.
23328 (__arm_vqsubq_n_s32): Remove.
23329 (__arm_vqaddq_s32): Remove.
23330 (__arm_vqaddq_n_s32): Remove.
23331 (__arm_vqaddq_m_n_s8): Remove.
23332 (__arm_vqaddq_m_n_s32): Remove.
23333 (__arm_vqaddq_m_n_s16): Remove.
23334 (__arm_vqaddq_m_n_u8): Remove.
23335 (__arm_vqaddq_m_n_u32): Remove.
23336 (__arm_vqaddq_m_n_u16): Remove.
23337 (__arm_vqaddq_m_s8): Remove.
23338 (__arm_vqaddq_m_s32): Remove.
23339 (__arm_vqaddq_m_s16): Remove.
23340 (__arm_vqaddq_m_u8): Remove.
23341 (__arm_vqaddq_m_u32): Remove.
23342 (__arm_vqaddq_m_u16): Remove.
23343 (__arm_vqsubq_m_n_s8): Remove.
23344 (__arm_vqsubq_m_n_s32): Remove.
23345 (__arm_vqsubq_m_n_s16): Remove.
23346 (__arm_vqsubq_m_n_u8): Remove.
23347 (__arm_vqsubq_m_n_u32): Remove.
23348 (__arm_vqsubq_m_n_u16): Remove.
23349 (__arm_vqsubq_m_s8): Remove.
23350 (__arm_vqsubq_m_s32): Remove.
23351 (__arm_vqsubq_m_s16): Remove.
23352 (__arm_vqsubq_m_u8): Remove.
23353 (__arm_vqsubq_m_u32): Remove.
23354 (__arm_vqsubq_m_u16): Remove.
23355 (__arm_vqsubq): Remove.
23356 (__arm_vqaddq): Remove.
23357 (__arm_vqaddq_m): Remove.
23358 (__arm_vqsubq_m): Remove.
23359 (vqdmulhq): Remove.
23360 (vqdmulhq_m): Remove.
23361 (vqdmulhq_s8): Remove.
23362 (vqdmulhq_n_s8): Remove.
23363 (vqdmulhq_s16): Remove.
23364 (vqdmulhq_n_s16): Remove.
23365 (vqdmulhq_s32): Remove.
23366 (vqdmulhq_n_s32): Remove.
23367 (vqdmulhq_m_n_s8): Remove.
23368 (vqdmulhq_m_n_s32): Remove.
23369 (vqdmulhq_m_n_s16): Remove.
23370 (vqdmulhq_m_s8): Remove.
23371 (vqdmulhq_m_s32): Remove.
23372 (vqdmulhq_m_s16): Remove.
23373 (__arm_vqdmulhq_s8): Remove.
23374 (__arm_vqdmulhq_n_s8): Remove.
23375 (__arm_vqdmulhq_s16): Remove.
23376 (__arm_vqdmulhq_n_s16): Remove.
23377 (__arm_vqdmulhq_s32): Remove.
23378 (__arm_vqdmulhq_n_s32): Remove.
23379 (__arm_vqdmulhq_m_n_s8): Remove.
23380 (__arm_vqdmulhq_m_n_s32): Remove.
23381 (__arm_vqdmulhq_m_n_s16): Remove.
23382 (__arm_vqdmulhq_m_s8): Remove.
23383 (__arm_vqdmulhq_m_s32): Remove.
23384 (__arm_vqdmulhq_m_s16): Remove.
23385 (__arm_vqdmulhq): Remove.
23386 (__arm_vqdmulhq_m): Remove.
23388 (vrhaddq_m): Remove.
23389 (vrhaddq_x): Remove.
23390 (vrhaddq_u8): Remove.
23391 (vrhaddq_s8): Remove.
23392 (vrhaddq_u16): Remove.
23393 (vrhaddq_s16): Remove.
23394 (vrhaddq_u32): Remove.
23395 (vrhaddq_s32): Remove.
23396 (vrhaddq_m_s8): Remove.
23397 (vrhaddq_m_s32): Remove.
23398 (vrhaddq_m_s16): Remove.
23399 (vrhaddq_m_u8): Remove.
23400 (vrhaddq_m_u32): Remove.
23401 (vrhaddq_m_u16): Remove.
23402 (vrhaddq_x_s8): Remove.
23403 (vrhaddq_x_s16): Remove.
23404 (vrhaddq_x_s32): Remove.
23405 (vrhaddq_x_u8): Remove.
23406 (vrhaddq_x_u16): Remove.
23407 (vrhaddq_x_u32): Remove.
23408 (__arm_vrhaddq_u8): Remove.
23409 (__arm_vrhaddq_s8): Remove.
23410 (__arm_vrhaddq_u16): Remove.
23411 (__arm_vrhaddq_s16): Remove.
23412 (__arm_vrhaddq_u32): Remove.
23413 (__arm_vrhaddq_s32): Remove.
23414 (__arm_vrhaddq_m_s8): Remove.
23415 (__arm_vrhaddq_m_s32): Remove.
23416 (__arm_vrhaddq_m_s16): Remove.
23417 (__arm_vrhaddq_m_u8): Remove.
23418 (__arm_vrhaddq_m_u32): Remove.
23419 (__arm_vrhaddq_m_u16): Remove.
23420 (__arm_vrhaddq_x_s8): Remove.
23421 (__arm_vrhaddq_x_s16): Remove.
23422 (__arm_vrhaddq_x_s32): Remove.
23423 (__arm_vrhaddq_x_u8): Remove.
23424 (__arm_vrhaddq_x_u16): Remove.
23425 (__arm_vrhaddq_x_u32): Remove.
23426 (__arm_vrhaddq): Remove.
23427 (__arm_vrhaddq_m): Remove.
23428 (__arm_vrhaddq_x): Remove.
23430 (vrmulhq_m): Remove.
23431 (vrmulhq_x): Remove.
23432 (vrmulhq_u8): Remove.
23433 (vrmulhq_s8): Remove.
23434 (vrmulhq_u16): Remove.
23435 (vrmulhq_s16): Remove.
23436 (vrmulhq_u32): Remove.
23437 (vrmulhq_s32): Remove.
23438 (vrmulhq_m_s8): Remove.
23439 (vrmulhq_m_s32): Remove.
23440 (vrmulhq_m_s16): Remove.
23441 (vrmulhq_m_u8): Remove.
23442 (vrmulhq_m_u32): Remove.
23443 (vrmulhq_m_u16): Remove.
23444 (vrmulhq_x_s8): Remove.
23445 (vrmulhq_x_s16): Remove.
23446 (vrmulhq_x_s32): Remove.
23447 (vrmulhq_x_u8): Remove.
23448 (vrmulhq_x_u16): Remove.
23449 (vrmulhq_x_u32): Remove.
23450 (__arm_vrmulhq_u8): Remove.
23451 (__arm_vrmulhq_s8): Remove.
23452 (__arm_vrmulhq_u16): Remove.
23453 (__arm_vrmulhq_s16): Remove.
23454 (__arm_vrmulhq_u32): Remove.
23455 (__arm_vrmulhq_s32): Remove.
23456 (__arm_vrmulhq_m_s8): Remove.
23457 (__arm_vrmulhq_m_s32): Remove.
23458 (__arm_vrmulhq_m_s16): Remove.
23459 (__arm_vrmulhq_m_u8): Remove.
23460 (__arm_vrmulhq_m_u32): Remove.
23461 (__arm_vrmulhq_m_u16): Remove.
23462 (__arm_vrmulhq_x_s8): Remove.
23463 (__arm_vrmulhq_x_s16): Remove.
23464 (__arm_vrmulhq_x_s32): Remove.
23465 (__arm_vrmulhq_x_u8): Remove.
23466 (__arm_vrmulhq_x_u16): Remove.
23467 (__arm_vrmulhq_x_u32): Remove.
23468 (__arm_vrmulhq): Remove.
23469 (__arm_vrmulhq_m): Remove.
23470 (__arm_vrmulhq_x): Remove.
23472 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
23474 * config/arm/iterators.md (MVE_INT_SU_BINARY): New.
23475 (mve_insn): Add vabdq, vhaddq, vhsubq, vmulhq, vqaddq, vqdmulhq,
23476 vqrdmulhq, vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq.
23477 (supf): Add VQDMULHQ_S, VQRDMULHQ_S.
23478 * config/arm/mve.md (mve_vabdq_<supf><mode>)
23479 (@mve_vhaddq_<supf><mode>, mve_vhsubq_<supf><mode>)
23480 (mve_vmulhq_<supf><mode>, mve_vqaddq_<supf><mode>)
23481 (mve_vqdmulhq_s<mode>, mve_vqrdmulhq_s<mode>)
23482 (mve_vqrshlq_<supf><mode>, mve_vqshlq_<supf><mode>)
23483 (mve_vqsubq_<supf><mode>, @mve_vrhaddq_<supf><mode>)
23484 (mve_vrmulhq_<supf><mode>, mve_vrshlq_<supf><mode>): Merge into
23486 (@mve_<mve_insn>q_<supf><mode>): ... this.
23487 * config/arm/vec-common.md (avg<mode>3_floor, uavg<mode>3_floor)
23488 (avg<mode>3_ceil, uavg<mode>3_ceil): Use gen_mve_q instead of
23489 gen_mve_vhaddq / gen_mve_vrhaddq.
23491 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
23493 * config/arm/iterators.md (MVE_INT_SU_M_N_BINARY): New.
23494 (mve_insn): Add vhaddq, vhsubq, vmlaq, vmlasq, vqaddq, vqdmlahq,
23495 vqdmlashq, vqdmulhq, vqrdmlahq, vqrdmlashq, vqrdmulhq, vqsubq.
23496 (supf): Add VQDMLAHQ_M_N_S, VQDMLASHQ_M_N_S, VQRDMLAHQ_M_N_S,
23497 VQRDMLASHQ_M_N_S, VQDMULHQ_M_N_S, VQRDMULHQ_M_N_S.
23498 * config/arm/mve.md (mve_vhaddq_m_n_<supf><mode>)
23499 (mve_vhsubq_m_n_<supf><mode>, mve_vmlaq_m_n_<supf><mode>)
23500 (mve_vmlasq_m_n_<supf><mode>, mve_vqaddq_m_n_<supf><mode>)
23501 (mve_vqdmlahq_m_n_s<mode>, mve_vqdmlashq_m_n_s<mode>)
23502 (mve_vqrdmlahq_m_n_s<mode>, mve_vqrdmlashq_m_n_s<mode>)
23503 (mve_vqsubq_m_n_<supf><mode>, mve_vqdmulhq_m_n_s<mode>)
23504 (mve_vqrdmulhq_m_n_s<mode>): Merge into ...
23505 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23507 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
23509 * config/arm/iterators.md (MVE_INT_SU_N_BINARY): New.
23510 (mve_insn): Add vhaddq, vhsubq, vqaddq, vqdmulhq, vqrdmulhq,
23512 (supf): Add VQDMULHQ_N_S, VQRDMULHQ_N_S.
23513 * config/arm/mve.md (mve_vhaddq_n_<supf><mode>)
23514 (mve_vhsubq_n_<supf><mode>, mve_vqaddq_n_<supf><mode>)
23515 (mve_vqdmulhq_n_s<mode>, mve_vqrdmulhq_n_s<mode>)
23516 (mve_vqsubq_n_<supf><mode>): Merge into ...
23517 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23519 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
23521 * config/arm/iterators.md (MVE_INT_SU_M_BINARY): New.
23522 (mve_insn): Add vabdq, vhaddq, vhsubq, vmaxq, vminq, vmulhq,
23523 vqaddq, vqdmladhq, vqdmladhxq, vqdmlsdhq, vqdmlsdhxq, vqdmulhq,
23524 vqrdmladhq, vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq, vqrdmulhq,
23525 vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq, vshlq.
23526 (supf): Add VQDMLADHQ_M_S, VQDMLADHXQ_M_S, VQDMLSDHQ_M_S,
23527 VQDMLSDHXQ_M_S, VQDMULHQ_M_S, VQRDMLADHQ_M_S, VQRDMLADHXQ_M_S,
23528 VQRDMLSDHQ_M_S, VQRDMLSDHXQ_M_S, VQRDMULHQ_M_S.
23529 * config/arm/mve.md (@mve_<mve_insn>q_m_<supf><mode>): New.
23530 (mve_vshlq_m_<supf><mode>): Merged into
23531 @mve_<mve_insn>q_m_<supf><mode>.
23532 (mve_vabdq_m_<supf><mode>): Likewise.
23533 (mve_vhaddq_m_<supf><mode>): Likewise.
23534 (mve_vhsubq_m_<supf><mode>): Likewise.
23535 (mve_vmaxq_m_<supf><mode>): Likewise.
23536 (mve_vminq_m_<supf><mode>): Likewise.
23537 (mve_vmulhq_m_<supf><mode>): Likewise.
23538 (mve_vqaddq_m_<supf><mode>): Likewise.
23539 (mve_vqrshlq_m_<supf><mode>): Likewise.
23540 (mve_vqshlq_m_<supf><mode>): Likewise.
23541 (mve_vqsubq_m_<supf><mode>): Likewise.
23542 (mve_vrhaddq_m_<supf><mode>): Likewise.
23543 (mve_vrmulhq_m_<supf><mode>): Likewise.
23544 (mve_vrshlq_m_<supf><mode>): Likewise.
23545 (mve_vqdmladhq_m_s<mode>): Likewise.
23546 (mve_vqdmladhxq_m_s<mode>): Likewise.
23547 (mve_vqdmlsdhq_m_s<mode>): Likewise.
23548 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
23549 (mve_vqdmulhq_m_s<mode>): Likewise.
23550 (mve_vqrdmladhq_m_s<mode>): Likewise.
23551 (mve_vqrdmladhxq_m_s<mode>): Likewise.
23552 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
23553 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
23554 (mve_vqrdmulhq_m_s<mode>): Likewise.
23556 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
23558 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_M_N): New. (vcreateq): New.
23559 * config/arm/arm-mve-builtins-base.def (vcreateq): New.
23560 * config/arm/arm-mve-builtins-base.h (vcreateq): New.
23561 * config/arm/arm_mve.h (vcreateq_f16): Remove.
23562 (vcreateq_f32): Remove.
23563 (vcreateq_u8): Remove.
23564 (vcreateq_u16): Remove.
23565 (vcreateq_u32): Remove.
23566 (vcreateq_u64): Remove.
23567 (vcreateq_s8): Remove.
23568 (vcreateq_s16): Remove.
23569 (vcreateq_s32): Remove.
23570 (vcreateq_s64): Remove.
23571 (__arm_vcreateq_u8): Remove.
23572 (__arm_vcreateq_u16): Remove.
23573 (__arm_vcreateq_u32): Remove.
23574 (__arm_vcreateq_u64): Remove.
23575 (__arm_vcreateq_s8): Remove.
23576 (__arm_vcreateq_s16): Remove.
23577 (__arm_vcreateq_s32): Remove.
23578 (__arm_vcreateq_s64): Remove.
23579 (__arm_vcreateq_f16): Remove.
23580 (__arm_vcreateq_f32): Remove.
23582 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
23584 * config/arm/iterators.md (MVE_FP_CREATE_ONLY): New.
23585 (mve_insn): Add VCREATEQ_S, VCREATEQ_U, VCREATEQ_F.
23586 * config/arm/mve.md (mve_vcreateq_f<mode>): Rename into ...
23587 (@mve_<mve_insn>q_f<mode>): ... this.
23588 (mve_vcreateq_<supf><mode>): Rename into ...
23589 (@mve_<mve_insn>q_<supf><mode>): ... this.
23591 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
23593 * config/arm/arm-mve-builtins-shapes.cc (create): New.
23594 * config/arm/arm-mve-builtins-shapes.h: (create): New.
23596 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
23598 * config/arm/arm-mve-builtins-functions.h (class
23599 unspec_mve_function_exact_insn): New.
23601 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
23603 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N_NO_N_F): New.
23605 * config/arm/arm-mve-builtins-base.def (vorrq): New.
23606 * config/arm/arm-mve-builtins-base.h (vorrq): New.
23607 * config/arm/arm-mve-builtins.cc
23608 (function_instance::has_inactive_argument): Handle vorrq.
23609 * config/arm/arm_mve.h (vorrq): Remove.
23610 (vorrq_m_n): Remove.
23613 (vorrq_u8): Remove.
23614 (vorrq_s8): Remove.
23615 (vorrq_u16): Remove.
23616 (vorrq_s16): Remove.
23617 (vorrq_u32): Remove.
23618 (vorrq_s32): Remove.
23619 (vorrq_n_u16): Remove.
23620 (vorrq_f16): Remove.
23621 (vorrq_n_s16): Remove.
23622 (vorrq_n_u32): Remove.
23623 (vorrq_f32): Remove.
23624 (vorrq_n_s32): Remove.
23625 (vorrq_m_n_s16): Remove.
23626 (vorrq_m_n_u16): Remove.
23627 (vorrq_m_n_s32): Remove.
23628 (vorrq_m_n_u32): Remove.
23629 (vorrq_m_s8): Remove.
23630 (vorrq_m_s32): Remove.
23631 (vorrq_m_s16): Remove.
23632 (vorrq_m_u8): Remove.
23633 (vorrq_m_u32): Remove.
23634 (vorrq_m_u16): Remove.
23635 (vorrq_m_f32): Remove.
23636 (vorrq_m_f16): Remove.
23637 (vorrq_x_s8): Remove.
23638 (vorrq_x_s16): Remove.
23639 (vorrq_x_s32): Remove.
23640 (vorrq_x_u8): Remove.
23641 (vorrq_x_u16): Remove.
23642 (vorrq_x_u32): Remove.
23643 (vorrq_x_f16): Remove.
23644 (vorrq_x_f32): Remove.
23645 (__arm_vorrq_u8): Remove.
23646 (__arm_vorrq_s8): Remove.
23647 (__arm_vorrq_u16): Remove.
23648 (__arm_vorrq_s16): Remove.
23649 (__arm_vorrq_u32): Remove.
23650 (__arm_vorrq_s32): Remove.
23651 (__arm_vorrq_n_u16): Remove.
23652 (__arm_vorrq_n_s16): Remove.
23653 (__arm_vorrq_n_u32): Remove.
23654 (__arm_vorrq_n_s32): Remove.
23655 (__arm_vorrq_m_n_s16): Remove.
23656 (__arm_vorrq_m_n_u16): Remove.
23657 (__arm_vorrq_m_n_s32): Remove.
23658 (__arm_vorrq_m_n_u32): Remove.
23659 (__arm_vorrq_m_s8): Remove.
23660 (__arm_vorrq_m_s32): Remove.
23661 (__arm_vorrq_m_s16): Remove.
23662 (__arm_vorrq_m_u8): Remove.
23663 (__arm_vorrq_m_u32): Remove.
23664 (__arm_vorrq_m_u16): Remove.
23665 (__arm_vorrq_x_s8): Remove.
23666 (__arm_vorrq_x_s16): Remove.
23667 (__arm_vorrq_x_s32): Remove.
23668 (__arm_vorrq_x_u8): Remove.
23669 (__arm_vorrq_x_u16): Remove.
23670 (__arm_vorrq_x_u32): Remove.
23671 (__arm_vorrq_f16): Remove.
23672 (__arm_vorrq_f32): Remove.
23673 (__arm_vorrq_m_f32): Remove.
23674 (__arm_vorrq_m_f16): Remove.
23675 (__arm_vorrq_x_f16): Remove.
23676 (__arm_vorrq_x_f32): Remove.
23677 (__arm_vorrq): Remove.
23678 (__arm_vorrq_m_n): Remove.
23679 (__arm_vorrq_m): Remove.
23680 (__arm_vorrq_x): Remove.
23682 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
23684 * config/arm/arm-mve-builtins-shapes.cc (binary_orrq): New.
23685 * config/arm/arm-mve-builtins-shapes.h (binary_orrq): New.
23686 * config/arm/arm-mve-builtins.cc (preds_m_or_none): Remove static.
23687 * config/arm/arm-mve-builtins.h (preds_m_or_none): Declare.
23689 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
23691 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M): New.
23692 (vandq,veorq): New.
23693 * config/arm/arm-mve-builtins-base.def (vandq, veorq): New.
23694 * config/arm/arm-mve-builtins-base.h (vandq, veorq): New.
23695 * config/arm/arm_mve.h (vandq): Remove.
23698 (vandq_u8): Remove.
23699 (vandq_s8): Remove.
23700 (vandq_u16): Remove.
23701 (vandq_s16): Remove.
23702 (vandq_u32): Remove.
23703 (vandq_s32): Remove.
23704 (vandq_f16): Remove.
23705 (vandq_f32): Remove.
23706 (vandq_m_s8): Remove.
23707 (vandq_m_s32): Remove.
23708 (vandq_m_s16): Remove.
23709 (vandq_m_u8): Remove.
23710 (vandq_m_u32): Remove.
23711 (vandq_m_u16): Remove.
23712 (vandq_m_f32): Remove.
23713 (vandq_m_f16): Remove.
23714 (vandq_x_s8): Remove.
23715 (vandq_x_s16): Remove.
23716 (vandq_x_s32): Remove.
23717 (vandq_x_u8): Remove.
23718 (vandq_x_u16): Remove.
23719 (vandq_x_u32): Remove.
23720 (vandq_x_f16): Remove.
23721 (vandq_x_f32): Remove.
23722 (__arm_vandq_u8): Remove.
23723 (__arm_vandq_s8): Remove.
23724 (__arm_vandq_u16): Remove.
23725 (__arm_vandq_s16): Remove.
23726 (__arm_vandq_u32): Remove.
23727 (__arm_vandq_s32): Remove.
23728 (__arm_vandq_m_s8): Remove.
23729 (__arm_vandq_m_s32): Remove.
23730 (__arm_vandq_m_s16): Remove.
23731 (__arm_vandq_m_u8): Remove.
23732 (__arm_vandq_m_u32): Remove.
23733 (__arm_vandq_m_u16): Remove.
23734 (__arm_vandq_x_s8): Remove.
23735 (__arm_vandq_x_s16): Remove.
23736 (__arm_vandq_x_s32): Remove.
23737 (__arm_vandq_x_u8): Remove.
23738 (__arm_vandq_x_u16): Remove.
23739 (__arm_vandq_x_u32): Remove.
23740 (__arm_vandq_f16): Remove.
23741 (__arm_vandq_f32): Remove.
23742 (__arm_vandq_m_f32): Remove.
23743 (__arm_vandq_m_f16): Remove.
23744 (__arm_vandq_x_f16): Remove.
23745 (__arm_vandq_x_f32): Remove.
23746 (__arm_vandq): Remove.
23747 (__arm_vandq_m): Remove.
23748 (__arm_vandq_x): Remove.
23751 (veorq_u8): Remove.
23752 (veorq_s8): Remove.
23753 (veorq_u16): Remove.
23754 (veorq_s16): Remove.
23755 (veorq_u32): Remove.
23756 (veorq_s32): Remove.
23757 (veorq_f16): Remove.
23758 (veorq_f32): Remove.
23759 (veorq_m_s8): Remove.
23760 (veorq_m_s32): Remove.
23761 (veorq_m_s16): Remove.
23762 (veorq_m_u8): Remove.
23763 (veorq_m_u32): Remove.
23764 (veorq_m_u16): Remove.
23765 (veorq_m_f32): Remove.
23766 (veorq_m_f16): Remove.
23767 (veorq_x_s8): Remove.
23768 (veorq_x_s16): Remove.
23769 (veorq_x_s32): Remove.
23770 (veorq_x_u8): Remove.
23771 (veorq_x_u16): Remove.
23772 (veorq_x_u32): Remove.
23773 (veorq_x_f16): Remove.
23774 (veorq_x_f32): Remove.
23775 (__arm_veorq_u8): Remove.
23776 (__arm_veorq_s8): Remove.
23777 (__arm_veorq_u16): Remove.
23778 (__arm_veorq_s16): Remove.
23779 (__arm_veorq_u32): Remove.
23780 (__arm_veorq_s32): Remove.
23781 (__arm_veorq_m_s8): Remove.
23782 (__arm_veorq_m_s32): Remove.
23783 (__arm_veorq_m_s16): Remove.
23784 (__arm_veorq_m_u8): Remove.
23785 (__arm_veorq_m_u32): Remove.
23786 (__arm_veorq_m_u16): Remove.
23787 (__arm_veorq_x_s8): Remove.
23788 (__arm_veorq_x_s16): Remove.
23789 (__arm_veorq_x_s32): Remove.
23790 (__arm_veorq_x_u8): Remove.
23791 (__arm_veorq_x_u16): Remove.
23792 (__arm_veorq_x_u32): Remove.
23793 (__arm_veorq_f16): Remove.
23794 (__arm_veorq_f32): Remove.
23795 (__arm_veorq_m_f32): Remove.
23796 (__arm_veorq_m_f16): Remove.
23797 (__arm_veorq_x_f16): Remove.
23798 (__arm_veorq_x_f32): Remove.
23799 (__arm_veorq): Remove.
23800 (__arm_veorq_m): Remove.
23801 (__arm_veorq_x): Remove.
23803 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
23805 * config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC)
23806 (MVE_FP_M_BINARY_LOGIC): New.
23807 (MVE_INT_M_N_BINARY_LOGIC): New.
23808 (MVE_INT_N_BINARY_LOGIC): New.
23809 (mve_insn): Add vand, veor, vorr, vbic.
23810 * config/arm/mve.md (mve_vandq_m_<supf><mode>)
23811 (mve_veorq_m_<supf><mode>, mve_vorrq_m_<supf><mode>)
23812 (mve_vbicq_m_<supf><mode>): Merge into ...
23813 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
23814 (mve_vandq_m_f<mode>, mve_veorq_m_f<mode>, mve_vorrq_m_f<mode>)
23815 (mve_vbicq_m_f<mode>): Merge into ...
23816 (@mve_<mve_insn>q_m_f<mode>): ... this.
23817 (mve_vorrq_n_<supf><mode>)
23818 (mve_vbicq_n_<supf><mode>): Merge into ...
23819 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23820 (mve_vorrq_m_n_<supf><mode>, mve_vbicq_m_n_<supf><mode>): Merge
23822 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23824 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
23826 * config/arm/arm-mve-builtins-shapes.cc (binary): New.
23827 * config/arm/arm-mve-builtins-shapes.h (binary): New.
23829 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
23831 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N):
23833 (vaddq, vmulq, vsubq): New.
23834 * config/arm/arm-mve-builtins-base.def (vaddq, vmulq, vsubq): New.
23835 * config/arm/arm-mve-builtins-base.h (vaddq, vmulq, vsubq): New.
23836 * config/arm/arm_mve.h (vaddq): Remove.
23839 (vaddq_n_u8): Remove.
23840 (vaddq_n_s8): Remove.
23841 (vaddq_n_u16): Remove.
23842 (vaddq_n_s16): Remove.
23843 (vaddq_n_u32): Remove.
23844 (vaddq_n_s32): Remove.
23845 (vaddq_n_f16): Remove.
23846 (vaddq_n_f32): Remove.
23847 (vaddq_m_n_s8): Remove.
23848 (vaddq_m_n_s32): Remove.
23849 (vaddq_m_n_s16): Remove.
23850 (vaddq_m_n_u8): Remove.
23851 (vaddq_m_n_u32): Remove.
23852 (vaddq_m_n_u16): Remove.
23853 (vaddq_m_s8): Remove.
23854 (vaddq_m_s32): Remove.
23855 (vaddq_m_s16): Remove.
23856 (vaddq_m_u8): Remove.
23857 (vaddq_m_u32): Remove.
23858 (vaddq_m_u16): Remove.
23859 (vaddq_m_f32): Remove.
23860 (vaddq_m_f16): Remove.
23861 (vaddq_m_n_f32): Remove.
23862 (vaddq_m_n_f16): Remove.
23863 (vaddq_s8): Remove.
23864 (vaddq_s16): Remove.
23865 (vaddq_s32): Remove.
23866 (vaddq_u8): Remove.
23867 (vaddq_u16): Remove.
23868 (vaddq_u32): Remove.
23869 (vaddq_f16): Remove.
23870 (vaddq_f32): Remove.
23871 (vaddq_x_s8): Remove.
23872 (vaddq_x_s16): Remove.
23873 (vaddq_x_s32): Remove.
23874 (vaddq_x_n_s8): Remove.
23875 (vaddq_x_n_s16): Remove.
23876 (vaddq_x_n_s32): Remove.
23877 (vaddq_x_u8): Remove.
23878 (vaddq_x_u16): Remove.
23879 (vaddq_x_u32): Remove.
23880 (vaddq_x_n_u8): Remove.
23881 (vaddq_x_n_u16): Remove.
23882 (vaddq_x_n_u32): Remove.
23883 (vaddq_x_f16): Remove.
23884 (vaddq_x_f32): Remove.
23885 (vaddq_x_n_f16): Remove.
23886 (vaddq_x_n_f32): Remove.
23887 (__arm_vaddq_n_u8): Remove.
23888 (__arm_vaddq_n_s8): Remove.
23889 (__arm_vaddq_n_u16): Remove.
23890 (__arm_vaddq_n_s16): Remove.
23891 (__arm_vaddq_n_u32): Remove.
23892 (__arm_vaddq_n_s32): Remove.
23893 (__arm_vaddq_m_n_s8): Remove.
23894 (__arm_vaddq_m_n_s32): Remove.
23895 (__arm_vaddq_m_n_s16): Remove.
23896 (__arm_vaddq_m_n_u8): Remove.
23897 (__arm_vaddq_m_n_u32): Remove.
23898 (__arm_vaddq_m_n_u16): Remove.
23899 (__arm_vaddq_m_s8): Remove.
23900 (__arm_vaddq_m_s32): Remove.
23901 (__arm_vaddq_m_s16): Remove.
23902 (__arm_vaddq_m_u8): Remove.
23903 (__arm_vaddq_m_u32): Remove.
23904 (__arm_vaddq_m_u16): Remove.
23905 (__arm_vaddq_s8): Remove.
23906 (__arm_vaddq_s16): Remove.
23907 (__arm_vaddq_s32): Remove.
23908 (__arm_vaddq_u8): Remove.
23909 (__arm_vaddq_u16): Remove.
23910 (__arm_vaddq_u32): Remove.
23911 (__arm_vaddq_x_s8): Remove.
23912 (__arm_vaddq_x_s16): Remove.
23913 (__arm_vaddq_x_s32): Remove.
23914 (__arm_vaddq_x_n_s8): Remove.
23915 (__arm_vaddq_x_n_s16): Remove.
23916 (__arm_vaddq_x_n_s32): Remove.
23917 (__arm_vaddq_x_u8): Remove.
23918 (__arm_vaddq_x_u16): Remove.
23919 (__arm_vaddq_x_u32): Remove.
23920 (__arm_vaddq_x_n_u8): Remove.
23921 (__arm_vaddq_x_n_u16): Remove.
23922 (__arm_vaddq_x_n_u32): Remove.
23923 (__arm_vaddq_n_f16): Remove.
23924 (__arm_vaddq_n_f32): Remove.
23925 (__arm_vaddq_m_f32): Remove.
23926 (__arm_vaddq_m_f16): Remove.
23927 (__arm_vaddq_m_n_f32): Remove.
23928 (__arm_vaddq_m_n_f16): Remove.
23929 (__arm_vaddq_f16): Remove.
23930 (__arm_vaddq_f32): Remove.
23931 (__arm_vaddq_x_f16): Remove.
23932 (__arm_vaddq_x_f32): Remove.
23933 (__arm_vaddq_x_n_f16): Remove.
23934 (__arm_vaddq_x_n_f32): Remove.
23935 (__arm_vaddq): Remove.
23936 (__arm_vaddq_m): Remove.
23937 (__arm_vaddq_x): Remove.
23941 (vmulq_u8): Remove.
23942 (vmulq_n_u8): Remove.
23943 (vmulq_s8): Remove.
23944 (vmulq_n_s8): Remove.
23945 (vmulq_u16): Remove.
23946 (vmulq_n_u16): Remove.
23947 (vmulq_s16): Remove.
23948 (vmulq_n_s16): Remove.
23949 (vmulq_u32): Remove.
23950 (vmulq_n_u32): Remove.
23951 (vmulq_s32): Remove.
23952 (vmulq_n_s32): Remove.
23953 (vmulq_n_f16): Remove.
23954 (vmulq_f16): Remove.
23955 (vmulq_n_f32): Remove.
23956 (vmulq_f32): Remove.
23957 (vmulq_m_n_s8): Remove.
23958 (vmulq_m_n_s32): Remove.
23959 (vmulq_m_n_s16): Remove.
23960 (vmulq_m_n_u8): Remove.
23961 (vmulq_m_n_u32): Remove.
23962 (vmulq_m_n_u16): Remove.
23963 (vmulq_m_s8): Remove.
23964 (vmulq_m_s32): Remove.
23965 (vmulq_m_s16): Remove.
23966 (vmulq_m_u8): Remove.
23967 (vmulq_m_u32): Remove.
23968 (vmulq_m_u16): Remove.
23969 (vmulq_m_f32): Remove.
23970 (vmulq_m_f16): Remove.
23971 (vmulq_m_n_f32): Remove.
23972 (vmulq_m_n_f16): Remove.
23973 (vmulq_x_s8): Remove.
23974 (vmulq_x_s16): Remove.
23975 (vmulq_x_s32): Remove.
23976 (vmulq_x_n_s8): Remove.
23977 (vmulq_x_n_s16): Remove.
23978 (vmulq_x_n_s32): Remove.
23979 (vmulq_x_u8): Remove.
23980 (vmulq_x_u16): Remove.
23981 (vmulq_x_u32): Remove.
23982 (vmulq_x_n_u8): Remove.
23983 (vmulq_x_n_u16): Remove.
23984 (vmulq_x_n_u32): Remove.
23985 (vmulq_x_f16): Remove.
23986 (vmulq_x_f32): Remove.
23987 (vmulq_x_n_f16): Remove.
23988 (vmulq_x_n_f32): Remove.
23989 (__arm_vmulq_u8): Remove.
23990 (__arm_vmulq_n_u8): Remove.
23991 (__arm_vmulq_s8): Remove.
23992 (__arm_vmulq_n_s8): Remove.
23993 (__arm_vmulq_u16): Remove.
23994 (__arm_vmulq_n_u16): Remove.
23995 (__arm_vmulq_s16): Remove.
23996 (__arm_vmulq_n_s16): Remove.
23997 (__arm_vmulq_u32): Remove.
23998 (__arm_vmulq_n_u32): Remove.
23999 (__arm_vmulq_s32): Remove.
24000 (__arm_vmulq_n_s32): Remove.
24001 (__arm_vmulq_m_n_s8): Remove.
24002 (__arm_vmulq_m_n_s32): Remove.
24003 (__arm_vmulq_m_n_s16): Remove.
24004 (__arm_vmulq_m_n_u8): Remove.
24005 (__arm_vmulq_m_n_u32): Remove.
24006 (__arm_vmulq_m_n_u16): Remove.
24007 (__arm_vmulq_m_s8): Remove.
24008 (__arm_vmulq_m_s32): Remove.
24009 (__arm_vmulq_m_s16): Remove.
24010 (__arm_vmulq_m_u8): Remove.
24011 (__arm_vmulq_m_u32): Remove.
24012 (__arm_vmulq_m_u16): Remove.
24013 (__arm_vmulq_x_s8): Remove.
24014 (__arm_vmulq_x_s16): Remove.
24015 (__arm_vmulq_x_s32): Remove.
24016 (__arm_vmulq_x_n_s8): Remove.
24017 (__arm_vmulq_x_n_s16): Remove.
24018 (__arm_vmulq_x_n_s32): Remove.
24019 (__arm_vmulq_x_u8): Remove.
24020 (__arm_vmulq_x_u16): Remove.
24021 (__arm_vmulq_x_u32): Remove.
24022 (__arm_vmulq_x_n_u8): Remove.
24023 (__arm_vmulq_x_n_u16): Remove.
24024 (__arm_vmulq_x_n_u32): Remove.
24025 (__arm_vmulq_n_f16): Remove.
24026 (__arm_vmulq_f16): Remove.
24027 (__arm_vmulq_n_f32): Remove.
24028 (__arm_vmulq_f32): Remove.
24029 (__arm_vmulq_m_f32): Remove.
24030 (__arm_vmulq_m_f16): Remove.
24031 (__arm_vmulq_m_n_f32): Remove.
24032 (__arm_vmulq_m_n_f16): Remove.
24033 (__arm_vmulq_x_f16): Remove.
24034 (__arm_vmulq_x_f32): Remove.
24035 (__arm_vmulq_x_n_f16): Remove.
24036 (__arm_vmulq_x_n_f32): Remove.
24037 (__arm_vmulq): Remove.
24038 (__arm_vmulq_m): Remove.
24039 (__arm_vmulq_x): Remove.
24043 (vsubq_n_f16): Remove.
24044 (vsubq_n_f32): Remove.
24045 (vsubq_u8): Remove.
24046 (vsubq_n_u8): Remove.
24047 (vsubq_s8): Remove.
24048 (vsubq_n_s8): Remove.
24049 (vsubq_u16): Remove.
24050 (vsubq_n_u16): Remove.
24051 (vsubq_s16): Remove.
24052 (vsubq_n_s16): Remove.
24053 (vsubq_u32): Remove.
24054 (vsubq_n_u32): Remove.
24055 (vsubq_s32): Remove.
24056 (vsubq_n_s32): Remove.
24057 (vsubq_f16): Remove.
24058 (vsubq_f32): Remove.
24059 (vsubq_m_s8): Remove.
24060 (vsubq_m_u8): Remove.
24061 (vsubq_m_s16): Remove.
24062 (vsubq_m_u16): Remove.
24063 (vsubq_m_s32): Remove.
24064 (vsubq_m_u32): Remove.
24065 (vsubq_m_n_s8): Remove.
24066 (vsubq_m_n_s32): Remove.
24067 (vsubq_m_n_s16): Remove.
24068 (vsubq_m_n_u8): Remove.
24069 (vsubq_m_n_u32): Remove.
24070 (vsubq_m_n_u16): Remove.
24071 (vsubq_m_f32): Remove.
24072 (vsubq_m_f16): Remove.
24073 (vsubq_m_n_f32): Remove.
24074 (vsubq_m_n_f16): Remove.
24075 (vsubq_x_s8): Remove.
24076 (vsubq_x_s16): Remove.
24077 (vsubq_x_s32): Remove.
24078 (vsubq_x_n_s8): Remove.
24079 (vsubq_x_n_s16): Remove.
24080 (vsubq_x_n_s32): Remove.
24081 (vsubq_x_u8): Remove.
24082 (vsubq_x_u16): Remove.
24083 (vsubq_x_u32): Remove.
24084 (vsubq_x_n_u8): Remove.
24085 (vsubq_x_n_u16): Remove.
24086 (vsubq_x_n_u32): Remove.
24087 (vsubq_x_f16): Remove.
24088 (vsubq_x_f32): Remove.
24089 (vsubq_x_n_f16): Remove.
24090 (vsubq_x_n_f32): Remove.
24091 (__arm_vsubq_u8): Remove.
24092 (__arm_vsubq_n_u8): Remove.
24093 (__arm_vsubq_s8): Remove.
24094 (__arm_vsubq_n_s8): Remove.
24095 (__arm_vsubq_u16): Remove.
24096 (__arm_vsubq_n_u16): Remove.
24097 (__arm_vsubq_s16): Remove.
24098 (__arm_vsubq_n_s16): Remove.
24099 (__arm_vsubq_u32): Remove.
24100 (__arm_vsubq_n_u32): Remove.
24101 (__arm_vsubq_s32): Remove.
24102 (__arm_vsubq_n_s32): Remove.
24103 (__arm_vsubq_m_s8): Remove.
24104 (__arm_vsubq_m_u8): Remove.
24105 (__arm_vsubq_m_s16): Remove.
24106 (__arm_vsubq_m_u16): Remove.
24107 (__arm_vsubq_m_s32): Remove.
24108 (__arm_vsubq_m_u32): Remove.
24109 (__arm_vsubq_m_n_s8): Remove.
24110 (__arm_vsubq_m_n_s32): Remove.
24111 (__arm_vsubq_m_n_s16): Remove.
24112 (__arm_vsubq_m_n_u8): Remove.
24113 (__arm_vsubq_m_n_u32): Remove.
24114 (__arm_vsubq_m_n_u16): Remove.
24115 (__arm_vsubq_x_s8): Remove.
24116 (__arm_vsubq_x_s16): Remove.
24117 (__arm_vsubq_x_s32): Remove.
24118 (__arm_vsubq_x_n_s8): Remove.
24119 (__arm_vsubq_x_n_s16): Remove.
24120 (__arm_vsubq_x_n_s32): Remove.
24121 (__arm_vsubq_x_u8): Remove.
24122 (__arm_vsubq_x_u16): Remove.
24123 (__arm_vsubq_x_u32): Remove.
24124 (__arm_vsubq_x_n_u8): Remove.
24125 (__arm_vsubq_x_n_u16): Remove.
24126 (__arm_vsubq_x_n_u32): Remove.
24127 (__arm_vsubq_n_f16): Remove.
24128 (__arm_vsubq_n_f32): Remove.
24129 (__arm_vsubq_f16): Remove.
24130 (__arm_vsubq_f32): Remove.
24131 (__arm_vsubq_m_f32): Remove.
24132 (__arm_vsubq_m_f16): Remove.
24133 (__arm_vsubq_m_n_f32): Remove.
24134 (__arm_vsubq_m_n_f16): Remove.
24135 (__arm_vsubq_x_f16): Remove.
24136 (__arm_vsubq_x_f32): Remove.
24137 (__arm_vsubq_x_n_f16): Remove.
24138 (__arm_vsubq_x_n_f32): Remove.
24139 (__arm_vsubq): Remove.
24140 (__arm_vsubq_m): Remove.
24141 (__arm_vsubq_x): Remove.
24142 * config/arm/arm_mve_builtins.def (vsubq_u, vsubq_s, vsubq_f):
24144 (vmulq_u, vmulq_s, vmulq_f): Remove.
24145 * config/arm/mve.md (mve_vsubq_<supf><mode>): Remove.
24146 (mve_vmulq_<supf><mode>): Remove.
24148 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
24150 * config/arm/iterators.md (MVE_INT_BINARY_RTX, MVE_INT_M_BINARY)
24151 (MVE_INT_M_N_BINARY, MVE_INT_N_BINARY, MVE_FP_M_BINARY)
24152 (MVE_FP_M_N_BINARY, MVE_FP_N_BINARY, mve_addsubmul, mve_insn): New
24154 * config/arm/mve.md
24155 (mve_vsubq_n_f<mode>, mve_vaddq_n_f<mode>, mve_vmulq_n_f<mode>):
24157 (@mve_<mve_insn>q_n_f<mode>): ... this.
24158 (mve_vaddq_n_<supf><mode>, mve_vmulq_n_<supf><mode>)
24159 (mve_vsubq_n_<supf><mode>): Factorize into ...
24160 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
24161 (mve_vaddq<mode>, mve_vmulq<mode>, mve_vsubq<mode>): Factorize
24163 (mve_<mve_addsubmul>q<mode>): ... this.
24164 (mve_vaddq_f<mode>, mve_vmulq_f<mode>, mve_vsubq_f<mode>):
24166 (mve_<mve_addsubmul>q_f<mode>): ... this.
24167 (mve_vaddq_m_<supf><mode>, mve_vmulq_m_<supf><mode>)
24168 (mve_vsubq_m_<supf><mode>): Factorize into ...
24169 (@mve_<mve_insn>q_m_<supf><mode>): ... this,
24170 (mve_vaddq_m_n_<supf><mode>, mve_vmulq_m_n_<supf><mode>)
24171 (mve_vsubq_m_n_<supf><mode>): Factorize into ...
24172 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
24173 (mve_vaddq_m_f<mode>, mve_vmulq_m_f<mode>, mve_vsubq_m_f<mode>):
24175 (@mve_<mve_insn>q_m_f<mode>): ... this.
24176 (mve_vaddq_m_n_f<mode>, mve_vmulq_m_n_f<mode>)
24177 (mve_vsubq_m_n_f<mode>): Factorize into ...
24178 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
24180 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
24182 * config/arm/arm-mve-builtins-functions.h (class
24183 unspec_based_mve_function_base): New.
24184 (class unspec_based_mve_function_exact_insn): New.
24186 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
24188 * config/arm/arm-mve-builtins-shapes.cc (binary_opt_n): New.
24189 * config/arm/arm-mve-builtins-shapes.h (binary_opt_n): New.
24191 2023-05-03 Murray Steele <murray.steele@arm.com>
24192 Christophe Lyon <christophe.lyon@arm.com>
24194 * config/arm/arm-mve-builtins-base.cc (class
24195 vuninitializedq_impl): New.
24196 * config/arm/arm-mve-builtins-base.def (vuninitializedq): New.
24197 * config/arm/arm-mve-builtins-base.h (vuninitializedq): New
24199 * config/arm/arm-mve-builtins-shapes.cc (inherent): New.
24200 * config/arm/arm-mve-builtins-shapes.h (inherent): New
24202 * config/arm/arm_mve_types.h (__arm_vuninitializedq): Move to ...
24203 * config/arm/arm_mve.h (__arm_vuninitializedq): ... here.
24204 (__arm_vuninitializedq_u8): Remove.
24205 (__arm_vuninitializedq_u16): Remove.
24206 (__arm_vuninitializedq_u32): Remove.
24207 (__arm_vuninitializedq_u64): Remove.
24208 (__arm_vuninitializedq_s8): Remove.
24209 (__arm_vuninitializedq_s16): Remove.
24210 (__arm_vuninitializedq_s32): Remove.
24211 (__arm_vuninitializedq_s64): Remove.
24212 (__arm_vuninitializedq_f16): Remove.
24213 (__arm_vuninitializedq_f32): Remove.
24215 2023-05-03 Murray Steele <murray.steele@arm.com>
24216 Christophe Lyon <christophe.lyon@arm.com>
24218 * config/arm/arm-mve-builtins-base.cc (vreinterpretq_impl): New class.
24219 * config/arm/arm-mve-builtins-base.def: Define vreinterpretq.
24220 * config/arm/arm-mve-builtins-base.h (vreinterpretq): New declaration.
24221 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): New function.
24222 (parse_type): Likewise.
24223 (parse_signature): Likewise.
24224 (build_one): Likewise.
24225 (build_all): Likewise.
24226 (overloaded_base): New struct.
24227 (unary_convert_def): Likewise.
24228 * config/arm/arm-mve-builtins-shapes.h (unary_convert): Declare.
24229 * config/arm/arm-mve-builtins.cc (TYPES_reinterpret_signed1): New
24231 (TYPES_reinterpret_unsigned1): Likewise.
24232 (TYPES_reinterpret_integer): Likewise.
24233 (TYPES_reinterpret_integer1): Likewise.
24234 (TYPES_reinterpret_float1): Likewise.
24235 (TYPES_reinterpret_float): Likewise.
24236 (reinterpret_integer): New.
24237 (reinterpret_float): New.
24238 (handle_arm_mve_h): Register builtins.
24239 * config/arm/arm_mve.h (vreinterpretq_s16): Remove.
24240 (vreinterpretq_s32): Likewise.
24241 (vreinterpretq_s64): Likewise.
24242 (vreinterpretq_s8): Likewise.
24243 (vreinterpretq_u16): Likewise.
24244 (vreinterpretq_u32): Likewise.
24245 (vreinterpretq_u64): Likewise.
24246 (vreinterpretq_u8): Likewise.
24247 (vreinterpretq_f16): Likewise.
24248 (vreinterpretq_f32): Likewise.
24249 (vreinterpretq_s16_s32): Likewise.
24250 (vreinterpretq_s16_s64): Likewise.
24251 (vreinterpretq_s16_s8): Likewise.
24252 (vreinterpretq_s16_u16): Likewise.
24253 (vreinterpretq_s16_u32): Likewise.
24254 (vreinterpretq_s16_u64): Likewise.
24255 (vreinterpretq_s16_u8): Likewise.
24256 (vreinterpretq_s32_s16): Likewise.
24257 (vreinterpretq_s32_s64): Likewise.
24258 (vreinterpretq_s32_s8): Likewise.
24259 (vreinterpretq_s32_u16): Likewise.
24260 (vreinterpretq_s32_u32): Likewise.
24261 (vreinterpretq_s32_u64): Likewise.
24262 (vreinterpretq_s32_u8): Likewise.
24263 (vreinterpretq_s64_s16): Likewise.
24264 (vreinterpretq_s64_s32): Likewise.
24265 (vreinterpretq_s64_s8): Likewise.
24266 (vreinterpretq_s64_u16): Likewise.
24267 (vreinterpretq_s64_u32): Likewise.
24268 (vreinterpretq_s64_u64): Likewise.
24269 (vreinterpretq_s64_u8): Likewise.
24270 (vreinterpretq_s8_s16): Likewise.
24271 (vreinterpretq_s8_s32): Likewise.
24272 (vreinterpretq_s8_s64): Likewise.
24273 (vreinterpretq_s8_u16): Likewise.
24274 (vreinterpretq_s8_u32): Likewise.
24275 (vreinterpretq_s8_u64): Likewise.
24276 (vreinterpretq_s8_u8): Likewise.
24277 (vreinterpretq_u16_s16): Likewise.
24278 (vreinterpretq_u16_s32): Likewise.
24279 (vreinterpretq_u16_s64): Likewise.
24280 (vreinterpretq_u16_s8): Likewise.
24281 (vreinterpretq_u16_u32): Likewise.
24282 (vreinterpretq_u16_u64): Likewise.
24283 (vreinterpretq_u16_u8): Likewise.
24284 (vreinterpretq_u32_s16): Likewise.
24285 (vreinterpretq_u32_s32): Likewise.
24286 (vreinterpretq_u32_s64): Likewise.
24287 (vreinterpretq_u32_s8): Likewise.
24288 (vreinterpretq_u32_u16): Likewise.
24289 (vreinterpretq_u32_u64): Likewise.
24290 (vreinterpretq_u32_u8): Likewise.
24291 (vreinterpretq_u64_s16): Likewise.
24292 (vreinterpretq_u64_s32): Likewise.
24293 (vreinterpretq_u64_s64): Likewise.
24294 (vreinterpretq_u64_s8): Likewise.
24295 (vreinterpretq_u64_u16): Likewise.
24296 (vreinterpretq_u64_u32): Likewise.
24297 (vreinterpretq_u64_u8): Likewise.
24298 (vreinterpretq_u8_s16): Likewise.
24299 (vreinterpretq_u8_s32): Likewise.
24300 (vreinterpretq_u8_s64): Likewise.
24301 (vreinterpretq_u8_s8): Likewise.
24302 (vreinterpretq_u8_u16): Likewise.
24303 (vreinterpretq_u8_u32): Likewise.
24304 (vreinterpretq_u8_u64): Likewise.
24305 (vreinterpretq_s32_f16): Likewise.
24306 (vreinterpretq_s32_f32): Likewise.
24307 (vreinterpretq_u16_f16): Likewise.
24308 (vreinterpretq_u16_f32): Likewise.
24309 (vreinterpretq_u32_f16): Likewise.
24310 (vreinterpretq_u32_f32): Likewise.
24311 (vreinterpretq_u64_f16): Likewise.
24312 (vreinterpretq_u64_f32): Likewise.
24313 (vreinterpretq_u8_f16): Likewise.
24314 (vreinterpretq_u8_f32): Likewise.
24315 (vreinterpretq_f16_f32): Likewise.
24316 (vreinterpretq_f16_s16): Likewise.
24317 (vreinterpretq_f16_s32): Likewise.
24318 (vreinterpretq_f16_s64): Likewise.
24319 (vreinterpretq_f16_s8): Likewise.
24320 (vreinterpretq_f16_u16): Likewise.
24321 (vreinterpretq_f16_u32): Likewise.
24322 (vreinterpretq_f16_u64): Likewise.
24323 (vreinterpretq_f16_u8): Likewise.
24324 (vreinterpretq_f32_f16): Likewise.
24325 (vreinterpretq_f32_s16): Likewise.
24326 (vreinterpretq_f32_s32): Likewise.
24327 (vreinterpretq_f32_s64): Likewise.
24328 (vreinterpretq_f32_s8): Likewise.
24329 (vreinterpretq_f32_u16): Likewise.
24330 (vreinterpretq_f32_u32): Likewise.
24331 (vreinterpretq_f32_u64): Likewise.
24332 (vreinterpretq_f32_u8): Likewise.
24333 (vreinterpretq_s16_f16): Likewise.
24334 (vreinterpretq_s16_f32): Likewise.
24335 (vreinterpretq_s64_f16): Likewise.
24336 (vreinterpretq_s64_f32): Likewise.
24337 (vreinterpretq_s8_f16): Likewise.
24338 (vreinterpretq_s8_f32): Likewise.
24339 (__arm_vreinterpretq_f16): Likewise.
24340 (__arm_vreinterpretq_f32): Likewise.
24341 (__arm_vreinterpretq_s16): Likewise.
24342 (__arm_vreinterpretq_s32): Likewise.
24343 (__arm_vreinterpretq_s64): Likewise.
24344 (__arm_vreinterpretq_s8): Likewise.
24345 (__arm_vreinterpretq_u16): Likewise.
24346 (__arm_vreinterpretq_u32): Likewise.
24347 (__arm_vreinterpretq_u64): Likewise.
24348 (__arm_vreinterpretq_u8): Likewise.
24349 * config/arm/arm_mve_types.h (__arm_vreinterpretq_s16_s32): Remove.
24350 (__arm_vreinterpretq_s16_s64): Likewise.
24351 (__arm_vreinterpretq_s16_s8): Likewise.
24352 (__arm_vreinterpretq_s16_u16): Likewise.
24353 (__arm_vreinterpretq_s16_u32): Likewise.
24354 (__arm_vreinterpretq_s16_u64): Likewise.
24355 (__arm_vreinterpretq_s16_u8): Likewise.
24356 (__arm_vreinterpretq_s32_s16): Likewise.
24357 (__arm_vreinterpretq_s32_s64): Likewise.
24358 (__arm_vreinterpretq_s32_s8): Likewise.
24359 (__arm_vreinterpretq_s32_u16): Likewise.
24360 (__arm_vreinterpretq_s32_u32): Likewise.
24361 (__arm_vreinterpretq_s32_u64): Likewise.
24362 (__arm_vreinterpretq_s32_u8): Likewise.
24363 (__arm_vreinterpretq_s64_s16): Likewise.
24364 (__arm_vreinterpretq_s64_s32): Likewise.
24365 (__arm_vreinterpretq_s64_s8): Likewise.
24366 (__arm_vreinterpretq_s64_u16): Likewise.
24367 (__arm_vreinterpretq_s64_u32): Likewise.
24368 (__arm_vreinterpretq_s64_u64): Likewise.
24369 (__arm_vreinterpretq_s64_u8): Likewise.
24370 (__arm_vreinterpretq_s8_s16): Likewise.
24371 (__arm_vreinterpretq_s8_s32): Likewise.
24372 (__arm_vreinterpretq_s8_s64): Likewise.
24373 (__arm_vreinterpretq_s8_u16): Likewise.
24374 (__arm_vreinterpretq_s8_u32): Likewise.
24375 (__arm_vreinterpretq_s8_u64): Likewise.
24376 (__arm_vreinterpretq_s8_u8): Likewise.
24377 (__arm_vreinterpretq_u16_s16): Likewise.
24378 (__arm_vreinterpretq_u16_s32): Likewise.
24379 (__arm_vreinterpretq_u16_s64): Likewise.
24380 (__arm_vreinterpretq_u16_s8): Likewise.
24381 (__arm_vreinterpretq_u16_u32): Likewise.
24382 (__arm_vreinterpretq_u16_u64): Likewise.
24383 (__arm_vreinterpretq_u16_u8): Likewise.
24384 (__arm_vreinterpretq_u32_s16): Likewise.
24385 (__arm_vreinterpretq_u32_s32): Likewise.
24386 (__arm_vreinterpretq_u32_s64): Likewise.
24387 (__arm_vreinterpretq_u32_s8): Likewise.
24388 (__arm_vreinterpretq_u32_u16): Likewise.
24389 (__arm_vreinterpretq_u32_u64): Likewise.
24390 (__arm_vreinterpretq_u32_u8): Likewise.
24391 (__arm_vreinterpretq_u64_s16): Likewise.
24392 (__arm_vreinterpretq_u64_s32): Likewise.
24393 (__arm_vreinterpretq_u64_s64): Likewise.
24394 (__arm_vreinterpretq_u64_s8): Likewise.
24395 (__arm_vreinterpretq_u64_u16): Likewise.
24396 (__arm_vreinterpretq_u64_u32): Likewise.
24397 (__arm_vreinterpretq_u64_u8): Likewise.
24398 (__arm_vreinterpretq_u8_s16): Likewise.
24399 (__arm_vreinterpretq_u8_s32): Likewise.
24400 (__arm_vreinterpretq_u8_s64): Likewise.
24401 (__arm_vreinterpretq_u8_s8): Likewise.
24402 (__arm_vreinterpretq_u8_u16): Likewise.
24403 (__arm_vreinterpretq_u8_u32): Likewise.
24404 (__arm_vreinterpretq_u8_u64): Likewise.
24405 (__arm_vreinterpretq_s32_f16): Likewise.
24406 (__arm_vreinterpretq_s32_f32): Likewise.
24407 (__arm_vreinterpretq_s16_f16): Likewise.
24408 (__arm_vreinterpretq_s16_f32): Likewise.
24409 (__arm_vreinterpretq_s64_f16): Likewise.
24410 (__arm_vreinterpretq_s64_f32): Likewise.
24411 (__arm_vreinterpretq_s8_f16): Likewise.
24412 (__arm_vreinterpretq_s8_f32): Likewise.
24413 (__arm_vreinterpretq_u16_f16): Likewise.
24414 (__arm_vreinterpretq_u16_f32): Likewise.
24415 (__arm_vreinterpretq_u32_f16): Likewise.
24416 (__arm_vreinterpretq_u32_f32): Likewise.
24417 (__arm_vreinterpretq_u64_f16): Likewise.
24418 (__arm_vreinterpretq_u64_f32): Likewise.
24419 (__arm_vreinterpretq_u8_f16): Likewise.
24420 (__arm_vreinterpretq_u8_f32): Likewise.
24421 (__arm_vreinterpretq_f16_f32): Likewise.
24422 (__arm_vreinterpretq_f16_s16): Likewise.
24423 (__arm_vreinterpretq_f16_s32): Likewise.
24424 (__arm_vreinterpretq_f16_s64): Likewise.
24425 (__arm_vreinterpretq_f16_s8): Likewise.
24426 (__arm_vreinterpretq_f16_u16): Likewise.
24427 (__arm_vreinterpretq_f16_u32): Likewise.
24428 (__arm_vreinterpretq_f16_u64): Likewise.
24429 (__arm_vreinterpretq_f16_u8): Likewise.
24430 (__arm_vreinterpretq_f32_f16): Likewise.
24431 (__arm_vreinterpretq_f32_s16): Likewise.
24432 (__arm_vreinterpretq_f32_s32): Likewise.
24433 (__arm_vreinterpretq_f32_s64): Likewise.
24434 (__arm_vreinterpretq_f32_s8): Likewise.
24435 (__arm_vreinterpretq_f32_u16): Likewise.
24436 (__arm_vreinterpretq_f32_u32): Likewise.
24437 (__arm_vreinterpretq_f32_u64): Likewise.
24438 (__arm_vreinterpretq_f32_u8): Likewise.
24439 (__arm_vreinterpretq_s16): Likewise.
24440 (__arm_vreinterpretq_s32): Likewise.
24441 (__arm_vreinterpretq_s64): Likewise.
24442 (__arm_vreinterpretq_s8): Likewise.
24443 (__arm_vreinterpretq_u16): Likewise.
24444 (__arm_vreinterpretq_u32): Likewise.
24445 (__arm_vreinterpretq_u64): Likewise.
24446 (__arm_vreinterpretq_u8): Likewise.
24447 (__arm_vreinterpretq_f16): Likewise.
24448 (__arm_vreinterpretq_f32): Likewise.
24449 * config/arm/mve.md (@arm_mve_reinterpret<mode>): New pattern.
24450 * config/arm/unspecs.md: (REINTERPRET): New unspec.
24452 2023-05-03 Murray Steele <murray.steele@arm.com>
24453 Christophe Lyon <christophe.lyon@arm.com>
24454 Christophe Lyon <christophe.lyon@arm.com
24456 * config.gcc: Add arm-mve-builtins-base.o and
24457 arm-mve-builtins-shapes.o to extra_objs.
24458 * config/arm/arm-builtins.cc (arm_builtin_decl): Handle MVE builtin
24460 (arm_expand_builtin): Likewise
24461 (arm_check_builtin_call): Likewise
24462 (arm_describe_resolver): Likewise.
24463 * config/arm/arm-builtins.h (enum resolver_ident): Add
24465 * config/arm/arm-c.cc (arm_pragma_arm): Handle new pragma.
24466 (arm_resolve_overloaded_builtin): Handle MVE builtins.
24467 (arm_register_target_pragmas): Register arm_check_builtin_call.
24468 * config/arm/arm-mve-builtins.cc (class registered_function): New
24470 (struct registered_function_hasher): New struct.
24471 (pred_suffixes): New table.
24472 (mode_suffixes): New table.
24473 (type_suffix_info): New table.
24474 (TYPES_float16): New.
24475 (TYPES_all_float): New.
24476 (TYPES_integer_8): New.
24477 (TYPES_integer_8_16): New.
24478 (TYPES_integer_16_32): New.
24479 (TYPES_integer_32): New.
24480 (TYPES_signed_16_32): New.
24481 (TYPES_signed_32): New.
24482 (TYPES_all_signed): New.
24483 (TYPES_all_unsigned): New.
24484 (TYPES_all_integer): New.
24485 (TYPES_all_integer_with_64): New.
24486 (DEF_VECTOR_TYPE): New.
24487 (DEF_DOUBLE_TYPE): New.
24488 (DEF_MVE_TYPES_ARRAY): New.
24489 (all_integer): New.
24490 (all_integer_with_64): New.
24494 (all_unsigned): New.
24496 (integer_8_16): New.
24497 (integer_16_32): New.
24499 (signed_16_32): New.
24501 (register_vector_type): Use void_type_node for mve.fp-only types when
24502 mve.fp is not enabled.
24503 (register_builtin_tuple_types): Likewise.
24504 (handle_arm_mve_h): New function..
24505 (matches_type_p): Likewise..
24506 (report_out_of_range): Likewise.
24507 (report_not_enum): Likewise.
24508 (report_missing_float): Likewise.
24509 (report_non_ice): Likewise.
24510 (check_requires_float): Likewise.
24511 (function_instance::hash): Likewise
24512 (function_instance::call_properties): Likewise.
24513 (function_instance::reads_global_state_p): Likewise.
24514 (function_instance::modifies_global_state_p): Likewise.
24515 (function_instance::could_trap_p): Likewise.
24516 (function_instance::has_inactive_argument): Likewise.
24517 (registered_function_hasher::hash): Likewise.
24518 (registered_function_hasher::equal): Likewise.
24519 (function_builder::function_builder): Likewise.
24520 (function_builder::~function_builder): Likewise.
24521 (function_builder::append_name): Likewise.
24522 (function_builder::finish_name): Likewise.
24523 (function_builder::get_name): Likewise.
24524 (add_attribute): Likewise.
24525 (function_builder::get_attributes): Likewise.
24526 (function_builder::add_function): Likewise.
24527 (function_builder::add_unique_function): Likewise.
24528 (function_builder::add_overloaded_function): Likewise.
24529 (function_builder::add_overloaded_functions): Likewise.
24530 (function_builder::register_function_group): Likewise.
24531 (function_call_info::function_call_info): Likewise.
24532 (function_resolver::function_resolver): Likewise.
24533 (function_resolver::get_vector_type): Likewise.
24534 (function_resolver::get_scalar_type_name): Likewise.
24535 (function_resolver::get_argument_type): Likewise.
24536 (function_resolver::scalar_argument_p): Likewise.
24537 (function_resolver::report_no_such_form): Likewise.
24538 (function_resolver::lookup_form): Likewise.
24539 (function_resolver::resolve_to): Likewise.
24540 (function_resolver::infer_vector_or_tuple_type): Likewise.
24541 (function_resolver::infer_vector_type): Likewise.
24542 (function_resolver::require_vector_or_scalar_type): Likewise.
24543 (function_resolver::require_vector_type): Likewise.
24544 (function_resolver::require_matching_vector_type): Likewise.
24545 (function_resolver::require_derived_vector_type): Likewise.
24546 (function_resolver::require_derived_scalar_type): Likewise.
24547 (function_resolver::require_integer_immediate): Likewise.
24548 (function_resolver::require_scalar_type): Likewise.
24549 (function_resolver::check_num_arguments): Likewise.
24550 (function_resolver::check_gp_argument): Likewise.
24551 (function_resolver::finish_opt_n_resolution): Likewise.
24552 (function_resolver::resolve_unary): Likewise.
24553 (function_resolver::resolve_unary_n): Likewise.
24554 (function_resolver::resolve_uniform): Likewise.
24555 (function_resolver::resolve_uniform_opt_n): Likewise.
24556 (function_resolver::resolve): Likewise.
24557 (function_checker::function_checker): Likewise.
24558 (function_checker::argument_exists_p): Likewise.
24559 (function_checker::require_immediate): Likewise.
24560 (function_checker::require_immediate_enum): Likewise.
24561 (function_checker::require_immediate_range): Likewise.
24562 (function_checker::check): Likewise.
24563 (gimple_folder::gimple_folder): Likewise.
24564 (gimple_folder::fold): Likewise.
24565 (function_expander::function_expander): Likewise.
24566 (function_expander::direct_optab_handler): Likewise.
24567 (function_expander::get_fallback_value): Likewise.
24568 (function_expander::get_reg_target): Likewise.
24569 (function_expander::add_output_operand): Likewise.
24570 (function_expander::add_input_operand): Likewise.
24571 (function_expander::add_integer_operand): Likewise.
24572 (function_expander::generate_insn): Likewise.
24573 (function_expander::use_exact_insn): Likewise.
24574 (function_expander::use_unpred_insn): Likewise.
24575 (function_expander::use_pred_x_insn): Likewise.
24576 (function_expander::use_cond_insn): Likewise.
24577 (function_expander::map_to_rtx_codes): Likewise.
24578 (function_expander::expand): Likewise.
24579 (resolve_overloaded_builtin): Likewise.
24580 (check_builtin_call): Likewise.
24581 (gimple_fold_builtin): Likewise.
24582 (expand_builtin): Likewise.
24583 (gt_ggc_mx): Likewise.
24584 (gt_pch_nx): Likewise.
24585 (gt_pch_nx): Likewise.
24586 * config/arm/arm-mve-builtins.def(s8): Define new type suffix.
24597 (offset): New mode.
24598 * config/arm/arm-mve-builtins.h (MAX_TUPLE_SIZE): New constant.
24599 (CP_READ_FPCR): Likewise.
24600 (CP_RAISE_FP_EXCEPTIONS): Likewise.
24601 (CP_READ_MEMORY): Likewise.
24602 (CP_WRITE_MEMORY): Likewise.
24603 (enum units_index): New enum.
24604 (enum predication_index): New.
24605 (enum type_class_index): New.
24606 (enum mode_suffix_index): New enum.
24607 (enum type_suffix_index): New.
24608 (struct mode_suffix_info): New struct.
24609 (struct type_suffix_info): New.
24610 (struct function_group_info): Likewise.
24611 (class function_instance): Likewise.
24612 (class registered_function): Likewise.
24613 (class function_builder): Likewise.
24614 (class function_call_info): Likewise.
24615 (class function_resolver): Likewise.
24616 (class function_checker): Likewise.
24617 (class gimple_folder): Likewise.
24618 (class function_expander): Likewise.
24619 (get_mve_pred16_t): Likewise.
24620 (find_mode_suffix): New function.
24621 (class function_base): Likewise.
24622 (class function_shape): Likewise.
24623 (function_instance::operator==): New function.
24624 (function_instance::operator!=): Likewise.
24625 (function_instance::vectors_per_tuple): Likewise.
24626 (function_instance::mode_suffix): Likewise.
24627 (function_instance::type_suffix): Likewise.
24628 (function_instance::scalar_type): Likewise.
24629 (function_instance::vector_type): Likewise.
24630 (function_instance::tuple_type): Likewise.
24631 (function_instance::vector_mode): Likewise.
24632 (function_call_info::function_returns_void_p): Likewise.
24633 (function_base::call_properties): Likewise.
24634 * config/arm/arm-protos.h (enum arm_builtin_class): Add
24636 (handle_arm_mve_h): New.
24637 (resolve_overloaded_builtin): New.
24638 (check_builtin_call): New.
24639 (gimple_fold_builtin): New.
24640 (expand_builtin): New.
24641 * config/arm/arm.cc (TARGET_GIMPLE_FOLD_BUILTIN): Define as
24642 arm_gimple_fold_builtin.
24643 (arm_gimple_fold_builtin): New function.
24644 * config/arm/arm_mve.h: Use new arm_mve.h pragma.
24645 * config/arm/predicates.md (arm_any_register_operand): New predicate.
24646 * config/arm/t-arm: (arm-mve-builtins.o): Add includes.
24647 (arm-mve-builtins-shapes.o): New target.
24648 (arm-mve-builtins-base.o): New target.
24649 * config/arm/arm-mve-builtins-base.cc: New file.
24650 * config/arm/arm-mve-builtins-base.def: New file.
24651 * config/arm/arm-mve-builtins-base.h: New file.
24652 * config/arm/arm-mve-builtins-functions.h: New file.
24653 * config/arm/arm-mve-builtins-shapes.cc: New file.
24654 * config/arm/arm-mve-builtins-shapes.h: New file.
24656 2023-05-03 Murray Steele <murray.steele@arm.com>
24657 Christophe Lyon <christophe.lyon@arm.com>
24658 Christophe Lyon <christophe.lyon@arm.com>
24660 * config/arm/arm-builtins.cc (arm_general_add_builtin_function):
24662 (arm_init_builtin): Use arm_general_add_builtin_function instead
24663 of arm_add_builtin_function.
24664 (arm_init_acle_builtins): Likewise.
24665 (arm_init_mve_builtins): Likewise.
24666 (arm_init_crypto_builtins): Likewise.
24667 (arm_init_builtins): Likewise.
24668 (arm_general_builtin_decl): New function.
24669 (arm_builtin_decl): Defer to numberspace-specialized functions.
24670 (arm_expand_builtin_args): Rename into arm_general_expand_builtin_args.
24671 (arm_expand_builtin_1): Rename into arm_general_expand_builtin_1 and ...
24672 (arm_general_expand_builtin_1): ... specialize for general builtins.
24673 (arm_expand_acle_builtin): Use arm_general_expand_builtin
24674 instead of arm_expand_builtin.
24675 (arm_expand_mve_builtin): Likewise.
24676 (arm_expand_neon_builtin): Likewise.
24677 (arm_expand_vfp_builtin): Likewise.
24678 (arm_general_expand_builtin): New function.
24679 (arm_expand_builtin): Specialize for general builtins.
24680 (arm_general_check_builtin_call): New function.
24681 (arm_check_builtin_call): Specialize for general builtins.
24682 (arm_describe_resolver): Validate numberspace.
24683 (arm_cde_end_args): Likewise.
24684 * config/arm/arm-protos.h (enum arm_builtin_class): New enum.
24685 (ARM_BUILTIN_SHIFT, ARM_BUILTIN_CLASS): New constants.
24687 2023-05-03 Martin Liska <mliska@suse.cz>
24690 * config/riscv/sync.md: Add gcc_unreachable to a switch.
24692 2023-05-03 Richard Biener <rguenther@suse.de>
24694 * tree-ssa-loop-split.cc (split_at_bb_p): Avoid last_stmt.
24695 (patch_loop_exit): Likewise.
24696 (connect_loops): Likewise.
24697 (split_loop): Likewise.
24698 (control_dep_semi_invariant_p): Likewise.
24699 (do_split_loop_on_cond): Likewise.
24700 (split_loop_on_cond): Likewise.
24701 * tree-ssa-loop-unswitch.cc (find_unswitching_predicates_for_bb):
24703 (simplify_loop_version): Likewise.
24704 (evaluate_bbs): Likewise.
24705 (find_loop_guard): Likewise.
24706 (clean_up_after_unswitching): Likewise.
24707 * tree-ssa-math-opts.cc (maybe_optimize_guarding_check):
24709 (optimize_spaceship): Take a gcond * argument, avoid
24711 (math_opts_dom_walker::after_dom_children): Adjust call to
24712 optimize_spaceship.
24713 * tree-vrp.cc (maybe_set_nonzero_bits): Avoid last_stmt.
24714 * value-pointer-equiv.cc (pointer_equiv_analyzer::visit_edge):
24717 2023-05-03 Andreas Schwab <schwab@suse.de>
24719 * config/riscv/linux.h (LIB_SPEC): Don't redefine.
24721 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24723 * config/riscv/riscv-vector-builtins-bases.cc (fold_fault_load):
24725 (class vlseg): New class.
24726 (class vsseg): Ditto.
24727 (class vlsseg): Ditto.
24728 (class vssseg): Ditto.
24729 (class seg_indexed_load): Ditto.
24730 (class seg_indexed_store): Ditto.
24731 (class vlsegff): Ditto.
24733 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
24734 * config/riscv/riscv-vector-builtins-functions.def (vlseg):
24744 * config/riscv/riscv-vector-builtins-shapes.cc (struct
24745 seg_loadstore_def): Ditto.
24746 (struct seg_indexed_loadstore_def): Ditto.
24747 (struct seg_fault_load_def): Ditto.
24749 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
24750 * config/riscv/riscv-vector-builtins.cc
24751 (function_builder::append_nf): New function.
24752 * config/riscv/riscv-vector-builtins.def (vfloat32m1x2_t):
24753 Change ptr from double into float.
24754 (vfloat32m1x3_t): Ditto.
24755 (vfloat32m1x4_t): Ditto.
24756 (vfloat32m1x5_t): Ditto.
24757 (vfloat32m1x6_t): Ditto.
24758 (vfloat32m1x7_t): Ditto.
24759 (vfloat32m1x8_t): Ditto.
24760 (vfloat32m2x2_t): Ditto.
24761 (vfloat32m2x3_t): Ditto.
24762 (vfloat32m2x4_t): Ditto.
24763 (vfloat32m4x2_t): Ditto.
24764 * config/riscv/riscv-vector-builtins.h: Add segment intrinsics.
24765 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Adapt for
24767 * config/riscv/riscv.md: Add segment instructions.
24768 * config/riscv/vector-iterators.md: Support segment intrinsics.
24769 * config/riscv/vector.md (@pred_unit_strided_load<mode>): New
24771 (@pred_unit_strided_store<mode>): Ditto.
24772 (@pred_strided_load<mode>): Ditto.
24773 (@pred_strided_store<mode>): Ditto.
24774 (@pred_fault_load<mode>): Ditto.
24775 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
24776 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
24777 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
24778 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
24779 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
24780 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
24781 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
24782 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
24783 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
24784 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
24785 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
24786 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
24787 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
24788 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
24790 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24792 * config/riscv/genrvv-type-indexer.cc (valid_type): Adapt for
24793 tuple type support.
24795 (floattype): Ditto.
24797 * config/riscv/riscv-vector-builtins-bases.cc: Ditto.
24798 * config/riscv/riscv-vector-builtins-functions.def (vset): Add
24800 (vget): Add tuple type vget.
24801 * config/riscv/riscv-vector-builtins-types.def
24802 (DEF_RVV_TUPLE_OPS): New macro.
24803 (vint8mf8x2_t): Ditto.
24804 (vuint8mf8x2_t): Ditto.
24805 (vint8mf8x3_t): Ditto.
24806 (vuint8mf8x3_t): Ditto.
24807 (vint8mf8x4_t): Ditto.
24808 (vuint8mf8x4_t): Ditto.
24809 (vint8mf8x5_t): Ditto.
24810 (vuint8mf8x5_t): Ditto.
24811 (vint8mf8x6_t): Ditto.
24812 (vuint8mf8x6_t): Ditto.
24813 (vint8mf8x7_t): Ditto.
24814 (vuint8mf8x7_t): Ditto.
24815 (vint8mf8x8_t): Ditto.
24816 (vuint8mf8x8_t): Ditto.
24817 (vint8mf4x2_t): Ditto.
24818 (vuint8mf4x2_t): Ditto.
24819 (vint8mf4x3_t): Ditto.
24820 (vuint8mf4x3_t): Ditto.
24821 (vint8mf4x4_t): Ditto.
24822 (vuint8mf4x4_t): Ditto.
24823 (vint8mf4x5_t): Ditto.
24824 (vuint8mf4x5_t): Ditto.
24825 (vint8mf4x6_t): Ditto.
24826 (vuint8mf4x6_t): Ditto.
24827 (vint8mf4x7_t): Ditto.
24828 (vuint8mf4x7_t): Ditto.
24829 (vint8mf4x8_t): Ditto.
24830 (vuint8mf4x8_t): Ditto.
24831 (vint8mf2x2_t): Ditto.
24832 (vuint8mf2x2_t): Ditto.
24833 (vint8mf2x3_t): Ditto.
24834 (vuint8mf2x3_t): Ditto.
24835 (vint8mf2x4_t): Ditto.
24836 (vuint8mf2x4_t): Ditto.
24837 (vint8mf2x5_t): Ditto.
24838 (vuint8mf2x5_t): Ditto.
24839 (vint8mf2x6_t): Ditto.
24840 (vuint8mf2x6_t): Ditto.
24841 (vint8mf2x7_t): Ditto.
24842 (vuint8mf2x7_t): Ditto.
24843 (vint8mf2x8_t): Ditto.
24844 (vuint8mf2x8_t): Ditto.
24845 (vint8m1x2_t): Ditto.
24846 (vuint8m1x2_t): Ditto.
24847 (vint8m1x3_t): Ditto.
24848 (vuint8m1x3_t): Ditto.
24849 (vint8m1x4_t): Ditto.
24850 (vuint8m1x4_t): Ditto.
24851 (vint8m1x5_t): Ditto.
24852 (vuint8m1x5_t): Ditto.
24853 (vint8m1x6_t): Ditto.
24854 (vuint8m1x6_t): Ditto.
24855 (vint8m1x7_t): Ditto.
24856 (vuint8m1x7_t): Ditto.
24857 (vint8m1x8_t): Ditto.
24858 (vuint8m1x8_t): Ditto.
24859 (vint8m2x2_t): Ditto.
24860 (vuint8m2x2_t): Ditto.
24861 (vint8m2x3_t): Ditto.
24862 (vuint8m2x3_t): Ditto.
24863 (vint8m2x4_t): Ditto.
24864 (vuint8m2x4_t): Ditto.
24865 (vint8m4x2_t): Ditto.
24866 (vuint8m4x2_t): Ditto.
24867 (vint16mf4x2_t): Ditto.
24868 (vuint16mf4x2_t): Ditto.
24869 (vint16mf4x3_t): Ditto.
24870 (vuint16mf4x3_t): Ditto.
24871 (vint16mf4x4_t): Ditto.
24872 (vuint16mf4x4_t): Ditto.
24873 (vint16mf4x5_t): Ditto.
24874 (vuint16mf4x5_t): Ditto.
24875 (vint16mf4x6_t): Ditto.
24876 (vuint16mf4x6_t): Ditto.
24877 (vint16mf4x7_t): Ditto.
24878 (vuint16mf4x7_t): Ditto.
24879 (vint16mf4x8_t): Ditto.
24880 (vuint16mf4x8_t): Ditto.
24881 (vint16mf2x2_t): Ditto.
24882 (vuint16mf2x2_t): Ditto.
24883 (vint16mf2x3_t): Ditto.
24884 (vuint16mf2x3_t): Ditto.
24885 (vint16mf2x4_t): Ditto.
24886 (vuint16mf2x4_t): Ditto.
24887 (vint16mf2x5_t): Ditto.
24888 (vuint16mf2x5_t): Ditto.
24889 (vint16mf2x6_t): Ditto.
24890 (vuint16mf2x6_t): Ditto.
24891 (vint16mf2x7_t): Ditto.
24892 (vuint16mf2x7_t): Ditto.
24893 (vint16mf2x8_t): Ditto.
24894 (vuint16mf2x8_t): Ditto.
24895 (vint16m1x2_t): Ditto.
24896 (vuint16m1x2_t): Ditto.
24897 (vint16m1x3_t): Ditto.
24898 (vuint16m1x3_t): Ditto.
24899 (vint16m1x4_t): Ditto.
24900 (vuint16m1x4_t): Ditto.
24901 (vint16m1x5_t): Ditto.
24902 (vuint16m1x5_t): Ditto.
24903 (vint16m1x6_t): Ditto.
24904 (vuint16m1x6_t): Ditto.
24905 (vint16m1x7_t): Ditto.
24906 (vuint16m1x7_t): Ditto.
24907 (vint16m1x8_t): Ditto.
24908 (vuint16m1x8_t): Ditto.
24909 (vint16m2x2_t): Ditto.
24910 (vuint16m2x2_t): Ditto.
24911 (vint16m2x3_t): Ditto.
24912 (vuint16m2x3_t): Ditto.
24913 (vint16m2x4_t): Ditto.
24914 (vuint16m2x4_t): Ditto.
24915 (vint16m4x2_t): Ditto.
24916 (vuint16m4x2_t): Ditto.
24917 (vint32mf2x2_t): Ditto.
24918 (vuint32mf2x2_t): Ditto.
24919 (vint32mf2x3_t): Ditto.
24920 (vuint32mf2x3_t): Ditto.
24921 (vint32mf2x4_t): Ditto.
24922 (vuint32mf2x4_t): Ditto.
24923 (vint32mf2x5_t): Ditto.
24924 (vuint32mf2x5_t): Ditto.
24925 (vint32mf2x6_t): Ditto.
24926 (vuint32mf2x6_t): Ditto.
24927 (vint32mf2x7_t): Ditto.
24928 (vuint32mf2x7_t): Ditto.
24929 (vint32mf2x8_t): Ditto.
24930 (vuint32mf2x8_t): Ditto.
24931 (vint32m1x2_t): Ditto.
24932 (vuint32m1x2_t): Ditto.
24933 (vint32m1x3_t): Ditto.
24934 (vuint32m1x3_t): Ditto.
24935 (vint32m1x4_t): Ditto.
24936 (vuint32m1x4_t): Ditto.
24937 (vint32m1x5_t): Ditto.
24938 (vuint32m1x5_t): Ditto.
24939 (vint32m1x6_t): Ditto.
24940 (vuint32m1x6_t): Ditto.
24941 (vint32m1x7_t): Ditto.
24942 (vuint32m1x7_t): Ditto.
24943 (vint32m1x8_t): Ditto.
24944 (vuint32m1x8_t): Ditto.
24945 (vint32m2x2_t): Ditto.
24946 (vuint32m2x2_t): Ditto.
24947 (vint32m2x3_t): Ditto.
24948 (vuint32m2x3_t): Ditto.
24949 (vint32m2x4_t): Ditto.
24950 (vuint32m2x4_t): Ditto.
24951 (vint32m4x2_t): Ditto.
24952 (vuint32m4x2_t): Ditto.
24953 (vint64m1x2_t): Ditto.
24954 (vuint64m1x2_t): Ditto.
24955 (vint64m1x3_t): Ditto.
24956 (vuint64m1x3_t): Ditto.
24957 (vint64m1x4_t): Ditto.
24958 (vuint64m1x4_t): Ditto.
24959 (vint64m1x5_t): Ditto.
24960 (vuint64m1x5_t): Ditto.
24961 (vint64m1x6_t): Ditto.
24962 (vuint64m1x6_t): Ditto.
24963 (vint64m1x7_t): Ditto.
24964 (vuint64m1x7_t): Ditto.
24965 (vint64m1x8_t): Ditto.
24966 (vuint64m1x8_t): Ditto.
24967 (vint64m2x2_t): Ditto.
24968 (vuint64m2x2_t): Ditto.
24969 (vint64m2x3_t): Ditto.
24970 (vuint64m2x3_t): Ditto.
24971 (vint64m2x4_t): Ditto.
24972 (vuint64m2x4_t): Ditto.
24973 (vint64m4x2_t): Ditto.
24974 (vuint64m4x2_t): Ditto.
24975 (vfloat32mf2x2_t): Ditto.
24976 (vfloat32mf2x3_t): Ditto.
24977 (vfloat32mf2x4_t): Ditto.
24978 (vfloat32mf2x5_t): Ditto.
24979 (vfloat32mf2x6_t): Ditto.
24980 (vfloat32mf2x7_t): Ditto.
24981 (vfloat32mf2x8_t): Ditto.
24982 (vfloat32m1x2_t): Ditto.
24983 (vfloat32m1x3_t): Ditto.
24984 (vfloat32m1x4_t): Ditto.
24985 (vfloat32m1x5_t): Ditto.
24986 (vfloat32m1x6_t): Ditto.
24987 (vfloat32m1x7_t): Ditto.
24988 (vfloat32m1x8_t): Ditto.
24989 (vfloat32m2x2_t): Ditto.
24990 (vfloat32m2x3_t): Ditto.
24991 (vfloat32m2x4_t): Ditto.
24992 (vfloat32m4x2_t): Ditto.
24993 (vfloat64m1x2_t): Ditto.
24994 (vfloat64m1x3_t): Ditto.
24995 (vfloat64m1x4_t): Ditto.
24996 (vfloat64m1x5_t): Ditto.
24997 (vfloat64m1x6_t): Ditto.
24998 (vfloat64m1x7_t): Ditto.
24999 (vfloat64m1x8_t): Ditto.
25000 (vfloat64m2x2_t): Ditto.
25001 (vfloat64m2x3_t): Ditto.
25002 (vfloat64m2x4_t): Ditto.
25003 (vfloat64m4x2_t): Ditto.
25004 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_OPS):
25006 (DEF_RVV_TYPE_INDEX): Ditto.
25007 (rvv_arg_type_info::get_tuple_subpart_type): New function.
25008 (DEF_RVV_TUPLE_TYPE): New macro.
25009 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE_INDEX):
25010 Adapt for tuple vget/vset support.
25011 (vint8mf4_t): Ditto.
25012 (vuint8mf4_t): Ditto.
25013 (vint8mf2_t): Ditto.
25014 (vuint8mf2_t): Ditto.
25015 (vint8m1_t): Ditto.
25016 (vuint8m1_t): Ditto.
25017 (vint8m2_t): Ditto.
25018 (vuint8m2_t): Ditto.
25019 (vint8m4_t): Ditto.
25020 (vuint8m4_t): Ditto.
25021 (vint8m8_t): Ditto.
25022 (vuint8m8_t): Ditto.
25023 (vint16mf4_t): Ditto.
25024 (vuint16mf4_t): Ditto.
25025 (vint16mf2_t): Ditto.
25026 (vuint16mf2_t): Ditto.
25027 (vint16m1_t): Ditto.
25028 (vuint16m1_t): Ditto.
25029 (vint16m2_t): Ditto.
25030 (vuint16m2_t): Ditto.
25031 (vint16m4_t): Ditto.
25032 (vuint16m4_t): Ditto.
25033 (vint16m8_t): Ditto.
25034 (vuint16m8_t): Ditto.
25035 (vint32mf2_t): Ditto.
25036 (vuint32mf2_t): Ditto.
25037 (vint32m1_t): Ditto.
25038 (vuint32m1_t): Ditto.
25039 (vint32m2_t): Ditto.
25040 (vuint32m2_t): Ditto.
25041 (vint32m4_t): Ditto.
25042 (vuint32m4_t): Ditto.
25043 (vint32m8_t): Ditto.
25044 (vuint32m8_t): Ditto.
25045 (vint64m1_t): Ditto.
25046 (vuint64m1_t): Ditto.
25047 (vint64m2_t): Ditto.
25048 (vuint64m2_t): Ditto.
25049 (vint64m4_t): Ditto.
25050 (vuint64m4_t): Ditto.
25051 (vint64m8_t): Ditto.
25052 (vuint64m8_t): Ditto.
25053 (vfloat32mf2_t): Ditto.
25054 (vfloat32m1_t): Ditto.
25055 (vfloat32m2_t): Ditto.
25056 (vfloat32m4_t): Ditto.
25057 (vfloat32m8_t): Ditto.
25058 (vfloat64m1_t): Ditto.
25059 (vfloat64m2_t): Ditto.
25060 (vfloat64m4_t): Ditto.
25061 (vfloat64m8_t): Ditto.
25062 (tuple_subpart): Add tuple subpart base type.
25063 * config/riscv/riscv-vector-builtins.h (struct
25064 rvv_arg_type_info): Ditto.
25065 (tuple_type_field): New function.
25067 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
25069 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
25070 (RVV_TUPLE_PARTIAL_MODES): Ditto.
25071 * config/riscv/riscv-protos.h (riscv_v_ext_tuple_mode_p): New
25074 (get_subpart_mode): Ditto.
25075 (get_tuple_mode): Ditto.
25076 (expand_tuple_move): Ditto.
25077 * config/riscv/riscv-v.cc (ENTRY): New macro.
25078 (TUPLE_ENTRY): Ditto.
25079 (get_nf): New function.
25080 (get_subpart_mode): Ditto.
25081 (get_tuple_mode): Ditto.
25082 (expand_tuple_move): Ditto.
25083 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_TYPE):
25085 (register_tuple_type): New function
25086 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TUPLE_TYPE):
25088 (vint8mf8x2_t): New macro.
25089 (vuint8mf8x2_t): Ditto.
25090 (vint8mf8x3_t): Ditto.
25091 (vuint8mf8x3_t): Ditto.
25092 (vint8mf8x4_t): Ditto.
25093 (vuint8mf8x4_t): Ditto.
25094 (vint8mf8x5_t): Ditto.
25095 (vuint8mf8x5_t): Ditto.
25096 (vint8mf8x6_t): Ditto.
25097 (vuint8mf8x6_t): Ditto.
25098 (vint8mf8x7_t): Ditto.
25099 (vuint8mf8x7_t): Ditto.
25100 (vint8mf8x8_t): Ditto.
25101 (vuint8mf8x8_t): Ditto.
25102 (vint8mf4x2_t): Ditto.
25103 (vuint8mf4x2_t): Ditto.
25104 (vint8mf4x3_t): Ditto.
25105 (vuint8mf4x3_t): Ditto.
25106 (vint8mf4x4_t): Ditto.
25107 (vuint8mf4x4_t): Ditto.
25108 (vint8mf4x5_t): Ditto.
25109 (vuint8mf4x5_t): Ditto.
25110 (vint8mf4x6_t): Ditto.
25111 (vuint8mf4x6_t): Ditto.
25112 (vint8mf4x7_t): Ditto.
25113 (vuint8mf4x7_t): Ditto.
25114 (vint8mf4x8_t): Ditto.
25115 (vuint8mf4x8_t): Ditto.
25116 (vint8mf2x2_t): Ditto.
25117 (vuint8mf2x2_t): Ditto.
25118 (vint8mf2x3_t): Ditto.
25119 (vuint8mf2x3_t): Ditto.
25120 (vint8mf2x4_t): Ditto.
25121 (vuint8mf2x4_t): Ditto.
25122 (vint8mf2x5_t): Ditto.
25123 (vuint8mf2x5_t): Ditto.
25124 (vint8mf2x6_t): Ditto.
25125 (vuint8mf2x6_t): Ditto.
25126 (vint8mf2x7_t): Ditto.
25127 (vuint8mf2x7_t): Ditto.
25128 (vint8mf2x8_t): Ditto.
25129 (vuint8mf2x8_t): Ditto.
25130 (vint8m1x2_t): Ditto.
25131 (vuint8m1x2_t): Ditto.
25132 (vint8m1x3_t): Ditto.
25133 (vuint8m1x3_t): Ditto.
25134 (vint8m1x4_t): Ditto.
25135 (vuint8m1x4_t): Ditto.
25136 (vint8m1x5_t): Ditto.
25137 (vuint8m1x5_t): Ditto.
25138 (vint8m1x6_t): Ditto.
25139 (vuint8m1x6_t): Ditto.
25140 (vint8m1x7_t): Ditto.
25141 (vuint8m1x7_t): Ditto.
25142 (vint8m1x8_t): Ditto.
25143 (vuint8m1x8_t): Ditto.
25144 (vint8m2x2_t): Ditto.
25145 (vuint8m2x2_t): Ditto.
25146 (vint8m2x3_t): Ditto.
25147 (vuint8m2x3_t): Ditto.
25148 (vint8m2x4_t): Ditto.
25149 (vuint8m2x4_t): Ditto.
25150 (vint8m4x2_t): Ditto.
25151 (vuint8m4x2_t): Ditto.
25152 (vint16mf4x2_t): Ditto.
25153 (vuint16mf4x2_t): Ditto.
25154 (vint16mf4x3_t): Ditto.
25155 (vuint16mf4x3_t): Ditto.
25156 (vint16mf4x4_t): Ditto.
25157 (vuint16mf4x4_t): Ditto.
25158 (vint16mf4x5_t): Ditto.
25159 (vuint16mf4x5_t): Ditto.
25160 (vint16mf4x6_t): Ditto.
25161 (vuint16mf4x6_t): Ditto.
25162 (vint16mf4x7_t): Ditto.
25163 (vuint16mf4x7_t): Ditto.
25164 (vint16mf4x8_t): Ditto.
25165 (vuint16mf4x8_t): Ditto.
25166 (vint16mf2x2_t): Ditto.
25167 (vuint16mf2x2_t): Ditto.
25168 (vint16mf2x3_t): Ditto.
25169 (vuint16mf2x3_t): Ditto.
25170 (vint16mf2x4_t): Ditto.
25171 (vuint16mf2x4_t): Ditto.
25172 (vint16mf2x5_t): Ditto.
25173 (vuint16mf2x5_t): Ditto.
25174 (vint16mf2x6_t): Ditto.
25175 (vuint16mf2x6_t): Ditto.
25176 (vint16mf2x7_t): Ditto.
25177 (vuint16mf2x7_t): Ditto.
25178 (vint16mf2x8_t): Ditto.
25179 (vuint16mf2x8_t): Ditto.
25180 (vint16m1x2_t): Ditto.
25181 (vuint16m1x2_t): Ditto.
25182 (vint16m1x3_t): Ditto.
25183 (vuint16m1x3_t): Ditto.
25184 (vint16m1x4_t): Ditto.
25185 (vuint16m1x4_t): Ditto.
25186 (vint16m1x5_t): Ditto.
25187 (vuint16m1x5_t): Ditto.
25188 (vint16m1x6_t): Ditto.
25189 (vuint16m1x6_t): Ditto.
25190 (vint16m1x7_t): Ditto.
25191 (vuint16m1x7_t): Ditto.
25192 (vint16m1x8_t): Ditto.
25193 (vuint16m1x8_t): Ditto.
25194 (vint16m2x2_t): Ditto.
25195 (vuint16m2x2_t): Ditto.
25196 (vint16m2x3_t): Ditto.
25197 (vuint16m2x3_t): Ditto.
25198 (vint16m2x4_t): Ditto.
25199 (vuint16m2x4_t): Ditto.
25200 (vint16m4x2_t): Ditto.
25201 (vuint16m4x2_t): Ditto.
25202 (vint32mf2x2_t): Ditto.
25203 (vuint32mf2x2_t): Ditto.
25204 (vint32mf2x3_t): Ditto.
25205 (vuint32mf2x3_t): Ditto.
25206 (vint32mf2x4_t): Ditto.
25207 (vuint32mf2x4_t): Ditto.
25208 (vint32mf2x5_t): Ditto.
25209 (vuint32mf2x5_t): Ditto.
25210 (vint32mf2x6_t): Ditto.
25211 (vuint32mf2x6_t): Ditto.
25212 (vint32mf2x7_t): Ditto.
25213 (vuint32mf2x7_t): Ditto.
25214 (vint32mf2x8_t): Ditto.
25215 (vuint32mf2x8_t): Ditto.
25216 (vint32m1x2_t): Ditto.
25217 (vuint32m1x2_t): Ditto.
25218 (vint32m1x3_t): Ditto.
25219 (vuint32m1x3_t): Ditto.
25220 (vint32m1x4_t): Ditto.
25221 (vuint32m1x4_t): Ditto.
25222 (vint32m1x5_t): Ditto.
25223 (vuint32m1x5_t): Ditto.
25224 (vint32m1x6_t): Ditto.
25225 (vuint32m1x6_t): Ditto.
25226 (vint32m1x7_t): Ditto.
25227 (vuint32m1x7_t): Ditto.
25228 (vint32m1x8_t): Ditto.
25229 (vuint32m1x8_t): Ditto.
25230 (vint32m2x2_t): Ditto.
25231 (vuint32m2x2_t): Ditto.
25232 (vint32m2x3_t): Ditto.
25233 (vuint32m2x3_t): Ditto.
25234 (vint32m2x4_t): Ditto.
25235 (vuint32m2x4_t): Ditto.
25236 (vint32m4x2_t): Ditto.
25237 (vuint32m4x2_t): Ditto.
25238 (vint64m1x2_t): Ditto.
25239 (vuint64m1x2_t): Ditto.
25240 (vint64m1x3_t): Ditto.
25241 (vuint64m1x3_t): Ditto.
25242 (vint64m1x4_t): Ditto.
25243 (vuint64m1x4_t): Ditto.
25244 (vint64m1x5_t): Ditto.
25245 (vuint64m1x5_t): Ditto.
25246 (vint64m1x6_t): Ditto.
25247 (vuint64m1x6_t): Ditto.
25248 (vint64m1x7_t): Ditto.
25249 (vuint64m1x7_t): Ditto.
25250 (vint64m1x8_t): Ditto.
25251 (vuint64m1x8_t): Ditto.
25252 (vint64m2x2_t): Ditto.
25253 (vuint64m2x2_t): Ditto.
25254 (vint64m2x3_t): Ditto.
25255 (vuint64m2x3_t): Ditto.
25256 (vint64m2x4_t): Ditto.
25257 (vuint64m2x4_t): Ditto.
25258 (vint64m4x2_t): Ditto.
25259 (vuint64m4x2_t): Ditto.
25260 (vfloat32mf2x2_t): Ditto.
25261 (vfloat32mf2x3_t): Ditto.
25262 (vfloat32mf2x4_t): Ditto.
25263 (vfloat32mf2x5_t): Ditto.
25264 (vfloat32mf2x6_t): Ditto.
25265 (vfloat32mf2x7_t): Ditto.
25266 (vfloat32mf2x8_t): Ditto.
25267 (vfloat32m1x2_t): Ditto.
25268 (vfloat32m1x3_t): Ditto.
25269 (vfloat32m1x4_t): Ditto.
25270 (vfloat32m1x5_t): Ditto.
25271 (vfloat32m1x6_t): Ditto.
25272 (vfloat32m1x7_t): Ditto.
25273 (vfloat32m1x8_t): Ditto.
25274 (vfloat32m2x2_t): Ditto.
25275 (vfloat32m2x3_t): Ditto.
25276 (vfloat32m2x4_t): Ditto.
25277 (vfloat32m4x2_t): Ditto.
25278 (vfloat64m1x2_t): Ditto.
25279 (vfloat64m1x3_t): Ditto.
25280 (vfloat64m1x4_t): Ditto.
25281 (vfloat64m1x5_t): Ditto.
25282 (vfloat64m1x6_t): Ditto.
25283 (vfloat64m1x7_t): Ditto.
25284 (vfloat64m1x8_t): Ditto.
25285 (vfloat64m2x2_t): Ditto.
25286 (vfloat64m2x3_t): Ditto.
25287 (vfloat64m2x4_t): Ditto.
25288 (vfloat64m4x2_t): Ditto.
25289 * config/riscv/riscv-vector-builtins.h (DEF_RVV_TUPLE_TYPE):
25291 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
25292 * config/riscv/riscv.cc (riscv_v_ext_tuple_mode_p): New
25294 (TUPLE_ENTRY): Ditto.
25295 (riscv_v_ext_mode_p): New function.
25296 (riscv_v_adjust_nunits): Add tuple mode adjustment.
25297 (riscv_classify_address): Ditto.
25298 (riscv_binary_cost): Ditto.
25299 (riscv_rtx_costs): Ditto.
25300 (riscv_secondary_memory_needed): Ditto.
25301 (riscv_hard_regno_nregs): Ditto.
25302 (riscv_hard_regno_mode_ok): Ditto.
25303 (riscv_vector_mode_supported_p): Ditto.
25304 (riscv_regmode_natural_size): Ditto.
25305 (riscv_array_mode): New function.
25306 (TARGET_ARRAY_MODE): New target hook.
25307 * config/riscv/riscv.md: Add tuple modes.
25308 * config/riscv/vector-iterators.md: Ditto.
25309 * config/riscv/vector.md (mov<mode>): Add tuple modes data
25311 (*mov<VT:mode>_<P:mode>): Ditto.
25313 2023-05-03 Richard Biener <rguenther@suse.de>
25315 * cse.cc (cse_insn): Track an equivalence to the destination
25316 separately and delay using src_related for it.
25318 2023-05-03 Richard Biener <rguenther@suse.de>
25320 * cse.cc (HASH): Turn into inline function and mix
25321 in another HASH_SHIFT bits.
25322 (SAFE_HASH): Likewise.
25324 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25327 * config/aarch64/aarch64-simd.md (aarch64_<sur>h<addsub><mode>): Rename to...
25328 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): ... This.
25330 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25333 * config/aarch64/aarch64-simd.md (add<mode>3): Rename to...
25334 (add<mode>3<vczle><vczbe>): ... This.
25335 (sub<mode>3): Rename to...
25336 (sub<mode>3<vczle><vczbe>): ... This.
25337 (mul<mode>3): Rename to...
25338 (mul<mode>3<vczle><vczbe>): ... This.
25339 (*div<mode>3): Rename to...
25340 (*div<mode>3<vczle><vczbe>): ... This.
25341 (neg<mode>2): Rename to...
25342 (neg<mode>2<vczle><vczbe>): ... This.
25343 (abs<mode>2): Rename to...
25344 (abs<mode>2<vczle><vczbe>): ... This.
25345 (<frint_pattern><mode>2): Rename to...
25346 (<frint_pattern><mode>2<vczle><vczbe>): ... This.
25347 (<fmaxmin><mode>3): Rename to...
25348 (<fmaxmin><mode>3<vczle><vczbe>): ... This.
25349 (*sqrt<mode>2): Rename to...
25350 (*sqrt<mode>2<vczle><vczbe>): ... This.
25352 2023-05-03 Kito Cheng <kito.cheng@sifive.com>
25354 * doc/md.texi (RISC-V): Add vr, vm, vd constarint.
25356 2023-05-03 Martin Liska <mliska@suse.cz>
25358 PR tree-optimization/109693
25359 * value-range-storage.cc (vrange_allocator::vrange_allocator):
25360 Remove unused field.
25361 * value-range-storage.h: Likewise.
25363 2023-05-02 Andrew Pinski <apinski@marvell.com>
25365 * tree-ssa-phiopt.cc (move_stmt): New function.
25366 (match_simplify_replacement): Use move_stmt instead
25367 of the inlined version.
25369 2023-05-02 Andrew Pinski <apinski@marvell.com>
25371 * match.pd (a != 0 ? CLRSB(a) : CST -> CLRSB(a)): New
25374 2023-05-02 Andrew Pinski <apinski@marvell.com>
25376 PR tree-optimization/109702
25377 * match.pd: Fix "a != 0 ? FUNC(a) : CST" patterns
25378 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
25380 2023-05-02 Andrew Pinski <apinski@marvell.com>
25383 * config/aarch64/aarch64.md (*cmov<mode>_insn_m1): New
25384 insn_and_split pattern.
25386 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
25388 * config/riscv/sync.md (atomic_load<mode>): Implement atomic
25391 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
25393 * config/riscv/sync.md (mem_thread_fence_1): Change fence
25394 depending on the given memory model.
25396 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
25398 * config/riscv/riscv-protos.h (riscv_union_memmodels): Expose
25399 riscv_union_memmodels function to sync.md.
25400 * config/riscv/riscv.cc (riscv_union_memmodels): Add function to
25401 get the union of two memmodels in sync.md.
25402 (riscv_print_operand): Add %I and %J flags that output the
25403 optimal LR/SC flag bits for a given memory model.
25404 * config/riscv/sync.md: Remove static .aqrl bits on LR op/.rl
25405 bits on SC op and replace with optimized %I, %J flags.
25407 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
25409 * config/riscv/riscv.cc
25410 (riscv_memmodel_needs_amo_release): Change function name.
25411 (riscv_print_operand): Remove unneeded %F case.
25412 * config/riscv/sync.md: Remove unneeded fences.
25414 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
25417 * config/riscv/sync.md (atomic_store<mode>): Use simple store
25418 instruction in combination with fence(s).
25420 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
25422 * config/riscv/riscv.cc (riscv_print_operand): Change behavior
25423 of %A to include release bits.
25425 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
25427 * config/riscv/sync.md (atomic_cas_value_strong<mode>): Change
25428 FENCE/LR.aq/SC.aq into sequentially consistent LR.aqrl/SC.rl
25431 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
25433 * config/riscv/sync.md: Change LR.aq/SC.rl pairs into
25434 sequentially consistent LR.aqrl/SC.rl pairs.
25436 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
25438 * config/riscv/riscv.cc: Remove MEMMODEL_SYNC_* cases and
25439 sanitize memmodel input with memmodel_base.
25441 2023-05-02 Yanzhang Wang <yanzhang.wang@intel.com>
25442 Pan Li <pan2.li@intel.com>
25445 * config/riscv/vector-iterators.md: Support VNx2HI and VNX4DI when MIN_VLEN >= 128.
25447 2023-05-02 Romain Naour <romain.naour@gmail.com>
25449 * config/riscv/genrvv-type-indexer.cc: Use log2 from the C header, without
25452 2023-05-02 Martin Liska <mliska@suse.cz>
25454 * doc/invoke.texi: Update documentation based on param.opt file.
25456 2023-05-02 Richard Biener <rguenther@suse.de>
25458 PR tree-optimization/109672
25459 * tree-vect-stmts.cc (vectorizable_operation): For plus,
25460 minus and negate always check the vector mode is word mode.
25462 2023-05-01 Andrew Pinski <apinski@marvell.com>
25464 * tree-ssa-phiopt.cc: Update comment about
25465 how the transformation are implemented.
25467 2023-05-01 Jeff Law <jlaw@ventanamicro>
25469 * config/stormy16/stormy16.cc (TARGET_LRA_P): Remove defintion.
25471 2023-05-01 Jeff Law <jlaw@ventanamicro>
25473 * config/cris/cris.cc (TARGET_LRA_P): Remove.
25474 * config/epiphany/epiphany.cc (TARGET_LRA_P): Remove.
25475 * config/iq2000/iq2000.cc (TARGET_LRA_P): Remove.
25476 * config/m32r/m32r.cc (TARGET_LRA_P): Remove.
25477 * config/microblaze/microblaze.cc (TARGET_LRA_P): Remove.
25478 * config/mmix/mmix.cc (TARGET_LRA_P): Remove.
25480 2023-05-01 Rasmus Villemoes <rasmus.villemoes@prevas.dk>
25482 * print-tree.h (PRINT_DECL_REMAP_DEBUG): New flag.
25483 * print-tree.cc (print_decl_identifier): Implement it.
25484 * toplev.cc (output_stack_usage_1): Use it.
25486 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
25488 * value-range.h (class int_range): Remove gt_ggc_mx and gt_pch_nx
25491 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
25493 * value-range.h (irange::set_nonzero): Inline.
25495 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
25497 * gimple-range-op.cc (cfn_ffs::fold_range): Use the correct
25499 * gimple-ssa-warn-alloca.cc (alloca_call_type): Use <2> for
25500 invalid_range, as it is an inverse range.
25501 * tree-vrp.cc (find_case_label_range): Avoid trees.
25502 * value-range.cc (irange::irange_set): Delete.
25503 (irange::irange_set_1bit_anti_range): Delete.
25504 (irange::irange_set_anti_range): Delete.
25505 (irange::set): Cleanup.
25506 * value-range.h (class irange): Remove irange_set,
25507 irange_set_anti_range, irange_set_1bit_anti_range.
25508 (irange::set_undefined): Remove set to m_type.
25510 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
25512 * range-op.cc (update_known_bitmask): Adjust for irange containing
25513 wide_ints internally.
25514 * tree-ssanames.cc (set_nonzero_bits): Same.
25515 * tree-ssanames.h (set_nonzero_bits): Same.
25516 * value-range-storage.cc (irange_storage::set_irange): Same.
25517 (irange_storage::get_irange): Same.
25518 * value-range.cc (irange::operator=): Same.
25519 (irange::irange_set): Same.
25520 (irange::irange_set_1bit_anti_range): Same.
25521 (irange::irange_set_anti_range): Same.
25522 (irange::set): Same.
25523 (irange::verify_range): Same.
25524 (irange::contains_p): Same.
25525 (irange::irange_single_pair_union): Same.
25526 (irange::union_): Same.
25527 (irange::irange_contains_p): Same.
25528 (irange::intersect): Same.
25529 (irange::invert): Same.
25530 (irange::set_range_from_nonzero_bits): Same.
25531 (irange::set_nonzero_bits): Same.
25532 (mask_to_wi): Same.
25533 (irange::intersect_nonzero_bits): Same.
25534 (irange::union_nonzero_bits): Same.
25537 (tree_range): Same.
25538 (range_tests_strict_enum): Same.
25539 (range_tests_misc): Same.
25540 (range_tests_nonzero_bits): Same.
25541 * value-range.h (irange::type): Same.
25542 (irange::varying_compatible_p): Same.
25543 (irange::irange): Same.
25544 (int_range::int_range): Same.
25545 (irange::set_undefined): Same.
25546 (irange::set_varying): Same.
25547 (irange::lower_bound): Same.
25548 (irange::upper_bound): Same.
25550 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
25552 * gimple-range-fold.cc (tree_lower_bound): Delete.
25553 (tree_upper_bound): Delete.
25554 (vrp_val_max): Delete.
25555 (vrp_val_min): Delete.
25556 (fold_using_range::range_of_ssa_name_with_loop_info): Call
25557 range_of_var_in_loop.
25558 * vr-values.cc (valid_value_p): Delete.
25559 (fix_overflow): Delete.
25560 (get_scev_info): New.
25561 (bounds_of_var_in_loop): Refactor into...
25562 (induction_variable_may_overflow_p): ...this,
25563 (range_from_loop_direction): ...and this,
25564 (range_of_var_in_loop): ...and this.
25565 * vr-values.h (bounds_of_var_in_loop): Delete.
25566 (range_of_var_in_loop): New.
25568 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
25570 * gimple-range-fold.cc (adjust_pointer_diff_expr): Rewrite with
25572 (vrp_val_max): New.
25573 (vrp_val_min): New.
25574 * gimple-range-op.cc (cfn_strlen::fold_range): Use irange_val_*.
25575 * range-op.cc (max_limit): Same.
25577 (plus_minus_ranges): Same.
25578 (operator_rshift::op1_range): Same.
25579 (operator_cast::inside_domain_p): Same.
25580 * value-range.cc (vrp_val_is_max): Delete.
25581 (vrp_val_is_min): Delete.
25582 (range_tests_misc): Use irange_val_*.
25583 * value-range.h (vrp_val_is_min): Delete.
25584 (vrp_val_is_max): Delete.
25585 (vrp_val_max): Delete.
25586 (irange_val_min): New.
25587 (vrp_val_min): Delete.
25588 (irange_val_max): New.
25589 * vr-values.cc (check_for_binary_op_overflow): Use irange_val_*.
25591 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
25593 * fold-const.cc (expr_not_equal_to): Convert to irange wide_int API.
25594 * gimple-fold.cc (size_must_be_zero_p): Same.
25595 * gimple-loop-versioning.cc
25596 (loop_versioning::prune_loop_conditions): Same.
25597 * gimple-range-edge.cc (gcond_edge_range): Same.
25598 (gimple_outgoing_range::calc_switch_ranges): Same.
25599 * gimple-range-fold.cc (adjust_imagpart_expr): Same.
25600 (adjust_realpart_expr): Same.
25601 (fold_using_range::range_of_address): Same.
25602 (fold_using_range::relation_fold_and_or): Same.
25603 * gimple-range-gori.cc (gori_compute::gori_compute): Same.
25604 (range_is_either_true_or_false): Same.
25605 * gimple-range-op.cc (cfn_toupper_tolower::get_letter_range): Same.
25606 (cfn_clz::fold_range): Same.
25607 (cfn_ctz::fold_range): Same.
25608 * gimple-range-tests.cc (class test_expr_eval): Same.
25609 * gimple-ssa-warn-alloca.cc (alloca_call_type): Same.
25610 * ipa-cp.cc (ipa_value_range_from_jfunc): Same.
25611 (propagate_vr_across_jump_function): Same.
25612 (decide_whether_version_node): Same.
25613 * ipa-prop.cc (ipa_get_value_range): Same.
25614 * ipa-prop.h (ipa_range_set_and_normalize): Same.
25615 * range-op.cc (get_shift_range): Same.
25616 (value_range_from_overflowed_bounds): Same.
25617 (value_range_with_overflow): Same.
25618 (create_possibly_reversed_range): Same.
25619 (equal_op1_op2_relation): Same.
25620 (not_equal_op1_op2_relation): Same.
25621 (lt_op1_op2_relation): Same.
25622 (le_op1_op2_relation): Same.
25623 (gt_op1_op2_relation): Same.
25624 (ge_op1_op2_relation): Same.
25625 (operator_mult::op1_range): Same.
25626 (operator_exact_divide::op1_range): Same.
25627 (operator_lshift::op1_range): Same.
25628 (operator_rshift::op1_range): Same.
25629 (operator_cast::op1_range): Same.
25630 (operator_logical_and::fold_range): Same.
25631 (set_nonzero_range_from_mask): Same.
25632 (operator_bitwise_or::op1_range): Same.
25633 (operator_bitwise_xor::op1_range): Same.
25634 (operator_addr_expr::fold_range): Same.
25635 (pointer_plus_operator::wi_fold): Same.
25636 (pointer_or_operator::op1_range): Same.
25643 (range_op_cast_tests): Same.
25644 (range_op_lshift_tests): Same.
25645 (range_op_rshift_tests): Same.
25646 (range_op_bitwise_and_tests): Same.
25647 (range_relational_tests): Same.
25648 * range.cc (range_zero): Same.
25649 (range_nonzero): Same.
25650 * range.h (range_true): Same.
25651 (range_false): Same.
25652 (range_true_and_false): Same.
25653 * tree-data-ref.cc (split_constant_offset_1): Same.
25654 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Same.
25655 * tree-ssa-loop-unswitch.cc (struct unswitch_predicate): Same.
25656 (find_unswitching_predicates_for_bb): Same.
25657 * tree-ssa-phiopt.cc (value_replacement): Same.
25658 * tree-ssa-threadbackward.cc
25659 (back_threader::find_taken_edge_cond): Same.
25660 * tree-ssanames.cc (ssa_name_has_boolean_range): Same.
25661 * tree-vrp.cc (find_case_label_range): Same.
25662 * value-query.cc (range_query::get_tree_range): Same.
25663 * value-range.cc (irange::set_nonnegative): Same.
25664 (frange::contains_p): Same.
25665 (frange::singleton_p): Same.
25666 (frange::internal_singleton_p): Same.
25667 (irange::irange_set): Same.
25668 (irange::irange_set_1bit_anti_range): Same.
25669 (irange::irange_set_anti_range): Same.
25670 (irange::set): Same.
25671 (irange::operator==): Same.
25672 (irange::singleton_p): Same.
25673 (irange::contains_p): Same.
25674 (irange::set_range_from_nonzero_bits): Same.
25675 (DEFINE_INT_RANGE_INSTANCE): Same.
25685 (range_uint128): New.
25686 (range_uchar): New.
25688 (build_range3): Convert to irange wide_int API.
25689 (range_tests_irange3): Same.
25690 (range_tests_int_range_max): Same.
25691 (range_tests_strict_enum): Same.
25692 (range_tests_misc): Same.
25693 (range_tests_nonzero_bits): Same.
25694 (range_tests_nan): Same.
25695 (range_tests_signed_zeros): Same.
25696 * value-range.h (Value_Range::Value_Range): Same.
25697 (irange::set): Same.
25698 (irange::nonzero_p): Same.
25699 (irange::contains_p): Same.
25700 (range_includes_zero_p): Same.
25701 (irange::set_nonzero): Same.
25702 (irange::set_zero): Same.
25703 (contains_zero_p): Same.
25704 (frange::contains_p): Same.
25706 (simplify_using_ranges::op_with_boolean_value_range_p): Same.
25707 (bounds_of_var_in_loop): Same.
25708 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
25710 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
25712 * value-range.cc (irange::irange_union): Rename to...
25713 (irange::union_): ...this.
25714 (irange::irange_intersect): Rename to...
25715 (irange::intersect): ...this.
25716 * value-range.h (irange::union_): Delete.
25717 (irange::intersect): Delete.
25719 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
25721 * vr-values.cc (bounds_of_var_in_loop): Convert to irange API.
25723 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
25725 * vr-values.cc (check_for_binary_op_overflow): Tidy up by using
25727 (compare_ranges): Delete.
25728 (compare_range_with_value): Delete.
25729 (bounds_of_var_in_loop): Tidy up by using ranger API.
25730 (simplify_using_ranges::fold_cond_with_ops): Cleanup and rename
25731 from vrp_evaluate_conditional_warnv_with_ops_using_ranges.
25732 (simplify_using_ranges::legacy_fold_cond_overflow): Remove
25733 strict_overflow_p and only_ranges.
25734 (simplify_using_ranges::legacy_fold_cond): Adjust call to
25735 legacy_fold_cond_overflow.
25736 (simplify_using_ranges::simplify_abs_using_ranges): Adjust for
25738 (range_fits_type_p): Rename value_range to irange.
25739 * vr-values.h (range_fits_type_p): Adjust prototype.
25741 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
25743 * value-range.cc (irange::irange_set_anti_range): Remove uses of
25744 tree_lower_bound and tree_upper_bound.
25745 (irange::verify_range): Same.
25746 (irange::operator==): Same.
25747 (irange::singleton_p): Same.
25748 * value-range.h (irange::tree_lower_bound): Delete.
25749 (irange::tree_upper_bound): Delete.
25750 (irange::lower_bound): Delete.
25751 (irange::upper_bound): Delete.
25752 (irange::zero_p): Remove uses of tree_lower_bound and
25755 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
25757 * tree-ssa-loop-niter.cc (refine_value_range_using_guard): Remove
25759 (determine_value_range): Same.
25760 (record_nonwrapping_iv): Same.
25761 (infer_loop_bounds_from_signedness): Same.
25762 (scev_var_range_cant_overflow): Same.
25763 * tree-vrp.cc (operand_less_p): Delete.
25764 * tree-vrp.h (operand_less_p): Delete.
25765 * value-range.cc (get_legacy_range): Remove uses of deprecated API.
25766 (irange::value_inside_range): Delete.
25767 * value-range.h (vrange::kind): Delete.
25768 (irange::num_pairs): Remove check of m_kind.
25769 (irange::min): Delete.
25770 (irange::max): Delete.
25772 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
25774 * gimple-fold.cc (maybe_fold_comparisons_from_match_pd): Adjust
25775 for vrange_storage.
25776 * gimple-range-cache.cc (sbr_vector::sbr_vector): Same.
25777 (sbr_vector::grow): Same.
25778 (sbr_vector::set_bb_range): Same.
25779 (sbr_vector::get_bb_range): Same.
25780 (sbr_sparse_bitmap::sbr_sparse_bitmap): Same.
25781 (sbr_sparse_bitmap::set_bb_range): Same.
25782 (sbr_sparse_bitmap::get_bb_range): Same.
25783 (block_range_cache::block_range_cache): Same.
25784 (ssa_global_cache::ssa_global_cache): Same.
25785 (ssa_global_cache::get_global_range): Same.
25786 (ssa_global_cache::set_global_range): Same.
25787 * gimple-range-cache.h: Same.
25788 * gimple-range-edge.cc
25789 (gimple_outgoing_range::gimple_outgoing_range): Same.
25790 (gimple_outgoing_range::switch_edge_range): Same.
25791 (gimple_outgoing_range::calc_switch_ranges): Same.
25792 * gimple-range-edge.h: Same.
25793 * gimple-range-infer.cc
25794 (infer_range_manager::infer_range_manager): Same.
25795 (infer_range_manager::get_nonzero): Same.
25796 (infer_range_manager::maybe_adjust_range): Same.
25797 (infer_range_manager::add_range): Same.
25798 * gimple-range-infer.h: Rename obstack_vrange_allocator to
25800 * tree-core.h (struct irange_storage_slot): Remove.
25801 (struct tree_ssa_name): Remove irange_info and frange_info. Make
25802 range_info a pointer to vrange_storage.
25803 * tree-ssanames.cc (range_info_fits_p): Adjust for vrange_storage.
25804 (range_info_alloc): Same.
25805 (range_info_free): Same.
25806 (range_info_get_range): Same.
25807 (range_info_set_range): Same.
25808 (get_nonzero_bits): Same.
25809 * value-query.cc (get_ssa_name_range_info): Same.
25810 * value-range-storage.cc (class vrange_internal_alloc): New.
25811 (class vrange_obstack_alloc): New.
25812 (class vrange_ggc_alloc): New.
25813 (vrange_allocator::vrange_allocator): New.
25814 (vrange_allocator::~vrange_allocator): New.
25815 (vrange_storage::alloc_slot): New.
25816 (vrange_allocator::alloc): New.
25817 (vrange_allocator::free): New.
25818 (vrange_allocator::clone): New.
25819 (vrange_allocator::clone_varying): New.
25820 (vrange_allocator::clone_undefined): New.
25821 (vrange_storage::alloc): New.
25822 (vrange_storage::set_vrange): Remove slot argument.
25823 (vrange_storage::get_vrange): Same.
25824 (vrange_storage::fits_p): Same.
25825 (vrange_storage::equal_p): New.
25826 (irange_storage::write_lengths_address): New.
25827 (irange_storage::lengths_address): New.
25828 (irange_storage_slot::alloc_slot): Remove.
25829 (irange_storage::alloc): New.
25830 (irange_storage_slot::irange_storage_slot): Remove.
25831 (irange_storage::irange_storage): New.
25832 (write_wide_int): New.
25833 (irange_storage_slot::set_irange): Remove.
25834 (irange_storage::set_irange): New.
25835 (read_wide_int): New.
25836 (irange_storage_slot::get_irange): Remove.
25837 (irange_storage::get_irange): New.
25838 (irange_storage_slot::size): Remove.
25839 (irange_storage::equal_p): New.
25840 (irange_storage_slot::num_wide_ints_needed): Remove.
25841 (irange_storage::size): New.
25842 (irange_storage_slot::fits_p): Remove.
25843 (irange_storage::fits_p): New.
25844 (irange_storage_slot::dump): Remove.
25845 (irange_storage::dump): New.
25846 (frange_storage_slot::alloc_slot): Remove.
25847 (frange_storage::alloc): New.
25848 (frange_storage_slot::set_frange): Remove.
25849 (frange_storage::set_frange): New.
25850 (frange_storage_slot::get_frange): Remove.
25851 (frange_storage::get_frange): New.
25852 (frange_storage_slot::fits_p): Remove.
25853 (frange_storage::equal_p): New.
25854 (frange_storage::fits_p): New.
25855 (ggc_vrange_allocator): New.
25856 (ggc_alloc_vrange_storage): New.
25857 * value-range-storage.h (class vrange_storage): Rewrite.
25858 (class irange_storage): Rewrite.
25859 (class frange_storage): Rewrite.
25860 (class obstack_vrange_allocator): Remove.
25861 (class ggc_vrange_allocator): Remove.
25862 (vrange_allocator::alloc_vrange): Remove.
25863 (vrange_allocator::alloc_irange): Remove.
25864 (vrange_allocator::alloc_frange): Remove.
25865 (ggc_alloc_vrange_storage): New.
25866 * value-range.h (class irange): Rename vrange_allocator to
25868 (class frange): Same.
25870 2023-04-30 Roger Sayle <roger@nextmovesoftware.com>
25872 * config/stormy16/stormy16.md (neghi2): Rewrite pattern using
25873 inc to avoid clobbering the carry flag.
25875 2023-04-30 Andrew Pinski <apinski@marvell.com>
25877 * match.pd: Add patterns for "a != 0 ? FUNC(a) : CST"
25878 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
25880 2023-04-30 Andrew Pinski <apinski@marvell.com>
25882 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
25883 Allow some builtin/internal function calls which
25884 are known not to trap/throw.
25885 (phiopt_worker::match_simplify_replacement):
25886 Use name instead of getting the lhs again.
25888 2023-04-30 Joakim Nohlgård <joakim@nohlgard.se>
25890 * configure: Regenerate.
25891 * configure.ac: Use ld -r in the check for HAVE_LD_RO_RW_SECTION_MIXING
25893 2023-04-29 Hans-Peter Nilsson <hp@axis.com>
25895 * reload1.cc (emit_insn_if_valid_for_reload_1): Rename from
25896 emit_insn_if_valid_for_reload.
25897 (emit_insn_if_valid_for_reload): Call new helper, and if a SET fails
25898 to be recognized, also try emitting a parallel that clobbers
25899 TARGET_FLAGS_REGNUM, as applicable.
25901 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
25903 * config/stormy16/stormy16.md (neghi2): Convert from a define_expand
25905 (*rotatehi_1): New define_insn for efficient 2 insn sequence.
25906 (*rotatehi_8, *rotaterthi_8): New define_insn to emit a swpb.
25908 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
25910 * config/stormy16/stormy16.md (any_lshift): New code iterator.
25911 (any_or_plus): Likewise.
25912 (any_rotate): Likewise.
25913 (*<any_lshift>_and_internal): New define_insn_and_split to
25914 recognize a logical shift followed by an AND, and split it
25915 again after reload.
25916 (*swpn): New define_insn matching xstormy16's swpn.
25917 (*swpn_zext): New define_insn recognizing swpn followed by
25918 zero_extendqihi2, i.e. with the high byte set to zero.
25919 (*swpn_sext): Likewise, for swpn followed by cbw.
25920 (*swpn_sext_2): Likewise, for an alternate RTL form.
25921 (*swpn_zext_ior): A pre-reload splitter so that an swpn+zext+ior
25922 sequence is split in the correct place to recognize the *swpn_zext
25923 followed by any_or_plus (ior, xor or plus) instruction.
25925 2023-04-29 Mikael Pettersson <mikpelinux@gmail.com>
25928 * config.gcc (vax-*-linux*): Add glibc-stdint.h.
25929 (lm32-*-uclinux*): Likewise.
25931 2023-04-29 Fei Gao <gaofei@eswincomputing.com>
25933 * config/riscv/riscv.cc (riscv_avoid_save_libcall): helper function
25934 for riscv_use_save_libcall.
25935 (riscv_use_save_libcall): call riscv_avoid_save_libcall.
25936 (riscv_compute_frame_info): restructure to decouple stack allocation
25937 for rv32e w/o save-restore.
25939 2023-04-28 Eugene Rozenfeld <erozen@microsoft.com>
25941 * doc/install.texi: Fix documentation typo
25943 2023-04-28 Matevos Mehrabyan <matevosmehrabyan@gmail.com>
25945 * config/riscv/iterators.md (only_div, paired_mod): New iterators.
25946 (u): Add div/udiv cases.
25947 * config/riscv/riscv-protos.h (riscv_use_divmod_expander): Prototype.
25948 * config/riscv/riscv.cc (struct riscv_tune_param): Add field for
25950 (rocket_tune_info, sifive_7_tune_info): Initialize new field.
25951 (thead_c906_tune_info): Likewise.
25952 (optimize_size_tune_info): Likewise.
25953 (riscv_use_divmod_expander): New function.
25954 * config/riscv/riscv.md (<u>divmod<mode>4): New expander.
25956 2023-04-28 Karen Sargsyan <karen1999411@gmail.com>
25958 * config/riscv/bitmanip.md: Added clmulr instruction.
25959 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
25960 * config/riscv/riscv.md: (UNSPEC_CLMULR): Add new unspec type.
25962 * config/riscv/riscv-cmo.def: Added built-in function for clmulr.
25963 * config/riscv/crypto.md: Move clmul[h] instructions to bitmanip.md.
25964 * config/riscv/riscv-scalar-crypto.def: Move clmul[h] built-in
25965 functions to riscv-cmo.def.
25966 * config/riscv/generic.md: Add clmul to list of instructions
25967 using the generic_imul reservation.
25969 2023-04-28 Jivan Hakobyan <jivanhakobyan9@gmail.com>
25971 * config/riscv/bitmanip.md: Added expanders for minu/maxu instructions
25973 2023-04-28 Andrew Pinski <apinski@marvell.com>
25975 PR tree-optimization/100958
25976 * tree-ssa-phiopt.cc (two_value_replacement): Remove.
25977 (pass_phiopt::execute): Don't call two_value_replacement.
25978 * match.pd (a !=/== CST1 ? CST2 : CST3): Add pattern to
25979 handle what two_value_replacement did.
25981 2023-04-28 Andrew Pinski <apinski@marvell.com>
25983 * match.pd: Add patterns for
25984 "(A CMP B) ? MIN/MAX<A, C> : MIN/MAX <B, C>".
25986 2023-04-28 Andrew Pinski <apinski@marvell.com>
25988 * match.pd: Factor out the deciding the min/max from
25989 the "(cond (cmp (convert1? x) c1) (convert2? x) c2)"
25991 * fold-const.cc (minmax_from_comparison): this new function.
25992 * fold-const.h (minmax_from_comparison): New prototype.
25994 2023-04-28 Roger Sayle <roger@nextmovesoftware.com>
25996 PR rtl-optimization/109476
25997 * lower-subreg.cc: Include explow.h for force_reg.
25998 (find_decomposable_shift_zext): Pass an additional SPEED_P argument.
25999 If decomposing a suitable LSHIFTRT and we're not splitting
26000 ZERO_EXTEND (based on the current SPEED_P), then use a ZERO_EXTEND
26001 instead of setting a high part SUBREG to zero, which helps combine.
26002 (decompose_multiword_subregs): Update call to resolve_shift_zext.
26004 2023-04-28 Richard Biener <rguenther@suse.de>
26006 * tree-vect-data-refs.cc (vect_analyze_data_refs): Always
26008 * tree-vect-stmts.cc (vect_model_store_cost): Pass in the
26009 gather-scatter info and cost emulated scatters accordingly.
26010 (get_load_store_type): Support emulated scatters.
26011 (vectorizable_store): Likewise. Emulate them by extracting
26012 scalar offsets and data, doing scalar stores.
26014 2023-04-28 Richard Biener <rguenther@suse.de>
26016 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
26017 Tame down element extracts and scalar loads for gather/scatter
26018 similar to elementwise strided accesses.
26020 2023-04-28 Pan Li <pan2.li@intel.com>
26021 kito-cheng <kito.cheng@sifive.com>
26023 * config/riscv/vector.md: Add new define split to perform
26024 the simplification.
26026 2023-04-28 Richard Biener <rguenther@suse.de>
26029 * ipa-param-manipulation.cc
26030 (ipa_param_body_adjustments::modify_expression): Allow
26031 conversion of a register to a non-register type. Elide
26032 conversions inside BIT_FIELD_REFs.
26034 2023-04-28 Richard Biener <rguenther@suse.de>
26036 PR tree-optimization/109644
26037 * tree-cfg.cc (verify_types_in_gimple_reference): Check
26038 register constraints on the outermost VIEW_CONVERT_EXPR
26039 only. Do not allow register or invariant bases on
26040 multi-level or possibly variable index handled components.
26042 2023-04-28 Richard Biener <rguenther@suse.de>
26044 * gimplify.cc (gimplify_compound_lval): When there's a
26045 non-register type produced by one of the handled component
26046 operations make sure we get a non-register base.
26048 2023-04-28 Richard Biener <rguenther@suse.de>
26050 PR tree-optimization/108752
26051 * tree-vect-generic.cc (build_replicated_const): Rename
26052 to build_replicated_int_cst and move to tree.{h,cc}.
26053 (do_plus_minus): Adjust.
26054 (do_negate): Likewise.
26055 * tree-vect-stmts.cc (vectorizable_operation): Emit emulated
26056 arithmetic vector operations in lowered form.
26057 * tree.h (build_replicated_int_cst): Declare.
26058 * tree.cc (build_replicated_int_cst): Moved from
26059 tree-vect-generic.cc build_replicated_const.
26061 2023-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26064 * config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): Rename to...
26065 (aarch64_rbit<mode><vczle><vczbe>): ... This.
26066 (neg<mode>2): Rename to...
26067 (neg<mode>2<vczle><vczbe>): ... This.
26068 (abs<mode>2): Rename to...
26069 (abs<mode>2<vczle><vczbe>): ... This.
26070 (aarch64_abs<mode>): Rename to...
26071 (aarch64_abs<mode><vczle><vczbe>): ... This.
26072 (one_cmpl<mode>2): Rename to...
26073 (one_cmpl<mode>2<vczle><vczbe>): ... This.
26074 (clrsb<mode>2): Rename to...
26075 (clrsb<mode>2<vczle><vczbe>): ... This.
26076 (clz<mode>2): Rename to...
26077 (clz<mode>2<vczle><vczbe>): ... This.
26078 (popcount<mode>2): Rename to...
26079 (popcount<mode>2<vczle><vczbe>): ... This.
26081 2023-04-28 Jakub Jelinek <jakub@redhat.com>
26083 * gimple-range-op.cc (class cfn_sqrt): New type.
26084 (op_cfn_sqrt): New variable.
26085 (gimple_range_op_handler::maybe_builtin_call): Handle
26086 CASE_CFN_SQRT{,_FN}.
26088 2023-04-28 Aldy Hernandez <aldyh@redhat.com>
26089 Jakub Jelinek <jakub@redhat.com>
26091 * value-range.h (frange_nextafter): Declare.
26092 * gimple-range-op.cc (class cfn_sincos): New.
26093 (op_cfn_sin, op_cfn_cos): New variables.
26094 (gimple_range_op_handler::maybe_builtin_call): Handle
26095 CASE_CFN_{SIN,COS}{,_FN}.
26097 2023-04-28 Jakub Jelinek <jakub@redhat.com>
26099 * target.def (libm_function_max_error): New target hook.
26100 * doc/tm.texi.in (TARGET_LIBM_FUNCTION_MAX_ERROR): Add.
26101 * doc/tm.texi: Regenerated.
26102 * targhooks.h (default_libm_function_max_error,
26103 glibc_linux_libm_function_max_error): Declare.
26104 * targhooks.cc: Include case-cfn-macros.h.
26105 (default_libm_function_max_error,
26106 glibc_linux_libm_function_max_error): New functions.
26107 * config/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
26108 * config/linux-protos.h (linux_libm_function_max_error): Declare.
26109 * config/linux.cc: Include target.h and targhooks.h.
26110 (linux_libm_function_max_error): New function.
26111 * config/arc/arc.cc: Include targhooks.h and case-cfn-macros.h.
26112 (arc_libm_function_max_error): New function.
26113 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
26114 * config/i386/i386.cc (ix86_libc_has_fast_function): Formatting fix.
26115 (ix86_libm_function_max_error): New function.
26116 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
26117 * config/rs6000/rs6000-protos.h
26118 (rs6000_linux_libm_function_max_error): Declare.
26119 * config/rs6000/rs6000-linux.cc: Include target.h, targhooks.h, tree.h
26120 and case-cfn-macros.h.
26121 (rs6000_linux_libm_function_max_error): New function.
26122 * config/rs6000/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
26123 * config/rs6000/linux64.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
26124 * config/or1k/or1k.cc: Include targhooks.h and case-cfn-macros.h.
26125 (or1k_libm_function_max_error): New function.
26126 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
26128 2023-04-28 Alexandre Oliva <oliva@adacore.com>
26130 * gimple-harden-conditionals.cc (insert_edge_check_and_trap):
26131 Move detach value calls...
26132 (pass_harden_conditional_branches::execute): ... here.
26133 (pass_harden_compares::execute): Detach values before
26136 2023-04-27 Andrew Stubbs <ams@codesourcery.com>
26138 * config/gcn/gcn-valu.md (cmul<conj_op><mode>3): Use gcn_gen_undef.
26139 (cml<addsub_as><mode>4): Likewise.
26140 (vec_addsub<mode>3): Likewise.
26141 (cadd<rot><mode>3): Likewise.
26142 (vec_fmaddsub<mode>4): Likewise.
26143 (vec_fmsubadd<mode>4): Likewise, and use sub for the odd lanes.
26145 2023-04-27 Andrew Pinski <apinski@marvell.com>
26147 * tree-ssa-phiopt.cc (phiopt_early_allow): Allow for
26148 up to 2 min/max expressions in the sequence/match code.
26150 2023-04-27 Andrew Pinski <apinski@marvell.com>
26152 * rtlanal.cc (may_trap_p_1): Treat SMIN/SMAX similar as
26154 * tree-eh.cc (operation_could_trap_helper_p): Treate
26155 MIN_EXPR/MAX_EXPR similar as other comparisons.
26157 2023-04-27 Andrew Pinski <apinski@marvell.com>
26159 * tree-ssa-phiopt.cc (cond_store_replacement): Remove
26161 (cond_if_else_store_replacement): Likewise.
26162 (get_non_trapping): Likewise.
26163 (store_elim_worker): Move into ...
26164 (pass_cselim::execute): This.
26166 2023-04-27 Andrew Pinski <apinski@marvell.com>
26168 * tree-ssa-phiopt.cc (two_value_replacement): Remove
26170 (match_simplify_replacement): Likewise.
26171 (factor_out_conditional_conversion): Likewise.
26172 (value_replacement): Likewise.
26173 (minmax_replacement): Likewise.
26174 (spaceship_replacement): Likewise.
26175 (cond_removal_in_builtin_zero_pattern): Likewise.
26176 (hoist_adjacent_loads): Likewise.
26177 (tree_ssa_phiopt_worker): Move into ...
26178 (pass_phiopt::execute): this.
26180 2023-04-27 Andrew Pinski <apinski@marvell.com>
26182 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove
26183 do_store_elim argument and split that part out to ...
26184 (store_elim_worker): This new function.
26185 (pass_cselim::execute): Call store_elim_worker.
26186 (pass_phiopt::execute): Update call to tree_ssa_phiopt_worker.
26188 2023-04-27 Jan Hubicka <jh@suse.cz>
26190 * cfgloopmanip.h (unloop_loops): Export.
26191 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Unloop loops
26192 that no longer loop.
26193 * tree-ssa-loop-ivcanon.cc (unloop_loops): Export; do not free
26194 vectors of loops to unloop.
26195 (canonicalize_induction_variables): Free vectors here.
26196 (tree_unroll_loops_completely): Free vectors here.
26198 2023-04-27 Richard Biener <rguenther@suse.de>
26200 PR tree-optimization/109170
26201 * gimple-range-op.cc (gimple_range_op_handler::maybe_builtin_call):
26202 Handle __builtin_expect and similar via cfn_pass_through_arg1
26203 and inspecting the calls fnspec.
26204 * builtins.cc (builtin_fnspec): Handle BUILT_IN_EXPECT
26205 and BUILT_IN_EXPECT_WITH_PROBABILITY.
26207 2023-04-27 Alexandre Oliva <oliva@adacore.com>
26209 * genmultilib: Use CONFIG_SHELL to run sub-scripts.
26211 2023-04-27 Aldy Hernandez <aldyh@redhat.com>
26213 PR tree-optimization/109639
26214 * ipa-cp.cc (ipa_value_range_from_jfunc): Normalize range.
26215 (propagate_vr_across_jump_function): Same.
26216 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
26217 * ipa-prop.h (ipa_range_set_and_normalize): New.
26218 * value-range.cc (irange::set): Assert min and max are INTEGER_CST.
26220 2023-04-27 Richard Biener <rguenther@suse.de>
26222 * match.pd (BIT_FIELD_REF CONSTRUCTOR@0 @1 @2): Do not
26223 create a CTOR operand in the result when simplifying GIMPLE.
26225 2023-04-27 Richard Biener <rguenther@suse.de>
26227 * gimplify.cc (gimplify_compound_lval): When the base
26228 gimplified to a register make sure to split up chains
26231 2023-04-27 Richard Biener <rguenther@suse.de>
26234 * ipa-param-manipulation.h
26235 (ipa_param_body_adjustments::modify_expression): Add extra_stmts
26237 * ipa-param-manipulation.cc
26238 (ipa_param_body_adjustments::modify_expression): Likewise.
26239 When we need a conversion and the replacement is a register
26240 split the conversion out.
26241 (ipa_param_body_adjustments::modify_assignment): Pass
26242 extra_stmts to RHS modify_expression.
26244 2023-04-27 Jonathan Wakely <jwakely@redhat.com>
26246 * doc/extend.texi (Zero Length): Describe example.
26248 2023-04-27 Richard Biener <rguenther@suse.de>
26250 PR tree-optimization/109594
26251 * tree-ssa.cc (non_rewritable_mem_ref_base): Constrain
26252 what we rewrite to a register based on the above.
26254 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
26256 * config/riscv/riscv.cc: Fix whitespace.
26257 * config/riscv/sync.md: Fix whitespace.
26259 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
26261 PR tree-optimization/108697
26262 * gimple-range-cache.cc (ssa_global_cache::clear_range): Do
26263 not clear the vector on an out of range query.
26264 (ssa_cache::dump): Use dump_range_query instead of get_range.
26265 (ssa_cache::dump_range_query): New.
26266 (ssa_lazy_cache::dump_range_query): New.
26267 (ssa_lazy_cache::set_range): New.
26268 * gimple-range-cache.h (ssa_cache::dump_range_query): New.
26269 (class ssa_lazy_cache): New.
26270 (ssa_lazy_cache::ssa_lazy_cache): New.
26271 (ssa_lazy_cache::~ssa_lazy_cache): New.
26272 (ssa_lazy_cache::get_range): New.
26273 (ssa_lazy_cache::clear_range): New.
26274 (ssa_lazy_cache::clear): New.
26275 (ssa_lazy_cache::dump): New.
26276 * gimple-range-path.cc (path_range_query::path_range_query): Do
26277 not allocate a ssa_cache object nor has_cache bitmap.
26278 (path_range_query::~path_range_query): Do not free objects.
26279 (path_range_query::clear_cache): Remove.
26280 (path_range_query::get_cache): Adjust.
26281 (path_range_query::set_cache): Remove.
26282 (path_range_query::dump): Don't call through a pointer.
26283 (path_range_query::internal_range_of_expr): Set cache directly.
26284 (path_range_query::reset_path): Clear cache directly.
26285 (path_range_query::ssa_range_in_phi): Fold with globals only.
26286 (path_range_query::compute_ranges_in_phis): Simply set range.
26287 (path_range_query::compute_ranges_in_block): Call cache directly.
26288 * gimple-range-path.h (class path_range_query): Replace bitmap
26289 and cache pointer with lazy cache object.
26290 * gimple-range.h (class assume_query): Use ssa_lazy_cache.
26292 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
26294 * gimple-range-cache.cc (ssa_cache::ssa_cache): Rename.
26295 (ssa_cache::~ssa_cache): Rename.
26296 (ssa_cache::has_range): New.
26297 (ssa_cache::get_range): Rename.
26298 (ssa_cache::set_range): Rename.
26299 (ssa_cache::clear_range): Rename.
26300 (ssa_cache::clear): Rename.
26301 (ssa_cache::dump): Rename and use get_range.
26302 (ranger_cache::get_global_range): Use get_range and set_range.
26303 (ranger_cache::range_of_def): Use get_range.
26304 * gimple-range-cache.h (class ssa_cache): Rename class and methods.
26305 (class ranger_cache): Use ssa_cache.
26306 * gimple-range-path.cc (path_range_query::path_range_query): Use
26308 (path_range_query::get_cache): Use get_range.
26309 (path_range_query::set_cache): Use set_range.
26310 * gimple-range-path.h (class path_range_query): Use ssa_cache.
26311 * gimple-range.cc (assume_query::assume_range_p): Use get_range.
26312 (assume_query::range_of_expr): Use get_range.
26313 (assume_query::assume_query): Use set_range.
26314 (assume_query::calculate_op): Use get_range and set_range.
26315 * gimple-range.h (class assume_query): Use ssa_cache.
26317 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
26319 * gimple-range-cache.cc (sbr_vector::sbr_vector): Add parameter
26320 and local to optionally zero memory.
26321 (br_vector::grow): Only zero memory if flag is set.
26322 (class sbr_lazy_vector): New.
26323 (sbr_lazy_vector::sbr_lazy_vector): New.
26324 (sbr_lazy_vector::set_bb_range): New.
26325 (sbr_lazy_vector::get_bb_range): New.
26326 (sbr_lazy_vector::bb_range_p): New.
26327 (block_range_cache::set_bb_range): Check flags and Use sbr_lazy_vector.
26328 * gimple-range-gori.cc (gori_map::calculate_gori): Use
26329 param_vrp_switch_limit.
26330 (gori_compute::gori_compute): Use param_vrp_switch_limit.
26331 * params.opt (vrp_sparse_threshold): Rename from evrp_sparse_threshold.
26332 (vrp_switch_limit): Rename from evrp_switch_limit.
26333 (vrp_vector_threshold): New.
26335 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
26337 * value-relation.cc (dom_oracle::query_relation): Check early for lack
26339 * value-relation.h (equiv_oracle::has_equiv_p): New.
26341 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
26343 PR tree-optimization/109417
26344 * gimple-range-gori.cc (range_def_chain::register_dependency):
26345 Save the ssa version number, not the pointer.
26346 (gori_compute::may_recompute_p): No need to check if a dependency
26347 is in the free list.
26348 * gimple-range-gori.h (class range_def_chain): Change ssa1 and ssa2
26349 fields to be unsigned int instead of trees.
26350 (ange_def_chain::depend1): Adjust.
26351 (ange_def_chain::depend2): Adjust.
26352 * gimple-range.h: Include "ssa.h" to inline ssa_name().
26354 2023-04-26 David Edelsohn <dje.gcc@gmail.com>
26356 * config/rs6000/aix72.h (TARGET_DEFAULT): Use ISA_2_6_MASKS_SERVER.
26357 * config/rs6000/aix73.h (TARGET_DEFAULT): Use ISA_2_7_MASKS_SERVER.
26358 (PROCESSOR_DEFAULT): Use PROCESSOR_POWER8.
26360 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
26363 * config/riscv/riscv-protos.h: Add helper function stubs.
26364 * config/riscv/riscv.cc: Add helper functions for subword masking.
26365 * config/riscv/riscv.opt: Add command-line flags -minline-atomics and
26366 -mno-inline-atomics.
26367 * config/riscv/sync.md: Add masking logic and inline asm for fetch_and_op,
26368 fetch_and_nand, CAS, and exchange ops.
26369 * doc/invoke.texi: Add blurb regarding new command-line flags
26370 -minline-atomics and -mno-inline-atomics.
26372 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26374 * config/aarch64/aarch64-simd.md (aarch64_rshrn2<mode>_insn_le):
26375 Reimplement using standard RTL codes instead of unspec.
26376 (aarch64_rshrn2<mode>_insn_be): Likewise.
26377 (aarch64_rshrn2<mode>): Adjust for the above.
26378 * config/aarch64/aarch64.md (UNSPEC_RSHRN): Delete.
26380 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26382 * config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le): Reimplement
26383 with standard RTL codes instead of an UNSPEC.
26384 (aarch64_rshrn<mode>_insn_be): Likewise.
26385 (aarch64_rshrn<mode>): Adjust for the above.
26386 * config/aarch64/predicates.md (aarch64_simd_rshrn_imm_vec): Define.
26388 2023-04-26 Pan Li <pan2.li@intel.com>
26389 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26391 * config/riscv/riscv.cc (riscv_classify_address): Allow
26392 const0_rtx for the RVV load/store.
26394 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
26396 * range-op.cc (range_op_cast_tests): Remove legacy support.
26397 * value-range-storage.h (vrange_allocator::alloc_irange): Same.
26398 * value-range.cc (irange::operator=): Same.
26399 (get_legacy_range): Same.
26400 (irange::copy_legacy_to_multi_range): Delete.
26401 (irange::copy_to_legacy): Delete.
26402 (irange::irange_set_anti_range): Delete.
26403 (irange::set): Remove legacy support.
26404 (irange::verify_range): Same.
26405 (irange::legacy_lower_bound): Delete.
26406 (irange::legacy_upper_bound): Delete.
26407 (irange::legacy_equal_p): Delete.
26408 (irange::operator==): Remove legacy support.
26409 (irange::singleton_p): Same.
26410 (irange::value_inside_range): Same.
26411 (irange::contains_p): Same.
26412 (intersect_ranges): Delete.
26413 (irange::legacy_intersect): Delete.
26414 (union_ranges): Delete.
26415 (irange::legacy_union): Delete.
26416 (irange::legacy_verbose_union_): Delete.
26417 (irange::legacy_verbose_intersect): Delete.
26418 (irange::irange_union): Remove legacy support.
26419 (irange::irange_intersect): Same.
26420 (irange::intersect): Same.
26421 (irange::invert): Same.
26422 (ranges_from_anti_range): Delete.
26423 (gt_pch_nx): Adjust for legacy removal.
26425 (range_tests_legacy): Delete.
26426 (range_tests_misc): Adjust for legacy removal.
26427 (range_tests): Same.
26428 * value-range.h (class irange): Same.
26429 (irange::legacy_mode_p): Delete.
26430 (ranges_from_anti_range): Delete.
26431 (irange::nonzero_p): Adjust for legacy removal.
26432 (irange::lower_bound): Same.
26433 (irange::upper_bound): Same.
26434 (irange::union_): Same.
26435 (irange::intersect): Same.
26436 (irange::set_nonzero): Same.
26437 (irange::set_zero): Same.
26438 * vr-values.cc (simplify_using_ranges::legacy_fold_cond_overflow): Same.
26440 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
26442 * value-range.cc (irange::copy_legacy_to_multi_range): Rewrite use
26443 of range_has_numeric_bounds_p with irange API.
26444 (range_has_numeric_bounds_p): Delete.
26445 * value-range.h (range_has_numeric_bounds_p): Delete.
26447 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
26449 * tree-data-ref.cc (compute_distributive_range): Replace uses of
26450 range_int_cst_p with irange API.
26451 * tree-ssa-strlen.cc (get_range_strlen_dynamic): Same.
26452 * tree-vrp.h (range_int_cst_p): Delete.
26453 * vr-values.cc (check_for_binary_op_overflow): Replace usees of
26454 range_int_cst_p with irange API.
26455 (vr_set_zero_nonzero_bits): Same.
26456 (range_fits_type_p): Same.
26457 (simplify_using_ranges::simplify_casted_cond): Same.
26458 * tree-vrp.cc (range_int_cst_p): Remove.
26460 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
26462 * tree-ssa-strlen.cc (compare_nonzero_chars): Convert to wide_ints.
26464 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
26466 * builtins.cc (expand_builtin_strnlen): Rewrite deprecated irange
26467 API uses to new API.
26468 * gimple-predicate-analysis.cc (find_var_cmp_const): Same.
26469 * internal-fn.cc (get_min_precision): Same.
26471 * tree-affine.cc (expr_to_aff_combination): Same.
26472 * tree-data-ref.cc (dr_step_indicator): Same.
26473 * tree-dfa.cc (get_ref_base_and_extent): Same.
26474 * tree-scalar-evolution.cc (iv_can_overflow_p): Same.
26475 * tree-ssa-phiopt.cc (two_value_replacement): Same.
26476 * tree-ssa-pre.cc (insert_into_preds_of_block): Same.
26477 * tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Same.
26478 * tree-ssa-strlen.cc (compare_nonzero_chars): Same.
26479 * tree-switch-conversion.cc (bit_test_cluster::emit): Same.
26480 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Same.
26481 * tree.cc (get_range_pos_neg): Same.
26483 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
26485 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Use
26486 vrange::dump instead of ad-hoc dumper.
26487 * tree-ssa-strlen.cc (dump_strlen_info): Same.
26488 * value-range-pretty-print.cc (visit): Pass TDF_NOUID to
26491 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
26493 * range-op.cc (operator_cast::op1_range): Use
26494 create_possibly_reversed_range.
26495 (operator_bitwise_and::simple_op1_range_solver): Same.
26496 * value-range.cc (swap_out_of_order_endpoints): Delete.
26497 (irange::set): Remove call to swap_out_of_order_endpoints.
26499 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
26501 * builtins.cc (determine_block_size): Convert use of legacy API to
26503 * gimple-array-bounds.cc (check_out_of_bounds_and_warn): Same.
26504 (array_bounds_checker::check_array_ref): Same.
26505 * gimple-ssa-warn-restrict.cc
26506 (builtin_memref::extend_offset_range): Same.
26507 * ipa-cp.cc (ipcp_store_vr_results): Same.
26508 * ipa-fnsummary.cc (set_switch_stmt_execution_predicate): Same.
26509 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Same.
26510 (ipa_write_jump_function): Same.
26511 * pointer-query.cc (get_size_range): Same.
26512 * tree-data-ref.cc (split_constant_offset): Same.
26513 * tree-ssa-strlen.cc (get_range): Same.
26514 (maybe_diag_stxncpy_trunc): Same.
26515 (strlen_pass::get_len_or_size): Same.
26516 (strlen_pass::count_nonzero_bytes_addr): Same.
26517 * tree-vect-patterns.cc (vect_get_range_info): Same.
26518 * value-range.cc (irange::maybe_anti_range): Remove.
26519 (get_legacy_range): New.
26520 (irange::copy_to_legacy): Use get_legacy_range.
26521 (ranges_from_anti_range): Same.
26522 * value-range.h (class irange): Remove maybe_anti_range.
26523 (get_legacy_range): New.
26524 * vr-values.cc (check_for_binary_op_overflow): Convert use of
26525 legacy API to get_legacy_range.
26526 (compare_ranges): Same.
26527 (compare_range_with_value): Same.
26528 (bounds_of_var_in_loop): Same.
26529 (find_case_label_ranges): Same.
26530 (simplify_using_ranges::simplify_switch_using_ranges): Same.
26532 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
26534 * value-range-pretty-print.cc (vrange_printer::visit): Remove
26536 * value-range.cc (irange::constant_p): Remove.
26537 (irange::get_nonzero_bits_from_range): Remove constant_p use.
26538 * value-range.h (class irange): Remove constant_p.
26539 (irange::num_pairs): Remove constant_p use.
26541 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
26543 * value-range.cc (irange::copy_legacy_to_multi_range): Remove
26545 (irange::set): Same.
26546 (irange::legacy_lower_bound): Same.
26547 (irange::legacy_upper_bound): Same.
26548 (irange::contains_p): Same.
26549 (range_tests_legacy): Same.
26550 (irange::normalize_addresses): Remove.
26551 (irange::normalize_symbolics): Remove.
26552 (irange::symbolic_p): Remove.
26553 * value-range.h (class irange): Remove symbolic_p,
26554 normalize_symbolics, and normalize_addresses.
26555 * vr-values.cc (simplify_using_ranges::two_valued_val_range_p):
26556 Remove symbolics support.
26558 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
26560 * value-range.cc (irange::may_contain_p): Remove.
26561 * value-range.h (range_includes_zero_p): Rewrite may_contain_p
26562 usage with contains_p.
26563 * vr-values.cc (compare_range_with_value): Same.
26565 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
26567 * tree-vrp.cc (supported_types_p): Remove.
26568 (defined_ranges_p): Remove.
26569 (range_fold_binary_expr): Remove.
26570 (range_fold_unary_expr): Remove.
26571 * tree-vrp.h (range_fold_unary_expr): Remove.
26572 (range_fold_binary_expr): Remove.
26574 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
26576 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Convert to ranger API.
26577 (ipa_value_range_from_jfunc): Same.
26578 (propagate_vr_across_jump_function): Same.
26579 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
26580 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
26581 * vr-values.cc (bounds_of_var_in_loop): Same.
26583 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
26585 * gimple-array-bounds.cc (array_bounds_checker::get_value_range):
26586 Add irange argument.
26587 (check_out_of_bounds_and_warn): Remove check for vr.
26588 (array_bounds_checker::check_array_ref): Remove pointer qualifier
26589 for vr and adjust accordingly.
26590 * gimple-array-bounds.h (get_value_range): Add irange argument.
26591 * value-query.cc (class equiv_allocator): Delete.
26592 (range_query::get_value_range): Delete.
26593 (range_query::range_query): Remove allocator access.
26594 (range_query::~range_query): Same.
26595 * value-query.h (get_value_range): Delete.
26597 (simplify_using_ranges::op_with_boolean_value_range_p): Remove
26598 call to get_value_range.
26599 (check_for_binary_op_overflow): Same.
26600 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
26601 (simplify_using_ranges::simplify_abs_using_ranges): Same.
26602 (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
26603 (simplify_using_ranges::simplify_casted_cond): Same.
26604 (simplify_using_ranges::simplify_switch_using_ranges): Same.
26605 (simplify_using_ranges::two_valued_val_range_p): Same.
26607 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
26610 (simplify_using_ranges::vrp_evaluate_conditional_warnv_with_ops):
26612 (simplify_using_ranges::legacy_fold_cond_overflow): ...this.
26613 (simplify_using_ranges::vrp_visit_cond_stmt): Rename to...
26614 (simplify_using_ranges::legacy_fold_cond): ...this.
26615 (simplify_using_ranges::fold_cond): Rename
26616 vrp_evaluate_conditional_warnv_with_ops to
26617 legacy_fold_cond_overflow.
26618 * vr-values.h (class vr_values): Replace vrp_visit_cond_stmt and
26619 vrp_evaluate_conditional_warnv_with_ops with legacy_fold_cond and
26620 legacy_fold_cond_overflow respectively.
26622 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
26624 * vr-values.cc (get_vr_for_comparison): Remove.
26625 (compare_name_with_value): Same.
26626 (vrp_evaluate_conditional_warnv_with_ops): Remove calls to
26627 compare_name_with_value.
26628 * vr-values.h: Remove compare_name_with_value.
26629 Remove get_vr_for_comparison.
26631 2023-04-26 Roger Sayle <roger@nextmovesoftware.com>
26633 * config/stormy16/stormy16.md (bswaphi2): New define_insn.
26634 (bswapsi2): New define_insn.
26635 (swaphi): New define_insn to exchange two registers (swpw).
26636 (define_peephole2): Recognize exchange of registers as swaphi.
26638 2023-04-26 Richard Biener <rguenther@suse.de>
26640 * gimple-range-path.cc (path_range_query::compute_outgoing_relations):
26642 * ipa-pure-const.cc (pass_nothrow::execute): Likewise.
26643 * predict.cc (apply_return_prediction): Likewise.
26644 * sese.cc (set_ifsese_condition): Likewise. Simplify.
26645 * tree-cfg.cc (assert_unreachable_fallthru_edge_p): Avoid last_stmt.
26646 (make_edges_bb): Likewise.
26647 (make_cond_expr_edges): Likewise.
26648 (end_recording_case_labels): Likewise.
26649 (make_gimple_asm_edges): Likewise.
26650 (cleanup_dead_labels): Likewise.
26651 (group_case_labels): Likewise.
26652 (gimple_can_merge_blocks_p): Likewise.
26653 (gimple_merge_blocks): Likewise.
26654 (find_taken_edge): Likewise. Also handle empty fallthru blocks.
26655 (gimple_duplicate_sese_tail): Avoid last_stmt.
26656 (find_loop_dist_alias): Likewise.
26657 (gimple_block_ends_with_condjump_p): Likewise.
26658 (gimple_purge_dead_eh_edges): Likewise.
26659 (gimple_purge_dead_abnormal_call_edges): Likewise.
26660 (pass_warn_function_return::execute): Likewise.
26661 (execute_fixup_cfg): Likewise.
26662 * tree-eh.cc (redirect_eh_edge_1): Likewise.
26663 (pass_lower_resx::execute): Likewise.
26664 (pass_lower_eh_dispatch::execute): Likewise.
26665 (cleanup_empty_eh): Likewise.
26666 * tree-if-conv.cc (if_convertible_bb_p): Likewise.
26667 (predicate_bbs): Likewise.
26668 (ifcvt_split_critical_edges): Likewise.
26669 * tree-loop-distribution.cc (create_edge_for_control_dependence):
26671 (loop_distribution::transform_reduction_loop): Likewise.
26672 * tree-parloops.cc (transform_to_exit_first_loop_alt): Likewise.
26673 (try_transform_to_exit_first_loop_alt): Likewise.
26674 (transform_to_exit_first_loop): Likewise.
26675 (create_parallel_loop): Likewise.
26676 * tree-scalar-evolution.cc (get_loop_exit_condition): Likewise.
26677 * tree-ssa-dce.cc (mark_last_stmt_necessary): Likewise.
26678 (eliminate_unnecessary_stmts): Likewise.
26680 (dom_opt_dom_walker::set_global_ranges_from_unreachable_edges):
26682 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Likewise.
26683 (pass_tree_ifcombine::execute): Likewise.
26684 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Likewise.
26685 (should_duplicate_loop_header_p): Likewise.
26686 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Likewise.
26687 (tree_estimate_loop_size): Likewise.
26688 (try_unroll_loop_completely): Likewise.
26689 * tree-ssa-loop-ivopts.cc (tree_ssa_iv_optimize_loop): Likewise.
26690 * tree-ssa-loop-manip.cc (ip_normal_pos): Likewise.
26691 (canonicalize_loop_ivs): Likewise.
26692 * tree-ssa-loop-niter.cc (determine_value_range): Likewise.
26693 (bound_difference): Likewise.
26694 (number_of_iterations_popcount): Likewise.
26695 (number_of_iterations_cltz): Likewise.
26696 (number_of_iterations_cltz_complement): Likewise.
26697 (simplify_using_initial_conditions): Likewise.
26698 (number_of_iterations_exit_assumptions): Likewise.
26699 (loop_niter_by_eval): Likewise.
26700 (estimate_numbers_of_iterations): Likewise.
26702 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26704 * config/riscv/vector.md: Refine vmadc/vmsbc RA constraint.
26706 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
26709 * config/rs6000/rs6000-builtins.def
26710 (__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt
26711 __builtin_vsx_scalar_cmp_exp_qp_lt,
26712 __builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw
26715 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
26718 * config/rs6000/altivec.md (sldoi_to_mov<mode>): Replace predicate
26719 easy_vector_constant with const_vector_each_byte_same, add
26720 handlings in preparation for !easy_vector_constant, and update
26721 VECTOR_UNIT_ALTIVEC_OR_VSX_P with VECTOR_MEM_ALTIVEC_OR_VSX_P.
26722 * config/rs6000/predicates.md (const_vector_each_byte_same): New
26725 2023-04-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26727 * config/riscv/vector.md (*pred_cmp<mode>_merge_tie_mask): New pattern.
26728 (*pred_ltge<mode>_merge_tie_mask): Ditto.
26729 (*pred_cmp<mode>_scalar_merge_tie_mask): Ditto.
26730 (*pred_eqne<mode>_scalar_merge_tie_mask): Ditto.
26731 (*pred_cmp<mode>_extended_scalar_merge_tie_mask): Ditto.
26732 (*pred_eqne<mode>_extended_scalar_merge_tie_mask): Ditto.
26733 (*pred_cmp<mode>_narrow_merge_tie_mask): Ditto.
26735 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26737 * config/riscv/vector.md: Fix redundant vmv1r.v.
26739 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26741 * config/riscv/vector.md: Fix RA constraint.
26743 2023-04-26 Pan Li <pan2.li@intel.com>
26746 * tree-ssa-sccvn.cc (vn_reference_eq): add type vector subparts
26747 check for vn_reference equal.
26749 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26751 * config/riscv/riscv-opts.h (enum riscv_autovec_preference_enum): Add enum for
26752 auto-vectorization preference.
26753 (enum riscv_autovec_lmul_enum): Add enum for choosing LMUL of RVV
26754 auto-vectorization.
26755 * config/riscv/riscv.opt: Add compile option for RVV auto-vectorization.
26757 2023-04-26 Jivan Hakobyan <jivanhakobyan9@gmail.com>
26759 * config/riscv/bitmanip.md: Updated predicates of bclri<mode>_nottwobits
26760 and bclridisi_nottwobits patterns.
26761 * config/riscv/predicates.md: (not_uimm_extra_bit_or_nottwobits): Adjust
26762 predicate to avoid splitting arith constants.
26763 (const_nottwobits_not_arith_operand): New predicate.
26765 2023-04-25 Hans-Peter Nilsson <hp@axis.com>
26767 * recog.cc (peep2_attempt, peep2_update_life): Correct
26768 head-comment description of parameter match_len.
26770 2023-04-25 Vineet Gupta <vineetg@rivosinc.com>
26772 * config/riscv/riscv.md: riscv_move_integer() drop in_splitter arg.
26773 riscv_split_symbol() drop in_splitter arg.
26774 * config/riscv/riscv.cc: riscv_move_integer() drop in_splitter arg.
26775 riscv_split_symbol() drop in_splitter arg.
26776 riscv_force_temporary() drop in_splitter arg.
26777 * config/riscv/riscv-protos.h: riscv_move_integer() drop in_splitter arg.
26778 riscv_split_symbol() drop in_splitter arg.
26780 2023-04-25 Eric Botcazou <ebotcazou@adacore.com>
26782 * tree-ssa.cc (insert_debug_temp_for_var_def): Do not create
26783 superfluous debug temporaries for single GIMPLE assignments.
26785 2023-04-25 Richard Biener <rguenther@suse.de>
26787 PR tree-optimization/109609
26788 * attr-fnspec.h (arg_max_access_size_given_by_arg_p):
26790 * tree-ssa-alias.cc (check_fnspec): Correctly interpret
26791 the size given by arg_max_access_size_given_by_arg_p as
26792 maximum, not exact, size.
26794 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26797 * config/aarch64/aarch64-simd.md (orn<mode>3): Rename to...
26798 (orn<mode>3<vczle><vczbe>): ... This.
26799 (bic<mode>3): Rename to...
26800 (bic<mode>3<vczle><vczbe>): ... This.
26801 (<su><maxmin><mode>3): Rename to...
26802 (<su><maxmin><mode>3<vczle><vczbe>): ... This.
26804 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26806 * config/aarch64/aarch64-simd.md (<su_optab>div<mode>3): New define_expand.
26807 * config/aarch64/iterators.md (VQDIV): New mode iterator.
26808 (vnx2di): New mode attribute.
26810 2023-04-25 Richard Biener <rguenther@suse.de>
26812 PR rtl-optimization/109585
26813 * tree-ssa-alias.cc (aliasing_component_refs_p): Fix typo.
26815 2023-04-25 Jakub Jelinek <jakub@redhat.com>
26818 * config/rs6000/rs6000.cc (rs6000_is_valid_rotate_dot_mask): For
26819 !TARGET_64BIT, don't return true if UINTVAL (mask) << (63 - nb)
26820 is larger than signed int maximum.
26822 2023-04-25 Martin Liska <mliska@suse.cz>
26824 * doc/gcov.texi: Document the new "calls" field and document
26825 the API bump. Mention also "block_ids" for lines.
26826 * gcov.cc (output_intermediate_json_line): Output info about
26827 calls and extend branches as well.
26828 (generate_results): Bump version to 2.
26829 (output_line_details): Use block ID instead of a non-sensual
26832 2023-04-25 Roger Sayle <roger@nextmovesoftware.com>
26834 * config/stormy16/stormy16.md (zero_extendqihi2): Restore/fix
26835 length attribute for the first (memory operand) alternative.
26837 2023-04-25 Victor Do Nascimento <victor.donascimento@arm.com>
26839 * config/aarch64/aarch64-simd.md(aarch64_simd_stp<mode>): New.
26840 * config/aarch64/constraints.md: Make "Umn" relaxed memory
26842 * config/aarch64/iterators.md(ldpstp_vel_sz): New.
26844 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
26846 * value-range.cc (frange::set): Adjust constructor.
26847 * value-range.h (nan_state::nan_state): Replace default
26848 constructor with one taking an argument.
26850 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
26852 * ipa-cp.cc (ipa_range_contains_p): New.
26853 (decide_whether_version_node): Use it.
26855 2023-04-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
26857 * tree-ssa-forwprop.cc (is_combined_permutation_identity): Try to
26858 simplify two successive VEC_PERM_EXPRs with same VLA mask,
26859 where mask chooses elements in reverse order.
26861 2023-04-24 Andrew Pinski <apinski@marvell.com>
26863 * tree-ssa-phiopt.cc (match_simplify_replacement): Add new arguments
26864 and support diamond shaped basic block form.
26865 (tree_ssa_phiopt_worker): Update call to match_simplify_replacement
26867 2023-04-24 Andrew Pinski <apinski@marvell.com>
26869 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
26870 Instead of calling last_and_only_stmt, look for the last statement
26873 2023-04-24 Andrew Pinski <apinski@marvell.com>
26875 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
26877 (match_simplify_replacement): Call
26878 empty_bb_or_one_feeding_into_p instead of doing it inline.
26880 2023-04-24 Andrew Pinski <apinski@marvell.com>
26882 PR tree-optimization/68894
26883 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove the
26884 continue for the do_hoist_loads diamond case.
26886 2023-04-24 Andrew Pinski <apinski@marvell.com>
26888 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Rearrange
26889 code for better code readability.
26891 2023-04-24 Andrew Pinski <apinski@marvell.com>
26893 PR tree-optimization/109604
26894 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Move the
26895 diamond form check from ...
26896 (minmax_replacement): Here.
26898 2023-04-24 Patrick Palka <ppalka@redhat.com>
26900 * tree.cc (strip_array_types): Don't define here.
26901 (is_typedef_decl): Don't define here.
26902 (typedef_variant_p): Don't define here.
26903 * tree.h (strip_array_types): Define here.
26904 (is_typedef_decl): Define here.
26905 (typedef_variant_p): Define here.
26907 2023-04-24 Frederik Harwath <frederik@codesourcery.com>
26909 * doc/generic.texi (OpenMP): Add != to allowed
26910 conditions and state that vars can be unsigned.
26911 * tree.def (OMP_FOR): Likewise.
26913 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26915 * config/aarch64/aarch64-simd.md (mulv2di3): New expander.
26917 2023-04-24 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
26919 * doc/install.texi: Consistently use Solaris rather than Solaris 2.
26920 Remove explicit Solaris 11 references.
26922 (Options specification, --with-gnu-as): as and gas always differ
26924 Remove /usr/ccs/bin reference.
26925 (Installing GCC: Binaries, Solaris (SPARC, Intel)): Remove.
26926 (i?86-*-solaris2*): Merge assembler, linker recommendations ...
26927 (*-*-solaris2*): ... here.
26928 Update bundled GCC versions.
26929 Don't refer to pre-built binaries.
26930 Remove /bin/sh warning.
26931 Update assembler, linker recommendations.
26932 Document GNAT bootstrap compiler.
26933 (sparc-sun-solaris2*): Remove non-UltraSPARC reference.
26934 (sparc64-*-solaris2*): Move content...
26935 (sparcv9-*-solaris2*): ...here.
26936 Add GDC for 64-bit bootstrap compilers.
26938 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26941 * config/aarch64/aarch64-sve.md (<optab><mode>3): Handle TARGET_SVE2 MUL
26943 * config/aarch64/aarch64-sve2.md (*aarch64_mul_unpredicated_<mode>): New
26946 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26948 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): Rename to...
26949 (aarch64_<su>abal2<mode>_insn): ... This. Use RTL codes instead of unspec.
26950 (aarch64_<su>abal2<mode>): New define_expand.
26951 * config/aarch64/aarch64.cc (aarch64_abd_rtx_p): New function.
26952 (aarch64_rtx_costs): Handle ABD rtxes.
26953 * config/aarch64/aarch64.md (UNSPEC_SABAL2, UNSPEC_UABAL2): Delete.
26954 * config/aarch64/iterators.md (ABAL2): Delete.
26955 (sur): Remove handling of UNSPEC_UABAL2 and UNSPEC_SABAL2.
26957 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26959 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>): Rename to...
26960 (aarch64_<su>abal<mode>): ... This. Use RTL codes instead of unspec.
26961 (<sur>sadv16qi): Rename to...
26962 (<su>sadv16qi): ... This. Adjust for the above.
26963 * config/aarch64/aarch64-sve.md (<sur>sad<vsi2qi>): Rename to...
26964 (<su>sad<vsi2qi>): ... This. Adjust for the above.
26965 * config/aarch64/aarch64.md (UNSPEC_SABAL, UNSPEC_UABAL): Delete.
26966 * config/aarch64/iterators.md (ABAL): Delete.
26967 (sur): Remove handling of UNSPEC_SABAL and UNSPEC_UABAL.
26969 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26971 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>): Rename to...
26972 (aarch64_<su>abdl2<mode>_insn): ... This. Use RTL codes instead of unspec.
26973 (aarch64_<su>abdl2<mode>): New define_expand.
26974 * config/aarch64/aarch64.md (UNSPEC_SABDL2, UNSPEC_UABDL2): Delete.
26975 * config/aarch64/iterators.md (ABDL2): Delete.
26976 (sur): Remove handling of UNSPEC_SABDL2 and UNSPEC_UABDL2.
26978 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26980 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): Rename to...
26981 (aarch64_<su>abdl<mode>): ... This. Use standard RTL ops instead of
26983 * config/aarch64/aarch64.md (UNSPEC_SABDL, UNSPEC_UABDL): Delete.
26984 * config/aarch64/iterators.md (ABDL): Delete.
26985 (sur): Remove handling of UNSPEC_SABDL and UNSPEC_UABDL.
26987 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26989 * config/aarch64/aarch64-simd.md
26990 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): New pattern.
26992 2023-04-24 Richard Biener <rguenther@suse.de>
26994 * gimple-ssa-split-paths.cc (is_feasible_trace): Avoid
26996 * graphite-scop-detection.cc (single_pred_cond_non_loop_exit):
26998 * ipa-fnsummary.cc (set_cond_stmt_execution_predicate): Likewise.
26999 (set_switch_stmt_execution_predicate): Likewise.
27000 (phi_result_unknown_predicate): Likewise.
27001 * ipa-prop.cc (compute_complex_ancestor_jump_func): Likewise.
27002 (ipa_analyze_indirect_call_uses): Likewise.
27003 * predict.cc (predict_iv_comparison): Likewise.
27004 (predict_extra_loop_exits): Likewise.
27005 (predict_loops): Likewise.
27006 (tree_predict_by_opcode): Likewise.
27007 * gimple-predicate-analysis.cc (predicate::init_from_control_deps):
27009 * gimple-pretty-print.cc (dump_implicit_edges): Likewise.
27010 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Likewise.
27011 (replace_phi_edge_with_variable): Likewise.
27012 (two_value_replacement): Likewise.
27013 (value_replacement): Likewise.
27014 (minmax_replacement): Likewise.
27015 (spaceship_replacement): Likewise.
27016 (cond_removal_in_builtin_zero_pattern): Likewise.
27017 * tree-ssa-reassoc.cc (maybe_optimize_range_tests): Likewise.
27018 * tree-ssa-sccvn.cc (vn_phi_eq): Likewise.
27019 (vn_phi_lookup): Likewise.
27020 (vn_phi_insert): Likewise.
27021 * tree-ssa-structalias.cc (compute_points_to_sets): Likewise.
27022 * tree-ssa-threadbackward.cc (back_threader::maybe_thread_block):
27024 (back_threader_profitability::possibly_profitable_path_p):
27026 * tree-ssa-threadedge.cc (jump_threader::thread_outgoing_edges):
27028 * tree-switch-conversion.cc (pass_convert_switch::execute):
27030 (pass_lower_switch<O0>::execute): Likewise.
27031 * tree-tailcall.cc (tree_optimize_tail_calls_1): Likewise.
27032 * tree-vect-loop-manip.cc (vect_loop_versioning): Likewise.
27033 * tree-vect-slp.cc (vect_slp_function): Likewise.
27034 * tree-vect-stmts.cc (cfun_returns): Likewise.
27035 * tree-vectorizer.cc (vect_loop_vectorized_call): Likewise.
27036 (vect_loop_dist_alias_call): Likewise.
27038 2023-04-24 Richard Biener <rguenther@suse.de>
27040 * cfgcleanup.cc (outgoing_edges_match): Use FORWARDER_BLOCK_P.
27042 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27044 * config/riscv/riscv-vsetvl.cc
27045 (vector_infos_manager::all_avail_in_compatible_p): New function.
27046 (pass_vsetvl::refine_vsetvls): Optimize vsetvls.
27047 * config/riscv/riscv-vsetvl.h: New function.
27049 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27051 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function
27052 comment for cleanup_insns.
27054 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27056 * config/riscv/vector-iterators.md: New unspec to refine fault first load pattern.
27057 * config/riscv/vector.md: Refine fault first load pattern to erase avl from instructions
27058 with the fault first load property.
27060 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27062 * config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_): Rename to...
27063 (aarch64_float_truncate_lo_<mode><vczle><vczbe>): ... This.
27065 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27068 * config/aarch64/aarch64-simd.md (aarch64_addp<mode>): Rename to...
27069 (aarch64_addp<mode><vczle><vczbe>): ... This.
27071 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
27073 * config/stormy16/stormy16.cc (xstormy16_rtx_costs): Rewrite to
27074 provide reasonable values for common arithmetic operations and
27075 immediate operands (in several machine modes).
27077 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
27079 * config/stormy16/stormy16.cc (xstormy16_print_operand): Add %h
27080 format specifier to output high_part register name of SImode reg.
27081 * config/stormy16/stormy16.md (extendhisi2): New define_insn.
27082 (zero_extendqihi2): Fix lengths, consistent formatting and add
27083 "and Rx,#255" alternative, for documentation purposes.
27084 (zero_extendhisi2): New define_insn.
27086 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
27088 * config/stormy16/stormy16.cc (xstormy16_output_shift): Implement
27089 SImode shifts by two by performing a single bit SImode shift twice.
27091 2023-04-23 Aldy Hernandez <aldyh@redhat.com>
27093 PR tree-optimization/109593
27094 * value-range.cc (frange::operator==): Handle NANs.
27096 2023-04-23 liuhongt <hongtao.liu@intel.com>
27098 PR rtl-optimization/108707
27099 * ira-costs.cc (scan_one_insn): Use NO_REGS instead of
27100 GENERAL_REGS when preferred reg_class is not known.
27102 2023-04-22 Andrew Pinski <apinski@marvell.com>
27104 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
27105 Change the code around slightly to move diamond
27106 handling for do_store_elim/do_hoist_loads out of
27109 2023-04-22 Andrew Pinski <apinski@marvell.com>
27111 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
27112 Remove check on empty_block_p.
27114 2023-04-22 Jakub Jelinek <jakub@redhat.com>
27116 PR bootstrap/109589
27117 * system.h (class auto_mpz): Workaround PR62101 bug in GCC 4.8 and 4.9.
27118 * realmpfr.h (class auto_mpfr): Likewise.
27120 2023-04-22 Jakub Jelinek <jakub@redhat.com>
27122 PR tree-optimization/109583
27123 * match.pd (fneg/fadd simplify): Don't call related_vector_mode
27124 if vec_mode is not VECTOR_MODE_P.
27126 2023-04-22 Jan Hubicka <hubicka@ucw.cz>
27127 Ondrej Kubanek <kubanek0ondrej@gmail.com>
27129 * cfgloopmanip.h (adjust_loop_info_after_peeling): Declare.
27130 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix updating of
27131 loop profile and bounds after header duplication.
27132 * tree-ssa-loop-ivcanon.cc (adjust_loop_info_after_peeling):
27133 Break out from try_peel_loop; fix handling of 0 iterations.
27134 (try_peel_loop): Use adjust_loop_info_after_peeling.
27136 2023-04-21 Andrew MacLeod <amacleod@redhat.com>
27138 PR tree-optimization/109546
27139 * tree-vrp.cc (remove_unreachable::remove_and_update_globals): Do
27140 not fold conditions with ADDR_EXPR early.
27142 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27144 * config/aarch64/aarch64.md (aarch64_umax<mode>3_insn): Delete.
27145 (umax<mode>3): Emit raw UMAX RTL instead of going through gen_ function
27147 (<optab><mode>3): New define_expand for MAXMIN_NOUMAX codes.
27148 (*aarch64_<optab><mode>3_zero): Define.
27149 (*aarch64_<optab><mode>3_cssc): Likewise.
27150 * config/aarch64/iterators.md (maxminand): New code attribute.
27152 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27155 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Define.
27156 * config/aarch64/aarch64-protos.h (aarch64_output_load_tp):
27158 * config/aarch64/aarch64.cc (aarch64_tpidr_register): Declare.
27159 (aarch64_override_options_internal): Handle the above.
27160 (aarch64_output_load_tp): New function.
27161 * config/aarch64/aarch64.md (aarch64_load_tp_hard): Call
27162 aarch64_output_load_tp.
27163 * config/aarch64/aarch64.opt (aarch64_tp_reg): Define enum.
27164 (mtp=): New option.
27165 * doc/invoke.texi (AArch64 Options): Document -mtp=.
27167 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27170 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Define.
27171 (add_vec_concat_subst_be): Likewise.
27174 (add<mode>3): Rename to...
27175 (add<mode>3<vczle><vczbe>): ... This.
27176 (sub<mode>3): Rename to...
27177 (sub<mode>3<vczle><vczbe>): ... This.
27178 (mul<mode>3): Rename to...
27179 (mul<mode>3<vczle><vczbe>): ... This.
27180 (and<mode>3): Rename to...
27181 (and<mode>3<vczle><vczbe>): ... This.
27182 (ior<mode>3): Rename to...
27183 (ior<mode>3<vczle><vczbe>): ... This.
27184 (xor<mode>3): Rename to...
27185 (xor<mode>3<vczle><vczbe>): ... This.
27186 * config/aarch64/iterators.md (VDZ): Define.
27188 2023-04-21 Patrick Palka <ppalka@redhat.com>
27190 * tree.cc (walk_tree_1): Avoid repeatedly dereferencing tp
27193 2023-04-21 Jan Hubicka <jh@suse.cz>
27195 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix previous
27198 2023-04-21 Vineet Gupta <vineetg@rivosinc.com>
27200 * expmed.h (x_shift*_cost): convert to int [speed][mode][shift].
27201 (shift*_cost_ptr ()): Access x_shift*_cost array directly.
27203 2023-04-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
27205 * config/aarch64/aarch64.cc (aarch64_simd_dup_constant): Use
27206 force_reg instead of copy_to_mode_reg.
27207 (aarch64_expand_vector_init): Likewise.
27209 2023-04-21 Uroš Bizjak <ubizjak@gmail.com>
27211 * config/i386/i386.h (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P): Remove.
27212 (REG_OK_FOR_INDEX_NONSTRICT_P, REG_OK_FOR_BASE_NONSTRICT_P): Ditto.
27213 (REG_OK_FOR_INDEX_STRICT_P, REG_OK_FOR_BASE_STRICT_P): Ditto.
27214 (FIRST_INDEX_REG, LAST_INDEX_REG): New defines.
27215 (LEGACY_INDEX_REG_P, LEGACY_INDEX_REGNO_P): New macros.
27216 (INDEX_REG_P, INDEX_REGNO_P): Ditto.
27217 (REGNO_OK_FOR_INDEX_P): Use INDEX_REGNO_P predicates.
27218 (REGNO_OK_FOR_INDEX_NONSTRICT_P): New macro.
27219 (EG_OK_FOR_BASE_NONSTRICT_P): Ditto.
27220 * config/i386/predicates.md (index_register_operand):
27221 Use REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
27222 * config/i386/i386.cc (ix86_legitimate_address_p): Use
27223 REGNO_OK_FOR_BASE_P, REGNO_OK_FOR_BASE_NONSTRICT_P,
27224 REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
27226 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
27227 Ondrej Kubanek <kubanek0ondrej@gmail.com>
27229 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Update loop header and
27232 2023-04-21 Richard Biener <rguenther@suse.de>
27234 * is-a.h (safe_is_a): New.
27236 2023-04-21 Richard Biener <rguenther@suse.de>
27238 * gimple-iterator.h (gimple_stmt_iterator::operator*): Add.
27239 (gphi_iterator::operator*): Likewise.
27241 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
27242 Michal Jires <michal@jires.eu>
27244 * ipa-inline.cc (class inline_badness): New class.
27245 (edge_heap_t, edge_heap_node_t): Use inline_badness for badness instead
27247 (update_edge_key): Update.
27248 (lookup_recursive_calls): Likewise.
27249 (recursive_inlining): Likewise.
27250 (add_new_edges_to_heap): Likewise.
27251 (inline_small_functions): Likewise.
27253 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
27255 * ipa-devirt.cc (odr_types_equivalent_p): Cleanup warned checks.
27257 2023-04-21 Richard Biener <rguenther@suse.de>
27259 PR tree-optimization/109573
27260 * tree-vect-loop.cc (vectorizable_live_operation): Allow
27261 unhandled SSA copy as well. Demote assert to checking only.
27263 2023-04-21 Richard Biener <rguenther@suse.de>
27265 * df-core.cc (df_analyze): Compute RPO on the reverse graph
27266 for DF_BACKWARD problems.
27267 (loop_post_order_compute): Rename to ...
27268 (loop_rev_post_order_compute): ... this, compute a RPO.
27269 (loop_inverted_post_order_compute): Rename to ...
27270 (loop_inverted_rev_post_order_compute): ... this, compute a RPO.
27271 (df_analyze_loop): Use RPO on the forward graph for DF_FORWARD
27272 problems, RPO on the inverted graph for DF_BACKWARD.
27274 2023-04-21 Richard Biener <rguenther@suse.de>
27276 * cfganal.h (inverted_rev_post_order_compute): Rename
27278 (inverted_post_order_compute): ... this. Add struct function
27279 argument, change allocation to a C array.
27280 * cfganal.cc (inverted_rev_post_order_compute): Likewise.
27281 * lcm.cc (compute_antinout_edge): Adjust.
27282 * lra-lives.cc (lra_create_live_ranges_1): Likewise.
27283 * tree-ssa-dce.cc (remove_dead_stmt): Likewise.
27284 * tree-ssa-pre.cc (compute_antic): Likewise.
27286 2023-04-21 Richard Biener <rguenther@suse.de>
27288 * df.h (df_d::postorder_inverted): Change back to int *,
27290 * df-core.cc (rest_of_handle_df_finish): Adjust.
27291 (df_analyze_1): Likewise.
27292 (df_analyze): For DF_FORWARD problems use RPO on the forward
27294 (loop_inverted_post_order_compute): Adjust API.
27295 (df_analyze_loop): Adjust.
27296 (df_get_n_blocks): Likewise.
27297 (df_get_postorder): Likewise.
27299 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27302 * config/riscv/riscv-vsetvl.cc
27303 (vector_infos_manager::all_empty_predecessor_p): New function.
27304 (pass_vsetvl::backward_demand_fusion): Ditto.
27305 * config/riscv/riscv-vsetvl.h: Ditto.
27307 2023-04-21 Robin Dapp <rdapp@ventanamicro.com>
27310 * config/riscv/generic.md: Change standard names to insn names.
27312 2023-04-21 Richard Biener <rguenther@suse.de>
27314 * lcm.cc (compute_antinout_edge): Use RPO on the inverted graph.
27315 (compute_laterin): Use RPO.
27316 (compute_available): Likewise.
27318 2023-04-21 Peng Fan <fanpeng@loongson.cn>
27320 * config/loongarch/gnu-user.h (MUSL_DYNAMIC_LINKER): Redefine.
27322 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27325 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): New function.
27326 (vector_insn_info::skip_avl_compatible_p): Ditto.
27327 (vector_insn_info::merge): Remove default value.
27328 (pass_vsetvl::compute_local_backward_infos): Ditto.
27329 (pass_vsetvl::cleanup_insns): Add local vsetvl elimination.
27330 * config/riscv/riscv-vsetvl.h: Ditto.
27332 2023-04-20 Alejandro Colomar <alx.manpages@gmail.com>
27334 * doc/extend.texi (Common Function Attributes): Remove duplicate
27337 2023-04-20 Andrew MacLeod <amacleod@redhat.com>
27339 PR tree-optimization/109564
27340 * gimple-range-fold.cc (fold_using_range::range_of_phi): Do no ignore
27341 UNDEFINED range names when deciding if all PHI arguments are the same,
27343 2023-04-20 Jakub Jelinek <jakub@redhat.com>
27345 PR tree-optimization/109011
27346 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): Use
27347 .CTZ (X) = .POPCOUNT ((X - 1) & ~X) in preference to
27348 .CTZ (X) = PREC - .POPCOUNT (X | -X).
27350 2023-04-20 Vladimir N. Makarov <vmakarov@redhat.com>
27352 * lra-constraints.cc (match_reload): Exclude some hard regs for
27353 multi-reg inout reload pseudos used in asm in different mode.
27355 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
27357 * config/arm/arm.cc (thumb1_legitimate_address_p):
27358 Use VIRTUAL_REGISTER_P predicate.
27359 (arm_eliminable_register): Ditto.
27360 * config/avr/avr.md (push<mode>_1): Ditto.
27361 * config/bfin/predicates.md (register_no_elim_operand): Ditto.
27362 * config/h8300/predicates.md (register_no_sp_elim_operand): Ditto.
27363 * config/i386/predicates.md (register_no_elim_operand): Ditto.
27364 * config/iq2000/predicates.md (call_insn_operand): Ditto.
27365 * config/microblaze/microblaze.h (CALL_INSN_OP): Ditto.
27367 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
27370 * config/i386/predicates.md (extract_operator): New predicate.
27371 * config/i386/i386.md (any_extract): Remove code iterator.
27372 (*cmpqi_ext<mode>_1_mem_rex64): Use extract_operator predicate.
27373 (*cmpqi_ext<mode>_1): Ditto.
27374 (*cmpqi_ext<mode>_2): Ditto.
27375 (*cmpqi_ext<mode>_3_mem_rex64): Ditto.
27376 (*cmpqi_ext<mode>_3): Ditto.
27377 (*cmpqi_ext<mode>_4): Ditto.
27378 (*extzvqi_mem_rex64): Ditto.
27380 (*insvqi_2): Ditto.
27381 (*extendqi<SWI24:mode>_ext_1): Ditto.
27382 (*addqi_ext<mode>_0): Ditto.
27383 (*addqi_ext<mode>_1): Ditto.
27384 (*addqi_ext<mode>_2): Ditto.
27385 (*subqi_ext<mode>_0): Ditto.
27386 (*subqi_ext<mode>_2): Ditto.
27387 (*testqi_ext<mode>_1): Ditto.
27388 (*testqi_ext<mode>_2): Ditto.
27389 (*andqi_ext<mode>_0): Ditto.
27390 (*andqi_ext<mode>_1): Ditto.
27391 (*andqi_ext<mode>_1_cc): Ditto.
27392 (*andqi_ext<mode>_2): Ditto.
27393 (*<any_or:code>qi_ext<mode>_0): Ditto.
27394 (*<any_or:code>qi_ext<mode>_1): Ditto.
27395 (*<any_or:code>qi_ext<mode>_2): Ditto.
27396 (*xorqi_ext<mode>_1_cc): Ditto.
27397 (*negqi_ext<mode>_2): Ditto.
27398 (*ashlqi_ext<mode>_2): Ditto.
27399 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
27401 2023-04-20 Raphael Zinsly <rzinsly@ventanamicro.com>
27404 * config/riscv/bitmanip.md (clz, ctz, pcnt, min, max patterns): Use
27405 <bitmanip_insn> as the type to allow for fine grained control of
27406 scheduling these insns.
27407 * config/riscv/generic.md (generic_alu): Add bitmanip, clz, ctz, pcnt,
27409 * config/riscv/riscv.md (type attribute): Add types for clz, ctz,
27410 pcnt, signed and unsigned min/max.
27412 2023-04-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27413 kito-cheng <kito.cheng@sifive.com>
27415 * config/riscv/riscv.h (enum reg_class): Fix RVV register order.
27417 2023-04-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27418 kito-cheng <kito.cheng@sifive.com>
27421 * config/riscv/riscv-vsetvl.cc (count_regno_occurrences): New function.
27422 (pass_vsetvl::cleanup_insns): Fix bug.
27424 2023-04-20 Andrew Stubbs <ams@codesourcery.com>
27426 * config/gcn/gcn-valu.md (vnsi, VnSI): Add scalar modes.
27427 (ldexp<mode>3): Delete.
27428 (ldexp<mode>3<exec>): Change "B" to "A".
27430 2023-04-20 Jakub Jelinek <jakub@redhat.com>
27431 Jonathan Wakely <jwakely@redhat.com>
27433 * tree.h (built_in_function_equal_p): New helper function.
27434 (fndecl_built_in_p): Turn into variadic template to support
27435 1 or more built_in_function arguments.
27436 * builtins.cc (fold_builtin_expect): Use 3 argument fndecl_built_in_p.
27437 * gimplify.cc (goa_stabilize_expr): Likewise.
27438 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
27439 * ipa-fnsummary.cc (compute_fn_summary): Likewise.
27440 * omp-low.cc (setjmp_or_longjmp_p): Likewise.
27441 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
27442 cgraph_update_edges_for_call_stmt_node,
27443 cgraph_edge::verify_corresponds_to_fndecl,
27444 cgraph_node::verify_node): Likewise.
27445 * tree-stdarg.cc (optimize_va_list_gpr_fpr_size): Likewise.
27446 * gimple-ssa-warn-access.cc (matching_alloc_calls_p): Likewise.
27447 * ipa-prop.cc (try_make_edge_direct_virtual_call): Likewise.
27449 2023-04-20 Jakub Jelinek <jakub@redhat.com>
27451 PR tree-optimization/109011
27452 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): New function.
27453 (vect_recog_popcount_clz_ctz_ffs_pattern): Move vect_pattern_detected
27454 call later. Don't punt for IFN_CTZ or IFN_FFS if it doesn't have
27455 direct optab support, but has instead IFN_CLZ, IFN_POPCOUNT or
27456 for IFN_FFS IFN_CTZ support, use vect_recog_ctz_ffs_pattern for that
27458 (vect_vect_recog_func_ptrs): Add ctz_ffs entry.
27460 2023-04-20 Richard Biener <rguenther@suse.de>
27462 * df-core.cc (rest_of_handle_df_initialize): Remove
27463 computation of df->postorder, df->postorder_inverted and
27466 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
27468 * common/config/i386/i386-common.cc
27469 (OPTION_MASK_ISA2_AVX_UNSET): Add OPTION_MASK_ISA2_VAES_UNSET.
27470 (ix86_handle_option): Set AVX flag for VAES.
27471 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
27472 Add OPTION_MASK_ISA2_VAES_UNSET.
27473 (def_builtin): Share builtin between AES and VAES.
27474 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
27476 * config/i386/i386.md (aes): New isa attribute.
27477 * config/i386/sse.md (aesenc): Add pattern for VAES with xmm.
27478 (aesenclast): Ditto.
27480 (aesdeclast): Ditto.
27481 * config/i386/vaesintrin.h: Remove redundant avx target push.
27482 * config/i386/wmmintrin.h (_mm_aesdec_si128): Change to macro.
27483 (_mm_aesdeclast_si128): Ditto.
27484 (_mm_aesenc_si128): Ditto.
27485 (_mm_aesenclast_si128): Ditto.
27487 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
27489 * config/i386/avx2intrin.h
27490 (_MM_REDUCE_OPERATOR_BASIC_EPI16): New macro.
27491 (_MM_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
27492 (_MM256_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
27493 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
27494 (_MM_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
27495 (_MM_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
27496 (_MM256_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
27497 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
27498 (_mm_reduce_add_epi16): New instrinsics.
27499 (_mm_reduce_mul_epi16): Ditto.
27500 (_mm_reduce_and_epi16): Ditto.
27501 (_mm_reduce_or_epi16): Ditto.
27502 (_mm_reduce_max_epi16): Ditto.
27503 (_mm_reduce_max_epu16): Ditto.
27504 (_mm_reduce_min_epi16): Ditto.
27505 (_mm_reduce_min_epu16): Ditto.
27506 (_mm256_reduce_add_epi16): Ditto.
27507 (_mm256_reduce_mul_epi16): Ditto.
27508 (_mm256_reduce_and_epi16): Ditto.
27509 (_mm256_reduce_or_epi16): Ditto.
27510 (_mm256_reduce_max_epi16): Ditto.
27511 (_mm256_reduce_max_epu16): Ditto.
27512 (_mm256_reduce_min_epi16): Ditto.
27513 (_mm256_reduce_min_epu16): Ditto.
27514 (_mm_reduce_add_epi8): Ditto.
27515 (_mm_reduce_mul_epi8): Ditto.
27516 (_mm_reduce_and_epi8): Ditto.
27517 (_mm_reduce_or_epi8): Ditto.
27518 (_mm_reduce_max_epi8): Ditto.
27519 (_mm_reduce_max_epu8): Ditto.
27520 (_mm_reduce_min_epi8): Ditto.
27521 (_mm_reduce_min_epu8): Ditto.
27522 (_mm256_reduce_add_epi8): Ditto.
27523 (_mm256_reduce_mul_epi8): Ditto.
27524 (_mm256_reduce_and_epi8): Ditto.
27525 (_mm256_reduce_or_epi8): Ditto.
27526 (_mm256_reduce_max_epi8): Ditto.
27527 (_mm256_reduce_max_epu8): Ditto.
27528 (_mm256_reduce_min_epi8): Ditto.
27529 (_mm256_reduce_min_epu8): Ditto.
27530 * config/i386/avx512vlbwintrin.h:
27531 (_mm_mask_reduce_add_epi16): Ditto.
27532 (_mm_mask_reduce_mul_epi16): Ditto.
27533 (_mm_mask_reduce_and_epi16): Ditto.
27534 (_mm_mask_reduce_or_epi16): Ditto.
27535 (_mm_mask_reduce_max_epi16): Ditto.
27536 (_mm_mask_reduce_max_epu16): Ditto.
27537 (_mm_mask_reduce_min_epi16): Ditto.
27538 (_mm_mask_reduce_min_epu16): Ditto.
27539 (_mm256_mask_reduce_add_epi16): Ditto.
27540 (_mm256_mask_reduce_mul_epi16): Ditto.
27541 (_mm256_mask_reduce_and_epi16): Ditto.
27542 (_mm256_mask_reduce_or_epi16): Ditto.
27543 (_mm256_mask_reduce_max_epi16): Ditto.
27544 (_mm256_mask_reduce_max_epu16): Ditto.
27545 (_mm256_mask_reduce_min_epi16): Ditto.
27546 (_mm256_mask_reduce_min_epu16): Ditto.
27547 (_mm_mask_reduce_add_epi8): Ditto.
27548 (_mm_mask_reduce_mul_epi8): Ditto.
27549 (_mm_mask_reduce_and_epi8): Ditto.
27550 (_mm_mask_reduce_or_epi8): Ditto.
27551 (_mm_mask_reduce_max_epi8): Ditto.
27552 (_mm_mask_reduce_max_epu8): Ditto.
27553 (_mm_mask_reduce_min_epi8): Ditto.
27554 (_mm_mask_reduce_min_epu8): Ditto.
27555 (_mm256_mask_reduce_add_epi8): Ditto.
27556 (_mm256_mask_reduce_mul_epi8): Ditto.
27557 (_mm256_mask_reduce_and_epi8): Ditto.
27558 (_mm256_mask_reduce_or_epi8): Ditto.
27559 (_mm256_mask_reduce_max_epi8): Ditto.
27560 (_mm256_mask_reduce_max_epu8): Ditto.
27561 (_mm256_mask_reduce_min_epi8): Ditto.
27562 (_mm256_mask_reduce_min_epu8): Ditto.
27564 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
27566 * common/config/i386/i386-common.cc
27567 (OPTION_MASK_ISA_VPCLMULQDQ_SET):
27568 Add OPTION_MASK_ISA_PCLMUL_SET and OPTION_MASK_ISA_AVX_SET.
27569 (OPTION_MASK_ISA_AVX_UNSET):
27570 Add OPTION_MASK_ISA_VPCLMULQDQ_UNSET.
27571 (OPTION_MASK_ISA_PCLMUL_UNSET): Ditto.
27572 * config/i386/i386.md (vpclmulqdqvl): New.
27573 * config/i386/sse.md (pclmulqdq): Add evex encoding.
27574 * config/i386/vpclmulqdqintrin.h: Remove redudant avx target
27577 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
27579 * config/i386/avx512vlbwintrin.h
27580 (_mm_mask_blend_epi16): Remove __OPTIMIZE__ wrapper.
27581 (_mm_mask_blend_epi8): Ditto.
27582 (_mm256_mask_blend_epi16): Ditto.
27583 (_mm256_mask_blend_epi8): Ditto.
27584 * config/i386/avx512vlintrin.h
27585 (_mm256_mask_blend_pd): Ditto.
27586 (_mm256_mask_blend_ps): Ditto.
27587 (_mm256_mask_blend_epi64): Ditto.
27588 (_mm256_mask_blend_epi32): Ditto.
27589 (_mm_mask_blend_pd): Ditto.
27590 (_mm_mask_blend_ps): Ditto.
27591 (_mm_mask_blend_epi64): Ditto.
27592 (_mm_mask_blend_epi32): Ditto.
27593 * config/i386/sse.md (VF_AVX512BWHFBF16): Removed.
27594 (VF_AVX512HFBFVL): Move it before the first usage.
27595 (<avx512>_blendm<mode>): Change iterator from VF_AVX512BWHFBF16
27596 to VF_AVX512HFBFVL.
27598 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
27600 * common/config/i386/i386-common.cc
27601 (OPTION_MASK_ISA_AVX512VBMI2_SET): Change OPTION_MASK_ISA_AVX512F_SET
27602 to OPTION_MASK_ISA_AVX512BW_SET.
27603 (OPTION_MASK_ISA_AVX512F_UNSET):
27604 Remove OPTION_MASK_ISA_AVX512VBMI2_UNSET.
27605 (OPTION_MASK_ISA_AVX512BW_UNSET):
27606 Add OPTION_MASK_ISA_AVX512VBMI2_UNSET.
27607 * config/i386/avx512vbmi2intrin.h: Do not push avx512bw.
27608 * config/i386/avx512vbmi2vlintrin.h: Ditto.
27609 * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_AVX512BW.
27610 * config/i386/sse.md (VI12_AVX512VLBW): Removed.
27611 (VI12_VI48F_AVX512VLBW): Rename to VI12_VI48F_AVX512VL.
27612 (compress<mode>_mask): Change iterator from VI12_AVX512VLBW to
27614 (compressstore<mode>_mask): Ditto.
27615 (expand<mode>_mask): Ditto.
27616 (expand<mode>_maskz): Ditto.
27617 (*expand<mode>_mask): Change iterator from VI12_VI48F_AVX512VLBW to
27618 VI12_VI48F_AVX512VL.
27620 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
27622 * common/config/i386/i386-common.cc
27623 (OPTION_MASK_ISA_AVX512BITALG_SET):
27624 Change OPTION_MASK_ISA_AVX512F_SET
27625 to OPTION_MASK_ISA_AVX512BW_SET.
27626 (OPTION_MASK_ISA_AVX512F_UNSET):
27627 Remove OPTION_MASK_ISA_AVX512BITALG_SET.
27628 (OPTION_MASK_ISA_AVX512BW_UNSET):
27629 Add OPTION_MASK_ISA_AVX512BITALG_SET.
27630 * config/i386/avx512bitalgintrin.h: Do not push avx512bw.
27631 * config/i386/i386-builtin.def:
27632 Remove redundant OPTION_MASK_ISA_AVX512BW.
27633 * config/i386/sse.md (VI1_AVX512VLBW): Removed.
27634 (avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>):
27635 Change the iterator from VI1_AVX512VLBW to VI1_AVX512VL.
27637 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
27639 * config/i386/i386-expand.cc
27640 (ix86_check_builtin_isa_match): Correct wrong comments.
27641 Add a new macro SHARE_BUILTIN and refactor the current if
27644 2023-04-20 Mo, Zewei <zewei.mo@intel.com>
27646 * config/i386/cpuid.h: Open a new section for Extended Features
27647 Leaf (%eax == 7, %ecx == 0) and Extended Features Sub-leaf (%eax == 7,
27650 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
27652 * config/i386/sse.md: Modify insn vperm{i,f}
27655 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
27657 * config/xtensa/xtensa-opts.h: New header.
27658 * config/xtensa/xtensa.h (STRICT_ALIGNMENT): Redefine as
27659 xtensa_strict_align.
27660 * config/xtensa/xtensa.cc (xtensa_option_override): When
27661 -m[no-]strict-align is not specified in the command line set
27662 xtensa_strict_align to 0 if the hardware supports both unaligned
27663 loads and stores or to 1 otherwise.
27664 * config/xtensa/xtensa.opt (mstrict-align): New option.
27665 * doc/invoke.texi (Xtensa Options): Document -m[no-]strict-align.
27667 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
27669 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v4): New
27672 2023-04-19 Andrew Pinski <apinski@marvell.com>
27674 * config/i386/i386.md (*movsicc_noc_zext_1): New pattern.
27676 2023-04-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27678 * config/riscv/riscv-modes.def (FLOAT_MODE): Add chunk 128 support.
27679 (VECTOR_BOOL_MODE): Ditto.
27680 (ADJUST_NUNITS): Ditto.
27681 (ADJUST_ALIGNMENT): Ditto.
27682 (ADJUST_BYTESIZE): Ditto.
27683 (ADJUST_PRECISION): Ditto.
27684 (RVV_MODES): Ditto.
27685 (VECTOR_MODE_WITH_PREFIX): Ditto.
27686 * config/riscv/riscv-v.cc (ENTRY): Ditto.
27687 (get_vlmul): Ditto.
27688 (get_ratio): Ditto.
27689 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
27690 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
27691 (vbool64_t): Ditto.
27692 (vbool32_t): Ditto.
27693 (vbool16_t): Ditto.
27698 (vint8mf8_t): Ditto.
27699 (vuint8mf8_t): Ditto.
27700 (vint8mf4_t): Ditto.
27701 (vuint8mf4_t): Ditto.
27702 (vint8mf2_t): Ditto.
27703 (vuint8mf2_t): Ditto.
27704 (vint8m1_t): Ditto.
27705 (vuint8m1_t): Ditto.
27706 (vint8m2_t): Ditto.
27707 (vuint8m2_t): Ditto.
27708 (vint8m4_t): Ditto.
27709 (vuint8m4_t): Ditto.
27710 (vint8m8_t): Ditto.
27711 (vuint8m8_t): Ditto.
27712 (vint16mf4_t): Ditto.
27713 (vuint16mf4_t): Ditto.
27714 (vint16mf2_t): Ditto.
27715 (vuint16mf2_t): Ditto.
27716 (vint16m1_t): Ditto.
27717 (vuint16m1_t): Ditto.
27718 (vint16m2_t): Ditto.
27719 (vuint16m2_t): Ditto.
27720 (vint16m4_t): Ditto.
27721 (vuint16m4_t): Ditto.
27722 (vint16m8_t): Ditto.
27723 (vuint16m8_t): Ditto.
27724 (vint32mf2_t): Ditto.
27725 (vuint32mf2_t): Ditto.
27726 (vint32m1_t): Ditto.
27727 (vuint32m1_t): Ditto.
27728 (vint32m2_t): Ditto.
27729 (vuint32m2_t): Ditto.
27730 (vint32m4_t): Ditto.
27731 (vuint32m4_t): Ditto.
27732 (vint32m8_t): Ditto.
27733 (vuint32m8_t): Ditto.
27734 (vint64m1_t): Ditto.
27735 (vuint64m1_t): Ditto.
27736 (vint64m2_t): Ditto.
27737 (vuint64m2_t): Ditto.
27738 (vint64m4_t): Ditto.
27739 (vuint64m4_t): Ditto.
27740 (vint64m8_t): Ditto.
27741 (vuint64m8_t): Ditto.
27742 (vfloat32mf2_t): Ditto.
27743 (vfloat32m1_t): Ditto.
27744 (vfloat32m2_t): Ditto.
27745 (vfloat32m4_t): Ditto.
27746 (vfloat32m8_t): Ditto.
27747 (vfloat64m1_t): Ditto.
27748 (vfloat64m2_t): Ditto.
27749 (vfloat64m4_t): Ditto.
27750 (vfloat64m8_t): Ditto.
27751 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
27752 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Ditto.
27753 (riscv_convert_vector_bits): Ditto.
27754 * config/riscv/riscv.md:
27755 * config/riscv/vector-iterators.md:
27756 * config/riscv/vector.md
27757 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
27758 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
27759 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
27760 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
27761 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
27762 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
27763 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
27764 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
27765 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
27767 2023-04-19 Pan Li <pan2.li@intel.com>
27769 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
27770 Align IOR (A | (~A) -> -1) optimization MODE_CLASS condition to AND.
27772 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
27776 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64): New insn pattern.
27777 (*cmpqi_ext<mode>_1): Use nonimmediate_operand predicate
27778 for operand 0. Use any_extract code iterator.
27779 (*cmpqi_ext<mode>_1 peephole2): New peephole2 pattern.
27780 (*cmpqi_ext<mode>_2): Use any_extract code iterator.
27781 (*cmpqi_ext<mode>_3_mem_rex64): New insn pattern.
27782 (*cmpqi_ext<mode>_1): Use general_operand predicate
27783 for operand 1. Use any_extract code iterator.
27784 (*cmpqi_ext<mode>_3 peephole2): New peephole2 pattern.
27785 (*cmpqi_ext<mode>_4): Use any_extract code iterator.
27787 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27789 * config/aarch64/aarch64-simd.md (aarch64_saddw2<mode>): Delete.
27790 (aarch64_uaddw2<mode>): Delete.
27791 (aarch64_ssubw2<mode>): Delete.
27792 (aarch64_usubw2<mode>): Delete.
27793 (aarch64_<ANY_EXTEND:su><ADDSUB:optab>w2<mode>): New define_expand.
27795 2023-04-19 Richard Biener <rguenther@suse.de>
27797 * tree-ssa-structalias.cc (do_ds_constraint): Use
27798 solve_add_graph_edge.
27800 2023-04-19 Richard Biener <rguenther@suse.de>
27802 * tree-ssa-structalias.cc (solve_add_graph_edge): New function,
27804 (do_sd_constraint): ... here.
27806 2023-04-19 Richard Biener <rguenther@suse.de>
27808 * tree-cfg.cc (gimple_can_merge_blocks_p): Remove condition
27809 rejecting the merge when A contains only a non-local label.
27811 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
27813 * rtl.h (VIRTUAL_REGISTER_P): New predicate.
27814 (VIRTUAL_REGISTER_NUM_P): Ditto.
27815 (REGNO_PTR_FRAME_P): Use VIRTUAL_REGISTER_NUM_P predicate.
27816 * expr.cc (force_operand): Use VIRTUAL_REGISTER_P predicate.
27817 * function.cc (instantiate_decl_rtl): Ditto.
27818 * rtlanal.cc (rtx_addr_can_trap_p_1): Ditto.
27819 (nonzero_address_p): Ditto.
27820 (refers_to_regno_p): Use VIRTUAL_REGISTER_NUM_P predicate.
27822 2023-04-19 Aldy Hernandez <aldyh@redhat.com>
27824 * value-range.h (Value_Range::Value_Range): Avoid pointer sharing.
27826 2023-04-19 Richard Biener <rguenther@suse.de>
27828 * system.h (auto_mpz::operator->()): New.
27829 * realmpfr.h (auto_mpfr::operator->()): New.
27830 * builtins.cc (do_mpfr_lgamma_r): Use auto_mpfr.
27831 * real.cc (real_from_string): Likewise.
27832 (dconst_e_ptr): Likewise.
27833 (dconst_sqrt2_ptr): Likewise.
27834 * tree-ssa-loop-niter.cc (refine_value_range_using_guard):
27836 (bound_difference_of_offsetted_base): Likewise.
27837 (number_of_iterations_ne): Likewise.
27838 (number_of_iterations_lt_to_ne): Likewise.
27839 * ubsan.cc: Include realmpfr.h.
27840 (ubsan_instrument_float_cast): Use auto_mpfr.
27842 2023-04-19 Richard Biener <rguenther@suse.de>
27844 * tree-ssa-structalias.cc (solve_graph): Remove self-copy
27845 edges, remove edges from escaped after special-casing them.
27847 2023-04-19 Richard Biener <rguenther@suse.de>
27849 * tree-ssa-structalias.cc (do_sd_constraint): Fixup escape
27852 2023-04-19 Richard Biener <rguenther@suse.de>
27854 * tree-ssa-structalias.cc (do_sd_constraint): Do not write
27855 to the LHS varinfo solution member.
27857 2023-04-19 Richard Biener <rguenther@suse.de>
27859 * tree-ssa-structalias.cc (topo_visit): Look at the real
27860 destination of edges.
27862 2023-04-19 Richard Biener <rguenther@suse.de>
27864 PR tree-optimization/44794
27865 * tree-ssa-loop-manip.cc (tree_transform_and_unroll_loop):
27866 If an epilogue loop is required set its iteration upper bound.
27868 2023-04-19 Xi Ruoyao <xry111@xry111.site>
27871 * config/loongarch/loongarch-protos.h
27872 (loongarch_expand_block_move): Add a parameter as alignment RTX.
27873 * config/loongarch/loongarch.h:
27874 (LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER): Remove.
27875 (LARCH_MAX_MOVE_BYTES_STRAIGHT): Remove.
27876 (LARCH_MAX_MOVE_OPS_PER_LOOP_ITER): Define.
27877 (LARCH_MAX_MOVE_OPS_STRAIGHT): Define.
27878 (MOVE_RATIO): Use LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
27879 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
27880 * config/loongarch/loongarch.cc (loongarch_expand_block_move):
27881 Take the alignment from the parameter, but set it to
27882 UNITS_PER_WORD if !TARGET_STRICT_ALIGN. Limit the length of
27883 straight-line implementation with LARCH_MAX_MOVE_OPS_STRAIGHT
27884 instead of LARCH_MAX_MOVE_BYTES_STRAIGHT.
27885 (loongarch_block_move_straight): When there are left-over bytes,
27886 half the mode size instead of falling back to byte mode at once.
27887 (loongarch_block_move_loop): Limit the length of loop body with
27888 LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
27889 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
27890 * config/loongarch/loongarch.md (cpymemsi): Pass the alignment
27891 to loongarch_expand_block_move.
27893 2023-04-19 Xi Ruoyao <xry111@xry111.site>
27895 * config/loongarch/loongarch.cc
27896 (loongarch_setup_incoming_varargs): Don't save more GARs than
27897 cfun->va_list_gpr_size / UNITS_PER_WORD.
27899 2023-04-19 Richard Biener <rguenther@suse.de>
27901 * tree-ssa-loop-manip.cc (determine_exit_conditions): Fix
27902 no epilogue condition.
27904 2023-04-19 Richard Biener <rguenther@suse.de>
27906 * gimple.h (gimple_assign_load): Outline...
27907 * gimple.cc (gimple_assign_load): ... here. Avoid
27908 get_base_address and instead just strip the outermost
27909 handled component, treating a remaining handled component
27912 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27914 * config/aarch64/aarch64-simd-builtins.def (neg): Delete builtins
27916 * config/aarch64/arm_fp16.h (vnegh_f16): Reimplement using normal negation.
27918 2023-04-19 Jakub Jelinek <jakub@redhat.com>
27920 PR tree-optimization/109011
27921 * tree-vect-patterns.cc (vect_recog_popcount_pattern): Rename to ...
27922 (vect_recog_popcount_clz_ctz_ffs_pattern): ... this. Handle also
27923 CLZ, CTZ and FFS. Remove vargs variable, use
27924 gimple_build_call_internal rather than gimple_build_call_internal_vec.
27925 (vect_vect_recog_func_ptrs): Adjust popcount entry.
27927 2023-04-19 Jakub Jelinek <jakub@redhat.com>
27930 * dse.cc (replace_read): If read_reg is a SUBREG of a word mode
27931 REG, for WORD_REGISTER_OPERATIONS copy SUBREG_REG of it into
27932 a new REG rather than the SUBREG.
27934 2023-04-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
27936 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set_zero<mode>):
27939 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27942 * config/aarch64/aarch64.cc (aarch64_rtx_costs): Merge ASHIFT and
27943 ROTATE, ROTATERT, LSHIFTRT, ASHIFTRT cases. Handle subregs in op1.
27945 2023-04-19 Richard Biener <rguenther@suse.de>
27947 PR rtl-optimization/109237
27948 * cse.cc (insn_live_p): Remove NEXT_INSN walk, instead check
27949 TREE_VISITED on INSN_VAR_LOCATION_DECL.
27950 (delete_trivially_dead_insns): Maintain TREE_VISITED on
27951 active debug bind INSN_VAR_LOCATION_DECL.
27953 2023-04-19 Richard Biener <rguenther@suse.de>
27955 PR rtl-optimization/109237
27956 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
27958 2023-04-19 Christophe Lyon <christophe.lyon@arm.com>
27960 * doc/install.texi (enable-decimal-float): Add AArch64.
27962 2023-04-19 liuhongt <hongtao.liu@intel.com>
27964 PR rtl-optimization/109351
27965 * ira.cc (setup_class_subset_and_memory_move_costs): Check
27966 hard_regno_mode_ok before setting lowest memory move cost for
27967 the mode with different reg classes.
27969 2023-04-18 Jason Merrill <jason@redhat.com>
27971 * doc/invoke.texi: Remove stray @gol.
27973 2023-04-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
27975 * ifcvt.cc (cond_move_process_if_block): Consider the result of
27976 targetm.noce_conversion_profitable_p() when replacing the original
27977 sequence with the converted one.
27979 2023-04-18 Mark Harmstone <mark@harmstone.com>
27981 * common.opt (gcodeview): Add new option.
27982 * gcc.cc (driver_handle_option); Handle OPT_gcodeview.
27983 * opts.cc (command_handle_option): Similarly.
27984 * doc/invoke.texi: Add documentation for -gcodeview.
27986 2023-04-18 Andrew Pinski <apinski@marvell.com>
27988 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove declaration.
27989 (make_pass_phiopt): Make execute out of line.
27990 (tree_ssa_cs_elim): Move code into ...
27991 (pass_cselim::execute): here.
27993 2023-04-18 Sam James <sam@gentoo.org>
27995 * system.h: Drop unused INCLUDE_PTHREAD_H.
27997 2023-04-18 Kevin Lee <kevinl@rivosinc.com>
27999 * tree-vect-data-refs.cc (vect_grouped_store_supported): Add new
28002 2023-04-18 Sinan Lin <sinan.lin@linux.alibaba.com>
28004 * config/riscv/bitmanip.md (rotr<mode>3 expander): Enable for ZBKB.
28005 (bswapdi2, bswapsi2): Similarly.
28007 2023-04-18 Uros Bizjak <ubizjak@gmail.com>
28010 * config/i386/i386-builtin.def (__builtin_ia32_insertps128):
28011 Use CODE_FOR_sse4_1_insertps_v4sf.
28012 * config/i386/i386-expand.cc (expand_vec_perm_insertps): New.
28013 (expand_vec_perm_1): Call expand_vec_per_insertps.
28014 * config/i386/i386.md ("unspec"): Declare UNSPEC_INSERTPS here.
28015 * config/i386/mmx.md (mmxscalarmode): New mode attribute.
28016 (@sse4_1_insertps_<mode>): New insn pattern.
28017 * config/i386/sse.md (@sse4_1_insertps_<mode>): Macroize insn
28018 pattern from sse4_1_insertps using VI4F_128 mode iterator.
28020 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
28022 * value-range.cc (gt_ggc_mx): New.
28024 * value-range.h (class vrange): Add GTY marker.
28025 (class frange): Same.
28026 (gt_ggc_mx): Remove.
28027 (gt_pch_nx): Remove.
28029 2023-04-18 Victor L. Do Nascimento <victor.donascimento@arm.com>
28031 * lra-constraints.cc (constraint_unique): New.
28032 (process_address_1): Apply constraint_unique test.
28033 * recog.cc (constrain_operands): Allow relaxed memory
28036 2023-04-18 Kito Cheng <kito.cheng@sifive.com>
28038 * doc/extend.texi (Target Builtins): Add RISC-V Vector
28040 (RISC-V Vector Intrinsics): Document GCC implemented which
28041 version of RISC-V vector intrinsics and its reference.
28043 2023-04-18 Richard Biener <rguenther@suse.de>
28045 PR middle-end/108786
28046 * bitmap.h (bitmap_clear_first_set_bit): New.
28047 * bitmap.cc (bitmap_first_set_bit_worker): Rename from
28048 bitmap_first_set_bit and add optional clearing of the bit.
28049 (bitmap_first_set_bit): Wrap bitmap_first_set_bit_worker.
28050 (bitmap_clear_first_set_bit): Likewise.
28051 * df-core.cc (df_worklist_dataflow_doublequeue): Use
28052 bitmap_clear_first_set_bit.
28053 * graphite-scop-detection.cc (scop_detection::merge_sese):
28055 * sanopt.cc (sanitize_asan_mark_unpoison): Likewise.
28056 (sanitize_asan_mark_poison): Likewise.
28057 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Likewise.
28058 * tree-into-ssa.cc (rewrite_blocks): Likewise.
28059 * tree-ssa-dce.cc (simple_dce_from_worklist): Likewise.
28060 * tree-ssa-sccvn.cc (do_rpo_vn_1): Likewise.
28062 2023-04-18 Richard Biener <rguenther@suse.de>
28064 * tree-ssa-structalias.cc (dump_sa_stats): Split out from...
28065 (dump_sa_points_to_info): ... this function.
28066 (compute_points_to_sets): Guard large dumps with TDF_DETAILS,
28067 and call dump_sa_stats guarded with TDF_STATS.
28068 (ipa_pta_execute): Likewise.
28069 (compute_may_aliases): Guard dump_alias_info with
28070 TDF_DETAILS|TDF_ALIAS.
28072 2023-04-18 Andrew Pinski <apinski@marvell.com>
28074 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Dump
28075 the expression that is being tried when TDF_FOLDING
28077 (phiopt_worker::match_simplify_replacement): Dump
28078 the sequence which was created by gimple_simplify_phiopt
28079 when TDF_FOLDING is true.
28081 2023-04-18 Andrew Pinski <apinski@marvell.com>
28083 * tree-ssa-phiopt.cc (match_simplify_replacement):
28084 Simplify code that does the movement slightly.
28086 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28088 * config/aarch64/aarch64.md (@aarch64_rev16<mode>): Change to
28090 (rev16<mode>2): Rename to...
28091 (aarch64_rev16<mode>2_alt1): ... This.
28092 (rev16<mode>2_alt): Rename to...
28093 (*aarch64_rev16<mode>2_alt2): ... This.
28095 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
28097 * emit-rtl.cc (init_emit_once): Initialize dconstm0.
28098 * gimple-range-op.cc (class cfn_signbit): Remove dconstm0
28100 * range-op-float.cc (zero_range): Use dconstm0.
28101 (zero_to_inf_range): Same.
28102 * real.h (dconstm0): New.
28103 * value-range.cc (frange::flush_denormals_to_zero): Use dconstm0.
28104 (frange::set_zero): Do not declare dconstm0.
28106 2023-04-18 Richard Biener <rguenther@suse.de>
28108 * system.h (class auto_mpz): New,
28109 * realmpfr.h (class auto_mpfr): Likewise.
28110 * fold-const-call.cc (do_mpfr_arg1): Use auto_mpfr.
28111 (do_mpfr_arg2): Likewise.
28112 * tree-ssa-loop-niter.cc (bound_difference): Use auto_mpz;
28114 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28116 * config/aarch64/aarch64-builtins.cc (aarch64_init_simd_intrinsics): Take
28117 builtin flags from intrinsic data rather than hardcoded FLAG_AUTO_FP.
28119 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
28121 * value-range.cc (frange::operator==): Adjust for NAN.
28122 (range_tests_nan): Remove some NAN tests.
28124 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
28126 * inchash.cc (hash::add_real_value): New.
28127 * inchash.h (class hash): Add add_real_value.
28128 * value-range.cc (add_vrange): New.
28129 * value-range.h (inchash::add_vrange): New.
28131 2023-04-18 Richard Biener <rguenther@suse.de>
28133 PR tree-optimization/109539
28134 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
28135 Re-implement pointer relatedness for PHIs.
28137 2023-04-18 Andrew Stubbs <ams@codesourcery.com>
28139 * config/gcn/gcn-valu.md (SV_SFDF): New iterator.
28140 (SV_FP): New iterator.
28141 (scalar_mode, SCALAR_MODE): Add identity mappings for scalar modes.
28142 (recip<mode>2): Unify the two patterns using SV_FP.
28143 (div_scale<mode><exec_vcc>): New insn.
28144 (div_fmas<mode><exec>): New insn.
28145 (div_fixup<mode><exec>): New insn.
28146 (div<mode>3): Unify the two expanders and rewrite using hardfp.
28147 * config/gcn/gcn.cc (gcn_md_reorg): Support "vccwait" attribute.
28148 * config/gcn/gcn.md (unspec): Add UNSPEC_DIV_SCALE, UNSPEC_DIV_FMAS,
28149 and UNSPEC_DIV_FIXUP.
28150 (vccwait): New attribute.
28152 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28154 * config/aarch64/aarch64.cc (aarch64_validate_mcpu): Add hint to use -march
28155 if the argument matches that.
28157 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28159 * config/aarch64/atomics.md
28160 (*aarch64_atomic_load<ALLX:mode>_rcpc_zext):
28161 Use SD_HSDI for destination mode iterator.
28163 2023-04-18 Jin Ma <jinma@linux.alibaba.com>
28165 * common/config/riscv/riscv-common.cc (multi_letter_subset_rank): Swap the order
28166 of z-extensions and s-extensions.
28167 (riscv_subset_list::parse): Likewise.
28169 2023-04-18 Jakub Jelinek <jakub@redhat.com>
28171 PR tree-optimization/109240
28172 * match.pd (fneg/fadd): Rewrite such that it handles both plus as
28173 first vec_perm operand and minus as second using fneg/fadd and
28174 minus as first vec_perm operand and plus as second using fneg/fsub.
28176 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
28178 * data-streamer.cc (bp_pack_real_value): New.
28179 (bp_unpack_real_value): New.
28180 * data-streamer.h (bp_pack_real_value): New.
28181 (bp_unpack_real_value): New.
28182 * tree-streamer-in.cc (unpack_ts_real_cst_value_fields): Use
28183 bp_unpack_real_value.
28184 * tree-streamer-out.cc (pack_ts_real_cst_value_fields): Use
28185 bp_pack_real_value.
28187 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
28189 * wide-int.h (WIDE_INT_MAX_HWIS): New.
28190 (class fixed_wide_int_storage): Use it.
28191 (trailing_wide_ints <N>::set_precision): Use it.
28192 (trailing_wide_ints <N>::extra_size): Use it.
28194 2023-04-18 Xi Ruoyao <xry111@xry111.site>
28196 * config/loongarch/loongarch-protos.h
28197 (loongarch_addu16i_imm12_operand_p): New function prototype.
28198 (loongarch_split_plus_constant): Likewise.
28199 * config/loongarch/loongarch.cc
28200 (loongarch_addu16i_imm12_operand_p): New function.
28201 (loongarch_split_plus_constant): Likewise.
28202 * config/loongarch/loongarch.h (ADDU16I_OPERAND): New macro.
28203 (DUAL_IMM12_OPERAND): Likewise.
28204 (DUAL_ADDU16I_OPERAND): Likewise.
28205 * config/loongarch/constraints.md (La, Lb, Lc, Ld, Le): New
28207 * config/loongarch/predicates.md (const_dual_imm12_operand): New
28209 (const_addu16i_operand): Likewise.
28210 (const_addu16i_imm12_di_operand): Likewise.
28211 (const_addu16i_imm12_si_operand): Likewise.
28212 (plus_di_operand): Likewise.
28213 (plus_si_operand): Likewise.
28214 (plus_si_extend_operand): Likewise.
28215 * config/loongarch/loongarch.md (add<mode>3): Convert to
28216 define_insn_and_split. Use plus_<mode>_operand predicate
28217 instead of arith_operand. Add alternatives for La, Lb, Lc, Ld,
28218 and Le constraints.
28219 (*addsi3_extended): Convert to define_insn_and_split. Use
28220 plus_si_extend_operand instead of arith_operand. Add
28221 alternatives for La and Le alternatives.
28223 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
28225 * value-range.h (Value_Range::Value_Range): New.
28226 (Value_Range::contains_p): New.
28228 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
28230 * value-range.h (class vrange): Make m_discriminator const.
28231 (class irange): Make m_max_ranges const. Adjust constructors
28233 (class unsupported_range): Construct vrange appropriately.
28234 (class frange): Same.
28236 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
28238 * config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Remove the macro
28241 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
28243 * doc/extend.texi: Add section for LoongArch Base Built-in functions.
28245 2023-04-18 Fei Gao <gaofei@eswincomputing.com>
28247 * config/riscv/riscv.cc (riscv_first_stack_step): Make codes more
28249 (riscv_expand_epilogue): Likewise.
28251 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
28253 * config/riscv/riscv.cc (riscv_expand_prologue): Consider save-restore in
28255 (riscv_expand_epilogue): Consider save-restore in stack deallocation.
28257 2023-04-17 Andrew Pinski <apinski@marvell.com>
28259 * tree-ssa-phiopt.cc (gate_hoist_loads): Remove
28262 2023-04-17 Aldy Hernandez <aldyh@redhat.com>
28264 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Do not export
28267 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
28269 * config/riscv/riscv.cc (riscv_first_stack_step): Add a new function
28270 parameter remaining_size.
28271 (riscv_compute_frame_info): Adapt new riscv_first_stack_step interface.
28272 (riscv_expand_prologue): Likewise.
28273 (riscv_expand_epilogue): Likewise.
28275 2023-04-17 Feng Wang <wangfeng@eswincomputing.com>
28277 * config/riscv/bitmanip.md (rotrsi3_sext): Support generating
28278 roriw for constant counts.
28279 * rtl.h (reverse_rotate_by_imm_p): Add function declartion
28280 * simplify-rtx.cc (reverse_rotate_by_imm_p): New function.
28281 (simplify_context::simplify_binary_operation_1): Use it.
28282 * expmed.cc (expand_shift_1): Likewise.
28284 2023-04-17 Martin Jambor <mjambor@suse.cz>
28288 * cgraph.h (symtab_node::find_reference): Add parameter use_type.
28289 * ipa-prop.h (ipa_pass_through_data): New flag refdesc_decremented.
28290 (ipa_zap_jf_refdesc): New function.
28291 (ipa_get_jf_pass_through_refdesc_decremented): Likewise.
28292 (ipa_set_jf_pass_through_refdesc_decremented): Likewise.
28293 * ipa-cp.cc (ipcp_discover_new_direct_edges): Provide a value for
28294 the new parameter of find_reference.
28295 (adjust_references_in_caller): Likewise. Make sure the constant jump
28296 function is not used to decrement a refdec counter again. Only
28297 decrement refdesc counters when the pass_through jump function allows
28298 it. Added a detailed dump when decrementing refdesc counters.
28299 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Dump new flag.
28300 (ipa_set_jf_simple_pass_through): Initialize the new flag.
28301 (ipa_set_jf_unary_pass_through): Likewise.
28302 (ipa_set_jf_arith_pass_through): Likewise.
28303 (remove_described_reference): Provide a value for the new parameter of
28305 (update_jump_functions_after_inlining): Zap refdesc of new jfunc if
28306 the previous pass_through had a flag mandating that we do so.
28307 (propagate_controlled_uses): Likewise. Only decrement refdesc
28308 counters when the pass_through jump function allows it.
28309 (ipa_edge_args_sum_t::duplicate): Provide a value for the new
28310 parameter of find_reference.
28311 (ipa_write_jump_function): Assert the new flag does not have to be
28313 * symtab.cc (symtab_node::find_reference): Add parameter use_type, use
28316 2023-04-17 Philipp Tomsich <philipp.tomsich@vrull.eu>
28317 Di Zhao <di.zhao@amperecomputing.com>
28319 * config/aarch64/aarch64-tuning-flags.def (AARCH64_EXTRA_TUNING_OPTION):
28320 Add AARCH64_EXTRA_TUNE_NO_LDP_COMBINE.
28321 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp):
28322 Check for the above tuning option when processing loads.
28324 2023-04-17 Richard Biener <rguenther@suse.de>
28326 PR tree-optimization/109524
28327 * tree-vrp.cc (remove_unreachable::m_list): Change to a
28328 vector of pairs of block indices.
28329 (remove_unreachable::maybe_register_block): Adjust.
28330 (remove_unreachable::remove_and_update_globals): Likewise.
28331 Deal with removed blocks.
28333 2023-04-16 Jeff Law <jlaw@ventanamicro>
28336 * config/riscv/riscv.cc (riscv_expand_conditional_move): For
28337 TARGET_SFB_ALU, force the true arm into a register.
28339 2023-04-15 John David Anglin <danglin@gcc.gnu.org>
28342 * config/pa/pa-protos.h (pa_function_arg_size): Update prototype.
28343 * config/pa/pa.cc (pa_function_arg): Return NULL_RTX if argument
28345 (pa_arg_partial_bytes): Don't call pa_function_arg_size twice.
28346 (pa_function_arg_size): Change return type to int. Return zero
28347 for arguments larger than 1 GB. Update comments.
28349 2023-04-15 Jakub Jelinek <jakub@redhat.com>
28351 PR tree-optimization/109154
28352 * tree-if-conv.cc (predicate_scalar_phi): For complex PHIs, emit just
28353 args_len - 1 COND_EXPRs rather than args_len. Formatting fix.
28355 2023-04-15 Jason Merrill <jason@redhat.com>
28358 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
28359 Overhaul lhs_ref.ref analysis.
28361 2023-04-14 Richard Biener <rguenther@suse.de>
28363 PR tree-optimization/109502
28364 * tree-vect-stmts.cc (vectorizable_assignment): Fix
28365 check for conversion between mask and non-mask types.
28367 2023-04-14 Jeff Law <jlaw@ventanamicro.com>
28368 Jakub Jelinek <jakub@redhat.com>
28372 * combine.cc (simplify_and_const_int_1): Compute nonzero_bits in
28373 word_mode rather than mode if WORD_REGISTER_OPERATIONS and mode is
28374 smaller than word_mode.
28375 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1)
28376 <case AND>: Likewise.
28378 2023-04-14 Jakub Jelinek <jakub@redhat.com>
28380 * loop-iv.cc (iv_number_of_iterations): Use gen_int_mode instead
28383 2023-04-13 Andrew MacLeod <amacleod@redhat.com>
28385 PR tree-optimization/108139
28386 PR tree-optimization/109462
28387 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Remove
28388 equivalency check for PHI nodes.
28389 * gimple-range-fold.cc (fold_using_range::range_of_phi): Ensure def
28390 does not dominate single-arg equivalency edges.
28392 2023-04-13 Richard Sandiford <richard.sandiford@arm.com>
28395 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Do
28396 not trust TYPE_ALIGN for pointer types; use POINTER_SIZE instead.
28398 2023-04-13 Richard Biener <rguenther@suse.de>
28400 PR tree-optimization/109491
28401 * tree-ssa-sccvn.cc (expressions_equal_p): Restore the
28402 NULL operands test.
28404 2023-04-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28407 * config/riscv/riscv-vector-builtins-types.def (vint8mf8_t): Fix predicate.
28408 (vint16mf4_t): Ditto.
28409 (vint32mf2_t): Ditto.
28410 (vint64m1_t): Ditto.
28411 (vint64m2_t): Ditto.
28412 (vint64m4_t): Ditto.
28413 (vint64m8_t): Ditto.
28414 (vuint8mf8_t): Ditto.
28415 (vuint16mf4_t): Ditto.
28416 (vuint32mf2_t): Ditto.
28417 (vuint64m1_t): Ditto.
28418 (vuint64m2_t): Ditto.
28419 (vuint64m4_t): Ditto.
28420 (vuint64m8_t): Ditto.
28421 (vfloat32mf2_t): Ditto.
28422 (vbool64_t): Ditto.
28423 * config/riscv/riscv-vector-builtins.cc (register_builtin_type): Add comments.
28424 (register_vector_type): Ditto.
28425 (check_required_extensions): Fix condition.
28426 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ZVE64): Remove it.
28427 (RVV_REQUIRE_ELEN_64): New define.
28428 (RVV_REQUIRE_MIN_VLEN_64): Ditto.
28429 * config/riscv/riscv-vector-switch.def (TARGET_VECTOR_FP32): Remove it.
28430 (TARGET_VECTOR_FP64): Ditto.
28431 (ENTRY): Fix predicate.
28432 * config/riscv/vector-iterators.md: Fix predicate.
28434 2023-04-12 Jakub Jelinek <jakub@redhat.com>
28436 PR tree-optimization/109410
28437 * tree-ssa-reassoc.cc (build_and_add_sum): Split edge from entry
28438 block if first statement of the function is a call to returns_twice
28441 2023-04-12 Jakub Jelinek <jakub@redhat.com>
28444 * config/i386/i386.cc: Include rtl-error.h.
28445 (ix86_print_operand): For z modifier warning, use warning_for_asm
28446 if this_is_asm_operands. For Z modifier errors, use %c and code
28447 instead of hardcoded Z.
28449 2023-04-12 Costas Argyris <costas.argyris@gmail.com>
28451 * config/i386/x-mingw32-utf8: Remove extrataneous $@
28453 2023-04-12 Andrew MacLeod <amacleod@redhat.com>
28455 PR tree-optimization/109462
28456 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Don't
28457 check for equivalences if NAME is a phi node.
28459 2023-04-12 Richard Biener <rguenther@suse.de>
28461 PR tree-optimization/109473
28462 * tree-vect-loop.cc (vect_create_epilog_for_reduction):
28463 Convert scalar result to the computation type before performing
28464 the reduction adjustment.
28466 2023-04-12 Richard Biener <rguenther@suse.de>
28468 PR tree-optimization/109469
28469 * tree-vect-slp.cc (vect_slp_function): Skip region starts with
28470 a returns-twice call.
28472 2023-04-12 Richard Biener <rguenther@suse.de>
28474 PR tree-optimization/109434
28475 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Properly
28476 handle possibly throwing calls when processing the LHS
28477 and may-defs are not OK.
28479 2023-04-11 Lin Sinan <mynameisxiaou@gmail.com>
28481 * config/riscv/predicates.md (uimm_extra_bit_or_twobits): Adjust
28482 predicate to avoid splitting arith constants.
28484 2023-04-11 Yanzhang Wang <yanzhang.wang@intel.com>
28485 Pan Li <pan2.li@intel.com>
28486 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28487 Kito Cheng <kito.cheng@sifive.com>
28490 * config/riscv/riscv-protos.h (emit_hard_vlmax_vsetvl): New.
28491 * config/riscv/riscv-v.cc (emit_hard_vlmax_vsetvl): New.
28492 (emit_vlmax_vsetvl): Use emit_hard_vlmax_vsetvl.
28493 * config/riscv/riscv.cc (vector_zero_call_used_regs): New.
28494 (riscv_zero_call_used_regs): New.
28495 (TARGET_ZERO_CALL_USED_REGS): New.
28497 2023-04-11 Martin Liska <mliska@suse.cz>
28500 * opts.cc (finish_options): Drop also
28501 x_flag_var_tracking_assignments.
28503 2023-04-11 Andre Vieira <andre.simoesdiasvieira@arm.com>
28505 PR tree-optimization/108888
28506 * tree-if-conv.cc (predicate_statements): Fix gimple call check.
28508 2023-04-11 Haochen Gui <guihaoc@gcc.gnu.org>
28511 * config/rs6000/vsx.md (vsx_sign_extend_qi_<mode>): Rename to...
28512 (vsx_sign_extend_v16qi_<mode>): ... this.
28513 (vsx_sign_extend_hi_<mode>): Rename to...
28514 (vsx_sign_extend_v8hi_<mode>): ... this.
28515 (vsx_sign_extend_si_v2di): Rename to...
28516 (vsx_sign_extend_v4si_v2di): ... this.
28517 (vsignextend_qi_<mode>): Remove.
28518 (vsignextend_hi_<mode>): Remove.
28519 (vsignextend_si_v2di): Remove.
28520 (vsignextend_v2di_v1ti): Remove.
28521 (*xxspltib_<mode>_split): Replace gen_vsx_sign_extend_qi_v2di with
28522 gen_vsx_sign_extend_v16qi_v2di and gen_vsx_sign_extend_qi_v4si
28523 with gen_vsx_sign_extend_v16qi_v4si.
28524 * config/rs6000/rs6000.md (split for DI constant generation):
28525 Replace gen_vsx_sign_extend_qi_si with gen_vsx_sign_extend_v16qi_si.
28526 (split for HSDI constant generation): Replace gen_vsx_sign_extend_qi_di
28527 with gen_vsx_sign_extend_v16qi_di and gen_vsx_sign_extend_qi_si
28528 with gen_vsx_sign_extend_v16qi_si.
28529 * config/rs6000/rs6000-builtins.def (__builtin_altivec_vsignextsb2d):
28530 Set bif-pattern to vsx_sign_extend_v16qi_v2di.
28531 (__builtin_altivec_vsignextsb2w): Set bif-pattern to
28532 vsx_sign_extend_v16qi_v4si.
28533 (__builtin_altivec_visgnextsh2d): Set bif-pattern to
28534 vsx_sign_extend_v8hi_v2di.
28535 (__builtin_altivec_vsignextsh2w): Set bif-pattern to
28536 vsx_sign_extend_v8hi_v4si.
28537 (__builtin_altivec_vsignextsw2d): Set bif-pattern to
28538 vsx_sign_extend_si_v2di.
28539 (__builtin_altivec_vsignext): Set bif-pattern to
28540 vsx_sign_extend_v2di_v1ti.
28541 * config/rs6000/rs6000-builtin.cc (lxvrse_expand_builtin): Replace
28542 gen_vsx_sign_extend_qi_v2di with gen_vsx_sign_extend_v16qi_v2di,
28543 gen_vsx_sign_extend_hi_v2di with gen_vsx_sign_extend_v8hi_v2di and
28544 gen_vsx_sign_extend_si_v2di with gen_vsx_sign_extend_v4si_v2di.
28546 2023-04-10 Michael Meissner <meissner@linux.ibm.com>
28549 * config/rs6000/vsx.md (vsx_fmav4sf4): Do not generate vmaddfp.
28550 (vsx_nfmsv4sf4): Do not generate vnmsubfp.
28552 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
28554 * config/i386/i386.h (PTA_GRANITERAPIDS): Add PTA_AMX_COMPLEX.
28556 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
28558 * common/config/i386/cpuinfo.h (get_available_features):
28559 Detect AMX-COMPLEX.
28560 * common/config/i386/i386-common.cc
28561 (OPTION_MASK_ISA2_AMX_COMPLEX_SET,
28562 OPTION_MASK_ISA2_AMX_COMPLEX_UNSET): New.
28563 (ix86_handle_option): Handle -mamx-complex.
28564 * common/config/i386/i386-cpuinfo.h (enum processor_features):
28565 Add FEATURE_AMX_COMPLEX.
28566 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
28568 * config.gcc: Add amxcomplexintrin.h.
28569 * config/i386/cpuid.h (bit_AMX_COMPLEX): New.
28570 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
28572 * config/i386/i386-isa.def (AMX_COMPLEX): Add DEF_PTA(AMX_COMPLEX).
28573 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
28574 Handle amx-complex.
28575 * config/i386/i386.opt: Add option -mamx-complex.
28576 * config/i386/immintrin.h: Include amxcomplexintrin.h.
28577 * doc/extend.texi: Document amx-complex.
28578 * doc/invoke.texi: Document -mamx-complex.
28579 * doc/sourcebuild.texi: Document target amx-complex.
28580 * config/i386/amxcomplexintrin.h: New file.
28582 2023-04-08 Jakub Jelinek <jakub@redhat.com>
28584 PR tree-optimization/109392
28585 * tree-vect-generic.cc (tree_vec_extract): Handle failure
28586 of maybe_push_res_to_seq better.
28588 2023-04-08 Jakub Jelinek <jakub@redhat.com>
28590 * Makefile.in (CORETYPES_H): Depend on align.h, poly-int.h and
28592 (SYSTEM_H): Depend on $(HASHTAB_H).
28593 * config/riscv/t-riscv (build/genrvv-type-indexer.o): Remove unused
28594 dependency on $(RTL_BASE_H), remove redundant dependency on
28597 2023-04-06 Richard Earnshaw <rearnsha@arm.com>
28600 * config/arm/arm.cc (arm_effective_regno): New function.
28601 (mve_vector_mem_operand): Use it.
28603 2023-04-06 Andrew MacLeod <amacleod@redhat.com>
28605 PR tree-optimization/109417
28606 * gimple-range-gori.cc (gori_compute::may_recompute_p): Check if
28607 dependency is in SSA_NAME_FREE_LIST.
28609 2023-04-06 Andrew Pinski <apinski@marvell.com>
28611 PR tree-optimization/109427
28612 * params.opt (-param=vect-induction-float=):
28613 Fix option attribute typo for IntegerRange.
28615 2023-04-05 Jeff Law <jlaw@ventanamicro>
28618 * combine.cc (combine_instructions): Force re-recognition when
28619 after restoring the body of an insn to its original form.
28621 2023-04-05 Martin Jambor <mjambor@suse.cz>
28624 * ipa-sra.cc (zap_useless_ipcp_results): New function.
28625 (process_isra_node_results): Call it.
28627 2023-04-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28629 * config/riscv/vector.md: Fix incorrect operand order.
28631 2023-04-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28633 * config/riscv/riscv-vsetvl.cc
28634 (pass_vsetvl::compute_local_backward_infos): Update user vsetvl in local
28637 2023-04-05 Li Xu <xuli1@eswincomputing.com>
28639 * config/riscv/riscv-vector-builtins.def: Fix typo.
28640 * config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Ditto.
28641 * config/riscv/vector-iterators.md: Ditto.
28643 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
28645 * doc/md.texi (Including Patterns): Fix page break.
28647 2023-04-04 Jakub Jelinek <jakub@redhat.com>
28649 PR tree-optimization/109386
28650 * range-op-float.cc (foperator_lt::op1_range, foperator_lt::op2_range,
28651 foperator_le::op1_range, foperator_le::op2_range,
28652 foperator_gt::op1_range, foperator_gt::op2_range,
28653 foperator_ge::op1_range, foperator_ge::op2_range): Make r varying for
28654 BRS_FALSE case even if the other op is maybe_isnan, not just
28656 (foperator_unordered_lt::op1_range, foperator_unordered_lt::op2_range,
28657 foperator_unordered_le::op1_range, foperator_unordered_le::op2_range,
28658 foperator_unordered_gt::op1_range, foperator_unordered_gt::op2_range,
28659 foperator_unordered_ge::op1_range, foperator_unordered_ge::op2_range):
28660 Make r varying for BRS_TRUE case even if the other op is maybe_isnan,
28661 not just known_isnan.
28663 2023-04-04 Marek Polacek <polacek@redhat.com>
28665 PR sanitizer/109107
28666 * fold-const.cc (fold_binary_loc): Use TYPE_OVERFLOW_SANITIZED
28668 * match.pd: Use TYPE_OVERFLOW_SANITIZED.
28670 2023-04-04 Stam Markianos-Wright <stam.markianos-wright@arm.com>
28672 * config/arm/mve.md (mve_vcvtq_n_to_f_<supf><mode>): Swap operands.
28673 (mve_vcreateq_f<mode>): Swap operands.
28675 2023-04-04 Andrew Stubbs <ams@codesourcery.com>
28677 * config/gcn/gcn-valu.md (one_cmpl<mode>2<exec>): New.
28679 2023-04-04 Jakub Jelinek <jakub@redhat.com>
28682 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
28683 Reword diagnostics about zfinx conflict with f, formatting fixes.
28685 2023-04-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
28687 * config/sol2.h (LIB_SPEC): Don't link with -lpthread.
28689 2023-04-04 Richard Biener <rguenther@suse.de>
28691 PR tree-optimization/109304
28692 * tree-profile.cc (tree_profiling): Use symtab node
28693 availability to decide whether to skip adjusting calls.
28694 Do not adjust calls to internal functions.
28696 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
28699 * config/rs6000/rs6000.cc (rs6000_expand_vector_set_var_p9): Fix gen
28700 function for permutation control vector by considering big endianness.
28702 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
28705 * config/rs6000/altivec.md (*p9v_parity<mode>2): Rename to ...
28706 (rs6000_vprtyb<mode>2): ... this.
28707 * config/rs6000/rs6000-builtins.def (VPRTYBD): Replace parityv2di2 with
28708 rs6000_vprtybv2di2.
28709 (VPRTYBW): Replace parityv4si2 with rs6000_vprtybv4si2.
28710 (VPRTYBQ): Replace parityv1ti2 with rs6000_vprtybv1ti2.
28711 * config/rs6000/vector.md (parity<mode>2 with VEC_IP): Expand with
28712 popcountv16qi2 and the corresponding rs6000_vprtyb<mode>2.
28714 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
28715 Sandra Loosemore <sandra@codesourcery.com>
28717 * doc/md.texi (Insn Splitting): Tweak wording for readability.
28719 2023-04-03 Martin Jambor <mjambor@suse.cz>
28722 * ipa-prop.cc (determine_known_aggregate_parts): Check that the
28723 offset + size will be representable in unsigned int.
28725 2023-04-03 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
28727 * configure.ac (ZSTD_LIB): Move before zstd.h check.
28728 Unset gcc_cv_header_zstd_h without libzstd.
28729 * configure: Regenerate.
28731 2023-04-03 Martin Liska <mliska@suse.cz>
28733 * doc/invoke.texi: Document new param.
28735 2023-04-03 Cupertino Miranda <cupertino.miranda@oracle.com>
28737 * doc/sourcebuild.texi (const_volatile_readonly_section): Document
28738 new check_effective_target function.
28740 2023-04-03 Li Xu <xuli1@eswincomputing.com>
28742 * config/riscv/riscv-vector-builtins.def (vuint32m8_t): Fix typo.
28743 (vfloat32m8_t): Likewise
28745 2023-04-03 liuhongt <hongtao.liu@intel.com>
28747 * doc/md.texi: Document signbitm2.
28749 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28750 kito-cheng <kito.cheng@sifive.com>
28752 * config/riscv/vector.md: Fix RA constraint.
28754 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28756 * config/riscv/riscv-protos.h (gen_avl_for_scalar_move): New function.
28757 * config/riscv/riscv-v.cc (gen_avl_for_scalar_move): New function.
28758 * config/riscv/vector.md: Fix scalar move bug.
28760 2023-04-01 Jakub Jelinek <jakub@redhat.com>
28762 * range-op-float.cc (foperator_equal::fold_range): If at least
28763 one of the op ranges is not singleton and neither is NaN and all
28764 4 bounds are zero, return [1, 1].
28765 (foperator_not_equal::fold_range): In the same case return [0, 0].
28767 2023-04-01 Jakub Jelinek <jakub@redhat.com>
28769 * range-op-float.cc (foperator_equal::fold_range): Perform the
28770 non-singleton handling regardless of maybe_isnan (op1, op2).
28771 (foperator_not_equal::fold_range): Likewise.
28772 (foperator_lt::fold_range, foperator_le::fold_range,
28773 foperator_gt::fold_range, foperator_ge::fold_range): Perform the
28774 real_* comparison check which results in range_false (type)
28775 even if maybe_isnan (op1, op2). Simplify.
28776 (foperator_ltgt): New class.
28777 (fop_ltgt): New variable.
28778 (floating_op_table::floating_op_table): Handle LTGT_EXPR using
28781 2023-04-01 Jakub Jelinek <jakub@redhat.com>
28784 * builtins.cc (apply_args_size): If targetm.calls.get_raw_arg_mode
28785 returns VOIDmode, handle it like if the register isn't used for
28786 passing arguments at all.
28787 (apply_result_size): If targetm.calls.get_raw_result_mode returns
28788 VOIDmode, handle it like if the register isn't used for returning
28790 * target.def (get_raw_result_mode, get_raw_arg_mode): Document what it
28791 means to return VOIDmode.
28792 * doc/tm.texi: Regenerated.
28793 * config/aarch64/aarch64.cc (aarch64_function_value_regno_p): Return
28794 TARGET_SVE for P0_REGNUM.
28795 (aarch64_function_arg_regno_p): Also return true for p0-p3.
28796 (aarch64_get_reg_raw_mode): Return VOIDmode for PR_REGNUM_P regs.
28798 2023-03-31 Vladimir N. Makarov <vmakarov@redhat.com>
28800 * lra-constraints.cc: (combine_reload_insn): New function.
28802 2023-03-31 Jakub Jelinek <jakub@redhat.com>
28804 PR tree-optimization/91645
28805 * range-op-float.cc (foperator_unordered_lt::fold_range,
28806 foperator_unordered_le::fold_range,
28807 foperator_unordered_gt::fold_range,
28808 foperator_unordered_ge::fold_range,
28809 foperator_unordered_equal::fold_range): Call the ordered
28810 fold_range on ranges with cleared NaNs.
28811 * value-query.cc (range_query::get_tree_range): Handle also
28812 COMPARISON_CLASS_P trees.
28814 2023-03-31 Kito Cheng <kito.cheng@sifive.com>
28815 Andrew Pinski <pinskia@gmail.com>
28818 * config/riscv/t-riscv: Add missing dependencies.
28820 2023-03-31 liuhongt <hongtao.liu@intel.com>
28822 * config/i386/i386.cc (inline_memory_move_cost): Return 100
28823 for MASK_REGS when MODE_SIZE > 8.
28825 2023-03-31 liuhongt <hongtao.liu@intel.com>
28828 * config/i386/i386-builtin.def (BDESC): Adjust icode name from
28829 ufloat/ufix to floatuns/fixuns.
28830 * config/i386/i386-expand.cc
28831 (ix86_expand_vector_convert_uns_vsivsf): Adjust comments.
28832 * config/i386/sse.md
28833 (ufloat<sseintvecmodelower><mode>2<mask_name><round_name>):
28835 (<mask_codefor>floatuns<sseintvecmodelower><mode>2<mask_name><round_name>):.. this.
28836 (<mask_codefor><avx512>_ufix_notrunc<sf2simodelower><mode><mask_name><round_name>):
28838 (<mask_codefor><avx512>_fixuns_notrunc<sf2simodelower><mode><mask_name><round_name>):
28840 (<fixsuffix>fix_truncv16sfv16si2<mask_name><round_saeonly_name>):
28842 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):.. this.
28843 (ufloat<si2dfmodelower><mode>2<mask_name>): Renamed to ..
28844 (floatuns<si2dfmodelower><mode>2<mask_name>): .. this.
28845 (ufloatv2siv2df2<mask_name>): Renamed to ..
28846 (<mask_codefor>floatunsv2siv2df2<mask_name>): .. this.
28847 (ufix_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
28849 (fixuns_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
28851 (ufix_notruncv2dfv2si2): Renamed to ..
28852 (fixuns_notruncv2dfv2si2):.. this.
28853 (ufix_notruncv2dfv2si2_mask): Renamed to ..
28854 (fixuns_notruncv2dfv2si2_mask): .. this.
28855 (*ufix_notruncv2dfv2si2_mask_1): Renamed to ..
28856 (*fixuns_notruncv2dfv2si2_mask_1): .. this.
28857 (ufix_truncv2dfv2si2): Renamed to ..
28858 (*fixuns_truncv2dfv2si2): .. this.
28859 (ufix_truncv2dfv2si2_mask): Renamed to ..
28860 (fixuns_truncv2dfv2si2_mask): .. this.
28861 (*ufix_truncv2dfv2si2_mask_1): Renamed to ..
28862 (*fixuns_truncv2dfv2si2_mask_1): .. this.
28863 (ufix_truncv4dfv4si2<mask_name>): Renamed to ..
28864 (fixuns_truncv4dfv4si2<mask_name>): .. this.
28865 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
28867 (fixuns_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
28869 (ufix_trunc<mode><sseintvecmodelower>2<mask_name>): Renamed to ..
28870 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
28873 2023-03-30 Andrew MacLeod <amacleod@redhat.com>
28875 PR tree-optimization/109154
28876 * gimple-range-gori.cc (gori_compute::may_recompute_p): Add depth limit.
28877 * gimple-range-gori.h (may_recompute_p): Add depth param.
28878 * params.opt (ranger-recompute-depth): New param.
28880 2023-03-30 Jason Merrill <jason@redhat.com>
28884 * cgraph.h: Move reset() from cgraph_node to symtab_node.
28885 * cgraphunit.cc (symtab_node::reset): Adjust. Also call
28886 remove_from_same_comdat_group.
28888 2023-03-30 Richard Biener <rguenther@suse.de>
28890 PR tree-optimization/107561
28891 * gimple-ssa-warn-access.cc (get_size_range): Add flags
28892 argument and pass it on.
28893 (check_access): When querying for the size range pass
28894 SR_ALLOW_ZERO when the known destination size is zero.
28896 2023-03-30 Richard Biener <rguenther@suse.de>
28898 PR tree-optimization/109342
28899 * tree-ssa-sccvn.cc (vn_nary_op_get_predicated_value): New
28900 overload for edge. When that edge is a backedge use
28901 dominated_by_p directly.
28903 2023-03-30 liuhongt <hongtao.liu@intel.com>
28905 * config/i386/i386-expand.cc (expand_vec_perm_blend): Generate
28906 vpblendd instead of vpblendw for V4SI under avx2.
28908 2023-03-29 Hans-Peter Nilsson <hp@axis.com>
28910 * config/cris/cris.cc (cris_rtx_costs) [CONST_INT]: Return 0
28911 for many quick operands, for register-sized modes.
28913 2023-03-29 Jiawei <jiawei@iscas.ac.cn>
28915 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
28918 2023-03-29 Martin Liska <mliska@suse.cz>
28920 PR bootstrap/109310
28921 * configure.ac: Emit a warning for deprecated option
28922 --enable-link-mutex.
28923 * configure: Regenerate.
28925 2023-03-29 Richard Biener <rguenther@suse.de>
28927 PR tree-optimization/109331
28928 * tree-ssa-forwprop.cc (pass_forwprop::execute): When we
28929 discover a taken edge make sure to cleanup the CFG.
28931 2023-03-29 Richard Biener <rguenther@suse.de>
28933 PR tree-optimization/109327
28934 * tree-ssa-forwprop.cc (pass_forwprop::execute): Deal with
28935 already removed stmts when draining to_remove.
28937 2023-03-29 Richard Biener <rguenther@suse.de>
28940 * dwarf2out.cc (lookup_type_die): Reset TREE_ASM_WRITTEN
28941 so we can re-create the DIE for the type if required.
28943 2023-03-29 Jakub Jelinek <jakub@redhat.com>
28944 Richard Biener <rguenther@suse.de>
28946 PR tree-optimization/109301
28947 * tree-ssa-math-opts.cc (pass_data_cse_sincos): Change
28948 properties_provided from PROP_gimple_opt_math to 0.
28949 (pass_data_expand_powcabs): Change properties_provided from 0 to
28950 PROP_gimple_opt_math.
28952 2023-03-29 Richard Biener <rguenther@suse.de>
28954 PR tree-optimization/109154
28955 * tree-if-conv.cc (gen_phi_arg_condition): Handle single
28956 inverted condition specially by inverting at the caller.
28957 (gen_phi_arg_condition): Swap COND_EXPR arms if requested.
28959 2023-03-28 David Malcolm <dmalcolm@redhat.com>
28962 * diagnostic-show-locus.cc (column_range::column_range): Factor
28963 out assertion conditional into...
28964 (column_range::valid_p): ...this new function.
28965 (line_corrections::add_hint): Don't attempt to consolidate hints
28966 if it would lead to invalid column_range instances.
28968 2023-03-28 Kito Cheng <kito.cheng@sifive.com>
28971 * config/riscv/riscv-c.cc (riscv_ext_version_value): New.
28972 (riscv_cpu_cpp_builtins): Define __riscv_v_intrinsic and
28975 2023-03-28 Alexander Monakov <amonakov@ispras.ru>
28977 PR rtl-optimization/109187
28978 * haifa-sched.cc (autopref_rank_for_schedule): Avoid use of overflowing
28979 subtraction in three-way comparison.
28981 2023-03-28 Andrew MacLeod <amacleod@redhat.com>
28983 PR tree-optimization/109265
28984 PR tree-optimization/109274
28985 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
28986 not create a relation record is op1 and op2 are the same symbol.
28987 (gori_compute::compute_operand1_range): Pass op1 == op2 to the
28988 handler for this stmt, but create a new record only if this statement
28989 generates a relation based on the ranges.
28990 (gori_compute::compute_operand2_range): Ditto.
28991 * value-relation.h (value_relation::set_relation): Always create the
28992 record that is requested.
28994 2023-03-28 Richard Biener <rguenther@suse.de>
28996 PR tree-optimization/107087
28997 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
28998 executable regions to avoid useless work and to better
28999 propagate degenerate PHIs.
29001 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
29003 * config/i386/x-mingw32-utf8: update comments.
29005 2023-03-28 Richard Sandiford <richard.sandiford@arm.com>
29008 * config/aarch64/aarch64-protos.h (aarch64_vector_load_decl): Declare.
29009 * config/aarch64/aarch64.h (machine_function::vector_load_decls): New
29011 * config/aarch64/aarch64-builtins.cc (aarch64_record_vector_load_arg):
29013 (aarch64_general_gimple_fold_builtin): Delay folding of vld1 until
29014 after inlining. Record which decls are loaded from. Fix handling
29015 of vops for loads and stores.
29016 * config/aarch64/aarch64.cc (aarch64_vector_load_decl): New function.
29017 (aarch64_accesses_vector_load_decl_p): Likewise.
29018 (aarch64_vector_costs::m_stores_to_vector_load_decl): New member
29020 (aarch64_vector_costs::add_stmt_cost): If the function has a vld1
29021 that loads from a decl, treat vector stores to those decls as
29023 (aarch64_vector_costs::finish_cost): ...and in that case,
29024 if the vector code does nothing more than a store, give the
29025 prologue a zero cost as well.
29027 2023-03-28 Richard Biener <rguenther@suse.de>
29030 PR tree-optimization/108129
29031 * genmatch.cc (lower_for): For (match ...) delay
29032 substituting into the match operator if possible.
29033 (dt_operand::gen_gimple_expr): For user_id look at the
29034 first substitute for determining how to access operands.
29035 (dt_operand::gen_generic_expr): Likewise.
29036 (dt_node::gen_kids): Properly sort user_ids according
29037 to their substitutes.
29038 (dt_node::gen_kids_1): Code-generate user_id matching.
29040 2023-03-28 Jakub Jelinek <jakub@redhat.com>
29041 Jonathan Wakely <jwakely@redhat.com>
29043 * gcov-tool.cc (do_merge, do_merge_stream, do_rewrite, do_overlap):
29044 Use subcommand rather than sub-command in function comments.
29046 2023-03-28 Jakub Jelinek <jakub@redhat.com>
29048 PR tree-optimization/109154
29049 * value-range.h (frange::flush_denormals_to_zero): Make it public
29050 rather than private.
29051 * value-range.cc (frange::set): Don't call flush_denormals_to_zero
29053 * range-op-float.cc (range_operator_float::fold_range): Call
29054 flush_denormals_to_zero.
29056 2023-03-28 Jakub Jelinek <jakub@redhat.com>
29058 PR middle-end/106190
29059 * sanopt.cc (pass_sanopt::execute): Return TODO_cleanup_cfg if any
29060 of the IFN_{UB,HWA,A}SAN_* internal fns are lowered.
29062 2023-03-28 Jakub Jelinek <jakub@redhat.com>
29064 * range-op-float.cc (float_widen_lhs_range): Use pass get_nan_state
29065 as 4th argument to set to avoid clear_nan and union_ calls.
29067 2023-03-28 Jakub Jelinek <jakub@redhat.com>
29070 * config/i386/i386.cc (assign_386_stack_local): For DImode
29071 with SLOT_FLOATxFDI_387 and -m32 -mpreferred-stack-boundary=2 pass
29072 align 32 rather than 0 to assign_stack_local.
29074 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
29077 * config/sparc/sparc.cc (sparc_expand_vcond): Call signed_condition
29078 on operand #3 to get the final condition code. Use std::swap.
29079 * config/sparc/sparc.md (vcondv8qiv8qi): New VIS 4 expander.
29080 (fucmp<gcond:code>8<P:mode>_vis): Move around.
29081 (fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis): Likewise.
29082 (vcondu<GCM:mode><GCM:mode>): New VIS 4 expander.
29084 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
29086 * doc/gm2.texi: Add missing Next, Previous and Top fields to most
29087 top-level sections.
29089 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
29091 * config.host: Pull in i386/x-mingw32-utf8 Makefile
29092 fragment and reference utf8rc-mingw32.o explicitly
29094 * config/i386/sym-mingw32.cc: prevent name mangling of
29096 * config/i386/x-mingw32-utf8: Make utf8rc-mingw32.o
29097 depend on manifest file explicitly.
29099 2023-03-28 Richard Biener <rguenther@suse.de>
29102 2023-03-27 Richard Biener <rguenther@suse.de>
29104 PR rtl-optimization/109237
29105 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
29107 2023-03-28 Richard Biener <rguenther@suse.de>
29109 * common.opt (gdwarf): Remove Negative(gdwarf-).
29111 2023-03-28 Richard Biener <rguenther@suse.de>
29113 * common.opt (gdwarf): Add RejectNegative.
29114 (gdwarf-): Likewise.
29118 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
29120 * config/cris/constraints.md ("T"): Correct to
29121 define_memory_constraint.
29123 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
29125 * config/cris/cris.md (BW2): New mode-iterator.
29126 (lra_szext_decomposed, lra_szext_decomposed_indirect_with_offset): New
29129 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
29131 * config/cris/cris.md ("*add<mode>3_addi"): Improve to bail only
29132 for possible eliminable compares.
29134 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
29136 * config/cris/constraints.md ("R"): Remove unused constraint.
29138 2023-03-27 Jonathan Wakely <jwakely@redhat.com>
29140 PR gcov-profile/109297
29141 * gcov-tool.cc (merge_usage): Fix "subcomand" typo.
29142 (merge_stream_usage): Likewise.
29143 (overlap_usage): Likewise.
29145 2023-03-27 Christoph Müllner <christoph.muellner@vrull.eu>
29148 * config/riscv/thead.md: Add missing mode specifiers.
29150 2023-03-27 Philipp Tomsich <philipp.tomsich@vrull.eu>
29151 Jiangning Liu <jiangning.liu@amperecomputing.com>
29152 Manolis Tsamis <manolis.tsamis@vrull.eu>
29154 * config/aarch64/aarch64.cc: Update vector costs for ampere1.
29156 2023-03-27 Richard Biener <rguenther@suse.de>
29158 PR rtl-optimization/109237
29159 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
29161 2023-03-27 Richard Biener <rguenther@suse.de>
29164 * lto-wrapper.cc (run_gcc): Parse alternate debug options
29165 as well, they always enable debug.
29167 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
29170 * config/rs6000/emmintrin.h (_mm_bslli_si128): Move the implementation
29172 (_mm_slli_si128): ... here. Change to call _mm_bslli_si128 directly.
29174 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
29177 * config/rs6000/emmintrin.h (_mm_bslli_si128): Check __N is not less
29178 than zero when calling vec_sld.
29179 (_mm_bsrli_si128): Return __A if __N is zero, check __N is bigger than
29180 zero when calling vec_sld.
29181 (_mm_slli_si128): Return __A if _imm5 is zero, check _imm5 is bigger
29182 than zero when calling vec_sld.
29184 2023-03-27 Sandra Loosemore <sandra@codesourcery.com>
29186 * doc/generic.texi (OpenMP): Document OMP_SIMD, OMP_DISTRIBUTE,
29187 OMP_TASKLOOP, and OMP_LOOP with OMP_FOR. Document how collapsed
29188 loops are represented and which fields are vectors. Add
29189 documentation for OMP_FOR_PRE_BODY field. Document internal
29190 form of non-rectangular loops and OMP_FOR_NON_RECTANGULAR.
29191 * tree.def (OMP_FOR): Make documentation consistent with the
29192 Texinfo manual, to fill some gaps and correct errors.
29194 2023-03-26 Andreas Schwab <schwab@linux-m68k.org>
29197 * config/m68k/m68k.h (FINAL_PRESCAN_INSN): Define.
29198 * config/m68k/m68k.cc (m68k_final_prescan_insn): Define.
29199 (handle_move_double): Call it before handle_movsi.
29200 * config/m68k/m68k-protos.h: Declare it.
29202 2023-03-26 Jakub Jelinek <jakub@redhat.com>
29204 PR tree-optimization/109230
29205 * match.pd (fneg/fadd simplify): Verify also odd permutation indexes.
29207 2023-03-26 Jakub Jelinek <jakub@redhat.com>
29210 * predict.cc (compute_function_frequency): Don't call
29211 warn_function_cold if function already has cold attribute.
29213 2023-03-26 Gerald Pfeifer <gerald@pfeifer.com>
29215 * doc/install.texi: Remove anachronistic note
29216 related to languages built and separate source tarballs.
29218 2023-03-25 David Malcolm <dmalcolm@redhat.com>
29221 * diagnostic-format-sarif.cc (read_until_eof): Delete.
29222 (maybe_read_file): Delete.
29223 (sarif_builder::maybe_make_artifact_content_object): Use
29224 get_source_file_content rather than maybe_read_file.
29225 Reject it if it's not valid UTF-8.
29226 * input.cc (file_cache_slot::get_full_file_content): New.
29227 (get_source_file_content): New.
29228 (selftest::check_cpp_valid_utf8_p): New.
29229 (selftest::test_cpp_valid_utf8_p): New.
29230 (selftest::input_cc_tests): Call selftest::test_cpp_valid_utf8_p.
29231 * input.h (get_source_file_content): New prototype.
29233 2023-03-24 David Malcolm <dmalcolm@redhat.com>
29235 * doc/analyzer.texi (Debugging the Analyzer): Add notes on useful
29237 (Special Functions for Debugging the Analyzer): Convert to a
29238 table, and rewrite in places.
29239 (Other Debugging Techniques): Add notes on how to compare two
29240 different exploded graphs.
29242 2023-03-24 David Malcolm <dmalcolm@redhat.com>
29245 * json.cc: Update comments to indicate that we now preserve
29246 insertion order of keys within objects.
29247 (object::print): Traverse keys in insertion order.
29248 (object::set): Preserve insertion order of keys.
29249 (selftest::test_writing_objects): Add an additional key to verify
29250 that we preserve insertion order.
29251 * json.h (object::m_keys): New field.
29253 2023-03-24 Andrew MacLeod <amacleod@redhat.com>
29255 PR tree-optimization/109238
29256 * gimple-range-cache.cc (ranger_cache::resolve_dom): Ignore
29257 predecessors which this block dominates.
29259 2023-03-24 Richard Biener <rguenther@suse.de>
29261 PR tree-optimization/106912
29262 * tree-profile.cc (tree_profiling): Update stmts only when
29263 profiling or testing coverage. Make sure to update calls
29264 fntype, stripping 'const' there.
29266 2023-03-24 Jakub Jelinek <jakub@redhat.com>
29268 PR middle-end/109258
29269 * builtins.cc (inline_expand_builtin_bytecmp): Return NULL_RTX early
29270 if target == const0_rtx.
29272 2023-03-24 Alexandre Oliva <oliva@adacore.com>
29274 * doc/sourcebuild.texi (weak_undefined, posix_memalign):
29275 Document options and effective targets.
29277 2023-03-24 Costas Argyris <costas.argyris@gmail.com>
29279 * config/i386/x-mingw32-utf8: Make HOST_EXTRA_OBJS_SYMBOL
29282 2023-03-23 Pat Haugen <pthaugen@linux.ibm.com>
29284 * config/rs6000/rs6000.md (*mod<mode>3, umod<mode>3): Add
29285 non-earlyclobber alternative.
29287 2023-03-23 Andrew Pinski <apinski@marvell.com>
29290 * fold-const.cc (maybe_lvalue_p): Treat COMPOUND_LITERAL_EXPR
29293 2023-03-23 Richard Biener <rguenther@suse.de>
29295 PR tree-optimization/107569
29296 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt):
29297 Do not push SSA names with zero uses as available leader.
29298 (process_bb): Likewise.
29300 2023-03-23 Richard Biener <rguenther@suse.de>
29302 PR tree-optimization/109262
29303 * tree-ssa-forwprop.cc (pass_forwprop::execute): When
29304 combining a piecewise complex load avoid touching loads
29305 that throw internally. Use fun, not cfun throughout.
29307 2023-03-23 Jakub Jelinek <jakub@redhat.com>
29309 * value-range.cc (irange::irange_union, irange::intersect): Fix
29310 comment spelling bugs.
29311 * gimple-range-trace.cc (range_tracer::do_header): Likewise.
29312 * gimple-range-trace.h: Likewise.
29313 * gimple-range-edge.cc: Likewise.
29314 (gimple_outgoing_range_stmt_p,
29315 gimple_outgoing_range::switch_edge_range,
29316 gimple_outgoing_range::edge_range_p): Likewise.
29317 * gimple-range.cc (gimple_ranger::prefill_stmt_dependencies,
29318 gimple_ranger::fold_stmt, gimple_ranger::register_transitive_infer,
29319 assume_query::assume_query, assume_query::calculate_phi): Likewise.
29320 * gimple-range-edge.h: Likewise.
29321 * value-range.h (Value_Range::set, Value_Range::lower_bound,
29322 Value_Range::upper_bound, frange::set_undefined): Likewise.
29323 * gimple-range-gori.h (range_def_chain::depend, gori_map::m_outgoing,
29324 gori_compute): Likewise.
29325 * gimple-range-fold.h (fold_using_range): Likewise.
29326 * gimple-range-path.cc (path_range_query::compute_ranges_in_phis):
29328 * gimple-range-gori.cc (range_def_chain::in_chain_p,
29329 range_def_chain::dump, gori_map::calculate_gori,
29330 gori_compute::compute_operand_range_switch,
29331 gori_compute::logical_combine, gori_compute::refine_using_relation,
29332 gori_compute::compute_operand1_range, gori_compute::may_recompute_p):
29334 * gimple-range.h: Likewise.
29335 (enable_ranger): Likewise.
29336 * range-op.h (empty_range_varying): Likewise.
29337 * value-query.h (value_query): Likewise.
29338 * gimple-range-cache.cc (block_range_cache::set_bb_range,
29339 block_range_cache::dump, ssa_global_cache::clear_global_range,
29340 temporal_cache::temporal_value, temporal_cache::current_p,
29341 ranger_cache::range_of_def, ranger_cache::propagate_updated_value,
29342 ranger_cache::range_from_dom, ranger_cache::register_inferred_value):
29344 * gimple-range-fold.cc (fur_edge::get_phi_operand,
29345 fur_stmt::get_operand, gimple_range_adjustment,
29346 fold_using_range::range_of_phi,
29347 fold_using_range::relation_fold_and_or): Likewise.
29348 * value-range-storage.h (irange_storage_slot::MAX_INTS): Likewise.
29349 * value-query.cc (range_query::value_of_expr,
29350 range_query::value_on_edge, range_query::query_relation): Likewise.
29351 * tree-vrp.cc (remove_unreachable::remove_and_update_globals,
29352 intersect_range_with_nonzero_bits): Likewise.
29353 * gimple-range-infer.cc (gimple_infer_range::check_assume_func,
29354 exit_range): Likewise.
29355 * value-relation.h: Likewise.
29356 (equiv_oracle, relation_trio::relation_trio, value_relation,
29357 value_relation::value_relation, pe_min): Likewise.
29358 * range-op-float.cc (range_operator_float::rv_fold,
29359 frange_arithmetic, foperator_unordered_equal::op1_range,
29360 foperator_div::rv_fold): Likewise.
29361 * gimple-range-op.cc (cfn_clz::fold_range): Likewise.
29362 * value-relation.cc (equiv_oracle::query_relation,
29363 equiv_oracle::register_equiv, equiv_oracle::add_equiv_to_block,
29364 value_relation::apply_transitive, relation_chain_head::find_relation,
29365 dom_oracle::query_relation, dom_oracle::find_relation_block,
29366 dom_oracle::find_relation_dom, path_oracle::register_equiv): Likewise.
29367 * range-op.cc (range_operator::wi_fold_in_parts_equiv,
29368 create_possibly_reversed_range, adjust_op1_for_overflow,
29369 operator_mult::wi_fold, operator_exact_divide::op1_range,
29370 operator_cast::lhs_op1_relation, operator_cast::fold_pair,
29371 operator_cast::fold_range, operator_abs::wi_fold, range_op_cast_tests,
29372 range_op_lshift_tests): Likewise.
29374 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
29376 * config/gcn/gcn.cc (gcn_class_max_nregs): Handle vectors in SGPRs.
29377 (move_callee_saved_registers): Detect the bug condition early.
29379 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
29381 * config/gcn/gcn-protos.h (gcn_stepped_zero_int_parallel_p): New.
29382 * config/gcn/gcn-valu.md (V_1REG_ALT): New.
29384 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): New.
29385 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): New.
29386 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Use new patterns.
29387 * config/gcn/gcn.cc (gcn_stepped_zero_int_parallel_p): New.
29388 * config/gcn/predicates.md (ascending_zero_int_parallel): New.
29390 2023-03-23 Jakub Jelinek <jakub@redhat.com>
29392 PR tree-optimization/109176
29393 * tree-vect-generic.cc (expand_vector_condition): If a has
29394 vector boolean type and is a comparison, also check if both
29395 the comparison and VEC_COND_EXPR could be successfully expanded
29398 2023-03-23 Pan Li <pan2.li@intel.com>
29399 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29403 * config/riscv/riscv-modes.def (ADJUST_BYTESIZE): Adjust size
29404 for vector mask modes.
29405 * config/riscv/riscv.cc (riscv_v_adjust_bytesize): New.
29406 * config/riscv/riscv.h (riscv_v_adjust_bytesize): New.
29408 2023-03-23 Songhe Zhu <zhusonghe@eswincomputing.com>
29410 * config/riscv/multilib-generator: Adjusting the loop of 'alt' in 'alts'.
29412 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29415 * config/riscv/riscv-protos.h (emit_vlmax_vsetvl): Define as global.
29416 (emit_vlmax_op): Ditto.
29417 * config/riscv/riscv-v.cc (get_sew): New function.
29418 (emit_vlmax_vsetvl): Adapt function.
29419 (emit_pred_op): Ditto.
29420 (emit_vlmax_op): Ditto.
29421 (emit_nonvlmax_op): Ditto.
29422 (legitimize_move): Fix LRA ICE.
29423 (gen_no_side_effects_vsetvl_rtx): Adapt function.
29424 * config/riscv/vector.md (@mov<V_FRACT:mode><P:mode>_lra): New pattern.
29425 (@mov<VB:mode><P:mode>_lra): Ditto.
29426 (*mov<V_FRACT:mode><P:mode>_lra): Ditto.
29427 (*mov<VB:mode><P:mode>_lra): Ditto.
29429 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29432 * config/riscv/riscv-vector-builtins-bases.cc (class vlenb): Add
29433 __riscv_vlenb support.
29435 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
29436 * config/riscv/riscv-vector-builtins-functions.def (vlenb): Ditto.
29437 * config/riscv/riscv-vector-builtins-shapes.cc (struct vlenb_def): Ditto.
29439 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
29440 * config/riscv/riscv-vector-builtins.cc: Ditto.
29442 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29443 kito-cheng <kito.cheng@sifive.com>
29445 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bugs.
29446 (pass_vsetvl::compute_local_backward_infos): Fix bugs.
29447 (pass_vsetvl::need_vsetvl): Fix bugs.
29448 (pass_vsetvl::backward_demand_fusion): Fix bugs.
29449 (pass_vsetvl::demand_fusion): Fix bugs.
29450 (eliminate_insn): Fix bugs.
29451 (insert_vsetvl): Ditto.
29452 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
29453 * config/riscv/riscv-vsetvl.h (enum vsetvl_type): Ditto.
29454 * config/riscv/vector.md: Ditto.
29456 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29457 kito-cheng <kito.cheng@sifive.com>
29459 * config/riscv/riscv-vector-builtins-bases.cc: Fix ternary bug.
29460 * config/riscv/vector-iterators.md (nmsac): Ditto.
29466 * config/riscv/vector.md (@pred_mul_<optab><mode>): Ditto.
29467 (@pred_mul_plus<mode>): Ditto.
29468 (*pred_madd<mode>): Ditto.
29469 (*pred_macc<mode>): Ditto.
29470 (*pred_mul_plus<mode>): Ditto.
29471 (@pred_mul_plus<mode>_scalar): Ditto.
29472 (*pred_madd<mode>_scalar): Ditto.
29473 (*pred_macc<mode>_scalar): Ditto.
29474 (*pred_mul_plus<mode>_scalar): Ditto.
29475 (*pred_madd<mode>_extended_scalar): Ditto.
29476 (*pred_macc<mode>_extended_scalar): Ditto.
29477 (*pred_mul_plus<mode>_extended_scalar): Ditto.
29478 (@pred_minus_mul<mode>): Ditto.
29479 (*pred_<madd_nmsub><mode>): Ditto.
29480 (*pred_nmsub<mode>): Ditto.
29481 (*pred_<macc_nmsac><mode>): Ditto.
29482 (*pred_nmsac<mode>): Ditto.
29483 (*pred_mul_<optab><mode>): Ditto.
29484 (*pred_minus_mul<mode>): Ditto.
29485 (@pred_mul_<optab><mode>_scalar): Ditto.
29486 (@pred_minus_mul<mode>_scalar): Ditto.
29487 (*pred_<madd_nmsub><mode>_scalar): Ditto.
29488 (*pred_nmsub<mode>_scalar): Ditto.
29489 (*pred_<macc_nmsac><mode>_scalar): Ditto.
29490 (*pred_nmsac<mode>_scalar): Ditto.
29491 (*pred_mul_<optab><mode>_scalar): Ditto.
29492 (*pred_minus_mul<mode>_scalar): Ditto.
29493 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
29494 (*pred_nmsub<mode>_extended_scalar): Ditto.
29495 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
29496 (*pred_nmsac<mode>_extended_scalar): Ditto.
29497 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
29498 (*pred_minus_mul<mode>_extended_scalar): Ditto.
29499 (*pred_<madd_msub><mode>): Ditto.
29500 (*pred_<macc_msac><mode>): Ditto.
29501 (*pred_<madd_msub><mode>_scalar): Ditto.
29502 (*pred_<macc_msac><mode>_scalar): Ditto.
29503 (@pred_neg_mul_<optab><mode>): Ditto.
29504 (@pred_mul_neg_<optab><mode>): Ditto.
29505 (*pred_<nmadd_msub><mode>): Ditto.
29506 (*pred_<nmsub_nmadd><mode>): Ditto.
29507 (*pred_<nmacc_msac><mode>): Ditto.
29508 (*pred_<nmsac_nmacc><mode>): Ditto.
29509 (*pred_neg_mul_<optab><mode>): Ditto.
29510 (*pred_mul_neg_<optab><mode>): Ditto.
29511 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
29512 (@pred_mul_neg_<optab><mode>_scalar): Ditto.
29513 (*pred_<nmadd_msub><mode>_scalar): Ditto.
29514 (*pred_<nmsub_nmadd><mode>_scalar): Ditto.
29515 (*pred_<nmacc_msac><mode>_scalar): Ditto.
29516 (*pred_<nmsac_nmacc><mode>_scalar): Ditto.
29517 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
29518 (*pred_mul_neg_<optab><mode>_scalar): Ditto.
29519 (@pred_widen_neg_mul_<optab><mode>): Ditto.
29520 (@pred_widen_mul_neg_<optab><mode>): Ditto.
29521 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
29522 (@pred_widen_mul_neg_<optab><mode>_scalar): Ditto.
29524 2023-03-23 liuhongt <hongtao.liu@intel.com>
29526 * builtins.cc (builtin_memset_read_str): Replace
29527 targetm.gen_memset_scratch_rtx with gen_reg_rtx.
29528 (builtin_memset_gen_str): Ditto.
29529 * config/i386/i386-expand.cc
29530 (ix86_convert_const_wide_int_to_broadcast): Replace
29531 ix86_gen_scratch_sse_rtx with gen_reg_rtx.
29532 (ix86_expand_vector_move): Ditto.
29533 * config/i386/i386-protos.h (ix86_gen_scratch_sse_rtx):
29535 * config/i386/i386.cc (ix86_gen_scratch_sse_rtx): Removed.
29536 (TARGET_GEN_MEMSET_SCRATCH_RTX): Removed.
29537 * doc/tm.texi: Remove TARGET_GEN_MEMSET_SCRATCH_RTX.
29538 * doc/tm.texi.in: Ditto.
29539 * target.def: Ditto.
29541 2023-03-22 Vladimir N. Makarov <vmakarov@redhat.com>
29543 * lra.cc (lra): Do not repeat inheritance and live range splitting
29544 when asm error is found.
29546 2023-03-22 Andrew Jenner <andrew@codesourcery.com>
29548 * config/gcn/gcn-protos.h (gcn_expand_dpp_swap_pairs_insn)
29549 (gcn_expand_dpp_distribute_even_insn)
29550 (gcn_expand_dpp_distribute_odd_insn): Declare.
29551 * config/gcn/gcn-valu.md (@dpp_swap_pairs<mode>)
29552 (@dpp_distribute_even<mode>, @dpp_distribute_odd<mode>)
29553 (cmul<conj_op><mode>3, cml<addsub_as><mode>4, vec_addsub<mode>3)
29554 (cadd<rot><mode>3, vec_fmaddsub<mode>4, vec_fmsubadd<mode>4)
29555 (fms<mode>4<exec>, fms<mode>4_negop2<exec>, fms<mode>4)
29556 (fms<mode>4_negop2): New patterns.
29557 * config/gcn/gcn.cc (gcn_expand_dpp_swap_pairs_insn)
29558 (gcn_expand_dpp_distribute_even_insn)
29559 (gcn_expand_dpp_distribute_odd_insn): New functions.
29560 * config/gcn/gcn.md: Add entries to unspec enum.
29562 2023-03-22 Aldy Hernandez <aldyh@redhat.com>
29564 PR tree-optimization/109008
29565 * value-range.cc (frange::set): Add nan_state argument.
29566 * value-range.h (class nan_state): New.
29567 (frange::get_nan_state): New.
29569 2023-03-22 Martin Liska <mliska@suse.cz>
29571 * configure: Regenerate.
29573 2023-03-21 Joseph Myers <joseph@codesourcery.com>
29575 * stor-layout.cc (finalize_type_size): Copy TYPE_TYPELESS_STORAGE
29578 2023-03-21 Andrew MacLeod <amacleod@redhat.com>
29580 PR tree-optimization/109192
29581 * gimple-range-gori.cc (gori_compute::compute_operand_range):
29582 Terminate gori calculations if a relation is not relevant.
29583 * value-relation.h (value_relation::set_relation): Allow
29584 equality between op1 and op2 if they are the same.
29586 2023-03-21 Richard Biener <rguenther@suse.de>
29588 PR tree-optimization/109219
29589 * tree-vect-loop.cc (vectorizable_reduction): Check
29590 slp_node, not STMT_SLP_TYPE.
29591 * tree-vect-stmts.cc (vectorizable_condition): Likewise.
29592 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1):
29593 Remove assertion on STMT_SLP_TYPE.
29595 2023-03-21 Jakub Jelinek <jakub@redhat.com>
29597 PR tree-optimization/109215
29598 * tree.h (enum special_array_member): Adjust comments for int_0
29600 * tree.cc (component_ref_sam_type): Clear zero_elts if memtype
29601 has zero sized element type and the array has variable number of
29602 elements or constant one or more elements.
29603 (component_ref_size): Adjust comments, formatting fix.
29605 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
29607 * configure.ac: Add check for the Texinfo 6.8
29608 CONTENTS_OUTPUT_LOCATION customization variable and set it if
29610 * configure: Regenerate.
29611 * Makefile.in (MAKEINFO_TOC_INLINE_FLAG): New variable. Set by
29612 configure.ac to -c CONTENTS_OUTPUT_LOCATION=inline if
29613 CONTENTS_OUTPUT_LOCATION support is detected, empty otherwise.
29614 ($(build_htmldir)/%/index.html): Pass MAKEINFO_TOC_INLINE_FLAG.
29616 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
29618 * doc/extend.texi: Associate use_hazard_barrier_return index
29619 entry with its attribute.
29620 * doc/invoke.texi: Associate -fcanon-prefix-map index entry with
29623 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
29625 * doc/implement-c.texi: Remove usage of @gol.
29626 * doc/invoke.texi: Ditto.
29627 * doc/sourcebuild.texi: Ditto.
29628 * doc/include/gcc-common.texi: Remove @gol. In new Makeinfo and
29629 texinfo.tex versions, the bug it was working around appears to
29632 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
29634 * doc/include/texinfo.tex: Update to 2023-01-17.19.
29636 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
29638 * doc/include/gcc-common.texi: Add @defbuiltin{,x} and
29639 @enddefbuiltin for defining built-in functions.
29640 * doc/extend.texi: Apply @defbuiltin{,x} to many, but not all,
29641 places where it should be used.
29643 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
29645 * doc/extend.texi (Formatted Output Function Checking): New
29646 subsection for grouping together printf et al.
29647 (Exception handling) Fix missing @ sign before copyright
29648 header, which lead to the copyright line leaking into
29649 '(gcc)Exception handling'.
29650 * doc/gcc.texi: Set document language to en_US.
29651 (@copying): Wrap front cover texts in quotations, move in manual
29654 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
29656 * doc/gcc.texi: Add the Indices appendix, to make texinfo
29657 generate nice indices overview page.
29659 2023-03-21 Richard Biener <rguenther@suse.de>
29661 PR tree-optimization/109170
29662 * gimple-range-op.cc (cfn_pass_through_arg1): New.
29663 (gimple_range_op_handler::maybe_builtin_call): Handle
29664 __builtin_expect via cfn_pass_through_arg1.
29666 2023-03-20 Michael Meissner <meissner@linux.ibm.com>
29669 * config/rs6000/rs6000.cc (create_complex_muldiv): Delete.
29670 (init_float128_ieee): Delete code to switch complex multiply and divide
29672 (complex_multiply_builtin_code): New helper function.
29673 (complex_divide_builtin_code): Likewise.
29674 (rs6000_mangle_decl_assembler_name): Add support for mangling the name
29675 of complex 128-bit multiply and divide built-in functions.
29677 2023-03-20 Peter Bergner <bergner@linux.ibm.com>
29680 * config/rs6000/rs6000-builtin.cc (stv_expand_builtin): Use tmode.
29682 2023-03-19 Jonny Grant <jg@jguk.org>
29684 * doc/extend.texi (Common Function Attributes) <nonnull>:
29687 2023-03-18 Peter Bergner <bergner@linux.ibm.com>
29689 PR rtl-optimization/109179
29690 * lra-constraints.cc (combine_reload_insn): Enforce TO is not a debug
29691 insn or note. Move the tests earlier to guard lra_get_insn_recog_data.
29693 2023-03-17 Jakub Jelinek <jakub@redhat.com>
29696 * function.h (push_struct_function): Add ABSTRACT_P argument defaulted
29698 * function.cc (push_struct_function): Add ABSTRACT_P argument, pass it
29699 to allocate_struct_function instead of false.
29700 * tree-inline.cc (initialize_cfun): Don't copy DECL_ARGUMENTS
29701 nor DECL_RESULT here. Pass true as ABSTRACT_P to
29702 push_struct_function. Call targetm.target_option.relayout_function
29704 (tree_function_versioning): Formatting fix.
29706 2023-03-17 Vladimir N. Makarov <vmakarov@redhat.com>
29708 * lra-constraints.cc: Include hooks.h.
29709 (combine_reload_insn): New function.
29710 (lra_constraints): Call it.
29712 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29713 kito-cheng <kito.cheng@sifive.com>
29715 * config/riscv/riscv-v.cc (legitimize_move): Allow undef value
29716 as legitimate value.
29717 * config/riscv/riscv-vector-builtins.cc
29718 (function_expander::use_ternop_insn): Fix bugs of ternary intrinsic.
29719 (function_expander::use_widen_ternop_insn): Ditto.
29720 * config/riscv/vector.md (@vundefined<mode>): New pattern.
29721 (pred_mul_<optab><mode>_undef_merge): Remove.
29722 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
29723 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
29724 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
29725 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
29727 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29730 * config/riscv/riscv.md: Fix subreg bug.
29732 2023-03-17 Jakub Jelinek <jakub@redhat.com>
29734 PR middle-end/108685
29735 * omp-expand.cc (expand_omp_for_ordered_loops): Add L0_BB argument,
29736 use its loop_father rather than BODY_BB's loop_father.
29737 (expand_omp_for_generic): Adjust expand_omp_for_ordered_loops caller.
29738 If broken_loop with ordered > collapse and at least one of those
29739 extra loops aren't guaranteed to have at least one iteration, change
29740 l0_bb's loop_father to entry_bb's loop_father. Set cont_bb's
29741 loop_father to l0_bb's loop_father rather than l1_bb's.
29743 2023-03-17 Jakub Jelinek <jakub@redhat.com>
29746 * gdbhooks.py (TreePrinter.to_string): Wrap
29747 gdb.parse_and_eval('tree_code_type') in a try block, parse
29748 and eval 'tree_code_type_tmpl<0>::tree_code_type' instead if it
29749 raises exception. Update comments for the recent tree_code_type
29752 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
29754 * doc/extend.texi (BPF Built-in Functions): Fix numerous markup
29755 issues. Add more line breaks to example so it doesn't overflow
29758 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
29760 * doc/extend.texi (Common Function Attributes) <access>: Fix bad
29761 line breaks in examples.
29762 <malloc>: Fix bad line breaks in running text, also copy-edit
29764 (Extended Asm) <Generic Operand Modifiers>: Fix @multitable width.
29765 * doc/invoke.texi (Option Summary) <Developer Options>: Fix misplaced
29767 (C++ Dialect Options) <-fcontracts>: Add line break in example.
29768 <-Wctad-maybe-unsupported>: Likewise.
29769 <-Winvalid-constexpr>: Likewise.
29770 (Warning Options) <-Wdangling-pointer>: Likewise.
29771 <-Winterference-size>: Likewise.
29772 <-Wvla-parameter>: Likewise.
29773 (Static Analyzer Options): Fix bad line breaks in running text,
29774 plus add some missing markup.
29775 (Optimize Options) <openacc-privatization>: Fix more bad line
29776 breaks in running text.
29778 2023-03-16 Uros Bizjak <ubizjak@gmail.com>
29780 * config/i386/i386-expand.cc (expand_vec_perm_pblendv):
29781 Handle 8-byte modes only with TARGET_MMX_WITH_SSE.
29782 (expand_vec_perm_2perm_pblendv): Ditto.
29784 2023-03-16 Martin Liska <mliska@suse.cz>
29786 PR middle-end/106133
29787 * gcc.cc (driver_handle_option): Use x_main_input_basename
29788 if x_dump_base_name is null.
29789 * opts.cc (common_handle_option): Likewise.
29791 2023-03-16 Richard Biener <rguenther@suse.de>
29793 PR tree-optimization/109123
29794 * gimple-ssa-warn-access.cc (pass_waccess::warn_invalid_pointer):
29795 Do not emit -Wuse-after-free late.
29796 (pass_waccess::check_call): Always check call pointer uses.
29798 2023-03-16 Richard Biener <rguenther@suse.de>
29800 PR tree-optimization/109141
29801 * tree-dfa.h (renumber_gimple_stmt_uids_in_block): New.
29802 * tree-dfa.cc (renumber_gimple_stmt_uids_in_block): Split
29804 (renumber_gimple_stmt_uids): ... here and
29805 (renumber_gimple_stmt_uids_in_blocks): ... here.
29806 * gimple-ssa-warn-access.cc (pass_waccess::use_after_inval_p):
29807 Use renumber_gimple_stmt_uids_in_block to also assign UIDs
29809 (pass_waccess::check_pointer_uses): Process all PHIs.
29811 2023-03-15 David Malcolm <dmalcolm@redhat.com>
29814 * diagnostic-format-sarif.cc (class sarif_invocation): New.
29815 (class sarif_ice_notification): New.
29816 (sarif_builder::m_invocation_obj): New field.
29817 (sarif_invocation::add_notification_for_ice): New.
29818 (sarif_invocation::prepare_to_flush): New.
29819 (sarif_ice_notification::sarif_ice_notification): New.
29820 (sarif_builder::sarif_builder): Add m_invocation_obj.
29821 (sarif_builder::end_diagnostic): Special-case DK_ICE and
29823 (sarif_builder::flush_to_file): Call prepare_to_flush on
29824 m_invocation_obj. Pass the latter to make_top_level_object.
29825 (sarif_builder::make_result_object): Move creation of "locations"
29827 (sarif_builder::make_locations_arr): ...this new function.
29828 (sarif_builder::make_top_level_object): Add "invocation_obj" param
29829 and pass it to make_run_object.
29830 (sarif_builder::make_run_object): Add "invocation_obj" param and
29832 (sarif_ice_handler): New callback.
29833 (diagnostic_output_format_init_sarif): Wire up sarif_ice_handler.
29834 * diagnostic.cc (diagnostic_initialize): Initialize new field
29836 (diagnostic_action_after_output): If it is set, make one attempt
29837 to call ice_handler_cb.
29838 * diagnostic.h (diagnostic_context::ice_handler_cb): New field.
29840 2023-03-15 Uros Bizjak <ubizjak@gmail.com>
29842 * config/i386/i386-expand.cc (expand_vec_perm_blend):
29843 Handle 8-byte modes only with TARGET_MMX_WITH_SSE. Handle V2SFmode
29844 and fix V2HImode handling.
29845 (expand_vec_perm_1): Try to emit BLEND instruction
29846 before MOVSS/MOVSD.
29847 * config/i386/mmx.md (*mmx_blendps): New insn pattern.
29849 2023-03-15 Tobias Burnus <tobias@codesourcery.com>
29851 * omp-low.cc (omp_runtime_api_call): Add omp_in_explicit_task.
29853 2023-03-15 Richard Biener <rguenther@suse.de>
29855 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
29856 Do not diagnose clobbers.
29858 2023-03-15 Richard Biener <rguenther@suse.de>
29860 PR tree-optimization/109139
29861 * tree-ssa-live.cc (remove_unused_locals): Look at the
29862 base address for unused decls on the LHS of .DEFERRED_INIT.
29864 2023-03-15 Xi Ruoyao <xry111@xry111.site>
29867 * builtins.cc (inline_string_cmp): Force the character
29868 difference into "result" pseudo-register, instead of reassign
29869 the pseudo-register.
29871 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
29873 * config.gcc: Add thead.o to RISC-V extra_objs.
29874 * config/riscv/peephole.md: Add mempair peephole passes.
29875 * config/riscv/riscv-protos.h (riscv_split_64bit_move_p): New
29877 (th_mempair_operands_p): Likewise.
29878 (th_mempair_order_operands): Likewise.
29879 (th_mempair_prepare_save_restore_operands): Likewise.
29880 (th_mempair_save_restore_regs): Likewise.
29881 (th_mempair_output_move): Likewise.
29882 * config/riscv/riscv.cc (riscv_save_reg): Move code.
29883 (riscv_restore_reg): Move code.
29884 (riscv_for_each_saved_reg): Add code to emit mempair insns.
29885 * config/riscv/t-riscv: Add thead.cc.
29886 * config/riscv/thead.md (*th_mempair_load_<GPR:mode>2):
29888 (*th_mempair_store_<GPR:mode>2): Likewise.
29889 (*th_mempair_load_extendsidi2): Likewise.
29890 (*th_mempair_load_zero_extendsidi2): Likewise.
29891 * config/riscv/thead.cc: New file.
29893 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
29895 * config/riscv/constraints.md (TARGET_XTHEADFMV ? FP_REGS : NO_REGS)
29896 New constraint "th_f_fmv".
29897 (TARGET_XTHEADFMV ? GR_REGS : NO_REGS): New constraint
29899 * config/riscv/riscv.cc (riscv_split_doubleword_move):
29900 Add split code for XTheadFmv.
29901 (riscv_secondary_memory_needed): XTheadFmv does not need
29903 * config/riscv/riscv.md: Add new UNSPEC_XTHEADFMV and
29904 UNSPEC_XTHEADFMV_HW. Add support for XTheadFmv to
29905 movdf_hardfloat_rv32.
29906 * config/riscv/thead.md (th_fmv_hw_w_x): New INSN.
29907 (th_fmv_x_w): New INSN.
29908 (th_fmv_x_hw): New INSN.
29910 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
29912 * config/riscv/riscv.md (maddhisi4): New expand.
29913 (msubhisi4): New expand.
29914 * config/riscv/thead.md (*th_mula<mode>): New pattern.
29915 (*th_mulawsi): New pattern.
29916 (*th_mulawsi2): New pattern.
29917 (*th_maddhisi4): New pattern.
29918 (*th_sextw_maddhisi4): New pattern.
29919 (*th_muls<mode>): New pattern.
29920 (*th_mulswsi): New pattern.
29921 (*th_mulswsi2): New pattern.
29922 (*th_msubhisi4): New pattern.
29923 (*th_sextw_msubhisi4): New pattern.
29925 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
29927 * config/riscv/iterators.md (TARGET_64BIT): Add GPR2 iterator.
29928 * config/riscv/riscv-protos.h (riscv_expand_conditional_move):
29930 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for
29932 (riscv_expand_conditional_move): New function.
29933 (riscv_expand_conditional_move_onesided): New function.
29934 * config/riscv/riscv.md: Add support for XTheadCondMov.
29935 * config/riscv/thead.md (*th_cond_mov<GPR:mode><GPR2:mode>): Add
29936 support for XTheadCondMov.
29937 (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Likewise.
29939 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
29941 * config/riscv/bitmanip.md (clzdi2): New expand.
29942 (clzsi2): New expand.
29943 (ctz<mode>2): New expand.
29944 (popcount<mode>2): New expand.
29945 (<bitmanip_optab>si2): Rename INSN.
29946 (*<bitmanip_optab>si2): Hide INSN name.
29947 (<bitmanip_optab>di2): Rename INSN.
29948 (*<bitmanip_optab>di2): Hide INSN name.
29949 (rotrsi3): Remove INSN.
29950 (rotr<mode>3): Add expand.
29951 (*rotrsi3): New INSN.
29952 (rotrdi3): Rename INSN.
29953 (*rotrdi3): Hide INSN name.
29954 (rotrsi3_sext): Rename INSN.
29955 (*rotrsi3_sext): Hide INSN name.
29956 (bswap<mode>2): Remove INSN.
29957 (bswapdi2): Add expand.
29958 (bswapsi2): Add expand.
29959 (*bswap<mode>2): Hide INSN name.
29960 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for sign
29962 * config/riscv/riscv.md (extv<mode>): New expand.
29963 (extzv<mode>): New expand.
29964 * config/riscv/thead.md (*th_srri<mode>3): New INSN.
29965 (*th_ext<mode>): New INSN.
29966 (*th_extu<mode>): New INSN.
29967 (*th_clz<mode>2): New INSN.
29968 (*th_rev<mode>2): New INSN.
29970 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
29972 * config/riscv/riscv.cc (riscv_rtx_costs): Add xthead:tst cost.
29973 * config/riscv/thead.md (*th_tst<mode>3): New INSN.
29975 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
29977 * config/riscv/riscv.md: Include thead.md
29978 * config/riscv/thead.md: New file.
29980 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
29982 * config/riscv/riscv-cores.def (RISCV_CORE): Add "thead-c906".
29984 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
29986 * common/config/riscv/riscv-common.cc: Add xthead* extensions.
29987 * config/riscv/riscv-opts.h (MASK_XTHEADBA): New.
29988 (MASK_XTHEADBB): New.
29989 (MASK_XTHEADBS): New.
29990 (MASK_XTHEADCMO): New.
29991 (MASK_XTHEADCONDMOV): New.
29992 (MASK_XTHEADFMEMIDX): New.
29993 (MASK_XTHEADFMV): New.
29994 (MASK_XTHEADINT): New.
29995 (MASK_XTHEADMAC): New.
29996 (MASK_XTHEADMEMIDX): New.
29997 (MASK_XTHEADMEMPAIR): New.
29998 (MASK_XTHEADSYNC): New.
29999 (TARGET_XTHEADBA): New.
30000 (TARGET_XTHEADBB): New.
30001 (TARGET_XTHEADBS): New.
30002 (TARGET_XTHEADCMO): New.
30003 (TARGET_XTHEADCONDMOV): New.
30004 (TARGET_XTHEADFMEMIDX): New.
30005 (TARGET_XTHEADFMV): New.
30006 (TARGET_XTHEADINT): New.
30007 (TARGET_XTHEADMAC): New.
30008 (TARGET_XTHEADMEMIDX): New.
30009 (TARGET_XTHEADMEMPAIR): new.
30010 (TARGET_XTHEADSYNC): New.
30011 * config/riscv/riscv.opt: Add riscv_xthead_subext.
30013 2023-03-15 Hu, Lin1 <lin1.hu@intel.com>
30016 * config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi,
30017 __builtin_ia32_vaesdeclast_v16qi,__builtin_ia32_vaesenc_v16qi,
30018 __builtin_ia32_vaesenclast_v16qi): Require OPTION_MASK_ISA_AVX512VL.
30020 2023-03-14 Jakub Jelinek <jakub@redhat.com>
30023 * config/i386/i386-expand.cc (split_double_concat): Fix splitting
30024 when lo is equal to dhi and hi is a MEM which uses dlo register.
30026 2023-03-14 Martin Jambor <mjambor@suse.cz>
30029 * ipa-cp.cc (update_profiling_info): Drop counts of orig_node to
30030 global0 instead of zeroing when it does not have as many counts as
30033 2023-03-14 Martin Jambor <mjambor@suse.cz>
30036 * ipa-cp.cc (update_specialized_profile): Drop orig_node_count to
30037 ipa count, remove assert, lenient_count_portion_handling, dump
30038 also orig_node_count.
30040 2023-03-14 Uros Bizjak <ubizjak@gmail.com>
30042 * config/i386/i386-expand.cc (expand_vec_perm_movs):
30043 Handle V2SImode for TARGET_MMX_WITH_SSE.
30044 * config/i386/mmx.md (*mmx_movss_<mode>): Rename from *mmx_movss
30045 using V2FI mode iterator to handle both V2SI and V2SF modes.
30047 2023-03-14 Sam James <sam@gentoo.org>
30049 * config/riscv/genrvv-type-indexer.cc: Avoid calloc() poisoning on musl by
30050 including <sstream> earlier.
30051 * system.h: Add INCLUDE_SSTREAM.
30053 2023-03-14 Richard Biener <rguenther@suse.de>
30055 * tree-ssa-live.cc (remove_unused_locals): Do not treat
30056 the .DEFERRED_INIT of a variable as use, instead remove
30057 that if it is the only use.
30059 2023-03-14 Eric Botcazou <ebotcazou@adacore.com>
30061 PR rtl-optimization/107762
30062 * expr.cc (emit_group_store): Revert latest change.
30064 2023-03-14 Andre Vieira <andre.simoesdiasvieira@arm.com>
30066 PR tree-optimization/109005
30067 * tree-if-conv.cc (get_bitfield_rep): Replace BLKmode check with
30068 aggregate type check.
30070 2023-03-14 Jakub Jelinek <jakub@redhat.com>
30072 PR tree-optimization/109115
30073 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Don't use
30074 r.upper_bound () on r.undefined_p () range.
30076 2023-03-14 Jan Hubicka <hubicka@ucw.cz>
30078 PR tree-optimization/106896
30079 * profile-count.cc (profile_count::to_sreal_scale): Synchronize
30080 implementatoin with probability_in; avoid some asserts.
30082 2023-03-13 Max Filippov <jcmvbkbc@gmail.com>
30084 * config/xtensa/linux.h (TARGET_ASM_FILE_END): New macro.
30086 2023-03-13 Sean Bright <sean@seanbright.com>
30088 * doc/invoke.texi (Warning Options): Remove errant 'See'
30091 2023-03-13 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
30093 * config/xtensa/xtensa.h (REG_OK_STRICT, REG_OK_FOR_INDEX_P,
30094 REG_OK_FOR_BASE_P): Remove.
30096 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30098 * config/riscv/vector-iterators.md (=vd,vr): Fine tune.
30099 (=vd,vd,vr,vr): Ditto.
30100 * config/riscv/vector.md: Ditto.
30102 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30104 * config/riscv/riscv-vector-builtins.cc
30105 (function_expander::use_compare_insn): Add operand predicate check.
30107 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30109 * config/riscv/vector.md: Fine tune RA constraints.
30111 2023-03-13 Tobias Burnus <tobias@codesourcery.com>
30113 * config/gcn/mkoffload.cc (main): Pass -save-temps on for the
30114 hsaco assemble/link.
30116 2023-03-13 Richard Biener <rguenther@suse.de>
30118 PR tree-optimization/109046
30119 * tree-ssa-forwprop.cc (pass_forwprop::execute): Combine
30120 piecewise complex loads.
30122 2023-03-12 Jakub Jelinek <jakub@redhat.com>
30124 * config/aarch64/aarch64.h (aarch64_bf16_type_node): Remove.
30125 (aarch64_bf16_ptr_type_node): Adjust comment.
30126 * config/aarch64/aarch64.cc (aarch64_gimplify_va_arg_expr): Use
30127 bfloat16_type_node rather than aarch64_bf16_type_node.
30128 (aarch64_libgcc_floating_mode_supported_p,
30129 aarch64_scalar_mode_supported_p): Also support BFmode.
30130 (aarch64_invalid_conversion, aarch64_invalid_unary_op): Remove.
30131 (aarch64_invalid_binary_op): Remove BFmode related rejections.
30132 (TARGET_INVALID_CONVERSION, TARGET_INVALID_UNARY_OP): Don't redefine.
30133 * config/aarch64/aarch64-builtins.cc (aarch64_bf16_type_node): Remove.
30134 (aarch64_int_or_fp_type): Use bfloat16_type_node rather than
30135 aarch64_bf16_type_node.
30136 (aarch64_init_simd_builtin_types): Likewise.
30137 (aarch64_init_bf16_types): Likewise. Don't create bfloat16_type_node,
30138 which is created in tree.cc already.
30139 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): Likewise.
30141 2023-03-12 Roger Sayle <roger@nextmovesoftware.com>
30143 PR middle-end/109031
30144 * tree-chrec.cc (chrec_apply): When folding "{a, +, a} (x-1)",
30145 ensure that the type of x is as wide or wider than the type of a.
30147 2023-03-12 Tamar Christina <tamar.christina@arm.com>
30150 * config/aarch64/aarch64-simd.md (@aarch64_bitmask_udiv<mode>3): Remove.
30151 (*bitmask_shift_plus<mode>): New.
30152 * config/aarch64/aarch64-sve2.md (*bitmask_shift_plus<mode>): New.
30153 (@aarch64_bitmask_udiv<mode>3): Remove.
30154 * config/aarch64/aarch64.cc
30155 (aarch64_vectorize_can_special_div_by_constant,
30156 TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Removed.
30157 (TARGET_VECTORIZE_PREFERRED_DIV_AS_SHIFTS_OVER_MULT,
30158 aarch64_vectorize_preferred_div_as_shifts_over_mult): New.
30160 2023-03-12 Tamar Christina <tamar.christina@arm.com>
30163 * target.def (preferred_div_as_shifts_over_mult): New.
30164 * doc/tm.texi.in: Document it.
30165 * doc/tm.texi: Regenerate.
30166 * targhooks.cc (default_preferred_div_as_shifts_over_mult): New.
30167 * targhooks.h (default_preferred_div_as_shifts_over_mult): New.
30168 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Use it.
30170 2023-03-12 Tamar Christina <tamar.christina@arm.com>
30171 Richard Sandiford <richard.sandiford@arm.com>
30174 * tree-ssa-math-opts.cc (convert_mult_to_fma): Inhibit FMA in case not
30177 2023-03-12 Tamar Christina <tamar.christina@arm.com>
30178 Andrew MacLeod <amacleod@redhat.com>
30181 * gimple-range-op.h (gimple_range_op_handler): Add maybe_non_standard.
30182 * gimple-range-op.cc (gimple_range_op_handler::gimple_range_op_handler):
30184 (gimple_range_op_handler::maybe_non_standard): New.
30185 * range-op.cc (class operator_widen_plus_signed,
30186 operator_widen_plus_signed::wi_fold, class operator_widen_plus_unsigned,
30187 operator_widen_plus_unsigned::wi_fold, class operator_widen_mult_signed,
30188 operator_widen_mult_signed::wi_fold, class operator_widen_mult_unsigned,
30189 operator_widen_mult_unsigned::wi_fold,
30190 ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
30191 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New.
30192 * range-op.h (ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
30193 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New
30195 2023-03-12 Tamar Christina <tamar.christina@arm.com>
30198 * doc/tm.texi (TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Remove.
30199 * doc/tm.texi.in: Likewise.
30200 * explow.cc (round_push, align_dynamic_address): Revert previous patch.
30201 * expmed.cc (expand_divmod): Likewise.
30202 * expmed.h (expand_divmod): Likewise.
30203 * expr.cc (force_operand, expand_expr_divmod): Likewise.
30204 * optabs.cc (expand_doubleword_mod, expand_doubleword_divmod): Likewise.
30205 * target.def (can_special_div_by_const): Remove.
30206 * target.h: Remove tree-core.h include
30207 * targhooks.cc (default_can_special_div_by_const): Remove.
30208 * targhooks.h (default_can_special_div_by_const): Remove.
30209 * tree-vect-generic.cc (expand_vector_operation): Remove hook.
30210 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Remove hook.
30211 * tree-vect-stmts.cc (vectorizable_operation): Remove hook.
30213 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
30215 * doc/install.texi2html: Fix issue number typo in comment.
30217 2023-03-12 Gaius Mulley <gaiusmod2@gmail.com>
30219 * doc/gm2.texi (Elementary data types): Equivalence BOOLEAN with
30222 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
30224 * doc/invoke.texi (Optimize Options): Add markup to
30225 description of asan-kernel-mem-intrinsic-prefix, and clarify
30228 2023-03-11 Gerald Pfeifer <gerald@pfeifer.com>
30230 * doc/extend.texi (Named Address Spaces): Drop a redundant link
30233 2023-03-11 Jeff Law <jlaw@ventanamicro>
30236 * doc/extend.texi: Clarify Attribute Syntax a bit.
30238 2023-03-11 Sandra Loosemore <sandra@codesourcery.com>
30240 * doc/install.texi (Prerequisites): Suggest using newer versions
30242 (Final install): Clean up and modernize discussion of how to
30243 build or obtain the GCC manuals.
30244 * doc/install.texi2html: Update comment to point to the PR instead
30245 of "makeinfo 4.7 brokenness" (it's not specific to that version).
30247 2023-03-10 Jakub Jelinek <jakub@redhat.com>
30250 * optabs.cc (expand_fix): For conversions from BFmode to integral,
30251 use shifts to convert it to SFmode first and then convert SFmode
30254 2023-03-10 Andrew Pinski <apinski@marvell.com>
30256 * config/aarch64/aarch64.md: Add a new define_split
30259 2023-03-10 Richard Biener <rguenther@suse.de>
30261 * tree-ssa-structalias.cc (solve_graph): Immediately
30262 iterate self-cycles.
30264 2023-03-10 Jakub Jelinek <jakub@redhat.com>
30266 PR tree-optimization/109008
30267 * range-op-float.cc (float_widen_lhs_range): If not
30268 -frounding-math and not IBM double double format, extend lhs
30269 range just by 0.5ulp rather than 1ulp in each direction.
30271 2023-03-10 Jakub Jelinek <jakub@redhat.com>
30274 * config.gcc (x86_64-*-cygwin*): Don't add i386/t-cygwin-w64 into
30276 * config/i386/t-cygwin-w64: Remove.
30278 2023-03-10 Jakub Jelinek <jakub@redhat.com>
30281 * tree-core.h (tree_code_type, tree_code_length): For C++11 or
30282 C++14, don't declare as extern const arrays.
30283 (tree_code_type_tmpl, tree_code_length_tmpl): New types with
30284 static constexpr member arrays for C++11 or C++14.
30285 * tree.h (TREE_CODE_CLASS): For C++11 or C++14 use
30286 tree_code_type_tmpl <0>::tree_code_type instead of tree_code_type.
30287 (TREE_CODE_LENGTH): For C++11 or C++14 use
30288 tree_code_length_tmpl <0>::tree_code_length instead of
30290 * tree.cc (tree_code_type, tree_code_length): Remove.
30292 2023-03-10 Jakub Jelinek <jakub@redhat.com>
30295 * common.opt (fcanon-prefix-map): New option.
30296 * opts.cc: Include file-prefix-map.h.
30297 (flag_canon_prefix_map): New variable.
30298 (common_handle_option): Handle OPT_fcanon_prefix_map.
30299 (gen_command_line_string): Ignore OPT_fcanon_prefix_map.
30300 * file-prefix-map.h (flag_canon_prefix_map): Declare.
30301 * file-prefix-map.cc (struct file_prefix_map): Add canonicalize
30303 (add_prefix_map): Initialize canonicalize member from
30304 flag_canon_prefix_map, and if true canonicalize it using lrealpath.
30305 (remap_filename): Revert 2022-11-01 and 2022-11-07 changes,
30306 use lrealpath result only for map->canonicalize map entries.
30307 * lto-opts.cc (lto_write_options): Ignore OPT_fcanon_prefix_map.
30308 * opts-global.cc (handle_common_deferred_options): Clear
30309 flag_canon_prefix_map at the start and handle OPT_fcanon_prefix_map.
30310 * doc/invoke.texi (-fcanon-prefix-map): Document.
30311 (-ffile-prefix-map, -fdebug-prefix-map, -fprofile-prefix-map): Add
30312 see also for -fcanon-prefix-map.
30313 * doc/cppopts.texi (-fmacro-prefix-map): Likewise.
30315 2023-03-10 Jakub Jelinek <jakub@redhat.com>
30318 * cgraphunit.cc (check_global_declaration): Don't warn for unused
30319 variables which have OPT_Wunused_variable warning suppressed.
30321 2023-03-10 Jakub Jelinek <jakub@redhat.com>
30323 PR tree-optimization/109008
30324 * range-op-float.cc (float_widen_lhs_range): If lb is
30325 minimum representable finite number or ub is maximum
30326 representable finite number, instead of widening it to
30327 -inf or inf widen it to negative or positive 0x0.8p+(EMAX+1).
30328 Temporarily clear flag_finite_math_only when canonicalizing
30331 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30333 * config/riscv/riscv-builtins.cc (riscv_gimple_fold_builtin): New function.
30334 * config/riscv/riscv-protos.h (riscv_gimple_fold_builtin): Ditto.
30335 (gimple_fold_builtin): Ditto.
30336 * config/riscv/riscv-vector-builtins-bases.cc (class read_vl): New class.
30337 (class vleff): Ditto.
30339 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
30340 * config/riscv/riscv-vector-builtins-functions.def (read_vl): Ditto.
30342 * config/riscv/riscv-vector-builtins-shapes.cc (struct read_vl_def): Ditto.
30343 (struct fault_load_def): Ditto.
30345 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
30346 * config/riscv/riscv-vector-builtins.cc
30347 (rvv_arg_type_info::get_tree_type): Add size_ptr.
30348 (gimple_folder::gimple_folder): New class.
30349 (gimple_folder::fold): Ditto.
30350 (gimple_fold_builtin): New function.
30351 (get_read_vl_instance): Ditto.
30352 (get_read_vl_decl): Ditto.
30353 * config/riscv/riscv-vector-builtins.def (size_ptr): Add size_ptr.
30354 * config/riscv/riscv-vector-builtins.h (class gimple_folder): New class.
30355 (get_read_vl_instance): New function.
30356 (get_read_vl_decl): Ditto.
30357 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Ditto.
30358 (read_vl_insn_p): Ditto.
30359 (available_occurrence_p): Ditto.
30360 (backward_propagate_worthwhile_p): Ditto.
30361 (gen_vsetvl_pat): Adapt for vleff support.
30362 (get_forward_read_vl_insn): New function.
30363 (get_backward_fault_first_load_insn): Ditto.
30364 (source_equal_p): Adapt for vleff support.
30365 (first_ratio_invalid_for_second_sew_p): Remove.
30366 (first_ratio_invalid_for_second_lmul_p): Ditto.
30367 (first_lmul_less_than_second_lmul_p): Ditto.
30368 (first_ratio_less_than_second_ratio_p): Ditto.
30369 (support_relaxed_compatible_p): New function.
30370 (vector_insn_info::operator>): Remove.
30371 (vector_insn_info::operator>=): Refine.
30372 (vector_insn_info::parse_insn): Adapt for vleff support.
30373 (vector_insn_info::compatible_p): Ditto.
30374 (vector_insn_info::update_fault_first_load_avl): New function.
30375 (pass_vsetvl::transfer_after): Adapt for vleff support.
30376 (pass_vsetvl::demand_fusion): Ditto.
30377 (pass_vsetvl::cleanup_insns): Ditto.
30378 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Remove
30379 redundant condtions.
30380 * config/riscv/riscv-vsetvl.h (struct demands_cond): New function.
30381 * config/riscv/riscv.cc (TARGET_GIMPLE_FOLD_BUILTIN): New target hook.
30382 * config/riscv/riscv.md: Adapt for vleff support.
30383 * config/riscv/t-riscv: Ditto.
30384 * config/riscv/vector-iterators.md: New iterator.
30385 * config/riscv/vector.md (read_vlsi): New pattern.
30386 (read_vldi_zero_extend): Ditto.
30387 (@pred_fault_load<mode>): Ditto.
30389 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30391 * config/riscv/riscv-vector-builtins.cc
30392 (function_expander::use_ternop_insn): Use maybe_gen_insn instead.
30393 (function_expander::use_widen_ternop_insn): Ditto.
30394 * optabs.cc (maybe_gen_insn): Extend nops handling.
30396 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30398 * config/riscv/riscv-vector-builtins-bases.cc: Split indexed load
30399 patterns according to RVV ISA.
30400 * config/riscv/vector-iterators.md: New iterators.
30401 * config/riscv/vector.md
30402 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Remove.
30403 (@pred_indexed_<order>load<mode>_same_eew): New pattern.
30404 (@pred_indexed_<order>load<mode>_x2_greater_eew): Ditto.
30405 (@pred_indexed_<order>load<mode>_x4_greater_eew): Ditto.
30406 (@pred_indexed_<order>load<mode>_x8_greater_eew): Ditto.
30407 (@pred_indexed_<order>load<mode>_x2_smaller_eew): Ditto.
30408 (@pred_indexed_<order>load<mode>_x4_smaller_eew): Ditto.
30409 (@pred_indexed_<order>load<mode>_x8_smaller_eew): Ditto.
30410 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Remove.
30411 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
30412 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
30413 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
30414 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
30415 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
30417 2023-03-10 Michael Collison <collison@rivosinc.com>
30419 * tree-vect-loop-manip.cc (vect_do_peeling): Use
30420 result of constant_lower_bound instead of vf for the lower
30421 bound of the epilog loop trip count.
30423 2023-03-09 Tamar Christina <tamar.christina@arm.com>
30425 * passes.cc (emergency_dump_function): Finish graph generation.
30427 2023-03-09 Tamar Christina <tamar.christina@arm.com>
30429 * config/aarch64/aarch64.md (tbranch_<code><mode>3): Restrict to SHORT
30430 and bottom bit only.
30432 2023-03-09 Andrew Pinski <apinski@marvell.com>
30434 PR tree-optimization/108980
30435 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
30436 Reorgnize the call to warning for not strict flexible arrays
30437 to be before the check of warned.
30439 2023-03-09 Jason Merrill <jason@redhat.com>
30441 * doc/extend.texi: Comment out __is_deducible docs.
30443 2023-03-09 Jason Merrill <jason@redhat.com>
30446 * doc/extend.texi (Type Traits):: Document __is_deducible.
30448 2023-03-09 Costas Argyris <costas.argyris@gmail.com>
30451 * config.host: add object for x86_64-*-mingw*.
30452 * config/i386/sym-mingw32.cc: dummy file to attach
30454 * config/i386/utf8-mingw32.rc: windres resource file.
30455 * config/i386/winnt-utf8.manifest: XML manifest to
30457 * config/i386/x-mingw32: reference to x-mingw32-utf8.
30458 * config/i386/x-mingw32-utf8: Makefile fragment to
30459 embed UTF-8 manifest.
30461 2023-03-09 Vladimir N. Makarov <vmakarov@redhat.com>
30463 * lra-constraints.cc (process_alt_operands): Use operand modes for
30464 clobbered regs instead of the biggest access mode.
30466 2023-03-09 Richard Biener <rguenther@suse.de>
30468 PR middle-end/108995
30469 * fold-const.cc (extract_muldiv_1): Avoid folding
30470 (CST * b) / CST2 when sanitizing overflow and we rely on
30471 overflow being undefined.
30473 2023-03-09 Jakub Jelinek <jakub@redhat.com>
30474 Richard Biener <rguenther@suse.de>
30476 PR tree-optimization/109008
30477 * range-op-float.cc (float_widen_lhs_range): New function.
30478 (foperator_plus::op1_range, foperator_minus::op1_range,
30479 foperator_minus::op2_range, foperator_mult::op1_range,
30480 foperator_div::op1_range, foperator_div::op2_range): Use it.
30482 2023-03-07 Jonathan Grant <jg@jguk.org>
30485 * doc/invoke.texi (Instrumentation Options): Clarify
30486 LeakSanitizer behavior.
30488 2023-03-07 Benson Muite <benson_muite@emailplus.org>
30490 * doc/install.texi (Prerequisites): Add link to gmplib.org.
30492 2023-03-07 Pan Li <pan2.li@intel.com>
30493 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30497 * config/riscv/riscv-modes.def (ADJUST_PRECISION): Adjust VNx*BI
30499 * config/riscv/riscv.cc (riscv_v_adjust_precision): New.
30500 * config/riscv/riscv.h (riscv_v_adjust_precision): New.
30501 * genmodes.cc (adj_precision): New.
30502 (ADJUST_PRECISION): New.
30503 (emit_mode_adjustments): Handle ADJUST_PRECISION.
30505 2023-03-07 Hans-Peter Nilsson <hp@axis.com>
30507 * doc/sourcebuild.texi: Document check_effective_target_tail_call.
30509 2023-03-06 Paul-Antoine Arras <pa@codesourcery.com>
30511 * config/gcn/gcn-valu.md (<expander><mode>3_exec): Add patterns for
30512 {s|u}{max|min} in QI, HI and DI modes.
30513 (<expander><mode>3): Add pattern for {s|u}{max|min} in DI mode.
30514 (cond_<fexpander><mode>): Add pattern for cond_f{max|min}.
30515 (cond_<expander><mode>): Add pattern for cond_{s|u}{max|min}.
30516 * config/gcn/gcn.cc (gcn_spill_class): Allow the exec register to be
30519 2023-03-06 Richard Biener <rguenther@suse.de>
30521 PR tree-optimization/109025
30522 * tree-vect-loop.cc (vect_is_simple_reduction): Verify
30523 the inner LC PHI use is the inner loop PHI latch definition
30524 before classifying an outer PHI as double reduction.
30526 2023-03-06 Jan Hubicka <hubicka@ucw.cz>
30529 * config/i386/x86-tune.def (X86_TUNE_USE_SCATTER_2PARTS): Enable for
30531 (X86_TUNE_USE_SCATTER_4PARTS): Likewise.
30532 (X86_TUNE_USE_SCATTER): Likewise.
30534 2023-03-06 Xi Ruoyao <xry111@xry111.site>
30537 * config/loongarch/loongarch.h (FP_RETURN): Use
30538 TARGET_*_FLOAT_ABI instead of TARGET_*_FLOAT.
30539 (UNITS_PER_FP_ARG): Likewise.
30541 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30543 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bug.
30544 (pass_vsetvl::backward_demand_fusion): Ditto.
30546 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
30547 SiYu Wu <siyu@isrc.iscas.ac.cn>
30549 * config/riscv/crypto.md (riscv_sm3p0_<mode>): Add ZKSED's and ZKSH's
30551 (riscv_sm3p1_<mode>): New.
30552 (riscv_sm4ed_<mode>): New.
30553 (riscv_sm4ks_<mode>): New.
30554 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKSED's and ZKSH's AVAIL.
30555 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): Add ZKSED's and
30556 ZKSH's built-in functions.
30558 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
30559 SiYu Wu <siyu@isrc.iscas.ac.cn>
30561 * config/riscv/crypto.md (riscv_sha256sig0_<mode>): Add ZKNH's instructions.
30562 (riscv_sha256sig1_<mode>): New.
30563 (riscv_sha256sum0_<mode>): New.
30564 (riscv_sha256sum1_<mode>): New.
30565 (riscv_sha512sig0h): New.
30566 (riscv_sha512sig0l): New.
30567 (riscv_sha512sig1h): New.
30568 (riscv_sha512sig1l): New.
30569 (riscv_sha512sum0r): New.
30570 (riscv_sha512sum1r): New.
30571 (riscv_sha512sig0): New.
30572 (riscv_sha512sig1): New.
30573 (riscv_sha512sum0): New.
30574 (riscv_sha512sum1): New.
30575 * config/riscv/riscv-builtins.cc (AVAIL): And ZKNH's AVAIL.
30576 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): And ZKNH's
30577 built-in functions.
30578 (DIRECT_BUILTIN): Add new.
30580 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
30581 SiYu Wu <siyu@isrc.iscas.ac.cn>
30583 * config/riscv/constraints.md (D03): Add constants of bs and rnum.
30585 * config/riscv/crypto.md (riscv_aes32dsi): Add ZKND's and ZKNE's instructions.
30586 (riscv_aes32dsmi): New.
30587 (riscv_aes64ds): New.
30588 (riscv_aes64dsm): New.
30589 (riscv_aes64im): New.
30590 (riscv_aes64ks1i): New.
30591 (riscv_aes64ks2): New.
30592 (riscv_aes32esi): New.
30593 (riscv_aes32esmi): New.
30594 (riscv_aes64es): New.
30595 (riscv_aes64esm): New.
30596 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKND's and ZKNE's AVAIL.
30597 * config/riscv/riscv-scalar-crypto.def (DIRECT_BUILTIN): Add ZKND's and
30598 ZKNE's built-in functions.
30600 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
30601 SiYu Wu <siyu@isrc.iscas.ac.cn>
30603 * config/riscv/bitmanip.md: Add ZBKB's instructions.
30604 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
30605 * config/riscv/riscv.md: Add new type for crypto instructions.
30606 * config/riscv/crypto.md: Add Scalar Cryptography extension's machine
30608 * config/riscv/riscv-scalar-crypto.def: Add Scalar Cryptography
30609 extension's built-in function file.
30611 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
30612 SiYu Wu <siyu@isrc.iscas.ac.cn>
30614 * config/riscv/riscv-builtins.cc (RISCV_FTYPE_NAME2): New.
30615 (RISCV_FTYPE_NAME3): New.
30616 (RISCV_ATYPE_QI): New.
30617 (RISCV_ATYPE_HI): New.
30618 (RISCV_FTYPE_ATYPES2): New.
30619 (RISCV_FTYPE_ATYPES3): New.
30620 * config/riscv/riscv-ftypes.def (2): New.
30623 2023-03-05 Vineet Gupta <vineetg@rivosinc.com>
30625 * config/riscv/riscv.cc (riscv_rtx_costs): Fixed IN_RANGE() to
30628 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30629 kito-cheng <kito.cheng@sifive.com>
30631 * config/riscv/predicates.md (vector_any_register_operand): New predicate.
30632 * config/riscv/riscv-c.cc (riscv_check_builtin_call): New function.
30633 (riscv_register_pragmas): Add builtin function check call.
30634 * config/riscv/riscv-protos.h (RVV_VUNDEF): Adapt macro.
30635 (check_builtin_call): New function.
30636 * config/riscv/riscv-vector-builtins-bases.cc (class vundefined): New class.
30637 (class vreinterpret): Ditto.
30638 (class vlmul_ext): Ditto.
30639 (class vlmul_trunc): Ditto.
30640 (class vset): Ditto.
30641 (class vget): Ditto.
30643 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
30644 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Change name.
30660 (vundefined): Add new intrinsic.
30661 (vreinterpret): Ditto.
30662 (vlmul_ext): Ditto.
30663 (vlmul_trunc): Ditto.
30666 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def): New class.
30667 (struct narrow_alu_def): Ditto.
30668 (struct reduc_alu_def): Ditto.
30669 (struct vundefined_def): Ditto.
30670 (struct misc_def): Ditto.
30671 (struct vset_def): Ditto.
30672 (struct vget_def): Ditto.
30674 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
30675 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EEW8_INTERPRET_OPS): New def.
30676 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
30677 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
30678 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
30679 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
30680 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
30681 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
30682 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
30683 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
30684 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
30685 (DEF_RVV_LMUL1_OPS): Ditto.
30686 (DEF_RVV_LMUL2_OPS): Ditto.
30687 (DEF_RVV_LMUL4_OPS): Ditto.
30688 (vint16mf4_t): Ditto.
30689 (vint16mf2_t): Ditto.
30690 (vint16m1_t): Ditto.
30691 (vint16m2_t): Ditto.
30692 (vint16m4_t): Ditto.
30693 (vint16m8_t): Ditto.
30694 (vint32mf2_t): Ditto.
30695 (vint32m1_t): Ditto.
30696 (vint32m2_t): Ditto.
30697 (vint32m4_t): Ditto.
30698 (vint32m8_t): Ditto.
30699 (vint64m1_t): Ditto.
30700 (vint64m2_t): Ditto.
30701 (vint64m4_t): Ditto.
30702 (vint64m8_t): Ditto.
30703 (vuint16mf4_t): Ditto.
30704 (vuint16mf2_t): Ditto.
30705 (vuint16m1_t): Ditto.
30706 (vuint16m2_t): Ditto.
30707 (vuint16m4_t): Ditto.
30708 (vuint16m8_t): Ditto.
30709 (vuint32mf2_t): Ditto.
30710 (vuint32m1_t): Ditto.
30711 (vuint32m2_t): Ditto.
30712 (vuint32m4_t): Ditto.
30713 (vuint32m8_t): Ditto.
30714 (vuint64m1_t): Ditto.
30715 (vuint64m2_t): Ditto.
30716 (vuint64m4_t): Ditto.
30717 (vuint64m8_t): Ditto.
30718 (vint8mf4_t): Ditto.
30719 (vint8mf2_t): Ditto.
30720 (vint8m1_t): Ditto.
30721 (vint8m2_t): Ditto.
30722 (vint8m4_t): Ditto.
30723 (vint8m8_t): Ditto.
30724 (vuint8mf4_t): Ditto.
30725 (vuint8mf2_t): Ditto.
30726 (vuint8m1_t): Ditto.
30727 (vuint8m2_t): Ditto.
30728 (vuint8m4_t): Ditto.
30729 (vuint8m8_t): Ditto.
30730 (vint8mf8_t): Ditto.
30731 (vuint8mf8_t): Ditto.
30732 (vfloat32mf2_t): Ditto.
30733 (vfloat32m1_t): Ditto.
30734 (vfloat32m2_t): Ditto.
30735 (vfloat32m4_t): Ditto.
30736 (vfloat64m1_t): Ditto.
30737 (vfloat64m2_t): Ditto.
30738 (vfloat64m4_t): Ditto.
30739 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
30740 (DEF_RVV_EEW8_INTERPRET_OPS): Ditto.
30741 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
30742 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
30743 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
30744 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
30745 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
30746 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
30747 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
30748 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
30749 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
30750 (DEF_RVV_LMUL1_OPS): Ditto.
30751 (DEF_RVV_LMUL2_OPS): Ditto.
30752 (DEF_RVV_LMUL4_OPS): Ditto.
30753 (DEF_RVV_TYPE_INDEX): Ditto.
30754 (required_extensions_p): Adapt for new intrinsic support/
30755 (get_required_extensions): New function.
30756 (check_required_extensions): Ditto.
30757 (unsigned_base_type_p): Remove.
30758 (rvv_arg_type_info::get_scalar_ptr_type): New function.
30759 (get_mode_for_bitsize): Remove.
30760 (rvv_arg_type_info::get_scalar_const_ptr_type): New function.
30761 (rvv_arg_type_info::get_base_vector_type): Ditto.
30762 (rvv_arg_type_info::get_function_type_index): Ditto.
30763 (DEF_RVV_BASE_TYPE): New def.
30764 (function_builder::apply_predication): New class.
30765 (function_expander::mask_mode): Ditto.
30766 (function_checker::function_checker): Ditto.
30767 (function_checker::report_non_ice): Ditto.
30768 (function_checker::report_out_of_range): Ditto.
30769 (function_checker::require_immediate): Ditto.
30770 (function_checker::require_immediate_range): Ditto.
30771 (function_checker::check): Ditto.
30772 (check_builtin_call): Ditto.
30773 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): New def.
30774 (DEF_RVV_BASE_TYPE): Ditto.
30775 (DEF_RVV_TYPE_INDEX): Ditto.
30776 (vbool64_t): Ditto.
30777 (vbool32_t): Ditto.
30778 (vbool16_t): Ditto.
30783 (vuint8mf8_t): Ditto.
30784 (vuint8mf4_t): Ditto.
30785 (vuint8mf2_t): Ditto.
30786 (vuint8m1_t): Ditto.
30787 (vuint8m2_t): Ditto.
30788 (vint8m4_t): Ditto.
30789 (vuint8m4_t): Ditto.
30790 (vint8m8_t): Ditto.
30791 (vuint8m8_t): Ditto.
30792 (vint16mf4_t): Ditto.
30793 (vuint16mf2_t): Ditto.
30794 (vuint16m1_t): Ditto.
30795 (vuint16m2_t): Ditto.
30796 (vuint16m4_t): Ditto.
30797 (vuint16m8_t): Ditto.
30798 (vint32mf2_t): Ditto.
30799 (vuint32m1_t): Ditto.
30800 (vuint32m2_t): Ditto.
30801 (vuint32m4_t): Ditto.
30802 (vuint32m8_t): Ditto.
30803 (vuint64m1_t): Ditto.
30804 (vuint64m2_t): Ditto.
30805 (vuint64m4_t): Ditto.
30806 (vuint64m8_t): Ditto.
30807 (vfloat32mf2_t): Ditto.
30808 (vfloat32m1_t): Ditto.
30809 (vfloat32m2_t): Ditto.
30810 (vfloat32m4_t): Ditto.
30811 (vfloat32m8_t): Ditto.
30812 (vfloat64m1_t): Ditto.
30813 (vfloat64m4_t): Ditto.
30814 (vector): Move it def.
30817 (signed_vector): Ditto.
30818 (unsigned_vector): Ditto.
30819 (unsigned_scalar): Ditto.
30820 (vector_ptr): Ditto.
30821 (scalar_ptr): Ditto.
30822 (scalar_const_ptr): Ditto.
30826 (unsigned_long): Ditto.
30828 (eew8_index): Ditto.
30829 (eew16_index): Ditto.
30830 (eew32_index): Ditto.
30831 (eew64_index): Ditto.
30832 (shift_vector): Ditto.
30833 (double_trunc_vector): Ditto.
30834 (quad_trunc_vector): Ditto.
30835 (oct_trunc_vector): Ditto.
30836 (double_trunc_scalar): Ditto.
30837 (double_trunc_signed_vector): Ditto.
30838 (double_trunc_unsigned_vector): Ditto.
30839 (double_trunc_unsigned_scalar): Ditto.
30840 (double_trunc_float_vector): Ditto.
30841 (float_vector): Ditto.
30842 (lmul1_vector): Ditto.
30843 (widen_lmul1_vector): Ditto.
30844 (eew8_interpret): Ditto.
30845 (eew16_interpret): Ditto.
30846 (eew32_interpret): Ditto.
30847 (eew64_interpret): Ditto.
30848 (vlmul_ext_x2): Ditto.
30849 (vlmul_ext_x4): Ditto.
30850 (vlmul_ext_x8): Ditto.
30851 (vlmul_ext_x16): Ditto.
30852 (vlmul_ext_x32): Ditto.
30853 (vlmul_ext_x64): Ditto.
30854 * config/riscv/riscv-vector-builtins.h (DEF_RVV_BASE_TYPE): New def.
30855 (struct function_type_info): New function.
30856 (struct rvv_arg_type_info): Ditto.
30857 (class function_checker): New class.
30858 (rvv_arg_type_info::get_scalar_type): New function.
30859 (rvv_arg_type_info::get_vector_type): Ditto.
30860 (function_expander::ret_mode): New function.
30861 (function_checker::arg_mode): Ditto.
30862 (function_checker::ret_mode): Ditto.
30863 * config/riscv/t-riscv: Add generator.
30864 * config/riscv/vector-iterators.md: New iterators.
30865 * config/riscv/vector.md (vundefined<mode>): New pattern.
30866 (@vundefined<mode>): Ditto.
30867 (@vreinterpret<mode>): Ditto.
30868 (@vlmul_extx2<mode>): Ditto.
30869 (@vlmul_extx4<mode>): Ditto.
30870 (@vlmul_extx8<mode>): Ditto.
30871 (@vlmul_extx16<mode>): Ditto.
30872 (@vlmul_extx32<mode>): Ditto.
30873 (@vlmul_extx64<mode>): Ditto.
30874 (*vlmul_extx2<mode>): Ditto.
30875 (*vlmul_extx4<mode>): Ditto.
30876 (*vlmul_extx8<mode>): Ditto.
30877 (*vlmul_extx16<mode>): Ditto.
30878 (*vlmul_extx32<mode>): Ditto.
30879 (*vlmul_extx64<mode>): Ditto.
30880 * config/riscv/genrvv-type-indexer.cc: New file.
30882 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30884 * config/riscv/riscv-protos.h (enum vlen_enum): New enum.
30885 (slide1_sew64_helper): New function.
30886 * config/riscv/riscv-v.cc (compute_vlmax): Ditto.
30887 (get_unknown_min_value): Ditto.
30888 (force_vector_length_operand): Ditto.
30889 (gen_no_side_effects_vsetvl_rtx): Ditto.
30890 (get_vl_x2_rtx): Ditto.
30891 (slide1_sew64_helper): Ditto.
30892 * config/riscv/riscv-vector-builtins-bases.cc (class slideop): New class.
30893 (class vrgather): Ditto.
30894 (class vrgatherei16): Ditto.
30895 (class vcompress): Ditto.
30897 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
30898 * config/riscv/riscv-vector-builtins-functions.def (vslideup): Ditto.
30899 (vslidedown): Ditto.
30900 (vslide1up): Ditto.
30901 (vslide1down): Ditto.
30902 (vfslide1up): Ditto.
30903 (vfslide1down): Ditto.
30905 (vrgatherei16): Ditto.
30906 (vcompress): Ditto.
30907 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EI16_OPS): New macro.
30908 (vint8mf8_t): Ditto.
30909 (vint8mf4_t): Ditto.
30910 (vint8mf2_t): Ditto.
30911 (vint8m1_t): Ditto.
30912 (vint8m2_t): Ditto.
30913 (vint8m4_t): Ditto.
30914 (vint16mf4_t): Ditto.
30915 (vint16mf2_t): Ditto.
30916 (vint16m1_t): Ditto.
30917 (vint16m2_t): Ditto.
30918 (vint16m4_t): Ditto.
30919 (vint16m8_t): Ditto.
30920 (vint32mf2_t): Ditto.
30921 (vint32m1_t): Ditto.
30922 (vint32m2_t): Ditto.
30923 (vint32m4_t): Ditto.
30924 (vint32m8_t): Ditto.
30925 (vint64m1_t): Ditto.
30926 (vint64m2_t): Ditto.
30927 (vint64m4_t): Ditto.
30928 (vint64m8_t): Ditto.
30929 (vuint8mf8_t): Ditto.
30930 (vuint8mf4_t): Ditto.
30931 (vuint8mf2_t): Ditto.
30932 (vuint8m1_t): Ditto.
30933 (vuint8m2_t): Ditto.
30934 (vuint8m4_t): Ditto.
30935 (vuint16mf4_t): Ditto.
30936 (vuint16mf2_t): Ditto.
30937 (vuint16m1_t): Ditto.
30938 (vuint16m2_t): Ditto.
30939 (vuint16m4_t): Ditto.
30940 (vuint16m8_t): Ditto.
30941 (vuint32mf2_t): Ditto.
30942 (vuint32m1_t): Ditto.
30943 (vuint32m2_t): Ditto.
30944 (vuint32m4_t): Ditto.
30945 (vuint32m8_t): Ditto.
30946 (vuint64m1_t): Ditto.
30947 (vuint64m2_t): Ditto.
30948 (vuint64m4_t): Ditto.
30949 (vuint64m8_t): Ditto.
30950 (vfloat32mf2_t): Ditto.
30951 (vfloat32m1_t): Ditto.
30952 (vfloat32m2_t): Ditto.
30953 (vfloat32m4_t): Ditto.
30954 (vfloat32m8_t): Ditto.
30955 (vfloat64m1_t): Ditto.
30956 (vfloat64m2_t): Ditto.
30957 (vfloat64m4_t): Ditto.
30958 (vfloat64m8_t): Ditto.
30959 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_EI16_OPS): Ditto.
30960 * config/riscv/riscv.md: Adjust RVV instruction types.
30961 * config/riscv/vector-iterators.md (down): New iterator.
30962 (=vd,vr): New attribute.
30963 (UNSPEC_VSLIDE1UP): New unspec.
30964 * config/riscv/vector.md (@pred_slide<ud><mode>): New pattern.
30965 (*pred_slide<ud><mode>): Ditto.
30966 (*pred_slide<ud><mode>_extended): Ditto.
30967 (@pred_gather<mode>): Ditto.
30968 (@pred_gather<mode>_scalar): Ditto.
30969 (@pred_gatherei16<mode>): Ditto.
30970 (@pred_compress<mode>): Ditto.
30972 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30974 * config/riscv/riscv-vector-builtins.cc: Remove void_type_node.
30976 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30978 * config/riscv/constraints.md (Wb1): New constraint.
30979 * config/riscv/predicates.md
30980 (vector_least_significant_set_mask_operand): New predicate.
30981 (vector_broadcast_mask_operand): Ditto.
30982 * config/riscv/riscv-protos.h (enum vlmul_type): Adjust.
30983 (gen_scalar_move_mask): New function.
30984 * config/riscv/riscv-v.cc (gen_scalar_move_mask): Ditto.
30985 * config/riscv/riscv-vector-builtins-bases.cc (class vmv): New class.
30986 (class vmv_s): Ditto.
30988 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
30989 * config/riscv/riscv-vector-builtins-functions.def (vmv_x): Ditto.
30993 * config/riscv/riscv-vector-builtins-shapes.cc (struct scalar_move_def): Ditto.
30995 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
30996 * config/riscv/riscv-vector-builtins.cc (function_expander::mask_mode): Ditto.
30997 (function_expander::use_exact_insn): New function.
30998 (function_expander::use_contiguous_load_insn): New function.
30999 (function_expander::use_contiguous_store_insn): New function.
31000 (function_expander::use_ternop_insn): New function.
31001 (function_expander::use_widen_ternop_insn): New function.
31002 (function_expander::use_scalar_move_insn): New function.
31003 * config/riscv/riscv-vector-builtins.def (s): New operand suffix.
31004 * config/riscv/riscv-vector-builtins.h
31005 (function_expander::add_scalar_move_mask_operand): New class.
31006 * config/riscv/riscv-vsetvl.cc (ignore_vlmul_insn_p): New function.
31007 (scalar_move_insn_p): Ditto.
31008 (has_vsetvl_killed_avl_p): Ditto.
31009 (anticipatable_occurrence_p): Ditto.
31010 (insert_vsetvl): Ditto.
31011 (get_vl_vtype_info): Ditto.
31012 (calculate_sew): Ditto.
31013 (calculate_vlmul): Ditto.
31014 (incompatible_avl_p): Ditto.
31015 (different_sew_p): Ditto.
31016 (different_lmul_p): Ditto.
31017 (different_ratio_p): Ditto.
31018 (different_tail_policy_p): Ditto.
31019 (different_mask_policy_p): Ditto.
31020 (possible_zero_avl_p): Ditto.
31021 (first_ratio_invalid_for_second_sew_p): Ditto.
31022 (first_ratio_invalid_for_second_lmul_p): Ditto.
31023 (second_ratio_invalid_for_first_sew_p): Ditto.
31024 (second_ratio_invalid_for_first_lmul_p): Ditto.
31025 (second_sew_less_than_first_sew_p): Ditto.
31026 (first_sew_less_than_second_sew_p): Ditto.
31027 (compare_lmul): Ditto.
31028 (second_lmul_less_than_first_lmul_p): Ditto.
31029 (first_lmul_less_than_second_lmul_p): Ditto.
31030 (first_ratio_less_than_second_ratio_p): Ditto.
31031 (second_ratio_less_than_first_ratio_p): Ditto.
31032 (DEF_INCOMPATIBLE_COND): Ditto.
31033 (greatest_sew): Ditto.
31034 (first_sew): Ditto.
31035 (second_sew): Ditto.
31036 (first_vlmul): Ditto.
31037 (second_vlmul): Ditto.
31038 (first_ratio): Ditto.
31039 (second_ratio): Ditto.
31040 (vlmul_for_first_sew_second_ratio): Ditto.
31041 (ratio_for_second_sew_first_vlmul): Ditto.
31042 (DEF_SEW_LMUL_FUSE_RULE): Ditto.
31043 (always_unavailable): Ditto.
31044 (avl_unavailable_p): Ditto.
31045 (sew_unavailable_p): Ditto.
31046 (lmul_unavailable_p): Ditto.
31047 (ge_sew_unavailable_p): Ditto.
31048 (ge_sew_lmul_unavailable_p): Ditto.
31049 (ge_sew_ratio_unavailable_p): Ditto.
31050 (DEF_UNAVAILABLE_COND): Ditto.
31051 (same_sew_lmul_demand_p): Ditto.
31052 (propagate_avl_across_demands_p): Ditto.
31053 (reg_available_p): Ditto.
31054 (avl_info::has_non_zero_avl): Ditto.
31055 (vl_vtype_info::has_non_zero_avl): Ditto.
31056 (vector_insn_info::operator>=): Refactor.
31057 (vector_insn_info::parse_insn): Adjust for scalar move.
31058 (vector_insn_info::demand_vl_vtype): Remove.
31059 (vector_insn_info::compatible_p): New function.
31060 (vector_insn_info::compatible_avl_p): Ditto.
31061 (vector_insn_info::compatible_vtype_p): Ditto.
31062 (vector_insn_info::available_p): Ditto.
31063 (vector_insn_info::merge): Ditto.
31064 (vector_insn_info::fuse_avl): Ditto.
31065 (vector_insn_info::fuse_sew_lmul): Ditto.
31066 (vector_insn_info::fuse_tail_policy): Ditto.
31067 (vector_insn_info::fuse_mask_policy): Ditto.
31068 (vector_insn_info::dump): Ditto.
31069 (vector_infos_manager::release): Ditto.
31070 (pass_vsetvl::compute_local_backward_infos): Adjust for scalar move support.
31071 (pass_vsetvl::get_backward_fusion_type): Adjust for scalar move support.
31072 (pass_vsetvl::hard_empty_block_p): Ditto.
31073 (pass_vsetvl::backward_demand_fusion): Ditto.
31074 (pass_vsetvl::forward_demand_fusion): Ditto.
31075 (pass_vsetvl::refine_vsetvls): Ditto.
31076 (pass_vsetvl::cleanup_vsetvls): Ditto.
31077 (pass_vsetvl::commit_vsetvls): Ditto.
31078 (pass_vsetvl::propagate_avl): Ditto.
31079 * config/riscv/riscv-vsetvl.h (enum demand_status): New class.
31080 (struct demands_pair): Ditto.
31081 (struct demands_cond): Ditto.
31082 (struct demands_fuse_rule): Ditto.
31083 * config/riscv/vector-iterators.md: New iterator.
31084 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
31085 (*pred_broadcast<mode>): Ditto.
31086 (*pred_broadcast<mode>_extended_scalar): Ditto.
31087 (@pred_extract_first<mode>): Ditto.
31088 (*pred_extract_first<mode>): Ditto.
31089 (@pred_extract_first_trunc<mode>): Ditto.
31090 * config/riscv/riscv-vsetvl.def: New file.
31092 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
31094 * config/riscv/bitmanip.md: allow 0 constant in max/min
31097 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
31099 * config/riscv/bitmanip.md: Fix wrong index in the check.
31101 2023-03-04 Jakub Jelinek <jakub@redhat.com>
31103 PR middle-end/109006
31104 * vec.cc (test_auto_alias): Adjust comment for removal of
31106 * read-rtl-function.cc (function_reader::parse_block): Likewise.
31107 * gdbhooks.py: Likewise.
31109 2023-03-04 Jakub Jelinek <jakub@redhat.com>
31111 PR testsuite/108973
31112 * selftest-diagnostic.cc
31113 (test_diagnostic_context::test_diagnostic_context): Set
31114 caret_max_width to 80.
31116 2023-03-03 Alexandre Oliva <oliva@adacore.com>
31118 * gimple-ssa-warn-access.cc
31119 (pass_waccess::check_dangling_stores): Skip non-stores.
31121 2023-03-03 Alexandre Oliva <oliva@adacore.com>
31123 * config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank after tab
31124 after vmsr and vmrs, and lower the case of P0.
31126 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
31128 PR middle-end/109006
31129 * gdbhooks.py (VecPrinter): Handle vec<T> as well as vec<T>*.
31131 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
31133 PR middle-end/109006
31134 * gdbhooks.py (VecPrinter): Adjust for new vec layout.
31136 2023-03-03 Jakub Jelinek <jakub@redhat.com>
31139 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
31140 Return immediately if OPT_Wnonnull or OPT_Wstringop_overflow_ is
31141 suppressed on stmt. For [static %E] warning, print access_nelts
31142 rather than access_size. Fix up comment wording.
31144 2023-03-03 Robin Dapp <rdapp@linux.ibm.com>
31146 * config/s390/driver-native.cc (s390_host_detect_local_cpu): Use
31147 arch14 instead of z16.
31149 2023-03-03 Anthony Green <green@moxielogic.com>
31151 * config/moxie/moxie.cc (TARGET_LRA_P): Remove.
31153 2023-03-03 Anthony Green <green@moxielogic.com>
31155 * config/moxie/constraints.md (A, B, W): Change
31156 define_constraint to define_memory_constraint.
31158 2023-03-03 Xi Ruoyao <xry111@xry111.site>
31160 * toplev.cc (process_options): Fix the spelling of
31161 "-fstack-clash-protection".
31163 2023-03-03 Richard Biener <rguenther@suse.de>
31165 PR tree-optimization/109002
31166 * tree-ssa-pre.cc (compute_partial_antic_aux): Properly
31167 PHI-translate ANTIC_IN.
31169 2023-03-03 Jakub Jelinek <jakub@redhat.com>
31171 PR tree-optimization/108988
31172 * gimple-fold.cc (gimple_fold_builtin_fputs): Fold len to
31173 size_type_node before passing it as argument to fwrite. Formatting
31176 2023-03-03 Richard Biener <rguenther@suse.de>
31179 * config/i386/i386.opt (--param x86-stv-max-visits): New param.
31180 * doc/invoke.texi (--param x86-stv-max-visits): Document it.
31181 * config/i386/i386-features.h (scalar_chain::max_visits): New.
31182 (scalar_chain::build): Add bitmap parameter, return boolean.
31183 (scalar_chain::add_insn): Likewise.
31184 (scalar_chain::analyze_register_chain): Likewise.
31185 * config/i386/i386-features.cc (scalar_chain::scalar_chain):
31186 Initialize max_visits.
31187 (scalar_chain::analyze_register_chain): When we exhaust
31188 max_visits, abort. Also abort when running into any
31190 (scalar_chain::add_insn): Propagate abort.
31191 (scalar_chain::build): Likewise. When aborting amend
31192 the set of disallowed insn with the insns set.
31193 (convert_scalars_to_vector): Adjust. Do not convert aborted
31196 2023-03-03 Richard Biener <rguenther@suse.de>
31199 * dwarf2out.cc (dwarf2out_late_global_decl): Do not
31200 generate a DIE for a function scope static.
31202 2023-03-03 Alexandre Oliva <oliva@adacore.com>
31204 * config/vx-common.h (WINT_TYPE): Alias to "wchar_t".
31206 2023-03-02 Jakub Jelinek <jakub@redhat.com>
31209 * target.h (emit_support_tinfos_callback): New typedef.
31210 * targhooks.h (default_emit_support_tinfos): Declare.
31211 * targhooks.cc (default_emit_support_tinfos): New function.
31212 * target.def (emit_support_tinfos): New target hook.
31213 * doc/tm.texi.in (emit_support_tinfos): Document it.
31214 * doc/tm.texi: Regenerated.
31215 * config/i386/i386.cc (ix86_emit_support_tinfos): New function.
31216 (TARGET_EMIT_SUPPORT_TINFOS): Redefine.
31218 2023-03-02 Vladimir N. Makarov <vmakarov@redhat.com>
31220 * ira-costs.cc: Include print-rtl.h.
31221 (record_reg_classes, scan_one_insn): Add code to print debug info.
31222 (record_operand_costs): Find and use smaller cost for hard reg
31225 2023-03-02 Kwok Cheung Yeung <kcy@codesourcery.com>
31226 Paul-Antoine Arras <pa@codesourcery.com>
31228 * builtins.cc (mathfn_built_in_explicit): New.
31229 * config/gcn/gcn.cc: Include case-cfn-macros.h.
31230 (mathfn_built_in_explicit): Add prototype.
31231 (gcn_vectorize_builtin_vectorized_function): New.
31232 (gcn_libc_has_function): New.
31233 (TARGET_LIBC_HAS_FUNCTION): Define.
31234 (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Define.
31236 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
31238 PR tree-optimization/108979
31239 * tree-vect-stmts.cc (vectorizable_operation): Don't mask
31240 operations on invariants.
31242 2023-03-02 Robin Dapp <rdapp@linux.ibm.com>
31244 * config/s390/predicates.md (vll_bias_operand): Add -1 bias.
31245 * config/s390/s390.cc (s390_option_override_internal): Make
31246 partial vector usage the default from z13 on.
31247 * config/s390/vector.md (len_load_v16qi): Add.
31248 (len_store_v16qi): Add.
31250 2023-03-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
31252 * simplify-rtx.cc (simplify_context::simplify_subreg): Use byte instead
31253 of constant 0 offset.
31255 2023-03-02 Robert Suchanek <robert.suchanek@imgtec.com>
31257 * config/mips/mips.cc (mips_set_text_contents_type): Use HOST_WIDE_INT
31259 * config/mips/mips-protos.h (mips_set_text_contents_type): Likewise.
31261 2023-03-02 Junxian Zhu <zhujunxian@oss.cipunited.com>
31263 * config.gcc: add -with-{no-}msa build option.
31264 * config/mips/mips.h: Likewise.
31265 * doc/install.texi: Likewise.
31267 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
31269 PR tree-optimization/108603
31270 * explow.cc (convert_memory_address_addr_space_1): Only wrap
31271 the result of a recursive call in a CONST if no instructions
31274 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
31276 PR tree-optimization/108430
31277 * tree-vect-stmts.cc (vectorizable_condition): Fix handling
31278 of inverted condition.
31280 2023-03-02 Jakub Jelinek <jakub@redhat.com>
31283 * fold-const.cc (native_interpret_expr) <case REAL_CST>: Before memcmp
31284 comparison copy the bytes from ptr to a temporary buffer and clearing
31285 padding bits in there.
31287 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
31289 PR middle-end/108545
31290 * gimplify.cc (struct tree_operand_hash_no_se): New.
31291 (omp_index_mapping_groups_1, omp_index_mapping_groups,
31292 omp_reindex_mapping_groups, omp_mapped_by_containing_struct,
31293 omp_tsort_mapping_groups_1, omp_tsort_mapping_groups,
31294 oacc_resolve_clause_dependencies, omp_build_struct_sibling_lists,
31295 gimplify_scan_omp_clauses): Use tree_operand_hash_no_se instead
31296 of tree_operand_hash.
31298 2023-03-01 LIU Hao <lh_mouse@126.com>
31301 * config/i386/host-mingw32.cc (mingw32_gt_pch_get_address):
31302 Remove the size limit `pch_VA_max_size`
31304 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
31306 PR middle-end/108546
31307 * omp-low.cc (lower_omp_target): Remove optional handling
31308 on the receiver side, i.e. inside target (data), for
31311 2023-03-01 Jakub Jelinek <jakub@redhat.com>
31314 * cfgexpand.cc (expand_debug_expr): Handle WIDEN_{PLUS,MINUS}_EXPR
31315 and VEC_WIDEN_{PLUS,MINUS}_{HI,LO}_EXPR.
31317 2023-03-01 Richard Biener <rguenther@suse.de>
31319 PR tree-optimization/108970
31320 * tree-vect-loop-manip.cc (slpeel_can_duplicate_loop_p):
31321 Check we can copy the BBs.
31322 (slpeel_tree_duplicate_loop_to_edge_cfg): Avoid redundant
31324 (vect_do_peeling): Streamline error handling.
31326 2023-03-01 Richard Biener <rguenther@suse.de>
31328 PR tree-optimization/108950
31329 * tree-vect-patterns.cc (vect_recog_widen_sum_pattern):
31330 Check oprnd0 is defined in the loop.
31331 * tree-vect-loop.cc (vectorizable_reduction): Record all
31332 operands vector types, compute that of invariants and
31333 properly update their SLP nodes.
31335 2023-03-01 Kewen Lin <linkw@linux.ibm.com>
31338 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Allow
31339 implicit powerpc64 setting to be unset if 64 bit is enabled implicitly.
31341 2023-02-28 Qing Zhao <qing.zhao@oracle.com>
31343 PR middle-end/107411
31344 PR middle-end/107411
31345 * gimplify.cc (gimple_add_init_for_auto_var): Use sprintf to replace
31347 * tree-ssa-uninit.cc (warn_uninit): Handle the case when the
31348 LHS varaible of a .DEFERRED_INIT call doesn't have a DECL_NAME.
31350 2023-02-28 Jakub Jelinek <jakub@redhat.com>
31352 PR sanitizer/108894
31353 * ubsan.cc (ubsan_expand_bounds_ifn): Emit index >= bound
31354 comparison rather than index > bound.
31355 * gimple-fold.cc (gimple_fold_call): Use tree_int_cst_lt
31356 rather than tree_int_cst_le for IFN_UBSAN_BOUND comparison.
31357 * doc/invoke.texi (-fsanitize=bounds): Document that whether
31358 flexible array member-like arrays are instrumented or not depends
31359 on -fstrict-flex-arrays* options of strict_flex_array attributes.
31360 (-fsanitize=bounds-strict): Document that flexible array members
31361 are not instrumented.
31363 2023-02-27 Uroš Bizjak <ubizjak@gmail.com>
31367 * config/i386/i386.md (fmodxf3): Enable for flag_finite_math_only only.
31368 (fmod<mode>3): Ditto.
31369 (fpremxf4_i387): Ditto.
31370 (reminderxf3): Ditto.
31371 (reminder<mode>3): Ditto.
31372 (fprem1xf4_i387): Ditto.
31374 2023-02-27 Roger Sayle <roger@nextmovesoftware.com>
31376 * simplify-rtx.cc (simplify_unary_operation_1) <case FFS>: Avoid
31377 generating FFS with mismatched operand and result modes, by using
31378 an explicit SIGN_EXTEND/ZERO_EXTEND.
31379 <case POPCOUNT>: Likewise, for POPCOUNT of ZERO_EXTEND.
31380 <case PARITY>: Likewise, for PARITY of {ZERO,SIGN}_EXTEND.
31382 2023-02-27 Patrick Palka <ppalka@redhat.com>
31384 * hash-table.h (gt_pch_nx(hash_table<D>)): Remove static.
31385 * lra-int.h (lra_change_class): Likewise.
31386 * recog.h (which_op_alt): Likewise.
31387 * sel-sched-ir.h (sel_bb_empty_or_nop_p): Declare inline
31390 2023-02-27 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
31392 * config/xtensa/xtensa-protos.h (xtensa_match_CLAMPS_imms_p):
31394 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
31396 * config/xtensa/xtensa.h (TARGET_CLAMPS): New macro definition.
31397 * config/xtensa/xtensa.md (*xtensa_clamps): New insn pattern.
31399 2023-02-27 Max Filippov <jcmvbkbc@gmail.com>
31401 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v2)
31402 (xtensa_get_config_v3): New functions.
31404 2023-02-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31406 * config/aarch64/aarch64-simd.md (aarch64_abs<mode>): Fix typo in comment.
31408 2023-02-27 Lulu Cheng <chenglulu@loongson.cn>
31410 * config/host-linux.cc (TRY_EMPTY_VM_SPACE): Modify the value of
31411 the macro to 0x1000000000.
31413 2023-02-25 Gaius Mulley <gaiusmod2@gmail.com>
31416 * doc/gm2.texi (-fm2-pathname): New option documented.
31417 (-fm2-pathnameI): New option documented.
31418 (-fm2-prefix=): New option documented.
31419 (-fruntime-modules=): Update default module list.
31421 2023-02-25 Max Filippov <jcmvbkbc@gmail.com>
31424 * config/xtensa/xtensa-protos.h
31425 (xtensa_prepare_expand_call): Rename to xtensa_expand_call.
31426 * config/xtensa/xtensa.cc (xtensa_prepare_expand_call): Rename
31427 to xtensa_expand_call.
31428 (xtensa_expand_call): Emit the call and add a clobber expression
31429 for the static chain to it in case of windowed ABI.
31430 * config/xtensa/xtensa.md (call, call_value, sibcall)
31431 (sibcall_value): Call xtensa_expand_call and complete expansion
31432 right after that call.
31434 2023-02-24 Richard Biener <rguenther@suse.de>
31436 * vec.h (vec<T, A, vl_embed>::m_vecdata): Remove.
31437 (vec<T, A, vl_embed>::m_vecpfx): Align as T to avoid
31438 changing alignment of vec<T, A, vl_embed> and simplifying
31440 (vec<T, A, vl_embed>::address): Compute as this + 1.
31441 (vec<T, A, vl_embed>::embedded_size): Use sizeof the
31442 vector instead of the offset of the m_vecdata member.
31443 (auto_vec<T, N>::m_data): Turn storage into
31444 uninitialized unsigned char.
31445 (auto_vec<T, N>::auto_vec): Allow allocation of one
31446 stack member. Initialize m_vec in a special way to
31447 avoid later stringop overflow diagnostics.
31448 * vec.cc (test_auto_alias): New.
31449 (vec_cc_tests): Call it.
31451 2023-02-24 Richard Biener <rguenther@suse.de>
31453 * vec.h (vec<T, A, vl_embed>::lower_bound): Adjust to
31454 take a const reference to the object, use address to
31456 (vec<T, A, vl_embed>::contains): Use address to access data.
31457 (vec<T, A, vl_embed>::operator[]): Use address instead of
31458 m_vecdata to access data.
31459 (vec<T, A, vl_embed>::iterate): Likewise.
31460 (vec<T, A, vl_embed>::copy): Likewise.
31461 (vec<T, A, vl_embed>::quick_push): Likewise.
31462 (vec<T, A, vl_embed>::pop): Likewise.
31463 (vec<T, A, vl_embed>::quick_insert): Likewise.
31464 (vec<T, A, vl_embed>::ordered_remove): Likewise.
31465 (vec<T, A, vl_embed>::unordered_remove): Likewise.
31466 (vec<T, A, vl_embed>::block_remove): Likewise.
31467 (vec<T, A, vl_heap>::address): Likewise.
31469 2023-02-24 Martin Liska <mliska@suse.cz>
31471 PR sanitizer/108834
31472 * asan.cc (asan_add_global): Use proper TU name for normal
31473 global variables (and aux_base_name for the artificial one).
31475 2023-02-24 Jakub Jelinek <jakub@redhat.com>
31477 * config/i386/i386-builtin.def: Update description of BDESC
31478 and BDESC_FIRST in file comment to include mask2.
31480 2023-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31482 * config/aarch64/aarch64-cores.def (FLAGS): Update comment.
31484 2023-02-24 Jakub Jelinek <jakub@redhat.com>
31486 PR middle-end/108854
31487 * cgraphclones.cc (duplicate_thunk_for_node): If no parameter
31488 changes are needed, copy at least DECL_ARGUMENTS PARM_DECL
31489 nodes and adjust their DECL_CONTEXT.
31491 2023-02-24 Jakub Jelinek <jakub@redhat.com>
31494 * config/i386/i386-builtin.def (__builtin_ia32_cvtne2ps2bf16_v16bf,
31495 __builtin_ia32_cvtne2ps2bf16_v16bf_mask,
31496 __builtin_ia32_cvtne2ps2bf16_v16bf_maskz,
31497 __builtin_ia32_cvtne2ps2bf16_v8bf,
31498 __builtin_ia32_cvtne2ps2bf16_v8bf_mask,
31499 __builtin_ia32_cvtne2ps2bf16_v8bf_maskz,
31500 __builtin_ia32_cvtneps2bf16_v8sf_mask,
31501 __builtin_ia32_cvtneps2bf16_v8sf_maskz,
31502 __builtin_ia32_cvtneps2bf16_v4sf_mask,
31503 __builtin_ia32_cvtneps2bf16_v4sf_maskz,
31504 __builtin_ia32_dpbf16ps_v8sf, __builtin_ia32_dpbf16ps_v8sf_mask,
31505 __builtin_ia32_dpbf16ps_v8sf_maskz, __builtin_ia32_dpbf16ps_v4sf,
31506 __builtin_ia32_dpbf16ps_v4sf_mask,
31507 __builtin_ia32_dpbf16ps_v4sf_maskz): Require also
31508 OPTION_MASK_ISA_AVX512VL.
31510 2023-02-24 Sebastian Huber <sebastian.huber@embedded-brains.de>
31512 * config/riscv/t-rtems: Keep only -mcmodel=medany 64-bit multilibs.
31513 Add non-compact 32-bit multilibs.
31515 2023-02-24 Junxian Zhu <zhujunxian@oss.cipunited.com>
31517 * config/mips/mips.md (*clo<mode>2): New pattern.
31519 2023-02-24 Prachi Godbole <prachi.godbole@imgtec.com>
31521 * config/mips/mips.h (machine_function): New variable
31522 use_hazard_barrier_return_p.
31523 * config/mips/mips.md (UNSPEC_JRHB): New unspec.
31524 (mips_hb_return_internal): New insn pattern.
31525 * config/mips/mips.cc (mips_attribute_table): Add attribute
31526 use_hazard_barrier_return.
31527 (mips_use_hazard_barrier_return_p): New static function.
31528 (mips_function_attr_inlinable_p): Likewise.
31529 (mips_compute_frame_info): Set use_hazard_barrier_return_p.
31530 Emit error for unsupported architecture choice.
31531 (mips_function_ok_for_sibcall, mips_can_use_return_insn):
31532 Return false for use_hazard_barrier_return.
31533 (mips_expand_epilogue): Emit hazard barrier return.
31534 * doc/extend.texi: Document use_hazard_barrier_return.
31536 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
31538 * config/xtensa/xtensa-dynconfig.cc (config.h, system.h)
31539 (coretypes.h, diagnostic.h, intl.h): Use "..." instead of <...>
31540 for the gcc-internal headers.
31542 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
31544 * config/xtensa/t-xtensa (xtensa-dynconfig.o): Use $(COMPILE)
31545 and $(POSTCOMPILE) instead of manual dependency listing.
31546 * config/xtensa/xtensa-dynconfig.c: Rename to ...
31547 * config/xtensa/xtensa-dynconfig.cc: ... this.
31549 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
31551 * doc/cfg.texi: Reorder index entries around @items.
31552 * doc/cpp.texi: Ditto.
31553 * doc/cppenv.texi: Ditto.
31554 * doc/cppopts.texi: Ditto.
31555 * doc/generic.texi: Ditto.
31556 * doc/install.texi: Ditto.
31557 * doc/extend.texi: Ditto.
31558 * doc/invoke.texi: Ditto.
31559 * doc/md.texi: Ditto.
31560 * doc/rtl.texi: Ditto.
31561 * doc/tm.texi.in: Ditto.
31562 * doc/trouble.texi: Ditto.
31563 * doc/tm.texi: Regenerate.
31565 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
31567 * config/xtensa/xtensa.md: New peephole2 pattern that eliminates
31568 the occurrence of general-purpose register used only once and for
31569 transferring intermediate value.
31571 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
31573 * config/xtensa/xtensa.cc (machine_function): Add new member
31574 'eliminated_callee_saved_bmp'.
31575 (xtensa_can_eliminate_callee_saved_reg_p): New function to
31576 determine whether the register can be eliminated or not.
31577 (xtensa_expand_prologue): Add invoking the above function and
31578 elimination the use of callee-saved register by using its stack
31579 slot through the stack pointer (or the frame pointer if needed)
31581 (xtensa_expand_prologue): Modify to not emit register restoration
31582 insn from its stack slot if the register is already eliminated.
31584 2023-02-23 Jakub Jelinek <jakub@redhat.com>
31586 PR translation/108890
31587 * config/xtensa/xtensa-dynconfig.c (xtensa_load_config): Drop _()s
31588 around fatal_error format strings.
31590 2023-02-23 Richard Biener <rguenther@suse.de>
31592 * tree-ssa-structalias.cc (handle_lhs_call): Do not
31593 re-create rhsc, only truncate it.
31595 2023-02-23 Jakub Jelinek <jakub@redhat.com>
31597 PR middle-end/106258
31598 * ipa-prop.cc (try_make_edge_direct_virtual_call): Handle
31599 BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
31601 2023-02-23 Richard Biener <rguenther@suse.de>
31603 * tree-if-conv.cc (tree_if_conversion): Properly manage
31604 memory of refs and the contained data references.
31606 2023-02-23 Richard Biener <rguenther@suse.de>
31608 PR tree-optimization/108888
31609 * tree-if-conv.cc (if_convertible_stmt_p): Set PLF_2 on
31610 calls to predicate.
31611 (predicate_statements): Only predicate calls with PLF_2.
31613 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
31615 * config/xtensa/xtensa.md
31616 (zero_cost_loop_start, zero_cost_loop_end, loop_end):
31617 Add missing "SI:" to PLUS RTXes.
31619 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
31622 * config/xtensa/xtensa.cc (xtensa_expand_epilogue):
31623 Emit (use (reg:SI A0_REG)) at the end in the sibling call
31624 (i.e. the same place as (return) in the normal call).
31626 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
31629 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
31632 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
31634 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
31635 (sibcall_value, sibcall_value_internal): Add 'use' expression
31638 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
31640 * doc/cppdiropts.texi: Reorder @opindex commands to precede
31641 @items they relate to.
31642 * doc/cppopts.texi: Ditto.
31643 * doc/cppwarnopts.texi: Ditto.
31644 * doc/invoke.texi: Ditto.
31645 * doc/lto.texi: Ditto.
31647 2023-02-22 Andrew Stubbs <ams@codesourcery.com>
31649 * internal-fn.cc (expand_MASK_CALL): New.
31650 * internal-fn.def (MASK_CALL): New.
31651 * internal-fn.h (expand_MASK_CALL): New prototype.
31652 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Set vector_type
31653 for mask arguments also.
31654 * tree-if-conv.cc: Include cgraph.h.
31655 (if_convertible_stmt_p): Do if conversions for calls to SIMD calls.
31656 (predicate_statements): Convert functions to IFN_MASK_CALL.
31657 * tree-vect-loop.cc (vect_get_datarefs_in_loop): Recognise
31658 IFN_MASK_CALL as a SIMD function call.
31659 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
31660 IFN_MASK_CALL as an inbranch SIMD function call.
31661 Generate the mask vector arguments.
31663 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31665 * config/riscv/riscv-vector-builtins-bases.cc (class reducop): New class.
31666 (class widen_reducop): Ditto.
31667 (class freducop): Ditto.
31668 (class widen_freducop): Ditto.
31670 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
31671 * config/riscv/riscv-vector-builtins-functions.def (vredsum): Add reduction support.
31680 (vwredsumu): Ditto.
31681 (vfredusum): Ditto.
31682 (vfredosum): Ditto.
31685 (vfwredosum): Ditto.
31686 (vfwredusum): Ditto.
31687 * config/riscv/riscv-vector-builtins-shapes.cc (struct reduc_alu_def): Ditto.
31689 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
31690 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WI_OPS): New macro.
31691 (DEF_RVV_WU_OPS): Ditto.
31692 (DEF_RVV_WF_OPS): Ditto.
31693 (vint8mf8_t): Ditto.
31694 (vint8mf4_t): Ditto.
31695 (vint8mf2_t): Ditto.
31696 (vint8m1_t): Ditto.
31697 (vint8m2_t): Ditto.
31698 (vint8m4_t): Ditto.
31699 (vint8m8_t): Ditto.
31700 (vint16mf4_t): Ditto.
31701 (vint16mf2_t): Ditto.
31702 (vint16m1_t): Ditto.
31703 (vint16m2_t): Ditto.
31704 (vint16m4_t): Ditto.
31705 (vint16m8_t): Ditto.
31706 (vint32mf2_t): Ditto.
31707 (vint32m1_t): Ditto.
31708 (vint32m2_t): Ditto.
31709 (vint32m4_t): Ditto.
31710 (vint32m8_t): Ditto.
31711 (vuint8mf8_t): Ditto.
31712 (vuint8mf4_t): Ditto.
31713 (vuint8mf2_t): Ditto.
31714 (vuint8m1_t): Ditto.
31715 (vuint8m2_t): Ditto.
31716 (vuint8m4_t): Ditto.
31717 (vuint8m8_t): Ditto.
31718 (vuint16mf4_t): Ditto.
31719 (vuint16mf2_t): Ditto.
31720 (vuint16m1_t): Ditto.
31721 (vuint16m2_t): Ditto.
31722 (vuint16m4_t): Ditto.
31723 (vuint16m8_t): Ditto.
31724 (vuint32mf2_t): Ditto.
31725 (vuint32m1_t): Ditto.
31726 (vuint32m2_t): Ditto.
31727 (vuint32m4_t): Ditto.
31728 (vuint32m8_t): Ditto.
31729 (vfloat32mf2_t): Ditto.
31730 (vfloat32m1_t): Ditto.
31731 (vfloat32m2_t): Ditto.
31732 (vfloat32m4_t): Ditto.
31733 (vfloat32m8_t): Ditto.
31734 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WI_OPS): Ditto.
31735 (DEF_RVV_WU_OPS): Ditto.
31736 (DEF_RVV_WF_OPS): Ditto.
31737 (required_extensions_p): Add reduction support.
31738 (rvv_arg_type_info::get_base_vector_type): Ditto.
31739 (rvv_arg_type_info::get_tree_type): Ditto.
31740 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
31741 * config/riscv/riscv.md: Ditto.
31742 * config/riscv/vector-iterators.md (minu): Ditto.
31743 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): New patern.
31744 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
31745 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Ditto.
31746 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>):Ditto.
31747 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
31748 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
31749 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
31751 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31753 * config/riscv/iterators.md: New iterator.
31754 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New class.
31755 (enum ternop_type): New enum.
31756 (class vmacc): New class.
31757 (class imac): Ditto.
31758 (class vnmsac): Ditto.
31759 (enum widen_ternop_type): New enum.
31760 (class vmadd): Ditto.
31761 (class vnmsub): Ditto.
31762 (class iwmac): Ditto.
31763 (class vwmacc): Ditto.
31764 (class vwmaccu): Ditto.
31765 (class vwmaccsu): Ditto.
31766 (class vwmaccus): Ditto.
31767 (class reverse_binop): Ditto.
31768 (class vfmacc): Ditto.
31769 (class vfnmsac): Ditto.
31770 (class vfmadd): Ditto.
31771 (class vfnmsub): Ditto.
31772 (class vfnmacc): Ditto.
31773 (class vfmsac): Ditto.
31774 (class vfnmadd): Ditto.
31775 (class vfmsub): Ditto.
31776 (class vfwmacc): Ditto.
31777 (class vfwnmacc): Ditto.
31778 (class vfwmsac): Ditto.
31779 (class vfwnmsac): Ditto.
31780 (class float_misc): Ditto.
31781 (class fcmp): Ditto.
31782 (class vfclass): Ditto.
31783 (class vfcvt_x): Ditto.
31784 (class vfcvt_rtz_x): Ditto.
31785 (class vfcvt_f): Ditto.
31786 (class vfwcvt_x): Ditto.
31787 (class vfwcvt_rtz_x): Ditto.
31788 (class vfwcvt_f): Ditto.
31789 (class vfncvt_x): Ditto.
31790 (class vfncvt_rtz_x): Ditto.
31791 (class vfncvt_f): Ditto.
31792 (class vfncvt_rod_f): Ditto.
31794 * config/riscv/riscv-vector-builtins-bases.h:
31795 * config/riscv/riscv-vector-builtins-functions.def (vzext): Ditto.
31839 (vfcvt_rtz_x): Ditto.
31840 (vfcvt_rtz_xu): Ditto.
31843 (vfwcvt_xu): Ditto.
31844 (vfwcvt_rtz_x): Ditto.
31845 (vfwcvt_rtz_xu): Ditto.
31848 (vfncvt_xu): Ditto.
31849 (vfncvt_rtz_x): Ditto.
31850 (vfncvt_rtz_xu): Ditto.
31852 (vfncvt_rod_f): Ditto.
31853 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
31854 (struct move_def): Ditto.
31855 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTF_OPS): New macro.
31856 (DEF_RVV_CONVERT_I_OPS): Ditto.
31857 (DEF_RVV_CONVERT_U_OPS): Ditto.
31858 (DEF_RVV_WCONVERT_I_OPS): Ditto.
31859 (DEF_RVV_WCONVERT_U_OPS): Ditto.
31860 (DEF_RVV_WCONVERT_F_OPS): Ditto.
31861 (vfloat64m1_t): Ditto.
31862 (vfloat64m2_t): Ditto.
31863 (vfloat64m4_t): Ditto.
31864 (vfloat64m8_t): Ditto.
31865 (vint32mf2_t): Ditto.
31866 (vint32m1_t): Ditto.
31867 (vint32m2_t): Ditto.
31868 (vint32m4_t): Ditto.
31869 (vint32m8_t): Ditto.
31870 (vint64m1_t): Ditto.
31871 (vint64m2_t): Ditto.
31872 (vint64m4_t): Ditto.
31873 (vint64m8_t): Ditto.
31874 (vuint32mf2_t): Ditto.
31875 (vuint32m1_t): Ditto.
31876 (vuint32m2_t): Ditto.
31877 (vuint32m4_t): Ditto.
31878 (vuint32m8_t): Ditto.
31879 (vuint64m1_t): Ditto.
31880 (vuint64m2_t): Ditto.
31881 (vuint64m4_t): Ditto.
31882 (vuint64m8_t): Ditto.
31883 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CONVERT_I_OPS): Ditto.
31884 (DEF_RVV_CONVERT_U_OPS): Ditto.
31885 (DEF_RVV_WCONVERT_I_OPS): Ditto.
31886 (DEF_RVV_WCONVERT_U_OPS): Ditto.
31887 (DEF_RVV_WCONVERT_F_OPS): Ditto.
31888 (DEF_RVV_F_OPS): Ditto.
31889 (DEF_RVV_WEXTF_OPS): Ditto.
31890 (required_extensions_p): Adjust for floating-point support.
31891 (check_required_extensions): Ditto.
31892 (unsigned_base_type_p): Ditto.
31893 (get_mode_for_bitsize): Ditto.
31894 (rvv_arg_type_info::get_base_vector_type): Ditto.
31895 (rvv_arg_type_info::get_tree_type): Ditto.
31896 * config/riscv/riscv-vector-builtins.def (v_f): New define.
31899 (xu_v): New define.
31901 (xu_w): New define.
31902 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): New enum.
31903 (function_expander::arg_mode): New function.
31904 * config/riscv/vector-iterators.md (sof): New iterator.
31910 (fixuns_trunc): Ditto.
31912 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
31913 (@pred_<optab><mode>): Ditto.
31914 (@pred_<optab><mode>_scalar): Ditto.
31915 (@pred_<optab><mode>_reverse_scalar): Ditto.
31916 (@pred_<copysign><mode>): Ditto.
31917 (@pred_<copysign><mode>_scalar): Ditto.
31918 (@pred_mul_<optab><mode>): Ditto.
31919 (pred_mul_<optab><mode>_undef_merge): Ditto.
31920 (*pred_<madd_nmsub><mode>): Ditto.
31921 (*pred_<macc_nmsac><mode>): Ditto.
31922 (*pred_mul_<optab><mode>): Ditto.
31923 (@pred_mul_<optab><mode>_scalar): Ditto.
31924 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
31925 (*pred_<madd_nmsub><mode>_scalar): Ditto.
31926 (*pred_<macc_nmsac><mode>_scalar): Ditto.
31927 (*pred_mul_<optab><mode>_scalar): Ditto.
31928 (@pred_neg_mul_<optab><mode>): Ditto.
31929 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
31930 (*pred_<nmadd_msub><mode>): Ditto.
31931 (*pred_<nmacc_msac><mode>): Ditto.
31932 (*pred_neg_mul_<optab><mode>): Ditto.
31933 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
31934 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
31935 (*pred_<nmadd_msub><mode>_scalar): Ditto.
31936 (*pred_<nmacc_msac><mode>_scalar): Ditto.
31937 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
31938 (@pred_<misc_op><mode>): Ditto.
31939 (@pred_class<mode>): Ditto.
31940 (@pred_dual_widen_<optab><mode>): Ditto.
31941 (@pred_dual_widen_<optab><mode>_scalar): Ditto.
31942 (@pred_single_widen_<plus_minus:optab><mode>): Ditto.
31943 (@pred_single_widen_<plus_minus:optab><mode>_scalar): Ditto.
31944 (@pred_widen_mul_<optab><mode>): Ditto.
31945 (@pred_widen_mul_<optab><mode>_scalar): Ditto.
31946 (@pred_widen_neg_mul_<optab><mode>): Ditto.
31947 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
31948 (@pred_cmp<mode>): Ditto.
31949 (*pred_cmp<mode>): Ditto.
31950 (*pred_cmp<mode>_narrow): Ditto.
31951 (@pred_cmp<mode>_scalar): Ditto.
31952 (*pred_cmp<mode>_scalar): Ditto.
31953 (*pred_cmp<mode>_scalar_narrow): Ditto.
31954 (@pred_eqne<mode>_scalar): Ditto.
31955 (*pred_eqne<mode>_scalar): Ditto.
31956 (*pred_eqne<mode>_scalar_narrow): Ditto.
31957 (@pred_merge<mode>_scalar): Ditto.
31958 (@pred_fcvt_x<v_su>_f<mode>): Ditto.
31959 (@pred_<fix_cvt><mode>): Ditto.
31960 (@pred_<float_cvt><mode>): Ditto.
31961 (@pred_widen_fcvt_x<v_su>_f<mode>): Ditto.
31962 (@pred_widen_<fix_cvt><mode>): Ditto.
31963 (@pred_widen_<float_cvt><mode>): Ditto.
31964 (@pred_extend<mode>): Ditto.
31965 (@pred_narrow_fcvt_x<v_su>_f<mode>): Ditto.
31966 (@pred_narrow_<fix_cvt><mode>): Ditto.
31967 (@pred_narrow_<float_cvt><mode>): Ditto.
31968 (@pred_trunc<mode>): Ditto.
31969 (@pred_rod_trunc<mode>): Ditto.
31971 2023-02-22 Jakub Jelinek <jakub@redhat.com>
31973 PR middle-end/106258
31974 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
31975 cgraph_update_edges_for_call_stmt_node, cgraph_node::verify_node):
31976 Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
31977 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
31979 2023-02-22 Thomas Schwinge <thomas@codesourcery.com>
31981 * common.opt (-Wcomplain-wrong-lang): New.
31982 * doc/invoke.texi (-Wno-complain-wrong-lang): Document it.
31983 * opts-common.cc (prune_options): Handle it.
31984 * opts-global.cc (complain_wrong_lang): Use it.
31986 2023-02-21 David Malcolm <dmalcolm@redhat.com>
31989 * doc/invoke.texi: Document -fno-analyzer-suppress-followups.
31991 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
31994 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
31996 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
31997 (sibcall_value, sibcall_value_internal): Add 'use' expression
32000 2023-02-21 Richard Biener <rguenther@suse.de>
32002 PR tree-optimization/108691
32003 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Remove
32004 assert about calls_setjmp not becoming true when it was false.
32006 2023-02-21 Richard Biener <rguenther@suse.de>
32008 PR tree-optimization/108793
32009 * tree-ssa-loop-niter.cc (number_of_iterations_until_wrap):
32010 Use convert operands to niter_type when computing num.
32012 2023-02-21 Richard Biener <rguenther@suse.de>
32015 2023-02-13 Richard Biener <rguenther@suse.de>
32017 PR tree-optimization/108691
32018 * tree-cfg.cc (notice_special_calls): When the CFG is built
32019 honor gimple_call_ctrl_altering_p.
32020 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
32021 temporarily if the call is not control-altering.
32022 * calls.cc (emit_call_1): Do not add REG_SETJMP if
32023 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
32025 2023-02-21 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
32027 * config/xtensa/xtensa.cc (xtensa_call_save_reg): Change to return
32028 true if register A0 (return address register) when -Og is specified.
32030 2023-02-20 Uroš Bizjak <ubizjak@gmail.com>
32032 * config/i386/predicates.md
32033 (general_x64constmem_operand): New predicate.
32034 * config/i386/i386.md (*cmpqi_ext<mode>_1):
32035 Use nonimm_x64constmem_operand.
32036 (*cmpqi_ext<mode>_3): Use general_x64constmem_operand.
32037 (*addqi_ext<mode>_1): Ditto.
32038 (*testqi_ext<mode>_1): Ditto.
32039 (*andqi_ext<mode>_1): Ditto.
32040 (*andqi_ext<mode>_1_cc): Ditto.
32041 (*<any_or:code>qi_ext<mode>_1): Ditto.
32042 (*xorqi_ext<mode>_1_cc): Ditto.
32044 2023-02-20 Jakub Jelinek <jakub2redhat.com>
32047 * config/rs6000/rs6000.md (umaddditi4): Swap gen_maddlddi4 with
32048 gen_umadddi4_highpart{,_le}.
32050 2023-02-20 Kito Cheng <kito.cheng@sifive.com>
32052 * config/riscv/riscv.md (prefetch): Use r instead of p for the
32054 (riscv_prefetchi_<mode>): Ditto.
32056 2023-02-20 Richard Biener <rguenther@suse.de>
32058 PR tree-optimization/108816
32059 * tree-vect-loop-manip.cc (vect_loop_versioning): Adjust
32060 versioning condition split prerequesite, assert required
32063 2023-02-20 Richard Biener <rguenther@suse.de>
32065 PR tree-optimization/108825
32066 * tree-ssa-loop-manip.cc (verify_loop_closed_ssa): For
32067 loop-local verfication only verify there's no pending SSA
32070 2023-02-20 Richard Biener <rguenther@suse.de>
32072 PR tree-optimization/108819
32073 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): Check
32074 we have an SSA name as iv_2 as expected.
32076 2023-02-18 Jakub Jelinek <jakub@redhat.com>
32078 PR tree-optimization/108819
32079 * tree-ssa-reassoc.cc (update_ops): Fold new stmt in place.
32081 2023-02-18 Jakub Jelinek <jakub@redhat.com>
32084 * config/i386/i386-protos.h (ix86_replace_reg_with_reg): Declare.
32085 * config/i386/i386-expand.cc (ix86_replace_reg_with_reg): New
32087 * config/i386/i386.md: Replace replace_rtx calls in all peephole2s
32088 with ix86_replace_reg_with_reg.
32090 2023-02-18 Gerald Pfeifer <gerald@pfeifer.com>
32092 * doc/invoke.texi (AVR Options): Update link to AVR-LibC.
32094 2023-02-18 Xi Ruoyao <xry111@xry111.site>
32096 * config.gcc (triplet_abi): Set its value based on $with_abi,
32097 instead of $target.
32098 (la_canonical_triplet): Set it after $triplet_abi is set
32100 * config/loongarch/t-linux (MULTILIB_OSDIRNAMES): Make the
32101 multiarch tuple for lp64d "loongarch64-linux-gnu" (without
32104 2023-02-18 Andrew Pinski <apinski@marvell.com>
32106 * match.pd: Remove #if GIMPLE around the
32109 2023-02-18 Andrew Pinski <apinski@marvell.com>
32111 * value-query.h (get_range_query): Return the global ranges
32112 for a nullptr func.
32114 2023-02-17 Siddhesh Poyarekar <siddhesh@gotplt.org>
32116 * doc/invoke.texi (@item -Wall): Fix typo in
32119 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
32122 * config/i386/predicates.md
32123 (nonimm_x64constmem_operand): New predicate.
32124 * config/i386/i386.md (*addqi_ext<mode>_0): New insn pattern.
32125 (*subqi_ext<mode>_0): Ditto.
32126 (*andqi_ext<mode>_0): Ditto.
32127 (*<any_or:code>qi_ext<mode>_0): Ditto.
32129 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
32132 * simplify-rtx.cc (simplify_context::simplify_subreg): Use
32133 int_outermode instead of GET_MODE (tem) to prevent
32134 VOIDmode from entering simplify_gen_subreg.
32136 2023-02-17 Richard Biener <rguenther@suse.de>
32138 PR tree-optimization/108821
32139 * tree-ssa-loop-im.cc (sm_seq_valid_bb): We can also not
32140 move volatile accesses.
32142 2023-02-17 Richard Biener <rguenther@suse.de>
32144 * tree-ssa.cc (ssa_undefined_value_p): Assert we are not
32145 called on virtual operands.
32146 * tree-ssa-sccvn.cc (vn_phi_lookup): Guard
32147 ssa_undefined_value_p calls.
32148 (vn_phi_insert): Likewise.
32149 (set_ssa_val_to): Likewise.
32150 (visit_phi): Avoid extra work with equivalences for
32151 virtual operand PHIs.
32153 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32155 * config/riscv/riscv-vector-builtins-bases.cc (class mask_logic): New
32157 (class mask_nlogic): Ditto.
32158 (class mask_notlogic): Ditto.
32159 (class vmmv): Ditto.
32160 (class vmclr): Ditto.
32161 (class vmset): Ditto.
32162 (class vmnot): Ditto.
32163 (class vcpop): Ditto.
32164 (class vfirst): Ditto.
32165 (class mask_misc): Ditto.
32166 (class viota): Ditto.
32167 (class vid): Ditto.
32169 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32170 * config/riscv/riscv-vector-builtins-functions.def (vmand): Ditto.
32189 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
32190 (struct mask_alu_def): Ditto.
32192 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
32193 * config/riscv/riscv-vector-builtins.cc: Ditto.
32194 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns): Fix bug
32195 for dest it scalar RVV intrinsics.
32196 * config/riscv/vector-iterators.md (sof): New iterator.
32197 * config/riscv/vector.md (@pred_<optab>n<mode>): New pattern.
32198 (@pred_<optab>not<mode>): New pattern.
32199 (@pred_popcount<VB:mode><P:mode>): New pattern.
32200 (@pred_ffs<VB:mode><P:mode>): New pattern.
32201 (@pred_<misc_op><mode>): New pattern.
32202 (@pred_iota<mode>): New pattern.
32203 (@pred_series<mode>): New pattern.
32205 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32207 * config/riscv/riscv-vector-builtins-functions.def (vadc): Rename.
32211 * config/riscv/riscv-vector-builtins.cc: Ditto.
32213 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32214 kito-cheng <kito.cheng@sifive.com>
32216 * config/riscv/riscv-protos.h (sew64_scalar_helper): New function.
32217 * config/riscv/riscv-v.cc (has_vi_variant_p): Adjust.
32218 (sew64_scalar_helper): New function.
32219 * config/riscv/vector.md: Normalization.
32221 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32223 * config/riscv/riscv-vector-builtins-functions.def (vsetvlmax): Rearrange.
32285 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32287 * config/riscv/vector.md (@pred_<optab><mode>): Rearrange.
32288 (@pred_<optab><mode>_scalar): Ditto.
32289 (*pred_<optab><mode>_scalar): Ditto.
32290 (*pred_<optab><mode>_extended_scalar): Ditto.
32292 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32294 * config/riscv/riscv-protos.h (riscv_run_selftests): Remove 'extern'.
32295 (init_builtins): Ditto.
32296 (mangle_builtin_type): Ditto.
32297 (verify_type_context): Ditto.
32298 (handle_pragma_vector): Ditto.
32299 (builtin_decl): Ditto.
32300 (expand_builtin): Ditto.
32301 (const_vec_all_same_in_range_p): Ditto.
32302 (legitimize_move): Ditto.
32303 (emit_vlmax_op): Ditto.
32304 (emit_nonvlmax_op): Ditto.
32305 (get_vlmul): Ditto.
32306 (get_ratio): Ditto.
32309 (get_avl_type): Ditto.
32310 (calculate_ratio): Ditto.
32311 (enum vlmul_type): Ditto.
32313 (neg_simm5_p): Ditto.
32314 (has_vi_variant_p): Ditto.
32316 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32318 * config/riscv/riscv-protos.h (simm32_p): Remove.
32319 * config/riscv/riscv-v.cc (simm32_p): Ditto.
32320 * config/riscv/vector.md: Use immediate_operand
32321 instead of riscv_vector::simm32_p.
32323 2023-02-16 Gerald Pfeifer <gerald@pfeifer.com>
32325 * doc/invoke.texi (Optimize Options): Reword the explanation
32326 getting minimal, maximal and default values of a parameter.
32328 2023-02-16 Patrick Palka <ppalka@redhat.com>
32330 * addresses.h: Mechanically drop 'static' from 'static inline'
32331 functions via s/^static inline/inline/g.
32332 * asan.h: Likewise.
32333 * attribs.h: Likewise.
32334 * basic-block.h: Likewise.
32335 * bitmap.h: Likewise.
32336 * cfghooks.h: Likewise.
32337 * cfgloop.h: Likewise.
32338 * cgraph.h: Likewise.
32339 * cselib.h: Likewise.
32340 * data-streamer.h: Likewise.
32341 * debug.h: Likewise.
32343 * diagnostic.h: Likewise.
32344 * dominance.h: Likewise.
32345 * dumpfile.h: Likewise.
32346 * emit-rtl.h: Likewise.
32347 * except.h: Likewise.
32348 * expmed.h: Likewise.
32349 * expr.h: Likewise.
32350 * fixed-value.h: Likewise.
32351 * gengtype.h: Likewise.
32352 * gimple-expr.h: Likewise.
32353 * gimple-iterator.h: Likewise.
32354 * gimple-predict.h: Likewise.
32355 * gimple-range-fold.h: Likewise.
32356 * gimple-ssa.h: Likewise.
32357 * gimple.h: Likewise.
32358 * graphite.h: Likewise.
32359 * hard-reg-set.h: Likewise.
32360 * hash-map.h: Likewise.
32361 * hash-set.h: Likewise.
32362 * hash-table.h: Likewise.
32363 * hwint.h: Likewise.
32364 * input.h: Likewise.
32365 * insn-addr.h: Likewise.
32366 * internal-fn.h: Likewise.
32367 * ipa-fnsummary.h: Likewise.
32368 * ipa-icf-gimple.h: Likewise.
32369 * ipa-inline.h: Likewise.
32370 * ipa-modref.h: Likewise.
32371 * ipa-prop.h: Likewise.
32372 * ira-int.h: Likewise.
32374 * lra-int.h: Likewise.
32376 * lto-streamer.h: Likewise.
32377 * memmodel.h: Likewise.
32378 * omp-general.h: Likewise.
32379 * optabs-query.h: Likewise.
32380 * optabs.h: Likewise.
32381 * plugin.h: Likewise.
32382 * pretty-print.h: Likewise.
32383 * range.h: Likewise.
32384 * read-md.h: Likewise.
32385 * recog.h: Likewise.
32386 * regs.h: Likewise.
32387 * rtl-iter.h: Likewise.
32389 * sbitmap.h: Likewise.
32390 * sched-int.h: Likewise.
32391 * sel-sched-ir.h: Likewise.
32392 * sese.h: Likewise.
32393 * sparseset.h: Likewise.
32394 * ssa-iterators.h: Likewise.
32395 * system.h: Likewise.
32396 * target-globals.h: Likewise.
32397 * target.h: Likewise.
32398 * timevar.h: Likewise.
32399 * tree-chrec.h: Likewise.
32400 * tree-data-ref.h: Likewise.
32401 * tree-iterator.h: Likewise.
32402 * tree-outof-ssa.h: Likewise.
32403 * tree-phinodes.h: Likewise.
32404 * tree-scalar-evolution.h: Likewise.
32405 * tree-sra.h: Likewise.
32406 * tree-ssa-alias.h: Likewise.
32407 * tree-ssa-live.h: Likewise.
32408 * tree-ssa-loop-manip.h: Likewise.
32409 * tree-ssa-loop.h: Likewise.
32410 * tree-ssa-operands.h: Likewise.
32411 * tree-ssa-propagate.h: Likewise.
32412 * tree-ssa-sccvn.h: Likewise.
32413 * tree-ssa.h: Likewise.
32414 * tree-ssanames.h: Likewise.
32415 * tree-streamer.h: Likewise.
32416 * tree-switch-conversion.h: Likewise.
32417 * tree-vectorizer.h: Likewise.
32418 * tree.h: Likewise.
32419 * wide-int.h: Likewise.
32421 2023-02-16 Jakub Jelinek <jakub@redhat.com>
32423 PR tree-optimization/108657
32424 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): If lhs of stmt
32425 exists and is not a SSA_NAME, call ao_ref_init even if the stmt
32426 is a call to internal or builtin function.
32428 2023-02-16 Jonathan Wakely <jwakely@redhat.com>
32430 * doc/invoke.texi (C++ Dialect Options): Suggest adding a
32431 using-declaration to unhide functions.
32433 2023-02-16 Jakub Jelinek <jakub@redhat.com>
32435 PR tree-optimization/108783
32436 * tree-ssa-reassoc.cc (eliminate_redundant_comparison): If lcode
32437 is equal to TREE_CODE (t), op1 to newop1 and op2 to newop2, set
32438 t to curr->op. Otherwise, punt if either newop1 or newop2 are
32439 SSA_NAME_OCCURS_IN_ABNORMAL_PHI SSA_NAMEs.
32441 2023-02-16 Richard Biener <rguenther@suse.de>
32443 PR tree-optimization/108791
32444 * tree-ssa-forwprop.cc (optimize_vector_load): Build
32445 the ADDR_EXPR of a TARGET_MEM_REF using a more meaningful
32448 2023-02-15 Eric Botcazou <ebotcazou@adacore.com>
32451 * config/i386/i386.cc (ix86_compute_frame_layout): Disable the
32452 effects of -fstack-clash-protection for TARGET_STACK_PROBE.
32453 (ix86_expand_prologue): Likewise.
32455 2023-02-15 Jan-Benedict Glaw <jbglaw@lug-owl.de>
32457 * config/bpf/bpf.cc (bpf_option_override): Fix doubled space.
32459 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
32461 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use
32462 int248_register_operand predicate in zero_extract sub-RTX.
32463 (*cmpqi_ext<mode>_2): Ditto.
32464 (*cmpqi_ext<mode>_3): Ditto.
32465 (*cmpqi_ext<mode>_4): Ditto.
32466 (*extzvqi_mem_rex64): Ditto.
32468 (*insvqi_1_mem_rex64): Ditto.
32469 (@insv<mode>_1): Ditto.
32470 (*insvqi_1): Ditto.
32471 (*insvqi_2): Ditto.
32472 (*insvqi_3): Ditto.
32473 (*extendqi<SWI24:mode>_ext_1): Ditto.
32474 (*addqi_ext<mode>_1): Ditto.
32475 (*addqi_ext<mode>_2): Ditto.
32476 (*subqi_ext<mode>_2): Ditto.
32477 (*testqi_ext<mode>_1): Ditto.
32478 (*testqi_ext<mode>_2): Ditto.
32479 (*andqi_ext<mode>_1): Ditto.
32480 (*andqi_ext<mode>_1_cc): Ditto.
32481 (*andqi_ext<mode>_2): Ditto.
32482 (*<any_or:code>qi_ext<mode>_1): Ditto.
32483 (*<any_or:code>qi_ext<mode>_2): Ditto.
32484 (*xorqi_ext<mode>_1_cc): Ditto.
32485 (*negqi_ext<mode>_2): Ditto.
32486 (*ashlqi_ext<mode>_2): Ditto.
32487 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
32489 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
32491 * config/i386/predicates.md (int248_register_operand):
32492 Rename from extr_register_operand.
32493 * config/i386/i386.md (*extv<mode>): Update for renamed predicate.
32494 (*extzx<mode>): Ditto.
32495 (*ashl<dwi>3_doubleword_mask): Use int248_register_operand predicate.
32496 (*ashl<mode>3_mask): Ditto.
32497 (*<any_shiftrt:insn><mode>3_mask): Ditto.
32498 (*<any_shiftrt:insn><dwi>3_doubleword_mask): Ditto.
32499 (*<any_rotate:insn><mode>3_mask): Ditto.
32500 (*<btsc><mode>_mask): Ditto.
32501 (*btr<mode>_mask): Ditto.
32502 (*jcc_bt<mode>_mask_1): Ditto.
32504 2023-02-15 Richard Biener <rguenther@suse.de>
32506 PR middle-end/26854
32507 * df-core.cc (df_worklist_propagate_forward): Put later
32508 blocks on worklist and only earlier blocks on pending.
32509 (df_worklist_propagate_backward): Likewise.
32510 (df_worklist_dataflow_doublequeue): Change the iteration
32511 to process new blocks in the same iteration if that
32512 maintains the iteration order.
32514 2023-02-15 Marek Polacek <polacek@redhat.com>
32516 PR middle-end/106080
32517 * gimple-ssa-warn-access.cc (is_auto_decl): Remove. Use auto_var_p
32520 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32522 * config/riscv/predicates.md: Refine codes.
32523 * config/riscv/riscv-protos.h (RVV_VUNDEF): New macro.
32524 * config/riscv/riscv-v.cc: Refine codes.
32525 * config/riscv/riscv-vector-builtins-bases.cc (enum ternop_type): New
32527 (class imac): New class.
32528 (enum widen_ternop_type): New enum.
32529 (class iwmac): New class.
32531 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32532 * config/riscv/riscv-vector-builtins-functions.def (vmacc): Ditto.
32540 * config/riscv/riscv-vector-builtins.cc
32541 (function_builder::apply_predication): Adjust for multiply-add support.
32542 (function_expander::add_vundef_operand): Refine codes.
32543 (function_expander::use_ternop_insn): New function.
32544 (function_expander::use_widen_ternop_insn): Ditto.
32545 * config/riscv/riscv-vector-builtins.h: New function.
32546 * config/riscv/vector.md (@pred_mul_<optab><mode>): New pattern.
32547 (pred_mul_<optab><mode>_undef_merge): Ditto.
32548 (*pred_<madd_nmsub><mode>): Ditto.
32549 (*pred_<macc_nmsac><mode>): Ditto.
32550 (*pred_mul_<optab><mode>): Ditto.
32551 (@pred_mul_<optab><mode>_scalar): Ditto.
32552 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
32553 (*pred_<madd_nmsub><mode>_scalar): Ditto.
32554 (*pred_<macc_nmsac><mode>_scalar): Ditto.
32555 (*pred_mul_<optab><mode>_scalar): Ditto.
32556 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
32557 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
32558 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
32559 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
32560 (@pred_widen_mul_plus<su><mode>): Ditto.
32561 (@pred_widen_mul_plus<su><mode>_scalar): Ditto.
32562 (@pred_widen_mul_plussu<mode>): Ditto.
32563 (@pred_widen_mul_plussu<mode>_scalar): Ditto.
32564 (@pred_widen_mul_plusus<mode>_scalar): Ditto.
32566 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32568 * config/riscv/predicates.md (vector_mask_operand): Refine the codes.
32569 (vector_all_trues_mask_operand): New predicate.
32570 (vector_undef_operand): New predicate.
32571 (ltge_operator): New predicate.
32572 (comparison_except_ltge_operator): New predicate.
32573 (comparison_except_eqge_operator): New predicate.
32574 (ge_operator): New predicate.
32575 * config/riscv/riscv-v.cc (has_vi_variant_p): Add compare support.
32576 * config/riscv/riscv-vector-builtins-bases.cc (class icmp): New class.
32578 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32579 * config/riscv/riscv-vector-builtins-functions.def (vmseq): Ditto.
32589 * config/riscv/riscv-vector-builtins-shapes.cc
32590 (struct return_mask_def): Adjust for compare support.
32591 * config/riscv/riscv-vector-builtins.cc
32592 (function_expander::use_compare_insn): New function.
32593 * config/riscv/riscv-vector-builtins.h
32594 (function_expander::add_integer_operand): Ditto.
32595 * config/riscv/riscv.cc (riscv_print_operand): Add compare support.
32596 * config/riscv/riscv.md: Add vector min/max attributes.
32597 * config/riscv/vector-iterators.md (xnor): New iterator.
32598 * config/riscv/vector.md (@pred_cmp<mode>): New pattern.
32599 (*pred_cmp<mode>): Ditto.
32600 (*pred_cmp<mode>_narrow): Ditto.
32601 (@pred_ltge<mode>): Ditto.
32602 (*pred_ltge<mode>): Ditto.
32603 (*pred_ltge<mode>_narrow): Ditto.
32604 (@pred_cmp<mode>_scalar): Ditto.
32605 (*pred_cmp<mode>_scalar): Ditto.
32606 (*pred_cmp<mode>_scalar_narrow): Ditto.
32607 (@pred_eqne<mode>_scalar): Ditto.
32608 (*pred_eqne<mode>_scalar): Ditto.
32609 (*pred_eqne<mode>_scalar_narrow): Ditto.
32610 (*pred_cmp<mode>_extended_scalar): Ditto.
32611 (*pred_cmp<mode>_extended_scalar_narrow): Ditto.
32612 (*pred_eqne<mode>_extended_scalar): Ditto.
32613 (*pred_eqne<mode>_extended_scalar_narrow): Ditto.
32614 (@pred_ge<mode>_scalar): Ditto.
32615 (@pred_<optab><mode>): Ditto.
32616 (@pred_n<optab><mode>): Ditto.
32617 (@pred_<optab>n<mode>): Ditto.
32618 (@pred_not<mode>): Ditto.
32620 2023-02-15 Martin Jambor <mjambor@suse.cz>
32623 * ipa-sra.cc (push_param_adjustments_for_index): Do not omit
32624 creation of non-scalar replacements even if IPA-CP knows their
32627 2023-02-15 Jakub Jelinek <jakub@redhat.com>
32631 * config/rs6000/rs6000.md (<u>maddditi4): Change into umaddditi4 only
32632 expander, change operand 3 to be TImode, emit maddlddi4 and
32633 umadddi4_highpart{,_le} with its low half and finally add the high
32634 half to the result.
32636 2023-02-15 Martin Liska <mliska@suse.cz>
32638 * doc/invoke.texi: Document --param=asan-kernel-mem-intrinsic-prefix.
32640 2023-02-15 Richard Biener <rguenther@suse.de>
32642 * sanopt.cc (sanitize_asan_mark_unpoison): Use bitmap
32643 for with_poison and alias worklist to it.
32644 (sanitize_asan_mark_poison): Likewise.
32646 2023-02-15 Richard Biener <rguenther@suse.de>
32649 * config/i386/i386-features.cc (scalar_chain::add_to_queue):
32650 Combine bitmap test and set.
32651 (scalar_chain::add_insn): Likewise.
32652 (scalar_chain::analyze_register_chain): Remove redundant
32653 attempt to add to queue and instead strengthen assert.
32654 Sink common attempts to mark the def dual-mode.
32655 (scalar_chain::add_to_queue): Remove redundant insn bitmap
32658 2023-02-15 Richard Biener <rguenther@suse.de>
32661 * config/i386/i386-features.cc (convert_scalars_to_vector):
32662 Switch candidates bitmaps to tree view before building the chains.
32664 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
32666 * reload1.cc (gen_reload): Correct rtx parameter for fatal_insn
32667 "failure trying to reload" call.
32669 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
32671 * gdbinit.in (phrs): New command.
32672 * sel-sched-dump.cc (debug_hard_reg_set): Remove debug-function.
32673 * ira-color.cc (debug_hard_reg_set): New, calling print_hard_reg_set.
32675 2023-02-14 David Faust <david.faust@oracle.com>
32678 * config/bpf/constraints.md (q): New memory constraint.
32679 * config/bpf/bpf.md (zero_extendhidi2): Use it here.
32680 (zero_extendqidi2): Likewise.
32681 (zero_extendsidi2): Likewise.
32682 (*mov<MM:mode>): Likewise.
32684 2023-02-14 Andrew Pinski <apinski@marvell.com>
32686 PR tree-optimization/108355
32687 PR tree-optimization/96921
32688 * match.pd: Add pattern for "1 - bool_val".
32690 2023-02-14 Richard Biener <rguenther@suse.de>
32692 * tree-ssa-sccvn.cc (vn_phi_compute_hash): Key skipping
32693 basic block index hashing on the availability of ->cclhs.
32694 (vn_phi_eq): Avoid re-doing sanity checks for CSE but
32695 rely on ->cclhs availability.
32696 (vn_phi_lookup): Set ->cclhs only when we are eventually
32697 going to CSE the PHI.
32698 (vn_phi_insert): Likewise.
32700 2023-02-14 Eric Botcazou <ebotcazou@adacore.com>
32702 * gimplify.cc (gimplify_save_expr): Add missing guard.
32704 2023-02-14 Richard Biener <rguenther@suse.de>
32706 PR tree-optimization/108782
32707 * tree-vect-loop.cc (vect_phi_first_order_recurrence_p):
32708 Make sure we're not vectorizing an inner loop.
32710 2023-02-14 Jakub Jelinek <jakub@redhat.com>
32712 PR sanitizer/108777
32713 * params.opt (-param=asan-kernel-mem-intrinsic-prefix=): New param.
32714 * asan.h (asan_memfn_rtl): Declare.
32715 * asan.cc (asan_memfn_rtls): New variable.
32716 (asan_memfn_rtl): New function.
32717 * builtins.cc (expand_builtin): If
32718 param_asan_kernel_mem_intrinsic_prefix and function is
32719 kernel-{,hw}address sanitized, emit calls to
32720 __{,hw}asan_{memcpy,memmove,memset} rather than
32721 {memcpy,memmove,memset}. Use sanitize_flags_p (SANITIZE_ADDRESS)
32722 instead of flag_sanitize & SANITIZE_ADDRESS to check if
32723 asan_intercepted_p functions shouldn't be expanded inline.
32725 2023-02-14 Richard Sandiford <richard.sandiford@arm.com>
32727 PR tree-optimization/96373
32728 * tree-vect-stmts.cc (vectorizable_operation): Predicate trapping
32729 operations on the loop mask. Reject partial vectors if this isn't
32732 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
32734 PR rtl-optimization/108681
32735 * lra-spills.cc (lra_final_code_change): Extend subreg replacement
32736 code to handle bare uses and clobbers.
32738 2023-02-13 Vladimir N. Makarov <vmakarov@redhat.com>
32740 * ira.cc (ira_update_equiv_info_by_shuffle_insn): Clear equiv
32741 caller_save_p flag when clearing defined_p flag.
32742 (setup_reg_equiv): Ditto.
32743 * lra-constraints.cc (lra_constraints): Ditto.
32745 2023-02-13 Uroš Bizjak <ubizjak@gmail.com>
32748 * config/i386/predicates.md (extr_register_operand):
32749 New special predicate.
32750 * config/i386/i386.md (*extv<mode>): Use extr_register_operand
32751 as operand 1 predicate.
32752 (*exzv<mode>): Ditto.
32753 (*extendqi<SWI24:mode>_ext_1): New insn pattern.
32755 2023-02-13 Richard Biener <rguenther@suse.de>
32757 PR tree-optimization/28614
32758 * tree-ssa-sccvn.cc (can_track_predicate_on_edge): Avoid
32759 walking all edges in most cases.
32760 (vn_nary_op_insert_pieces_predicated): Avoid repeated
32761 calls to can_track_predicate_on_edge unless checking is
32763 (process_bb): Instead call it once here for each edge
32764 we register possibly multiple predicates on.
32766 2023-02-13 Richard Biener <rguenther@suse.de>
32768 PR tree-optimization/108691
32769 * tree-cfg.cc (notice_special_calls): When the CFG is built
32770 honor gimple_call_ctrl_altering_p.
32771 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
32772 temporarily if the call is not control-altering.
32773 * calls.cc (emit_call_1): Do not add REG_SETJMP if
32774 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
32776 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
32779 * config/s390/s390.cc (s390_bb_fallthru_entry_likely): Remove.
32780 (struct s390_sched_state): Initialise to zero.
32781 (s390_sched_variable_issue): For better debuggability also emit
32783 (s390_sched_init): Unconditionally reset scheduler state.
32785 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
32787 * ifcvt.h (noce_if_info::cond_inverted): New field.
32788 * ifcvt.cc (cond_move_convert_if_block): Swap the then and else
32789 values when cond_inverted is true.
32790 (noce_find_if_block): Allow the condition to be inverted when
32791 handling conditional moves.
32793 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
32795 * config/s390/predicates.md (execute_operation): Use
32796 constrain_operands instead of extract_constrain_insn in order to
32797 determine wheter there exists a valid alternative.
32799 2023-02-13 Claudiu Zissulescu <claziss@gmail.com>
32801 * common/config/arc/arc-common.cc (arc_option_optimization_table):
32802 Remove millicode from list.
32804 2023-02-13 Martin Liska <mliska@suse.cz>
32806 * doc/invoke.texi: Document ira-simple-lra-insn-threshold.
32808 2023-02-13 Richard Biener <rguenther@suse.de>
32810 PR tree-optimization/106722
32811 * tree-ssa-dce.cc (mark_last_stmt_necessary): Return
32812 whether we marked a stmt.
32813 (mark_control_dependent_edges_necessary): When
32814 mark_last_stmt_necessary didn't mark any stmt make sure
32815 to mark its control dependent edges.
32816 (propagate_necessity): Likewise.
32818 2023-02-13 Kito Cheng <kito.cheng@sifive.com>
32820 * config/riscv/riscv.h (RISCV_DWARF_VLENB): New.
32821 (DWARF_FRAME_REGISTERS): New.
32822 (DWARF_REG_TO_UNWIND_COLUMN): New.
32824 2023-02-12 Gerald Pfeifer <gerald@pfeifer.com>
32826 * doc/sourcebuild.texi: Remove (broken) direct reference to
32827 "The GNU configure and build system".
32829 2023-02-12 Jin Ma <jinma@linux.alibaba.com>
32831 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Change
32832 gen_add3_insn to gen_rtx_SET.
32833 (riscv_adjust_libcall_cfi_epilogue): Likewise.
32835 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32837 * config/riscv/riscv-vector-builtins-bases.cc (class sat_op): New class.
32838 (class vnclip): Ditto.
32840 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32841 * config/riscv/riscv-vector-builtins-functions.def (vaadd): Ditto.
32850 * config/riscv/vector-iterators.md (su): Add instruction.
32853 * config/riscv/vector.md (@pred_<sat_op><mode>): New pattern.
32854 (@pred_<sat_op><mode>_scalar): Ditto.
32855 (*pred_<sat_op><mode>_scalar): Ditto.
32856 (*pred_<sat_op><mode>_extended_scalar): Ditto.
32857 (@pred_narrow_clip<v_su><mode>): Ditto.
32858 (@pred_narrow_clip<v_su><mode>_scalar): Ditto.
32860 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32862 * config/riscv/constraints.md (Wbr): Remove unused constraint.
32863 * config/riscv/predicates.md: Fix move operand predicate.
32864 * config/riscv/riscv-vector-builtins-bases.cc (class vnshift): New class.
32865 (class vncvt_x): Ditto.
32866 (class vmerge): Ditto.
32867 (class vmv_v): Ditto.
32869 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32870 * config/riscv/riscv-vector-builtins-functions.def (vsra): Ditto.
32877 * config/riscv/riscv-vector-builtins-shapes.cc (struct narrow_alu_def): Ditto.
32878 (struct move_def): Ditto.
32880 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
32881 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): New variable.
32882 (DEF_RVV_WEXTU_OPS): Ditto
32883 * config/riscv/riscv-vector-builtins.def (x_x_w): Fix type for suffix.
32888 * config/riscv/riscv.cc (riscv_print_operand): Refine ASM printting rule.
32889 * config/riscv/vector-iterators.md (nmsac):New iterator.
32890 (nmsub): New iterator.
32891 * config/riscv/vector.md (@pred_merge<mode>): New pattern.
32892 (@pred_merge<mode>_scalar): New pattern.
32893 (*pred_merge<mode>_scalar): New pattern.
32894 (*pred_merge<mode>_extended_scalar): New pattern.
32895 (@pred_narrow_<optab><mode>): New pattern.
32896 (@pred_narrow_<optab><mode>_scalar): New pattern.
32897 (@pred_trunc<mode>): New pattern.
32899 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32901 * config/riscv/riscv-vector-builtins-bases.cc (class vmadc): New class.
32902 (class vmsbc): Ditto.
32903 (BASE): Define new class.
32904 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32905 * config/riscv/riscv-vector-builtins-functions.def (vmadc): New define.
32907 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def):
32910 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
32911 * config/riscv/riscv-vector-builtins.cc
32912 (function_expander::use_exact_insn): Adjust for new support
32913 * config/riscv/riscv-vector-builtins.h
32914 (function_base::has_merge_operand_p): New function.
32915 * config/riscv/vector-iterators.md: New iterator.
32916 * config/riscv/vector.md (@pred_madc<mode>): New pattern.
32917 (@pred_msbc<mode>): Ditto.
32918 (@pred_madc<mode>_scalar): Ditto.
32919 (@pred_msbc<mode>_scalar): Ditto.
32920 (*pred_madc<mode>_scalar): Ditto.
32921 (*pred_madc<mode>_extended_scalar): Ditto.
32922 (*pred_msbc<mode>_scalar): Ditto.
32923 (*pred_msbc<mode>_extended_scalar): Ditto.
32924 (@pred_madc<mode>_overflow): Ditto.
32925 (@pred_msbc<mode>_overflow): Ditto.
32926 (@pred_madc<mode>_overflow_scalar): Ditto.
32927 (@pred_msbc<mode>_overflow_scalar): Ditto.
32928 (*pred_madc<mode>_overflow_scalar): Ditto.
32929 (*pred_madc<mode>_overflow_extended_scalar): Ditto.
32930 (*pred_msbc<mode>_overflow_scalar): Ditto.
32931 (*pred_msbc<mode>_overflow_extended_scalar): Ditto.
32933 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32935 * config/riscv/riscv-protos.h (simm5_p): Add vadc/vsbc support.
32936 * config/riscv/riscv-v.cc (simm32_p): Ditto.
32937 * config/riscv/riscv-vector-builtins-bases.cc (class vadc): New class.
32938 (class vsbc): Ditto.
32940 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32941 * config/riscv/riscv-vector-builtins-functions.def (vadc): Ditto.
32943 * config/riscv/riscv-vector-builtins-shapes.cc
32944 (struct no_mask_policy_def): Ditto.
32946 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
32947 * config/riscv/riscv-vector-builtins.cc
32948 (rvv_arg_type_info::get_base_vector_type): Add vadc/vsbc support.
32949 (rvv_arg_type_info::get_tree_type): Ditto.
32950 (function_expander::use_exact_insn): Ditto.
32951 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
32952 (function_base::use_mask_predication_p): New function.
32953 * config/riscv/vector-iterators.md: New iterator.
32954 * config/riscv/vector.md (@pred_adc<mode>): New pattern.
32955 (@pred_sbc<mode>): Ditto.
32956 (@pred_adc<mode>_scalar): Ditto.
32957 (@pred_sbc<mode>_scalar): Ditto.
32958 (*pred_adc<mode>_scalar): Ditto.
32959 (*pred_adc<mode>_extended_scalar): Ditto.
32960 (*pred_sbc<mode>_scalar): Ditto.
32961 (*pred_sbc<mode>_extended_scalar): Ditto.
32963 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32965 * config/riscv/vector.md: use "zero" reg.
32967 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32969 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New
32971 (class vwmulsu): Ditto.
32972 (class vwcvt): Ditto.
32973 (BASE): Add integer widening support.
32974 * config/riscv/riscv-vector-builtins-bases.h: Ditto
32975 * config/riscv/riscv-vector-builtins-functions.def (vwadd): New class.
32976 (vwsub): New class.
32977 (vwmul): New class.
32978 (vwmulu): New class.
32979 (vwmulsu): New class.
32980 (vwaddu): New class.
32981 (vwsubu): New class.
32982 (vwcvt_x): New class.
32983 (vwcvtu_x): New class.
32984 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): New
32986 (struct widen_alu_def): New class.
32987 (SHAPE): New class.
32988 * config/riscv/riscv-vector-builtins-shapes.h: New class.
32989 * config/riscv/riscv-vector-builtins.cc
32990 (rvv_arg_type_info::get_base_vector_type): Add integer widening support.
32991 (rvv_arg_type_info::get_tree_type): Ditto.
32992 * config/riscv/riscv-vector-builtins.def (x_x_v): Change into "x_v"
32994 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add integer
32996 * config/riscv/riscv-vsetvl.cc (change_insn): Fix reg_equal use bug.
32997 * config/riscv/riscv.h (X0_REGNUM): New constant.
32998 * config/riscv/vector-iterators.md: New iterators.
32999 * config/riscv/vector.md
33000 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>): New
33002 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>_scalar):
33004 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Ditto.
33005 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>_scalar):
33007 (@pred_widen_mulsu<mode>): Ditto.
33008 (@pred_widen_mulsu<mode>_scalar): Ditto.
33009 (@pred_<optab><mode>): Ditto.
33011 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33012 kito-cheng <kito.cheng@sifive.com>
33014 * common/config/riscv/riscv-common.cc: Add flag for 'V' extension.
33015 * config/riscv/riscv-vector-builtins-bases.cc (class vmulh): New class.
33017 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33018 * config/riscv/riscv-vector-builtins-functions.def (vmulh): Add vmulh
33022 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_FULL_V_I_OPS):
33024 (DEF_RVV_FULL_V_U_OPS): Ditto.
33025 (vint8mf8_t): Ditto.
33026 (vint8mf4_t): Ditto.
33027 (vint8mf2_t): Ditto.
33028 (vint8m1_t): Ditto.
33029 (vint8m2_t): Ditto.
33030 (vint8m4_t): Ditto.
33031 (vint8m8_t): Ditto.
33032 (vint16mf4_t): Ditto.
33033 (vint16mf2_t): Ditto.
33034 (vint16m1_t): Ditto.
33035 (vint16m2_t): Ditto.
33036 (vint16m4_t): Ditto.
33037 (vint16m8_t): Ditto.
33038 (vint32mf2_t): Ditto.
33039 (vint32m1_t): Ditto.
33040 (vint32m2_t): Ditto.
33041 (vint32m4_t): Ditto.
33042 (vint32m8_t): Ditto.
33043 (vint64m1_t): Ditto.
33044 (vint64m2_t): Ditto.
33045 (vint64m4_t): Ditto.
33046 (vint64m8_t): Ditto.
33047 (vuint8mf8_t): Ditto.
33048 (vuint8mf4_t): Ditto.
33049 (vuint8mf2_t): Ditto.
33050 (vuint8m1_t): Ditto.
33051 (vuint8m2_t): Ditto.
33052 (vuint8m4_t): Ditto.
33053 (vuint8m8_t): Ditto.
33054 (vuint16mf4_t): Ditto.
33055 (vuint16mf2_t): Ditto.
33056 (vuint16m1_t): Ditto.
33057 (vuint16m2_t): Ditto.
33058 (vuint16m4_t): Ditto.
33059 (vuint16m8_t): Ditto.
33060 (vuint32mf2_t): Ditto.
33061 (vuint32m1_t): Ditto.
33062 (vuint32m2_t): Ditto.
33063 (vuint32m4_t): Ditto.
33064 (vuint32m8_t): Ditto.
33065 (vuint64m1_t): Ditto.
33066 (vuint64m2_t): Ditto.
33067 (vuint64m4_t): Ditto.
33068 (vuint64m8_t): Ditto.
33069 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FULL_V_I_OPS): Ditto.
33070 (DEF_RVV_FULL_V_U_OPS): Ditto.
33071 (check_required_extensions): Add vmulh support.
33072 (rvv_arg_type_info::get_tree_type): Ditto.
33073 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_FULL_V): Ditto.
33074 (enum rvv_base_type): Ditto.
33075 * config/riscv/riscv.opt: Add 'V' extension flag.
33076 * config/riscv/vector-iterators.md (su): New iterator.
33077 * config/riscv/vector.md (@pred_mulh<v_su><mode>): New pattern.
33078 (@pred_mulh<v_su><mode>_scalar): Ditto.
33079 (*pred_mulh<v_su><mode>_scalar): Ditto.
33080 (*pred_mulh<v_su><mode>_extended_scalar): Ditto.
33082 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33084 * config/riscv/iterators.md: Add sign_extend/zero_extend.
33085 * config/riscv/riscv-vector-builtins-bases.cc (class ext): New class.
33087 * config/riscv/riscv-vector-builtins-bases.h: Add vsext/vzext support.
33088 * config/riscv/riscv-vector-builtins-functions.def (vsext): New macro
33091 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Adjust
33092 for vsext/vzext support.
33093 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTI_OPS): New
33095 (DEF_RVV_QEXTI_OPS): Ditto.
33096 (DEF_RVV_OEXTI_OPS): Ditto.
33097 (DEF_RVV_WEXTU_OPS): Ditto.
33098 (DEF_RVV_QEXTU_OPS): Ditto.
33099 (DEF_RVV_OEXTU_OPS): Ditto.
33100 (vint16mf4_t): Ditto.
33101 (vint16mf2_t): Ditto.
33102 (vint16m1_t): Ditto.
33103 (vint16m2_t): Ditto.
33104 (vint16m4_t): Ditto.
33105 (vint16m8_t): Ditto.
33106 (vint32mf2_t): Ditto.
33107 (vint32m1_t): Ditto.
33108 (vint32m2_t): Ditto.
33109 (vint32m4_t): Ditto.
33110 (vint32m8_t): Ditto.
33111 (vint64m1_t): Ditto.
33112 (vint64m2_t): Ditto.
33113 (vint64m4_t): Ditto.
33114 (vint64m8_t): Ditto.
33115 (vuint16mf4_t): Ditto.
33116 (vuint16mf2_t): Ditto.
33117 (vuint16m1_t): Ditto.
33118 (vuint16m2_t): Ditto.
33119 (vuint16m4_t): Ditto.
33120 (vuint16m8_t): Ditto.
33121 (vuint32mf2_t): Ditto.
33122 (vuint32m1_t): Ditto.
33123 (vuint32m2_t): Ditto.
33124 (vuint32m4_t): Ditto.
33125 (vuint32m8_t): Ditto.
33126 (vuint64m1_t): Ditto.
33127 (vuint64m2_t): Ditto.
33128 (vuint64m4_t): Ditto.
33129 (vuint64m8_t): Ditto.
33130 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): Ditto.
33131 (DEF_RVV_QEXTI_OPS): Ditto.
33132 (DEF_RVV_OEXTI_OPS): Ditto.
33133 (DEF_RVV_WEXTU_OPS): Ditto.
33134 (DEF_RVV_QEXTU_OPS): Ditto.
33135 (DEF_RVV_OEXTU_OPS): Ditto.
33136 (rvv_arg_type_info::get_base_vector_type): Add sign_exted/zero_extend
33138 (rvv_arg_type_info::get_tree_type): Ditto.
33139 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
33140 * config/riscv/vector-iterators.md (z): New attribute.
33141 * config/riscv/vector.md (@pred_<optab><mode>_vf2): New pattern.
33142 (@pred_<optab><mode>_vf4): Ditto.
33143 (@pred_<optab><mode>_vf8): Ditto.
33145 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33147 * config/riscv/iterators.md: Add saturating Addition && Subtraction.
33148 * config/riscv/riscv-v.cc (has_vi_variant_p): Ditto.
33149 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Ditto.
33150 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33151 * config/riscv/riscv-vector-builtins-functions.def (vsadd): New def.
33155 * config/riscv/vector-iterators.md (sll.vi): Adjust for Saturating
33160 * config/riscv/vector.md (@pred_<optab><mode>): New pattern.
33161 (@pred_<optab><mode>_scalar): New pattern.
33162 (*pred_<optab><mode>_scalar): New pattern.
33163 (*pred_<optab><mode>_extended_scalar): New pattern.
33165 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33167 * config/riscv/iterators.md: Add neg and not.
33168 * config/riscv/riscv-vector-builtins-bases.cc (class unop): New class.
33170 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33171 * config/riscv/riscv-vector-builtins-functions.def (vadd): Rename binop
33192 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): Ditto.
33193 (struct alu_def): Ditto.
33195 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
33196 * config/riscv/riscv-vector-builtins.cc: Support unary C/C/++.
33197 * config/riscv/vector-iterators.md: New iterator.
33198 * config/riscv/vector.md (@pred_<optab><mode>): New pattern
33200 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33202 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_probabilities): Skip exit block.
33204 2023-02-11 Jakub Jelinek <jakub@redhat.com>
33207 * ipa-cp.cc (ipa_agg_value_from_jfunc): Return NULL_TREE also if
33208 item->offset bit position is too large to be representable as
33209 unsigned int byte position.
33211 2023-02-11 Gerald Pfeifer <gerald@pfeifer.com>
33213 * doc/extend.texi (Other Builtins): Adjust link to WG14 N965.
33215 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
33217 * ira.cc (update_equiv_regs): Set up ira_reg_equiv for
33218 valid_combine only when ira_use_lra_p is true.
33220 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
33222 * params.opt (ira-simple-lra-insn-threshold): Add new param.
33223 * ira.cc (ira): Use the param to switch on simple LRA.
33225 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
33227 PR tree-optimization/108687
33228 * gimple-range-cache.cc (ranger_cache::range_on_edge): Revert
33229 back to RFD_NONE mode for calculations.
33230 (ranger_cache::propagate_cache): Call the internal edge range API
33231 with RFD_READ_ONLY instead of changing the external routine.
33233 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
33235 PR tree-optimization/108520
33236 * gimple-range-infer.cc (check_assume_func): Invoke
33237 gimple_range_global directly instead using global_range_query.
33238 * value-query.cc (get_range_global): Add function context and
33239 avoid calling nonnull_arg_p if not cfun.
33240 (gimple_range_global): Add function context pointer.
33241 * value-query.h (imple_range_global): Add function context.
33243 2023-02-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33245 * config/riscv/constraints.md (Wdm): Adjust constraint.
33246 (Wbr): New constraint.
33247 * config/riscv/predicates.md (reg_or_int_operand): New predicate.
33248 * config/riscv/riscv-protos.h (emit_pred_op): Remove function.
33249 (emit_vlmax_op): New function.
33250 (emit_nonvlmax_op): Ditto.
33252 (neg_simm5_p): Ditto.
33253 (has_vi_variant_p): Ditto.
33254 * config/riscv/riscv-v.cc (emit_pred_op): Adjust function.
33255 (emit_vlmax_op): New function.
33256 (emit_nonvlmax_op): Ditto.
33257 (expand_const_vector): Adjust function.
33258 (legitimize_move): Ditto.
33259 (simm32_p): New function.
33261 (neg_simm5_p): Ditto.
33262 (has_vi_variant_p): Ditto.
33263 * config/riscv/riscv-vector-builtins-bases.cc (class vrsub): New class.
33265 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33266 * config/riscv/riscv-vector-builtins-functions.def (vmin): Remove
33269 (vminu): Remove signed cases.
33271 (vdiv): Remove unsigned cases.
33273 (vdivu): Remove signed cases.
33277 (vrsub): New class.
33282 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_U_OPS): New macro.
33283 * config/riscv/riscv.h: change VL/VTYPE as fixed reg.
33284 * config/riscv/vector-iterators.md: New iterators.
33285 * config/riscv/vector.md (@pred_broadcast<mode>): Adjust pattern for vx
33287 (@pred_<optab><mode>_scalar): New pattern.
33288 (@pred_sub<mode>_reverse_scalar): Ditto.
33289 (*pred_<optab><mode>_scalar): Ditto.
33290 (*pred_<optab><mode>_extended_scalar): Ditto.
33291 (*pred_sub<mode>_reverse_scalar): Ditto.
33292 (*pred_sub<mode>_extended_reverse_scalar): Ditto.
33294 2023-02-10 Richard Biener <rguenther@suse.de>
33296 PR tree-optimization/108724
33297 * tree-vect-stmts.cc (vectorizable_operation): Avoid
33298 using word_mode vectors when vector lowering will
33299 decompose them to elementwise operations.
33301 2023-02-10 Jakub Jelinek <jakub@redhat.com>
33304 2023-02-09 Martin Liska <mliska@suse.cz>
33307 * doc/extend.texi: Document that the function
33308 does not work correctly for old VIA processors.
33310 2023-02-10 Andrew Pinski <apinski@marvell.com>
33311 Andrew Macleod <amacleod@redhat.com>
33313 PR tree-optimization/108684
33314 * tree-ssa-dce.cc (simple_dce_from_worklist):
33315 Check all ssa names and not just non-vdef ones
33316 before accepting the inline-asm.
33317 Call unlink_stmt_vdef on the statement before
33320 2023-02-09 Vladimir N. Makarov <vmakarov@redhat.com>
33322 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
33323 * ira.cc (validate_equiv_mem): Check memref address variance.
33324 (no_equiv): Clear caller_save_p flag.
33325 (update_equiv_regs): Define caller save equivalence for
33327 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
33328 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
33329 call_save_p. Use caller save equivalence depending on the arg.
33330 (split_reg): Adjust the call.
33332 2023-02-09 Jakub Jelinek <jakub@redhat.com>
33335 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Formatting fixes.
33336 (cpu_indicator_init): Call get_available_features for all CPUs with
33337 max_level >= 1, rather than just Intel, AMD or Zhaoxin. Formatting
33340 2023-02-09 Jakub Jelinek <jakub@redhat.com>
33342 PR tree-optimization/108688
33343 * match.pd (bit_field_ref [bit_insert]): Simplify BIT_FIELD_REF
33344 of BIT_INSERT_EXPR extracting exactly all inserted bits even
33345 when without mode precision. Formatting fixes.
33347 2023-02-09 Andrew Pinski <apinski@marvell.com>
33349 PR tree-optimization/108688
33350 * match.pd (bit_field_ref [bit_insert]): Avoid generating
33351 BIT_FIELD_REFs of non-mode-precision integral operands.
33353 2023-02-09 Martin Liska <mliska@suse.cz>
33356 * doc/extend.texi: Document that the function
33357 does not work correctly for old VIA processors.
33359 2023-02-09 Andreas Schwab <schwab@suse.de>
33361 * lto-wrapper.cc (merge_and_complain): Handle
33362 -funwind-tables and -fasynchronous-unwind-tables.
33363 (append_compiler_options): Likewise.
33365 2023-02-09 Richard Biener <rguenther@suse.de>
33367 PR tree-optimization/26854
33368 * tree-into-ssa.cc (update_ssa): Turn blocks_to_update to tree
33369 view around insert_updated_phi_nodes_for.
33370 * tree-ssa-alias.cc (maybe_skip_until): Allocate visited bitmap
33372 (walk_aliased_vdefs_1): Likewise.
33374 2023-02-08 Gerald Pfeifer <gerald@pfeifer.com>
33376 * doc/include/gpl_v3.texi: Change fsf.org to www.fsf.org.
33378 2023-02-08 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
33381 * config.gcc (tm_mlib_file): Define new variable.
33383 2023-02-08 Jakub Jelinek <jakub@redhat.com>
33385 PR tree-optimization/108692
33386 * tree-vect-patterns.cc (vect_widened_op_tree): If rhs_code is
33387 widened_code which is different from code, don't call
33388 vect_look_through_possible_promotion but instead just check op is
33389 SSA_NAME with integral type for which vect_is_simple_use is true
33390 and call set_op on this_unprom.
33392 2023-02-08 Andrea Corallo <andrea.corallo@arm.com>
33394 * config/aarch64/aarch64-protos.h (aarch_ra_sign_key): Remove
33396 * config/aarch64/aarch64.cc (aarch_ra_sign_key): Remove
33398 * config/aarch64/aarch64.opt (aarch64_ra_sign_key): Rename
33399 to 'aarch_ra_sign_key'.
33400 * config/arm/aarch-common.cc (aarch_ra_sign_key): Remove
33402 * config/arm/arm-protos.h (aarch_ra_sign_key): Likewise.
33403 * config/arm/arm.cc (enum aarch_key_type): Remove definition.
33404 * config/arm/arm.opt: Define.
33406 2023-02-08 Richard Sandiford <richard.sandiford@arm.com>
33408 PR tree-optimization/108316
33409 * tree-vect-stmts.cc (get_load_store_type): When using
33410 internal functions for gather/scatter, make sure that the type
33411 of the offset argument is consistent with the offset vector type.
33413 2023-02-08 Vladimir N. Makarov <vmakarov@redhat.com>
33416 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
33418 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
33419 * ira.cc (validate_equiv_mem): Check memref address variance.
33420 (update_equiv_regs): Define caller save equivalence for
33422 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
33423 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
33424 call_save_p. Use caller save equivalence depending on the arg.
33425 (split_reg): Adjust the call.
33427 2023-02-08 Jakub Jelinek <jakub@redhat.com>
33429 * tree.def (SAD_EXPR): Remove outdated comment about missing
33432 2023-02-07 Marek Polacek <polacek@redhat.com>
33434 * doc/invoke.texi: Update -fchar8_t documentation.
33436 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
33438 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
33439 * ira.cc (validate_equiv_mem): Check memref address variance.
33440 (update_equiv_regs): Define caller save equivalence for
33442 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
33443 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
33444 call_save_p. Use caller save equivalence depending on the arg.
33445 (split_reg): Adjust the call.
33447 2023-02-07 Richard Biener <rguenther@suse.de>
33449 PR tree-optimization/26854
33450 * gimple-fold.cc (has_use_on_stmt): Look at stmt operands
33451 instead of immediate uses.
33453 2023-02-07 Jakub Jelinek <jakub@redhat.com>
33455 PR tree-optimization/106923
33456 * ipa-split.cc (execute_split_functions): Don't split returns_twice
33459 2023-02-07 Jakub Jelinek <jakub@redhat.com>
33461 PR tree-optimization/106433
33462 * cgraph.cc (set_const_flag_1): Recurse on simd clones too.
33463 (cgraph_node::set_pure_flag): Call set_pure_flag_1 on simd clones too.
33465 2023-02-07 Jan Hubicka <jh@suse.cz>
33467 * config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Turn off
33470 2023-02-06 Andrew Stubbs <ams@codesourcery.com>
33472 * config/gcn/mkoffload.cc (gcn_stack_size): New global variable.
33473 (process_asm): Create a constructor for GCN_STACK_SIZE.
33474 (main): Parse the -mstack-size option.
33476 2023-02-06 Alex Coplan <alex.coplan@arm.com>
33479 * config/aarch64/aarch64-simd.md (aarch64_bfmlal<bt>_lane<q>v4sf):
33480 Use correct constraint for operand 3.
33482 2023-02-06 Martin Jambor <mjambor@suse.cz>
33484 * ipa-sra.cc (adjust_parameter_descriptions): Fix a typo in a dump.
33486 2023-02-06 Xi Ruoyao <xry111@xry111.site>
33488 * config/loongarch/loongarch.md (bytepick_w_ashift_amount):
33489 New define_int_iterator.
33490 (bytepick_d_ashift_amount): Likewise.
33491 (bytepick_imm): New define_int_attr.
33492 (bytepick_w_lshiftrt_amount): Likewise.
33493 (bytepick_d_lshiftrt_amount): Likewise.
33494 (bytepick_w_<bytepick_imm>): New define_insn template.
33495 (bytepick_w_<bytepick_imm>_extend): Likewise.
33496 (bytepick_d_<bytepick_imm>): Likewise.
33497 (bytepick_w): Remove unused define_insn.
33498 (bytepick_d): Likewise.
33499 (UNSPEC_BYTEPICK_W): Remove unused unspec.
33500 (UNSPEC_BYTEPICK_D): Likewise.
33501 * config/loongarch/predicates.md (const_0_to_3_operand):
33502 Remove unused define_predicate.
33503 (const_0_to_7_operand): Likewise.
33505 2023-02-06 Jakub Jelinek <jakub@redhat.com>
33507 PR tree-optimization/108655
33508 * ubsan.cc (sanitize_unreachable_fn): For -funreachable-traps
33509 or -fsanitize=unreachable -fsanitize-trap=unreachable return
33510 BUILT_IN_UNREACHABLE_TRAP decl rather than BUILT_IN_TRAP.
33512 2023-02-05 Gerald Pfeifer <gerald@pfeifer.com>
33514 * doc/install.texi (Specific): Remove PW32.
33516 2023-02-03 Jakub Jelinek <jakub@redhat.com>
33518 PR tree-optimization/108647
33519 * range-op.cc (operator_equal::op1_range,
33520 operator_not_equal::op1_range): Don't test op2 bound
33521 equality if op2.undefined_p (), instead set_varying.
33522 (operator_lt::op1_range, operator_le::op1_range,
33523 operator_gt::op1_range, operator_ge::op1_range): Return false if
33524 op2.undefined_p ().
33525 (operator_lt::op2_range, operator_le::op2_range,
33526 operator_gt::op2_range, operator_ge::op2_range): Return false if
33527 op1.undefined_p ().
33529 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
33531 PR tree-optimization/108639
33532 * value-range.cc (irange::legacy_equal_p): Compare nonzero bits as
33534 (irange::operator==): Same.
33536 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
33538 PR tree-optimization/108647
33539 * range-op-float.cc (foperator_lt::op1_range): Handle undefined ranges.
33540 (foperator_lt::op2_range): Same.
33541 (foperator_le::op1_range): Same.
33542 (foperator_le::op2_range): Same.
33543 (foperator_gt::op1_range): Same.
33544 (foperator_gt::op2_range): Same.
33545 (foperator_ge::op1_range): Same.
33546 (foperator_ge::op2_range): Same.
33547 (foperator_unordered_lt::op1_range): Same.
33548 (foperator_unordered_lt::op2_range): Same.
33549 (foperator_unordered_le::op1_range): Same.
33550 (foperator_unordered_le::op2_range): Same.
33551 (foperator_unordered_gt::op1_range): Same.
33552 (foperator_unordered_gt::op2_range): Same.
33553 (foperator_unordered_ge::op1_range): Same.
33554 (foperator_unordered_ge::op2_range): Same.
33556 2023-02-03 Andrew MacLeod <amacleod@redhat.com>
33558 PR tree-optimization/107570
33559 * tree-vrp.cc (remove_and_update_globals): Reset SCEV.
33561 2023-02-03 Gaius Mulley <gaiusmod2@gmail.com>
33563 * doc/gm2.texi (Internals): Remove from menu.
33564 (Using): Comment out ifnohtml conditional.
33565 (Documentation): Use gcc url.
33566 (License): Node simplified.
33567 (Copying): New node. Include gpl_v3_without_node.
33568 (Contributing): Node simplified.
33569 (Internals): Commented out.
33570 (Libraries): Node simplified.
33573 (Functions): Ditto.
33575 2023-02-03 Christophe Lyon <christophe.lyon@arm.com>
33577 * config/arm/mve.md (mve_vabavq_p_<supf><mode>): Add length
33579 (mve_vqshluq_m_n_s<mode>): Likewise.
33580 (mve_vshlq_m_<supf><mode>): Likewise.
33581 (mve_vsriq_m_n_<supf><mode>): Likewise.
33582 (mve_vsubq_m_<supf><mode>): Likewise.
33584 2023-02-03 Martin Jambor <mjambor@suse.cz>
33587 * ipa-sra.cc (push_param_adjustments_for_index): Remove a size check
33588 when comparing to an IPA-CP value.
33589 (dump_list_of_param_indices): New function.
33590 (adjust_parameter_descriptions): Check for mismatching IPA-CP values.
33591 Dump removed candidates using dump_list_of_param_indices.
33592 * ipa-param-manipulation.cc
33593 (ipa_param_body_adjustments::modify_expression): Add assert checking
33594 sizes of a VIEW_CONVERT_EXPR will match.
33595 (ipa_param_body_adjustments::modify_assignment): Likewise.
33597 2023-02-03 Monk Chiang <monk.chiang@sifive.com>
33599 * config/riscv/riscv.h: Remove VL_REGS, VTYPE_REGS class.
33600 * config/riscv/riscv.cc: Ditto.
33602 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33604 * config/riscv/vector-iterators.md (sll.vi): Fix constraint bug.
33608 * config/riscv/vector.md: Ditto.
33610 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33612 * config/riscv/predicates.md (pmode_reg_or_uimm5_operand): New predicate.
33613 * config/riscv/riscv-vector-builtins-bases.cc: New class.
33614 * config/riscv/riscv-vector-builtins-functions.def (vsll): Ditto.
33617 * config/riscv/riscv-vector-builtins.cc: Ditto.
33618 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
33620 2023-02-02 Iain Sandoe <iain@sandoe.co.uk>
33622 * toplev.cc (toplev::main): Only print the version information header
33623 from toplevel main().
33625 2023-02-02 Paul-Antoine Arras <pa@codesourcery.com>
33627 * config/gcn/gcn-valu.md (cond_<expander><mode>): Add
33628 cond_{ashl|ashr|lshr}
33630 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
33632 PR rtl-optimization/108086
33633 * rtl-ssa/insns.h (insn_info): Make m_num_defs a full unsigned int.
33634 Adjust size-related commentary accordingly.
33636 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
33638 PR rtl-optimization/108508
33639 * rtl-ssa/accesses.cc (function_info::split_clobber_group): When
33640 the splay tree search gives the first clobber in the second group,
33641 make sure that the root of the first clobber group is updated
33642 correctly. Enter the new clobber group into the definition splay
33645 2023-02-02 Jin Ma <jinma@linux.alibaba.com>
33647 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
33648 Fix finding best match score.
33650 2023-02-02 Jakub Jelinek <jakub@redhat.com>
33653 PR rtl-optimization/108463
33655 * cselib.cc (cselib_current_insn): Move declaration earlier.
33656 (cselib_hasher::equal): For debug only locs, temporarily override
33657 cselib_current_insn to their l->setting_insn for the
33658 rtx_equal_for_cselib_1 call, so that unsuccessful comparisons don't
33659 promote some debug locs.
33660 * sched-deps.cc (sched_analyze_2) <case MEM>: For MEMs in DEBUG_INSNs
33661 when using cselib call cselib_lookup_from_insn on the address but
33662 don't substitute it.
33664 2023-02-02 Richard Biener <rguenther@suse.de>
33666 PR middle-end/108625
33667 * genmatch.cc (expr::gen_transform): Also disallow resimplification
33668 from pushing to lseq with force_leaf.
33669 (dt_simplify::gen_1): Likewise.
33671 2023-02-02 Andrew Stubbs <ams@codesourcery.com>
33673 * config/gcn/gcn-run.cc: Include libgomp-gcn.h.
33674 (struct kernargs): Replace the common content with kernargs_abi.
33675 (struct heap): Delete.
33676 (main): Read GCN_STACK_SIZE envvar.
33677 Allocate space for the device stacks.
33678 Write the new kernargs fields.
33679 * config/gcn/gcn.cc (gcn_option_override): Remove stack_size_opt.
33680 (default_requested_args): Remove PRIVATE_SEGMENT_BUFFER_ARG and
33681 PRIVATE_SEGMENT_WAVE_OFFSET_ARG.
33682 (gcn_addr_space_convert): Mask the QUEUE_PTR_ARG content.
33683 (gcn_expand_prologue): Move the TARGET_PACKED_WORK_ITEMS to the top.
33684 Set up the stacks from the values in the kernargs, not private.
33685 (gcn_expand_builtin_1): Match the stack configuration in the prologue.
33686 (gcn_hsa_declare_function_name): Turn off the private segment.
33687 (gcn_conditional_register_usage): Ensure QUEUE_PTR is fixed.
33688 * config/gcn/gcn.h (FIXED_REGISTERS): Fix the QUEUE_PTR register.
33689 * config/gcn/gcn.opt (mstack-size): Change the description.
33691 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
33694 * config/arm/arm.h (VALID_MVE_PRED_MODE): Add V2QI.
33695 * config/arm/arm.cc (thumb2_legitimate_address_p): Use HImode for
33696 addressing MVE predicate modes.
33697 (mve_bool_vec_to_const): Change to represent correct MVE predicate
33699 (arm_hard_regno_mode_ok): Use VALID_MVE_PRED_MODE instead of checking
33701 (arm_vector_mode_supported_p): Likewise.
33702 (arm_mode_to_pred_mode): Add V2QI.
33703 * config/arm/arm-builtins.cc (UNOP_PRED_UNONE_QUALIFIERS): New
33705 (UNOP_PRED_PRED_QUALIFIERS): New qualifier
33706 (BINOP_PRED_UNONE_PRED_QUALIFIERS): New qualifier.
33707 (v2qi_UP): New macro.
33708 (v4bi_UP): New macro.
33709 (v8bi_UP): New macro.
33710 (v16bi_UP): New macro.
33711 (arm_expand_builtin_args): Make it able to expand the new predicate
33713 * config/arm/arm-modes.def (V2QI): New mode.
33714 * config/arm/arm-simd-builtin-types.def (Pred1x16_t, Pred2x8_t
33715 Pred4x4_t): Remove unused predicate builtin types.
33716 * config/arm/arm_mve.h (__arm_vctp16q, __arm_vctp32q, __arm_vctp64q,
33717 __arm_vctp8q, __arm_vpnot, __arm_vctp8q_m, __arm_vctp64q_m,
33718 __arm_vctp32q_m, __arm_vctp16q_m): Use predicate modes.
33719 * config/arm/arm_mve_builtins.def (vctp16q, vctp32q, vctp64q, vctp8q,
33720 vpnot, vctp8q_m, vctp16q_m, vctp32q_m, vctp64q_m): Likewise.
33721 * config/arm/constraints.md (DB): Check for VALID_MVE_PRED_MODE instead
33722 of MODE_VECTOR_BOOL.
33723 * config/arm/iterators.md (MVE_7, MVE_7_HI): Add V2QI
33724 (MVE_VPRED): Likewise.
33725 (MVE_vpred): Add V2QI and map upper case predicate modes to lower case.
33726 (MVE_vctp): New mode attribute.
33730 * config/arm/mve.md (mve_vctp<mode1>qhi): Rename this...
33731 (mve_vctp<MVE_vctp>q<MVE_vpred>): ... to this. And use new mode
33733 (mve_vpnothi): Rename this...
33734 (mve_vpnotv16bi): ... to this.
33735 (mve_vctp<mode1>q_mhi): Rename this...
33736 (mve_vctp<MVE_vctp>q_m<MVE_vpred>):... to this.
33737 (mve_vldrdq_gather_base_z_<supf>v2di,
33738 mve_vldrdq_gather_offset_z_<supf>v2di,
33739 mve_vldrdq_gather_shifted_offset_z_<supf>v2di,
33740 mve_vstrdq_scatter_base_p_<supf>v2di,
33741 mve_vstrdq_scatter_offset_p_<supf>v2di,
33742 mve_vstrdq_scatter_offset_p_<supf>v2di_insn,
33743 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di,
33744 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn,
33745 mve_vstrdq_scatter_base_wb_p_<supf>v2di,
33746 mve_vldrdq_gather_base_wb_z_<supf>v2di,
33747 mve_vldrdq_gather_base_nowb_z_<supf>v2di,
33748 mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Use V2QI insead of HI for
33750 * config/arm/unspecs.md (VCTP8Q, VCTP16Q, VCTP32Q, VCTP64Q): Replace
33752 (VCTP): ... with this.
33753 (VCTP8Q_M, VCTP16Q_M, VCTP32Q_M, VCTP64Q_M): Replace these...
33754 (VCTP_M): ... with this.
33755 * config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Use
33756 VALID_MVE_PRED_MODE instead of checking for MODE_VECTOR_BOOL class.
33758 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
33761 * config/arm/arm.cc (arm_hard_regno_mode_ok): Use new MACRO.
33762 (arm_modes_tieable_p): Make MVE predicate modes tieable.
33763 * config/arm/arm.h (VALID_MVE_PRED_MODE): New define.
33764 * simplify-rtx.cc (simplify_context::simplify_subreg): Teach
33765 simplify_subreg to simplify subregs where the outermode is not scalar.
33767 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
33770 * config/arm/arm-builtins.cc (arm_simd_builtin_type): Rewrite to use
33771 new qualifiers parameter and use unsigned short type for MVE predicate.
33772 (arm_init_builtin): Call arm_simd_builtin_type with qualifiers
33774 (arm_init_crypto_builtins): Likewise.
33776 2023-02-02 Jakub Jelinek <jakub@redhat.com>
33779 * builtins.def (BUILT_IN_UNREACHABLE_TRAP): New builtin.
33780 * internal-fn.def (TRAP): Remove.
33781 * internal-fn.cc (expand_TRAP): Remove.
33782 * tree.cc (build_common_builtin_nodes): Define
33783 BUILT_IN_UNREACHABLE_TRAP if not yet defined.
33784 (builtin_decl_unreachable): Use BUILT_IN_UNREACHABLE_TRAP
33785 instead of BUILT_IN_TRAP.
33786 * gimple.cc (gimple_build_builtin_unreachable): Remove
33787 emitting internal function for BUILT_IN_TRAP.
33788 * asan.cc (maybe_instrument_call): Handle BUILT_IN_UNREACHABLE_TRAP.
33789 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Handle
33790 BUILT_IN_UNREACHABLE_TRAP instead of BUILT_IN_TRAP.
33791 * ipa-devirt.cc (possible_polymorphic_call_target_p): Handle
33792 BUILT_IN_UNREACHABLE_TRAP.
33793 * builtins.cc (expand_builtin, is_inexpensive_builtin): Likewise.
33794 * tree-cfg.cc (verify_gimple_call,
33795 pass_warn_function_return::execute): Likewise.
33796 * attribs.cc (decl_attributes): Don't report exclusions on
33797 BUILT_IN_UNREACHABLE_TRAP either.
33799 2023-02-02 liuhongt <hongtao.liu@intel.com>
33801 PR tree-optimization/108601
33802 * tree-vectorizer.h (vect_can_peel_nonlinear_iv_p): Removed.
33803 * tree-vect-loop.cc
33804 (vectorizable_nonlinear_induction): Remove
33805 vect_can_peel_nonlinear_iv_p.
33806 (vect_can_peel_nonlinear_iv_p): Don't peel
33807 nonlinear iv(mult or shift) for epilog when vf is not
33808 constant and moved the defination to ..
33809 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
33812 2023-02-02 Jakub Jelinek <jakub@redhat.com>
33814 PR middle-end/108435
33815 * tree-nested.cc (convert_nonlocal_omp_clauses)
33816 <case OMP_CLAUSE_LASTPRIVATE>: If info->new_local_var_chain and *seq
33817 is not a GIMPLE_BIND, wrap the sequence into a new GIMPLE_BIND
33818 before calling declare_vars.
33819 (convert_nonlocal_omp_clauses) <case OMP_CLAUSE_LINEAR>: Merge
33820 with the OMP_CLAUSE_LASTPRIVATE handling except for whether
33821 seq is initialized to &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (clause)
33822 or &OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause).
33824 2023-02-01 Tamar Christina <tamar.christina@arm.com>
33826 * common/config/aarch64/aarch64-common.cc
33827 (struct aarch64_option_extension): Add native_detect and document struct
33829 (all_extensions): Set new field native_detect.
33830 * config/aarch64/aarch64.cc (struct aarch64_option_extension): Delete
33833 2023-02-01 Martin Liska <mliska@suse.cz>
33835 * ipa-devirt.cc (odr_types_equivalent_p): Respect *warned
33838 2023-02-01 Andrew MacLeod <amacleod@redhat.com>
33840 PR tree-optimization/108356
33841 * gimple-range-cache.cc (ranger_cache::range_on_edge): Always
33842 do a search of the DOM tree for a range.
33844 2023-02-01 Martin Liska <mliska@suse.cz>
33847 * cgraphunit.cc (walk_polymorphic_call_targets): Insert
33848 ony non-null values.
33849 * ipa.cc (walk_polymorphic_call_targets): Likewise.
33851 2023-02-01 Martin Liska <mliska@suse.cz>
33854 * gcc.cc (LINK_COMPRESS_DEBUG_SPEC): Report error only for
33857 2023-02-01 Jakub Jelinek <jakub@redhat.com>
33860 * ree.cc (combine_reaching_defs): Don't return false for paradoxical
33861 subregs in DEBUG_INSNs.
33863 2023-02-01 Richard Sandiford <richard.sandiford@arm.com>
33865 * compare-elim.cc (find_flags_uses_in_insn): Guard use of SET_SRC.
33867 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
33869 * config/s390/s390.cc (s390_restore_gpr_p): New function.
33870 (s390_preserve_gpr_arg_in_range_p): New function.
33871 (s390_preserve_gpr_arg_p): New function.
33872 (s390_preserve_fpr_arg_p): New function.
33873 (s390_register_info_stdarg_fpr): Rename to ...
33874 (s390_register_info_arg_fpr): ... this. Add -mpreserve-args handling.
33875 (s390_register_info_stdarg_gpr): Rename to ...
33876 (s390_register_info_arg_gpr): ... this. Add -mpreserve-args handling.
33877 (s390_register_info): Use the renamed functions above.
33878 (s390_optimize_register_info): Likewise.
33879 (save_fpr): Generate CFI for -mpreserve-args.
33880 (save_gprs): Generate CFI for -mpreserve-args. Drop return value.
33881 (s390_emit_prologue): Adjust to changed calling convention of save_gprs.
33882 (s390_optimize_prologue): Likewise.
33883 * config/s390/s390.opt: New option -mpreserve-args
33885 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
33887 * config/s390/s390.cc (save_gprs): Use gen_frame_mem.
33888 (restore_gprs): Likewise.
33889 (s390_emit_stack_tie): Make the stack_tie to be dependent on the
33890 frame pointer if a frame-pointer is used.
33891 (s390_emit_prologue): Emit stack_tie when frame-pointer is needed.
33892 * config/s390/s390.md (stack_tie): Add a register operand and
33894 (@stack_tie<mode>): ... this.
33896 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
33898 * dwarf2cfi.cc (dwarf2out_frame_debug_cfa_restore): Add
33899 EMIT_CFI parameter.
33900 (dwarf2out_frame_debug): Add case for REG_CFA_NORESTORE.
33901 * reg-notes.def (REG_CFA_NOTE): New reg note definition.
33903 2023-02-01 Richard Biener <rguenther@suse.de>
33905 PR middle-end/108500
33906 * dominance.cc (assign_dfs_numbers): Replace recursive DFS
33907 with tree traversal algorithm.
33909 2023-02-01 Jason Merrill <jason@redhat.com>
33911 * doc/invoke.texi: Document -Wno-changes-meaning.
33913 2023-02-01 David Malcolm <dmalcolm@redhat.com>
33915 * doc/invoke.texi (Static Analyzer Options): Add notes about
33916 limitations of -fanalyzer.
33918 2023-01-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33920 * config/riscv/constraints.md (vj): New.
33922 * config/riscv/iterators.md: Add more opcode.
33923 * config/riscv/predicates.md (vector_arith_operand): New.
33924 (vector_neg_arith_operand): New.
33925 (vector_shift_operand): New.
33926 * config/riscv/riscv-vector-builtins-bases.cc (class binop): New.
33927 * config/riscv/riscv-vector-builtins-bases.h: (vadd): New.
33944 * config/riscv/riscv-vector-builtins-functions.def (vadd): New.
33961 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): New.
33962 * config/riscv/riscv-vector-builtins-shapes.h (binop): New.
33963 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New.
33964 (DEF_RVV_U_OPS): New.
33965 (rvv_arg_type_info::get_base_vector_type): Handle
33966 RVV_BASE_shift_vector.
33967 (rvv_arg_type_info::get_tree_type): Ditto.
33968 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add
33969 RVV_BASE_shift_vector.
33970 * config/riscv/riscv.cc (riscv_print_operand): Handle 'V'.
33971 * config/riscv/vector-iterators.md: Handle more opcode.
33972 * config/riscv/vector.md (@pred_<optab><mode>): New.
33974 2023-01-31 Philipp Tomsich <philipp.tomsich@vrull.eu>
33977 * config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Check
33980 2023-01-31 Richard Sandiford <richard.sandiford@arm.com>
33982 PR tree-optimization/108608
33983 * tree-vect-loop.cc (vect_transform_reduction): Handle single
33984 def-use cycles that involve function calls rather than tree codes.
33986 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
33988 PR tree-optimization/108385
33989 * gimple-range-gori.cc (gori_compute::compute_operand_range):
33990 Allow VARYING computations to continue if there is a relation.
33991 * range-op.cc (pointer_plus_operator::op2_range): New.
33993 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
33995 PR tree-optimization/108359
33996 * range-op.cc (range_operator::wi_fold_in_parts_equiv): New.
33997 (range_operator::fold_range): If op1 is equivalent to op2 then
33998 invoke new fold_in_parts_equiv to operate on sub-components.
33999 * range-op.h (wi_fold_in_parts_equiv): New prototype.
34001 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
34003 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
34004 not abort calculations if there is a valid relation available.
34005 (gori_compute::refine_using_relation): Pass correct relation trio.
34006 (gori_compute::compute_operand1_range): Create trio and use it.
34007 (gori_compute::compute_operand2_range): Ditto.
34008 * range-op.cc (operator_plus::op1_range): Use correct trio member.
34009 (operator_minus::op1_range): Use correct trio member.
34010 * value-relation.cc (value_relation::create_trio): New.
34011 * value-relation.h (value_relation::create_trio): New prototype.
34013 2023-01-31 Jakub Jelinek <jakub@redhat.com>
34016 * config/i386/i386-expand.cc
34017 (ix86_convert_const_wide_int_to_broadcast): Return nullptr if
34018 CONST_WIDE_INT_NUNITS (op) times HOST_BITS_PER_WIDE_INT isn't
34019 equal to bitsize of mode.
34021 2023-01-31 Jakub Jelinek <jakub@redhat.com>
34023 PR rtl-optimization/108596
34024 * bb-reorder.cc (fix_up_fall_thru_edges): Handle the case where cur_bb
34025 ends with asm goto and has a crossing fallthrough edge to the same bb
34026 that contains at least one of its labels by restoring EDGE_CROSSING
34027 flag even on possible edge from cur_bb to new_bb successor.
34029 2023-01-31 Jakub Jelinek <jakub@redhat.com>
34032 * config/i386/avx512erintrin.h (_mm512_exp2a23_round_pd,
34033 _mm512_exp2a23_round_ps, _mm512_rcp28_round_pd, _mm512_rcp28_round_ps,
34034 _mm512_rsqrt28_round_pd, _mm512_rsqrt28_round_ps): Use
34035 _mm512_undefined_pd () or _mm512_undefined_ps () instead of using
34036 uninitialized automatic variable __W.
34038 2023-01-31 Gerald Pfeifer <gerald@pfeifer.com>
34040 * doc/include/fdl.texi: Change fsf.org to www.fsf.org.
34042 2023-01-30 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34044 * config/riscv/riscv-protos.h (get_vector_mode): New function.
34045 * config/riscv/riscv-v.cc (get_vector_mode): Ditto.
34046 * config/riscv/riscv-vector-builtins-bases.cc (enum lst_type): New enum.
34047 (class loadstore): Adjust for indexed loads/stores support.
34049 * config/riscv/riscv-vector-builtins-bases.h: New function declare.
34050 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Ditto.
34066 * config/riscv/riscv-vector-builtins-shapes.cc
34067 (struct indexed_loadstore_def): New class.
34069 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
34070 * config/riscv/riscv-vector-builtins.cc (required_extensions_p): Adjust
34071 for indexed loads/stores support.
34072 (check_required_extensions): Ditto.
34073 (rvv_arg_type_info::get_base_vector_type): New function.
34074 (rvv_arg_type_info::get_tree_type): Ditto.
34075 (function_builder::add_unique_function): Adjust for indexed loads/stores
34077 (function_expander::use_exact_insn): New function.
34078 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Adjust for
34079 indexed loads/stores support.
34080 (struct rvv_arg_type_info): Ditto.
34081 (function_expander::index_mode): New function.
34082 (function_base::apply_tail_policy_p): Ditto.
34083 (function_base::apply_mask_policy_p): Ditto.
34084 * config/riscv/vector-iterators.md (unspec): New unspec.
34085 * config/riscv/vector.md (unspec): Ditto.
34086 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New
34088 (@pred_indexed_<order>store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
34089 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
34090 (@pred_indexed_<order>store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
34091 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
34092 (@pred_indexed_<order>store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
34093 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
34094 (@pred_indexed_<order>store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
34095 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
34096 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
34097 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
34098 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
34099 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
34100 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
34102 2023-01-30 Flavio Cruz <flaviocruz@gmail.com>
34104 * config.gcc: Recognize x86_64-*-gnu* targets and include
34106 * config/i386/gnu64.h: Define configuration for new target
34107 including ld.so location.
34109 2023-01-30 Philipp Tomsich <philipp.tomsich@vrull.eu>
34111 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update
34112 ampere1a to include SM4.
34114 2023-01-30 Andrew Pinski <apinski@marvell.com>
34116 PR tree-optimization/108582
34117 * tree-ssa-phiopt.cc (match_simplify_replacement): Add check
34118 for middlebb to have no phi nodes.
34120 2023-01-30 Richard Biener <rguenther@suse.de>
34122 PR tree-optimization/108574
34123 * tree-ssa-sccvn.cc (visit_phi): Instead of swapping
34124 sameval and def, ignore the equivalence if there's the
34125 danger of oscillating between two values.
34127 2023-01-30 Andreas Schwab <schwab@suse.de>
34129 * common/config/riscv/riscv-common.cc
34130 (riscv_option_optimization_table)
34131 [TARGET_DEFAULT_ASYNC_UNWIND_TABLES]: Enable
34132 -fasynchronous-unwind-tables and -funwind-tables.
34133 * config.gcc (riscv*-*-linux*): Define
34134 TARGET_DEFAULT_ASYNC_UNWIND_TABLES.
34136 2023-01-30 YunQiang Su <yunqiang.su@cipunited.com>
34138 * Makefile.in (CROSS_SYSTEM_HEADER_DIR): set according the
34139 value of includedir.
34141 2023-01-30 Richard Biener <rguenther@suse.de>
34144 * cgraph.cc (possibly_call_in_translation_unit_p): Relax
34147 2023-01-30 liuhongt <hongtao.liu@intel.com>
34149 * config/i386/i386.opt: Change AVX512FP16 to AVX512-FP16.
34150 * doc/invoke.texi: Ditto.
34152 2023-01-29 Jan Hubicka <hubicka@ucw.cz>
34154 * ipa-utils.cc: Include calls.h, cfgloop.h and cfganal.h
34155 (stmt_may_terminate_function_p): If assuming return or EH
34156 volatile asm is safe.
34157 (find_always_executed_bbs): Fix handling of terminating BBS and
34158 infinite loops; add debug output.
34159 * tree-ssa-alias.cc (stmt_kills_ref_p): Fix debug output
34161 2023-01-28 Philipp Tomsich <philipp.tomsich@vrull.eu>
34163 * config/aarch64/aarch64.cc (aarch64_uxt_size): fix an
34164 off-by-one in checking the permissible shift-amount.
34166 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
34168 * doc/extend.texi (Named Address Spaces): Update link to the
34171 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
34173 * doc/standards.texi (Standards): Fix markup.
34175 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
34177 * doc/standards.texi (Standards): Update link to Objective-C book.
34179 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
34181 * doc/invoke.texi (Instrumentation Options): Update reference to
34184 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
34186 * doc/standards.texi: Update Go1 link.
34188 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34190 * config/riscv/predicates.md (pmode_reg_or_0_operand): New predicate.
34191 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore):
34194 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34195 * config/riscv/riscv-vector-builtins-functions.def (vlse): New class.
34197 * config/riscv/riscv-vector-builtins.cc
34198 (function_expander::use_contiguous_load_insn): Support vlse/vsse.
34199 * config/riscv/vector.md (@pred_strided_load<mode>): New md pattern.
34200 (@pred_strided_store<mode>): Ditto.
34202 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34204 * config/riscv/vector.md (tail_policy_op_idx): Remove.
34205 (mask_policy_op_idx): Remove.
34206 (avl_type_op_idx): Remove.
34208 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
34210 PR tree-optimization/96373
34211 * tree.h (sign_mask_for): Declare.
34212 * tree.cc (sign_mask_for): New function.
34213 (signed_or_unsigned_type_for): For vector types, try to use the
34214 related_int_vector_mode.
34215 * genmatch.cc (commutative_op): Handle conditional internal functions.
34216 * match.pd: Fold an IFN_COND_MUL+copysign into an IFN_COND_XOR+and.
34218 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
34220 * tree-vectorizer.cc (vector_costs::compare_inside_loop_cost):
34221 Use the likely minimum VF when bounding the denominators to
34222 the estimated number of iterations.
34224 2023-01-27 Richard Biener <rguenther@suse.de>
34227 * doc/invoke.texi (-shared): Clarify effect on -ffast-math
34228 and -Ofast FP environment side-effects.
34230 2023-01-27 Richard Biener <rguenther@suse.de>
34233 * config/mips/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
34234 Don't add crtfastmath.o for -shared.
34236 2023-01-27 Richard Biener <rguenther@suse.de>
34239 * config/ia64/linux.h (ENDFILE_SPEC): Don't add crtfastmath.o
34242 2023-01-27 Richard Biener <rguenther@suse.de>
34245 * config/alpha/linux.h (ENDFILE_SPEC): Don't add
34246 crtfastmath.o for -shared.
34248 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
34250 PR tree-optimization/108306
34251 * range-op.cc (operator_lshift::fold_range): Return [0, 0] not
34252 varying for shifts that are always out of void range.
34253 (operator_rshift::fold_range): Return [0, 0] not
34254 varying for shifts that are always out of void range.
34256 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
34258 PR tree-optimization/108447
34259 * gimple-range-fold.cc (old_using_range::relation_fold_and_or):
34260 Do not attempt to fold HONOR_NAN types.
34262 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34264 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def):
34265 Remove _m suffix for "vop_m" C++ overloaded API name.
34267 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34269 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add vlm/vsm support.
34270 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34271 * config/riscv/riscv-vector-builtins-functions.def (vlm): New define.
34273 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def): Add vlm/vsm support.
34274 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_B_OPS): Ditto.
34275 (vbool64_t): Ditto.
34276 (vbool32_t): Ditto.
34277 (vbool16_t): Ditto.
34282 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_B_OPS): Ditto.
34283 (rvv_arg_type_info::get_tree_type): Ditto.
34284 (function_expander::use_contiguous_load_insn): Ditto.
34285 * config/riscv/vector.md (@pred_store<mode>): Ditto.
34287 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34289 * config/riscv/riscv-vsetvl.cc (vsetvl_insn_p): Add condition to avoid ICE.
34290 (vsetvl_discard_result_insn_p): New function.
34291 (reg_killed_by_bb_p): rename to find_reg_killed_by.
34292 (find_reg_killed_by): New name.
34293 (get_vl): allow it to be called by more functions.
34294 (has_vsetvl_killed_avl_p): Add condition.
34295 (get_avl): allow it to be called by more functions.
34296 (insn_should_be_added_p): New function.
34297 (get_all_nonphi_defs): Refine function.
34298 (get_all_sets): Ditto.
34299 (get_same_bb_set): New function.
34300 (any_insn_in_bb_p): Ditto.
34301 (any_set_in_bb_p): Ditto.
34302 (get_vl_vtype_info): Add VLMAX forward optimization.
34303 (source_equal_p): Fix issues.
34304 (extract_single_source): Refine.
34305 (avl_info::multiple_source_equal_p): New function.
34306 (avl_info::operator==): Adjust for final version.
34307 (vl_vtype_info::operator==): Ditto.
34308 (vl_vtype_info::same_avl_p): Ditto.
34309 (vector_insn_info::parse_insn): Ditto.
34310 (vector_insn_info::available_p): New function.
34311 (vector_insn_info::merge): Adjust for final version.
34312 (vector_insn_info::dump): Add hard_empty.
34313 (pass_vsetvl::hard_empty_block_p): New function.
34314 (pass_vsetvl::backward_demand_fusion): Adjust for final version.
34315 (pass_vsetvl::forward_demand_fusion): Ditto.
34316 (pass_vsetvl::demand_fusion): Ditto.
34317 (pass_vsetvl::cleanup_illegal_dirty_blocks): New function.
34318 (pass_vsetvl::compute_local_properties): Adjust for final version.
34319 (pass_vsetvl::can_refine_vsetvl_p): Ditto.
34320 (pass_vsetvl::refine_vsetvls): Ditto.
34321 (pass_vsetvl::commit_vsetvls): Ditto.
34322 (pass_vsetvl::propagate_avl): New function.
34323 (pass_vsetvl::lazy_vsetvl): Adjust for new version.
34324 * config/riscv/riscv-vsetvl.h (enum def_type): New enum.
34326 2023-01-27 Jakub Jelinek <jakub@redhat.com>
34329 * doc/extend.texi: Fix up return type of __builtin_va_arg_pack_len
34330 from size_t to int.
34332 2023-01-27 Jakub Jelinek <jakub@redhat.com>
34335 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Allow
34336 redirection of calls to __builtin_trap in addition to redirection
34337 to __builtin_unreachable.
34339 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34341 * config/riscv/riscv-vsetvl.cc (before_p): Fix bug.
34343 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34345 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function args.
34346 (emit_vsetvl_insn): Ditto.
34348 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34350 * config/riscv/vector.md: Fix constraints.
34352 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34354 * config/riscv/vector-iterators.md: Add TARGET_MIN_VLEN > 32 predicates.
34356 2023-01-27 Patrick Palka <ppalka@redhat.com>
34357 Jakub Jelinek <jakub@redhat.com>
34359 * tree-core.h (tree_code_type, tree_code_length): For
34360 C++17 and later, add inline keyword, otherwise don't define
34361 the arrays, but declare extern arrays.
34362 * tree.cc (tree_code_type, tree_code_length): Define these
34363 arrays for C++14 and older.
34365 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34367 * config/riscv/riscv-vsetvl.h: Change it into public.
34369 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34371 * config/riscv/riscv-passes.def (INSERT_PASS_BEFORE): Reorder VSETVL
34374 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34376 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::execute): Always call split_all_insns.
34378 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34380 * config/riscv/vector.md: Fix incorrect attributes.
34382 2023-01-27 Richard Biener <rguenther@suse.de>
34385 * config/loongarch/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
34386 Don't add crtfastmath.o for -shared.
34388 2023-01-27 Alexandre Oliva <oliva@gnu.org>
34390 * doc/options.texi (option, RejectNegative): Mention that
34391 -g-started options are also implicitly negatable.
34393 2023-01-26 Kito Cheng <kito.cheng@sifive.com>
34395 * config/riscv/riscv-vector-builtins.cc (register_builtin_types):
34396 Use get_typenode_from_name to get fixed-width integer type
34398 * config/riscv/riscv-vector-builtins.def: Update define with
34399 fixed-width integer type nodes.
34401 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34403 * config/riscv/riscv-vsetvl.cc (same_bb_and_before_p): Remove it.
34404 (real_insn_and_same_bb_p): New function.
34405 (same_bb_and_after_or_equal_p): Remove it.
34406 (before_p): New function.
34407 (reg_killed_by_bb_p): Ditto.
34408 (has_vsetvl_killed_avl_p): Ditto.
34409 (get_vl): Move location so that we can call it.
34410 (anticipatable_occurrence_p): Fix issue of AVL=REG support.
34411 (available_occurrence_p): Ditto.
34412 (dominate_probability_p): Remove it.
34413 (can_backward_propagate_p): Remove it.
34414 (get_all_nonphi_defs): New function.
34415 (get_all_predecessors): Ditto.
34416 (any_insn_in_bb_p): Ditto.
34417 (insert_vsetvl): Adjust AVL REG.
34418 (source_equal_p): New function.
34419 (extract_single_source): Ditto.
34420 (avl_info::single_source_equal_p): Ditto.
34421 (avl_info::operator==): Adjust for AVL=REG.
34422 (vl_vtype_info::same_avl_p): Ditto.
34423 (vector_insn_info::set_demand_info): Remove it.
34424 (vector_insn_info::compatible_p): Adjust for AVL=REG.
34425 (vector_insn_info::compatible_avl_p): New function.
34426 (vector_insn_info::merge): Adjust AVL=REG.
34427 (vector_insn_info::dump): Ditto.
34428 (pass_vsetvl::merge_successors): Remove it.
34429 (enum fusion_type): New enum.
34430 (pass_vsetvl::get_backward_fusion_type): New function.
34431 (pass_vsetvl::backward_demand_fusion): Adjust for AVL=REG.
34432 (pass_vsetvl::forward_demand_fusion): Ditto.
34433 (pass_vsetvl::demand_fusion): Ditto.
34434 (pass_vsetvl::prune_expressions): Ditto.
34435 (pass_vsetvl::compute_local_properties): Ditto.
34436 (pass_vsetvl::cleanup_vsetvls): Ditto.
34437 (pass_vsetvl::commit_vsetvls): Ditto.
34438 (pass_vsetvl::init): Ditto.
34439 * config/riscv/riscv-vsetvl.h (enum fusion_type): New enum.
34440 (enum merge_type): New enum.
34442 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34444 * config/riscv/riscv-vsetvl.cc
34445 (vector_infos_manager::vector_infos_manager): Add probability.
34446 (vector_infos_manager::dump): Ditto.
34447 (pass_vsetvl::compute_probabilities): Ditto.
34448 * config/riscv/riscv-vsetvl.h (struct vector_block_info): Ditto.
34450 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34452 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Remove dirty_pat.
34453 (vector_insn_info::merge): Ditto.
34454 (vector_insn_info::dump): Ditto.
34455 (pass_vsetvl::merge_successors): Ditto.
34456 (pass_vsetvl::backward_demand_fusion): Ditto.
34457 (pass_vsetvl::forward_demand_fusion): Ditto.
34458 (pass_vsetvl::commit_vsetvls): Ditto.
34459 * config/riscv/riscv-vsetvl.h: Ditto.
34461 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34463 * config/riscv/riscv-vsetvl.cc (add_label_notes): Rename insn to
34466 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34468 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion): Refine codes.
34470 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34472 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::forward_demand_fusion):
34473 Add pre-check for redundant flow.
34475 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34477 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::create_bitmap_vectors): New function.
34478 (vector_infos_manager::free_bitmap_vectors): Ditto.
34479 (pass_vsetvl::pre_vsetvl): Adjust codes.
34480 * config/riscv/riscv-vsetvl.h: New function declaration.
34482 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34484 * config/riscv/riscv-vsetvl.cc (can_backward_propagate_p): Fix for null iter_bb.
34485 (vector_insn_info::set_demand_info): New function.
34486 (pass_vsetvl::emit_local_forward_vsetvls): Adjust for refinement of Phase 3.
34487 (pass_vsetvl::merge_successors): Ditto.
34488 (pass_vsetvl::compute_global_backward_infos): Ditto.
34489 (pass_vsetvl::backward_demand_fusion): Ditto.
34490 (pass_vsetvl::forward_demand_fusion): Ditto.
34491 (pass_vsetvl::demand_fusion): New function.
34492 (pass_vsetvl::lazy_vsetvl): Adjust for refinement of phase 3.
34493 * config/riscv/riscv-vsetvl.h: New function declaration.
34495 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34497 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator>=): Fix available condition.
34499 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34501 * config/riscv/riscv-vsetvl.cc (change_vsetvl_insn): New function.
34502 (pass_vsetvl::compute_global_backward_infos): Simplify codes.
34504 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34506 * config/riscv/riscv-vsetvl.cc (loop_basic_block_p): Adjust function.
34507 (backward_propagate_worthwhile_p): Fix non-worthwhile.
34509 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34511 * config/riscv/riscv-vsetvl.cc (change_insn): Adjust in_group in validate_change.
34513 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34515 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::all_same_avl_p): New function.
34516 (pass_vsetvl::can_refine_vsetvl_p): Add AVL check.
34517 (pass_vsetvl::commit_vsetvls): Ditto.
34518 * config/riscv/riscv-vsetvl.h: New function declaration.
34520 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34522 * config/riscv/vector.md:
34524 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34526 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore): use
34527 pred_store for vse.
34528 * config/riscv/riscv-vector-builtins.cc
34529 (function_expander::add_mem_operand): Refine function.
34530 (function_expander::use_contiguous_load_insn): Adjust new
34532 (function_expander::use_contiguous_store_insn): Ditto.
34533 * config/riscv/riscv-vector-builtins.h: Refine function.
34534 * config/riscv/vector.md (@pred_store<mode>): New pattern.
34536 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34538 * config/riscv/riscv-vector-builtins.cc: Change to scalar pointer.
34540 2023-01-26 Marek Polacek <polacek@redhat.com>
34542 PR middle-end/108543
34543 * opts.cc (parse_sanitizer_options): Don't always clear SANITIZE_ADDRESS
34544 if it was previously set.
34546 2023-01-26 Jakub Jelinek <jakub@redhat.com>
34548 PR tree-optimization/108540
34549 * range-op-float.cc (foperator_equal::fold_range): If both op1 and op2
34550 are singletons, use range_true even if op1 != op2
34551 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
34552 even if intersection of the ranges is empty and one has
34553 zero low bound and another zero high bound, use range_true_and_false
34554 rather than range_false.
34555 (foperator_not_equal::fold_range): If both op1 and op2
34556 are singletons, use range_false even if op1 != op2
34557 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
34558 even if intersection of the ranges is empty and one has
34559 zero low bound and another zero high bound, use range_true_and_false
34560 rather than range_true.
34562 2023-01-26 Jakub Jelinek <jakub@redhat.com>
34564 * value-relation.cc (kind_string): Add const.
34565 (rr_negate_table, rr_swap_table, rr_intersect_table,
34566 rr_union_table, rr_transitive_table): Add static const, change
34567 element type from relation_kind to unsigned char.
34568 (relation_negate, relation_swap, relation_intersect, relation_union,
34569 relation_transitive): Cast rr_*_table element to relation_kind.
34570 (relation_to_code): Add static const.
34571 (relation_tests): Assert VREL_LAST is smaller than UCHAR_MAX.
34573 2023-01-26 Richard Biener <rguenther@suse.de>
34575 PR tree-optimization/108547
34576 * gimple-predicate-analysis.cc (value_sat_pred_p):
34579 2023-01-26 Siddhesh Poyarekar <siddhesh@gotplt.org>
34581 PR tree-optimization/108522
34582 * tree-object-size.cc (compute_object_offset): Make EXPR
34583 argument non-const. Call component_ref_field_offset.
34585 2023-01-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34587 * config/aarch64/aarch64-option-extensions.def (cssc): Specify
34588 FEATURE_STRING field.
34590 2023-01-26 Gerald Pfeifer <gerald@pfeifer.com>
34592 * doc/sourcebuild.texi: Refer to projects as GCC and GDB.
34594 2023-01-25 Iain Sandoe <iain@sandoe.co.uk>
34598 * gcc.cc: Provide default specs for Modula-2 so that when the
34599 language is not built-in better diagnostics are emitted for
34600 attempts to use .mod or .m2i file extensions.
34602 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
34604 * config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing.
34606 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
34608 * config/arm/mve.md (mve_vqabsq_s<mode>): Fix spacing.
34610 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
34612 * config/arm/mve.md (mve_vnegq_f<mode>, mve_vnegq_s<mode>):
34615 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
34617 * config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing.
34619 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
34621 * config/arm/mve.md (mve_vclsq_s<mode>): Fix spacing.
34623 2023-01-25 Richard Biener <rguenther@suse.de>
34625 PR tree-optimization/108523
34626 * tree-ssa-sccvn.cc (visit_phi): Avoid using the exclusive
34627 backedge value for the result when using predication to
34630 2023-01-25 Richard Biener <rguenther@suse.de>
34632 * doc/lto.texi (Command line options): Reword and update reference
34633 to removed lto_read_all_file_options.
34635 2023-01-25 Richard Sandiford <richard.sandiford@arm.com>
34637 * config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC
34640 2023-01-25 Gerald Pfeifer <gerald@pfeifer.com>
34642 * doc/contrib.texi: Add Jose E. Marchesi.
34644 2023-01-25 Jakub Jelinek <jakub@redhat.com>
34646 PR tree-optimization/108498
34647 * gimple-ssa-store-merging.cc (class store_operand_info):
34648 End coment with full stop rather than comma.
34649 (split_group): Likewise.
34650 (merged_store_group::apply_stores): Clear string_concatenation if
34651 start or end aren't on a byte boundary.
34653 2023-01-25 Siddhesh Poyarekar <siddhesh@gotplt.org>
34654 Jakub Jelinek <jakub@redhat.com>
34656 PR tree-optimization/108522
34657 * tree-object-size.cc (compute_object_offset): Use
34658 TREE_OPERAND(ref, 2) for COMPONENT_REF when available.
34660 2023-01-24 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
34662 * config/xtensa/xtensa.md:
34663 Fix exit from loops detecting references before overwriting in the
34666 2023-01-24 Vladimir N. Makarov <vmakarov@redhat.com>
34668 * lra-constraints.cc (get_hard_regno): Remove final_p arg. Always
34669 do elimination but only for hard register.
34670 (operands_match_p, uses_hard_regs_p, process_alt_operands): Adjust
34671 calls of get_hard_regno.
34673 2023-01-24 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
34675 * config/s390/s390-d.cc (s390_d_target_versions): Fix detection
34678 2023-01-24 Andre Vieira <andre.simoesdiasvieira@arm.com>
34681 * config/arm/mve.md (mve_vstrbq_p_<supf><mode>, mve_vstrhq_p_fv8hf,
34682 mve_vstrhq_p_<supf><mode>, mve_vstrwq_p_<supf>v4si): Add memory operand
34685 2023-01-24 Xianmiao Qu <cooper.qu@linux.alibaba.com>
34687 * config.gcc(csky-*-linux*): Define CSKY_ENABLE_MULTILIB
34688 and only include 'csky/t-csky-linux' when enable multilib.
34689 * config/csky/csky-linux-elf.h(SYSROOT_SUFFIX_SPEC): Don't
34690 define it when disable multilib.
34692 2023-01-24 Richard Biener <rguenther@suse.de>
34694 PR tree-optimization/108500
34695 * dominance.h (calculate_dominance_info): Add parameter
34696 to indicate fast-query compute, defaulted to true.
34697 * dominance.cc (calculate_dominance_info): Honor
34698 fast-query compute parameter.
34699 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Do
34700 not compute the dominator fast-query DFS numbers.
34702 2023-01-24 Eric Biggers <ebiggers@google.com>
34705 * optc-save-gen.awk: Fix copy-and-paste error.
34707 2023-01-24 Jakub Jelinek <jakub@redhat.com>
34710 * cgraphbuild.cc: Include gimplify.h.
34711 (record_reference): Replace VAR_DECLs with DECL_HAS_VALUE_EXPR_P with
34712 their corresponding DECL_VALUE_EXPR expressions after unsharing.
34714 2023-01-24 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
34717 * config.gcc (tm_file): Move the variable out of loop.
34719 2023-01-24 Lulu Cheng <chenglulu@loongson.cn>
34720 Yang Yujie <yangyujie@loongson.cn>
34723 * config/loongarch/loongarch.cc (loongarch_classify_address):
34724 Add precessint for CONST_INT.
34725 (loongarch_print_operand_reloc): Operand modifier 'c' is supported.
34726 (loongarch_print_operand): Increase the processing of '%c'.
34727 * doc/extend.texi: Adds documents for LoongArch operand modifiers.
34728 And port the public operand modifiers information to this document.
34730 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
34732 * doc/invoke.texi (-mbranch-protection): Update documentation.
34734 2023-01-23 Richard Biener <rguenther@suse.de>
34737 * config/sparc/freebsd.h (ENDFILE_SPEC): Don't add crtfastmath.o
34739 * config/sparc/linux.h (ENDFILE_SPEC): Likewise.
34740 * config/sparc/linux64.h (ENDFILE_SPEC): Likewise.
34741 * config/sparc/sp-elf.h (ENDFILE_SPEC): Likewise.
34742 * config/sparc/sp64-elf.h (ENDFILE_SPEC): Likewise.
34744 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
34746 * config/arm/aout.h (ra_auth_code): Add entry in enum.
34747 * config/arm/arm.cc (emit_multi_reg_push): Add RA_AUTH_CODE register
34748 to dwarf frame expression.
34749 (arm_emit_multi_reg_pop): Restore RA_AUTH_CODE register.
34750 (arm_expand_prologue): Update frame related information and reg notes
34751 for pac/pacbit insn.
34752 (arm_regno_class): Check for pac pseudo reigster.
34753 (arm_dbx_register_number): Assign ra_auth_code register number in dwarf.
34754 (arm_init_machine_status): Set pacspval_needed to zero.
34755 (arm_debugger_regno): Check for PAC register.
34756 (arm_unwind_emit_sequence): Print .save directive with ra_auth_code
34758 (arm_unwind_emit_set): Add entry for IP_REGNUM in switch case.
34759 (arm_unwind_emit): Update REG_CFA_REGISTER case._
34760 * config/arm/arm.h (FIRST_PSEUDO_REGISTER): Modify.
34761 (DWARF_PAC_REGNUM): Define.
34762 (IS_PAC_REGNUM): Likewise.
34763 (enum reg_class): Add PAC_REG entry.
34764 (machine_function): Add pacbti_needed state to structure.
34765 * config/arm/arm.md (RA_AUTH_CODE): Define.
34767 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
34769 * config.gcc ($tm_file): Update variable.
34770 * config/arm/arm-mlib.h: Create new header file.
34771 * config/arm/t-rmprofile (MULTI_ARCH_DIRS_RM): Rename mbranch-protection
34772 multilib arch directory.
34773 (MULTILIB_REUSE): Add multilib reuse rules.
34774 (MULTILIB_MATCHES): Add multilib match rules.
34776 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
34778 * config/arm/arm-cpus.in (cortex-m85): Define new CPU.
34779 * config/arm/arm-tables.opt: Regenerate.
34780 * config/arm/arm-tune.md: Likewise.
34781 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m85.
34782 * (-mfix-cmse-cve-2021-35465): Likewise.
34784 2023-01-23 Richard Biener <rguenther@suse.de>
34786 PR tree-optimization/108482
34787 * tree-vect-generic.cc (expand_vector_operations): Fold remaining
34788 .LOOP_DIST_ALIAS calls.
34790 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
34792 * config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object.
34793 * config/arm/arm-protos.h: Update.
34794 * config/arm/aarch-common-protos.h: Declare
34795 'aarch_bti_arch_check'.
34796 * config/arm/arm.cc (aarch_bti_enabled) Update.
34797 (aarch_bti_j_insn_p, aarch_pac_insn_p, aarch_gen_bti_c)
34798 (aarch_gen_bti_j, aarch_bti_arch_check): New functions.
34799 * config/arm/arm.md (bti_nop): New insn.
34800 * config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'.
34801 (aarch-bti-insert.o): New target.
34802 * config/arm/unspecs.md (VUNSPEC_BTI_NOP): New unspec.
34803 * config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Verify arch
34805 (gate): Make use of 'aarch_bti_arch_check'.
34806 * config/arm/arm-passes.def: New file.
34807 * config/aarch64/aarch64.cc (aarch_bti_arch_check): New function.
34809 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
34811 * config.gcc (aarch64*-*-*): Rename 'aarch64-bti-insert.o' into
34812 'aarch-bti-insert.o'.
34813 * config/aarch64/aarch64-protos.h: Remove 'aarch64_bti_enabled'
34815 * config/aarch64/aarch64.cc (aarch_bti_enabled): Rename.
34816 (aarch_bti_j_insn_p, aarch_pac_insn_p): New functions.
34817 (aarch64_output_mi_thunk)
34818 (aarch64_print_patchable_function_entry)
34819 (aarch64_file_end_indicate_exec_stack): Update renamed function
34820 calls to renamed functions.
34821 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
34822 * config/aarch64/t-aarch64 (aarch-bti-insert.o): Update
34824 * config/aarch64/aarch64-bti-insert.cc: Delete.
34825 * config/arm/aarch-bti-insert.cc: New file including and
34826 generalizing code from aarch64-bti-insert.cc.
34827 * config/arm/aarch-common-protos.h: Update.
34829 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
34831 * config/arm/arm.h (arm_arch8m_main): Declare it.
34832 * config/arm/arm-protos.h (arm_current_function_pac_enabled_p):
34834 * config/arm/arm.cc (arm_arch8m_main): Define it.
34835 (arm_option_reconfigure_globals): Set arm_arch8m_main.
34836 (arm_compute_frame_layout, arm_expand_prologue)
34837 (thumb2_expand_return, arm_expand_epilogue)
34838 (arm_conditional_register_usage): Update for pac codegen.
34839 (arm_current_function_pac_enabled_p): New function.
34840 (aarch_bti_enabled) New function.
34841 (use_return_insn): Return zero when pac is enabled.
34842 * config/arm/arm.md (pac_ip_lr_sp, pacbti_ip_lr_sp, aut_ip_lr_sp):
34844 * config/arm/unspecs.md (UNSPEC_PAC_NOP)
34845 (VUNSPEC_PACBTI_NOP, VUNSPEC_AUT_NOP): Add unspecs.
34847 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
34849 * config/arm/t-rmprofile: Add multilib rules for march +pacbti and
34850 mbranch-protection.
34852 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
34853 Tejas Belagod <tbelagod@arm.com>
34855 * config/arm/arm.cc (arm_file_start): Emit EABI attributes for
34856 Tag_PAC_extension, Tag_BTI_extension, TAG_BTI_use, TAG_PACRET_use.
34858 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
34859 Tejas Belagod <tbelagod@arm.com>
34860 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
34862 * ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce
34863 new pseudo register class _UVRSC_PAC.
34865 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
34866 Tejas Belagod <tbelagod@arm.com>
34868 * config/arm/arm-c.cc (arm_cpu_builtins): Define
34869 __ARM_FEATURE_BTI_DEFAULT, __ARM_FEATURE_PAC_DEFAULT,
34870 __ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI.
34872 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
34873 Tejas Belagod <tbelagod@arm.com>
34875 * doc/sourcebuild.texi: Document arm_pacbti_hw.
34877 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
34878 Tejas Belagod <tbelagod@arm.com>
34879 Richard Earnshaw <Richard.Earnshaw@arm.com>
34881 * config/arm/arm.cc (arm_configure_build_target): Parse and validate
34882 -mbranch-protection option and initialize appropriate data structures.
34883 * config/arm/arm.opt (-mbranch-protection): New option.
34884 * doc/invoke.texi (Arm Options): Document it.
34886 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
34887 Tejas Belagod <tbelagod@arm.com>
34889 * config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
34890 * config/arm/arm-cpus.in (pacbti): New feature.
34891 * doc/invoke.texi (Arm Options): Document it.
34893 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
34894 Tejas Belagod <tbelagod@arm.com>
34896 * common/config/aarch64/aarch64-common.cc: Include aarch-common.h.
34897 (all_architectures): Fix comment.
34898 (aarch64_parse_extension): Rename return type, enum value names.
34899 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Rename
34900 factored out aarch_ra_sign_scope and aarch_ra_sign_key variables.
34901 Also rename corresponding enum values.
34902 * config/aarch64/aarch64-opts.h (aarch64_function_type): Factor
34903 out aarch64_function_type and move it to common code as
34904 aarch_function_type in aarch-common.h.
34905 * config/aarch64/aarch64-protos.h: Include common types header,
34906 move out types aarch64_parse_opt_result and aarch64_key_type to
34908 * config/aarch64/aarch64.cc: Move mbranch-protection parsing types
34909 and functions out into aarch-common.h and aarch-common.cc. Fix up
34910 all the name changes resulting from the move.
34911 * config/aarch64/aarch64.md: Fix up aarch64_ra_sign_key type name change
34913 * config/aarch64/aarch64.opt: Include aarch-common.h to import
34914 type move. Fix up name changes from factoring out common code and
34916 * config/arm/aarch-common-protos.h: Export factored out routines to both
34918 * config/arm/aarch-common.cc: Include newly factored out types.
34919 Move all mbranch-protection code and data structures from
34921 * config/arm/aarch-common.h: New header that declares types shared
34922 between aarch32 and aarch64 backends.
34923 * config/arm/arm-protos.h: Declare types and variables that are
34924 made common to aarch64 and aarch32 backends - aarch_ra_sign_key,
34925 aarch_ra_sign_scope and aarch_enable_bti.
34926 * config/arm/arm.opt (config/arm/aarch-common.h): Include header.
34927 (aarch_ra_sign_scope, aarch_enable_bti): Declare variable.
34928 * config/arm/arm.cc: Add missing includes.
34930 2023-01-23 Tobias Burnus <tobias@codesourcery.com>
34932 * doc/install.texi (amdgcn, nvptx): Require newlib 4.3.0.
34934 2023-01-23 Richard Biener <rguenther@suse.de>
34936 PR tree-optimization/108449
34937 * cgraphunit.cc (check_global_declaration): Do not turn
34938 undefined statics into externs.
34940 2023-01-22 Dimitar Dimitrov <dimitar@dinux.eu>
34942 * config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Fix value for QI
34943 and HI input modes.
34944 * config/pru/pru.md (clz): Fix generated code for QI and HI
34947 2023-01-22 Cupertino Miranda <cupertino.miranda@oracle.com>
34949 * config/v850/v850.cc (v850_select_section): Put const volatile
34950 objects into read-only sections.
34952 2023-01-20 Tejas Belagod <tejas.belagod@arm.com>
34954 * config/aarch64/arm_neon.h (vmull_p64, vmull_high_p64, vaeseq_u8,
34955 vaesdq_u8, vaesmcq_u8, vaesimcq_u8): Gate under "nothing+aes".
34956 (vsha1*_u32, vsha256*_u32): Gate under "nothing+sha2".
34958 2023-01-20 Jakub Jelinek <jakub@redhat.com>
34960 PR tree-optimization/108457
34961 * tree-ssa-loop-niter.cc (build_cltz_expr): Use
34962 SCALAR_INT_TYPE_MODE (utype) directly as C[LT]Z_DEFINED_VALUE_AT_ZERO
34963 argument instead of a temporary. Formatting fixes.
34965 2023-01-19 Jakub Jelinek <jakub@redhat.com>
34967 PR tree-optimization/108447
34968 * value-relation.cc (rr_union_table): Fix VREL_UNDEFINED row order.
34969 (relation_tests): Add self-tests for relation_{intersect,union}
34971 * selftest.h (relation_tests): Declare.
34972 * function-tests.cc (test_ranges): Call it.
34974 2023-01-19 H.J. Lu <hjl.tools@gmail.com>
34977 * config/i386/i386-expand.cc (ix86_expand_builtin): Check
34978 invalid third argument to __builtin_ia32_prefetch.
34980 2023-01-19 Jakub Jelinek <jakub@redhat.com>
34982 PR middle-end/108459
34983 * omp-expand.cc (expand_omp_for_init_counts): Use fold_build1 rather
34984 than fold_unary for NEGATE_EXPR.
34986 2023-01-19 Christophe Lyon <christophe.lyon@arm.com>
34989 * config/aarch64/aarch64.cc (aarch64_layout_arg): Improve
34990 comment. Move assert about alignment a bit later.
34992 2023-01-19 Jakub Jelinek <jakub@redhat.com>
34994 PR tree-optimization/108440
34995 * tree-ssa-forwprop.cc: Include gimple-range.h.
34996 (simplify_rotate): For the forms with T2 wider than T and shift counts of
34997 Y and B - Y add & (B - 1) masking for the rotate count if Y could be equal
34998 to B. For the forms with T2 wider than T and shift counts of
34999 Y and (-Y) & (B - 1), don't punt if range could be [B, B2], but only if
35000 range doesn't guarantee Y < B or Y = N * B. If range doesn't guarantee
35001 Y < B, also add & (B - 1) masking for the rotate count. Use lazily created
35002 pass specific ranger instead of get_global_range_query.
35003 (pass_forwprop::execute): Disable that ranger at the end of pass if it has
35006 2023-01-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
35008 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Use
35009 exact_log2 (INTVAL (operands[2])) >= 0 as condition for gating
35011 (aarch64_simd_vec_copy_lane<mode>): Likewise.
35012 (aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
35014 2023-01-19 Alexandre Oliva <oliva@adacore.com>
35017 * sched-deps.cc (sched_analyze_2): Skip cselib address lookup
35018 within debug insns.
35020 2023-01-18 Martin Jambor <mjambor@suse.cz>
35023 * cgraph.cc (cgraph_node::remove): Check whether nodes up the
35024 lcone_of chain also do not need the body.
35026 2023-01-18 Richard Biener <rguenther@suse.de>
35029 2022-12-16 Richard Biener <rguenther@suse.de>
35031 PR middle-end/108086
35032 * tree-inline.cc (remap_ssa_name): Do not unshare the
35033 result from the decl_map.
35035 2023-01-18 Murray Steele <murray.steele@arm.com>
35038 * config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic
35040 (__arm_vst1q_p_s8): Likewise.
35041 (__arm_vld1q_z_u8): Likewise.
35042 (__arm_vld1q_z_s8): Likewise.
35043 (__arm_vst1q_p_u16): Likewise.
35044 (__arm_vst1q_p_s16): Likewise.
35045 (__arm_vld1q_z_u16): Likewise.
35046 (__arm_vld1q_z_s16): Likewise.
35047 (__arm_vst1q_p_u32): Likewise.
35048 (__arm_vst1q_p_s32): Likewise.
35049 (__arm_vld1q_z_u32): Likewise.
35050 (__arm_vld1q_z_s32): Likewise.
35051 (__arm_vld1q_z_f16): Likewise.
35052 (__arm_vst1q_p_f16): Likewise.
35053 (__arm_vld1q_z_f32): Likewise.
35054 (__arm_vst1q_p_f32): Likewise.
35056 2023-01-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
35058 * config/xtensa/xtensa.md (xorsi3_internal):
35059 Rename from the original of "xorsi3".
35060 (xorsi3): New expansion pattern that emits addition rather than
35061 bitwise-XOR when the second source is a constant of -2147483648
35064 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
35065 Andrew Pinski <apinski@marvell.com>
35068 * config/rs6000/rs6000-overload.def (VEC_VSUBCUQ): Fix typo
35069 vec_vsubcuqP with vec_vsubcuq.
35071 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
35074 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
35075 support for invalid uses of MMA opaque type in function arguments.
35077 2023-01-18 liuhongt <hongtao.liu@intel.com>
35080 * config/i386/cygwin.h (ENDFILE_SPEC): Link crtfastmath.o
35081 whenever -mdaz-ftz is specified. Don't link crtfastmath.o when
35082 -share or -mno-daz-ftz is specified.
35083 * config/i386/darwin.h (ENDFILE_SPEC): Ditto.
35084 * config/i386/mingw32.h (ENDFILE_SPEC): Ditto.
35086 2023-01-17 Jose E. Marchesi <jose.marchesi@oracle.com>
35088 * config/bpf/bpf.cc (bpf_option_override): Disable
35091 2023-01-17 Jakub Jelinek <jakub@redhat.com>
35093 PR tree-optimization/106523
35094 * tree-ssa-forwprop.cc (simplify_rotate): For the
35095 patterns with (-Y) & (B - 1) in one operand's shift
35096 count and Y in another, if T2 has wider precision than T,
35097 punt if Y could have a value in [B, B2 - 1] range.
35099 2023-01-16 H.J. Lu <hjl.tools@gmail.com>
35102 * config/i386/i386.cc (x86_output_mi_thunk): Disable
35103 -mforce-indirect-call for PIC in 32-bit mode.
35105 2023-01-16 Jan Hubicka <hubicka@ucw.cz>
35108 * ipa-modref.cc (modref_access_analysis::analyze): Use
35109 find_always_executed_bbs.
35110 * ipa-sra.cc (process_scan_results): Likewise.
35111 * ipa-utils.cc (stmt_may_terminate_function_p): New function.
35112 (find_always_executed_bbs): New function.
35113 * ipa-utils.h (stmt_may_terminate_function_p): Declare.
35114 (find_always_executed_bbs): Declare.
35116 2023-01-16 Jan Hubicka <jh@suse.cz>
35118 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Guard scatter
35119 by TARGET_USE_SCATTER.
35120 * config/i386/i386.h (TARGET_USE_SCATTER_2PARTS,
35121 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New macros.
35122 * config/i386/x86-tune.def (TARGET_USE_SCATTER_2PARTS,
35123 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New tunes.
35124 (X86_TUNE_AVOID_256FMA_CHAINS, X86_TUNE_AVOID_512FMA_CHAINS): Disable
35125 for znver4. (X86_TUNE_USE_GATHER): Disable for zen4.
35127 2023-01-16 Richard Biener <rguenther@suse.de>
35130 * config/sol2.h (ENDFILE_SPEC): Don't add crtfastmath.o for -shared.
35132 2023-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
35136 * config/arm/arm_mve.h (__ARM_mve_coerce2): Split types.
35137 (__ARM_mve_coerce3): Likewise.
35139 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
35141 * tree-ssa-loop-niter.cc (build_popcount_expr): Add IFN support.
35143 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
35145 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): New.
35146 (number_of_iterations_bitcount): Add call to the above.
35147 (number_of_iterations_exit_assumptions): Add EQ_EXPR case for
35148 c[lt]z idiom recognition.
35150 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
35152 * doc/sourcebuild.texi: Add missing target attributes.
35154 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
35156 PR tree-optimization/94793
35157 * tree-scalar-evolution.cc (expression_expensive_p): Add checks
35159 * tree-ssa-loop-niter.cc (build_cltz_expr): New.
35160 (number_of_iterations_cltz_complement): New.
35161 (number_of_iterations_bitcount): Add call to the above.
35163 2023-01-16 Jonathan Wakely <jwakely@redhat.com>
35165 * doc/extend.texi (Common Function Attributes): Fix grammar.
35167 2023-01-16 Jakub Jelinek <jakub@redhat.com>
35170 * config/riscv/riscv-vsetvl.h: Add space in between Copyright and (C).
35171 * config/riscv/riscv-vsetvl.cc: Likewise.
35173 2023-01-16 Jakub Jelinek <jakub@redhat.com>
35176 * config/i386/xmmintrin.h (_mm_undefined_ps): Temporarily
35177 disable -Winit-self using pragma GCC diagnostic ignored.
35178 * config/i386/emmintrin.h (_mm_undefined_pd, _mm_undefined_si128):
35180 * config/i386/avxintrin.h (_mm256_undefined_pd, _mm256_undefined_ps,
35181 _mm256_undefined_si256): Likewise.
35182 * config/i386/avx512fintrin.h (_mm512_undefined_pd,
35183 _mm512_undefined_ps, _mm512_undefined_epi32): Likewise.
35184 * config/i386/avx512fp16intrin.h (_mm_undefined_ph,
35185 _mm256_undefined_ph, _mm512_undefined_ph): Likewise.
35187 2023-01-16 Kewen Lin <linkw@linux.ibm.com>
35190 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
35191 support for invalid uses in inline asm, factor out the checking and
35192 erroring to lambda function check_and_error_invalid_use.
35194 2023-01-15 Aldy Hernandez <aldyh@redhat.com>
35196 PR tree-optimization/107608
35197 * range-op-float.cc (range_operator_float::fold_range): Avoid
35198 folding into INF when flag_trapping_math.
35199 * value-range.h (frange::known_isinf): Return false for possible NANs.
35201 2023-01-15 Xianmiao Qu <cooper.qu@linux.alibaba.com>
35203 * config.gcc (csky-*-*): Support --with-float=softfp.
35205 2023-01-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
35207 * config/xtensa/xtensa-protos.h (order_regs_for_local_alloc):
35208 Rename to xtensa_adjust_reg_alloc_order.
35209 * config/xtensa/xtensa.cc (xtensa_adjust_reg_alloc_order):
35210 Ditto. And also remove code to reorder register numbers for
35211 leaf functions, rename the tables, and adjust the allocation
35212 order for the call0 ABI to use register A0 more.
35213 (xtensa_leaf_regs): Remove.
35214 * config/xtensa/xtensa.h (REG_ALLOC_ORDER): Cosmetics.
35215 (order_regs_for_local_alloc): Rename as the above.
35216 (LEAF_REGISTERS, LEAF_REG_REMAP, leaf_function): Remove.
35218 2023-01-14 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
35220 * config/aarch64/aarch64-sve.md (aarch64_vec_duplicate_vq<mode>_le):
35221 Change to define_insn_and_split to fold ldr+dup to ld1rq.
35222 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): New.
35224 2023-01-14 Alexandre Oliva <oliva@adacore.com>
35226 * hash-table.h (is_deleted): Precheck !is_empty.
35227 (mark_deleted): Postcheck !is_empty.
35228 (copy constructor): Test is_empty before is_deleted.
35230 2023-01-14 Alexandre Oliva <oliva@adacore.com>
35233 * config/arm/arm.md (movmisaligndi): Prefer aligned SImode
35236 2023-01-13 Eric Botcazou <ebotcazou@adacore.com>
35238 PR rtl-optimization/108274
35239 * function.cc (thread_prologue_and_epilogue_insns): Also update the
35240 DF information for calls in a few more cases.
35242 2023-01-13 John David Anglin <danglin@gcc.gnu.org>
35244 * config/pa/pa-linux.h (TARGET_SYNC_LIBCALL): Delete define.
35245 * config/pa/pa.cc (pa_init_libfuncs): Use MAX_SYNC_LIBFUNC_SIZE
35247 * config/pa/pa.h (TARGET_SYNC_LIBCALLS): Use flag_sync_libcalls.
35248 (MAX_SYNC_LIBFUNC_SIZE): Define.
35249 (TARGET_CPU_CPP_BUILTINS): Define __SOFTFP__ when soft float is
35251 * config/pa/pa.md (atomic_storeqi): Emit __atomic_exchange_1
35252 libcall when sync libcalls are disabled.
35253 (atomic_storehi, atomic_storesi, atomic_storedi): Likewise.
35254 (atomic_loaddi): Emit __atomic_load_8 libcall when sync libcalls
35255 are disabled on 32-bit target.
35256 * config/pa/pa.opt (matomic-libcalls): New option.
35257 * doc/invoke.texi (HPPA Options): Update.
35259 2023-01-13 Alexander Monakov <amonakov@ispras.ru>
35261 PR rtl-optimization/108117
35262 PR rtl-optimization/108132
35263 * sched-deps.cc (deps_analyze_insn): Do not schedule across
35264 calls before reload.
35266 2023-01-13 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
35268 * common/config/arm/arm-common.cc (arm_canon_arch_option_1): Ignore cde
35269 options for -mlibarch.
35270 * config/arm/arm-cpus.in (begin cpu cortex-m55): Add cde options.
35271 * doc/invoke.texi (CDE): Document options for Cortex-M55 CPU.
35273 2023-01-13 Qing Zhao <qing.zhao@oracle.com>
35275 * attribs.cc (strict_flex_array_level_of): Move this function to ...
35276 * attribs.h (strict_flex_array_level_of): Remove the declaration.
35277 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
35278 replace the referece to strict_flex_array_level_of with
35279 DECL_NOT_FLEXARRAY.
35280 * tree.cc (component_ref_size): Likewise.
35282 2023-01-13 Richard Biener <rguenther@suse.de>
35285 * config/arm/linux-eabi.h (ENDFILE_SPEC): Don't add
35286 crtfastmath.o for -shared.
35287 * config/arm/unknown-elf.h (STARTFILE_SPEC): Likewise.
35289 2023-01-13 Richard Biener <rguenther@suse.de>
35292 * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Don't add
35293 crtfastmath.o for -shared.
35294 * config/aarch64/aarch64-freebsd.h (GNU_USER_TARGET_MATHFILE_SPEC):
35296 * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATHFILE_SPEC):
35299 2023-01-13 Richard Sandiford <richard.sandiford@arm.com>
35301 * config/aarch64/aarch64.cc (aarch64_dwarf_frame_reg_mode): New
35303 (TARGET_DWARF_FRAME_REG_MODE): Define.
35305 2023-01-13 Richard Biener <rguenther@suse.de>
35308 * config/aarch64/aarch64.cc (aarch64_gimple_fold_builtin): Don't
35309 update EH info on the fly.
35311 2023-01-13 Richard Biener <rguenther@suse.de>
35313 PR tree-optimization/108387
35314 * tree-ssa-sccvn.cc (visit_nary_op): Check for SSA_NAME
35315 value before inserting expression into the tables.
35317 2023-01-12 Andrew Pinski <apinski@marvell.com>
35318 Roger Sayle <roger@nextmovesoftware.com>
35320 PR tree-optimization/92342
35321 * match.pd ((m1 CMP m2) * d -> (m1 CMP m2) ? d : 0):
35322 Use tcc_comparison and :c for the multiply.
35323 (b & -(a CMP c) -> (a CMP c)?b:0): New pattern.
35325 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
35326 Richard Sandiford <richard.sandiford@arm.com>
35329 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment):
35330 Check DECL_PACKED for bitfield.
35331 (aarch64_layout_arg): Warn when parameter passing ABI changes.
35332 (aarch64_function_arg_boundary): Do not warn here.
35333 (aarch64_gimplify_va_arg_expr): Warn when parameter passing ABI
35336 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
35337 Richard Sandiford <richard.sandiford@arm.com>
35339 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Fix
35341 (aarch64_layout_arg): Factorize warning conditions.
35342 (aarch64_function_arg_boundary): Fix typo.
35343 * function.cc (currently_expanding_function_start): New variable.
35344 (expand_function_start): Handle
35345 currently_expanding_function_start.
35346 * function.h (currently_expanding_function_start): Declare.
35348 2023-01-12 Richard Biener <rguenther@suse.de>
35350 PR tree-optimization/99412
35351 * tree-ssa-reassoc.cc (is_phi_for_stmt): Remove.
35352 (swap_ops_for_binary_stmt): Remove reduction handling.
35353 (rewrite_expr_tree_parallel): Adjust.
35354 (reassociate_bb): Likewise.
35355 * tree-parloops.cc (build_new_reduction): Handle MINUS_EXPR.
35357 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
35359 * config/xtensa/xtensa.md (ctzsi2, ffssi2):
35360 Rearrange the emitting codes.
35362 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
35364 * config/xtensa/xtensa.md (*btrue):
35365 Correct value of the attribute "length" that depends on
35366 TARGET_DENSITY and operands, and add '?' character to the register
35367 constraint of the compared operand.
35369 2023-01-12 Alexandre Oliva <oliva@adacore.com>
35371 * hash-table.h (expand): Check elements and deleted counts.
35372 (verify): Likewise.
35374 2023-01-11 Roger Sayle <roger@nextmovesoftware.com>
35376 PR tree-optimization/71343
35377 * tree-ssa-sccvn.cc (visit_nary_op) <case LSHIFT_EXPR>: Make
35378 the value number of the expression X << C the same as the value
35379 number for the multiplication X * (1<<C).
35381 2023-01-11 David Faust <david.faust@oracle.com>
35384 * config/bpf/bpf.cc (bpf_print_operand): Correct handling for
35385 floating point modes.
35387 2023-01-11 Eric Botcazou <ebotcazou@adacore.com>
35389 PR tree-optimization/108199
35390 * tree-sra.cc (sra_modify_expr): Deal with reverse storage order
35391 for bit-field references.
35393 2023-01-11 Kewen Lin <linkw@linux.ibm.com>
35395 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Make
35396 OPTION_MASK_P10_FUSION implicit setting honour Power10 tuning setting.
35397 * config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Remove
35398 OPTION_MASK_P10_FUSION.
35400 2023-01-11 Richard Biener <rguenther@suse.de>
35402 PR tree-optimization/107767
35403 * tree-cfgcleanup.cc (phi_alternatives_equal): Export.
35404 * tree-cfgcleanup.h (phi_alternatives_equal): Declare.
35405 * tree-switch-conversion.cc (switch_conversion::collect):
35406 Count unique non-default targets accounting for later
35407 merging opportunities.
35409 2023-01-11 Martin Liska <mliska@suse.cz>
35411 PR middle-end/107976
35412 * params.opt: Limit JT params.
35413 * stmt.cc (emit_case_dispatch_table): Use auto_vec.
35415 2023-01-11 Richard Biener <rguenther@suse.de>
35417 PR tree-optimization/108352
35418 * tree-ssa-threadbackward.cc
35419 (back_threader_profitability::profitable_path_p): Adjust
35420 heuristic that allows non-multi-way branch threads creating
35422 * doc/invoke.texi (--param fsm-scale-path-blocks): Remove.
35423 (--param fsm-scale-path-stmts): Adjust.
35424 * params.opt (--param=fsm-scale-path-blocks=): Remove.
35425 (-param=fsm-scale-path-stmts=): Adjust description.
35427 2023-01-11 Richard Biener <rguenther@suse.de>
35429 PR tree-optimization/108353
35430 * tree-ssa-propagate.cc (cfg_blocks_back, ssa_edge_worklist_back):
35432 (add_ssa_edge): Simplify.
35433 (add_control_edge): Likewise.
35434 (ssa_prop_init): Likewise.
35435 (ssa_prop_fini): Likewise.
35436 (ssa_propagation_engine::ssa_propagate): Likewise.
35438 2023-01-11 Andreas Krebbel <krebbel@linux.ibm.com>
35440 * config/s390/s390.md (*not<mode>): New pattern.
35442 2023-01-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
35444 * config/xtensa/xtensa.cc (xtensa_insn_cost):
35445 Let insn cost for size be obtained by applying COSTS_N_INSNS()
35446 to instruction length and then dividing by 3.
35448 2023-01-10 Richard Biener <rguenther@suse.de>
35450 PR tree-optimization/106293
35451 * tree-ssa-dse.cc (dse_classify_store): Use a worklist to
35452 process degenerate PHI defs.
35454 2023-01-10 Roger Sayle <roger@nextmovesoftware.com>
35456 PR rtl-optimization/106421
35457 * cprop.cc (bypass_block): Check that DEST is local to this
35458 function (non-NULL) before calling find_edge.
35460 2023-01-10 Martin Jambor <mjambor@suse.cz>
35463 * ipa-param-manipulation.h (ipa_param_body_adjustments): New members
35464 sort_replacements, lookup_first_base_replacement and
35465 m_sorted_replacements_p.
35466 * ipa-param-manipulation.cc: Define INCLUDE_ALGORITHM.
35467 (ipa_param_body_adjustments::register_replacement): Set
35468 m_sorted_replacements_p to false.
35469 (compare_param_body_replacement): New function.
35470 (ipa_param_body_adjustments::sort_replacements): Likewise.
35471 (ipa_param_body_adjustments::common_initialization): Call
35473 (ipa_param_body_adjustments::ipa_param_body_adjustments): Initialize
35474 m_sorted_replacements_p.
35475 (ipa_param_body_adjustments::lookup_replacement_1): Rework to use
35477 (ipa_param_body_adjustments::lookup_first_base_replacement): New
35479 (ipa_param_body_adjustments::modify_call_stmt): Use
35480 lookup_first_base_replacement.
35481 * omp-simd-clone.cc (ipa_simd_modify_function_body): Call
35482 adjustments->sort_replacements.
35484 2023-01-10 Richard Biener <rguenther@suse.de>
35486 PR tree-optimization/108314
35487 * tree-vect-stmts.cc (vectorizable_condition): Do not
35488 perform BIT_NOT_EXPR optimization for EXTRACT_LAST_REDUCTION.
35490 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
35492 * config/csky/csky-linux-elf.h (SYSROOT_SUFFIX_SPEC): New.
35494 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
35496 * config/csky/csky.h (MULTILIB_DEFAULTS): Fix float abi option.
35498 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
35500 * config/csky/csky.cc (csky_cpu_cpp_builtins): Add builtin
35501 defines for soft float abi.
35503 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
35505 * config/csky/csky.md (smart_bseti): Change condition to CSKY_ISA_FEATURE (E1).
35506 (smart_bclri): Likewise.
35507 (fast_bseti): Change condition to CSKY_ISA_FEATURE (E2).
35508 (fast_bclri): Likewise.
35509 (fast_cmpnesi_i): Likewise.
35510 (*fast_cmpltsi_i): Likewise.
35511 (*fast_cmpgeusi_i): Likewise.
35513 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
35515 * config/csky/csky_insn_fpuv3.md (l<frm_pattern><fixsuop><mode>si2): Test
35516 flag_fp_int_builtin_inexact || !flag_trapping_math.
35517 (<frm_pattern><mode>2): Likewise.
35519 2023-01-10 Andreas Krebbel <krebbel@linux.ibm.com>
35521 * config/s390/s390.cc (s390_register_info): Check call_used_regs
35522 instead of hard-coding the register numbers for call saved
35524 (s390_optimize_register_info): Likewise.
35526 2023-01-09 Eric Botcazou <ebotcazou@adacore.com>
35528 * doc/gm2.texi (Overview): Fix @node markers.
35529 (Using): Likewise. Remove subsections that were moved to Overview
35530 from the menu and move others around.
35532 2023-01-09 Richard Biener <rguenther@suse.de>
35534 PR middle-end/108209
35535 * genmatch.cc (commutative_op): Fix return value for
35536 user-id with non-commutative first replacement.
35538 2023-01-09 Jakub Jelinek <jakub@redhat.com>
35541 * calls.cc (expand_call): For calls with
35542 TYPE_NO_NAMED_ARGS_STDARG_P (funtype) use zero for n_named_args.
35545 2023-01-09 Richard Biener <rguenther@suse.de>
35547 PR middle-end/69482
35548 * cfgexpand.cc (discover_nonconstant_array_refs_r): Volatile
35549 qualified accesses also force objects to memory.
35551 2023-01-09 Martin Liska <mliska@suse.cz>
35554 * lto-cgraph.cc (compute_ltrans_boundary): Do not insert
35555 NULL (deleleted value) to a hash_set.
35557 2023-01-08 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
35559 * config/xtensa/xtensa.md (*splice_bits):
35560 New insn_and_split pattern.
35562 2023-01-07 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
35564 * config/xtensa/xtensa.cc
35565 (xtensa_split_imm_two_addends, xtensa_emit_add_imm):
35566 New helper functions.
35567 (xtensa_set_return_address, xtensa_output_mi_thunk):
35568 Change to use the helper function.
35569 (xtensa_emit_adjust_stack_ptr): Ditto.
35570 And also change to try reusing the content of scratch register
35571 A9 if the register is not modified in the function body.
35573 2023-01-07 LIU Hao <lh_mouse@126.com>
35575 PR middle-end/108300
35576 * config/xtensa/xtensa-dynconfig.c: Define `WIN32_LEAN_AND_MEAN`
35577 before <windows.h>.
35578 * diagnostic-color.cc: Likewise.
35579 * plugin.cc: Likewise.
35580 * prefix.cc: Likewise.
35582 2023-01-06 Joseph Myers <joseph@codesourcery.com>
35584 * doc/extend.texi (__builtin_tgmath): Do not restate standard rule
35585 for handling real integer types.
35587 2023-01-06 Tamar Christina <tamar.christina@arm.com>
35590 2022-12-12 Tamar Christina <tamar.christina@arm.com>
35592 * config/aarch64/aarch64-simd.md (*aarch64_simd_movv2hf): New.
35593 (mov<mode>, movmisalign<mode>, aarch64_dup_lane<mode>,
35594 aarch64_store_lane0<mode>, aarch64_simd_vec_set<mode>,
35595 @aarch64_simd_vec_copy_lane<mode>, vec_set<mode>,
35596 reduc_<optab>_scal_<mode>, reduc_<fmaxmin>_scal_<mode>,
35597 aarch64_reduc_<optab>_internal<mode>, aarch64_get_lane<mode>,
35598 vec_init<mode><Vel>, vec_extract<mode><Vel>): Support V2HF.
35599 (aarch64_simd_dupv2hf): New.
35600 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode):
35602 * config/aarch64/iterators.md (VHSDF_P): New.
35603 (V2F, VMOVE, nunits, Vtype, Vmtype, Vetype, stype, VEL,
35604 Vel, q, vp): Add V2HF.
35605 * config/arm/types.md (neon_fp_reduc_add_h): New.
35607 2023-01-06 Martin Liska <mliska@suse.cz>
35609 PR middle-end/107966
35610 * doc/options.texi: Fix Var documentation in internal manual.
35612 2023-01-05 Roger Sayle <roger@nextmovesoftware.com>
35615 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
35617 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
35618 RTL expansion to allow condition (mask) to be shared/reused,
35619 by avoiding overwriting pseudos and adding REG_EQUAL notes.
35621 2023-01-05 Iain Sandoe <iain@sandoe.co.uk>
35623 * common.opt: Add -static-libgm2.
35624 * config/darwin.h (LINK_SPEC): Handle static-libgm2.
35625 * doc/gm2.texi: Document static-libgm2.
35626 * gcc.cc (driver_handle_option): Allow static-libgm2.
35628 2023-01-05 Tejas Joshi <TejasSanjay.Joshi@amd.com>
35630 * common/config/i386/i386-common.cc (processor_alias_table):
35631 Use CPU_ZNVER4 for znver4.
35632 * config/i386/i386.md: Add znver4.md.
35633 * config/i386/znver4.md: New.
35635 2023-01-04 Jakub Jelinek <jakub@redhat.com>
35637 PR tree-optimization/108253
35638 * tree-vrp.cc (maybe_set_nonzero_bits): Handle var with pointer
35641 2023-01-04 Jakub Jelinek <jakub@redhat.com>
35643 PR middle-end/108237
35644 * generic-match-head.cc: Include tree-pass.h.
35645 (canonicalize_math_p, optimize_vectors_before_lowering_p): Define
35646 to false if cfun and cfun->curr_properties has PROP_gimple_opt_math
35647 resp. PROP_gimple_lvec property set.
35649 2023-01-04 Jakub Jelinek <jakub@redhat.com>
35651 PR sanitizer/108256
35652 * convert.cc (do_narrow): Punt for MULT_EXPR if original
35653 type doesn't wrap around and -fsanitize=signed-integer-overflow
35655 * fold-const.cc (fold_unary_loc) <CASE_CONVERT>: Likewise.
35657 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
35659 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Emeraldrapids.
35660 * common/config/i386/i386-common.cc: Add Emeraldrapids.
35662 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
35664 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove case 0xb5
35667 2023-01-03 Sandra Loosemore <sandra@codesourcery.com>
35669 * cgraph.h (struct cgraph_node): Add gc_candidate bit, modify
35670 default constructor to initialize it.
35671 * cgraphunit.cc (expand_all_functions): Save gc_candidate functions
35672 for last and iterate to handle recursive calls. Delete leftover
35673 candidates at the end.
35674 * omp-simd-clone.cc (simd_clone_create): Set gc_candidate bit
35676 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Clear
35677 gc_candidate bit when a clone is used.
35679 2023-01-03 Florian Weimer <fweimer@redhat.com>
35682 2023-01-02 Florian Weimer <fweimer@redhat.com>
35684 * dwarf2cfi.cc (init_return_column_size): Remove.
35685 (init_one_dwarf_reg_size): Adjust.
35686 (generate_dwarf_reg_sizes): New function. Extracted
35687 from expand_builtin_init_dwarf_reg_sizes.
35688 (expand_builtin_init_dwarf_reg_sizes): Call
35689 generate_dwarf_reg_sizes.
35690 * target.def (init_dwarf_reg_sizes_extra): Adjust
35692 * config/msp430/msp430.cc
35693 (msp430_init_dwarf_reg_sizes_extra): Adjust.
35694 * config/rs6000/rs6000.cc
35695 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
35696 * doc/tm.texi: Update.
35698 2023-01-03 Florian Weimer <fweimer@redhat.com>
35701 2023-01-02 Florian Weimer <fweimer@redhat.com>
35703 * debug.h (dwarf_reg_sizes_constant): Declare.
35704 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
35706 2023-01-03 Siddhesh Poyarekar <siddhesh@gotplt.org>
35708 PR tree-optimization/105043
35709 * doc/extend.texi (Object Size Checking): Split out into two
35710 subsections and mention _FORTIFY_SOURCE.
35712 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
35714 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
35715 RTL expansion to allow condition (mask) to be shared/reused,
35716 by avoiding overwriting pseudos and adding REG_EQUAL notes.
35718 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
35721 * config/i386/i386-features.cc
35722 (general_scalar_chain::compute_convert_gain) <case PLUS>: Consider
35723 the gain/cost of converting a MEM operand.
35725 2023-01-03 Jakub Jelinek <jakub@redhat.com>
35727 PR middle-end/108264
35728 * expr.cc (store_expr): For stores into SUBREG_PROMOTED_* targets
35729 from source which doesn't have scalar integral mode first convert
35732 2023-01-03 Jakub Jelinek <jakub@redhat.com>
35734 PR rtl-optimization/108263
35735 * cfgrtl.cc (fixup_reorder_chain): Avoid trying to redirect
35738 2023-01-02 Alexander Monakov <amonakov@ispras.ru>
35741 * config/i386/lujiazui.md (lujiazui_div): New automaton.
35742 (lua_div): New unit.
35743 (lua_idiv_qi): Correct unit in the reservation.
35744 (lua_idiv_qi_load): Ditto.
35745 (lua_idiv_hi): Ditto.
35746 (lua_idiv_hi_load): Ditto.
35747 (lua_idiv_si): Ditto.
35748 (lua_idiv_si_load): Ditto.
35749 (lua_idiv_di): Ditto.
35750 (lua_idiv_di_load): Ditto.
35751 (lua_fdiv_SF): Ditto.
35752 (lua_fdiv_SF_load): Ditto.
35753 (lua_fdiv_DF): Ditto.
35754 (lua_fdiv_DF_load): Ditto.
35755 (lua_fdiv_XF): Ditto.
35756 (lua_fdiv_XF_load): Ditto.
35757 (lua_ssediv_SF): Ditto.
35758 (lua_ssediv_load_SF): Ditto.
35759 (lua_ssediv_V4SF): Ditto.
35760 (lua_ssediv_load_V4SF): Ditto.
35761 (lua_ssediv_V8SF): Ditto.
35762 (lua_ssediv_load_V8SF): Ditto.
35763 (lua_ssediv_SD): Ditto.
35764 (lua_ssediv_load_SD): Ditto.
35765 (lua_ssediv_V2DF): Ditto.
35766 (lua_ssediv_load_V2DF): Ditto.
35767 (lua_ssediv_V4DF): Ditto.
35768 (lua_ssediv_load_V4DF): Ditto.
35770 2023-01-02 Florian Weimer <fweimer@redhat.com>
35772 * debug.h (dwarf_reg_sizes_constant): Declare.
35773 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
35775 2023-01-02 Florian Weimer <fweimer@redhat.com>
35777 * dwarf2cfi.cc (init_return_column_size): Remove.
35778 (init_one_dwarf_reg_size): Adjust.
35779 (generate_dwarf_reg_sizes): New function. Extracted
35780 from expand_builtin_init_dwarf_reg_sizes.
35781 (expand_builtin_init_dwarf_reg_sizes): Call
35782 generate_dwarf_reg_sizes.
35783 * target.def (init_dwarf_reg_sizes_extra): Adjust
35785 * config/msp430/msp430.cc
35786 (msp430_init_dwarf_reg_sizes_extra): Adjust.
35787 * config/rs6000/rs6000.cc
35788 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
35789 * doc/tm.texi: Update.
35791 2023-01-02 Jakub Jelinek <jakub@redhat.com>
35793 * gcc.cc (process_command): Update copyright notice dates.
35794 * gcov-dump.cc (print_version): Ditto.
35795 * gcov.cc (print_version): Ditto.
35796 * gcov-tool.cc (print_version): Ditto.
35797 * gengtype.cc (create_file): Ditto.
35798 * doc/cpp.texi: Bump @copying's copyright year.
35799 * doc/cppinternals.texi: Ditto.
35800 * doc/gcc.texi: Ditto.
35801 * doc/gccint.texi: Ditto.
35802 * doc/gcov.texi: Ditto.
35803 * doc/install.texi: Ditto.
35804 * doc/invoke.texi: Ditto.
35806 2023-01-01 Roger Sayle <roger@nextmovesoftware.com>
35807 Uroš Bizjak <ubizjak@gmail.com>
35809 * config/i386/i386.md (extendditi2): New define_insn.
35810 (define_split): Use DWIH mode iterator to treat new extendditi2
35811 identically to existing extendsidi2_1.
35812 (define_peephole2): Likewise.
35813 (define_peephole2): Likewise.
35814 (define_Split): Likewise.
35817 Copyright (C) 2023 Free Software Foundation, Inc.
35819 Copying and distribution of this file, with or without modification,
35820 are permitted in any medium without royalty provided the copyright
35821 notice and this notice are preserved.
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