1 2023-09-05 Xi Ruoyao <xry111@xry111.site>
3 * config/loongarch/loongarch-opts.h (HAVE_AS_EXPLICIT_RELOCS):
4 Define to 0 if not defined yet.
6 2023-09-05 Kito Cheng <kito.cheng@sifive.com>
8 * config/riscv/linux.h (TARGET_ASM_FILE_END): Move ...
9 * config/riscv/riscv.cc (TARGET_ASM_FILE_END): to here.
11 2023-09-05 Pan Li <pan2.li@intel.com>
13 * config/riscv/autovec-vls.md (copysign<mode>3): New pattern.
14 * config/riscv/vector.md: Extend iterator for VLS.
16 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
18 * config.gcc: Export the header file lasxintrin.h.
19 * config/loongarch/loongarch-builtins.cc (enum loongarch_builtin_type):
20 Add Loongson ASX builtin functions support.
22 (LASX_BUILTIN): Ditto.
23 (LASX_NO_TARGET_BUILTIN): Ditto.
24 (LASX_BUILTIN_TEST_BRANCH): Ditto.
25 (CODE_FOR_lasx_xvsadd_b): Ditto.
26 (CODE_FOR_lasx_xvsadd_h): Ditto.
27 (CODE_FOR_lasx_xvsadd_w): Ditto.
28 (CODE_FOR_lasx_xvsadd_d): Ditto.
29 (CODE_FOR_lasx_xvsadd_bu): Ditto.
30 (CODE_FOR_lasx_xvsadd_hu): Ditto.
31 (CODE_FOR_lasx_xvsadd_wu): Ditto.
32 (CODE_FOR_lasx_xvsadd_du): Ditto.
33 (CODE_FOR_lasx_xvadd_b): Ditto.
34 (CODE_FOR_lasx_xvadd_h): Ditto.
35 (CODE_FOR_lasx_xvadd_w): Ditto.
36 (CODE_FOR_lasx_xvadd_d): Ditto.
37 (CODE_FOR_lasx_xvaddi_bu): Ditto.
38 (CODE_FOR_lasx_xvaddi_hu): Ditto.
39 (CODE_FOR_lasx_xvaddi_wu): Ditto.
40 (CODE_FOR_lasx_xvaddi_du): Ditto.
41 (CODE_FOR_lasx_xvand_v): Ditto.
42 (CODE_FOR_lasx_xvandi_b): Ditto.
43 (CODE_FOR_lasx_xvbitsel_v): Ditto.
44 (CODE_FOR_lasx_xvseqi_b): Ditto.
45 (CODE_FOR_lasx_xvseqi_h): Ditto.
46 (CODE_FOR_lasx_xvseqi_w): Ditto.
47 (CODE_FOR_lasx_xvseqi_d): Ditto.
48 (CODE_FOR_lasx_xvslti_b): Ditto.
49 (CODE_FOR_lasx_xvslti_h): Ditto.
50 (CODE_FOR_lasx_xvslti_w): Ditto.
51 (CODE_FOR_lasx_xvslti_d): Ditto.
52 (CODE_FOR_lasx_xvslti_bu): Ditto.
53 (CODE_FOR_lasx_xvslti_hu): Ditto.
54 (CODE_FOR_lasx_xvslti_wu): Ditto.
55 (CODE_FOR_lasx_xvslti_du): Ditto.
56 (CODE_FOR_lasx_xvslei_b): Ditto.
57 (CODE_FOR_lasx_xvslei_h): Ditto.
58 (CODE_FOR_lasx_xvslei_w): Ditto.
59 (CODE_FOR_lasx_xvslei_d): Ditto.
60 (CODE_FOR_lasx_xvslei_bu): Ditto.
61 (CODE_FOR_lasx_xvslei_hu): Ditto.
62 (CODE_FOR_lasx_xvslei_wu): Ditto.
63 (CODE_FOR_lasx_xvslei_du): Ditto.
64 (CODE_FOR_lasx_xvdiv_b): Ditto.
65 (CODE_FOR_lasx_xvdiv_h): Ditto.
66 (CODE_FOR_lasx_xvdiv_w): Ditto.
67 (CODE_FOR_lasx_xvdiv_d): Ditto.
68 (CODE_FOR_lasx_xvdiv_bu): Ditto.
69 (CODE_FOR_lasx_xvdiv_hu): Ditto.
70 (CODE_FOR_lasx_xvdiv_wu): Ditto.
71 (CODE_FOR_lasx_xvdiv_du): Ditto.
72 (CODE_FOR_lasx_xvfadd_s): Ditto.
73 (CODE_FOR_lasx_xvfadd_d): Ditto.
74 (CODE_FOR_lasx_xvftintrz_w_s): Ditto.
75 (CODE_FOR_lasx_xvftintrz_l_d): Ditto.
76 (CODE_FOR_lasx_xvftintrz_wu_s): Ditto.
77 (CODE_FOR_lasx_xvftintrz_lu_d): Ditto.
78 (CODE_FOR_lasx_xvffint_s_w): Ditto.
79 (CODE_FOR_lasx_xvffint_d_l): Ditto.
80 (CODE_FOR_lasx_xvffint_s_wu): Ditto.
81 (CODE_FOR_lasx_xvffint_d_lu): Ditto.
82 (CODE_FOR_lasx_xvfsub_s): Ditto.
83 (CODE_FOR_lasx_xvfsub_d): Ditto.
84 (CODE_FOR_lasx_xvfmul_s): Ditto.
85 (CODE_FOR_lasx_xvfmul_d): Ditto.
86 (CODE_FOR_lasx_xvfdiv_s): Ditto.
87 (CODE_FOR_lasx_xvfdiv_d): Ditto.
88 (CODE_FOR_lasx_xvfmax_s): Ditto.
89 (CODE_FOR_lasx_xvfmax_d): Ditto.
90 (CODE_FOR_lasx_xvfmin_s): Ditto.
91 (CODE_FOR_lasx_xvfmin_d): Ditto.
92 (CODE_FOR_lasx_xvfsqrt_s): Ditto.
93 (CODE_FOR_lasx_xvfsqrt_d): Ditto.
94 (CODE_FOR_lasx_xvflogb_s): Ditto.
95 (CODE_FOR_lasx_xvflogb_d): Ditto.
96 (CODE_FOR_lasx_xvmax_b): Ditto.
97 (CODE_FOR_lasx_xvmax_h): Ditto.
98 (CODE_FOR_lasx_xvmax_w): Ditto.
99 (CODE_FOR_lasx_xvmax_d): Ditto.
100 (CODE_FOR_lasx_xvmaxi_b): Ditto.
101 (CODE_FOR_lasx_xvmaxi_h): Ditto.
102 (CODE_FOR_lasx_xvmaxi_w): Ditto.
103 (CODE_FOR_lasx_xvmaxi_d): Ditto.
104 (CODE_FOR_lasx_xvmax_bu): Ditto.
105 (CODE_FOR_lasx_xvmax_hu): Ditto.
106 (CODE_FOR_lasx_xvmax_wu): Ditto.
107 (CODE_FOR_lasx_xvmax_du): Ditto.
108 (CODE_FOR_lasx_xvmaxi_bu): Ditto.
109 (CODE_FOR_lasx_xvmaxi_hu): Ditto.
110 (CODE_FOR_lasx_xvmaxi_wu): Ditto.
111 (CODE_FOR_lasx_xvmaxi_du): Ditto.
112 (CODE_FOR_lasx_xvmin_b): Ditto.
113 (CODE_FOR_lasx_xvmin_h): Ditto.
114 (CODE_FOR_lasx_xvmin_w): Ditto.
115 (CODE_FOR_lasx_xvmin_d): Ditto.
116 (CODE_FOR_lasx_xvmini_b): Ditto.
117 (CODE_FOR_lasx_xvmini_h): Ditto.
118 (CODE_FOR_lasx_xvmini_w): Ditto.
119 (CODE_FOR_lasx_xvmini_d): Ditto.
120 (CODE_FOR_lasx_xvmin_bu): Ditto.
121 (CODE_FOR_lasx_xvmin_hu): Ditto.
122 (CODE_FOR_lasx_xvmin_wu): Ditto.
123 (CODE_FOR_lasx_xvmin_du): Ditto.
124 (CODE_FOR_lasx_xvmini_bu): Ditto.
125 (CODE_FOR_lasx_xvmini_hu): Ditto.
126 (CODE_FOR_lasx_xvmini_wu): Ditto.
127 (CODE_FOR_lasx_xvmini_du): Ditto.
128 (CODE_FOR_lasx_xvmod_b): Ditto.
129 (CODE_FOR_lasx_xvmod_h): Ditto.
130 (CODE_FOR_lasx_xvmod_w): Ditto.
131 (CODE_FOR_lasx_xvmod_d): Ditto.
132 (CODE_FOR_lasx_xvmod_bu): Ditto.
133 (CODE_FOR_lasx_xvmod_hu): Ditto.
134 (CODE_FOR_lasx_xvmod_wu): Ditto.
135 (CODE_FOR_lasx_xvmod_du): Ditto.
136 (CODE_FOR_lasx_xvmul_b): Ditto.
137 (CODE_FOR_lasx_xvmul_h): Ditto.
138 (CODE_FOR_lasx_xvmul_w): Ditto.
139 (CODE_FOR_lasx_xvmul_d): Ditto.
140 (CODE_FOR_lasx_xvclz_b): Ditto.
141 (CODE_FOR_lasx_xvclz_h): Ditto.
142 (CODE_FOR_lasx_xvclz_w): Ditto.
143 (CODE_FOR_lasx_xvclz_d): Ditto.
144 (CODE_FOR_lasx_xvnor_v): Ditto.
145 (CODE_FOR_lasx_xvor_v): Ditto.
146 (CODE_FOR_lasx_xvori_b): Ditto.
147 (CODE_FOR_lasx_xvnori_b): Ditto.
148 (CODE_FOR_lasx_xvpcnt_b): Ditto.
149 (CODE_FOR_lasx_xvpcnt_h): Ditto.
150 (CODE_FOR_lasx_xvpcnt_w): Ditto.
151 (CODE_FOR_lasx_xvpcnt_d): Ditto.
152 (CODE_FOR_lasx_xvxor_v): Ditto.
153 (CODE_FOR_lasx_xvxori_b): Ditto.
154 (CODE_FOR_lasx_xvsll_b): Ditto.
155 (CODE_FOR_lasx_xvsll_h): Ditto.
156 (CODE_FOR_lasx_xvsll_w): Ditto.
157 (CODE_FOR_lasx_xvsll_d): Ditto.
158 (CODE_FOR_lasx_xvslli_b): Ditto.
159 (CODE_FOR_lasx_xvslli_h): Ditto.
160 (CODE_FOR_lasx_xvslli_w): Ditto.
161 (CODE_FOR_lasx_xvslli_d): Ditto.
162 (CODE_FOR_lasx_xvsra_b): Ditto.
163 (CODE_FOR_lasx_xvsra_h): Ditto.
164 (CODE_FOR_lasx_xvsra_w): Ditto.
165 (CODE_FOR_lasx_xvsra_d): Ditto.
166 (CODE_FOR_lasx_xvsrai_b): Ditto.
167 (CODE_FOR_lasx_xvsrai_h): Ditto.
168 (CODE_FOR_lasx_xvsrai_w): Ditto.
169 (CODE_FOR_lasx_xvsrai_d): Ditto.
170 (CODE_FOR_lasx_xvsrl_b): Ditto.
171 (CODE_FOR_lasx_xvsrl_h): Ditto.
172 (CODE_FOR_lasx_xvsrl_w): Ditto.
173 (CODE_FOR_lasx_xvsrl_d): Ditto.
174 (CODE_FOR_lasx_xvsrli_b): Ditto.
175 (CODE_FOR_lasx_xvsrli_h): Ditto.
176 (CODE_FOR_lasx_xvsrli_w): Ditto.
177 (CODE_FOR_lasx_xvsrli_d): Ditto.
178 (CODE_FOR_lasx_xvsub_b): Ditto.
179 (CODE_FOR_lasx_xvsub_h): Ditto.
180 (CODE_FOR_lasx_xvsub_w): Ditto.
181 (CODE_FOR_lasx_xvsub_d): Ditto.
182 (CODE_FOR_lasx_xvsubi_bu): Ditto.
183 (CODE_FOR_lasx_xvsubi_hu): Ditto.
184 (CODE_FOR_lasx_xvsubi_wu): Ditto.
185 (CODE_FOR_lasx_xvsubi_du): Ditto.
186 (CODE_FOR_lasx_xvpackod_d): Ditto.
187 (CODE_FOR_lasx_xvpackev_d): Ditto.
188 (CODE_FOR_lasx_xvpickod_d): Ditto.
189 (CODE_FOR_lasx_xvpickev_d): Ditto.
190 (CODE_FOR_lasx_xvrepli_b): Ditto.
191 (CODE_FOR_lasx_xvrepli_h): Ditto.
192 (CODE_FOR_lasx_xvrepli_w): Ditto.
193 (CODE_FOR_lasx_xvrepli_d): Ditto.
194 (CODE_FOR_lasx_xvandn_v): Ditto.
195 (CODE_FOR_lasx_xvorn_v): Ditto.
196 (CODE_FOR_lasx_xvneg_b): Ditto.
197 (CODE_FOR_lasx_xvneg_h): Ditto.
198 (CODE_FOR_lasx_xvneg_w): Ditto.
199 (CODE_FOR_lasx_xvneg_d): Ditto.
200 (CODE_FOR_lasx_xvbsrl_v): Ditto.
201 (CODE_FOR_lasx_xvbsll_v): Ditto.
202 (CODE_FOR_lasx_xvfmadd_s): Ditto.
203 (CODE_FOR_lasx_xvfmadd_d): Ditto.
204 (CODE_FOR_lasx_xvfmsub_s): Ditto.
205 (CODE_FOR_lasx_xvfmsub_d): Ditto.
206 (CODE_FOR_lasx_xvfnmadd_s): Ditto.
207 (CODE_FOR_lasx_xvfnmadd_d): Ditto.
208 (CODE_FOR_lasx_xvfnmsub_s): Ditto.
209 (CODE_FOR_lasx_xvfnmsub_d): Ditto.
210 (CODE_FOR_lasx_xvpermi_q): Ditto.
211 (CODE_FOR_lasx_xvpermi_d): Ditto.
212 (CODE_FOR_lasx_xbnz_v): Ditto.
213 (CODE_FOR_lasx_xbz_v): Ditto.
214 (CODE_FOR_lasx_xvssub_b): Ditto.
215 (CODE_FOR_lasx_xvssub_h): Ditto.
216 (CODE_FOR_lasx_xvssub_w): Ditto.
217 (CODE_FOR_lasx_xvssub_d): Ditto.
218 (CODE_FOR_lasx_xvssub_bu): Ditto.
219 (CODE_FOR_lasx_xvssub_hu): Ditto.
220 (CODE_FOR_lasx_xvssub_wu): Ditto.
221 (CODE_FOR_lasx_xvssub_du): Ditto.
222 (CODE_FOR_lasx_xvabsd_b): Ditto.
223 (CODE_FOR_lasx_xvabsd_h): Ditto.
224 (CODE_FOR_lasx_xvabsd_w): Ditto.
225 (CODE_FOR_lasx_xvabsd_d): Ditto.
226 (CODE_FOR_lasx_xvabsd_bu): Ditto.
227 (CODE_FOR_lasx_xvabsd_hu): Ditto.
228 (CODE_FOR_lasx_xvabsd_wu): Ditto.
229 (CODE_FOR_lasx_xvabsd_du): Ditto.
230 (CODE_FOR_lasx_xvavg_b): Ditto.
231 (CODE_FOR_lasx_xvavg_h): Ditto.
232 (CODE_FOR_lasx_xvavg_w): Ditto.
233 (CODE_FOR_lasx_xvavg_d): Ditto.
234 (CODE_FOR_lasx_xvavg_bu): Ditto.
235 (CODE_FOR_lasx_xvavg_hu): Ditto.
236 (CODE_FOR_lasx_xvavg_wu): Ditto.
237 (CODE_FOR_lasx_xvavg_du): Ditto.
238 (CODE_FOR_lasx_xvavgr_b): Ditto.
239 (CODE_FOR_lasx_xvavgr_h): Ditto.
240 (CODE_FOR_lasx_xvavgr_w): Ditto.
241 (CODE_FOR_lasx_xvavgr_d): Ditto.
242 (CODE_FOR_lasx_xvavgr_bu): Ditto.
243 (CODE_FOR_lasx_xvavgr_hu): Ditto.
244 (CODE_FOR_lasx_xvavgr_wu): Ditto.
245 (CODE_FOR_lasx_xvavgr_du): Ditto.
246 (CODE_FOR_lasx_xvmuh_b): Ditto.
247 (CODE_FOR_lasx_xvmuh_h): Ditto.
248 (CODE_FOR_lasx_xvmuh_w): Ditto.
249 (CODE_FOR_lasx_xvmuh_d): Ditto.
250 (CODE_FOR_lasx_xvmuh_bu): Ditto.
251 (CODE_FOR_lasx_xvmuh_hu): Ditto.
252 (CODE_FOR_lasx_xvmuh_wu): Ditto.
253 (CODE_FOR_lasx_xvmuh_du): Ditto.
254 (CODE_FOR_lasx_xvssran_b_h): Ditto.
255 (CODE_FOR_lasx_xvssran_h_w): Ditto.
256 (CODE_FOR_lasx_xvssran_w_d): Ditto.
257 (CODE_FOR_lasx_xvssran_bu_h): Ditto.
258 (CODE_FOR_lasx_xvssran_hu_w): Ditto.
259 (CODE_FOR_lasx_xvssran_wu_d): Ditto.
260 (CODE_FOR_lasx_xvssrarn_b_h): Ditto.
261 (CODE_FOR_lasx_xvssrarn_h_w): Ditto.
262 (CODE_FOR_lasx_xvssrarn_w_d): Ditto.
263 (CODE_FOR_lasx_xvssrarn_bu_h): Ditto.
264 (CODE_FOR_lasx_xvssrarn_hu_w): Ditto.
265 (CODE_FOR_lasx_xvssrarn_wu_d): Ditto.
266 (CODE_FOR_lasx_xvssrln_bu_h): Ditto.
267 (CODE_FOR_lasx_xvssrln_hu_w): Ditto.
268 (CODE_FOR_lasx_xvssrln_wu_d): Ditto.
269 (CODE_FOR_lasx_xvssrlrn_bu_h): Ditto.
270 (CODE_FOR_lasx_xvssrlrn_hu_w): Ditto.
271 (CODE_FOR_lasx_xvssrlrn_wu_d): Ditto.
272 (CODE_FOR_lasx_xvftint_w_s): Ditto.
273 (CODE_FOR_lasx_xvftint_l_d): Ditto.
274 (CODE_FOR_lasx_xvftint_wu_s): Ditto.
275 (CODE_FOR_lasx_xvftint_lu_d): Ditto.
276 (CODE_FOR_lasx_xvsllwil_h_b): Ditto.
277 (CODE_FOR_lasx_xvsllwil_w_h): Ditto.
278 (CODE_FOR_lasx_xvsllwil_d_w): Ditto.
279 (CODE_FOR_lasx_xvsllwil_hu_bu): Ditto.
280 (CODE_FOR_lasx_xvsllwil_wu_hu): Ditto.
281 (CODE_FOR_lasx_xvsllwil_du_wu): Ditto.
282 (CODE_FOR_lasx_xvsat_b): Ditto.
283 (CODE_FOR_lasx_xvsat_h): Ditto.
284 (CODE_FOR_lasx_xvsat_w): Ditto.
285 (CODE_FOR_lasx_xvsat_d): Ditto.
286 (CODE_FOR_lasx_xvsat_bu): Ditto.
287 (CODE_FOR_lasx_xvsat_hu): Ditto.
288 (CODE_FOR_lasx_xvsat_wu): Ditto.
289 (CODE_FOR_lasx_xvsat_du): Ditto.
290 (loongarch_builtin_vectorized_function): Ditto.
291 (loongarch_expand_builtin_insn): Ditto.
292 (loongarch_expand_builtin): Ditto.
293 * config/loongarch/loongarch-ftypes.def (1): Ditto.
297 * config/loongarch/lasxintrin.h: New file.
299 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
301 * config/loongarch/loongarch-modes.def
302 (VECTOR_MODES): Add Loongson ASX instruction support.
303 * config/loongarch/loongarch-protos.h (loongarch_split_256bit_move): Ditto.
304 (loongarch_split_256bit_move_p): Ditto.
305 (loongarch_expand_vector_group_init): Ditto.
306 (loongarch_expand_vec_perm_1): Ditto.
307 * config/loongarch/loongarch.cc (loongarch_symbol_insns): Ditto.
308 (loongarch_valid_offset_p): Ditto.
309 (loongarch_address_insns): Ditto.
310 (loongarch_const_insns): Ditto.
311 (loongarch_legitimize_move): Ditto.
312 (loongarch_builtin_vectorization_cost): Ditto.
313 (loongarch_split_move_p): Ditto.
314 (loongarch_split_move): Ditto.
315 (loongarch_output_move_index_float): Ditto.
316 (loongarch_split_256bit_move_p): Ditto.
317 (loongarch_split_256bit_move): Ditto.
318 (loongarch_output_move): Ditto.
319 (loongarch_print_operand_reloc): Ditto.
320 (loongarch_print_operand): Ditto.
321 (loongarch_hard_regno_mode_ok_uncached): Ditto.
322 (loongarch_hard_regno_nregs): Ditto.
323 (loongarch_class_max_nregs): Ditto.
324 (loongarch_can_change_mode_class): Ditto.
325 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
326 (loongarch_vector_mode_supported_p): Ditto.
327 (loongarch_preferred_simd_mode): Ditto.
328 (loongarch_autovectorize_vector_modes): Ditto.
329 (loongarch_lsx_output_division): Ditto.
330 (loongarch_expand_lsx_shuffle): Ditto.
331 (loongarch_expand_vec_perm): Ditto.
332 (loongarch_expand_vec_perm_interleave): Ditto.
333 (loongarch_try_expand_lsx_vshuf_const): Ditto.
334 (loongarch_expand_vec_perm_even_odd_1): Ditto.
335 (loongarch_expand_vec_perm_even_odd): Ditto.
336 (loongarch_expand_vec_perm_1): Ditto.
337 (loongarch_expand_vec_perm_const_2): Ditto.
338 (loongarch_is_quad_duplicate): Ditto.
339 (loongarch_is_double_duplicate): Ditto.
340 (loongarch_is_odd_extraction): Ditto.
341 (loongarch_is_even_extraction): Ditto.
342 (loongarch_is_extraction_permutation): Ditto.
343 (loongarch_is_center_extraction): Ditto.
344 (loongarch_is_reversing_permutation): Ditto.
345 (loongarch_is_di_misalign_extract): Ditto.
346 (loongarch_is_si_misalign_extract): Ditto.
347 (loongarch_is_lasx_lowpart_interleave): Ditto.
348 (loongarch_is_lasx_lowpart_interleave_2): Ditto.
349 (COMPARE_SELECTOR): Ditto.
350 (loongarch_is_lasx_lowpart_extract): Ditto.
351 (loongarch_is_lasx_highpart_interleave): Ditto.
352 (loongarch_is_lasx_highpart_interleave_2): Ditto.
353 (loongarch_is_elem_duplicate): Ditto.
354 (loongarch_is_op_reverse_perm): Ditto.
355 (loongarch_is_single_op_perm): Ditto.
356 (loongarch_is_divisible_perm): Ditto.
357 (loongarch_is_triple_stride_extract): Ditto.
358 (loongarch_vectorize_vec_perm_const): Ditto.
359 (loongarch_cpu_sched_reassociation_width): Ditto.
360 (loongarch_expand_vector_extract): Ditto.
361 (emit_reduc_half): Ditto.
362 (loongarch_expand_vec_unpack): Ditto.
363 (loongarch_expand_vector_group_init): Ditto.
364 (loongarch_expand_vector_init): Ditto.
365 (loongarch_expand_lsx_cmp): Ditto.
366 (loongarch_builtin_support_vector_misalignment): Ditto.
367 * config/loongarch/loongarch.h (UNITS_PER_LASX_REG): Ditto.
368 (BITS_PER_LASX_REG): Ditto.
369 (STRUCTURE_SIZE_BOUNDARY): Ditto.
370 (LASX_REG_FIRST): Ditto.
371 (LASX_REG_LAST): Ditto.
372 (LASX_REG_NUM): Ditto.
374 (LASX_REG_RTX_P): Ditto.
375 (LASX_SUPPORTED_MODE_P): Ditto.
376 * config/loongarch/loongarch.md: Ditto.
377 * config/loongarch/lasx.md: New file.
379 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
381 * config.gcc: Export the header file lsxintrin.h.
382 * config/loongarch/loongarch-builtins.cc (LARCH_FTYPE_NAME4): Add builtin function support.
383 (enum loongarch_builtin_type): Ditto.
385 (LARCH_BUILTIN): Ditto.
386 (LSX_BUILTIN): Ditto.
387 (LSX_BUILTIN_TEST_BRANCH): Ditto.
388 (LSX_NO_TARGET_BUILTIN): Ditto.
389 (CODE_FOR_lsx_vsadd_b): Ditto.
390 (CODE_FOR_lsx_vsadd_h): Ditto.
391 (CODE_FOR_lsx_vsadd_w): Ditto.
392 (CODE_FOR_lsx_vsadd_d): Ditto.
393 (CODE_FOR_lsx_vsadd_bu): Ditto.
394 (CODE_FOR_lsx_vsadd_hu): Ditto.
395 (CODE_FOR_lsx_vsadd_wu): Ditto.
396 (CODE_FOR_lsx_vsadd_du): Ditto.
397 (CODE_FOR_lsx_vadd_b): Ditto.
398 (CODE_FOR_lsx_vadd_h): Ditto.
399 (CODE_FOR_lsx_vadd_w): Ditto.
400 (CODE_FOR_lsx_vadd_d): Ditto.
401 (CODE_FOR_lsx_vaddi_bu): Ditto.
402 (CODE_FOR_lsx_vaddi_hu): Ditto.
403 (CODE_FOR_lsx_vaddi_wu): Ditto.
404 (CODE_FOR_lsx_vaddi_du): Ditto.
405 (CODE_FOR_lsx_vand_v): Ditto.
406 (CODE_FOR_lsx_vandi_b): Ditto.
407 (CODE_FOR_lsx_bnz_v): Ditto.
408 (CODE_FOR_lsx_bz_v): Ditto.
409 (CODE_FOR_lsx_vbitsel_v): Ditto.
410 (CODE_FOR_lsx_vseqi_b): Ditto.
411 (CODE_FOR_lsx_vseqi_h): Ditto.
412 (CODE_FOR_lsx_vseqi_w): Ditto.
413 (CODE_FOR_lsx_vseqi_d): Ditto.
414 (CODE_FOR_lsx_vslti_b): Ditto.
415 (CODE_FOR_lsx_vslti_h): Ditto.
416 (CODE_FOR_lsx_vslti_w): Ditto.
417 (CODE_FOR_lsx_vslti_d): Ditto.
418 (CODE_FOR_lsx_vslti_bu): Ditto.
419 (CODE_FOR_lsx_vslti_hu): Ditto.
420 (CODE_FOR_lsx_vslti_wu): Ditto.
421 (CODE_FOR_lsx_vslti_du): Ditto.
422 (CODE_FOR_lsx_vslei_b): Ditto.
423 (CODE_FOR_lsx_vslei_h): Ditto.
424 (CODE_FOR_lsx_vslei_w): Ditto.
425 (CODE_FOR_lsx_vslei_d): Ditto.
426 (CODE_FOR_lsx_vslei_bu): Ditto.
427 (CODE_FOR_lsx_vslei_hu): Ditto.
428 (CODE_FOR_lsx_vslei_wu): Ditto.
429 (CODE_FOR_lsx_vslei_du): Ditto.
430 (CODE_FOR_lsx_vdiv_b): Ditto.
431 (CODE_FOR_lsx_vdiv_h): Ditto.
432 (CODE_FOR_lsx_vdiv_w): Ditto.
433 (CODE_FOR_lsx_vdiv_d): Ditto.
434 (CODE_FOR_lsx_vdiv_bu): Ditto.
435 (CODE_FOR_lsx_vdiv_hu): Ditto.
436 (CODE_FOR_lsx_vdiv_wu): Ditto.
437 (CODE_FOR_lsx_vdiv_du): Ditto.
438 (CODE_FOR_lsx_vfadd_s): Ditto.
439 (CODE_FOR_lsx_vfadd_d): Ditto.
440 (CODE_FOR_lsx_vftintrz_w_s): Ditto.
441 (CODE_FOR_lsx_vftintrz_l_d): Ditto.
442 (CODE_FOR_lsx_vftintrz_wu_s): Ditto.
443 (CODE_FOR_lsx_vftintrz_lu_d): Ditto.
444 (CODE_FOR_lsx_vffint_s_w): Ditto.
445 (CODE_FOR_lsx_vffint_d_l): Ditto.
446 (CODE_FOR_lsx_vffint_s_wu): Ditto.
447 (CODE_FOR_lsx_vffint_d_lu): Ditto.
448 (CODE_FOR_lsx_vfsub_s): Ditto.
449 (CODE_FOR_lsx_vfsub_d): Ditto.
450 (CODE_FOR_lsx_vfmul_s): Ditto.
451 (CODE_FOR_lsx_vfmul_d): Ditto.
452 (CODE_FOR_lsx_vfdiv_s): Ditto.
453 (CODE_FOR_lsx_vfdiv_d): Ditto.
454 (CODE_FOR_lsx_vfmax_s): Ditto.
455 (CODE_FOR_lsx_vfmax_d): Ditto.
456 (CODE_FOR_lsx_vfmin_s): Ditto.
457 (CODE_FOR_lsx_vfmin_d): Ditto.
458 (CODE_FOR_lsx_vfsqrt_s): Ditto.
459 (CODE_FOR_lsx_vfsqrt_d): Ditto.
460 (CODE_FOR_lsx_vflogb_s): Ditto.
461 (CODE_FOR_lsx_vflogb_d): Ditto.
462 (CODE_FOR_lsx_vmax_b): Ditto.
463 (CODE_FOR_lsx_vmax_h): Ditto.
464 (CODE_FOR_lsx_vmax_w): Ditto.
465 (CODE_FOR_lsx_vmax_d): Ditto.
466 (CODE_FOR_lsx_vmaxi_b): Ditto.
467 (CODE_FOR_lsx_vmaxi_h): Ditto.
468 (CODE_FOR_lsx_vmaxi_w): Ditto.
469 (CODE_FOR_lsx_vmaxi_d): Ditto.
470 (CODE_FOR_lsx_vmax_bu): Ditto.
471 (CODE_FOR_lsx_vmax_hu): Ditto.
472 (CODE_FOR_lsx_vmax_wu): Ditto.
473 (CODE_FOR_lsx_vmax_du): Ditto.
474 (CODE_FOR_lsx_vmaxi_bu): Ditto.
475 (CODE_FOR_lsx_vmaxi_hu): Ditto.
476 (CODE_FOR_lsx_vmaxi_wu): Ditto.
477 (CODE_FOR_lsx_vmaxi_du): Ditto.
478 (CODE_FOR_lsx_vmin_b): Ditto.
479 (CODE_FOR_lsx_vmin_h): Ditto.
480 (CODE_FOR_lsx_vmin_w): Ditto.
481 (CODE_FOR_lsx_vmin_d): Ditto.
482 (CODE_FOR_lsx_vmini_b): Ditto.
483 (CODE_FOR_lsx_vmini_h): Ditto.
484 (CODE_FOR_lsx_vmini_w): Ditto.
485 (CODE_FOR_lsx_vmini_d): Ditto.
486 (CODE_FOR_lsx_vmin_bu): Ditto.
487 (CODE_FOR_lsx_vmin_hu): Ditto.
488 (CODE_FOR_lsx_vmin_wu): Ditto.
489 (CODE_FOR_lsx_vmin_du): Ditto.
490 (CODE_FOR_lsx_vmini_bu): Ditto.
491 (CODE_FOR_lsx_vmini_hu): Ditto.
492 (CODE_FOR_lsx_vmini_wu): Ditto.
493 (CODE_FOR_lsx_vmini_du): Ditto.
494 (CODE_FOR_lsx_vmod_b): Ditto.
495 (CODE_FOR_lsx_vmod_h): Ditto.
496 (CODE_FOR_lsx_vmod_w): Ditto.
497 (CODE_FOR_lsx_vmod_d): Ditto.
498 (CODE_FOR_lsx_vmod_bu): Ditto.
499 (CODE_FOR_lsx_vmod_hu): Ditto.
500 (CODE_FOR_lsx_vmod_wu): Ditto.
501 (CODE_FOR_lsx_vmod_du): Ditto.
502 (CODE_FOR_lsx_vmul_b): Ditto.
503 (CODE_FOR_lsx_vmul_h): Ditto.
504 (CODE_FOR_lsx_vmul_w): Ditto.
505 (CODE_FOR_lsx_vmul_d): Ditto.
506 (CODE_FOR_lsx_vclz_b): Ditto.
507 (CODE_FOR_lsx_vclz_h): Ditto.
508 (CODE_FOR_lsx_vclz_w): Ditto.
509 (CODE_FOR_lsx_vclz_d): Ditto.
510 (CODE_FOR_lsx_vnor_v): Ditto.
511 (CODE_FOR_lsx_vor_v): Ditto.
512 (CODE_FOR_lsx_vori_b): Ditto.
513 (CODE_FOR_lsx_vnori_b): Ditto.
514 (CODE_FOR_lsx_vpcnt_b): Ditto.
515 (CODE_FOR_lsx_vpcnt_h): Ditto.
516 (CODE_FOR_lsx_vpcnt_w): Ditto.
517 (CODE_FOR_lsx_vpcnt_d): Ditto.
518 (CODE_FOR_lsx_vxor_v): Ditto.
519 (CODE_FOR_lsx_vxori_b): Ditto.
520 (CODE_FOR_lsx_vsll_b): Ditto.
521 (CODE_FOR_lsx_vsll_h): Ditto.
522 (CODE_FOR_lsx_vsll_w): Ditto.
523 (CODE_FOR_lsx_vsll_d): Ditto.
524 (CODE_FOR_lsx_vslli_b): Ditto.
525 (CODE_FOR_lsx_vslli_h): Ditto.
526 (CODE_FOR_lsx_vslli_w): Ditto.
527 (CODE_FOR_lsx_vslli_d): Ditto.
528 (CODE_FOR_lsx_vsra_b): Ditto.
529 (CODE_FOR_lsx_vsra_h): Ditto.
530 (CODE_FOR_lsx_vsra_w): Ditto.
531 (CODE_FOR_lsx_vsra_d): Ditto.
532 (CODE_FOR_lsx_vsrai_b): Ditto.
533 (CODE_FOR_lsx_vsrai_h): Ditto.
534 (CODE_FOR_lsx_vsrai_w): Ditto.
535 (CODE_FOR_lsx_vsrai_d): Ditto.
536 (CODE_FOR_lsx_vsrl_b): Ditto.
537 (CODE_FOR_lsx_vsrl_h): Ditto.
538 (CODE_FOR_lsx_vsrl_w): Ditto.
539 (CODE_FOR_lsx_vsrl_d): Ditto.
540 (CODE_FOR_lsx_vsrli_b): Ditto.
541 (CODE_FOR_lsx_vsrli_h): Ditto.
542 (CODE_FOR_lsx_vsrli_w): Ditto.
543 (CODE_FOR_lsx_vsrli_d): Ditto.
544 (CODE_FOR_lsx_vsub_b): Ditto.
545 (CODE_FOR_lsx_vsub_h): Ditto.
546 (CODE_FOR_lsx_vsub_w): Ditto.
547 (CODE_FOR_lsx_vsub_d): Ditto.
548 (CODE_FOR_lsx_vsubi_bu): Ditto.
549 (CODE_FOR_lsx_vsubi_hu): Ditto.
550 (CODE_FOR_lsx_vsubi_wu): Ditto.
551 (CODE_FOR_lsx_vsubi_du): Ditto.
552 (CODE_FOR_lsx_vpackod_d): Ditto.
553 (CODE_FOR_lsx_vpackev_d): Ditto.
554 (CODE_FOR_lsx_vpickod_d): Ditto.
555 (CODE_FOR_lsx_vpickev_d): Ditto.
556 (CODE_FOR_lsx_vrepli_b): Ditto.
557 (CODE_FOR_lsx_vrepli_h): Ditto.
558 (CODE_FOR_lsx_vrepli_w): Ditto.
559 (CODE_FOR_lsx_vrepli_d): Ditto.
560 (CODE_FOR_lsx_vsat_b): Ditto.
561 (CODE_FOR_lsx_vsat_h): Ditto.
562 (CODE_FOR_lsx_vsat_w): Ditto.
563 (CODE_FOR_lsx_vsat_d): Ditto.
564 (CODE_FOR_lsx_vsat_bu): Ditto.
565 (CODE_FOR_lsx_vsat_hu): Ditto.
566 (CODE_FOR_lsx_vsat_wu): Ditto.
567 (CODE_FOR_lsx_vsat_du): Ditto.
568 (CODE_FOR_lsx_vavg_b): Ditto.
569 (CODE_FOR_lsx_vavg_h): Ditto.
570 (CODE_FOR_lsx_vavg_w): Ditto.
571 (CODE_FOR_lsx_vavg_d): Ditto.
572 (CODE_FOR_lsx_vavg_bu): Ditto.
573 (CODE_FOR_lsx_vavg_hu): Ditto.
574 (CODE_FOR_lsx_vavg_wu): Ditto.
575 (CODE_FOR_lsx_vavg_du): Ditto.
576 (CODE_FOR_lsx_vavgr_b): Ditto.
577 (CODE_FOR_lsx_vavgr_h): Ditto.
578 (CODE_FOR_lsx_vavgr_w): Ditto.
579 (CODE_FOR_lsx_vavgr_d): Ditto.
580 (CODE_FOR_lsx_vavgr_bu): Ditto.
581 (CODE_FOR_lsx_vavgr_hu): Ditto.
582 (CODE_FOR_lsx_vavgr_wu): Ditto.
583 (CODE_FOR_lsx_vavgr_du): Ditto.
584 (CODE_FOR_lsx_vssub_b): Ditto.
585 (CODE_FOR_lsx_vssub_h): Ditto.
586 (CODE_FOR_lsx_vssub_w): Ditto.
587 (CODE_FOR_lsx_vssub_d): Ditto.
588 (CODE_FOR_lsx_vssub_bu): Ditto.
589 (CODE_FOR_lsx_vssub_hu): Ditto.
590 (CODE_FOR_lsx_vssub_wu): Ditto.
591 (CODE_FOR_lsx_vssub_du): Ditto.
592 (CODE_FOR_lsx_vabsd_b): Ditto.
593 (CODE_FOR_lsx_vabsd_h): Ditto.
594 (CODE_FOR_lsx_vabsd_w): Ditto.
595 (CODE_FOR_lsx_vabsd_d): Ditto.
596 (CODE_FOR_lsx_vabsd_bu): Ditto.
597 (CODE_FOR_lsx_vabsd_hu): Ditto.
598 (CODE_FOR_lsx_vabsd_wu): Ditto.
599 (CODE_FOR_lsx_vabsd_du): Ditto.
600 (CODE_FOR_lsx_vftint_w_s): Ditto.
601 (CODE_FOR_lsx_vftint_l_d): Ditto.
602 (CODE_FOR_lsx_vftint_wu_s): Ditto.
603 (CODE_FOR_lsx_vftint_lu_d): Ditto.
604 (CODE_FOR_lsx_vandn_v): Ditto.
605 (CODE_FOR_lsx_vorn_v): Ditto.
606 (CODE_FOR_lsx_vneg_b): Ditto.
607 (CODE_FOR_lsx_vneg_h): Ditto.
608 (CODE_FOR_lsx_vneg_w): Ditto.
609 (CODE_FOR_lsx_vneg_d): Ditto.
610 (CODE_FOR_lsx_vshuf4i_d): Ditto.
611 (CODE_FOR_lsx_vbsrl_v): Ditto.
612 (CODE_FOR_lsx_vbsll_v): Ditto.
613 (CODE_FOR_lsx_vfmadd_s): Ditto.
614 (CODE_FOR_lsx_vfmadd_d): Ditto.
615 (CODE_FOR_lsx_vfmsub_s): Ditto.
616 (CODE_FOR_lsx_vfmsub_d): Ditto.
617 (CODE_FOR_lsx_vfnmadd_s): Ditto.
618 (CODE_FOR_lsx_vfnmadd_d): Ditto.
619 (CODE_FOR_lsx_vfnmsub_s): Ditto.
620 (CODE_FOR_lsx_vfnmsub_d): Ditto.
621 (CODE_FOR_lsx_vmuh_b): Ditto.
622 (CODE_FOR_lsx_vmuh_h): Ditto.
623 (CODE_FOR_lsx_vmuh_w): Ditto.
624 (CODE_FOR_lsx_vmuh_d): Ditto.
625 (CODE_FOR_lsx_vmuh_bu): Ditto.
626 (CODE_FOR_lsx_vmuh_hu): Ditto.
627 (CODE_FOR_lsx_vmuh_wu): Ditto.
628 (CODE_FOR_lsx_vmuh_du): Ditto.
629 (CODE_FOR_lsx_vsllwil_h_b): Ditto.
630 (CODE_FOR_lsx_vsllwil_w_h): Ditto.
631 (CODE_FOR_lsx_vsllwil_d_w): Ditto.
632 (CODE_FOR_lsx_vsllwil_hu_bu): Ditto.
633 (CODE_FOR_lsx_vsllwil_wu_hu): Ditto.
634 (CODE_FOR_lsx_vsllwil_du_wu): Ditto.
635 (CODE_FOR_lsx_vssran_b_h): Ditto.
636 (CODE_FOR_lsx_vssran_h_w): Ditto.
637 (CODE_FOR_lsx_vssran_w_d): Ditto.
638 (CODE_FOR_lsx_vssran_bu_h): Ditto.
639 (CODE_FOR_lsx_vssran_hu_w): Ditto.
640 (CODE_FOR_lsx_vssran_wu_d): Ditto.
641 (CODE_FOR_lsx_vssrarn_b_h): Ditto.
642 (CODE_FOR_lsx_vssrarn_h_w): Ditto.
643 (CODE_FOR_lsx_vssrarn_w_d): Ditto.
644 (CODE_FOR_lsx_vssrarn_bu_h): Ditto.
645 (CODE_FOR_lsx_vssrarn_hu_w): Ditto.
646 (CODE_FOR_lsx_vssrarn_wu_d): Ditto.
647 (CODE_FOR_lsx_vssrln_bu_h): Ditto.
648 (CODE_FOR_lsx_vssrln_hu_w): Ditto.
649 (CODE_FOR_lsx_vssrln_wu_d): Ditto.
650 (CODE_FOR_lsx_vssrlrn_bu_h): Ditto.
651 (CODE_FOR_lsx_vssrlrn_hu_w): Ditto.
652 (CODE_FOR_lsx_vssrlrn_wu_d): Ditto.
653 (loongarch_builtin_vector_type): Ditto.
654 (loongarch_build_cvpointer_type): Ditto.
655 (LARCH_ATYPE_CVPOINTER): Ditto.
656 (LARCH_ATYPE_BOOLEAN): Ditto.
657 (LARCH_ATYPE_V2SF): Ditto.
658 (LARCH_ATYPE_V2HI): Ditto.
659 (LARCH_ATYPE_V2SI): Ditto.
660 (LARCH_ATYPE_V4QI): Ditto.
661 (LARCH_ATYPE_V4HI): Ditto.
662 (LARCH_ATYPE_V8QI): Ditto.
663 (LARCH_ATYPE_V2DI): Ditto.
664 (LARCH_ATYPE_V4SI): Ditto.
665 (LARCH_ATYPE_V8HI): Ditto.
666 (LARCH_ATYPE_V16QI): Ditto.
667 (LARCH_ATYPE_V2DF): Ditto.
668 (LARCH_ATYPE_V4SF): Ditto.
669 (LARCH_ATYPE_V4DI): Ditto.
670 (LARCH_ATYPE_V8SI): Ditto.
671 (LARCH_ATYPE_V16HI): Ditto.
672 (LARCH_ATYPE_V32QI): Ditto.
673 (LARCH_ATYPE_V4DF): Ditto.
674 (LARCH_ATYPE_V8SF): Ditto.
675 (LARCH_ATYPE_UV2DI): Ditto.
676 (LARCH_ATYPE_UV4SI): Ditto.
677 (LARCH_ATYPE_UV8HI): Ditto.
678 (LARCH_ATYPE_UV16QI): Ditto.
679 (LARCH_ATYPE_UV4DI): Ditto.
680 (LARCH_ATYPE_UV8SI): Ditto.
681 (LARCH_ATYPE_UV16HI): Ditto.
682 (LARCH_ATYPE_UV32QI): Ditto.
683 (LARCH_ATYPE_UV2SI): Ditto.
684 (LARCH_ATYPE_UV4HI): Ditto.
685 (LARCH_ATYPE_UV8QI): Ditto.
686 (loongarch_builtin_vectorized_function): Ditto.
687 (LARCH_GET_BUILTIN): Ditto.
688 (loongarch_expand_builtin_insn): Ditto.
689 (loongarch_expand_builtin_lsx_test_branch): Ditto.
690 (loongarch_expand_builtin): Ditto.
691 * config/loongarch/loongarch-ftypes.def (1): Ditto.
695 * config/loongarch/lsxintrin.h: New file.
697 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
699 * config/loongarch/constraints.md (M): Add Loongson LSX base instruction support.
719 * config/loongarch/genopts/loongarch.opt.in: Ditto.
720 * config/loongarch/loongarch-builtins.cc (loongarch_gen_const_int_vector): Ditto.
721 * config/loongarch/loongarch-modes.def (VECTOR_MODES): Ditto.
722 (VECTOR_MODE): Ditto.
724 * config/loongarch/loongarch-protos.h (loongarch_split_move_insn_p): Ditto.
725 (loongarch_split_move_insn): Ditto.
726 (loongarch_split_128bit_move): Ditto.
727 (loongarch_split_128bit_move_p): Ditto.
728 (loongarch_split_lsx_copy_d): Ditto.
729 (loongarch_split_lsx_insert_d): Ditto.
730 (loongarch_split_lsx_fill_d): Ditto.
731 (loongarch_expand_vec_cmp): Ditto.
732 (loongarch_const_vector_same_val_p): Ditto.
733 (loongarch_const_vector_same_bytes_p): Ditto.
734 (loongarch_const_vector_same_int_p): Ditto.
735 (loongarch_const_vector_shuffle_set_p): Ditto.
736 (loongarch_const_vector_bitimm_set_p): Ditto.
737 (loongarch_const_vector_bitimm_clr_p): Ditto.
738 (loongarch_lsx_vec_parallel_const_half): Ditto.
739 (loongarch_gen_const_int_vector): Ditto.
740 (loongarch_lsx_output_division): Ditto.
741 (loongarch_expand_vector_init): Ditto.
742 (loongarch_expand_vec_unpack): Ditto.
743 (loongarch_expand_vec_perm): Ditto.
744 (loongarch_expand_vector_extract): Ditto.
745 (loongarch_expand_vector_reduc): Ditto.
746 (loongarch_ldst_scaled_shift): Ditto.
747 (loongarch_expand_vec_cond_expr): Ditto.
748 (loongarch_expand_vec_cond_mask_expr): Ditto.
749 (loongarch_builtin_vectorized_function): Ditto.
750 (loongarch_gen_const_int_vector_shuffle): Ditto.
751 (loongarch_build_signbit_mask): Ditto.
752 * config/loongarch/loongarch.cc (loongarch_pass_aggregate_num_fpr): Ditto.
753 (loongarch_setup_incoming_varargs): Ditto.
754 (loongarch_emit_move): Ditto.
755 (loongarch_const_vector_bitimm_set_p): Ditto.
756 (loongarch_const_vector_bitimm_clr_p): Ditto.
757 (loongarch_const_vector_same_val_p): Ditto.
758 (loongarch_const_vector_same_bytes_p): Ditto.
759 (loongarch_const_vector_same_int_p): Ditto.
760 (loongarch_const_vector_shuffle_set_p): Ditto.
761 (loongarch_symbol_insns): Ditto.
762 (loongarch_cannot_force_const_mem): Ditto.
763 (loongarch_valid_offset_p): Ditto.
764 (loongarch_valid_index_p): Ditto.
765 (loongarch_classify_address): Ditto.
766 (loongarch_address_insns): Ditto.
767 (loongarch_ldst_scaled_shift): Ditto.
768 (loongarch_const_insns): Ditto.
769 (loongarch_split_move_insn_p): Ditto.
770 (loongarch_subword_at_byte): Ditto.
771 (loongarch_legitimize_move): Ditto.
772 (loongarch_builtin_vectorization_cost): Ditto.
773 (loongarch_split_move_p): Ditto.
774 (loongarch_split_move): Ditto.
775 (loongarch_split_move_insn): Ditto.
776 (loongarch_output_move_index_float): Ditto.
777 (loongarch_split_128bit_move_p): Ditto.
778 (loongarch_split_128bit_move): Ditto.
779 (loongarch_split_lsx_copy_d): Ditto.
780 (loongarch_split_lsx_insert_d): Ditto.
781 (loongarch_split_lsx_fill_d): Ditto.
782 (loongarch_output_move): Ditto.
783 (loongarch_extend_comparands): Ditto.
784 (loongarch_print_operand_reloc): Ditto.
785 (loongarch_print_operand): Ditto.
786 (loongarch_hard_regno_mode_ok_uncached): Ditto.
787 (loongarch_hard_regno_call_part_clobbered): Ditto.
788 (loongarch_hard_regno_nregs): Ditto.
789 (loongarch_class_max_nregs): Ditto.
790 (loongarch_can_change_mode_class): Ditto.
791 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
792 (loongarch_secondary_reload): Ditto.
793 (loongarch_vector_mode_supported_p): Ditto.
794 (loongarch_preferred_simd_mode): Ditto.
795 (loongarch_autovectorize_vector_modes): Ditto.
796 (loongarch_lsx_output_division): Ditto.
797 (loongarch_option_override_internal): Ditto.
798 (loongarch_hard_regno_caller_save_mode): Ditto.
799 (MAX_VECT_LEN): Ditto.
800 (loongarch_spill_class): Ditto.
801 (struct expand_vec_perm_d): Ditto.
802 (loongarch_promote_function_mode): Ditto.
803 (loongarch_expand_vselect): Ditto.
804 (loongarch_starting_frame_offset): Ditto.
805 (loongarch_expand_vselect_vconcat): Ditto.
806 (TARGET_ASM_ALIGNED_DI_OP): Ditto.
807 (TARGET_OPTION_OVERRIDE): Ditto.
808 (TARGET_LEGITIMIZE_ADDRESS): Ditto.
809 (TARGET_ASM_SELECT_RTX_SECTION): Ditto.
810 (TARGET_ASM_FUNCTION_RODATA_SECTION): Ditto.
811 (loongarch_expand_lsx_shuffle): Ditto.
812 (TARGET_SCHED_INIT): Ditto.
813 (TARGET_SCHED_REORDER): Ditto.
814 (TARGET_SCHED_REORDER2): Ditto.
815 (TARGET_SCHED_VARIABLE_ISSUE): Ditto.
816 (TARGET_SCHED_ADJUST_COST): Ditto.
817 (TARGET_SCHED_ISSUE_RATE): Ditto.
818 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Ditto.
819 (TARGET_FUNCTION_OK_FOR_SIBCALL): Ditto.
820 (TARGET_VALID_POINTER_MODE): Ditto.
821 (TARGET_REGISTER_MOVE_COST): Ditto.
822 (TARGET_MEMORY_MOVE_COST): Ditto.
823 (TARGET_RTX_COSTS): Ditto.
824 (TARGET_ADDRESS_COST): Ditto.
825 (TARGET_IN_SMALL_DATA_P): Ditto.
826 (TARGET_PREFERRED_RELOAD_CLASS): Ditto.
827 (TARGET_ASM_FILE_START_FILE_DIRECTIVE): Ditto.
828 (TARGET_EXPAND_BUILTIN_VA_START): Ditto.
829 (loongarch_expand_vec_perm): Ditto.
830 (TARGET_PROMOTE_FUNCTION_MODE): Ditto.
831 (TARGET_RETURN_IN_MEMORY): Ditto.
832 (TARGET_FUNCTION_VALUE): Ditto.
833 (TARGET_LIBCALL_VALUE): Ditto.
834 (loongarch_try_expand_lsx_vshuf_const): Ditto.
835 (TARGET_ASM_OUTPUT_MI_THUNK): Ditto.
836 (TARGET_ASM_CAN_OUTPUT_MI_THUNK): Ditto.
837 (TARGET_PRINT_OPERAND): Ditto.
838 (TARGET_PRINT_OPERAND_ADDRESS): Ditto.
839 (TARGET_PRINT_OPERAND_PUNCT_VALID_P): Ditto.
840 (TARGET_SETUP_INCOMING_VARARGS): Ditto.
841 (TARGET_STRICT_ARGUMENT_NAMING): Ditto.
842 (TARGET_MUST_PASS_IN_STACK): Ditto.
843 (TARGET_PASS_BY_REFERENCE): Ditto.
844 (TARGET_ARG_PARTIAL_BYTES): Ditto.
845 (TARGET_FUNCTION_ARG): Ditto.
846 (TARGET_FUNCTION_ARG_ADVANCE): Ditto.
847 (TARGET_FUNCTION_ARG_BOUNDARY): Ditto.
848 (TARGET_SCALAR_MODE_SUPPORTED_P): Ditto.
849 (TARGET_INIT_BUILTINS): Ditto.
850 (loongarch_expand_vec_perm_const_1): Ditto.
851 (loongarch_expand_vec_perm_const_2): Ditto.
852 (loongarch_vectorize_vec_perm_const): Ditto.
853 (loongarch_cpu_sched_reassociation_width): Ditto.
854 (loongarch_sched_reassociation_width): Ditto.
855 (loongarch_expand_vector_extract): Ditto.
856 (emit_reduc_half): Ditto.
857 (loongarch_expand_vector_reduc): Ditto.
858 (loongarch_expand_vec_unpack): Ditto.
859 (loongarch_lsx_vec_parallel_const_half): Ditto.
860 (loongarch_constant_elt_p): Ditto.
861 (loongarch_gen_const_int_vector_shuffle): Ditto.
862 (loongarch_expand_vector_init): Ditto.
863 (loongarch_expand_lsx_cmp): Ditto.
864 (loongarch_expand_vec_cond_expr): Ditto.
865 (loongarch_expand_vec_cond_mask_expr): Ditto.
866 (loongarch_expand_vec_cmp): Ditto.
867 (loongarch_case_values_threshold): Ditto.
868 (loongarch_build_const_vector): Ditto.
869 (loongarch_build_signbit_mask): Ditto.
870 (loongarch_builtin_support_vector_misalignment): Ditto.
871 (TARGET_ASM_ALIGNED_HI_OP): Ditto.
872 (TARGET_ASM_ALIGNED_SI_OP): Ditto.
873 (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): Ditto.
874 (TARGET_VECTOR_MODE_SUPPORTED_P): Ditto.
875 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): Ditto.
876 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Ditto.
877 (TARGET_VECTORIZE_VEC_PERM_CONST): Ditto.
878 (TARGET_SCHED_REASSOCIATION_WIDTH): Ditto.
879 (TARGET_CASE_VALUES_THRESHOLD): Ditto.
880 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Ditto.
881 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
882 * config/loongarch/loongarch.h (TARGET_SUPPORTS_WIDE_INT): Ditto.
883 (UNITS_PER_LSX_REG): Ditto.
884 (BITS_PER_LSX_REG): Ditto.
885 (BIGGEST_ALIGNMENT): Ditto.
886 (LSX_REG_FIRST): Ditto.
887 (LSX_REG_LAST): Ditto.
888 (LSX_REG_NUM): Ditto.
890 (LSX_REG_RTX_P): Ditto.
891 (IMM13_OPERAND): Ditto.
892 (LSX_SUPPORTED_MODE_P): Ditto.
893 * config/loongarch/loongarch.md (unknown,add,sub,not,nor,and,or,xor): Ditto.
894 (unknown,add,sub,not,nor,and,or,xor,simd_add): Ditto.
895 (unknown,none,QI,HI,SI,DI,TI,SF,DF,TF,FCC): Ditto.
902 * config/loongarch/loongarch.opt: Ditto.
903 * config/loongarch/predicates.md (const_lsx_branch_operand): Ditto.
904 (const_uimm3_operand): Ditto.
905 (const_8_to_11_operand): Ditto.
906 (const_12_to_15_operand): Ditto.
907 (const_uimm4_operand): Ditto.
908 (const_uimm6_operand): Ditto.
909 (const_uimm7_operand): Ditto.
910 (const_uimm8_operand): Ditto.
911 (const_imm5_operand): Ditto.
912 (const_imm10_operand): Ditto.
913 (const_imm13_operand): Ditto.
914 (reg_imm10_operand): Ditto.
915 (aq8b_operand): Ditto.
916 (aq8h_operand): Ditto.
917 (aq8w_operand): Ditto.
918 (aq8d_operand): Ditto.
919 (aq10b_operand): Ditto.
920 (aq10h_operand): Ditto.
921 (aq10w_operand): Ditto.
922 (aq10d_operand): Ditto.
923 (aq12b_operand): Ditto.
924 (aq12h_operand): Ditto.
925 (aq12w_operand): Ditto.
926 (aq12d_operand): Ditto.
927 (const_m1_operand): Ditto.
928 (reg_or_m1_operand): Ditto.
929 (const_exp_2_operand): Ditto.
930 (const_exp_4_operand): Ditto.
931 (const_exp_8_operand): Ditto.
932 (const_exp_16_operand): Ditto.
933 (const_exp_32_operand): Ditto.
934 (const_0_or_1_operand): Ditto.
935 (const_0_to_3_operand): Ditto.
936 (const_0_to_7_operand): Ditto.
937 (const_2_or_3_operand): Ditto.
938 (const_4_to_7_operand): Ditto.
939 (const_8_to_15_operand): Ditto.
940 (const_16_to_31_operand): Ditto.
941 (qi_mask_operand): Ditto.
942 (hi_mask_operand): Ditto.
943 (si_mask_operand): Ditto.
945 (db4_operand): Ditto.
946 (db7_operand): Ditto.
947 (db8_operand): Ditto.
948 (ib3_operand): Ditto.
949 (sb4_operand): Ditto.
950 (sb5_operand): Ditto.
951 (sb8_operand): Ditto.
952 (sd8_operand): Ditto.
953 (ub4_operand): Ditto.
954 (ub8_operand): Ditto.
955 (uh4_operand): Ditto.
956 (uw4_operand): Ditto.
957 (uw5_operand): Ditto.
958 (uw6_operand): Ditto.
959 (uw8_operand): Ditto.
960 (addiur2_operand): Ditto.
961 (addiusp_operand): Ditto.
962 (andi16_operand): Ditto.
963 (movep_src_register): Ditto.
964 (movep_src_operand): Ditto.
965 (fcc_reload_operand): Ditto.
966 (muldiv_target_operand): Ditto.
967 (const_vector_same_val_operand): Ditto.
968 (const_vector_same_simm5_operand): Ditto.
969 (const_vector_same_uimm5_operand): Ditto.
970 (const_vector_same_ximm5_operand): Ditto.
971 (const_vector_same_uimm6_operand): Ditto.
972 (par_const_vector_shf_set_operand): Ditto.
973 (reg_or_vector_same_val_operand): Ditto.
974 (reg_or_vector_same_simm5_operand): Ditto.
975 (reg_or_vector_same_uimm5_operand): Ditto.
976 (reg_or_vector_same_ximm5_operand): Ditto.
977 (reg_or_vector_same_uimm6_operand): Ditto.
978 * doc/md.texi: Ditto.
979 * config/loongarch/lsx.md: New file.
981 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
983 * config/riscv/riscv-protos.h (lookup_vector_type_attribute): Export global.
984 (get_all_predecessors): New function.
985 (get_all_successors): Ditto.
986 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
987 (get_all_successors): Ditto.
988 * config/riscv/riscv-vector-builtins.cc (sizeless_type_p): Export global.
989 * config/riscv/riscv-vsetvl.cc (get_all_predecessors): Remove it.
991 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
993 * config/arc/arc-protos.h (arc_output_addsi): Remove declaration.
994 (split_addsi): Likewise.
995 * config/arc/arc.cc (arc_print_operand): Add/repurpose 's', 'S',
996 'N', 'x', and 'J' code letters.
997 (arc_output_addsi): Make it static.
998 (split_addsi): Remove it.
999 * config/arc/arc.h (UNSIGNED_INT*): New defines.
1000 (SINNED_INT*): Likewise.
1001 * config/arc/arc.md (type): Add add, sub, bxor types.
1002 (tst_movb): Change code letter from 's' to 'x'.
1003 (andsi3_i): Likewise.
1004 (addsi3_mixed): Refurbish the pattern.
1005 (call_i): Change code letter from 'S' to 'J'.
1006 * config/arc/arc700.md: Add newly introduced types.
1007 * config/arc/arcHS.md: Likewsie.
1008 * config/arc/arcHS4x.md: Likewise.
1009 * config/arc/constraints.md (Cca, CL2, Csp, C2a): Remove it.
1010 (CM4): Update description.
1011 (CP4, C6u, C6n, CIs, C4p): New constraint.
1013 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
1015 * common/config/arc/arc-common.cc (arc_option_optimization_table):
1016 Remove mbbit_peephole.
1017 * config/arc/arc.md (UNSPEC_ARC_DIRECT): Remove.
1018 (store_direct): Likewise.
1019 (BBIT peephole2): Likewise.
1020 * config/arc/arc.opt (mbbit-peephole): Ignore option.
1021 * doc/invoke.texi (mbbit-peephole): Update document.
1023 2023-09-05 Jakub Jelinek <jakub@redhat.com>
1025 * tree-ssa-tail-merge.cc (replace_block_by): Fix a comment typo:
1028 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
1030 * config/loongarch/loongarch.h (CC1_SPEC): Mark normalized
1031 options passed from driver to gnat1 as explicit for multilib.
1033 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
1035 * config.gcc: add loongarch*-elf target.
1036 * config/loongarch/elf.h: New file.
1037 Link against newlib by default.
1039 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
1041 * config.gcc: use -mstrict-align for building libraries
1042 if --with-strict-align-lib is given.
1043 * doc/install.texi: likewise.
1045 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
1047 * config/loongarch/loongarch-c.cc: Export macros
1048 "__loongarch_{arch,tune}" in the preprocessor.
1050 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
1052 * config.gcc: Make --with-abi= obsolete, decide the default ABI
1053 with target triplet. Allow specifying multilib library build
1054 options with --with-multilib-list and --with-multilib-default.
1055 * config/loongarch/t-linux: Likewise.
1056 * config/loongarch/genopts/loongarch-strings: Likewise.
1057 * config/loongarch/loongarch-str.h: Likewise.
1058 * doc/install.texi: Likewise.
1059 * config/loongarch/genopts/loongarch.opt.in: Introduce
1060 -m[no-]l[a]sx options. Only process -m*-float and
1061 -m[no-]l[a]sx in the GCC driver.
1062 * config/loongarch/loongarch.opt: Likewise.
1063 * config/loongarch/la464.md: Likewise.
1064 * config/loongarch/loongarch-c.cc: Likewise.
1065 * config/loongarch/loongarch-cpu.cc: Likewise.
1066 * config/loongarch/loongarch-cpu.h: Likewise.
1067 * config/loongarch/loongarch-def.c: Likewise.
1068 * config/loongarch/loongarch-def.h: Likewise.
1069 * config/loongarch/loongarch-driver.cc: Likewise.
1070 * config/loongarch/loongarch-driver.h: Likewise.
1071 * config/loongarch/loongarch-opts.cc: Likewise.
1072 * config/loongarch/loongarch-opts.h: Likewise.
1073 * config/loongarch/loongarch.cc: Likewise.
1074 * doc/invoke.texi: Likewise.
1076 2023-09-05 liuhongt <hongtao.liu@intel.com>
1078 * config/i386/sse.md: (V8BFH_128): Renamed to ..
1079 (VHFBF_128): .. this.
1080 (V16BFH_256): Renamed to ..
1081 (VHFBF_256): .. this.
1082 (avx512f_mov<mode>): Extend to V_128.
1083 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_128.
1084 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
1085 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_256.
1086 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
1087 * config/i386/i386-expand.cc (expand_vec_perm_blend):
1088 Canonicalize vec_merge.
1090 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1092 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Fix Dynamic status.
1093 * config/riscv/riscv-v.cc (preferred_simd_mode): Ditto.
1094 (autovectorize_vector_modes): Ditto.
1095 (vectorize_related_mode): Ditto.
1097 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
1099 * config/rs6000/darwin.h (LIB_SPEC): Include libSystemStubs for
1100 all 32b Darwin PowerPC cases.
1102 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
1104 * config/darwin-sections.def (static_init_section): Add the
1105 __TEXT,__StaticInit section.
1106 * config/darwin.cc (darwin_function_section): Use the static init
1107 section for global initializers, to match other platform toolchains.
1109 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
1111 * config/darwin-sections.def (darwin_exception_section): Move to
1113 * config/darwin.cc (darwin_emit_except_table_label): Align before
1114 the exception table label.
1115 * config/darwin.h (ASM_PREFERRED_EH_DATA_FORMAT): Use indirect PC-
1116 relative 4byte relocs.
1118 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
1120 * config/darwin.cc (dump_machopic_symref_flags): New.
1121 (debug_machopic_symref_flags): New.
1123 2023-09-04 Pan Li <pan2.li@intel.com>
1125 * config/riscv/riscv-vector-builtins-types.def
1126 (vfloat16mf4_t): Add FP16 intrinsic def.
1127 (vfloat16mf2_t): Ditto.
1128 (vfloat16m1_t): Ditto.
1129 (vfloat16m2_t): Ditto.
1130 (vfloat16m4_t): Ditto.
1131 (vfloat16m8_t): Ditto.
1133 2023-09-04 Jiufu Guo <guojiufu@linux.ibm.com>
1135 PR tree-optimization/108757
1136 * match.pd ((X - N * M) / N): New pattern.
1137 ((X + N * M) / N): New pattern.
1138 ((X + C) div_rshift N): New pattern.
1140 2023-09-04 Guo Jie <guojie@loongson.cn>
1142 * config/loongarch/loongarch.md: Support 'G' -> 'k' in
1143 movsf_hardfloat and movdf_hardfloat.
1145 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
1147 * config/loongarch/loongarch.cc (loongarch_extend_comparands):
1148 In unsigned QImode test, check for sign extended subreg and/or
1149 constant operands, and do a sign extension in that case.
1150 * config/loongarch/loongarch.md (TARGET_64BIT): Define
1151 template cbranchqi4.
1153 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
1155 * config/loongarch/loongarch.md: Allows fixed-point values to be loaded
1156 from memory into floating-point registers.
1158 2023-09-03 Pan Li <pan2.li@intel.com>
1160 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
1162 * config/riscv/vector.md: Add VLS modes to vfmax/vfmin.
1164 2023-09-02 Mikael Morin <mikael@gcc.gnu.org>
1166 * tree-diagnostic.cc (tree_diagnostics_defaults): Delete allocated
1167 pointer before overwriting it.
1169 2023-09-02 chenxiaolong <chenxiaolong@loongson.cn>
1171 * config/loongarch/loongarch-builtins.cc (loongarch_init_builtins):
1172 Associate the __float128 type to float128_type_node so that it can
1173 be recognized by the compiler.
1174 * config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
1175 Add the flag "FLOAT128_TYPE" to gcc and associate a function
1176 with the suffix "q" to "f128".
1177 * doc/extend.texi:Added support for 128-bit floating-point functions on
1178 the LoongArch architecture.
1180 2023-09-01 Jakub Jelinek <jakub@redhat.com>
1183 * common.opt (fabi-version=): Document version 19.
1184 * doc/invoke.texi (-fabi-version=): Likewise.
1186 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
1188 * config/riscv/autovec-opt.md (*cond_<optab><mode><vconvert>):
1189 New combine pattern.
1190 (*cond_<float_cvt><vconvert><mode>): Ditto.
1191 (*cond_<optab><vnconvert><mode>): Ditto.
1192 (*cond_<float_cvt><vnconvert><mode>): Ditto.
1193 (*cond_<optab><mode><vnconvert>): Ditto.
1194 (*cond_<float_cvt><mode><vnconvert>2): Ditto.
1195 * config/riscv/autovec.md (<optab><mode><vconvert>2): Adjust.
1196 (<float_cvt><vconvert><mode>2): Adjust.
1197 (<optab><vnconvert><mode>2): Adjust.
1198 (<float_cvt><vnconvert><mode>2): Adjust.
1199 (<optab><mode><vnconvert>2): Adjust.
1200 (<float_cvt><mode><vnconvert>2): Adjust.
1201 * config/riscv/riscv-v.cc (needs_fp_rounding): Add INT->FP extend.
1203 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
1205 * config/riscv/autovec-opt.md (*cond_extend<v_double_trunc><mode>):
1206 New combine pattern.
1207 (*cond_trunc<mode><v_double_trunc>): Ditto.
1208 * config/riscv/autovec.md: Adjust.
1209 * config/riscv/riscv-v.cc (needs_fp_rounding): Add FP extend.
1211 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
1213 * config/riscv/autovec-opt.md (*cond_<optab><v_double_trunc><mode>):
1214 New combine pattern.
1215 (*cond_<optab><v_quad_trunc><mode>): Ditto.
1216 (*cond_<optab><v_oct_trunc><mode>): Ditto.
1217 (*cond_trunc<mode><v_double_trunc>): Ditto.
1218 * config/riscv/autovec.md (<optab><v_quad_trunc><mode>2): Adjust.
1219 (<optab><v_oct_trunc><mode>2): Ditto.
1221 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
1223 * config/riscv/autovec.md: Adjust.
1224 * config/riscv/riscv-protos.h (expand_cond_len_unop): Ditto.
1225 (expand_cond_len_binop): Ditto.
1226 * config/riscv/riscv-v.cc (needs_fp_rounding): Ditto.
1227 (expand_cond_len_op): Ditto.
1228 (expand_cond_len_unop): Ditto.
1229 (expand_cond_len_binop): Ditto.
1230 (expand_cond_len_ternop): Ditto.
1232 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1234 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Enable
1235 VECT_COMPARE_COSTS by default.
1237 2023-09-01 Robin Dapp <rdapp@ventanamicro.com>
1239 * config/riscv/autovec.md (vec_extract<mode>qi): New expander.
1241 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1243 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Add
1245 * config/riscv/riscv.opt: Add dynamic compile option.
1247 2023-09-01 Pan Li <pan2.li@intel.com>
1249 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
1250 vls floating-point autovec.
1251 * config/riscv/vector-iterators.md: New iterator for
1252 floating-point V and VLS.
1253 * config/riscv/vector.md: Add VLS to floating-point binop.
1255 2023-09-01 Andrew Pinski <apinski@marvell.com>
1257 PR tree-optimization/19832
1258 * match.pd: Add pattern to optimize
1259 `(a != b) ? a OP b : c`.
1261 2023-09-01 Lulu Cheng <chenglulu@loongson.cn>
1262 Guo Jie <guojie@loongson.cn>
1265 * config/loongarch/loongarch.cc (loongarch_emit_stack_tie): Use the
1266 frame_pointer_needed to determine whether to use the $fp register.
1268 2023-08-31 Andrew Pinski <apinski@marvell.com>
1270 PR tree-optimization/110915
1271 * match.pd (min_value, max_value): Extend to vector constants.
1273 2023-08-31 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
1275 * config.in: Regenerate.
1276 * config/darwin-c.cc: Change spelling to macOS.
1277 * config/darwin-driver.cc: Likewise.
1278 * config/darwin.h: Likewise.
1279 * configure.ac: Likewise.
1280 * doc/contrib.texi: Likewise.
1281 * doc/extend.texi: Likewise.
1282 * doc/invoke.texi: Likewise.
1283 * doc/plugins.texi: Likewise.
1284 * doc/tm.texi: Regenerate.
1285 * doc/tm.texi.in: Change spelling to macOS.
1286 * plugin.cc: Likewise.
1288 2023-08-31 Pan Li <pan2.li@intel.com>
1290 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmadd/vfnmacc.
1291 * config/riscv/autovec.md: Ditto.
1293 2023-08-31 Pan Li <pan2.li@intel.com>
1295 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmsac/vfnmsub
1296 * config/riscv/autovec.md: Ditto.
1298 2023-08-31 Richard Sandiford <richard.sandiford@arm.com>
1300 * config/aarch64/aarch64.md (untyped_call): Emit a call_value
1301 rather than a call. List each possible destination register
1302 in the call pattern.
1304 2023-08-31 Pan Li <pan2.li@intel.com>
1306 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmsac/vfmsub
1307 * config/riscv/autovec.md: Ditto.
1309 2023-08-31 Pan Li <pan2.li@intel.com>
1310 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
1312 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmadd/vfmacc.
1313 * config/riscv/autovec.md: Ditto.
1314 * config/riscv/vector-iterators.md: Add UNSPEC_VFFMA.
1316 2023-08-31 Palmer Dabbelt <palmer@rivosinc.com>
1318 * config/riscv/autovec.md (shifts): Use
1319 vector_scalar_shift_operand.
1320 * config/riscv/predicates.md (vector_scalar_shift_operand): New
1323 2023-08-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1325 * config.gcc: Add vector cost model framework for RVV.
1326 * config/riscv/riscv.cc (riscv_vectorize_create_costs): Ditto.
1327 (TARGET_VECTORIZE_CREATE_COSTS): Ditto.
1328 * config/riscv/t-riscv: Ditto.
1329 * config/riscv/riscv-vector-costs.cc: New file.
1330 * config/riscv/riscv-vector-costs.h: New file.
1332 2023-08-31 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
1335 * config/rs6000/mma.md (define_insn_and_split movoo): Disallow
1336 AltiVec address operands.
1337 (define_insn_and_split movxo): Likewise.
1338 * config/rs6000/predicates.md (vsx_quad_dform_memory_operand): Remove
1339 redundant mode size check.
1341 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
1343 * config/riscv/riscv-protos.h (IS_AGNOSTIC): Move to here.
1344 * config/riscv/riscv-v.cc (gen_no_side_effects_vsetvl_rtx):
1345 Change to default policy.
1346 * config/riscv/riscv-vector-builtins-bases.cc: Change to default policy.
1347 * config/riscv/riscv-vsetvl.h (IS_AGNOSTIC): Delete.
1348 * config/riscv/riscv.cc (riscv_print_operand): Use IS_AGNOSTIC to test.
1350 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
1352 * config/riscv/autovec-opt.md: Adjust.
1353 * config/riscv/autovec-vls.md: Ditto.
1354 * config/riscv/autovec.md: Ditto.
1355 * config/riscv/riscv-protos.h (enum insn_type): Add insn_type.
1356 (enum insn_flags): Add insn flags.
1357 (emit_vlmax_insn): Adjust.
1358 (emit_vlmax_fp_insn): Delete.
1359 (emit_vlmax_ternary_insn): Delete.
1360 (emit_vlmax_fp_ternary_insn): Delete.
1361 (emit_nonvlmax_insn): Adjust.
1362 (emit_vlmax_slide_insn): Delete.
1363 (emit_nonvlmax_slide_tu_insn): Delete.
1364 (emit_vlmax_merge_insn): Delete.
1365 (emit_vlmax_cmp_insn): Delete.
1366 (emit_vlmax_cmp_mu_insn): Delete.
1367 (emit_vlmax_masked_mu_insn): Delete.
1368 (emit_scalar_move_insn): Delete.
1369 (emit_nonvlmax_integer_move_insn): Delete.
1370 (emit_vlmax_insn_lra): Add.
1371 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): New.
1372 (emit_vlmax_insn): Adjust.
1373 (emit_nonvlmax_insn): Adjust.
1374 (emit_vlmax_insn_lra): Add.
1375 (emit_vlmax_fp_insn): Delete.
1376 (emit_vlmax_ternary_insn): Delete.
1377 (emit_vlmax_fp_ternary_insn): Delete.
1378 (emit_vlmax_slide_insn): Delete.
1379 (emit_nonvlmax_slide_tu_insn): Delete.
1380 (emit_nonvlmax_slide_insn): Delete.
1381 (emit_vlmax_merge_insn): Delete.
1382 (emit_vlmax_cmp_insn): Delete.
1383 (emit_vlmax_cmp_mu_insn): Delete.
1384 (emit_vlmax_masked_insn): Delete.
1385 (emit_nonvlmax_masked_insn): Delete.
1386 (emit_vlmax_masked_store_insn): Delete.
1387 (emit_nonvlmax_masked_store_insn): Delete.
1388 (emit_vlmax_masked_mu_insn): Delete.
1389 (emit_vlmax_masked_fp_mu_insn): Delete.
1390 (emit_nonvlmax_tu_insn): Delete.
1391 (emit_nonvlmax_fp_tu_insn): Delete.
1392 (emit_nonvlmax_tumu_insn): Delete.
1393 (emit_nonvlmax_fp_tumu_insn): Delete.
1394 (emit_scalar_move_insn): Delete.
1395 (emit_cpop_insn): Delete.
1396 (emit_vlmax_integer_move_insn): Delete.
1397 (emit_nonvlmax_integer_move_insn): Delete.
1398 (emit_vlmax_gather_insn): Delete.
1399 (emit_vlmax_masked_gather_mu_insn): Delete.
1400 (emit_vlmax_compress_insn): Delete.
1401 (emit_nonvlmax_compress_insn): Delete.
1402 (emit_vlmax_reduction_insn): Delete.
1403 (emit_vlmax_fp_reduction_insn): Delete.
1404 (emit_nonvlmax_fp_reduction_insn): Delete.
1405 (expand_vec_series): Adjust.
1406 (expand_const_vector): Adjust.
1407 (legitimize_move): Adjust.
1408 (sew64_scalar_helper): Adjust.
1409 (expand_tuple_move): Adjust.
1410 (expand_vector_init_insert_elems): Adjust.
1411 (expand_vector_init_merge_repeating_sequence): Adjust.
1412 (expand_vec_cmp): Adjust.
1413 (expand_vec_cmp_float): Adjust.
1414 (expand_vec_perm): Adjust.
1415 (shuffle_merge_patterns): Adjust.
1416 (shuffle_compress_patterns): Adjust.
1417 (shuffle_decompress_patterns): Adjust.
1418 (expand_load_store): Adjust.
1419 (expand_cond_len_op): Adjust.
1420 (expand_cond_len_unop): Adjust.
1421 (expand_cond_len_binop): Adjust.
1422 (expand_gather_scatter): Adjust.
1423 (expand_cond_len_ternop): Adjust.
1424 (expand_reduction): Adjust.
1425 (expand_lanes_load_store): Adjust.
1426 (expand_fold_extract_last): Adjust.
1427 * config/riscv/riscv.cc (vector_zero_call_used_regs): Adjust.
1428 * config/riscv/vector.md: Adjust.
1430 2023-08-31 Haochen Gui <guihaoc@gcc.gnu.org>
1433 * config/rs6000/rs6000-string.cc (expand_block_move): Call vector
1434 load/store with length only on 64-bit Power10.
1436 2023-08-31 Claudiu Zissulescu <claziss@gmail.com>
1438 * config/arc/arc.cc (arc_split_mov_const): Use LSL16 only when
1439 SWAP option is enabled.
1440 * config/arc/arc.md (ashlsi2_cnt16): Likewise.
1442 2023-08-31 Stamatis Markianos-Wright <stam.markianos-wright@arm.com>
1444 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90, vcaddq_rot270):
1445 Use common insn for signed and unsigned front-end definitions.
1446 * config/arm/arm_mve_builtins.def
1447 (vcaddq_rot90_m_u, vcaddq_rot270_m_u): Make common.
1448 (vcaddq_rot90_m_s, vcaddq_rot270_m_s): Remove.
1449 * config/arm/iterators.md (mve_insn): Merge signed and unsigned defs.
1452 (mve_rot): Likewise.
1454 (VxCADDQ_M): Likewise.
1455 * config/arm/unspecs.md (unspec): Likewise.
1456 * config/arm/mve.md: Fix minor typo.
1458 2023-08-31 liuhongt <hongtao.liu@intel.com>
1460 * config/i386/sse.md (<avx512>_blendm<mode>): Merge
1461 VF_AVX512HFBFVL into VI12HFBF_AVX512VL.
1462 (VF_AVX512HFBF16): Renamed to VHFBF.
1463 (VF_AVX512FP16VL): Renamed to VHF_AVX512VL.
1464 (VF_AVX512FP16): Removed.
1465 (div<mode>3): Adjust VF_AVX512FP16VL to VHF_AVX512VL.
1466 (avx512fp16_rcp<mode>2<mask_name>): Ditto.
1467 (rsqrt<mode>2): Ditto.
1468 (<sse>_rsqrt<mode>2<mask_name>): Ditto.
1469 (vcond<mode><code>): Ditto.
1470 (vcond<sseintvecmodelower><mode>): Ditto.
1471 (<avx512>_fmaddc_<mode>_mask1<round_expand_name>): Ditto.
1472 (<avx512>_fmaddc_<mode>_maskz<round_expand_name>): Ditto.
1473 (<avx512>_fcmaddc_<mode>_mask1<round_expand_name>): Ditto.
1474 (<avx512>_fcmaddc_<mode>_maskz<round_expand_name>): Ditto.
1475 (cmla<conj_op><mode>4): Ditto.
1476 (fma_<mode>_fadd_fmul): Ditto.
1477 (fma_<mode>_fadd_fcmul): Ditto.
1478 (fma_<complexopname>_<mode>_fma_zero): Ditto.
1479 (fma_<mode>_fmaddc_bcst): Ditto.
1480 (fma_<mode>_fcmaddc_bcst): Ditto.
1481 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
1482 (cmul<conj_op><mode>3): Ditto.
1483 (<avx512>_<complexopname>_<mode><maskc_name><round_name>):
1485 (vec_unpacks_lo_<mode>): Ditto.
1486 (vec_unpacks_hi_<mode>): Ditto.
1487 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
1488 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
1489 (*vec_extract<mode>_0): Ditto.
1490 (*<avx512>_cmp<mode>3): Extend to V48H_AVX512VL.
1492 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
1495 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Remove condition.
1497 2023-08-31 Jiufu Guo <guojiufu@linux.ibm.com>
1499 * range-op-mixed.h (operator_plus::overflow_free_p): New declare.
1500 (operator_minus::overflow_free_p): New declare.
1501 (operator_mult::overflow_free_p): New declare.
1502 * range-op.cc (range_op_handler::overflow_free_p): New function.
1503 (range_operator::overflow_free_p): New default function.
1504 (operator_plus::overflow_free_p): New function.
1505 (operator_minus::overflow_free_p): New function.
1506 (operator_mult::overflow_free_p): New function.
1507 * range-op.h (range_op_handler::overflow_free_p): New declare.
1508 (range_operator::overflow_free_p): New declare.
1509 * value-range.cc (irange::nonnegative_p): New function.
1510 (irange::nonpositive_p): New function.
1511 * value-range.h (irange::nonnegative_p): New declare.
1512 (irange::nonpositive_p): New declare.
1514 2023-08-30 Dimitar Dimitrov <dimitar@dinux.eu>
1517 * config/pru/predicates.md (const_0_operand): New predicate.
1518 (pru_cstore_comparison_operator): Ditto.
1519 * config/pru/pru.md (cstore<mode>4): New pattern.
1522 2023-08-30 Richard Biener <rguenther@suse.de>
1524 PR tree-optimization/111228
1525 * match.pd ((vec_perm (vec_perm ..) @5 ..) -> (vec_perm @x @5 ..)):
1526 New simplifications.
1528 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1530 * config/riscv/autovec.md (movmisalign<mode>): Delete.
1532 2023-08-30 Die Li <lidie@eswincomputing.com>
1533 Fei Gao <gaofei@eswincomputing.com>
1535 * config/riscv/peephole.md: New pattern.
1536 * config/riscv/predicates.md (a0a1_reg_operand): New predicate.
1537 (zcmp_mv_sreg_operand): New predicate.
1538 * config/riscv/riscv.md: New predicate.
1539 * config/riscv/zc.md (*mva01s<X:mode>): New pattern.
1540 (*mvsa01<X:mode>): New pattern.
1542 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
1544 * config/riscv/riscv.cc
1545 (riscv_zcmp_can_use_popretz): true if popretz can be used
1546 (riscv_gen_multi_pop_insn): interface to generate cm.pop[ret][z]
1547 (riscv_expand_epilogue): expand cm.pop[ret][z] in epilogue
1548 * config/riscv/riscv.md: define A0_REGNUM
1549 * config/riscv/zc.md
1550 (@gpr_multi_popretz_up_to_ra_<mode>): md for popretz ra
1551 (@gpr_multi_popretz_up_to_s0_<mode>): md for popretz ra, s0
1552 (@gpr_multi_popretz_up_to_s1_<mode>): likewise
1553 (@gpr_multi_popretz_up_to_s2_<mode>): likewise
1554 (@gpr_multi_popretz_up_to_s3_<mode>): likewise
1555 (@gpr_multi_popretz_up_to_s4_<mode>): likewise
1556 (@gpr_multi_popretz_up_to_s5_<mode>): likewise
1557 (@gpr_multi_popretz_up_to_s6_<mode>): likewise
1558 (@gpr_multi_popretz_up_to_s7_<mode>): likewise
1559 (@gpr_multi_popretz_up_to_s8_<mode>): likewise
1560 (@gpr_multi_popretz_up_to_s9_<mode>): likewise
1561 (@gpr_multi_popretz_up_to_s11_<mode>): likewise
1563 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
1565 * config/riscv/iterators.md
1566 (slot0_offset): slot 0 offset in stack GPRs area in bytes
1567 (slot1_offset): slot 1 offset in stack GPRs area in bytes
1568 (slot2_offset): likewise
1569 (slot3_offset): likewise
1570 (slot4_offset): likewise
1571 (slot5_offset): likewise
1572 (slot6_offset): likewise
1573 (slot7_offset): likewise
1574 (slot8_offset): likewise
1575 (slot9_offset): likewise
1576 (slot10_offset): likewise
1577 (slot11_offset): likewise
1578 (slot12_offset): likewise
1579 * config/riscv/predicates.md
1580 (stack_push_up_to_ra_operand): predicates of stack adjust pushing ra
1581 (stack_push_up_to_s0_operand): predicates of stack adjust pushing ra, s0
1582 (stack_push_up_to_s1_operand): likewise
1583 (stack_push_up_to_s2_operand): likewise
1584 (stack_push_up_to_s3_operand): likewise
1585 (stack_push_up_to_s4_operand): likewise
1586 (stack_push_up_to_s5_operand): likewise
1587 (stack_push_up_to_s6_operand): likewise
1588 (stack_push_up_to_s7_operand): likewise
1589 (stack_push_up_to_s8_operand): likewise
1590 (stack_push_up_to_s9_operand): likewise
1591 (stack_push_up_to_s11_operand): likewise
1592 (stack_pop_up_to_ra_operand): predicates of stack adjust poping ra
1593 (stack_pop_up_to_s0_operand): predicates of stack adjust poping ra, s0
1594 (stack_pop_up_to_s1_operand): likewise
1595 (stack_pop_up_to_s2_operand): likewise
1596 (stack_pop_up_to_s3_operand): likewise
1597 (stack_pop_up_to_s4_operand): likewise
1598 (stack_pop_up_to_s5_operand): likewise
1599 (stack_pop_up_to_s6_operand): likewise
1600 (stack_pop_up_to_s7_operand): likewise
1601 (stack_pop_up_to_s8_operand): likewise
1602 (stack_pop_up_to_s9_operand): likewise
1603 (stack_pop_up_to_s11_operand): likewise
1604 * config/riscv/riscv-protos.h
1605 (riscv_zcmp_valid_stack_adj_bytes_p):declaration
1606 * config/riscv/riscv.cc (struct riscv_frame_info): comment change
1607 (riscv_avoid_multi_push): helper function of riscv_use_multi_push
1608 (riscv_use_multi_push): true if multi push is used
1609 (riscv_multi_push_sregs_count): num of sregs in multi-push
1610 (riscv_multi_push_regs_count): num of regs in multi-push
1611 (riscv_16bytes_align): align to 16 bytes
1612 (riscv_stack_align): moved to a better place
1613 (riscv_save_libcall_count): no functional change
1614 (riscv_compute_frame_info): add zcmp frame info
1615 (riscv_for_each_saved_reg): save or restore fprs in specified slot for zcmp
1616 (riscv_adjust_multi_push_cfi_prologue): adjust cfi for cm.push
1617 (riscv_gen_multi_push_pop_insn): gen function for multi push and pop
1618 (get_multi_push_fpr_mask): get mask for the fprs pushed by cm.push
1619 (riscv_expand_prologue): allocate stack by cm.push
1620 (riscv_adjust_multi_pop_cfi_epilogue): adjust cfi for cm.pop[ret]
1621 (riscv_expand_epilogue): allocate stack by cm.pop[ret]
1622 (zcmp_base_adj): calculate stack adjustment base size
1623 (zcmp_additional_adj): calculate stack adjustment additional size
1624 (riscv_zcmp_valid_stack_adj_bytes_p): check if stack adjustment valid
1625 * config/riscv/riscv.h (RETURN_ADDR_MASK): mask of ra
1636 (S10_MASK): likewise
1637 (S11_MASK): likewise
1638 (MULTI_PUSH_GPR_MASK): GPR_MASK that cm.push can cover at most
1639 (ZCMP_MAX_SPIMM): max spimm value
1640 (ZCMP_SP_INC_STEP): zcmp sp increment step
1641 (ZCMP_INVALID_S0S10_SREGS_COUNTS): num of s0-s10
1642 (ZCMP_S0S11_SREGS_COUNTS): num of s0-s11
1643 (ZCMP_MAX_GRP_SLOTS): max slots of pushing and poping in zcmp
1644 (CALLEE_SAVED_FREG_NUMBER): get x of fsx(fs0 ~ fs11)
1645 * config/riscv/riscv.md: include zc.md
1646 * config/riscv/zc.md: New file. machine description for zcmp
1648 2023-08-30 Jakub Jelinek <jakub@redhat.com>
1650 PR tree-optimization/110914
1651 * tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcpy): Don't call
1652 adjust_last_stmt unless len is known constant.
1654 2023-08-30 Jakub Jelinek <jakub@redhat.com>
1656 PR tree-optimization/111015
1657 * gimple-ssa-store-merging.cc
1658 (imm_store_chain_info::output_merged_store): Use wi::mask and
1659 wide_int_to_tree instead of unsigned HOST_WIDE_INT shift and
1660 build_int_cst to build BIT_AND_EXPR mask.
1662 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1664 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Add MASK_LEN_ variant.
1665 (call_may_clobber_ref_p_1): Ditto.
1666 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
1667 (get_alias_ptr_type_for_ptr_address): Ditto.
1669 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1671 * config/riscv/riscv-vsetvl.cc
1672 (vector_insn_info::get_avl_or_vl_reg): Fix bug.
1674 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1676 * config/riscv/autovec-vls.md (movmisalign<mode>): New pattern.
1677 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Support
1680 2023-08-29 Philipp Tomsich <philipp.tomsich@vrull.eu>
1682 * config/riscv/zicond.md: New splitters to rewrite single bit
1683 sign extension as the condition to a czero in the desired form.
1685 2023-08-29 David Malcolm <dmalcolm@redhat.com>
1688 * doc/invoke.texi: Add -Wanalyzer-overlapping-buffers.
1690 2023-08-29 David Malcolm <dmalcolm@redhat.com>
1693 * Makefile.in (ANALYZER_OBJS): Add analyzer/ranges.o.
1695 2023-08-29 Jin Ma <jinma@linux.alibaba.com>
1697 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli):
1698 zvfh can generate zfa extended instruction fli.h, just like zfh.
1700 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
1701 Vineet Gupta <vineetg@rivosinc.com>
1703 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Generate
1704 __riscv_unaligned_avoid with value 1 or
1705 __riscv_unaligned_slow with value 1 or
1706 __riscv_unaligned_fast with value 1
1707 * config/riscv/riscv.cc (riscv_option_override): Define
1708 riscv_user_wants_strict_align. Set
1709 riscv_user_wants_strict_align to TARGET_STRICT_ALIGN
1710 * config/riscv/riscv.h: Declare riscv_user_wants_strict_align
1712 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
1714 * config/riscv/autovec-vls.md: Update types
1715 * config/riscv/riscv.md: Add vector placeholder type
1716 * config/riscv/vector.md: Update types
1718 2023-08-29 Carl Love <cel@us.ibm.com>
1720 * config/rs6000/dfp.md (UNSPEC_DQUAN): New unspec.
1721 (dfp_dqua_<mode>, dfp_dquai_<mode>): New define_insn.
1722 * config/rs6000/rs6000-builtins.def (__builtin_dfp_dqua,
1723 __builtin_dfp_dquai, __builtin_dfp_dquaq, __builtin_dfp_dquaqi):
1724 New buit-in definitions.
1725 * config/rs6000/rs6000-overload.def (__builtin_dfp_quantize): New
1726 overloaded definition.
1727 * doc/extend.texi: Add documentation for __builtin_dfp_quantize.
1729 2023-08-29 Pan Li <pan2.li@intel.com>
1730 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
1732 * config/riscv/riscv.cc (riscv_legitimize_poly_move): New declaration.
1733 (riscv_legitimize_const_move): Handle ref plus const poly.
1735 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
1737 * common/config/riscv/riscv-common.cc
1738 (riscv_implied_info): Add implications from unprivileged extensions.
1739 (riscv_ext_version_table): Add stub support for all unprivileged
1740 extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.
1742 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
1744 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
1745 Add stub support for all vendor extensions supported by Binutils.
1747 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
1749 * common/config/riscv/riscv-common.cc
1750 (riscv_implied_info): Add implications from privileged extensions.
1751 (riscv_ext_version_table): Add stub support for all privileged
1752 extensions supported by Binutils.
1754 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
1756 * config/riscv/autovec.md: Adjust
1757 * config/riscv/riscv-protos.h (RVV_VUNDEF): Clean.
1758 (get_vlmax_rtx): Exported.
1759 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Deleted.
1760 (emit_vlmax_masked_gather_mu_insn): Adjust.
1761 (get_vlmax_rtx): New func.
1762 (expand_load_store): Adjust.
1763 (expand_cond_len_unop): Call expand_cond_len_op.
1764 (expand_cond_len_op): New subroutine.
1765 (expand_cond_len_binop): Call expand_cond_len_op.
1766 (expand_cond_len_ternop): Call expand_cond_len_op.
1767 (expand_lanes_load_store): Adjust.
1769 2023-08-29 Jakub Jelinek <jakub@redhat.com>
1772 PR middle-end/111209
1773 * tree-ssa-math-opts.cc (match_uaddc_usubc): Match also
1774 just 2 limb uaddc/usubc with 0 carry-in on lower limb and ignored
1775 carry-out on higher limb. Don't match it though if it could be
1776 matched later on 4 argument addition/subtraction.
1778 2023-08-29 Andrew Pinski <apinski@marvell.com>
1780 PR tree-optimization/111147
1781 * match.pd (`(x | y) & (~x ^ y)`) Use bitwise_inverted_equal_p
1782 instead of matching bit_not.
1784 2023-08-29 Christophe Lyon <christophe.lyon@linaro.org>
1786 * config/arm/arm-mve-builtins.cc (type_suffixes): Add missing
1789 2023-08-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1791 * config/riscv/riscv-vsetvl.cc (vector_insn_info::get_avl_or_vl_reg): New function.
1792 (pass_vsetvl::compute_local_properties): Fix bug.
1793 (pass_vsetvl::commit_vsetvls): Ditto.
1794 * config/riscv/riscv-vsetvl.h: New function.
1796 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
1799 * config/riscv/predicates.md (vector_const_int_or_double_0_operand):
1801 * config/riscv/riscv-vector-builtins.cc (function_expander::function_expander):
1802 force_reg mem target operand.
1803 * config/riscv/vector.md (@pred_mov<mode>): Wrapper.
1804 (*pred_mov<mode>): Remove imm -> reg pattern.
1805 (*pred_broadcast<mode>_imm): Add imm -> reg pattern.
1807 2023-08-29 Lulu Cheng <chenglulu@loongson.cn>
1809 * common/config/loongarch/loongarch-common.cc:
1810 Enable '-free' on O2 and above.
1811 * doc/invoke.texi: Modify the description information
1812 of the '-free' compilation option and add the LoongArch
1815 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
1817 * doc/extend.texi: Fix the description of __builtin_riscv_pause.
1819 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
1821 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
1822 Implement the 'Zihintpause' extension, version 2.0.
1823 (riscv_ext_flag_table) Add 'Zihintpause' handling.
1824 * config/riscv/riscv-builtins.cc: Remove availability predicate
1825 "always" and add "hint_pause".
1826 (riscv_builtins) : Add "pause" extension.
1827 * config/riscv/riscv-opts.h (MASK_ZIHINTPAUSE, TARGET_ZIHINTPAUSE): New.
1828 * config/riscv/riscv.md (riscv_pause): Adjust output based on
1831 2023-08-28 Andrew Pinski <apinski@marvell.com>
1833 * match.pd (`(X & ~Y) | (~X & Y)`): Use bitwise_inverted_equal_p
1834 instead of specifically checking for ~X.
1836 2023-08-28 Andrew Pinski <apinski@marvell.com>
1838 PR tree-optimization/111146
1839 * match.pd (`(x | y) & ~x`, `(x & y) | ~x`): Remove
1842 2023-08-28 Andrew Pinski <apinski@marvell.com>
1844 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Add dump information
1845 when resimplify returns true.
1846 (match_simplify_replacement): Print only if accepted the match-and-simplify
1847 result rather than the full sequence.
1849 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1851 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Skip
1853 (pass_vsetvl::compute_probabilities): Fix unitialized probability.
1855 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1857 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Fix bug.
1859 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
1861 * config/arm/arm-mve-builtins-base.cc (vmullbq_poly)
1862 (vmulltq_poly): New.
1863 * config/arm/arm-mve-builtins-base.def (vmullbq_poly)
1864 (vmulltq_poly): New.
1865 * config/arm/arm-mve-builtins-base.h (vmullbq_poly)
1866 (vmulltq_poly): New.
1867 * config/arm/arm_mve.h (vmulltq_poly): Remove.
1868 (vmullbq_poly): Remove.
1869 (vmullbq_poly_m): Remove.
1870 (vmulltq_poly_m): Remove.
1871 (vmullbq_poly_x): Remove.
1872 (vmulltq_poly_x): Remove.
1873 (vmulltq_poly_p8): Remove.
1874 (vmullbq_poly_p8): Remove.
1875 (vmulltq_poly_p16): Remove.
1876 (vmullbq_poly_p16): Remove.
1877 (vmullbq_poly_m_p8): Remove.
1878 (vmullbq_poly_m_p16): Remove.
1879 (vmulltq_poly_m_p8): Remove.
1880 (vmulltq_poly_m_p16): Remove.
1881 (vmullbq_poly_x_p8): Remove.
1882 (vmullbq_poly_x_p16): Remove.
1883 (vmulltq_poly_x_p8): Remove.
1884 (vmulltq_poly_x_p16): Remove.
1885 (__arm_vmulltq_poly_p8): Remove.
1886 (__arm_vmullbq_poly_p8): Remove.
1887 (__arm_vmulltq_poly_p16): Remove.
1888 (__arm_vmullbq_poly_p16): Remove.
1889 (__arm_vmullbq_poly_m_p8): Remove.
1890 (__arm_vmullbq_poly_m_p16): Remove.
1891 (__arm_vmulltq_poly_m_p8): Remove.
1892 (__arm_vmulltq_poly_m_p16): Remove.
1893 (__arm_vmullbq_poly_x_p8): Remove.
1894 (__arm_vmullbq_poly_x_p16): Remove.
1895 (__arm_vmulltq_poly_x_p8): Remove.
1896 (__arm_vmulltq_poly_x_p16): Remove.
1897 (__arm_vmulltq_poly): Remove.
1898 (__arm_vmullbq_poly): Remove.
1899 (__arm_vmullbq_poly_m): Remove.
1900 (__arm_vmulltq_poly_m): Remove.
1901 (__arm_vmullbq_poly_x): Remove.
1902 (__arm_vmulltq_poly_x): Remove.
1904 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
1906 * config/arm/arm-mve-builtins-functions.h (class
1907 unspec_mve_function_exact_insn_vmull_poly): New.
1909 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
1911 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_poly): New.
1912 * config/arm/arm-mve-builtins-shapes.h (binary_widen_poly): New.
1914 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
1916 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): Add
1917 support for 'U' and 'p' format specifiers.
1919 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
1921 * config/arm/arm-mve-builtins.cc (type_suffixes): Handle poly_p
1923 (TYPES_poly_8_16): New.
1925 * config/arm/arm-mve-builtins.def (p8): New type suffix.
1927 * config/arm/arm-mve-builtins.h (enum type_class_index): Add
1929 (struct type_suffix_info): Add poly_p field.
1931 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
1933 * config/arm/arm-mve-builtins-base.cc (vmullbq_int, vmulltq_int):
1935 * config/arm/arm-mve-builtins-base.def (vmullbq_int, vmulltq_int):
1937 * config/arm/arm-mve-builtins-base.h (vmullbq_int, vmulltq_int):
1939 * config/arm/arm_mve.h (vmulltq_int): Remove.
1940 (vmullbq_int): Remove.
1941 (vmullbq_int_m): Remove.
1942 (vmulltq_int_m): Remove.
1943 (vmullbq_int_x): Remove.
1944 (vmulltq_int_x): Remove.
1945 (vmulltq_int_u8): Remove.
1946 (vmullbq_int_u8): Remove.
1947 (vmulltq_int_s8): Remove.
1948 (vmullbq_int_s8): Remove.
1949 (vmulltq_int_u16): Remove.
1950 (vmullbq_int_u16): Remove.
1951 (vmulltq_int_s16): Remove.
1952 (vmullbq_int_s16): Remove.
1953 (vmulltq_int_u32): Remove.
1954 (vmullbq_int_u32): Remove.
1955 (vmulltq_int_s32): Remove.
1956 (vmullbq_int_s32): Remove.
1957 (vmullbq_int_m_s8): Remove.
1958 (vmullbq_int_m_s32): Remove.
1959 (vmullbq_int_m_s16): Remove.
1960 (vmullbq_int_m_u8): Remove.
1961 (vmullbq_int_m_u32): Remove.
1962 (vmullbq_int_m_u16): Remove.
1963 (vmulltq_int_m_s8): Remove.
1964 (vmulltq_int_m_s32): Remove.
1965 (vmulltq_int_m_s16): Remove.
1966 (vmulltq_int_m_u8): Remove.
1967 (vmulltq_int_m_u32): Remove.
1968 (vmulltq_int_m_u16): Remove.
1969 (vmullbq_int_x_s8): Remove.
1970 (vmullbq_int_x_s16): Remove.
1971 (vmullbq_int_x_s32): Remove.
1972 (vmullbq_int_x_u8): Remove.
1973 (vmullbq_int_x_u16): Remove.
1974 (vmullbq_int_x_u32): Remove.
1975 (vmulltq_int_x_s8): Remove.
1976 (vmulltq_int_x_s16): Remove.
1977 (vmulltq_int_x_s32): Remove.
1978 (vmulltq_int_x_u8): Remove.
1979 (vmulltq_int_x_u16): Remove.
1980 (vmulltq_int_x_u32): Remove.
1981 (__arm_vmulltq_int_u8): Remove.
1982 (__arm_vmullbq_int_u8): Remove.
1983 (__arm_vmulltq_int_s8): Remove.
1984 (__arm_vmullbq_int_s8): Remove.
1985 (__arm_vmulltq_int_u16): Remove.
1986 (__arm_vmullbq_int_u16): Remove.
1987 (__arm_vmulltq_int_s16): Remove.
1988 (__arm_vmullbq_int_s16): Remove.
1989 (__arm_vmulltq_int_u32): Remove.
1990 (__arm_vmullbq_int_u32): Remove.
1991 (__arm_vmulltq_int_s32): Remove.
1992 (__arm_vmullbq_int_s32): Remove.
1993 (__arm_vmullbq_int_m_s8): Remove.
1994 (__arm_vmullbq_int_m_s32): Remove.
1995 (__arm_vmullbq_int_m_s16): Remove.
1996 (__arm_vmullbq_int_m_u8): Remove.
1997 (__arm_vmullbq_int_m_u32): Remove.
1998 (__arm_vmullbq_int_m_u16): Remove.
1999 (__arm_vmulltq_int_m_s8): Remove.
2000 (__arm_vmulltq_int_m_s32): Remove.
2001 (__arm_vmulltq_int_m_s16): Remove.
2002 (__arm_vmulltq_int_m_u8): Remove.
2003 (__arm_vmulltq_int_m_u32): Remove.
2004 (__arm_vmulltq_int_m_u16): Remove.
2005 (__arm_vmullbq_int_x_s8): Remove.
2006 (__arm_vmullbq_int_x_s16): Remove.
2007 (__arm_vmullbq_int_x_s32): Remove.
2008 (__arm_vmullbq_int_x_u8): Remove.
2009 (__arm_vmullbq_int_x_u16): Remove.
2010 (__arm_vmullbq_int_x_u32): Remove.
2011 (__arm_vmulltq_int_x_s8): Remove.
2012 (__arm_vmulltq_int_x_s16): Remove.
2013 (__arm_vmulltq_int_x_s32): Remove.
2014 (__arm_vmulltq_int_x_u8): Remove.
2015 (__arm_vmulltq_int_x_u16): Remove.
2016 (__arm_vmulltq_int_x_u32): Remove.
2017 (__arm_vmulltq_int): Remove.
2018 (__arm_vmullbq_int): Remove.
2019 (__arm_vmullbq_int_m): Remove.
2020 (__arm_vmulltq_int_m): Remove.
2021 (__arm_vmullbq_int_x): Remove.
2022 (__arm_vmulltq_int_x): Remove.
2024 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
2026 * config/arm/arm-mve-builtins-shapes.cc (binary_widen): New.
2027 * config/arm/arm-mve-builtins-shapes.h (binary_widen): New.
2029 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
2031 * config/arm/arm-mve-builtins-functions.h (class
2032 unspec_mve_function_exact_insn_vmull): New.
2034 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
2036 * config/arm/iterators.md (mve_insn): Add vmullb, vmullt.
2037 (isu): Add VMULLBQ_INT_S, VMULLBQ_INT_U, VMULLTQ_INT_S,
2039 (supf): Add VMULLBQ_POLY_P, VMULLTQ_POLY_P, VMULLBQ_POLY_M_P,
2041 (VMULLBQ_INT, VMULLTQ_INT, VMULLBQ_INT_M, VMULLTQ_INT_M): Delete.
2042 (VMULLxQ_INT, VMULLxQ_POLY, VMULLxQ_INT_M, VMULLxQ_POLY_M): New.
2043 * config/arm/mve.md (mve_vmullbq_int_<supf><mode>)
2044 (mve_vmulltq_int_<supf><mode>): Merge into ...
2045 (@mve_<mve_insn>q_int_<supf><mode>) ... this.
2046 (mve_vmulltq_poly_p<mode>, mve_vmullbq_poly_p<mode>): Merge into ...
2047 (@mve_<mve_insn>q_poly_<supf><mode>): ... this.
2048 (mve_vmullbq_int_m_<supf><mode>, mve_vmulltq_int_m_<supf><mode>): Merge into ...
2049 (@mve_<mve_insn>q_int_m_<supf><mode>): ... this.
2050 (mve_vmullbq_poly_m_p<mode>, mve_vmulltq_poly_m_p<mode>): Merge into ...
2051 (@mve_<mve_insn>q_poly_m_<supf><mode>): ... this.
2053 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
2055 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type):
2058 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
2060 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): Fix loop bound.
2061 (binary_acca_int64): Likewise.
2063 2023-08-28 Aldy Hernandez <aldyh@redhat.com>
2065 * range-op-float.cc (fold_range): Handle relations.
2067 2023-08-28 Lulu Cheng <chenglulu@loongson.cn>
2069 * config/loongarch/loongarch.cc (loongarch_expand_conditional_move):
2070 Optimize the function implementation.
2072 2023-08-28 liuhongt <hongtao.liu@intel.com>
2075 * config/i386/sse.md (V48_AVX2): Rename to ..
2076 (V48_128_256): .. this.
2077 (ssefltmodesuffix): Extend to V4SF/V8SF/V2DF/V4DF.
2078 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Change
2079 V48_AVX2 to V48_128_256, also generate vmaskmov{ps,pd} for
2080 integral modes when TARGET_AVX2 is not available.
2081 (<avx_avx2>_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
2082 (maskload<mode><sseintvecmodelower>): Change V48_AVX2 to
2084 (maskstore<mode><sseintvecmodelower>): Ditto.
2086 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2088 * config/riscv/riscv-vsetvl.cc (vsetvl_vtype_change_only_p):
2090 (after_or_same_p): Ditto.
2091 (find_reg_killed_by): Delete.
2092 (has_vsetvl_killed_avl_p): Ditto.
2093 (anticipatable_occurrence_p): Refactor.
2094 (any_set_in_bb_p): Delete.
2095 (count_regno_occurrences): Ditto.
2096 (backward_propagate_worthwhile_p): Ditto.
2097 (demands_can_be_fused_p): Ditto.
2098 (earliest_pred_can_be_fused_p): New function.
2099 (vsetvl_dominated_by_p): Ditto.
2100 (vector_insn_info::parse_insn): Refactor.
2101 (vector_insn_info::merge): Refactor.
2102 (vector_insn_info::dump): Refactor.
2103 (vector_infos_manager::vector_infos_manager): Refactor.
2104 (vector_infos_manager::all_empty_predecessor_p): Delete.
2105 (vector_infos_manager::all_same_avl_p): Ditto.
2106 (vector_infos_manager::create_bitmap_vectors): Refactor.
2107 (vector_infos_manager::free_bitmap_vectors): Refactor.
2108 (vector_infos_manager::dump): Refactor.
2109 (pass_vsetvl::update_block_info): New function.
2110 (enum fusion_type): Ditto.
2111 (pass_vsetvl::get_backward_fusion_type): Delete.
2112 (pass_vsetvl::hard_empty_block_p): Ditto.
2113 (pass_vsetvl::backward_demand_fusion): Ditto.
2114 (pass_vsetvl::forward_demand_fusion): Ditto.
2115 (pass_vsetvl::demand_fusion): Ditto.
2116 (pass_vsetvl::cleanup_illegal_dirty_blocks): Ditto.
2117 (pass_vsetvl::compute_local_properties): Ditto.
2118 (pass_vsetvl::earliest_fusion): New function.
2119 (pass_vsetvl::vsetvl_fusion): Ditto.
2120 (pass_vsetvl::commit_vsetvls): Refactor.
2121 (get_first_vsetvl_before_rvv_insns): Ditto.
2122 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
2123 (pass_vsetvl::cleanup_earliest_vsetvls): New function.
2124 (pass_vsetvl::df_post_optimization): Refactor.
2125 (pass_vsetvl::lazy_vsetvl): Ditto.
2126 * config/riscv/riscv-vsetvl.h: Ditto.
2128 2023-08-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2130 * config/riscv/autovec.md (len_fold_extract_last_<mode>): New pattern.
2131 * config/riscv/riscv-protos.h (enum insn_type): New enum.
2132 (expand_fold_extract_last): New function.
2133 * config/riscv/riscv-v.cc (emit_nonvlmax_slide_insn): Ditto.
2134 (emit_cpop_insn): Ditto.
2135 (emit_nonvlmax_compress_insn): Ditto.
2136 (expand_fold_extract_last): Ditto.
2137 * config/riscv/vector.md: Fix vcpop.m ratio demand.
2139 2023-08-25 Edwin Lu <ewlu@rivosinc.com>
2141 * config/riscv/sync-rvwmo.md: updated types to "multi" or
2142 "atomic" based on number of assembly lines generated
2143 * config/riscv/sync-ztso.md: likewise
2144 * config/riscv/sync.md: likewise
2146 2023-08-25 Jin Ma <jinma@linux.alibaba.com>
2148 * common/config/riscv/riscv-common.cc: Add zfa extension version, which depends on
2150 * config/riscv/constraints.md (zfli): Constrain the floating point number that the
2151 instructions FLI.H/S/D can load.
2152 * config/riscv/iterators.md (ceil): New.
2153 * config/riscv/riscv-opts.h (MASK_ZFA): New.
2155 * config/riscv/riscv-protos.h (riscv_float_const_rtx_index_for_fli): New.
2156 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli): New.
2157 (riscv_cannot_force_const_mem): If instruction FLI.H/S/D can be used, memory is
2159 (riscv_const_insns): Likewise.
2160 (riscv_legitimize_const_move): Likewise.
2161 (riscv_split_64bit_move_p): If instruction FLI.H/S/D can be used, no split is
2163 (riscv_split_doubleword_move): Likewise.
2164 (riscv_output_move): Output the mov instructions in zfa extension.
2165 (riscv_print_operand): Output the floating-point value of the FLI.H/S/D immediate
2167 (riscv_secondary_memory_needed): Likewise.
2168 * config/riscv/riscv.md (fminm<mode>3): New.
2169 (fmaxm<mode>3): New.
2170 (movsidf2_low_rv32): New.
2171 (movsidf2_high_rv32): New.
2172 (movdfsisi3_rv32): New.
2173 (f<quiet_pattern>_quiet<ANYF:mode><X:mode>4_zfa): New.
2174 * config/riscv/riscv.opt: New.
2176 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
2179 * omp-general.cc (omp_runtime_api_procname): New.
2180 (omp_runtime_api_call): Moved here from omp-low.cc, and make
2182 * omp-general.h: Include omp-api.h.
2183 * omp-low.cc (omp_runtime_api_call): Delete this copy.
2185 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
2187 * doc/generic.texi (OpenMP): Document OMP_STRUCTURED_BLOCK.
2188 * doc/gimple.texi (GIMPLE instruction set): Add
2189 GIMPLE_OMP_STRUCTURED_BLOCK.
2190 (GIMPLE_OMP_STRUCTURED_BLOCK): New subsection.
2191 * gimple-low.cc (lower_stmt): Error on GIMPLE_OMP_STRUCTURED_BLOCK.
2192 * gimple-pretty-print.cc (dump_gimple_omp_block): Handle
2193 GIMPLE_OMP_STRUCTURED_BLOCK.
2194 (pp_gimple_stmt_1): Likewise.
2195 * gimple-walk.cc (walk_gimple_stmt): Likewise.
2196 * gimple.cc (gimple_build_omp_structured_block): New.
2197 * gimple.def (GIMPLE_OMP_STRUCTURED_BLOCK): New.
2198 * gimple.h (gimple_build_omp_structured_block): Declare.
2199 (gimple_has_substatements): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
2200 (CASE_GIMPLE_OMP): Likewise.
2201 * gimplify.cc (is_gimple_stmt): Handle OMP_STRUCTURED_BLOCK.
2202 (gimplify_expr): Likewise.
2203 * omp-expand.cc (GIMPLE_OMP_STRUCTURED_BLOCK): Error on
2204 GIMPLE_OMP_STRUCTURED_BLOCK.
2205 * omp-low.cc (scan_omp_1_stmt): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
2206 (lower_omp_1): Likewise.
2207 (diagnose_sb_1): Likewise.
2208 (diagnose_sb_2): Likewise.
2209 * tree-inline.cc (remap_gimple_stmt): Handle
2210 GIMPLE_OMP_STRUCTURED_BLOCK.
2211 (estimate_num_insns): Likewise.
2212 * tree-nested.cc (convert_nonlocal_reference_stmt): Likewise.
2213 (convert_local_reference_stmt): Likewise.
2214 (convert_gimple_call): Likewise.
2215 * tree-pretty-print.cc (dump_generic_node): Handle
2216 OMP_STRUCTURED_BLOCK.
2217 * tree.def (OMP_STRUCTURED_BLOCK): New.
2218 * tree.h (OMP_STRUCTURED_BLOCK_BODY): New.
2220 2023-08-25 Vineet Gupta <vineetg@rivosinc.com>
2222 * config/riscv/riscv.cc (riscv_rtx_costs): Adjust const_int
2223 cost. Add some comments about different constants handling.
2225 2023-08-25 Andrew Pinski <apinski@marvell.com>
2227 * match.pd (`a ? one_zero : one_zero`): Move
2228 below detection of minmax.
2230 2023-08-25 Andrew Pinski <apinski@marvell.com>
2232 * match.pd (`a | C -> C`): New pattern.
2234 2023-08-25 Uros Bizjak <ubizjak@gmail.com>
2236 * caller-save.cc (new_saved_hard_reg):
2237 Rename TRUE/FALSE to true/false.
2238 (setup_save_areas): Ditto.
2239 * gcc.cc (set_collect_gcc_options): Ditto.
2240 (driver::build_multilib_strings): Ditto.
2241 (print_multilib_info): Ditto.
2242 * genautomata.cc (gen_cpu_unit): Ditto.
2243 (gen_query_cpu_unit): Ditto.
2244 (gen_bypass): Ditto.
2245 (gen_excl_set): Ditto.
2246 (gen_presence_absence_set): Ditto.
2247 (gen_presence_set): Ditto.
2248 (gen_final_presence_set): Ditto.
2249 (gen_absence_set): Ditto.
2250 (gen_final_absence_set): Ditto.
2251 (gen_automaton): Ditto.
2252 (gen_regexp_repeat): Ditto.
2253 (gen_regexp_allof): Ditto.
2254 (gen_regexp_oneof): Ditto.
2255 (gen_regexp_sequence): Ditto.
2256 (process_decls): Ditto.
2257 (reserv_sets_are_intersected): Ditto.
2258 (initiate_excl_sets): Ditto.
2259 (form_reserv_sets_list): Ditto.
2260 (check_presence_pattern_sets): Ditto.
2261 (check_absence_pattern_sets): Ditto.
2262 (check_regexp_units_distribution): Ditto.
2263 (check_unit_distributions_to_automata): Ditto.
2264 (create_ainsns): Ditto.
2265 (output_insn_code_cases): Ditto.
2266 (output_internal_dead_lock_func): Ditto.
2267 (form_important_insn_automata_lists): Ditto.
2268 * gengtype-state.cc (read_state_files_list): Ditto.
2269 * gengtype.cc (main): Ditto.
2270 * gimple-array-bounds.cc (array_bounds_checker::check_array_bounds):
2272 * gimple.cc (gimple_build_call_from_tree): Ditto.
2273 (preprocess_case_label_vec_for_gimple): Ditto.
2274 * gimplify.cc (gimplify_call_expr): Ditto.
2275 * ordered-hash-map-tests.cc (test_map_of_int_to_strings): Ditto.
2277 2023-08-25 Richard Biener <rguenther@suse.de>
2279 PR tree-optimization/111137
2280 * tree-vect-data-refs.cc (vect_slp_analyze_load_dependences):
2281 Properly handle grouped stores from other SLP instances.
2283 2023-08-25 Richard Biener <rguenther@suse.de>
2285 * tree-vect-data-refs.cc (vect_slp_analyze_store_dependences):
2286 Split out from vect_slp_analyze_node_dependences, remove
2288 (vect_slp_analyze_load_dependences): Split out from
2289 vect_slp_analyze_node_dependences, adjust comments. Process
2290 queued stores before any disambiguation.
2291 (vect_slp_analyze_node_dependences): Remove.
2292 (vect_slp_analyze_instance_dependence): Adjust.
2294 2023-08-25 Aldy Hernandez <aldyh@redhat.com>
2296 * range-op-float.cc (frelop_early_resolve): Rewrite for better NAN
2298 (operator_not_equal::fold_range): Adjust for relations.
2299 (operator_lt::fold_range): Same.
2300 (operator_gt::fold_range): Same.
2301 (foperator_unordered_equal::fold_range): Same.
2302 (foperator_unordered_lt::fold_range): Same.
2303 (foperator_unordered_le::fold_range): Same.
2304 (foperator_unordered_gt::fold_range): Same.
2305 (foperator_unordered_ge::fold_range): Same.
2307 2023-08-25 Richard Biener <rguenther@suse.de>
2309 PR tree-optimization/111136
2310 * tree-vect-loop.cc (vect_dissolve_slp_only_groups): For
2311 stores force STMT_VINFO_STRIDED_P and also duplicate that
2314 2023-08-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2316 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_local_properties):
2319 2023-08-25 liuhongt <hongtao.liu@intel.com>
2321 * config/i386/sse.md (vec_set<mode>): Removed.
2322 (V_128H): Merge into ..
2324 (V_256H): Merge into ..
2326 (V_512): Add V32HF, V32BF.
2327 (*ssse3_palignr<mode>_perm): Adjust mode iterator from V_128H
2329 (vcond<mode><sseintvecmodelower>): Removed
2330 (vcondu<mode><sseintvecmodelower>): Removed.
2331 (avx_vbroadcastf128_<mode>): Refator from V_256H to V_256.
2333 2023-08-25 Hongyu Wang <hongyu.wang@intel.com>
2336 * config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode>_maskz):
2337 Adjust paramter order.
2339 2023-08-24 Uros Bizjak <ubizjak@gmail.com>
2342 * config/i386/sse.md (*sse2_movq128_<mode>_1): New insn pattern.
2344 2023-08-24 David Malcolm <dmalcolm@redhat.com>
2347 * doc/invoke.texi (Static Analyzer Options): Add "strcat" to the
2348 list of functions known to the analyzer.
2350 2023-08-24 Richard Biener <rguenther@suse.de>
2352 PR tree-optimization/111123
2353 * tree-ssa-ccp.cc (pass_fold_builtins::execute): Do not
2354 remove indirect clobbers here ...
2355 * tree-outof-ssa.cc (rewrite_out_of_ssa): ... but here.
2356 (remove_indirect_clobbers): New function.
2358 2023-08-24 Jan Hubicka <jh@suse.cz>
2360 * cfg.h (struct control_flow_graph): New field full_profile.
2361 * auto-profile.cc (afdo_annotate_cfg): Set full_profile to true.
2362 * cfg.cc (init_flow): Set full_profile to false.
2363 * graphite.cc (graphite_transform_loops): Set full_profile to false.
2364 * lto-streamer-in.cc (input_cfg): Initialize full_profile flag.
2365 * predict.cc (pass_profile::execute): Set full_profile to true.
2366 * symtab-thunks.cc (expand_thunk): Set full_profile to true.
2367 * tree-cfg.cc (gimple_verify_flow_info): Verify that profile is full
2368 if full_profile is set.
2369 * tree-inline.cc (initialize_cfun): Initialize full_profile.
2370 (expand_call_inline): Combine full_profile.
2372 2023-08-24 Richard Biener <rguenther@suse.de>
2374 * tree-vect-slp.cc (vect_build_slp_tree_1): Rename
2375 load_p to ldst_p, fix mistakes and rely on
2376 STMT_VINFO_DATA_REF.
2378 2023-08-24 Jan Hubicka <jh@suse.cz>
2380 * gimple-harden-conditionals.cc (insert_check_and_trap): Set count
2381 of newly build trap bb.
2383 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2385 * config/riscv/riscv.cc (riscv_preferred_else_value): Remove it since
2386 it forbid COND_LEN_FMS/COND_LEN_FNMS STMT fold.
2387 (TARGET_PREFERRED_ELSE_VALUE): Ditto.
2389 2023-08-24 Robin Dapp <rdapp.gcc@gmail.com>
2391 * common/config/riscv/riscv-common.cc: Add -fsched-pressure.
2392 * config/riscv/riscv.cc (riscv_option_override): Set sched
2395 2023-08-24 Robin Dapp <rdapp@ventanamicro.com>
2397 * config/riscv/riscv.cc (riscv_print_operand): Allow vk operand.
2399 2023-08-24 Richard Biener <rguenther@suse.de>
2401 PR tree-optimization/111125
2402 * tree-vect-slp.cc (vect_slp_function): Split at novector
2403 loop entry, do not push blocks in novector loops.
2405 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
2407 * doc/extend.texi: Document the C [[__extension__ ...]] construct.
2409 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2411 * genmatch.cc (decision_tree::gen): Support
2412 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
2413 * gimple-match-exports.cc (gimple_simplify): Ditto.
2414 (gimple_resimplify6): New function.
2415 (gimple_resimplify7): New function.
2416 (gimple_match_op::resimplify): Support
2417 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
2418 (convert_conditional_op): Ditto.
2419 (build_call_internal): Ditto.
2420 (try_conditional_simplification): Ditto.
2421 (gimple_extract): Ditto.
2422 * gimple-match.h (gimple_match_cond::gimple_match_cond): Ditto.
2423 * internal-fn.cc (CASE): Ditto.
2425 2023-08-24 Richard Biener <rguenther@suse.de>
2427 PR tree-optimization/111115
2428 * tree-vectorizer.h (vect_slp_child_index_for_operand): New.
2429 * tree-vect-data-refs.cc (can_group_stmts_p): Also group
2431 * tree-vect-slp.cc (arg3_arg2_map): New.
2432 (vect_get_operand_map): Handle IFN_MASK_STORE.
2433 (vect_slp_child_index_for_operand): New function.
2434 (vect_build_slp_tree_1): Handle statements with no LHS,
2436 (vect_remove_slp_scalar_calls): Likewise.
2437 * tree-vect-stmts.cc (vect_check_store_rhs): Lookup the
2438 SLP child corresponding to the ifn value index.
2439 (vectorizable_store): Likewise for the mask index. Support
2441 (vectorizable_load): Lookup the SLP child corresponding to the
2444 2023-08-24 Richard Biener <rguenther@suse.de>
2446 PR tree-optimization/111125
2447 * tree-vect-slp.cc (vectorizable_bb_reduc_epilogue): Account
2448 for the remain_defs processing.
2450 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
2452 * config/aarch64/aarch64.cc: Include ssa.h.
2453 (aarch64_multiply_add_p): Require the second operand of an
2454 Advanced SIMD subtraction to be a multiplication. Assume that
2455 such an operation won't be fused if the second operand is used
2456 multiple times and if the first operand is also a multiplication.
2458 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2460 * tree-vect-loop.cc (vectorizable_reduction): Apply
2461 LEN_FOLD_EXTRACT_LAST.
2462 * tree-vect-stmts.cc (vectorizable_condition): Ditto.
2464 2023-08-24 Richard Biener <rguenther@suse.de>
2466 PR tree-optimization/111128
2467 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
2468 Emit external shift operand inline if we promoted it with
2469 another pattern stmt.
2471 2023-08-24 Pan Li <pan2.li@intel.com>
2473 * config/riscv/autovec.md: Fix typo.
2475 2023-08-24 Pan Li <pan2.li@intel.com>
2477 * config/riscv/riscv-vector-builtins-bases.cc
2478 (class binop_frm): Removed.
2479 (class reverse_binop_frm): Ditto.
2480 (class widen_binop_frm): Ditto.
2481 (class vfmacc_frm): Ditto.
2482 (class vfnmacc_frm): Ditto.
2483 (class vfmsac_frm): Ditto.
2484 (class vfnmsac_frm): Ditto.
2485 (class vfmadd_frm): Ditto.
2486 (class vfnmadd_frm): Ditto.
2487 (class vfmsub_frm): Ditto.
2488 (class vfnmsub_frm): Ditto.
2489 (class vfwmacc_frm): Ditto.
2490 (class vfwnmacc_frm): Ditto.
2491 (class vfwmsac_frm): Ditto.
2492 (class vfwnmsac_frm): Ditto.
2493 (class unop_frm): Ditto.
2494 (class vfrec7_frm): Ditto.
2495 (class binop): Add frm_op_type template arg.
2496 (class unop): Ditto.
2497 (class widen_binop): Ditto.
2498 (class widen_binop_fp): Ditto.
2499 (class reverse_binop): Ditto.
2500 (class vfmacc): Ditto.
2501 (class vfnmsac): Ditto.
2502 (class vfmadd): Ditto.
2503 (class vfnmsub): Ditto.
2504 (class vfnmacc): Ditto.
2505 (class vfmsac): Ditto.
2506 (class vfnmadd): Ditto.
2507 (class vfmsub): Ditto.
2508 (class vfwmacc): Ditto.
2509 (class vfwnmacc): Ditto.
2510 (class vfwmsac): Ditto.
2511 (class vfwnmsac): Ditto.
2512 (class float_misc): Ditto.
2514 2023-08-24 Andrew Pinski <apinski@marvell.com>
2516 PR tree-optimization/111109
2517 * match.pd (ior(cond,cond), ior(vec_cond,vec_cond)):
2518 Add check to make sure cmp and icmp are inverse.
2520 2023-08-24 Andrew Pinski <apinski@marvell.com>
2522 PR tree-optimization/95929
2523 * match.pd (convert?(-a)): New pattern
2524 for 1bit integer types.
2526 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
2529 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
2531 * common/config/i386/cpuinfo.h (get_available_features):
2532 Add avx10_set and version and detect avx10.1.
2533 (cpu_indicator_init): Handle avx10.1-512.
2534 * common/config/i386/i386-common.cc
2535 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
2536 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
2537 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
2538 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
2539 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
2540 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
2542 * common/config/i386/i386-cpuinfo.h (enum processor_features):
2543 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
2544 FEATURE_AVX10_512BIT.
2545 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
2546 AVX10_512BIT, AVX10_1 and AVX10_1_512.
2547 * config/i386/constraints.md (Yk): Add AVX10_1.
2550 * config/i386/cpuid.h (bit_AVX10): New.
2551 (bit_AVX10_256): Ditto.
2552 (bit_AVX10_512): Ditto.
2553 * config/i386/i386-c.cc (ix86_target_macros_internal):
2554 Define AVX10_512BIT and AVX10_1.
2555 * config/i386/i386-isa.def
2556 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
2557 (AVX10_1): Add DEF_PTA(AVX10_1).
2558 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
2559 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
2561 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
2562 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
2563 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
2564 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
2565 (ix86_conditional_register_usage): Ditto.
2566 (ix86_hard_regno_mode_ok): Ditto.
2567 (ix86_rtx_costs): Ditto.
2568 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
2569 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
2571 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
2572 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
2573 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
2576 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
2579 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
2581 * common/config/i386/i386-common.cc
2582 (ix86_check_avx10): New function to check isa_flags and
2583 isa_flags_explicit to emit warning when AVX10 is enabled
2585 (ix86_check_avx512): New function to check isa_flags and
2586 isa_flags_explicit to emit warning when AVX512 is enabled
2588 (ix86_handle_option): Do not change the flags when warning
2590 * config/i386/driver-i386.cc (host_detect_local_cpu):
2591 Do not append -mno-avx10.1 for -march=native.
2593 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
2596 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
2598 * common/config/i386/i386-common.cc
2599 (ix86_check_avx10_vector_width): New function to check isa_flags
2600 to emit a warning when there is a conflict in AVX10 options for
2602 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
2603 * config/i386/driver-i386.cc (host_detect_local_cpu):
2604 Do not append -mno-avx10-max-512bit for -march=native.
2606 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
2609 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
2611 * config/i386/avx512vldqintrin.h: Remove target attribute.
2612 * config/i386/i386-builtin.def (BDESC):
2613 Add OPTION_MASK_ISA2_AVX10_1.
2614 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
2615 * config/i386/i386-expand.cc
2616 (ix86_check_builtin_isa_match): Ditto.
2617 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
2618 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
2619 and avx10_1_or_avx512vl.
2620 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
2621 (VF1_128_256VLDQ_AVX10_1): Ditto.
2622 (VI8_AVX512VLDQ_AVX10_1): Ditto.
2623 (<sse>_andnot<mode>3<mask_name>):
2624 Add TARGET_AVX10_1 and change isa attr from avx512dq to
2625 avx10_1_or_avx512dq.
2626 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
2627 avx512vl to avx10_1_or_avx512vl.
2628 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
2629 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
2630 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
2632 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
2634 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
2635 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
2636 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
2638 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
2639 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
2640 Remove target check.
2641 (avx512dq_mul<mode>3<mask_name>): Ditto.
2642 (*avx512dq_mul<mode>3<mask_name>): Ditto.
2643 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
2644 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
2645 Remove target check.
2646 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
2647 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
2648 Remove target check.
2649 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
2650 (mask_avx512vl_condition): Ditto.
2653 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
2656 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
2658 * config/i386/avx512vldqintrin.h: Remove target attribute.
2659 * config/i386/i386-builtin.def (BDESC):
2660 Add OPTION_MASK_ISA2_AVX10_1.
2661 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
2662 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
2663 (VI48_AVX512VLDQ_AVX10_1): Ditto.
2664 (VF2_AVX512VL): Remove.
2665 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
2667 (*<code><mode>3<mask_name>): Change isa attribute to
2668 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
2669 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
2670 to avx10_1_or_avx512vl.
2671 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
2672 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
2673 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
2675 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
2676 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
2677 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
2679 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
2680 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
2681 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
2682 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
2683 (float<floatunssuffix>v4div4sf2<mask_name>):
2685 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
2686 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
2687 (float<floatunssuffix>v2div2sf2): Ditto.
2688 (float<floatunssuffix>v2div2sf2_mask): Ditto.
2689 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
2690 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
2691 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
2692 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
2693 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
2694 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
2695 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
2696 Change when constraint is enabled.
2698 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
2701 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
2703 * config/i386/avx512vldqintrin.h: Remove target attribute.
2704 * config/i386/i386-builtin.def (BDESC):
2705 Add OPTION_MASK_ISA2_AVX10_1.
2706 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
2707 (VFH_AVX512VLDQ_AVX10_1): Ditto.
2708 (VF1_AVX512VLDQ_AVX10_1): Ditto.
2709 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
2710 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
2711 (vec_pack<floatprefix>_float_<mode>): Change iterator to
2712 VI8_AVX512VLDQ_AVX10_1. Remove target check.
2713 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
2714 VF1_AVX512VLDQ_AVX10_1. Remove target check.
2715 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
2716 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
2717 (avx512vl_vextractf128<mode>): Change iterator to
2718 VI48F_256_DQVL_AVX10_1. Remove target check.
2719 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
2720 (vec_extract_hi_<mode>): Ditto.
2721 (avx512vl_vinsert<mode>): Ditto.
2722 (vec_set_lo_<mode><mask_name>): Ditto.
2723 (vec_set_hi_<mode><mask_name>): Ditto.
2724 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
2725 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
2726 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
2727 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
2728 * config/i386/subst.md (mask_avx512dq_condition): Add
2730 (mask_scalar_merge): Ditto.
2732 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
2735 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
2738 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
2741 2023-08-24 Richard Biener <rguenther@suse.de>
2744 * dwarf2out.cc (prune_unused_types_walk): Handle
2745 DW_TAG_restrict_type, DW_TAG_shared_type, DW_TAG_atomic_type,
2746 DW_TAG_immutable_type, DW_TAG_coarray_type, DW_TAG_unspecified_type
2747 and DW_TAG_dynamic_type as to only output them when referenced.
2749 2023-08-24 liuhongt <hongtao.liu@intel.com>
2751 * config/i386/i386.cc (ix86_invalid_conversion): Adjust GCC
2754 2023-08-24 liuhongt <hongtao.liu@intel.com>
2756 * common/config/i386/i386-common.cc (processor_names): Add new
2757 member graniterapids-s and arrowlake-s.
2758 * config/i386/i386-options.cc (processor_alias_table): Update
2759 table with PROCESSOR_ARROWLAKE_S and
2760 PROCESSOR_GRANITERAPIDS_D.
2761 (m_GRANITERAPID_D): New macro.
2762 (m_ARROWLAKE_S): Ditto.
2763 (m_CORE_AVX512): Add m_GRANITERAPIDS_D.
2764 (processor_cost_table): Add icelake_cost for
2765 PROCESSOR_GRANITERAPIDS_D and alderlake_cost for
2766 PROCESSOR_ARROWLAKE_S.
2767 * config/i386/x86-tune.def: Hanlde m_ARROWLAKE_S same as
2769 * config/i386/i386.h (enum processor_type): Add new member
2770 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S.
2771 * config/i386/i386-c.cc (ix86_target_macros_internal): Handle
2772 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S
2774 2023-08-23 Jivan Hakobyan <jivanhakobyan9@gmail.com>
2776 * lra-eliminations.cc (eliminate_regs_in_insn): Use equivalences to
2777 to help simplify code further.
2779 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
2781 * gimple-range-fold.cc (fold_using_range::range_of_phi): Tweak output.
2782 * gimple-range-phi.cc (phi_group::phi_group): Remove unused members.
2783 Initialize using a range instead of value and edge.
2784 (phi_group::calculate_using_modifier): Use initializer value and
2785 process for relations after trying for iteration convergence.
2786 (phi_group::refine_using_relation): Use initializer range.
2787 (phi_group::dump): Rework the dump output.
2788 (phi_analyzer::process_phi): Allow multiple constant initilizers.
2789 Dump groups immediately as created.
2790 (phi_analyzer::dump): Tweak output.
2791 * gimple-range-phi.h (phi_group::phi_group): Adjust prototype.
2792 (phi_group::initial_value): Delete.
2793 (phi_group::refine_using_relation): Adjust prototype.
2794 (phi_group::m_initial_value): Delete.
2795 (phi_group::m_initial_edge): Delete.
2796 (phi_group::m_vr): Use int_range_max.
2797 * tree-vrp.cc (execute_ranger_vrp): Don't dump phi groups.
2799 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
2801 * gimple-range-phi.cc (phi_analyzer::operator[]): Return NULL if
2802 no group was created.
2803 (phi_analyzer::process_phi): Do not create groups of one phi node.
2805 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
2807 * target.def (gen_ccmp_first, gen_ccmp_next): Use rtx_code for
2808 CODE, CMP_CODE and BIT_CODE arguments.
2809 * config/aarch64/aarch64.cc (aarch64_gen_ccmp_first): Likewise.
2810 (aarch64_gen_ccmp_next): Likewise.
2811 * doc/tm.texi: Regenerated.
2813 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
2815 * coretypes.h (rtx_code): Add forward declaration.
2816 * rtl.h (rtx_code): Make compatible with forward declaration.
2818 2023-08-23 Uros Bizjak <ubizjak@gmail.com>
2821 * config/i386/i386.md (*concat<any_or_plus:mode><dwi>3_3):
2822 Merge pattern from *concatditi3_3 and *concatsidi3_3 using
2823 DWIH mode iterator. Disable (=&r,m,m) alternative for
2825 (*concat<any_or_plus:mode><dwi>3_3): Disable (=&r,m,m)
2826 alternative for 32-bit targets.
2828 2023-08-23 Zhangjin Liao <liaozhangjin@eswincomputing.com>
2830 * config/riscv/bitmanip.md (*<bitmanip_optab>disi2_sext): Add a more
2831 appropriate type attribute.
2833 2023-08-23 Lehua Ding <lehua.ding@rivai.ai>
2835 * config/riscv/autovec-opt.md (*cond_abs<mode>): New combine pattern.
2836 (*copysign<mode>_neg): Ditto.
2837 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Adjust.
2838 (<optab><mode>2): Ditto.
2839 (cond_<optab><mode>): New.
2840 (cond_len_<optab><mode>): Ditto.
2841 * config/riscv/riscv-protos.h (enum insn_type): New.
2842 (expand_cond_len_unop): New helper func.
2843 * config/riscv/riscv-v.cc (shuffle_merge_patterns): Adjust.
2844 (expand_cond_len_unop): New helper func.
2846 2023-08-23 Jan Hubicka <jh@suse.cz>
2848 * tree-ssa-loop-ch.cc (enum ch_decision): Fix comment.
2849 (should_duplicate_loop_header_p): Fix return value for static exits.
2850 (ch_base::copy_headers): Improve handling of ch_possible_zero_cost.
2852 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
2854 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
2855 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
2856 and update the final nest accordingly.
2858 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
2860 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
2861 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
2862 and update the final nest accordingly.
2864 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
2866 * tree-vect-stmts.cc (vectorizable_store): Remove vec oprnds,
2867 adjust vec result_chain, vec_oprnd with auto_vec, and adjust
2868 gvec_oprnds with auto_delete_vec.
2870 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2872 * config/riscv/riscv-vsetvl.cc
2873 (pass_vsetvl::global_eliminate_vsetvl_insn): Fix potential ICE.
2875 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2877 * config/riscv/riscv-vsetvl.cc (ge_sew_ratio_unavailable_p):
2879 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Ditto.
2881 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2883 * config/riscv/vector.md: Add attribute.
2885 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2887 * config/riscv/riscv-vsetvl.cc (change_insn): Clang format.
2888 (vector_infos_manager::all_same_ratio_p): Ditto.
2889 (vector_infos_manager::all_same_avl_p): Ditto.
2890 (pass_vsetvl::refine_vsetvls): Ditto.
2891 (pass_vsetvl::cleanup_vsetvls): Ditto.
2892 (pass_vsetvl::commit_vsetvls): Ditto.
2893 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
2894 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
2895 (pass_vsetvl::compute_probabilities): Ditto.
2897 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2899 * config/riscv/t-riscv: Add riscv-vsetvl.def
2901 2023-08-22 Vineet Gupta <vineetg@rivosinc.com>
2903 * config/riscv/riscv.opt: Add --param names
2904 riscv-autovec-preference and riscv-autovec-lmul
2906 2023-08-22 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
2908 * config/riscv/t-linux: Add MULTIARCH_DIRNAME.
2910 2023-08-22 Tobias Burnus <tobias@codesourcery.com>
2912 * tree-core.h (enum omp_clause_defaultmap_kind): Add
2913 OMP_CLAUSE_DEFAULTMAP_CATEGORY_ALL.
2914 * gimplify.cc (gimplify_scan_omp_clauses): Handle it.
2915 * tree-pretty-print.cc (dump_omp_clause): Likewise.
2917 2023-08-22 Jakub Jelinek <jakub@redhat.com>
2920 * doc/extend.texi (_Float<n>): Drop obsolete sentence that the
2921 types aren't supported in C++.
2923 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2925 * doc/md.texi: Add LEN_FOLD_EXTRACT_LAST pattern.
2926 * internal-fn.cc (fold_len_extract_direct): Ditto.
2927 (expand_fold_len_extract_optab_fn): Ditto.
2928 (direct_fold_len_extract_optab_supported_p): Ditto.
2929 * internal-fn.def (LEN_FOLD_EXTRACT_LAST): Ditto.
2930 * optabs.def (OPTAB_D): Ditto.
2932 2023-08-22 Richard Biener <rguenther@suse.de>
2934 * tree-vect-stmts.cc (vectorizable_store): Do not bump
2935 DR_GROUP_STORE_COUNT here. Remove early out.
2936 (vect_transform_stmt): Only call vectorizable_store on
2937 the last element of an interleaving chain.
2939 2023-08-22 Richard Biener <rguenther@suse.de>
2941 PR tree-optimization/94864
2942 PR tree-optimization/94865
2943 PR tree-optimization/93080
2944 * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): New pattern
2945 for vector insertion from vector extraction.
2947 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2948 Kewen.Lin <linkw@linux.ibm.com>
2950 * tree-vect-loop.cc (vect_verify_loop_lens): Add exists check.
2951 (vectorizable_live_operation): Add live vectorization for length loop
2954 2023-08-22 David Malcolm <dmalcolm@redhat.com>
2957 * doc/invoke.texi: Remove -Wanalyzer-unterminated-string.
2959 2023-08-22 Pan Li <pan2.li@intel.com>
2961 * config/riscv/riscv-vector-builtins-bases.cc
2962 (vfwredusum_frm_obj): New declaration.
2964 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
2965 * config/riscv/riscv-vector-builtins-functions.def
2966 (vfwredusum_frm): New intrinsic function def.
2968 2023-08-21 David Faust <david.faust@oracle.com>
2970 * config/bpf/bpf.md (neg): Second operand must be a register.
2972 2023-08-21 Edwin Lu <ewlu@rivosinc.com>
2974 * config/riscv/bitmanip.md: Added bitmanip type to insns
2975 that are missing types.
2977 2023-08-21 Jeff Law <jlaw@ventanamicro.com>
2979 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Avoid extraenous
2982 2023-08-21 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
2984 * config/aarch64/falkor-tag-collision-avoidance.cc (dump_insn_list):
2985 Fix format specifier.
2987 2023-08-21 Aldy Hernandez <aldyh@redhat.com>
2989 * value-range.cc (frange::union_nans): Return false if nothing
2991 (range_tests_floats): New test.
2993 2023-08-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2995 PR tree-optimization/111048
2996 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): Set arg_npatterns
2998 (fold_vec_perm_cst): Remove workaround and again call
2999 valid_mask_fold_vec_perm_cst_p for both VLS and VLA vectors.
3000 (test_fold_vec_perm_cst::test_nunits_min_4): Add test-case.
3002 2023-08-21 Richard Biener <rguenther@suse.de>
3004 PR tree-optimization/111082
3005 * tree-vect-slp.cc (vectorize_slp_instance_root_stmt): Only
3006 pun operations that can overflow.
3008 2023-08-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3010 * lcm.cc (compute_antinout_edge): Export as global use.
3011 (compute_earliest): Ditto.
3012 (compute_rev_insert_delete): Ditto.
3013 * lcm.h (compute_antinout_edge): Ditto.
3014 (compute_earliest): Ditto.
3016 2023-08-21 Richard Biener <rguenther@suse.de>
3018 PR tree-optimization/111070
3019 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check we have
3020 an SSA name before checking SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
3022 2023-08-21 Andrew Pinski <apinski@marvell.com>
3024 PR tree-optimization/111002
3025 * match.pd (view_convert(vec_cond(a,b,c))): New pattern.
3027 2023-08-21 liuhongt <hongtao.liu@intel.com>
3029 * common/config/i386/cpuinfo.h (get_intel_cpu): Detect
3031 * common/config/i386/i386-common.cc (alias_table): Support
3032 -march=gracemont as an alias of -march=alderlake.
3034 2023-08-20 Uros Bizjak <ubizjak@gmail.com>
3036 * config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1]
3037 instead of src in the call to ix86_expand_sse_cmp.
3038 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not
3039 force operands[1] to a register.
3040 (<any_extend:insn>v4hiv4si2): Ditto.
3041 (<any_extend:insn>v2siv2di2): Ditto.
3043 2023-08-20 Andrew Pinski <apinski@marvell.com>
3045 PR tree-optimization/111006
3046 PR tree-optimization/110986
3047 * match.pd: (op(vec_cond(a,b,c))): Handle convert for op.
3049 2023-08-20 Eric Gallager <egallager@gcc.gnu.org>
3052 * Makefile.in: improve error message when /usr/include is
3055 2023-08-19 Tobias Burnus <tobias@codesourcery.com>
3057 PR middle-end/111017
3058 * omp-expand.cc (expand_omp_for_init_vars): Pass after=true
3059 to expand_omp_build_cond for 'factor != 0' condition, resulting
3060 in pre-r12-5295-g47de0b56ee455e code for the gimple insert.
3062 2023-08-19 Guo Jie <guojie@loongson.cn>
3063 Lulu Cheng <chenglulu@loongson.cn>
3065 * config/loongarch/t-loongarch: Add loongarch-driver.h into
3066 TM_H. Add loongarch-def.h and loongarch-tune.h into
3069 2023-08-18 Uros Bizjak <ubizjak@gmail.com>
3072 * config/i386/i386-expand.cc (ix86_split_mmx_punpck):
3073 Also handle V2QImode.
3074 (ix86_expand_sse_extend): New function.
3075 * config/i386/i386-protos.h (ix86_expand_sse_extend): New prototype.
3076 * config/i386/mmx.md (<any_extend:insn>v4qiv4hi2): Enable for
3077 TARGET_SSE2. Expand through ix86_expand_sse_extend for !TARGET_SSE4_1.
3078 (<any_extend:insn>v2hiv2si2): Ditto.
3079 (<any_extend:insn>v2qiv2hi2): Ditto.
3080 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Ditto.
3081 (<any_extend:insn>v4hiv4si2): Ditto.
3082 (<any_extend:insn>v2siv2di2): Ditto.
3084 2023-08-18 Aldy Hernandez <aldyh@redhat.com>
3087 * value-range.cc (irange::union_bitmask): Return FALSE if updated
3088 bitmask is semantically equivalent to the original mask.
3089 (irange::intersect_bitmask): Same.
3090 (irange::get_bitmask): Add comment.
3092 2023-08-18 Richard Biener <rguenther@suse.de>
3094 PR tree-optimization/111019
3095 * tree-ssa-loop-im.cc (gather_mem_refs_stmt): When canonicalizing
3096 also scrap base and offset in case the ref is indirect.
3098 2023-08-18 Jose E. Marchesi <jose.marchesi@oracle.com>
3100 * config/bpf/bpf.opt (mframe-limit): Set default to 32767.
3102 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
3105 * Makefile.in (TM_P_H): Add $(TREE_H) as dependence.
3107 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
3109 * tree-vect-stmts.cc (vect_build_scatter_store_calls): New, factor
3111 (vectorizable_store): ... here.
3113 2023-08-18 Richard Biener <rguenther@suse.de>
3115 PR tree-optimization/111048
3116 * fold-const.cc (fold_vec_perm_cst): Check for non-VLA
3119 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
3122 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
3125 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
3127 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
3128 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
3129 and update the final nest accordingly.
3131 2023-08-18 Andrew Pinski <apinski@marvell.com>
3133 * doc/md.texi (Standard patterns): Document cond_neg, cond_one_cmpl,
3134 cond_len_neg and cond_len_one_cmpl.
3136 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
3138 * config/riscv/iterators.md (TARGET_HARD_FLOAT || TARGET_ZFINX): New.
3139 * config/riscv/pic.md (*local_pic_load<ANYF:mode>): Change ANYF.
3140 (*local_pic_load<ANYLSF:mode>): To ANYLSF.
3141 (*local_pic_load_32d<ANYF:mode>): Ditto.
3142 (*local_pic_load_32d<ANYLSF:mode>): Ditto.
3143 (*local_pic_store<ANYF:mode>): Ditto.
3144 (*local_pic_store<ANYLSF:mode>): Ditto.
3145 (*local_pic_store_32d<ANYF:mode>): Ditto.
3146 (*local_pic_store_32d<ANYLSF:mode>): Ditto.
3148 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
3149 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
3151 * config/riscv/predicates.md (vector_const_0_operand): New.
3152 * config/riscv/vector.md (*pred_broadcast<mode>_zero): Ditto.
3154 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
3156 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion):
3159 2023-08-17 Andrew MacLeod <amacleod@redhat.com>
3161 PR tree-optimization/111009
3162 * range-op.cc (operator_addr_expr::op1_range): Be more restrictive.
3164 2023-08-17 Vladimir N. Makarov <vmakarov@redhat.com>
3166 * lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Moving
3167 slots_num initialization from here ...
3168 (lra_spill): ... to here before the 1st call of
3169 assign_stack_slot_num_and_sort_pseudos. Add the 2nd call after
3172 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
3175 * doc/invoke.texi (Option Summary): Mention
3176 -Wcompare-distinct-pointer-types under `Warning Options'.
3177 (Warning Options): Document -Wcompare-distinct-pointer-types.
3179 2023-08-17 Jan-Benedict Glaw <jbglaw@lug-owl.de>
3181 * recog.cc (memory_address_addr_space_p): Mark possibly unused
3184 2023-08-17 Richard Biener <rguenther@suse.de>
3186 PR tree-optimization/111039
3187 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for
3188 SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
3190 2023-08-17 Alex Coplan <alex.coplan@arm.com>
3192 * doc/rtl.texi: Fix up sample code for RTL-SSA insn changes.
3194 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
3197 * config/bpf/bpf.cc (bpf_attribute_table): Add entry for the
3198 `naked' function attribute.
3199 (bpf_warn_func_return): New function.
3200 (TARGET_WARN_FUNC_RETURN): Define.
3201 (bpf_expand_prologue): Add preventive comment.
3202 (bpf_expand_epilogue): Likewise.
3203 * doc/extend.texi (BPF Function Attributes): Document the `naked'
3206 2023-08-17 Richard Biener <rguenther@suse.de>
3208 * tree-vect-slp.cc (vect_slp_check_for_roots): Use
3209 !needs_fold_left_reduction_p to decide whether we can
3210 handle the reduction with association.
3211 (vectorize_slp_instance_root_stmt): For TYPE_OVERFLOW_UNDEFINED
3212 reductions perform all arithmetic in an unsigned type.
3214 2023-08-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
3216 * configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v
3218 * configure: Regenerate.
3220 2023-08-17 Pan Li <pan2.li@intel.com>
3222 * config/riscv/riscv-vector-builtins-bases.cc
3223 (widen_freducop): Add frm_opt_type template arg.
3224 (vfwredosum_frm_obj): New declaration.
3226 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3227 * config/riscv/riscv-vector-builtins-functions.def
3228 (vfwredosum_frm): New intrinsic function def.
3230 2023-08-17 Pan Li <pan2.li@intel.com>
3232 * config/riscv/riscv-vector-builtins-bases.cc
3233 (vfredosum_frm_obj): New declaration.
3235 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3236 * config/riscv/riscv-vector-builtins-functions.def
3237 (vfredosum_frm): New intrinsic function def.
3239 2023-08-17 Pan Li <pan2.li@intel.com>
3241 * config/riscv/riscv-vector-builtins-bases.cc
3242 (class freducop): Add frm_op_type template arg.
3243 (vfredusum_frm_obj): New declaration.
3245 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3246 * config/riscv/riscv-vector-builtins-functions.def
3247 (vfredusum_frm): New intrinsic function def.
3248 * config/riscv/riscv-vector-builtins-shapes.cc
3249 (struct reduc_alu_frm_def): New class for frm shape.
3250 (SHAPE): New declaration.
3251 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
3253 2023-08-17 Pan Li <pan2.li@intel.com>
3255 * config/riscv/riscv-vector-builtins-bases.cc
3256 (class vfncvt_f): Add frm_op_type template arg.
3257 (vfncvt_f_frm_obj): New declaration.
3259 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3260 * config/riscv/riscv-vector-builtins-functions.def
3261 (vfncvt_f_frm): New intrinsic function def.
3263 2023-08-17 Pan Li <pan2.li@intel.com>
3265 * config/riscv/riscv-vector-builtins-bases.cc
3266 (vfncvt_xu_frm_obj): New declaration.
3268 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3269 * config/riscv/riscv-vector-builtins-functions.def
3270 (vfncvt_xu_frm): New intrinsic function def.
3272 2023-08-17 Pan Li <pan2.li@intel.com>
3274 * config/riscv/riscv-vector-builtins-bases.cc
3275 (class vfncvt_x): Add frm_op_type template arg.
3276 (BASE): New declaration.
3277 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3278 * config/riscv/riscv-vector-builtins-functions.def
3279 (vfncvt_x_frm): New intrinsic function def.
3280 * config/riscv/riscv-vector-builtins-shapes.cc
3281 (struct narrow_alu_frm_def): New shape function for frm.
3282 (SHAPE): New declaration.
3283 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
3285 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
3287 * config/i386/avx512vldqintrin.h: Remove target attribute.
3288 * config/i386/i386-builtin.def (BDESC):
3289 Add OPTION_MASK_ISA2_AVX10_1.
3290 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
3291 (VFH_AVX512VLDQ_AVX10_1): Ditto.
3292 (VF1_AVX512VLDQ_AVX10_1): Ditto.
3293 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
3294 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
3295 (vec_pack<floatprefix>_float_<mode>): Change iterator to
3296 VI8_AVX512VLDQ_AVX10_1. Remove target check.
3297 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
3298 VF1_AVX512VLDQ_AVX10_1. Remove target check.
3299 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
3300 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
3301 (avx512vl_vextractf128<mode>): Change iterator to
3302 VI48F_256_DQVL_AVX10_1. Remove target check.
3303 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
3304 (vec_extract_hi_<mode>): Ditto.
3305 (avx512vl_vinsert<mode>): Ditto.
3306 (vec_set_lo_<mode><mask_name>): Ditto.
3307 (vec_set_hi_<mode><mask_name>): Ditto.
3308 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
3309 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
3310 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
3311 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
3312 * config/i386/subst.md (mask_avx512dq_condition): Add
3314 (mask_scalar_merge): Ditto.
3316 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
3318 * config/i386/avx512vldqintrin.h: Remove target attribute.
3319 * config/i386/i386-builtin.def (BDESC):
3320 Add OPTION_MASK_ISA2_AVX10_1.
3321 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
3322 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
3323 (VI48_AVX512VLDQ_AVX10_1): Ditto.
3324 (VF2_AVX512VL): Remove.
3325 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
3327 (*<code><mode>3<mask_name>): Change isa attribute to
3328 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
3329 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
3330 to avx10_1_or_avx512vl.
3331 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
3332 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
3333 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
3335 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
3336 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
3337 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
3339 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
3340 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
3341 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
3342 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
3343 (float<floatunssuffix>v4div4sf2<mask_name>):
3345 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
3346 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
3347 (float<floatunssuffix>v2div2sf2): Ditto.
3348 (float<floatunssuffix>v2div2sf2_mask): Ditto.
3349 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
3350 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
3351 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
3352 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
3353 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
3354 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
3355 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
3356 Change when constraint is enabled.
3358 2023-08-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3361 * config/riscv/riscv-vsetvl.cc (float_insn_valid_sew_p): New function.
3362 (second_sew_less_than_first_sew_p): Fix bug.
3363 (first_sew_less_than_second_sew_p): Ditto.
3365 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
3367 * config/i386/avx512vldqintrin.h: Remove target attribute.
3368 * config/i386/i386-builtin.def (BDESC):
3369 Add OPTION_MASK_ISA2_AVX10_1.
3370 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
3371 * config/i386/i386-expand.cc
3372 (ix86_check_builtin_isa_match): Ditto.
3373 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
3374 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
3375 and avx10_1_or_avx512vl.
3376 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
3377 (VF1_128_256VLDQ_AVX10_1): Ditto.
3378 (VI8_AVX512VLDQ_AVX10_1): Ditto.
3379 (<sse>_andnot<mode>3<mask_name>):
3380 Add TARGET_AVX10_1 and change isa attr from avx512dq to
3381 avx10_1_or_avx512dq.
3382 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
3383 avx512vl to avx10_1_or_avx512vl.
3384 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
3385 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
3386 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
3388 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
3390 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
3391 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
3392 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
3394 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
3395 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
3396 Remove target check.
3397 (avx512dq_mul<mode>3<mask_name>): Ditto.
3398 (*avx512dq_mul<mode>3<mask_name>): Ditto.
3399 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
3400 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
3401 Remove target check.
3402 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
3403 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
3404 Remove target check.
3405 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
3406 (mask_avx512vl_condition): Ditto.
3409 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
3411 * common/config/i386/i386-common.cc
3412 (ix86_check_avx10_vector_width): New function to check isa_flags
3413 to emit a warning when there is a conflict in AVX10 options for
3415 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
3416 * config/i386/driver-i386.cc (host_detect_local_cpu):
3417 Do not append -mno-avx10-max-512bit for -march=native.
3419 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
3421 * common/config/i386/i386-common.cc
3422 (ix86_check_avx10): New function to check isa_flags and
3423 isa_flags_explicit to emit warning when AVX10 is enabled
3425 (ix86_check_avx512): New function to check isa_flags and
3426 isa_flags_explicit to emit warning when AVX512 is enabled
3428 (ix86_handle_option): Do not change the flags when warning
3430 * config/i386/driver-i386.cc (host_detect_local_cpu):
3431 Do not append -mno-avx10.1 for -march=native.
3433 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
3435 * common/config/i386/cpuinfo.h (get_available_features):
3436 Add avx10_set and version and detect avx10.1.
3437 (cpu_indicator_init): Handle avx10.1-512.
3438 * common/config/i386/i386-common.cc
3439 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
3440 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
3441 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
3442 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
3443 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
3444 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
3446 * common/config/i386/i386-cpuinfo.h (enum processor_features):
3447 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
3448 FEATURE_AVX10_512BIT.
3449 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
3450 AVX10_512BIT, AVX10_1 and AVX10_1_512.
3451 * config/i386/constraints.md (Yk): Add AVX10_1.
3454 * config/i386/cpuid.h (bit_AVX10): New.
3455 (bit_AVX10_256): Ditto.
3456 (bit_AVX10_512): Ditto.
3457 * config/i386/i386-c.cc (ix86_target_macros_internal):
3458 Define AVX10_512BIT and AVX10_1.
3459 * config/i386/i386-isa.def
3460 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
3461 (AVX10_1): Add DEF_PTA(AVX10_1).
3462 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
3463 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
3465 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
3466 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
3467 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
3468 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
3469 (ix86_conditional_register_usage): Ditto.
3470 (ix86_hard_regno_mode_ok): Ditto.
3471 (ix86_rtx_costs): Ditto.
3472 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
3473 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
3475 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
3476 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
3477 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
3480 2023-08-17 Sergei Trofimovich <siarheit@google.com>
3482 * flag-types.h (vrp_mode): Remove unused.
3484 2023-08-17 Yanzhang Wang <yanzhang.wang@intel.com>
3486 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Use
3489 2023-08-17 Andrew Pinski <apinski@marvell.com>
3491 * internal-fn.def (COND_NOT): New internal function.
3492 * match.pd (UNCOND_UNARY, COND_UNARY): Add bit_not/not
3494 (`vec (a ? -1 : 0) ^ b`): New pattern to convert
3495 into conditional not.
3496 * optabs.def (cond_one_cmpl): New optab.
3497 (cond_len_one_cmpl): Likewise.
3499 2023-08-16 Surya Kumari Jangala <jskumari@linux.ibm.com>
3501 PR rtl-optimization/110254
3502 * ira-color.cc (improve_allocation): Update array
3503 allocated_hard_reg_p.
3505 2023-08-16 Vladimir N. Makarov <vmakarov@redhat.com>
3507 * lra-int.h (lra_update_fp2sp_elimination): Change the prototype.
3508 * lra-eliminations.cc (spill_pseudos): Record spilled pseudos.
3509 (lra_update_fp2sp_elimination): Ditto.
3510 (update_reg_eliminate): Adjust spill_pseudos call.
3511 * lra-spills.cc (lra_spill): Assign stack slots to pseudos spilled
3512 in lra_update_fp2sp_elimination.
3514 2023-08-16 Richard Ball <richard.ball@arm.com>
3516 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A720 CPU.
3517 * config/aarch64/aarch64-tune.md: Regenerate.
3518 * doc/invoke.texi: Document Cortex-A720 CPU.
3520 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
3522 * config/riscv/autovec.md (<u>avg<v_double_trunc>3_floor):
3524 (<u>avg<v_double_trunc>3_ceil): Ditto.
3525 * config/riscv/vector-iterators.md (ashiftrt): New iterator.
3528 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
3530 * internal-fn.cc (vec_extract_direct): Change type argument
3532 (expand_vec_extract_optab_fn): Call convert_optab_fn.
3533 (direct_vec_extract_optab_supported_p): Use
3534 convert_optab_supported_p.
3536 2023-08-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
3537 Richard Sandiford <richard.sandiford@arm.com>
3539 * fold-const.cc (INCLUDE_ALGORITHM): Add Include.
3540 (valid_mask_for_fold_vec_perm_cst_p): New function.
3541 (fold_vec_perm_cst): Likewise.
3542 (fold_vec_perm): Adjust assert and call fold_vec_perm_cst.
3543 (test_fold_vec_perm_cst): New namespace.
3544 (test_fold_vec_perm_cst::build_vec_cst_rand): New function.
3545 (test_fold_vec_perm_cst::validate_res): Likewise.
3546 (test_fold_vec_perm_cst::validate_res_vls): Likewise.
3547 (test_fold_vec_perm_cst::builder_push_elems): Likewise.
3548 (test_fold_vec_perm_cst::test_vnx4si_v4si): Likewise.
3549 (test_fold_vec_perm_cst::test_v4si_vnx4si): Likewise.
3550 (test_fold_vec_perm_cst::test_all_nunits): Likewise.
3551 (test_fold_vec_perm_cst::test_nunits_min_2): Likewise.
3552 (test_fold_vec_perm_cst::test_nunits_min_4): Likewise.
3553 (test_fold_vec_perm_cst::test_nunits_min_8): Likewise.
3554 (test_fold_vec_perm_cst::test_nunits_max_4): Likewise.
3555 (test_fold_vec_perm_cst::is_simple_vla_size): Likewise.
3556 (test_fold_vec_perm_cst::test): Likewise.
3557 (fold_const_cc_tests): Call test_fold_vec_perm_cst::test.
3559 2023-08-16 Pan Li <pan2.li@intel.com>
3561 * config/riscv/riscv-vector-builtins-bases.cc
3562 (BASE): New declaration.
3563 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3564 * config/riscv/riscv-vector-builtins-functions.def
3565 (vfwcvt_xu_frm): New intrinsic function def.
3567 2023-08-16 Pan Li <pan2.li@intel.com>
3569 * config/riscv/riscv-vector-builtins-bases.cc: Use explicit argument.
3571 2023-08-16 Pan Li <pan2.li@intel.com>
3573 * config/riscv/riscv-vector-builtins-bases.cc
3574 (BASE): New declaration.
3575 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3576 * config/riscv/riscv-vector-builtins-functions.def
3577 (vfwcvt_x_frm): New intrinsic function def.
3579 2023-08-16 Pan Li <pan2.li@intel.com>
3581 * config/riscv/riscv-vector-builtins-bases.cc (BASE): New declaration.
3582 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3583 * config/riscv/riscv-vector-builtins-functions.def
3584 (vfcvt_f_frm): New intrinsic function def.
3586 2023-08-16 Pan Li <pan2.li@intel.com>
3588 * config/riscv/riscv-vector-builtins-bases.cc
3589 (BASE): New declaration.
3590 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3591 * config/riscv/riscv-vector-builtins-functions.def
3592 (vfcvt_xu_frm): New intrinsic function def..
3594 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
3597 * config/rs6000/vsx.md (*vsx_extract_<mode>_store_p9): Skip vector
3598 extract when the element is 7 on BE while 8 on LE for byte or 3 on
3599 BE while 4 on LE for halfword.
3601 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
3604 * config/rs6000/vsx.md (expand vsx_extract_<mode>): Set it only
3606 (vsx_extract_v4si): New expand for V4SI extraction.
3607 (vsx_extract_v4si_w1): New insn pattern for V4SI extraction on
3608 word 1 from BE order.
3609 (*mfvsrwz): New insn pattern for mfvsrwz.
3610 (*vsx_extract_<mode>_di_p9): Assert that it won't be generated on
3611 word 1 from BE order.
3612 (*vsx_extract_si): Remove.
3613 (*vsx_extract_v4si_w023): New insn and split pattern on word 0, 2,
3616 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3618 * config/riscv/autovec.md (vec_mask_len_load_lanes<mode><vsingle>):
3620 (vec_mask_len_store_lanes<mode><vsingle>): Ditto.
3621 * config/riscv/riscv-protos.h (expand_lanes_load_store): New function.
3622 * config/riscv/riscv-v.cc (get_mask_mode): Add tuple mask mode.
3623 (expand_lanes_load_store): New function.
3624 * config/riscv/vector-iterators.md: New iterator.
3626 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3628 * internal-fn.cc (internal_load_fn_p): Apply
3629 MASK_LEN_{LOAD_LANES,STORE_LANES} into vectorizer.
3630 (internal_store_fn_p): Ditto.
3631 (internal_fn_len_index): Ditto.
3632 (internal_fn_mask_index): Ditto.
3633 (internal_fn_stored_value_index): Ditto.
3634 * tree-vect-data-refs.cc (vect_store_lanes_supported): Ditto.
3635 (vect_load_lanes_supported): Ditto.
3636 * tree-vect-loop.cc: Ditto.
3637 * tree-vect-slp.cc (vect_slp_prefer_store_lanes_p): Ditto.
3638 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
3639 (get_group_load_store_type): Ditto.
3640 (vectorizable_store): Ditto.
3641 (vectorizable_load): Ditto.
3642 * tree-vectorizer.h (vect_store_lanes_supported): Ditto.
3643 (vect_load_lanes_supported): Ditto.
3645 2023-08-16 Pan Li <pan2.li@intel.com>
3647 * config/riscv/riscv-vector-builtins-bases.cc
3648 (enum frm_op_type): New type for frm.
3649 (BASE): New declaration.
3650 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3651 * config/riscv/riscv-vector-builtins-functions.def
3652 (vfcvt_x_frm): New intrinsic function def.
3654 2023-08-16 liuhongt <hongtao.liu@intel.com>
3656 * config/i386/i386-builtins.cc
3657 (ix86_vectorize_builtin_gather): Adjust for use_gather_8parts.
3658 * config/i386/i386-options.cc (parse_mtune_ctrl_str):
3659 Set/Clear tune features use_{gather,scatter}_{2parts, 4parts,
3660 8parts} for -mtune-crtl={,^}{use_gather,use_scatter}.
3661 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Adjust
3662 for use_scatter_8parts
3663 * config/i386/i386.h (TARGET_USE_GATHER): Rename to ..
3664 (TARGET_USE_GATHER_8PARTS): .. this.
3665 (TARGET_USE_SCATTER): Rename to ..
3666 (TARGET_USE_SCATTER_8PARTS): .. this.
3667 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Rename to
3668 (X86_TUNE_USE_GATHER_8PARTS): .. this.
3669 (X86_TUNE_USE_SCATTER): Rename to
3670 (X86_TUNE_USE_SCATTER_8PARTS): .. this.
3671 * config/i386/i386.opt: Add new options mgather, mscatter.
3673 2023-08-16 liuhongt <hongtao.liu@intel.com>
3675 * config/i386/i386-options.cc (m_GDS): New macro.
3676 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Don't
3678 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
3679 (X86_TUNE_USE_GATHER): Ditto.
3681 2023-08-16 liuhongt <hongtao.liu@intel.com>
3683 * config/i386/i386.md (movdf_internal): Generate vmovapd instead of
3684 vmovsd when moving DFmode between SSE_REGS.
3685 (movhi_internal): Generate vmovdqa instead of vmovsh when
3686 moving HImode between SSE_REGS.
3687 (mov<mode>_internal): Use vmovaps instead of vmovsh when
3688 moving HF/BFmode between SSE_REGS.
3690 2023-08-15 David Faust <david.faust@oracle.com>
3692 * config/bpf/bpf.md (extendsisi2): Delete useless define_insn.
3694 2023-08-15 David Faust <david.faust@oracle.com>
3697 * config/bpf/bpf.cc (bpf_print_register): Print 'w' registers
3698 for any mode 32-bits or smaller, not just SImode.
3700 2023-08-15 Martin Jambor <mjambor@suse.cz>
3704 * ipa-prop.h (ipcp_get_aggregate_const): Declare.
3705 * ipa-prop.cc (ipcp_get_aggregate_const): New function.
3706 (ipcp_transform_function): Do not deallocate transformation info.
3707 * tree-ssa-sccvn.cc: Include alloc-pool.h, symbol-summary.h and
3709 (vn_reference_lookup_2): When hitting default-def vuse, query
3710 IPA-CP transformation info for any known constants.
3712 2023-08-15 Chung-Lin Tang <cltang@codesourcery.com>
3713 Thomas Schwinge <thomas@codesourcery.com>
3715 * gimplify.cc (oacc_region_type_name): New function.
3716 (oacc_default_clause): If no 'default' clause appears on this
3717 compute construct, see if one appears on a lexically containing
3719 (gimplify_scan_omp_clauses): Upon OMP_CLAUSE_DEFAULT case, set
3720 ctx->oacc_default_clause_ctx to current context.
3722 2023-08-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3725 * config/riscv/predicates.md: Fix predicate.
3727 2023-08-15 Richard Biener <rguenther@suse.de>
3729 * tree-vect-slp.cc (vect_analyze_slp_instance): Remove
3730 slp_inst_kind_ctor handling.
3731 (vect_analyze_slp): Simplify.
3732 (vect_build_slp_instance): Dump when we analyze a CTOR.
3733 (vect_slp_check_for_constructors): Rename to ...
3734 (vect_slp_check_for_roots): ... this. Register a
3735 slp_root for CONSTRUCTORs instead of shoving them to
3736 the set of grouped stores.
3737 (vect_slp_analyze_bb_1): Adjust.
3739 2023-08-15 Richard Biener <rguenther@suse.de>
3741 * tree-vectorizer.h (_slp_instance::remain_stmts): Change
3743 (_slp_instance::remain_defs): ... this.
3744 (SLP_INSTANCE_REMAIN_STMTS): Rename to ...
3745 (SLP_INSTANCE_REMAIN_DEFS): ... this.
3746 (slp_root::remain): New.
3747 (slp_root::slp_root): Adjust.
3748 * tree-vect-slp.cc (vect_free_slp_instance): Adjust.
3749 (vect_build_slp_instance): Get extra remain parameter,
3750 adjust former handling of a cut off stmt.
3751 (vect_analyze_slp_instance): Adjust.
3752 (vect_analyze_slp): Likewise.
3753 (_bb_vec_info::~_bb_vec_info): Likewise.
3754 (vectorizable_bb_reduc_epilogue): Dump something if we fail.
3755 (vect_slp_check_for_constructors): Handle non-internal
3756 defs as remain defs of a reduction.
3757 (vectorize_slp_instance_root_stmt): Adjust.
3759 2023-08-15 Richard Biener <rguenther@suse.de>
3761 * tree-ssa-loop-ivcanon.cc: Include tree-vectorizer.h
3762 (canonicalize_loop_induction_variables): Use find_loop_location.
3764 2023-08-15 Hans-Peter Nilsson <hp@axis.com>
3767 * config/cris/cris-protos.h: Revert recent change.
3768 * config/cris/cris.cc (cris_legitimate_address_p): Remove
3769 code_helper unused parameter.
3770 (cris_legitimate_address_p_hook): New wrapper function.
3771 (TARGET_LEGITIMATE_ADDRESS_P): Change to
3772 cris_legitimate_address_p_hook.
3774 2023-08-15 Richard Biener <rguenther@suse.de>
3776 PR tree-optimization/110963
3777 * tree-ssa-pre.cc (do_pre_regular_insertion): Also insert
3778 a PHI node when the expression is available on all edges
3779 and we insert at most one copy from a constant.
3781 2023-08-15 Richard Biener <rguenther@suse.de>
3783 PR tree-optimization/110991
3784 * tree-ssa-loop-ivcanon.cc (constant_after_peeling): Handle
3785 VIEW_CONVERT_EXPR <op>, handle more simple IV-like SSA cycles
3786 that will end up constant.
3788 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
3791 * Makefile.in (RECOG_H): Add $(TREE_H) as dependence.
3793 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
3795 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
3796 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
3797 and update the final nest accordingly.
3799 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
3801 * tree-vect-stmts.cc (vectorizable_load): Remove some useless checks
3804 2023-08-15 Pan Li <pan2.li@intel.com>
3806 * mode-switching.cc (create_pre_exit): Add SET insn check.
3808 2023-08-15 Pan Li <pan2.li@intel.com>
3810 * config/riscv/riscv-vector-builtins-bases.cc
3811 (class vfrec7_frm): New class for frm.
3812 (vfrec7_frm_obj): New declaration.
3814 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3815 * config/riscv/riscv-vector-builtins-functions.def
3816 (vfrec7_frm): New intrinsic function definition.
3817 * config/riscv/vector-iterators.md
3818 (VFMISC): Remove VFREC7.
3820 (float_insn_type): Ditto.
3821 (VFMISC_FRM): New int iterator.
3822 (misc_frm_op): New op for frm.
3823 (float_frm_insn_type): New type for frm.
3824 * config/riscv/vector.md (@pred_<misc_frm_op><mode>):
3825 New pattern for misc frm.
3827 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
3829 * lra-constraints.cc (curr_insn_transform): Process output stack
3830 pointer reloads before emitting reload insns.
3832 2023-08-14 benjamin priour <vultkayn@gcc.gnu.org>
3835 * doc/invoke.texi: Add documentation of
3836 fanalyzer-show-events-in-system-headers
3838 2023-08-14 Jan Hubicka <jh@suse.cz>
3840 PR gcov-profile/110988
3841 * tree-cfg.cc (fold_loop_internal_call): Avoid division by zero.
3843 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
3845 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
3846 Enable compressed builtins when ZC* extensions enabled.
3847 * config/riscv/riscv-shorten-memrefs.cc:
3848 Enable shorten_memrefs pass when ZC* extensions enabled.
3849 * config/riscv/riscv.cc (riscv_compressed_reg_p):
3850 Enable compressible registers when ZC* extensions enabled.
3851 (riscv_rtx_costs): Allow adjusting rtx costs when ZC* extensions enabled.
3852 (riscv_address_cost): Allow adjusting address cost when ZC* extensions enabled.
3853 (riscv_first_stack_step): Allow compression of the register saves
3854 without adding extra instructions.
3855 * config/riscv/riscv.h (FUNCTION_BOUNDARY): Adjusts function boundary
3856 to 16 bits when ZC* extensions enabled.
3858 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
3860 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): New extensions.
3861 * config/riscv/riscv-opts.h (MASK_ZCA): New mask.
3868 (TARGET_ZCA): New target.
3869 (TARGET_ZCB): Ditto.
3870 (TARGET_ZCE): Ditto.
3871 (TARGET_ZCF): Ditto.
3872 (TARGET_ZCD): Ditto.
3873 (TARGET_ZCMP): Ditto.
3874 (TARGET_ZCMT): Ditto.
3875 * config/riscv/riscv.opt: New target variable.
3877 2023-08-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3880 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
3882 * genrecog.cc (print_nonbool_test): Fix type error of
3883 switch (SUBREG_BYTE (op))'.
3885 2023-08-14 Richard Biener <rguenther@suse.de>
3887 * tree-cfg.cc (print_loop_info): Dump to 'file', not 'dump_file'.
3889 2023-08-14 Pan Li <pan2.li@intel.com>
3891 * config/riscv/riscv-vector-builtins-bases.cc
3892 (class unop_frm): New class for frm.
3893 (vfsqrt_frm_obj): New declaration.
3895 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3896 * config/riscv/riscv-vector-builtins-functions.def
3897 (vfsqrt_frm): New intrinsic function definition.
3899 2023-08-14 Pan Li <pan2.li@intel.com>
3901 * config/riscv/riscv-vector-builtins-bases.cc
3902 (class vfwnmsac_frm): New class for frm.
3903 (vfwnmsac_frm_obj): New declaration.
3905 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3906 * config/riscv/riscv-vector-builtins-functions.def
3907 (vfwnmsac_frm): New intrinsic function definition.
3909 2023-08-14 Pan Li <pan2.li@intel.com>
3911 * config/riscv/riscv-vector-builtins-bases.cc
3912 (class vfwmsac_frm): New class for frm.
3913 (vfwmsac_frm_obj): New declaration.
3915 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3916 * config/riscv/riscv-vector-builtins-functions.def
3917 (vfwmsac_frm): New intrinsic function definition.
3919 2023-08-14 Pan Li <pan2.li@intel.com>
3921 * config/riscv/riscv-vector-builtins-bases.cc
3922 (class vfwnmacc_frm): New class for frm.
3923 (vfwnmacc_frm_obj): New declaration.
3925 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3926 * config/riscv/riscv-vector-builtins-functions.def
3927 (vfwnmacc_frm): New intrinsic function definition.
3929 2023-08-14 Cui, Lili <lili.cui@intel.com>
3931 * common/config/i386/cpuinfo.h (get_intel_cpu): Add model value 0xba
3934 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
3936 * config/mmix/predicates.md (mmix_address_operand): Use
3937 lra_in_progress, not reload_in_progress.
3939 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
3941 * config/mmix/mmix.cc: Re-enable LRA.
3943 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
3945 * config/mmix/predicates.md (frame_pointer_operand): Handle FP+offset
3946 when lra_in_progress.
3948 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
3950 * config/mmix/mmix.cc: Disable LRA for MMIX.
3952 2023-08-14 Pan Li <pan2.li@intel.com>
3954 * config/riscv/riscv-vector-builtins-bases.cc
3955 (class vfwmacc_frm): New class for vfwmacc frm.
3956 (vfwmacc_frm_obj): New declaration.
3958 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3959 * config/riscv/riscv-vector-builtins-functions.def
3960 (vfwmacc_frm): Function definition for vfwmacc.
3961 * config/riscv/riscv-vector-builtins.cc
3962 (function_expander::use_widen_ternop_insn): Add frm support.
3964 2023-08-14 Pan Li <pan2.li@intel.com>
3966 * config/riscv/riscv-vector-builtins-bases.cc
3967 (class vfnmsub_frm): New class for vfnmsub frm.
3968 (vfnmsub_frm): New declaration.
3970 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3971 * config/riscv/riscv-vector-builtins-functions.def
3972 (vfnmsub_frm): New function declaration.
3974 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
3976 * lra-constraints.cc (curr_insn_transform): Set done_p up and
3977 check it on true after processing output stack pointer reload.
3979 2023-08-12 Jakub Jelinek <jakub@redhat.com>
3981 * Makefile.in (USER_H): Add stdckdint.h.
3982 * ginclude/stdckdint.h: New file.
3984 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3987 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Add TARGET_VETOR.
3989 2023-08-12 Patrick Palka <ppalka@redhat.com>
3991 * tree-pretty-print.cc (dump_generic_node) <case TREE_VEC>:
3992 Delimit output with braces.
3994 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3997 * config/riscv/riscv-v.cc (expand_vec_series): Refactor the expander.
3999 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4001 * config/riscv/autovec.md: Add VLS CONST_VECTOR.
4002 * config/riscv/riscv.cc (riscv_const_insns): Ditto.
4003 * config/riscv/vector.md: Ditto.
4005 2023-08-11 David Malcolm <dmalcolm@redhat.com>
4008 * doc/analyzer.texi (__analyzer_get_strlen): New.
4009 * doc/invoke.texi: Add -Wanalyzer-unterminated-string.
4011 2023-08-11 Jeff Law <jlaw@ventanamicro.com>
4013 * config/rx/rx.md (subdi3): Fix test for borrow.
4015 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4017 PR middle-end/110989
4018 * tree-vect-stmts.cc (vectorizable_store): Replace iv_type with sizetype.
4019 (vectorizable_load): Ditto.
4021 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
4023 * config/bpf/bpf.md (allocate_stack): Define.
4024 * config/bpf/bpf.h (FIRST_PSEUDO_REGISTER): Make room for fake
4025 stack pointer register.
4026 (FIXED_REGISTERS): Adjust accordingly.
4027 (CALL_USED_REGISTERS): Likewise.
4028 (REG_CLASS_CONTENTS): Likewise.
4029 (REGISTER_NAMES): Likewise.
4030 * config/bpf/bpf.cc (bpf_compute_frame_layout): Do not reserve
4031 space for callee-saved registers.
4032 (bpf_expand_prologue): Do not save callee-saved registers in xbpf.
4033 (bpf_expand_epilogue): Do not restore callee-saved registers in
4036 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
4038 * config/bpf/bpf.cc (bpf_function_arg_advance): Do not complain
4039 about too many arguments if function is always inlined.
4041 2023-08-11 Patrick Palka <ppalka@redhat.com>
4043 * tree-pretty-print.cc (dump_generic_node) <case COMPONENT_REF>:
4044 Don't call component_ref_field_offset if the RHS isn't a decl.
4046 2023-08-11 John David Anglin <danglin@gcc.gnu.org>
4049 * gensupport.cc(class conlist): Use strtol instead of std::stoi.
4051 2023-08-11 Vladimir N. Makarov <vmakarov@redhat.com>
4053 * lra-constraints.cc (goal_alt_out_sp_reload_p): New flag.
4054 (process_alt_operands): Set the flag.
4055 (curr_insn_transform): Modify stack pointer offsets if output
4056 stack pointer reload is generated.
4058 2023-08-11 Joseph Myers <joseph@codesourcery.com>
4060 * configure: Regenerate.
4062 2023-08-11 Richard Biener <rguenther@suse.de>
4064 PR tree-optimization/110979
4065 * tree-vect-loop.cc (vectorizable_reduction): For
4066 FOLD_LEFT_REDUCTION without target support make sure
4067 we don't need to honor signed zeros and sign dependent rounding.
4069 2023-08-11 Richard Biener <rguenther@suse.de>
4071 * tree-vect-slp.cc (vect_slp_region): Provide opt-info for all SLP
4072 subgraph entries. Dump the used vector size based on the
4073 SLP subgraph entry root vector type.
4075 2023-08-11 Pan Li <pan2.li@intel.com>
4077 * config/riscv/riscv-vector-builtins-bases.cc
4078 (class vfmsub_frm): New class for vfmsub frm.
4079 (vfmsub_frm): New declaration.
4081 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4082 * config/riscv/riscv-vector-builtins-functions.def
4083 (vfmsub_frm): New function declaration.
4085 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4087 * doc/md.texi: Add vec_mask_len_{load_lanes,store_lanes} patterns.
4088 * internal-fn.cc (expand_partial_load_optab_fn): Ditto.
4089 (expand_partial_store_optab_fn): Ditto.
4090 * internal-fn.def (MASK_LEN_LOAD_LANES): Ditto.
4091 (MASK_LEN_STORE_LANES): Ditto.
4092 * optabs.def (OPTAB_CD): Ditto.
4094 2023-08-11 Pan Li <pan2.li@intel.com>
4096 * config/riscv/riscv-vector-builtins-bases.cc
4097 (class vfnmadd_frm): New class for vfnmadd frm.
4098 (vfnmadd_frm): New declaration.
4100 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4101 * config/riscv/riscv-vector-builtins-functions.def
4102 (vfnmadd_frm): New function declaration.
4104 2023-08-11 Drew Ross <drross@redhat.com>
4105 Jakub Jelinek <jakub@redhat.com>
4107 PR tree-optimization/109938
4108 * match.pd (((x ^ y) & z) | x -> (z & y) | x): New simplification.
4110 2023-08-11 Pan Li <pan2.li@intel.com>
4112 * config/riscv/riscv-vector-builtins-bases.cc
4113 (class vfmadd_frm): New class for vfmadd frm.
4114 (vfmadd_frm_obj): New declaration.
4116 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4117 * config/riscv/riscv-vector-builtins-functions.def
4118 (vfmadd_frm): New function definition.
4120 2023-08-11 Pan Li <pan2.li@intel.com>
4122 * config/riscv/riscv-vector-builtins-bases.cc
4123 (class vfnmsac_frm): New class for vfnmsac frm.
4124 (vfnmsac_frm_obj): New declaration.
4126 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4127 * config/riscv/riscv-vector-builtins-functions.def
4128 (vfnmsac_frm): New function definition.
4130 2023-08-11 Jakub Jelinek <jakub@redhat.com>
4132 * doc/extend.texi (Typeof): Document typeof_unqual
4133 and __typeof_unqual__.
4135 2023-08-11 Andrew Pinski <apinski@marvell.com>
4137 PR tree-optimization/110954
4138 * generic-match-head.cc (bitwise_inverted_equal_p): Add
4139 wascmp argument and set it accordingly.
4140 * gimple-match-head.cc (bitwise_inverted_equal_p): Add
4141 wascmp argument to the macro.
4142 (gimple_bitwise_inverted_equal_p): Add
4143 wascmp argument and set it accordingly.
4144 * match.pd (`a & ~a`, `a ^| ~a`): Update call
4145 to bitwise_inverted_equal_p and handle wascmp case.
4146 (`(~x | y) & x`, `(~x | y) & x`, `a?~t:t`): Update
4147 call to bitwise_inverted_equal_p and check to see
4148 if was !wascmp or if precision was 1.
4150 2023-08-11 Martin Uecker <uecker@tugraz.at>
4153 * doc/invoke.texi: Update.
4155 2023-08-11 Pan Li <pan2.li@intel.com>
4157 * config/riscv/riscv-vector-builtins-bases.cc
4158 (class vfmsac_frm): New class for vfmsac frm.
4159 (vfmsac_frm_obj): New declaration.
4161 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4162 * config/riscv/riscv-vector-builtins-functions.def
4163 (vfmsac_frm): New function definition
4165 2023-08-10 Jan Hubicka <jh@suse.cz>
4167 PR middle-end/110923
4168 * tree-ssa-loop-split.cc (split_loop): Watch for division by zero.
4170 2023-08-10 Patrick O'Neill <patrick@rivosinc.com>
4172 * common/config/riscv/riscv-common.cc: Add Ztso and mark Ztso as
4173 dependent on 'a' extension.
4174 * config/riscv/riscv-opts.h (MASK_ZTSO): New mask.
4175 (TARGET_ZTSO): New target.
4176 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_acquire): Add
4178 (riscv_memmodel_needs_amo_release): Add Ztso case.
4179 (riscv_print_operand): Add Ztso case for LR/SC annotations.
4180 * config/riscv/riscv.md: Import sync-rvwmo.md and sync-ztso.md.
4181 * config/riscv/riscv.opt: Add Ztso target variable.
4182 * config/riscv/sync.md (mem_thread_fence_1): Expand to RVWMO or
4184 (atomic_load<mode>): Expand to RVWMO or Ztso specific insn.
4185 (atomic_store<mode>): Expand to RVWMO or Ztso specific insn.
4186 * config/riscv/sync-rvwmo.md: New file. Seperate out RVWMO
4187 specific load/store/fence mappings.
4188 * config/riscv/sync-ztso.md: New file. Seperate out Ztso
4189 specific load/store/fence mappings.
4191 2023-08-10 Jan Hubicka <jh@suse.cz>
4193 * cfgloopmanip.cc (duplicate_loop_body_to_header_edge): Special case loops with
4196 2023-08-10 Jan Hubicka <jh@suse.cz>
4198 * tree-ssa-threadupdate.cc (ssa_fix_duplicate_block_edges): Fix profile update.
4200 2023-08-10 Jan Hubicka <jh@suse.cz>
4202 * profile-count.cc (profile_count::differs_from_p): Fix overflow and
4203 handling of undefined values.
4205 2023-08-10 Jakub Jelinek <jakub@redhat.com>
4208 * tree-ssa-phiopt.cc (single_non_singleton_phi_for_edges): Never
4209 return virtual phis and return NULL if there is a virtual phi
4210 where the arguments from E0 and E1 edges aren't equal.
4212 2023-08-10 Richard Biener <rguenther@suse.de>
4214 * internal-fn.def (VCOND, VCONDU, VCONDEQ, VCOND_MASK,
4215 VEC_SET, VEC_EXTRACT): Make ECF_CONST | ECF_NOTHROW.
4217 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4220 * config/riscv/autovec.md (vec_duplicate<mode>): New pattern.
4222 2023-08-10 Pan Li <pan2.li@intel.com>
4224 * config/riscv/riscv-vector-builtins-bases.cc
4225 (class vfnmacc_frm): New class for vfnmacc.
4226 (vfnmacc_frm_obj): New declaration.
4228 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4229 * config/riscv/riscv-vector-builtins-functions.def
4230 (vfnmacc_frm): New function definition.
4232 2023-08-10 Pan Li <pan2.li@intel.com>
4234 * config/riscv/riscv-vector-builtins-bases.cc
4235 (class vfmacc_frm): New class for vfmacc frm.
4236 (vfmacc_frm_obj): New declaration.
4238 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4239 * config/riscv/riscv-vector-builtins-functions.def
4240 (vfmacc_frm): New function definition.
4242 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4245 * config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary.
4247 2023-08-10 Richard Biener <rguenther@suse.de>
4249 * tree-vectorizer.h (vectorizable_live_operation): Remove
4250 gimple_stmt_iterator * argument.
4251 * tree-vect-loop.cc (vectorizable_live_operation): Likewise.
4252 Adjust plumbing around vect_get_loop_mask.
4253 (vect_analyze_loop_operations): Adjust.
4254 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Likewise.
4255 (vect_bb_slp_mark_live_stmts): Likewise.
4256 (vect_schedule_slp_node): Likewise.
4257 * tree-vect-stmts.cc (can_vectorize_live_stmts): Likewise.
4258 Remove gimple_stmt_iterator * argument.
4259 (vect_transform_stmt): Adjust.
4261 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4263 * config/riscv/vector-iterators.md: Add missing modes.
4265 2023-08-10 Jakub Jelinek <jakub@redhat.com>
4268 * lto-streamer-in.cc (lto_input_tree_1): Assert TYPE_PRECISION
4269 is up to WIDE_INT_MAX_PRECISION rather than MAX_BITSIZE_MODE_ANY_INT.
4271 2023-08-10 Jakub Jelinek <jakub@redhat.com>
4274 * expr.cc (expand_expr_real_1) <case MEM_REF>: Add an early return for
4275 EXPAND_WRITE or EXPAND_MEMORY modifiers to avoid testing it multiple
4278 2023-08-10 liuhongt <hongtao.liu@intel.com>
4281 * config/i386/mmx.md: (movq_<mode>_to_sse): Also do not
4282 sanitize upper part of V4HFmode register with
4284 (<insn>v4hf3): Enable for ix86_partial_vec_fp_math.
4286 (<insn>v2hf3): Ditto.
4288 (movd_v2hf_to_sse): Do not sanitize upper part of V2HFmode
4289 register with -fno-trapping-math.
4291 2023-08-10 Pan Li <pan2.li@intel.com>
4292 Kito Cheng <kito.cheng@sifive.com>
4294 * config/riscv/riscv-protos.h
4295 (enum floating_point_rounding_mode): Add NONE, DYN_EXIT and DYN_CALL.
4296 (get_frm_mode): New declaration.
4297 * config/riscv/riscv-v.cc (get_frm_mode): New function to get frm mode.
4298 * config/riscv/riscv-vector-builtins.cc
4299 (function_expander::use_ternop_insn): Take care of frm reg.
4300 * config/riscv/riscv.cc (riscv_static_frm_mode_p): Migrate to FRM_XXX.
4301 (riscv_emit_frm_mode_set): Ditto.
4302 (riscv_emit_mode_set): Ditto.
4303 (riscv_frm_adjust_mode_after_call): Ditto.
4304 (riscv_frm_mode_needed): Ditto.
4305 (riscv_frm_mode_after): Ditto.
4306 (riscv_mode_entry): Ditto.
4307 (riscv_mode_exit): Ditto.
4308 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
4309 * config/riscv/vector.md
4310 (rne,rtz,rdn,rup,rmm,dyn,dyn_exit,dyn_call,none): Removed
4311 (symbol_ref): * config/riscv/vector.md: Set frm_mode attr explicitly.
4313 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4315 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix
4316 incorrect anticipate info.
4318 2023-08-09 Tsukasa OI <research_trasio@irq.a4lg.com>
4320 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
4321 Remove 'Zve32d' from the version list.
4323 2023-08-09 Jin Ma <jinma@linux.alibaba.com>
4325 * config/riscv/riscv.cc (riscv_sched_variable_issue): New function.
4326 (TARGET_SCHED_VARIABLE_ISSUE): New macro.
4327 Co-authored-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
4328 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
4330 2023-08-09 Jivan Hakobyan <jivanhakobyan9@gmail.com>
4332 * config/riscv/riscv.cc (riscv_legitimize_address): Handle folding.
4333 (mem_shadd_or_shadd_rtx_p): New function.
4335 2023-08-09 Andrew Pinski <apinski@marvell.com>
4337 PR tree-optimization/110937
4338 PR tree-optimization/100798
4339 * match.pd (`a ? ~b : b`): Handle this
4342 2023-08-09 Uros Bizjak <ubizjak@gmail.com>
4344 * config/i386/i386.opt (mpartial-vector-fp-math): Add dot.
4346 2023-08-09 Richard Ball <richard.ball@arm.com>
4348 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A520 CPU.
4349 * config/aarch64/aarch64-tune.md: Regenerate.
4350 * doc/invoke.texi: Document Cortex-A520 CPU.
4352 2023-08-09 Carl Love <cel@us.ibm.com>
4354 * config/rs6000/rs6000-builtins.def (vcmpneb, vcmpneh, vcmpnew):
4355 Move definitions to Altivec stanza.
4356 * config/rs6000/altivec.md (vcmpneb, vcmpneh, vcmpnew): New
4359 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4362 * config/riscv/riscv-v.cc (expand_const_vector): Add NPATTERNS = 1
4363 stepped vector support.
4365 2023-08-09 liuhongt <hongtao.liu@intel.com>
4367 * common/config/i386/cpuinfo.h (get_available_features):
4368 Rename local variable subleaf_level to max_subleaf_level.
4370 2023-08-09 Richard Biener <rguenther@suse.de>
4372 PR rtl-optimization/110587
4373 * lra-assigns.cc (find_hard_regno_for_1): Re-order checks.
4375 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
4377 PR tree-optimization/110248
4378 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Check if
4379 the given code is for ifn LEN_{LOAD,STORE}, if yes then make it not
4380 legitimate when outer code is PLUS.
4382 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
4384 PR tree-optimization/110248
4385 * recog.cc (memory_address_addr_space_p): Add one more argument ch of
4386 type code_helper and pass it to targetm.addr_space.legitimate_address_p
4387 instead of ERROR_MARK.
4388 (offsettable_address_addr_space_p): Update one function pointer with
4389 one more argument of type code_helper as its assignees
4390 memory_address_addr_space_p and strict_memory_address_addr_space_p
4391 have been adjusted, and adjust some call sites with ERROR_MARK.
4392 * recog.h (tree.h): New include header file for tree_code ERROR_MARK.
4393 (memory_address_addr_space_p): Adjust with one more unnamed argument
4394 of type code_helper with default ERROR_MARK.
4395 (strict_memory_address_addr_space_p): Likewise.
4396 * reload.cc (strict_memory_address_addr_space_p): Add one unnamed
4397 argument of type code_helper.
4398 * tree-ssa-address.cc (valid_mem_ref_p): Add one more argument ch of
4399 type code_helper and pass it to memory_address_addr_space_p.
4400 * tree-ssa-address.h (valid_mem_ref_p): Adjust the declaration with
4401 one more unnamed argument of type code_helper with default value
4403 * tree-ssa-loop-ivopts.cc (get_address_cost): Use ERROR_MARK as code
4404 by default, change it with ifn code for USE_PTR_ADDRESS type use, and
4405 pass it to all valid_mem_ref_p calls.
4407 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
4409 PR tree-optimization/110248
4410 * coretypes.h (class code_helper): Add forward declaration.
4411 * doc/tm.texi: Regenerate.
4412 * lra-constraints.cc (valid_address_p): Call target hook
4413 targetm.addr_space.legitimate_address_p with an extra parameter
4414 ERROR_MARK as its prototype changes.
4415 * recog.cc (memory_address_addr_space_p): Likewise.
4416 * reload.cc (strict_memory_address_addr_space_p): Likewise.
4417 * target.def (legitimate_address_p, addr_space.legitimate_address_p):
4418 Extend with one more argument of type code_helper, update the
4419 documentation accordingly.
4420 * targhooks.cc (default_legitimate_address_p): Adjust for the
4421 new code_helper argument.
4422 (default_addr_space_legitimate_address_p): Likewise.
4423 * targhooks.h (default_legitimate_address_p): Likewise.
4424 (default_addr_space_legitimate_address_p): Likewise.
4425 * config/aarch64/aarch64.cc (aarch64_legitimate_address_hook_p): Adjust
4426 with extra unnamed code_helper argument with default ERROR_MARK.
4427 * config/alpha/alpha.cc (alpha_legitimate_address_p): Likewise.
4428 * config/arc/arc.cc (arc_legitimate_address_p): Likewise.
4429 * config/arm/arm-protos.h (arm_legitimate_address_p): Likewise.
4430 (tree.h): New include for tree_code ERROR_MARK.
4431 * config/arm/arm.cc (arm_legitimate_address_p): Adjust with extra
4432 unnamed code_helper argument with default ERROR_MARK.
4433 * config/avr/avr.cc (avr_addr_space_legitimate_address_p): Likewise.
4434 * config/bfin/bfin.cc (bfin_legitimate_address_p): Likewise.
4435 * config/bpf/bpf.cc (bpf_legitimate_address_p): Likewise.
4436 * config/c6x/c6x.cc (c6x_legitimate_address_p): Likewise.
4437 * config/cris/cris-protos.h (cris_legitimate_address_p): Likewise.
4438 (tree.h): New include for tree_code ERROR_MARK.
4439 * config/cris/cris.cc (cris_legitimate_address_p): Adjust with extra
4440 unnamed code_helper argument with default ERROR_MARK.
4441 * config/csky/csky.cc (csky_legitimate_address_p): Likewise.
4442 * config/epiphany/epiphany.cc (epiphany_legitimate_address_p):
4444 * config/frv/frv.cc (frv_legitimate_address_p): Likewise.
4445 * config/ft32/ft32.cc (ft32_addr_space_legitimate_address_p): Likewise.
4446 * config/gcn/gcn.cc (gcn_addr_space_legitimate_address_p): Likewise.
4447 * config/h8300/h8300.cc (h8300_legitimate_address_p): Likewise.
4448 * config/i386/i386.cc (ix86_legitimate_address_p): Likewise.
4449 * config/ia64/ia64.cc (ia64_legitimate_address_p): Likewise.
4450 * config/iq2000/iq2000.cc (iq2000_legitimate_address_p): Likewise.
4451 * config/lm32/lm32.cc (lm32_legitimate_address_p): Likewise.
4452 * config/loongarch/loongarch.cc (loongarch_legitimate_address_p):
4454 * config/m32c/m32c.cc (m32c_legitimate_address_p): Likewise.
4455 (m32c_addr_space_legitimate_address_p): Likewise.
4456 * config/m32r/m32r.cc (m32r_legitimate_address_p): Likewise.
4457 * config/m68k/m68k.cc (m68k_legitimate_address_p): Likewise.
4458 * config/mcore/mcore.cc (mcore_legitimate_address_p): Likewise.
4459 * config/microblaze/microblaze-protos.h (tree.h): New include for
4460 tree_code ERROR_MARK.
4461 (microblaze_legitimate_address_p): Adjust with extra unnamed
4462 code_helper argument with default ERROR_MARK.
4463 * config/microblaze/microblaze.cc (microblaze_legitimate_address_p):
4465 * config/mips/mips.cc (mips_legitimate_address_p): Likewise.
4466 * config/mmix/mmix.cc (mmix_legitimate_address_p): Likewise.
4467 * config/mn10300/mn10300.cc (mn10300_legitimate_address_p): Likewise.
4468 * config/moxie/moxie.cc (moxie_legitimate_address_p): Likewise.
4469 * config/msp430/msp430.cc (msp430_legitimate_address_p): Likewise.
4470 (msp430_addr_space_legitimate_address_p): Adjust with extra code_helper
4471 argument with default ERROR_MARK and adjust the call to function
4472 msp430_legitimate_address_p.
4473 * config/nds32/nds32.cc (nds32_legitimate_address_p): Adjust with extra
4474 unnamed code_helper argument with default ERROR_MARK.
4475 * config/nios2/nios2.cc (nios2_legitimate_address_p): Likewise.
4476 * config/nvptx/nvptx.cc (nvptx_legitimate_address_p): Likewise.
4477 * config/or1k/or1k.cc (or1k_legitimate_address_p): Likewise.
4478 * config/pa/pa.cc (pa_legitimate_address_p): Likewise.
4479 * config/pdp11/pdp11.cc (pdp11_legitimate_address_p): Likewise.
4480 * config/pru/pru.cc (pru_addr_space_legitimate_address_p): Likewise.
4481 * config/riscv/riscv.cc (riscv_legitimate_address_p): Likewise.
4482 * config/rl78/rl78-protos.h (rl78_as_legitimate_address): Likewise.
4483 (tree.h): New include for tree_code ERROR_MARK.
4484 * config/rl78/rl78.cc (rl78_as_legitimate_address): Adjust with
4485 extra unnamed code_helper argument with default ERROR_MARK.
4486 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Likewise.
4487 (rs6000_debug_legitimate_address_p): Adjust with extra code_helper
4488 argument and adjust the call to function rs6000_legitimate_address_p.
4489 * config/rx/rx.cc (rx_is_legitimate_address): Adjust with extra
4490 unnamed code_helper argument with default ERROR_MARK.
4491 * config/s390/s390.cc (s390_legitimate_address_p): Likewise.
4492 * config/sh/sh.cc (sh_legitimate_address_p): Likewise.
4493 * config/sparc/sparc.cc (sparc_legitimate_address_p): Likewise.
4494 * config/v850/v850.cc (v850_legitimate_address_p): Likewise.
4495 * config/vax/vax.cc (vax_legitimate_address_p): Likewise.
4496 * config/visium/visium.cc (visium_legitimate_address_p): Likewise.
4497 * config/xtensa/xtensa.cc (xtensa_legitimate_address_p): Likewise.
4498 * config/stormy16/stormy16-protos.h (xstormy16_legitimate_address_p):
4500 (tree.h): New include for tree_code ERROR_MARK.
4501 * config/stormy16/stormy16.cc (xstormy16_legitimate_address_p):
4502 Adjust with extra unnamed code_helper argument with default
4505 2023-08-09 liuhongt <hongtao.liu@intel.com>
4507 * common/config/i386/cpuinfo.h (get_available_features): Check
4508 EAX for valid subleaf before use CPUID.
4510 2023-08-08 Jeff Law <jlaw@ventanamicro.com>
4512 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use word_mode
4513 for the temporary when canonicalizing the condition.
4515 2023-08-08 Cupertino Miranda <cupertino.miranda@oracle.com>
4517 * config/bpf/core-builtins.cc: Cleaned include headers.
4518 (struct cr_builtins): Added GTY.
4519 (cr_builtins_ref): Created.
4520 (builtins_data) Changed to GC root.
4521 (allocate_builtin_data): Changed.
4522 Included gt-core-builtins.h.
4523 * config/bpf/coreout.cc: (bpf_core_extra) Added GTY.
4524 (bpf_core_extra_ref): Created.
4525 (bpf_comment_info): Changed to GC root.
4526 (bpf_core_reloc_add, output_btfext_header, btf_ext_init): Changed.
4528 2023-08-08 Uros Bizjak <ubizjak@gmail.com>
4531 * config/i386/i386.opt (mpartial-vector-fp-math): New option.
4532 * config/i386/mmx.md (movq_<mode>_to_sse): Do not sanitize
4533 upper part of V2SFmode register with -fno-trapping-math.
4534 (<plusminusmult:insn>v2sf3): Enable for ix86_partial_vec_fp_math.
4536 (<smaxmin:code>v2sf3): Ditto.
4538 (*mmx_haddv2sf3_low): Ditto.
4539 (*mmx_hsubv2sf3_low): Ditto.
4540 (vec_addsubv2sf3): Ditto.
4541 (vec_cmpv2sfv2si): Ditto.
4542 (vcond<V2FI:mode>v2sf): Ditto.
4547 (fix_truncv2sfv2si2): Ditto.
4548 (fixuns_truncv2sfv2si2): Ditto.
4549 (floatv2siv2sf2): Ditto.
4550 (floatunsv2siv2sf2): Ditto.
4551 (nearbyintv2sf2): Ditto.
4553 (lrintv2sfv2si2): Ditto.
4555 (lceilv2sfv2si2): Ditto.
4556 (floorv2sf2): Ditto.
4557 (lfloorv2sfv2si2): Ditto.
4558 (btruncv2sf2): Ditto.
4559 (roundv2sf2): Ditto.
4560 (lroundv2sfv2si2): Ditto.
4561 * doc/invoke.texi (x86 Options): Document
4562 -mpartial-vector-fp-math option.
4564 2023-08-08 Andrew Pinski <apinski@marvell.com>
4566 PR tree-optimization/103281
4567 PR tree-optimization/28794
4568 * vr-values.cc (simplify_using_ranges::simplify_cond_using_ranges_1): Split out
4570 (simplify_using_ranges::simplify_compare_using_ranges_1): Here.
4571 (simplify_using_ranges::simplify_casted_cond): Rename to ...
4572 (simplify_using_ranges::simplify_casted_compare): This
4573 and change arguments to take op0 and op1.
4574 (simplify_using_ranges::simplify_compare_assign_using_ranges_1): New method.
4575 (simplify_using_ranges::simplify): For tcc_comparison assignments call
4576 simplify_compare_assign_using_ranges_1.
4577 * vr-values.h (simplify_using_ranges): Add
4578 new methods, simplify_compare_using_ranges_1 and simplify_compare_assign_using_ranges_1.
4579 Rename simplify_casted_cond and simplify_casted_compare and
4580 update argument types.
4582 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
4584 * genmatch.cc: Log line numbers indirectly.
4586 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
4588 * genmatch.cc: Make sinfo map ordered.
4589 * Makefile.in: Require the ordered map header for genmatch.o.
4591 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
4593 * ordered-hash-map.h: Add get_or_insert.
4594 * ordered-hash-map-tests.cc: Use get_or_insert in tests.
4596 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4598 * config/riscv/autovec.md (cond_<optab><mode>): New pattern.
4599 (cond_len_<optab><mode>): Ditto.
4600 (cond_fma<mode>): Ditto.
4601 (cond_len_fma<mode>): Ditto.
4602 (cond_fnma<mode>): Ditto.
4603 (cond_len_fnma<mode>): Ditto.
4604 (cond_fms<mode>): Ditto.
4605 (cond_len_fms<mode>): Ditto.
4606 (cond_fnms<mode>): Ditto.
4607 (cond_len_fnms<mode>): Ditto.
4608 * config/riscv/riscv-protos.h (riscv_get_v_regno_alignment): Export
4610 (enum insn_type): Add new enum type.
4611 (prepare_ternary_operands): New function.
4612 * config/riscv/riscv-v.cc (emit_vlmax_masked_fp_mu_insn): Ditto.
4613 (emit_nonvlmax_tumu_insn): Ditto.
4614 (emit_nonvlmax_fp_tumu_insn): Ditto.
4615 (expand_cond_len_binop): Add condtional operations.
4616 (expand_cond_len_ternop): Ditto.
4617 (prepare_ternary_operands): New function.
4618 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_release): Export
4619 riscv_get_v_regno_alignment as global scope.
4620 * config/riscv/vector.md: Fix ternary bugs.
4622 2023-08-08 Richard Biener <rguenther@suse.de>
4624 PR tree-optimization/49955
4625 * tree-vectorizer.h (_slp_instance::remain_stmts): New.
4626 (SLP_INSTANCE_REMAIN_STMTS): Likewise.
4627 * tree-vect-slp.cc (vect_free_slp_instance): Release
4628 SLP_INSTANCE_REMAIN_STMTS.
4629 (vect_build_slp_instance): Make the number of lanes of
4630 a BB reduction even.
4631 (vectorize_slp_instance_root_stmt): Handle unvectorized
4632 defs of a BB reduction.
4634 2023-08-08 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
4636 * internal-fn.cc (get_len_internal_fn): New function.
4637 (DEF_INTERNAL_COND_FN): Ditto.
4638 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
4639 * internal-fn.h (get_len_internal_fn): Ditto.
4640 * tree-vect-stmts.cc (vectorizable_call): Add CALL auto-vectorization.
4642 2023-08-08 Richard Biener <rguenther@suse.de>
4644 PR tree-optimization/110924
4645 * tree-ssa-live.h (virtual_operand_live): Update comment.
4646 * tree-ssa-live.cc (virtual_operand_live::get_live_in): Remove
4647 optimization, look at each predecessor.
4648 * tree-ssa-sink.cc (pass_sink_code::execute): Mark backedges.
4650 2023-08-08 yulong <shiyulong@iscas.ac.cn>
4652 * config/riscv/riscv-v.cc (slide1_sew64_helper): Modify.
4654 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4656 * config/riscv/autovec-vls.md (<optab><mode>2): Add VLS neg.
4657 * config/riscv/vector.md: Ditto.
4659 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4661 * config/riscv/autovec.md: Add VLS shift.
4663 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4665 * config/riscv/autovec-vls.md (<optab><mode>3): Add VLS modes.
4666 * config/riscv/vector-iterators.md: Ditto.
4667 * config/riscv/vector.md: Ditto.
4669 2023-08-07 Jonathan Wakely <jwakely@redhat.com>
4671 * config/i386/i386.cc (ix86_invalid_conversion): Fix grammar.
4673 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
4675 * configure: Regenerate.
4677 2023-08-07 John Ericson <git@JohnEricson.me>
4679 * configure: Regenerate.
4681 2023-08-07 Alan Modra <amodra@gmail.com>
4683 * configure: Regenerate.
4685 2023-08-07 Alexander von Gluck IV <kallisti5@unixzen.com>
4687 * configure: Regenerate.
4689 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
4691 * configure: Regenerate.
4693 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
4695 * configure: Regenerate.
4697 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
4699 * configure: Regenerate.
4701 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
4703 * configure: Regenerate.
4705 2023-08-07 Jeff Law <jlaw@ventanamicro.com>
4707 * config/riscv/riscv.cc (riscv_expand_conditional_move): Allow
4708 VOIDmode operands to conditional before canonicalization.
4710 2023-08-07 Manolis Tsamis <manolis.tsamis@vrull.eu>
4712 * regcprop.cc (maybe_copy_reg_attrs): Remove unnecessary function.
4713 (find_oldest_value_reg): Inline stack_pointer_rtx check.
4714 (copyprop_hardreg_forward_1): Inline stack_pointer_rtx check.
4716 2023-08-07 Martin Jambor <mjambor@suse.cz>
4719 * ipa-param-manipulation.h (class ipa_param_body_adjustments): New
4720 members get_ddef_if_exists_and_is_used and mark_clobbers_dead.
4721 * ipa-sra.cc (isra_track_scalar_value_uses): Ignore clobbers.
4722 (ptr_parm_has_nonarg_uses): Likewise.
4723 * ipa-param-manipulation.cc
4724 (ipa_param_body_adjustments::get_ddef_if_exists_and_is_used): New.
4725 (ipa_param_body_adjustments::mark_dead_statements): Move initial
4726 checks to get_ddef_if_exists_and_is_used.
4727 (ipa_param_body_adjustments::mark_clobbers_dead): New.
4728 (ipa_param_body_adjustments::common_initialization): Call
4729 mark_clobbers_dead when splitting.
4731 2023-08-07 Raphael Zinsly <rzinsly@ventanamicro.com>
4733 * config/riscv/riscv.cc (riscv_expand_int_scc): Add invert_ptr
4734 as an argument and pass it to riscv_emit_int_order_test.
4735 (riscv_expand_conditional_move): Handle cases where the condition
4736 is not EQ/NE or the second argument to the conditional is not
4738 * config/riscv/riscv-protos.h (riscv_expand_int_scc): Update prototype.
4739 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
4741 2023-08-07 Andrew Pinski <apinski@marvell.com>
4743 PR tree-optimization/109959
4744 * match.pd (`(a > 1) ? 0 : (cast)a`, `(a <= 1) & (cast)a`):
4747 2023-08-07 Richard Biener <rguenther@suse.de>
4749 * tree-ssa-sink.cc (pass_sink_code::execute): Do not
4750 calculate post-dominators. Calculate RPO on the inverted
4751 graph and process blocks in that order.
4753 2023-08-07 liuhongt <hongtao.liu@intel.com>
4756 * config/i386/i386-protos.h
4757 (vpternlog_redundant_operand_mask): Adjust parameter type.
4758 * config/i386/i386.cc (vpternlog_redundant_operand_mask): Use
4759 INTVAL instead of XINT, also adjust parameter type from rtx*
4760 to rtx since the function only needs operands[4] in vpternlog
4762 (substitute_vpternlog_operands): Pass operands[4] instead of
4763 operands to vpternlog_redundant_operand_mask.
4764 * config/i386/sse.md: Ditto.
4766 2023-08-07 Richard Biener <rguenther@suse.de>
4768 * tree-vect-slp.cc (vect_slp_region): Save/restore vect_location
4769 around dumping code.
4771 2023-08-07 liuhongt <hongtao.liu@intel.com>
4774 * config/i386/mmx.md (<insn><mode>3): Changed from define_insn
4775 to define_expand and break into ..
4776 (<insn>v4hf3): .. this.
4777 (divv4hf3): .. this.
4778 (<insn>v2hf3): .. this.
4779 (divv2hf3): .. this.
4780 (movd_v2hf_to_sse): New define_expand.
4781 (movq_<mode>_to_sse): Extend to V4HFmode.
4782 (mmxdoublevecmode): Ditto.
4783 (V2FI_V4HF): New mode iterator.
4784 * config/i386/sse.md (*vec_concatv4sf): Extend to hanlde V8HF
4785 by using mode iterator V4SF_V8HF, renamed to ..
4786 (*vec_concat<mode>): .. this.
4787 (*vec_concatv4sf_0): Extend to handle V8HF by using mode
4788 iterator V4SF_V8HF, renamed to ..
4789 (*vec_concat<mode>_0): .. this.
4790 (*vec_concatv8hf_movss): New define_insn.
4791 (V4SF_V8HF): New mode iterator.
4793 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4795 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Add op vectype.
4797 2023-08-07 Jan Beulich <jbeulich@suse.com>
4799 * config/i386/mmx.md (*mmx_pinsrd): Drop "prefix_data16".
4800 (*mmx_pinsrb): Likewise.
4801 (*mmx_pextrb): Likewise.
4802 (*mmx_pextrb_zext): Likewise.
4803 (mmx_pshufbv8qi3): Likewise.
4804 (mmx_pshufbv4qi3): Likewise.
4805 (mmx_pswapdv2si2): Likewise.
4806 (*pinsrb): Likewise.
4807 (*pextrb): Likewise.
4808 (*pextrb_zext): Likewise.
4809 * config/i386/sse.md (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
4810 (*sse2_eq<mode>3): Likewise.
4811 (*sse2_gt<mode>3): Likewise.
4812 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
4813 (*vec_extract<mode>): Likewise.
4814 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
4815 (*vec_extractv16qi_zext): Likewise.
4816 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
4817 (ssse3_pmaddubsw128): Likewise.
4818 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
4819 (<ssse3_avx2>_pshufb<mode>3<mask_name>): Likewise.
4820 (<ssse3_avx2>_psign<mode>3): Likewise.
4821 (<ssse3_avx2>_palignr<mode>): Likewise.
4822 (*abs<mode>2): Likewise.
4823 (sse4_2_pcmpestr): Likewise.
4824 (sse4_2_pcmpestri): Likewise.
4825 (sse4_2_pcmpestrm): Likewise.
4826 (sse4_2_pcmpestr_cconly): Likewise.
4827 (sse4_2_pcmpistr): Likewise.
4828 (sse4_2_pcmpistri): Likewise.
4829 (sse4_2_pcmpistrm): Likewise.
4830 (sse4_2_pcmpistr_cconly): Likewise.
4831 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
4832 (vgf2p8affineqb_<mode><mask_name>): Likewise.
4833 (vgf2p8mulb_<mode><mask_name>): Likewise.
4834 (*<code>v8hi3 [smaxmin]): Drop "prefix_data16" and
4836 (*<code>v16qi3 [umaxmin]): Likewise.
4838 2023-08-07 Jan Beulich <jbeulich@suse.com>
4840 * config/i386/i386.md (sse4_1_round<mode>2): Make
4841 "length_immediate" uniformly 1.
4842 * config/i386/mmx.md (mmx_pblendvb_v8qi): Likewise.
4843 (mmx_pblendvb_<mode>): Likewise.
4845 2023-08-07 Jan Beulich <jbeulich@suse.com>
4847 * config/i386/sse.md
4848 (<avx512>_<complexopname>_<mode><maskc_name><round_name>): Add
4850 (avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
4853 2023-08-07 Jan Beulich <jbeulich@suse.com>
4855 * config/i386/sse.md (xop_phadd<u>bw): Add "prefix",
4856 "prefix_extra", and "mode" attributes.
4857 (xop_phadd<u>bd): Likewise.
4858 (xop_phadd<u>bq): Likewise.
4859 (xop_phadd<u>wd): Likewise.
4860 (xop_phadd<u>wq): Likewise.
4861 (xop_phadd<u>dq): Likewise.
4862 (xop_phsubbw): Likewise.
4863 (xop_phsubwd): Likewise.
4864 (xop_phsubdq): Likewise.
4865 (xop_rotl<mode>3): Add "prefix" and "prefix_extra" attributes.
4866 (xop_rotr<mode>3): Likewise.
4867 (xop_frcz<mode>2): Likewise.
4868 (*xop_vmfrcz<mode>2): Likewise.
4869 (xop_vrotl<mode>3): Add "prefix" attribute. Change
4870 "prefix_extra" to 1.
4871 (xop_sha<mode>3): Likewise.
4872 (xop_shl<mode>3): Likewise.
4874 2023-08-07 Jan Beulich <jbeulich@suse.com>
4876 * config/i386/sse.md
4877 (*<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Drop
4879 (avx512dq_vextract<shuffletype>64x2_1_mask): Likewise.
4880 (*avx512dq_vextract<shuffletype>64x2_1): Likewise.
4881 (avx512f_vextract<shuffletype>32x4_1_mask): Likewise.
4882 (*avx512f_vextract<shuffletype>32x4_1): Likewise.
4883 (vec_extract_lo_<mode>_mask [AVX512 forms]): Likewise.
4884 (vec_extract_lo_<mode> [AVX512 forms]): Likewise.
4885 (vec_extract_hi_<mode>_mask [AVX512 forms]): Likewise.
4886 (vec_extract_hi_<mode> [AVX512 forms]): Likewise.
4887 (@vec_extract_lo_<mode> [AVX512 forms]): Likewise.
4888 (@vec_extract_hi_<mode> [AVX512 forms]): Likewise.
4889 (vec_extract_lo_v64qi): Likewise.
4890 (vec_extract_hi_v64qi): Likewise.
4891 (*vec_widen_umult_even_v16si<mask_name>): Likewise.
4892 (*vec_widen_smult_even_v16si<mask_name>): Likewise.
4893 (*avx512f_<code><mode>3<mask_name>): Likewise.
4894 (*vec_extractv4ti): Likewise.
4895 (avx512bw_<code>v32qiv32hi2<mask_name>): Likewise.
4896 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): Likewise.
4897 Add "length_immediate".
4899 2023-08-07 Jan Beulich <jbeulich@suse.com>
4901 * config/i386/i386.md (@rdrand<mode>): Add "prefix_0f". Drop
4903 (@rdseed<mode>): Likewise.
4904 * config/i386/mmx.md (<code><mode>3 [smaxmin and umaxmin cases]):
4905 Adjust "prefix_extra".
4906 * config/i386/sse.md (@vec_set<mode>_0): Likewise.
4907 (*sse4_1_<code><mode>3<mask_name>): Likewise.
4908 (*avx2_eq<mode>3): Likewise.
4909 (avx2_gt<mode>3): Likewise.
4910 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
4911 (*vec_extract<mode>): Likewise.
4912 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
4914 2023-08-07 Jan Beulich <jbeulich@suse.com>
4916 * config/i386/i386.md (rd<fsgs>base<mode>): Add "prefix_0f" and
4917 "prefix_rep". Drop "prefix_extra".
4918 (wr<fsgs>base<mode>): Likewise.
4919 (ptwrite<mode>): Likewise.
4921 2023-08-07 Jan Beulich <jbeulich@suse.com>
4923 * config/i386/i386.md (isa): Move up.
4924 (length_immediate): Handle "fma4".
4925 (prefix): Handle "ssemuladd".
4926 * config/i386/sse.md (*fma_fmadd_<mode>): Add "prefix" attribute.
4927 (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>):
4929 (<avx512>_fmadd_<mode>_mask<round_name>): Likewise.
4930 (<avx512>_fmadd_<mode>_mask3<round_name>): Likewise.
4931 (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>):
4933 (<avx512>_fmsub_<mode>_mask<round_name>): Likewise.
4934 (<avx512>_fmsub_<mode>_mask3<round_name>): Likewise.
4935 (*fma_fnmadd_<mode>): Likewise.
4936 (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>):
4938 (<avx512>_fnmadd_<mode>_mask<round_name>): Likewise.
4939 (<avx512>_fnmadd_<mode>_mask3<round_name>): Likewise.
4940 (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>):
4942 (<avx512>_fnmsub_<mode>_mask<round_name>): Likewise.
4943 (<avx512>_fnmsub_<mode>_mask3<round_name>): Likewise.
4944 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
4946 (<avx512>_fmaddsub_<mode>_mask<round_name>): Likewise.
4947 (<avx512>_fmaddsub_<mode>_mask3<round_name>): Likewise.
4948 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
4950 (<avx512>_fmsubadd_<mode>_mask<round_name>): Likewise.
4951 (<avx512>_fmsubadd_<mode>_mask3<round_name>): Likewise.
4952 (*fmai_fmadd_<mode>): Likewise.
4953 (*fmai_fmsub_<mode>): Likewise.
4954 (*fmai_fnmadd_<mode><round_name>): Likewise.
4955 (*fmai_fnmsub_<mode><round_name>): Likewise.
4956 (avx512f_vmfmadd_<mode>_mask<round_name>): Likewise.
4957 (avx512f_vmfmadd_<mode>_mask3<round_name>): Likewise.
4958 (avx512f_vmfmadd_<mode>_maskz_1<round_name>): Likewise.
4959 (*avx512f_vmfmsub_<mode>_mask<round_name>): Likewise.
4960 (avx512f_vmfmsub_<mode>_mask3<round_name>): Likewise.
4961 (*avx512f_vmfmsub_<mode>_maskz_1<round_name>): Likewise.
4962 (avx512f_vmfnmadd_<mode>_mask<round_name>): Likewise.
4963 (avx512f_vmfnmadd_<mode>_mask3<round_name>): Likewise.
4964 (avx512f_vmfnmadd_<mode>_maskz_1<round_name>): Likewise.
4965 (*avx512f_vmfnmsub_<mode>_mask<round_name>): Likewise.
4966 (*avx512f_vmfnmsub_<mode>_mask3<round_name>): Likewise.
4967 (*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): Likewise.
4968 (*fma4i_vmfmadd_<mode>): Likewise.
4969 (*fma4i_vmfmsub_<mode>): Likewise.
4970 (*fma4i_vmfnmadd_<mode>): Likewise.
4971 (*fma4i_vmfnmsub_<mode>): Likewise.
4972 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>): Likewise.
4973 (<avx512>_<complexopname>_<mode>_mask<round_name>): Likewise.
4974 (avx512fp16_fma_<complexopname>sh_v8hf<mask_scalarcz_name><round_scalarcz_name>):
4976 (avx512fp16_<complexopname>sh_v8hf_mask<round_name>): Likewise.
4977 (xop_p<macs><ssemodesuffix><ssemodesuffix>): Likewise.
4978 (xop_p<macs>dql): Likewise.
4979 (xop_p<macs>dqh): Likewise.
4980 (xop_p<macs>wd): Likewise.
4981 (xop_p<madcs>wd): Likewise.
4982 (fma_<complexpairopname>_<mode>_pair): Likewise. Add "mode" attribute.
4984 2023-08-07 Jan Beulich <jbeulich@suse.com>
4986 * config/i386/i386.md (length_immediate): Handle "sse4arg".
4988 (*xop_pcmov_<mode>): Add "mode" attribute.
4989 * config/i386/mmx.md (*xop_maskcmp<mode>3): Drop "prefix_data16",
4990 "prefix_rep", "prefix_extra", and "length_immediate" attributes.
4991 (*xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
4992 (*xop_pcmov_<mode>): Add "mode" attribute.
4993 * config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Add "mode"
4995 (xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep",
4996 "prefix_extra", and "length_immediate" attributes.
4997 (xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
4998 (xop_maskcmp_uns2<mode>3): Drop "prefix_data16", "prefix_extra",
4999 and "length_immediate" attributes. Switch "type" to "sse4arg".
5000 (xop_pcom_tf<mode>3): Likewise.
5001 (xop_vpermil2<mode>3): Drop "length_immediate" attribute.
5003 2023-08-07 Jan Beulich <jbeulich@suse.com>
5005 * config/i386/i386.md (prefix_extra): Correct comment. Fold
5006 cases yielding 2 into ones yielding 1.
5008 2023-08-07 Jan Hubicka <jh@suse.cz>
5010 PR tree-optimization/106293
5011 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
5012 * tree-vect-loop.cc (vect_transform_loop): Likewise.
5014 2023-08-07 Andrew Pinski <apinski@marvell.com>
5016 PR tree-optimization/96695
5017 * match.pd (min_value, max_value): Extend to
5020 2023-08-06 Jan Hubicka <jh@suse.cz>
5022 * config/i386/cpuid.h (__get_cpuid_count, __get_cpuid_max): Add
5023 __builtin_expect that CPU likely supports cpuid.
5025 2023-08-06 Jan Hubicka <jh@suse.cz>
5027 * tree-loop-distribution.cc (loop_distribution::execute): Disable
5028 distribution for loops with estimated iterations 0.
5030 2023-08-06 Jan Hubicka <jh@suse.cz>
5032 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update of peeled epilogues.
5034 2023-08-04 Xiao Zeng <zengxiao@eswincomputing.com>
5036 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
5037 more Zicond patterns. Fix whitespace typo.
5038 (riscv_rtx_costs): Remove accidental code duplication.
5039 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
5041 2023-08-04 Yan Simonaytes <simonaytes.yan@ispras.ru>
5044 * config/i386/i386-protos.h
5045 (vpternlog_redundant_operand_mask): Declare.
5046 (substitute_vpternlog_operands): Declare.
5047 * config/i386/i386.cc
5048 (vpternlog_redundant_operand_mask): New helper.
5049 (substitute_vpternlog_operands): New function. Use them...
5050 * config/i386/sse.md: ... here in new VPTERNLOG define_splits.
5052 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
5054 * expmed.cc (extract_bit_field_1): Document that an UNSIGNEDP
5055 value of -1 is equivalent to don't care.
5056 (extract_integral_bit_field): Indicate that we don't require
5057 the most significant word to be zero extended, if we're about
5059 (extract_fixed_bit_field_1): Document that an UNSIGNEDP value
5060 of -1 is equivalent to don't care. Don't clear the most
5061 significant bits with AND mask when UNSIGNEDP is -1.
5063 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
5065 * config/i386/sse.md (define_split): Convert highpart:DF extract
5066 from V2DFmode register into a sse2_storehpd instruction.
5067 (define_split): Likewise, convert lowpart:DF extract from V2DF
5068 register into a sse2_storelpd instruction.
5070 2023-08-04 Qing Zhao <qing.zhao@oracle.com>
5072 * doc/invoke.texi (-Wflex-array-member-not-at-end): Document
5075 2023-08-04 Vladimir N. Makarov <vmakarov@redhat.com>
5077 * lra-lives.cc (process_bb_lives): Check input insn pattern hard regs
5078 against early clobber hard regs.
5080 2023-08-04 Tamar Christina <tamar.christina@arm.com>
5082 * doc/extend.texi: Document it.
5084 2023-08-04 Tamar Christina <tamar.christina@arm.com>
5087 * config/aarch64/aarch64-simd.md (vec_widen_<sur>shiftl_lo_<mode>,
5088 vec_widen_<sur>shiftl_hi_<mode>): Remove.
5089 (aarch64_<sur>shll<mode>_internal): Renamed to...
5090 (aarch64_<su>shll<mode>): .. This.
5091 (aarch64_<sur>shll2<mode>_internal): Renamed to...
5092 (aarch64_<su>shll2<mode>): .. This.
5093 (aarch64_<sur>shll_n<mode>, aarch64_<sur>shll2_n<mode>): Re-use new
5095 * config/aarch64/constraints.md (D2, DL): New.
5096 * config/aarch64/predicates.md (aarch64_simd_shll_imm_vec): New.
5098 2023-08-04 Tamar Christina <tamar.christina@arm.com>
5100 * gensupport.cc (conlist): Support length 0 attribute.
5102 2023-08-04 Tamar Christina <tamar.christina@arm.com>
5104 * config/aarch64/aarch64.cc (aarch64_bool_compound_p): New.
5105 (aarch64_adjust_stmt_cost, aarch64_vector_costs::count_ops): Use it.
5107 2023-08-04 Tamar Christina <tamar.christina@arm.com>
5109 * config/aarch64/aarch64.cc (aarch64_multiply_add_p): Update handling
5111 (aarch64_adjust_stmt_cost): Use it.
5112 (aarch64_vector_costs::count_ops): Likewise.
5113 (aarch64_vector_costs::add_stmt_cost): Pass vinfo to
5114 aarch64_adjust_stmt_cost.
5116 2023-08-04 Richard Biener <rguenther@suse.de>
5118 PR tree-optimization/110838
5119 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
5120 Fix right-shift value sanitizing. Properly emit external
5121 def mangling in the preheader rather than in the pattern
5122 def sequence where it will fail vectorizing.
5124 2023-08-04 Matthew Malcomson <matthew.malcomson@arm.com>
5126 PR middle-end/110316
5128 * timevar.cc (NANOSEC_PER_SEC, TICKS_TO_NANOSEC,
5129 CLOCKS_TO_NANOSEC, nanosec_to_floating_sec, percent_of): New.
5130 (TICKS_TO_MSEC, CLOCKS_TO_MSEC): Remove these macros.
5131 (timer::validate_phases): Use integral arithmetic to check
5133 (timer::print_row, timer::print): Convert from integral
5134 nanoseconds to floating point seconds before printing.
5135 (timer::all_zero): Change limit to nanosec count instead of
5136 fractional count of seconds.
5137 (make_json_for_timevar_time_def): Convert from integral
5138 nanoseconds to floating point seconds before recording.
5139 * timevar.h (struct timevar_time_def): Update all measurements
5140 to use uint64_t nanoseconds rather than seconds stored in a
5143 2023-08-04 Richard Biener <rguenther@suse.de>
5145 PR tree-optimization/110838
5146 * match.pd (([rl]shift @0 out-of-bounds) -> zero): Restrict
5147 the arithmetic right-shift case to non-negative operands.
5149 2023-08-04 Pan Li <pan2.li@intel.com>
5152 2023-08-04 Pan Li <pan2.li@intel.com>
5154 * config/riscv/riscv-vector-builtins-bases.cc
5155 (class vfmacc_frm): New class for vfmacc frm.
5156 (vfmacc_frm_obj): New declaration.
5158 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5159 * config/riscv/riscv-vector-builtins-functions.def
5160 (vfmacc_frm): New function definition.
5161 * config/riscv/riscv-vector-builtins.cc
5162 (function_expander::use_ternop_insn): Add frm operand support.
5163 * config/riscv/vector.md: Add vfmuladd to frm_mode.
5165 2023-08-04 Pan Li <pan2.li@intel.com>
5168 2023-08-04 Pan Li <pan2.li@intel.com>
5170 * config/riscv/riscv-vector-builtins-bases.cc
5171 (class vfnmacc_frm): New class for vfnmacc.
5172 (vfnmacc_frm_obj): New declaration.
5174 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5175 * config/riscv/riscv-vector-builtins-functions.def
5176 (vfnmacc_frm): New function definition.
5178 2023-08-04 Pan Li <pan2.li@intel.com>
5181 2023-08-04 Pan Li <pan2.li@intel.com>
5183 * config/riscv/riscv-vector-builtins-bases.cc
5184 (class vfmsac_frm): New class for vfmsac frm.
5185 (vfmsac_frm_obj): New declaration.
5187 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5188 * config/riscv/riscv-vector-builtins-functions.def
5189 (vfmsac_frm): New function definition.
5191 2023-08-04 Pan Li <pan2.li@intel.com>
5194 2023-08-04 Pan Li <pan2.li@intel.com>
5196 * config/riscv/riscv-vector-builtins-bases.cc
5197 (class vfnmsac_frm): New class for vfnmsac frm.
5198 (vfnmsac_frm_obj): New declaration.
5200 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5201 * config/riscv/riscv-vector-builtins-functions.def
5202 (vfnmsac_frm): New function definition.
5204 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
5206 * config/avr/avr-mcus.def (avr64dd14, avr64dd20, avr64dd28, avr64dd32)
5207 (avr64ea28, avr64ea32, avr64ea48, attiny424, attiny426, attiny427)
5208 (attiny824, attiny826, attiny827, attiny1624, attiny1626, attiny1627)
5209 (attiny3224, attiny3226, attiny3227, avr16dd14, avr16dd20, avr16dd28)
5210 (avr16dd32, avr32dd14, avr32dd20, avr32dd28, avr32dd32)
5211 (attiny102, attiny104): New devices.
5212 * doc/avr-mmcu.texi: Regenerate.
5214 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
5216 * config/avr/avr-mcus.def (avr128d*, avr64d*): Fix their FLASH_SIZE
5217 and PM_OFFSET entries.
5219 2023-08-04 Andrew Pinski <apinski@marvell.com>
5221 PR tree-optimization/110874
5222 * gimple-match-head.cc (gimple_bit_not_with_nop): New declaration.
5223 (gimple_maybe_cmp): Likewise.
5224 (gimple_bitwise_inverted_equal_p): Rewrite to use gimple_bit_not_with_nop
5225 and gimple_maybe_cmp instead of being recursive.
5226 * match.pd (bit_not_with_nop): New match pattern.
5227 (maybe_cmp): Likewise.
5229 2023-08-04 Drew Ross <drross@redhat.com>
5231 PR middle-end/101955
5232 * match.pd ((signed x << c) >> c): New canonicalization.
5234 2023-08-04 Pan Li <pan2.li@intel.com>
5236 * config/riscv/riscv-vector-builtins-bases.cc
5237 (class vfnmsac_frm): New class for vfnmsac frm.
5238 (vfnmsac_frm_obj): New declaration.
5240 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5241 * config/riscv/riscv-vector-builtins-functions.def
5242 (vfnmsac_frm): New function definition.
5244 2023-08-04 Pan Li <pan2.li@intel.com>
5246 * config/riscv/riscv-vector-builtins-bases.cc
5247 (class vfmsac_frm): New class for vfmsac frm.
5248 (vfmsac_frm_obj): New declaration.
5250 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5251 * config/riscv/riscv-vector-builtins-functions.def
5252 (vfmsac_frm): New function definition.
5254 2023-08-04 Pan Li <pan2.li@intel.com>
5256 * config/riscv/riscv-vector-builtins-bases.cc
5257 (class vfnmacc_frm): New class for vfnmacc.
5258 (vfnmacc_frm_obj): New declaration.
5260 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5261 * config/riscv/riscv-vector-builtins-functions.def
5262 (vfnmacc_frm): New function definition.
5264 2023-08-04 Hao Liu <hliu@os.amperecomputing.com>
5267 * config/aarch64/aarch64.cc (aarch64_force_single_cycle): check
5268 STMT_VINFO_REDUC_DEF to avoid failures in info_for_reduction.
5270 2023-08-04 Pan Li <pan2.li@intel.com>
5272 * config/riscv/riscv-vector-builtins-bases.cc
5273 (class vfmacc_frm): New class for vfmacc frm.
5274 (vfmacc_frm_obj): New declaration.
5276 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5277 * config/riscv/riscv-vector-builtins-functions.def
5278 (vfmacc_frm): New function definition.
5279 * config/riscv/riscv-vector-builtins.cc
5280 (function_expander::use_ternop_insn): Add frm operand support.
5281 * config/riscv/vector.md: Add vfmuladd to frm_mode.
5283 2023-08-04 Pan Li <pan2.li@intel.com>
5285 * config/riscv/riscv-vector-builtins-bases.cc
5286 (vfwmul_frm_obj): New declaration.
5287 (vfwmul_frm): Ditto.
5288 * config/riscv/riscv-vector-builtins-bases.h:
5289 (vfwmul_frm): Ditto.
5290 * config/riscv/riscv-vector-builtins-functions.def
5291 (vfwmul_frm): New function definition.
5292 * config/riscv/vector.md: (frm_mode) Add vfwmul to frm_mode.
5294 2023-08-04 Pan Li <pan2.li@intel.com>
5296 * config/riscv/riscv-vector-builtins-bases.cc
5297 (binop_frm): New declaration.
5298 (reverse_binop_frm): Likewise.
5300 * config/riscv/riscv-vector-builtins-bases.h:
5301 (vfdiv_frm): New extern declaration.
5302 (vfrdiv_frm): Likewise.
5303 * config/riscv/riscv-vector-builtins-functions.def
5304 (vfdiv_frm): New function definition.
5305 (vfrdiv_frm): Likewise.
5306 * config/riscv/vector.md: Add vfdiv to frm_mode.
5308 2023-08-03 Jan Hubicka <jh@suse.cz>
5310 * tree-cfg.cc (print_loop_info): Print entry count.
5312 2023-08-03 Jan Hubicka <jh@suse.cz>
5314 * tree-ssa-loop-split.cc (split_loop): Update estimated iteration counts.
5316 2023-08-03 Jan Hubicka <jh@suse.cz>
5319 * cfgloopmanip.cc (scale_loop_profile): (Un)initialize
5320 unadjusted_exit_count.
5322 2023-08-03 Aldy Hernandez <aldyh@redhat.com>
5324 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Read global
5327 2023-08-03 Xiao Zeng <zengxiao@eswincomputing.com>
5329 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
5330 various Zicond patterns.
5331 * config/riscv/riscv.md (mov<mode>cc): Allow TARGET_ZICOND. Use
5332 sfb_alu_operand for both arms of the conditional move.
5333 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
5335 2023-08-03 Cupertino Miranda <cupertino.miranda@oracle.com>
5341 * config.gcc: Added core-builtins.cc and .o files.
5342 * config/bpf/bpf-passes.def: Removed file.
5343 * config/bpf/bpf-protos.h (bpf_add_core_reloc,
5344 bpf_replace_core_move_operands): New prototypes.
5345 * config/bpf/bpf.cc (enum bpf_builtins, is_attr_preserve_access,
5346 maybe_make_core_relo, bpf_core_field_info, bpf_core_compute,
5347 bpf_core_get_index, bpf_core_new_decl, bpf_core_walk,
5348 bpf_is_valid_preserve_field_info_arg, is_attr_preserve_access,
5349 handle_attr_preserve, pass_data_bpf_core_attr, pass_bpf_core_attr):
5351 (def_builtin, bpf_expand_builtin, bpf_resolve_overloaded_builtin): Changed.
5352 * config/bpf/bpf.md (define_expand mov<MM:mode>): Changed.
5353 (mov_reloc_core<mode>): Added.
5354 * config/bpf/core-builtins.cc (struct cr_builtin, enum
5355 cr_decision struct cr_local, struct cr_final, struct
5356 core_builtin_helpers, enum bpf_plugin_states): Added types.
5357 (builtins_data, core_builtin_helpers, core_builtin_type_defs):
5359 (allocate_builtin_data, get_builtin-data, search_builtin_data,
5360 remove_parser_plugin, compare_same_kind, compare_same_ptr_expr,
5361 compare_same_ptr_type, is_attr_preserve_access, core_field_info,
5362 bpf_core_get_index, compute_field_expr,
5363 pack_field_expr_for_access_index, pack_field_expr_for_preserve_field,
5364 process_field_expr, pack_enum_value, process_enum_value, pack_type,
5365 process_type, bpf_require_core_support, make_core_relo, read_kind,
5366 kind_access_index, kind_preserve_field_info, kind_enum_value,
5367 kind_type_id, kind_preserve_type_info, get_core_builtin_fndecl_for_type,
5368 bpf_handle_plugin_finish_type, bpf_init_core_builtins,
5369 construct_builtin_core_reloc, bpf_resolve_overloaded_core_builtin,
5370 bpf_expand_core_builtin, bpf_add_core_reloc,
5371 bpf_replace_core_move_operands): Added functions.
5372 * config/bpf/core-builtins.h (enum bpf_builtins): Added.
5373 (bpf_init_core_builtins, bpf_expand_core_builtin,
5374 bpf_resolve_overloaded_core_builtin): Added functions.
5375 * config/bpf/coreout.cc (struct bpf_core_extra): Added.
5376 (bpf_core_reloc_add, output_asm_btfext_core_reloc): Changed.
5377 * config/bpf/coreout.h (bpf_core_reloc_add) Changed prototype.
5378 * config/bpf/t-bpf: Added core-builtins.o.
5379 * doc/extend.texi: Added documentation for new BPF builtins.
5381 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
5383 * gimple-range-fold.cc (fold_using_range::range_of_range_op): Add
5384 ranges to the call to relation_fold_and_or.
5385 (fold_using_range::relation_fold_and_or): Add op1 and op2 ranges.
5386 (fur_source::register_outgoing_edges): Add op1 and op2 ranges.
5387 * gimple-range-fold.h (relation_fold_and_or): Adjust params.
5388 * gimple-range-gori.cc (gori_compute::compute_operand_range): Add
5389 a varying op1 and op2 to call.
5390 * range-op-float.cc (range_operator::op1_op2_relation): New dafaults.
5391 (operator_equal::op1_op2_relation): New float version.
5392 (operator_not_equal::op1_op2_relation): Ditto.
5393 (operator_lt::op1_op2_relation): Ditto.
5394 (operator_le::op1_op2_relation): Ditto.
5395 (operator_gt::op1_op2_relation): Ditto.
5396 (operator_ge::op1_op2_relation) Ditto.
5397 * range-op-mixed.h (operator_equal::op1_op2_relation): New float
5399 (operator_not_equal::op1_op2_relation): Ditto.
5400 (operator_lt::op1_op2_relation): Ditto.
5401 (operator_le::op1_op2_relation): Ditto.
5402 (operator_gt::op1_op2_relation): Ditto.
5403 (operator_ge::op1_op2_relation): Ditto.
5404 * range-op.cc (range_op_handler::op1_op2_relation): Dispatch new
5406 (range_operator::op1_op2_relation): Add extra params.
5407 (operator_equal::op1_op2_relation): Ditto.
5408 (operator_not_equal::op1_op2_relation): Ditto.
5409 (operator_lt::op1_op2_relation): Ditto.
5410 (operator_le::op1_op2_relation): Ditto.
5411 (operator_gt::op1_op2_relation): Ditto.
5412 (operator_ge::op1_op2_relation): Ditto.
5413 * range-op.h (range_operator): New prototypes.
5414 (range_op_handler): Ditto.
5416 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
5418 * gimple-range-gori.cc (gori_compute::compute_operand1_range):
5419 Use identity relation.
5420 (gori_compute::compute_operand2_range): Ditto.
5421 * value-relation.cc (get_identity_relation): New.
5422 * value-relation.h (get_identity_relation): New prototype.
5424 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
5426 * value-range.h (Value_Range::set_varying): Set the type.
5427 (Value_Range::set_zero): Ditto.
5428 (Value_Range::set_nonzero): Ditto.
5430 2023-08-03 Jeff Law <jeffreyalaw@gmail.com>
5432 * config/riscv/riscv.cc (riscv_rtx_costs): Remove errant hunk from
5435 2023-08-03 Pan Li <pan2.li@intel.com>
5437 * config/riscv/riscv-vector-builtins-bases.cc: Add vfsub.
5439 2023-08-03 Richard Sandiford <richard.sandiford@arm.com>
5441 * poly-int.h (can_div_trunc_p): Succeed for more boundary conditions.
5443 2023-08-03 Richard Biener <rguenther@suse.de>
5445 PR tree-optimization/110838
5446 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
5447 Adjust the shift operand of RSHIFT_EXPRs.
5449 2023-08-03 Richard Biener <rguenther@suse.de>
5451 PR tree-optimization/110702
5452 * tree-ssa-loop-ivopts.cc (rewrite_use_address): When
5453 we created a NULL pointer based access rewrite that to
5456 2023-08-03 Richard Biener <rguenther@suse.de>
5458 * tree-ssa-sink.cc: Include tree-ssa-live.h.
5459 (pass_sink_code::execute): Instantiate virtual_operand_live
5461 (sink_code_in_bb): Pass down virtual_operand_live.
5462 (statement_sink_location): Get virtual_operand_live and
5463 verify we are not sinking loads across stores by looking up
5464 the live virtual operand at the sink location.
5466 2023-08-03 Richard Biener <rguenther@suse.de>
5468 * tree-ssa-live.h (class virtual_operand_live): New.
5469 * tree-ssa-live.cc (virtual_operand_live::init): New.
5470 (virtual_operand_live::get_live_in): Likewise.
5471 (virtual_operand_live::get_live_out): Likewise.
5473 2023-08-03 Richard Biener <rguenther@suse.de>
5475 * passes.def: Exchange loop splitting and final value
5478 2023-08-03 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
5480 * config/s390/s390.cc (expand_perm_as_a_vlbr_vstbr_candidate):
5481 New function which handles bswap patterns for vec_perm_const.
5482 (vectorize_vec_perm_const_1): Call new function.
5483 * config/s390/vector.md (*bswap<mode>): Fix operands in output
5485 (*vstbr<mode>): New insn.
5487 2023-08-03 Alexandre Oliva <oliva@adacore.com>
5489 * config/vxworks-smp.opt: New. Introduce -msmp.
5490 * config.gcc: Enable it on powerpc* vxworks prior to 7r*.
5491 * config/rs6000/vxworks.h (STARTFILE_PREFIX_SPEC): Choose
5492 lib_smp when -msmp is present in the command line.
5493 * doc/invoke.texi: Document it.
5495 2023-08-03 Yanzhang Wang <yanzhang.wang@intel.com>
5497 * config/riscv/riscv.cc (riscv_save_reg_p): Save ra for leaf
5498 when enabling -mno-omit-leaf-frame-pointer
5499 (riscv_option_override): Override omit-frame-pointer.
5500 (riscv_frame_pointer_required): Save s0 for non-leaf function
5501 (TARGET_FRAME_POINTER_REQUIRED): Override defination
5502 * config/riscv/riscv.opt: Add option support.
5504 2023-08-03 Roger Sayle <roger@nextmovesoftware.com>
5507 * config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
5508 place operand in a register before gen_<insn>64ti2_doubleword.
5509 (<any_rotate>di3): Likewise, for rotations by 32 bits, place
5510 operand in a register before gen_<insn>32di2_doubleword.
5511 (<any_rotate>32di2_doubleword): Constrain operand to be in register.
5512 (<any_rotate>64ti2_doubleword): Likewise.
5514 2023-08-03 Pan Li <pan2.li@intel.com>
5516 * config/riscv/riscv-vector-builtins-bases.cc
5517 (vfmul_frm_obj): New declaration.
5519 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
5520 * config/riscv/riscv-vector-builtins-functions.def
5521 (vfmul_frm): New function definition.
5522 * config/riscv/vector.md: Add vfmul to frm_mode.
5524 2023-08-03 Andrew Pinski <apinski@marvell.com>
5526 * match.pd (`~X & X`): Check that the types match.
5527 (`~x | x`, `~x ^ x`): Likewise.
5529 2023-08-03 Pan Li <pan2.li@intel.com>
5531 * config/riscv/riscv-vector-builtins-bases.h: Remove
5532 redudant declaration.
5534 2023-08-03 Pan Li <pan2.li@intel.com>
5536 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add
5538 * config/riscv/riscv-vector-builtins-bases.h: Add declaration.
5539 * config/riscv/riscv-vector-builtins-functions.def (vfwsub_frm):
5540 Add vfwsub function definitions.
5542 2023-08-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
5544 PR rtl-optimization/110867
5545 * combine.cc (simplify_compare_const): Try the optimization only
5546 in case the constant fits into the comparison mode.
5548 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
5550 * config/riscv/zicond.md: Remove incorrect zicond patterns and
5551 renumber/rename them.
5552 (zero.nez.<GPR:MODE><X:mode>.opt2): Fix output string.
5554 2023-08-02 Richard Biener <rguenther@suse.de>
5556 * tree-phinodes.h (add_phi_node_to_bb): Remove.
5557 * tree-phinodes.cc (add_phi_node_to_bb): Make static.
5559 2023-08-02 Jan Beulich <jbeulich@suse.com>
5561 * config/i386/sse.md (vec_dupv2df<mask_name>): Fold the middle
5562 two of the alternatives.
5564 2023-08-02 Richard Biener <rguenther@suse.de>
5566 PR tree-optimization/92335
5567 * tree-ssa-sink.cc (select_best_block): Before loop
5568 optimizations avoid sinking unconditional loads/stores
5569 in innermost loops to conditional executed places.
5571 2023-08-02 Andrew Pinski <apinski@marvell.com>
5573 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Valueize
5574 the comparison operands before comparing them.
5576 2023-08-02 Andrew Pinski <apinski@marvell.com>
5578 * match.pd (`~X & X`, `~X | X`): Move over to
5579 use bitwise_inverted_equal_p, removing :c as bitwise_inverted_equal_p
5580 handles that already.
5581 Remove range test simplifications to true/false as they
5582 are now handled by these patterns.
5584 2023-08-02 Andrew Pinski <apinski@marvell.com>
5586 * tree-ssa-phiopt.cc (match_simplify_replacement): Mark's cond
5587 statement's lhs and rhs to check if trivial dead.
5588 Rename inserted_exprs to exprs_maybe_dce; also move it so
5589 bitmap is not allocated if not needed.
5591 2023-08-02 Pan Li <pan2.li@intel.com>
5593 * config/riscv/riscv-vector-builtins-bases.cc
5594 (class widen_binop_frm): New class for binop frm.
5595 (BASE): Add vfwadd_frm.
5596 * config/riscv/riscv-vector-builtins-bases.h: New declaration.
5597 * config/riscv/riscv-vector-builtins-functions.def
5598 (vfwadd_frm): New function definition.
5599 * config/riscv/riscv-vector-builtins-shapes.cc
5600 (BASE_NAME_MAX_LEN): New macro.
5601 (struct alu_frm_def): Leverage new base class.
5602 (struct build_frm_base): New build base for frm.
5603 (struct widen_alu_frm_def): New struct for widen alu frm.
5604 (SHAPE): Add widen_alu_frm shape.
5605 * config/riscv/riscv-vector-builtins-shapes.h: New declaration.
5606 * config/riscv/vector.md (frm_mode): Add vfwalu type.
5608 2023-08-02 Jan Hubicka <jh@suse.cz>
5610 * cfgloop.h (loop_count_in): Declare.
5611 * cfgloopanal.cc (expected_loop_iterations_by_profile): Use count_in.
5612 (loop_count_in): Move here from ...
5613 * cfgloopmanip.cc (loop_count_in): ... here.
5614 (scale_loop_profile): Improve dumping; cast iteration bound to sreal.
5616 2023-08-02 Jan Hubicka <jh@suse.cz>
5618 * cfg.cc (scale_strictly_dominated_blocks): New function.
5619 * cfg.h (scale_strictly_dominated_blocks): Declare.
5620 * tree-cfg.cc (fold_loop_internal_call): Fixup CFG profile.
5622 2023-08-02 Richard Biener <rguenther@suse.de>
5624 PR rtl-optimization/110587
5625 * lra-spills.cc (return_regno_p): Remove.
5626 (regno_in_use_p): Likewise.
5627 (lra_final_code_change): Do not remove noop moves
5628 between hard registers.
5630 2023-08-02 liuhongt <hongtao.liu@intel.com>
5633 * config/i386/sse.md (vec_fmaddsub<mode>4): Extend to vector
5634 HFmode, use mode iterator VFH instead.
5635 (vec_fmsubadd<mode>4): Ditto.
5636 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
5637 Remove scalar mode from iterator, use VFH_AVX512VL instead.
5638 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
5641 2023-08-02 liuhongt <hongtao.liu@intel.com>
5643 * config/i386/sse.md (*avx2_lddqu_inserti_to_bcasti): New
5644 pre_reload define_insn_and_split.
5646 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
5648 * config/riscv/riscv.cc (riscv_rtx_costs): Add costing for
5649 using Zicond to implement some conditional moves.
5651 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
5653 * config/riscv/zicond.md: Use the X iterator instead of ANYI
5654 on the comparison input operands.
5656 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
5658 * config/riscv/riscv.cc (riscv_rtx_costs, case IF_THEN_ELSE): Add
5660 (case SET): For INSNs that just set a REG, take the cost from the
5662 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
5664 2023-08-02 Hu, Lin1 <lin1.hu@intel.com>
5666 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_INT8_SET):
5667 Change OPTION_MASK_ISA2_AMX_TILE to OPTION_MASK_ISA2_AMX_TILE_SET.
5668 (OPTION_MASK_ISA2_AMX_BF16_SET): Ditto
5669 (OPTION_MASK_ISA2_AMX_FP16_SET): Ditto
5670 (OPTION_MASK_ISA2_AMX_COMPLEX_SET): Ditto
5671 (OPTION_MASK_ISA_ABM_SET):
5672 Change OPTION_MASK_ISA_POPCNT to OPTION_MASK_ISA_POPCNT_SET.
5674 2023-08-01 Andreas Krebbel <krebbel@linux.ibm.com>
5676 * config/s390/s390.cc (s390_encode_section_info): Assume external
5677 symbols without explicit alignment to be unaligned if
5678 -munaligned-symbols has been specified.
5679 * config/s390/s390.opt (-munaligned-symbols): New option.
5681 2023-08-01 Richard Ball <richard.ball@arm.com>
5683 * gimple-fold.cc (fold_ctor_reference):
5684 Add support for poly_int.
5686 2023-08-01 Georg-Johann Lay <avr@gjlay.de>
5689 * config/avr/avr.cc (avr_optimize_casesi): Set JUMP_LABEL and
5690 LABEL_NUSES of new conditional branch instruction.
5692 2023-08-01 Jan Hubicka <jh@suse.cz>
5694 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update after
5695 constant prologue peeling.
5697 2023-08-01 Christophe Lyon <christophe.lyon@linaro.org>
5699 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Fix spelling.
5701 2023-08-01 Pan Li <pan2.li@intel.com>
5702 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5704 * config/riscv/riscv.cc (DYNAMIC_FRM_RTL): New macro.
5705 (STATIC_FRM_P): Ditto.
5706 (struct mode_switching_info): New struct for mode switching.
5707 (struct machine_function): Add new field mode switching.
5708 (riscv_emit_frm_mode_set): Add DYN_CALL emit.
5709 (riscv_frm_adjust_mode_after_call): New function for call mode.
5710 (riscv_frm_emit_after_call_in_bb_end): New function for emit
5711 insn when call as the end of bb.
5712 (riscv_frm_mode_needed): New function for frm mode needed.
5713 (frm_unknown_dynamic_p): Remove call check.
5714 (riscv_mode_needed): Extrac function for frm.
5715 (riscv_frm_mode_after): Add DYN_CALL after.
5716 (riscv_mode_entry): Remove backup rtl initialization.
5717 * config/riscv/vector.md (frm_mode): Add dyn_call.
5718 (fsrmsi_restore_exit): Rename to _volatile.
5719 (fsrmsi_restore_volatile): Likewise.
5721 2023-08-01 Pan Li <pan2.li@intel.com>
5723 * config/riscv/riscv-vector-builtins-bases.cc
5724 (class reverse_binop_frm): Add new template for reversed frm.
5725 (vfsub_frm_obj): New obj.
5726 (vfrsub_frm_obj): Likewise.
5727 * config/riscv/riscv-vector-builtins-bases.h:
5728 (vfsub_frm): New declaration.
5729 (vfrsub_frm): Likewise.
5730 * config/riscv/riscv-vector-builtins-functions.def
5731 (vfsub_frm): New function define.
5732 (vfrsub_frm): Likewise.
5734 2023-08-01 Andrew Pinski <apinski@marvell.com>
5736 PR tree-optimization/93044
5737 * match.pd (nested int casts): A truncation (to the same size or smaller)
5738 can always remove the inner cast.
5740 2023-07-31 Hamza Mahfooz <someguy@effective-light.com>
5743 * doc/invoke.texi (-Wmissing-variable-declarations): Document
5746 2023-07-31 Andrew Pinski <apinski@marvell.com>
5748 PR tree-optimization/106164
5749 * match.pd (`a != b & a <= b`, `a != b & a >= b`,
5750 `a == b | a < b`, `a == b | a > b`): Handle these cases
5753 2023-07-31 Andrew Pinski <apinski@marvell.com>
5755 PR tree-optimization/106164
5756 * match.pd: Extend the `(X CMP1 CST1) AND/IOR (X CMP2 CST2)`
5757 patterns to support `(X CMP1 Y) AND/IOR (X CMP2 Y)`.
5759 2023-07-31 Andrew Pinski <apinski@marvell.com>
5761 PR tree-optimization/100864
5762 * generic-match-head.cc (bitwise_inverted_equal_p): New function.
5763 * gimple-match-head.cc (bitwise_inverted_equal_p): New macro.
5764 (gimple_bitwise_inverted_equal_p): New function.
5765 * match.pd ((~x | y) & x): Use bitwise_inverted_equal_p
5766 instead of direct matching bit_not.
5768 2023-07-31 Costas Argyris <costas.argyris@gmail.com>
5771 * gcc-ar.cc (main): Expand argv and use
5772 temporary response file to call ar if any
5773 expansions were made.
5775 2023-07-31 Andrew MacLeod <amacleod@redhat.com>
5777 PR tree-optimization/110582
5778 * gimple-range-fold.cc (fur_list::get_operand): Do not use the
5779 range vector for non-ssa names.
5781 2023-07-31 David Malcolm <dmalcolm@redhat.com>
5784 * diagnostic-client-data-hooks.h (class sarif_object): New forward
5786 (diagnostic_client_data_hooks::add_sarif_invocation_properties):
5788 * diagnostic-format-sarif.cc: Include "diagnostic-format-sarif.h".
5789 (class sarif_invocation): Inherit from sarif_object rather than
5791 (class sarif_result): Likewise.
5792 (class sarif_ice_notification): Likewise.
5793 (sarif_object::get_or_create_properties): New.
5794 (sarif_invocation::prepare_to_flush): Add "context" param. Use it
5795 to call the context's add_sarif_invocation_properties hook.
5796 (sarif_builder::flush_to_file): Pass m_context to
5797 sarif_invocation::prepare_to_flush.
5798 * diagnostic-format-sarif.h: New header.
5799 * doc/invoke.texi (Developer Options): Clarify that -ftime-report
5800 writes to stderr. Document that if SARIF diagnostic output is
5801 requested then any timing information is written in JSON form as
5802 part of the SARIF output, rather than to stderr.
5803 * timevar.cc: Include "json.h".
5804 (timer::named_items::m_hash_map): Split out type into...
5805 (timer::named_items::hash_map_t): ...this new typedef.
5806 (timer::named_items::make_json): New function.
5807 (timevar_diff): New function.
5808 (make_json_for_timevar_time_def): New function.
5809 (timer::timevar_def::make_json): New function.
5810 (timer::make_json): New function.
5811 * timevar.h (class json::value): New forward decl.
5812 (timer::make_json): New decl.
5813 (timer::timevar_def::make_json): New decl.
5814 * tree-diagnostic-client-data-hooks.cc: Include
5815 "diagnostic-format-sarif.h" and "timevar.h".
5816 (compiler_data_hooks::add_sarif_invocation_properties): New vfunc
5819 2023-07-31 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
5821 * combine.cc (simplify_compare_const): Narrow comparison of
5822 memory and constant.
5823 (try_combine): Adapt new function signature.
5824 (simplify_comparison): Adapt new function signature.
5826 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
5828 * config/riscv/riscv-v.cc (expand_vec_series): Drop unused
5830 (expand_vector_init_insert_elems): Ditto.
5832 2023-07-31 Hao Liu <hliu@os.amperecomputing.com>
5835 * config/aarch64/aarch64.cc (count_ops): Only '* count' for
5836 single_defuse_cycle while counting reduction_latency.
5838 2023-07-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
5840 * internal-fn.def (DEF_INTERNAL_COND_FN): New macro.
5841 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
5862 (COND_LEN_ADD): Ditto.
5863 (COND_LEN_SUB): Ditto.
5864 (COND_LEN_MUL): Ditto.
5865 (COND_LEN_DIV): Ditto.
5866 (COND_LEN_MOD): Ditto.
5867 (COND_LEN_RDIV): Ditto.
5868 (COND_LEN_MIN): Ditto.
5869 (COND_LEN_MAX): Ditto.
5870 (COND_LEN_FMIN): Ditto.
5871 (COND_LEN_FMAX): Ditto.
5872 (COND_LEN_AND): Ditto.
5873 (COND_LEN_IOR): Ditto.
5874 (COND_LEN_XOR): Ditto.
5875 (COND_LEN_SHL): Ditto.
5876 (COND_LEN_SHR): Ditto.
5877 (COND_LEN_FMA): Ditto.
5878 (COND_LEN_FMS): Ditto.
5879 (COND_LEN_FNMA): Ditto.
5880 (COND_LEN_FNMS): Ditto.
5881 (COND_LEN_NEG): Ditto.
5882 (ADD): New macro define.
5903 2023-07-31 Roger Sayle <roger@nextmovesoftware.com>
5906 * config/i386/i386-features.cc (compute_convert_gain): Check
5907 TARGET_AVX512VL (not TARGET_AVX512F) when considering V2DImode
5908 and V4SImode rotates in STV.
5909 (general_scalar_chain::convert_rotate): Likewise.
5911 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
5913 * config/riscv/autovec.md (abs<mode>2): Remove `.require ()`.
5914 * config/riscv/riscv-protos.h (get_mask_mode): Update return
5916 * config/riscv/riscv-v.cc (rvv_builder::rvv_builder): Remove
5918 (emit_vlmax_insn): Ditto.
5919 (emit_vlmax_fp_insn): Ditto.
5920 (emit_vlmax_ternary_insn): Ditto.
5921 (emit_vlmax_fp_ternary_insn): Ditto.
5922 (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
5923 (emit_nonvlmax_insn): Ditto.
5924 (emit_vlmax_slide_insn): Ditto.
5925 (emit_nonvlmax_slide_tu_insn): Ditto.
5926 (emit_vlmax_merge_insn): Ditto.
5927 (emit_vlmax_masked_insn): Ditto.
5928 (emit_nonvlmax_masked_insn): Ditto.
5929 (emit_vlmax_masked_store_insn): Ditto.
5930 (emit_nonvlmax_masked_store_insn): Ditto.
5931 (emit_vlmax_masked_mu_insn): Ditto.
5932 (emit_nonvlmax_tu_insn): Ditto.
5933 (emit_nonvlmax_fp_tu_insn): Ditto.
5934 (emit_scalar_move_insn): Ditto.
5935 (emit_vlmax_compress_insn): Ditto.
5936 (emit_vlmax_reduction_insn): Ditto.
5937 (emit_vlmax_fp_reduction_insn): Ditto.
5938 (emit_nonvlmax_fp_reduction_insn): Ditto.
5939 (expand_vec_series): Ditto.
5940 (expand_vector_init_merge_repeating_sequence): Ditto.
5941 (expand_vec_perm): Ditto.
5942 (shuffle_merge_patterns): Ditto.
5943 (shuffle_compress_patterns): Ditto.
5944 (shuffle_decompress_patterns): Ditto.
5945 (expand_reduction): Ditto.
5946 (get_mask_mode): Update return type.
5947 * config/riscv/riscv.cc (riscv_get_mask_mode): Check vector type
5948 is valid, and use new get_mask_mode interface.
5950 2023-07-31 Pan Li <pan2.li@intel.com>
5952 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_frm_def):
5953 Move rm suffix before mask.
5955 2023-07-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5957 * config/riscv/autovec-vls.md (@vec_duplicate<mode>): New pattern.
5958 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Add VLS autovec
5961 2023-07-29 Roger Sayle <roger@nextmovesoftware.com>
5964 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
5965 (extzv<mode>): Likewise.
5966 (insv<mode>): Likewise.
5967 (*testqi_ext_3): Likewise.
5968 (*btr<mode>_2): Likewise.
5969 (define_split): Likewise.
5970 (*btsq_imm): Likewise.
5971 (*btrq_imm): Likewise.
5972 (*btcq_imm): Likewise.
5973 (define_peephole2 x3): Likewise.
5974 (*bt<mode>): Likewise
5975 (*bt<mode>_mask): New define_insn_and_split.
5976 (*jcc_bt<mode>): Use QImode for offsets.
5977 (*jcc_bt<mode>_1): Delete obsolete pattern.
5978 (*jcc_bt<mode>_mask): Use QImode offsets.
5979 (*jcc_bt<mode>_mask_1): Likewise.
5980 (define_split): Likewise.
5981 (*bt<mode>_setcqi): Likewise.
5982 (*bt<mode>_setncqi): Likewise.
5983 (*bt<mode>_setnc<mode>): Likewise.
5984 (*bt<mode>_setncqi_2): Likewise.
5985 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
5986 (bmi2_bzhi_<mode>3): Use QImode offsets.
5987 (*bmi2_bzhi_<mode>3): Likewise.
5988 (*bmi2_bzhi_<mode>3_1): Likewise.
5989 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
5990 (@tbm_bextri_<mode>): Likewise.
5992 2023-07-29 Jan Hubicka <jh@suse.cz>
5994 * profile-count.cc (profile_probability::sqrt): New member function.
5995 (profile_probability::pow): Likewise.
5996 * profile-count.h: (profile_probability::sqrt): Declare
5997 (profile_probability::pow): Likewise.
5998 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
6000 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
6002 * gimple-range-cache.cc (ssa_cache::merge_range): New.
6003 (ssa_lazy_cache::merge_range): New.
6004 * gimple-range-cache.h (class ssa_cache): Adjust protoypes.
6005 (class ssa_lazy_cache): Ditto.
6006 * gimple-range.cc (assume_query::calculate_op): Use merge_range.
6008 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
6010 * tree-ssa-propagate.cc (substitute_and_fold_engine::value_on_edge):
6011 Move from value-query.cc.
6012 (substitute_and_fold_engine::value_of_stmt): Ditto.
6013 (substitute_and_fold_engine::range_of_expr): New.
6014 * tree-ssa-propagate.h (substitute_and_fold_engine): Inherit from
6015 range_query. New prototypes.
6016 * value-query.cc (value_query::value_on_edge): Relocate.
6017 (value_query::value_of_stmt): Ditto.
6018 * value-query.h (class value_query): Remove.
6019 (class range_query): Remove base class. Adjust prototypes.
6021 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
6023 PR tree-optimization/110205
6024 * gimple-range-cache.h (ranger_cache::m_estimate): Delete.
6025 * range-op-mixed.h (operator_bitwise_xor::op1_op2_relation_effect):
6027 * range-op.cc (operator_lshift): Add missing final overrides.
6028 (operator_rshift): Ditto.
6030 2023-07-28 Jose E. Marchesi <jose.marchesi@oracle.com>
6032 * config/bpf/bpf.cc (bpf_option_override): Disable tail-call
6033 optimizations in BPF target.
6035 2023-07-28 Honza <jh@ryzen4.suse.cz>
6037 * cfgloopmanip.cc (loop_count_in): Break out from ...
6038 (loop_exit_for_scaling): Break out from ...
6039 (update_loop_exit_probability_scale_dom_bbs): Break out from ...;
6040 add more sanity check and debug info.
6041 (scale_loop_profile): ... here.
6042 (create_empty_loop_on_edge): Fix whitespac.
6043 * cfgloopmanip.h (update_loop_exit_probability_scale_dom_bbs): Declare.
6044 * loop-unroll.cc (unroll_loop_constant_iterations): Use
6045 update_loop_exit_probability_scale_dom_bbs.
6046 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling): Remove.
6047 (tree_transform_and_unroll_loop): Use
6048 update_loop_exit_probability_scale_dom_bbs.
6049 * tree-ssa-loop-split.cc (split_loop): Use
6050 update_loop_exit_probability_scale_dom_bbs.
6052 2023-07-28 Jan Hubicka <jh@suse.cz>
6055 * tree-ssa-loop-split.cc: Include value-query.h.
6056 (split_at_bb_p): Analyze cases where EQ/NE can be turned
6057 into LT/LE/GT/GE; return updated guard code.
6058 (split_loop): Use guard code.
6060 2023-07-28 Roger Sayle <roger@nextmovesoftware.com>
6061 Richard Biener <rguenther@suse.de>
6064 PR rtl-optimization/110587
6065 * expr.cc (emit_group_load_1): Simplify logic for calling
6066 force_reg on ORIG_SRC, to avoid making a copy if the source
6067 is already in a pseudo register.
6069 2023-07-28 Jan Hubicka <jh@suse.cz>
6071 PR middle-end/106923
6072 * tree-ssa-loop-split.cc (connect_loops): Change probability
6073 of the test preconditioning second loop to very_likely.
6074 (fix_loop_bb_probability): Handle correctly case where
6075 on of the arms of the conditional is empty.
6076 (split_loop): Fold the test guarding first condition to
6077 see if it is constant true; Set correct entry block
6078 probabilities of the split loops; determine correct loop
6081 2023-07-28 xuli <xuli1@eswincomputing.com>
6083 * config/riscv/riscv-vector-builtins-bases.cc: remove rounding mode of
6084 vsadd[u] and vssub[u].
6085 * config/riscv/vector.md: Ditto.
6087 2023-07-28 Jan Hubicka <jh@suse.cz>
6089 * tree-ssa-loop-split.cc (split_loop): Also support NE driven
6090 loops when IV test is not overflowing.
6092 2023-07-28 liuhongt <hongtao.liu@intel.com>
6095 * config/i386/sse.md (avx512cd_maskb_vec_dup<mode>): Add
6097 (avx512cd_maskw_vec_dup<mode>): Ditto.
6099 2023-07-27 David Faust <david.faust@oracle.com>
6103 * config/bpf/bpf.opt (msmov): New option.
6104 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
6105 * config/bpf/bpf.md (*extendsidi2): New.
6111 * doc/invoke.texi (Option Summary): Add -msmov eBPF option.
6112 (eBPF Options): Add -m[no-]smov. Document that -mcpu=v4
6113 also enables -msmov.
6115 2023-07-27 David Faust <david.faust@oracle.com>
6117 * doc/invoke.texi (Option Summary): Remove -mkernel eBPF option.
6118 Add -mbswap and -msdiv eBPF options.
6119 (eBPF Options): Remove -mkernel. Add -mno-{jmpext, jmp32,
6120 alu32, v3-atomics, bswap, sdiv}. Document that -mcpu=v4 also
6123 2023-07-27 David Faust <david.faust@oracle.com>
6125 * config/bpf/bpf.md (add<AM:mode>3): Use %w2 instead of %w1
6126 in pseudo-C dialect output template.
6127 (sub<AM:mode>3): Likewise.
6129 2023-07-27 Jan Hubicka <jh@suse.cz>
6131 * tree-vect-loop.cc (optimize_mask_stores): Make store
6134 2023-07-27 Jan Hubicka <jh@suse.cz>
6136 * cfgloop.h (single_dom_exit): Declare.
6137 * cfgloopmanip.h (update_exit_probability_after_unrolling): Declare.
6138 * cfgrtl.cc (struct cfg_hooks): Fix comment.
6139 * loop-unroll.cc (unroll_loop_constant_iterations): Update exit edge.
6140 * tree-ssa-loop-ivopts.h (single_dom_exit): Do not declare it here.
6141 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling):
6143 (tree_transform_and_unroll_loop): ... here;
6145 2023-07-27 Jan Hubicka <jh@suse.cz>
6147 * cfgloopmanip.cc (scale_dominated_blocks_in_loop): Move here from
6148 tree-ssa-loop-manip.cc and avoid recursion.
6149 (scale_loop_profile): Use scale_dominated_blocks_in_loop.
6150 (duplicate_loop_body_to_header_edge): Add DLTHE_FLAG_FLAT_PROFILE
6152 * cfgloopmanip.h (DLTHE_FLAG_FLAT_PROFILE): Define.
6153 (scale_dominated_blocks_in_loop): Declare.
6154 * predict.cc (dump_prediction): Do not ICE on uninitialized probability.
6155 (change_edge_frequency): Remove.
6156 * predict.h (change_edge_frequency): Remove.
6157 * tree-ssa-loop-manip.cc (scale_dominated_blocks_in_loop): Move to
6159 (niter_for_unrolled_loop): Remove.
6160 (tree_transform_and_unroll_loop): Fix profile update.
6162 2023-07-27 Jan Hubicka <jh@suse.cz>
6164 * tree-ssa-loop-im.cc (execute_sm_if_changed): Turn cap probability
6165 to guessed; fix count of new_bb.
6167 2023-07-27 Jan Hubicka <jh@suse.cz>
6169 * profile-count.h (profile_count::apply_probability): Fix
6170 handling of uninitialized probabilities, optimize scaling
6173 2023-07-27 Richard Biener <rguenther@suse.de>
6175 PR tree-optimization/91838
6176 * gimple-match-head.cc: Include attribs.h and asan.h.
6177 * generic-match-head.cc: Likewise.
6178 * match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern.
6180 2023-07-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6182 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Add VLS modes.
6183 (ADJUST_ALIGNMENT): Ditto.
6184 (ADJUST_PRECISION): Ditto.
6186 (VECTOR_MODE_WITH_PREFIX): Ditto.
6187 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): New macro.
6188 * config/riscv/riscv-protos.h (riscv_v_ext_vls_mode_p): New function.
6189 * config/riscv/riscv-v.cc (INCLUDE_ALGORITHM): Add include.
6190 (legitimize_move): Enable basic VLS modes support.
6193 (get_vector_mode): Ditto.
6194 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Add vls modes.
6195 * config/riscv/riscv.cc (riscv_v_ext_vls_mode_p): New function.
6196 (VLS_ENTRY): New macro.
6197 (riscv_v_ext_mode_p): Add vls modes.
6198 (riscv_get_v_regno_alignment): New function.
6199 (riscv_print_operand): Add vls modes.
6200 (riscv_hard_regno_nregs): Ditto.
6201 (riscv_hard_regno_mode_ok): Ditto.
6202 (riscv_regmode_natural_size): Ditto.
6203 (riscv_vectorize_preferred_vector_alignment): Ditto.
6204 * config/riscv/riscv.md: Ditto.
6205 * config/riscv/vector-iterators.md: Ditto.
6206 * config/riscv/vector.md: Ditto.
6207 * config/riscv/autovec-vls.md: New file.
6209 2023-07-27 Pan Li <pan2.li@intel.com>
6211 * config/riscv/riscv_vector.h (enum RVV_CSR): Removed.
6213 (vwrite_csr): Ditto.
6215 2023-07-27 demin.han <demin.han@starfivetech.com>
6217 * config/riscv/autovec.md: Delete which_alternative use in split
6219 2023-07-27 Richard Biener <rguenther@suse.de>
6221 * tree-ssa-sink.cc (sink_code_in_bb): Remove recursion, instead
6223 (pass_sink_code::execute): ... in the caller.
6225 2023-07-27 Kewen Lin <linkw@linux.ibm.com>
6226 Richard Biener <rguenther@suse.de>
6228 PR tree-optimization/110776
6229 * tree-vect-stmts.cc (vectorizable_load): Always cost VMAT_ELEMENTWISE
6232 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
6234 * config/riscv/riscv.md: Include zicond.md
6235 * config/riscv/zicond.md: New file.
6237 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
6239 * common/config/riscv/riscv-common.cc: New extension.
6240 * config/riscv/riscv-opts.h (MASK_ZICOND): New mask.
6241 (TARGET_ZICOND): New target.
6243 2023-07-26 Carl Love <cel@us.ibm.com>
6245 * config/rs6000/rs6000-c.cc (find_instance): Add new parameter that
6246 specifies the number of built-in arguments to check.
6247 (altivec_resolve_overloaded_builtin): Update calls to find_instance
6248 to pass the number of built-in arguments to be checked.
6250 2023-07-26 David Faust <david.faust@oracle.com>
6252 * config/bpf/bpf.opt (mv3-atomics): New option.
6253 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
6254 * config/bpf/bpf.h (enum_reg_class): Add R0 class.
6255 (REG_CLASS_NAMES): Likewise.
6256 (REG_CLASS_CONTENTS): Likewise.
6257 (REGNO_REG_CLASS): Handle R0.
6258 * config/bpf/bpf.md (UNSPEC_XADD): Rename to UNSPEC_AADD.
6259 (UNSPEC_AAND): New unspec.
6260 (UNSPEC_AOR): Likewise.
6261 (UNSPEC_AXOR): Likewise.
6262 (UNSPEC_AFADD): Likewise.
6263 (UNSPEC_AFAND): Likewise.
6264 (UNSPEC_AFOR): Likewise.
6265 (UNSPEC_AFXOR): Likewise.
6266 (UNSPEC_AXCHG): Likewise.
6267 (UNSPEC_ACMPX): Likewise.
6268 (atomic_add<mode>): Use UNSPEC_AADD and atomic type attribute.
6270 * config/bpf/atomic.md: ...Here. New file.
6271 * config/bpf/constraints.md (t): New constraint for R0.
6272 * doc/invoke.texi (eBPF Options): Document -mv3-atomics.
6274 2023-07-26 Matthew Malcomson <matthew.malcomson@arm.com>
6276 * tree-vect-stmts.cc (get_group_load_store_type): Reformat
6279 2023-07-26 Carl Love <cel@us.ibm.com>
6281 * config/rs6000/rs6000-builtins.def: Rename
6282 __builtin_altivec_vreplace_un_uv2di as __builtin_altivec_vreplace_un_udi
6283 __builtin_altivec_vreplace_un_uv4si as __builtin_altivec_vreplace_un_usi
6284 __builtin_altivec_vreplace_un_v2df as __builtin_altivec_vreplace_un_df
6285 __builtin_altivec_vreplace_un_v2di as __builtin_altivec_vreplace_un_di
6286 __builtin_altivec_vreplace_un_v4sf as __builtin_altivec_vreplace_un_sf
6287 __builtin_altivec_vreplace_un_v4si as __builtin_altivec_vreplace_un_si.
6288 Rename VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_UV4SI as
6289 VREPLACE_UN_USI, VREPLACE_UN_V2DF as VREPLACE_UN_DF,
6290 VREPLACE_UN_V2DI as VREPLACE_UN_DI, VREPLACE_UN_V4SF as
6291 VREPLACE_UN_SF, VREPLACE_UN_V4SI as VREPLACE_UN_SI.
6292 Rename vreplace_un_v2di as vreplace_un_di, vreplace_un_v4si as
6293 vreplace_un_si, vreplace_un_v2df as vreplace_un_df,
6294 vreplace_un_v2di as vreplace_un_di, vreplace_un_v4sf as
6295 vreplace_un_sf, vreplace_un_v4si as vreplace_un_si.
6296 * config/rs6000/rs6000-c.cc (find_instance): Add case
6297 RS6000_OVLD_VEC_REPLACE_UN.
6298 * config/rs6000/rs6000-overload.def (__builtin_vec_replace_un):
6299 Fix first argument type. Rename VREPLACE_UN_UV4SI as
6300 VREPLACE_UN_USI, VREPLACE_UN_V4SI as VREPLACE_UN_SI,
6301 VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_V2DI as
6302 VREPLACE_UN_DI, VREPLACE_UN_V4SF as VREPLACE_UN_SF,
6303 VREPLACE_UN_V2DF as VREPLACE_UN_DF.
6304 * config/rs6000/vsx.md (REPLACE_ELT): Rename the mode_iterator
6305 REPLACE_ELT_V for vector modes.
6306 (REPLACE_ELT): New scalar mode iterator.
6307 (REPLACE_ELT_char): Add scalar attributes.
6308 (vreplace_un_<mode>): Change iterator and mode attribute.
6310 2023-07-26 David Malcolm <dmalcolm@redhat.com>
6313 * Makefile.in (ANALYZER_OBJS): Add analyzer/symbol.o.
6315 2023-07-26 Richard Biener <rguenther@suse.de>
6317 PR tree-optimization/106081
6318 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
6319 Assign layout -1 to splats.
6321 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
6323 * range-op-mixed.h (class operator_cast): Add update_bitmask.
6324 * range-op.cc (operator_cast::update_bitmask): New.
6325 (operator_cast::fold_range): Call update_bitmask.
6327 2023-07-26 Li Xu <xuli1@eswincomputing.com>
6329 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change
6330 scalar type to float16, eliminate warning.
6331 (vfloat16mf4x3_t): Ditto.
6332 (vfloat16mf4x4_t): Ditto.
6333 (vfloat16mf4x5_t): Ditto.
6334 (vfloat16mf4x6_t): Ditto.
6335 (vfloat16mf4x7_t): Ditto.
6336 (vfloat16mf4x8_t): Ditto.
6337 (vfloat16mf2x2_t): Ditto.
6338 (vfloat16mf2x3_t): Ditto.
6339 (vfloat16mf2x4_t): Ditto.
6340 (vfloat16mf2x5_t): Ditto.
6341 (vfloat16mf2x6_t): Ditto.
6342 (vfloat16mf2x7_t): Ditto.
6343 (vfloat16mf2x8_t): Ditto.
6344 (vfloat16m1x2_t): Ditto.
6345 (vfloat16m1x3_t): Ditto.
6346 (vfloat16m1x4_t): Ditto.
6347 (vfloat16m1x5_t): Ditto.
6348 (vfloat16m1x6_t): Ditto.
6349 (vfloat16m1x7_t): Ditto.
6350 (vfloat16m1x8_t): Ditto.
6351 (vfloat16m2x2_t): Ditto.
6352 (vfloat16m2x3_t): Ditto.
6353 (vfloat16m2x4_t): Ditto.
6354 (vfloat16m4x2_t): Ditto.
6355 * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T.
6356 * config/riscv/vector.md: add tuple mode in attr sew.
6358 2023-07-26 Uros Bizjak <ubizjak@gmail.com>
6361 * config/i386/i386.md (plusminusmult): New code iterator.
6362 * config/i386/mmx.md (mmxdoublevecmode): New mode attribute.
6363 (movq_<mode>_to_sse): New expander.
6364 (<plusminusmult:insn>v2sf3): Macroize expander from addv2sf3,
6365 subv2sf3 and mulv2sf3 using plusminusmult code iterator. Rewrite
6366 as a wrapper around V4SFmode operation.
6367 (mmx_addv2sf3): Change operand 1 and operand 2 predicates to
6368 nonimmediate_operand.
6369 (*mmx_addv2sf3): Remove SSE alternatives. Change operand 1 and
6370 operand 2 predicates to nonimmediate_operand.
6371 (mmx_subv2sf3): Change operand 2 predicate to nonimmediate_operand.
6372 (mmx_subrv2sf3): Change operand 1 predicate to nonimmediate_operand.
6373 (*mmx_subv2sf3): Remove SSE alternatives. Change operand 1 and
6374 operand 2 predicates to nonimmediate_operand.
6375 (mmx_mulv2sf3): Change operand 1 and operand 2 predicates to
6376 nonimmediate_operand.
6377 (*mmx_mulv2sf3): Remove SSE alternatives. Change operand 1 and
6378 operand 2 predicates to nonimmediate_operand.
6379 (divv2sf3): Rewrite as a wrapper around V4SFmode operation.
6380 (<smaxmin:code>v2sf3): Ditto.
6381 (mmx_<smaxmin:code>v2sf3): Change operand 1 and operand 2
6382 predicates to nonimmediate_operand.
6383 (*mmx_<smaxmin:code>v2sf3): Remove SSE alternatives. Change
6384 operand 1 and operand 2 predicates to nonimmediate_operand.
6385 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
6386 (sqrtv2sf2): Rewrite as a wrapper around V4SFmode operation.
6387 (*mmx_haddv2sf3_low): Ditto.
6388 (*mmx_hsubv2sf3_low): Ditto.
6389 (vec_addsubv2sf3): Ditto.
6390 (*mmx_maskcmpv2sf3_comm): Remove.
6391 (*mmx_maskcmpv2sf3): Remove.
6392 (vec_cmpv2sfv2si): Rewrite as a wrapper around V4SFmode operation.
6393 (vcond<V2FI:mode>v2sf): Ditto.
6398 (fix_truncv2sfv2si2): Ditto.
6399 (fixuns_truncv2sfv2si2): Ditto.
6400 (mmx_fix_truncv2sfv2si2): Remove SSE alternatives.
6401 Change operand 1 predicate to nonimmediate_operand.
6402 (floatv2siv2sf2): Rewrite as a wrapper around V4SFmode operation.
6403 (floatunsv2siv2sf2): Ditto.
6404 (mmx_floatv2siv2sf2): Remove SSE alternatives.
6405 Change operand 1 predicate to nonimmediate_operand.
6406 (nearbyintv2sf2): Rewrite as a wrapper around V4SFmode operation.
6408 (lrintv2sfv2si2): Ditto.
6410 (lceilv2sfv2si2): Ditto.
6411 (floorv2sf2): Ditto.
6412 (lfloorv2sfv2si2): Ditto.
6413 (btruncv2sf2): Ditto.
6414 (roundv2sf2): Ditto.
6415 (lroundv2sfv2si2): Ditto.
6416 (*mmx_roundv2sf2): Remove.
6418 2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com>
6420 * config/bpf/bpf.md: Fix neg{SI,DI}2 insn.
6422 2023-07-26 Richard Biener <rguenther@suse.de>
6424 PR tree-optimization/110799
6425 * tree-ssa-pre.cc (compute_avail): More thoroughly match
6426 up TBAA behavior of redundant loads.
6428 2023-07-26 Jakub Jelinek <jakub@redhat.com>
6430 PR tree-optimization/110755
6431 * range-op-float.cc (frange_arithmetic): Change +0 result to -0
6432 for PLUS_EXPR or MINUS_EXPR if -frounding-math, inf is negative and
6433 it is exact op1 + (-op1) or op1 - op1.
6435 2023-07-26 Kewen Lin <linkw@linux.ibm.com>
6438 * config/rs6000/vsx.md (define_insn xxeval): Correct vsx
6439 operands output with "x".
6441 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
6443 * range-op.cc (class operator_absu): Add update_bitmask.
6444 (operator_absu::update_bitmask): New.
6446 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
6448 * range-op-mixed.h (class operator_abs): Add update_bitmask.
6449 * range-op.cc (operator_abs::update_bitmask): New.
6451 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
6453 * range-op-mixed.h (class operator_bitwise_not): Add update_bitmask.
6454 * range-op.cc (operator_bitwise_not::update_bitmask): New.
6456 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
6458 * range-op.cc (update_known_bitmask): Handle unary operators.
6460 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
6462 * tree-ssa-ccp.cc (bit_value_unop): Initialize val when appropriate.
6464 2023-07-26 Jin Ma <jinma@linux.alibaba.com>
6466 * config/riscv/riscv.md: Likewise.
6468 2023-07-26 Jan Hubicka <jh@suse.cz>
6470 * profile-count.cc (profile_count::to_sreal_scale): Value is not know
6471 if we divide by zero.
6473 2023-07-25 David Faust <david.faust@oracle.com>
6475 * config/bpf/bpf.cc (bpf_print_operand_address): Don't print
6476 enclosing parentheses for pseudo-C dialect.
6477 * config/bpf/bpf.md (zero_exdendhidi2): Add parentheses around
6478 operands of pseudo-C dialect output templates where needed.
6479 (zero_extendqidi2): Likewise.
6480 (zero_extendsidi2): Likewise.
6481 (*mov<MM:mode>): Likewise.
6483 2023-07-25 Aldy Hernandez <aldyh@redhat.com>
6485 * tree-ssa-ccp.cc (value_mask_to_min_max): Make static.
6486 (bit_value_mult_const): Same.
6487 (get_individual_bits): Same.
6489 2023-07-25 Haochen Gui <guihaoc@gcc.gnu.org>
6492 * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Gimple
6493 fold RS6000_BIF_XSMINDP and RS6000_BIF_XSMAXDP when fast-math is set.
6494 * config/rs6000/rs6000.md (FMINMAX): New int iterator.
6495 (minmax_op): New int attribute.
6496 (UNSPEC_FMAX, UNSPEC_FMIN): New unspecs.
6497 (f<minmax_op><mode>3): New pattern by UNSPEC_FMAX and UNSPEC_FMIN.
6498 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xsmaxdp): Set
6500 (__builtin_vsx_xsmindp): Set pattern to fmindf3.
6502 2023-07-24 David Faust <david.faust@oracle.com>
6504 * config/bpf/bpf.md (nop): Add pseudo-c asm dialect template.
6506 2023-07-24 Drew Ross <drross@redhat.com>
6507 Jakub Jelinek <jakub@redhat.com>
6509 PR middle-end/109986
6510 * generic-match-head.cc (bitwise_equal_p): New macro.
6511 * gimple-match-head.cc (bitwise_equal_p): New macro.
6512 (gimple_nop_convert): Declare.
6513 (gimple_bitwise_equal_p): Helper for bitwise_equal_p.
6514 * match.pd ((~X | Y) ^ X -> ~(X & Y)): New simplification.
6516 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
6518 * common/config/riscv/riscv-common.cc (riscv_subset_list::add): Use
6519 single quote rather than backquote in diagnostic.
6521 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
6524 * config/bpf/bpf.opt: New command-line option -msdiv.
6525 * config/bpf/bpf.md: Conditionalize sdiv/smod on bpf_has_sdiv.
6526 * config/bpf/bpf.cc (bpf_option_override): Initialize
6528 * doc/invoke.texi (eBPF Options): Document -msdiv.
6530 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
6532 * config/riscv/riscv.cc (riscv_option_override): Spell out
6533 greater than and use cannot in diagnostic string.
6535 2023-07-24 Richard Biener <rguenther@suse.de>
6537 * tree-vectorizer.h (_slp_tree::push_vec_def): Add.
6538 (_slp_tree::vec_stmts): Remove.
6539 (SLP_TREE_VEC_STMTS): Remove.
6540 * tree-vect-slp.cc (_slp_tree::push_vec_def): Define.
6541 (_slp_tree::_slp_tree): Adjust.
6542 (_slp_tree::~_slp_tree): Likewise.
6543 (vect_get_slp_vect_def): Simplify.
6544 (vect_get_slp_defs): Likewise.
6545 (vect_transform_slp_perm_load_1): Adjust.
6546 (vect_add_slp_permutation): Likewise.
6547 (vect_schedule_slp_node): Likewise.
6548 (vectorize_slp_instance_root_stmt): Likewise.
6549 (vect_schedule_scc): Likewise.
6550 * tree-vect-stmts.cc (vectorizable_bswap): Use push_vec_def.
6551 (vectorizable_call): Likewise.
6552 (vectorizable_call): Likewise.
6553 (vect_create_vectorized_demotion_stmts): Likewise.
6554 (vectorizable_conversion): Likewise.
6555 (vectorizable_assignment): Likewise.
6556 (vectorizable_shift): Likewise.
6557 (vectorizable_operation): Likewise.
6558 (vectorizable_load): Likewise.
6559 (vectorizable_condition): Likewise.
6560 (vectorizable_comparison): Likewise.
6561 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Adjust.
6562 (vectorize_fold_left_reduction): Use push_vec_def.
6563 (vect_transform_reduction): Likewise.
6564 (vect_transform_cycle_phi): Likewise.
6565 (vectorizable_lc_phi): Likewise.
6566 (vectorizable_phi): Likewise.
6567 (vectorizable_recurr): Likewise.
6568 (vectorizable_induction): Likewise.
6569 (vectorizable_live_operation): Likewise.
6571 2023-07-24 Richard Biener <rguenther@suse.de>
6573 * tree-ssa-loop.cc: Remove unused tree-vectorizer.h include.
6575 2023-07-24 Richard Biener <rguenther@suse.de>
6577 * config/i386/i386-builtins.cc: Remove tree-vectorizer.h include.
6578 * config/i386/i386-expand.cc: Likewise.
6579 * config/i386/i386-features.cc: Likewise.
6580 * config/i386/i386-options.cc: Likewise.
6582 2023-07-24 Robin Dapp <rdapp@ventanamicro.com>
6584 * tree-vect-stmts.cc (vectorizable_conversion): Handle
6585 more demotion/promotion for modifier == NONE.
6587 2023-07-24 Roger Sayle <roger@nextmovesoftware.com>
6592 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
6593 (extzv<mode>): Likewise.
6594 (insv<mode>): Likewise.
6595 (*testqi_ext_3): Likewise.
6596 (*btr<mode>_2): Likewise.
6597 (define_split): Likewise.
6598 (*btsq_imm): Likewise.
6599 (*btrq_imm): Likewise.
6600 (*btcq_imm): Likewise.
6601 (define_peephole2 x3): Likewise.
6602 (*bt<mode>): Likewise
6603 (*bt<mode>_mask): New define_insn_and_split.
6604 (*jcc_bt<mode>): Use QImode for offsets.
6605 (*jcc_bt<mode>_1): Delete obsolete pattern.
6606 (*jcc_bt<mode>_mask): Use QImode offsets.
6607 (*jcc_bt<mode>_mask_1): Likewise.
6608 (define_split): Likewise.
6609 (*bt<mode>_setcqi): Likewise.
6610 (*bt<mode>_setncqi): Likewise.
6611 (*bt<mode>_setnc<mode>): Likewise.
6612 (*bt<mode>_setncqi_2): Likewise.
6613 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
6614 (bmi2_bzhi_<mode>3): Use QImode offsets.
6615 (*bmi2_bzhi_<mode>3): Likewise.
6616 (*bmi2_bzhi_<mode>3_1): Likewise.
6617 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
6618 (@tbm_bextri_<mode>): Likewise.
6620 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
6622 * config/bpf/bpf-opts.h (enum bpf_kernel_version): Remove enum.
6623 * config/bpf/bpf.opt (mkernel): Remove option.
6624 * config/bpf/bpf.cc (bpf_target_macros): Do not define
6625 BPF_KERNEL_VERSION_CODE.
6627 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
6630 * config/bpf/bpf.opt (mcpu): Add ISA_V4 and make it the default.
6631 (mbswap): New option.
6632 * config/bpf/bpf-opts.h (enum bpf_isa_version): New value ISA_V4.
6633 * config/bpf/bpf.cc (bpf_option_override): Set bpf_has_bswap.
6634 * config/bpf/bpf.md: Use bswap instructions if available for
6635 bswap* insn, and fix constraint.
6636 * doc/invoke.texi (eBPF Options): Document -mcpu=v4 and -mbswap.
6638 2023-07-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6640 * config/riscv/autovec.md (fold_left_plus_<mode>): New pattern.
6641 (mask_len_fold_left_plus_<mode>): Ditto.
6642 * config/riscv/riscv-protos.h (enum insn_type): New enum.
6643 (enum reduction_type): Ditto.
6644 (expand_reduction): Add in-order reduction.
6645 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_reduction_insn): New function.
6646 (expand_reduction): Add in-order reduction.
6648 2023-07-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
6650 * tree-vect-loop.cc (get_masked_reduction_fn): Add mask_len_fold_left_plus.
6651 (vectorize_fold_left_reduction): Ditto.
6652 (vectorizable_reduction): Ditto.
6653 (vect_transform_reduction): Ditto.
6655 2023-07-24 Richard Biener <rguenther@suse.de>
6657 PR tree-optimization/110777
6658 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
6659 Avoid propagating abnormals.
6661 2023-07-24 Richard Biener <rguenther@suse.de>
6663 PR tree-optimization/110766
6664 * tree-scalar-evolution.cc
6665 (analyze_and_compute_bitwise_induction_effect): Check the PHI
6666 is defined in the loop header.
6668 2023-07-24 Kewen Lin <linkw@linux.ibm.com>
6670 PR tree-optimization/110740
6671 * tree-vect-loop.cc (vect_analyze_loop_costing): Do not vectorize a
6672 loop with a single scalar iteration.
6674 2023-07-24 Pan Li <pan2.li@intel.com>
6676 * config/riscv/riscv-vector-builtins-shapes.cc
6677 (struct alu_frm_def): Take range check.
6679 2023-07-22 Vineet Gupta <vineetg@rivosinc.com>
6682 * config/riscv/predicates.md (const_0_operand): Add back
6685 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
6687 * config/i386/i386-expand.cc (ix86_expand_move): Disable the
6688 64-bit insertions into TImode optimizations with -O0, unless
6689 the function has the "naked" attribute (for PR target/110533).
6691 2023-07-22 Andrew Pinski <apinski@marvell.com>
6694 * rtl.h (extended_count): Change last argument type
6697 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
6699 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
6700 (extzv<mode>): Likewise.
6701 (insv<mode>): Likewise.
6702 (*testqi_ext_3): Likewise.
6703 (*btr<mode>_2): Likewise.
6704 (define_split): Likewise.
6705 (*btsq_imm): Likewise.
6706 (*btrq_imm): Likewise.
6707 (*btcq_imm): Likewise.
6708 (define_peephole2 x3): Likewise.
6709 (*bt<mode>): Likewise
6710 (*bt<mode>_mask): New define_insn_and_split.
6711 (*jcc_bt<mode>): Use QImode for offsets.
6712 (*jcc_bt<mode>_1): Delete obsolete pattern.
6713 (*jcc_bt<mode>_mask): Use QImode offsets.
6714 (*jcc_bt<mode>_mask_1): Likewise.
6715 (define_split): Likewise.
6716 (*bt<mode>_setcqi): Likewise.
6717 (*bt<mode>_setncqi): Likewise.
6718 (*bt<mode>_setnc<mode>): Likewise.
6719 (*bt<mode>_setncqi_2): Likewise.
6720 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
6721 (bmi2_bzhi_<mode>3): Use QImode offsets.
6722 (*bmi2_bzhi_<mode>3): Likewise.
6723 (*bmi2_bzhi_<mode>3_1): Likewise.
6724 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
6725 (@tbm_bextri_<mode>): Likewise.
6727 2023-07-22 Jeff Law <jlaw@ventanamicro.com>
6729 * config/bfin/bfin.md (ones): Fix length computation.
6731 2023-07-22 Vladimir N. Makarov <vmakarov@redhat.com>
6733 * lra-eliminations.cc (update_reg_eliminate): Fix the assert.
6734 (lra_update_fp2sp_elimination): Use HARD_FRAME_POINTER_REGNUM
6735 instead of FRAME_POINTER_REGNUM to spill pseudos.
6737 2023-07-21 Roger Sayle <roger@nextmovesoftware.com>
6738 Richard Biener <rguenther@suse.de>
6741 * gimplify.cc (gimplify_compound_lval): If the array's type
6742 is error_mark_node then return GS_ERROR.
6744 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
6747 * config/bpf/bpf.opt: Added option -masm=<dialect>.
6748 * config/bpf/bpf-opts.h (enum bpf_asm_dialect): New type.
6749 * config/bpf/bpf.cc (bpf_print_register): New function.
6750 (bpf_print_register): Support pseudo-c syntax for registers.
6751 (bpf_print_operand_address): Likewise.
6752 * config/bpf/bpf.h (ASM_SPEC): handle -msasm.
6753 (ASSEMBLER_DIALECT): Define.
6754 * config/bpf/bpf.md: Added pseudo-c templates.
6755 * doc/invoke.texi (-masm=): New eBPF option item.
6757 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
6759 * config/bpf/bpf.md: fixed template for neg instruction.
6761 2023-07-21 Jan Hubicka <jh@suse.cz>
6764 * tree-vect-loop.cc (scale_profile_for_vect_loop): Avoid scaling flat
6765 profiles by vectorization factor.
6766 (vect_transform_loop): Check for flat profiles.
6768 2023-07-21 Jan Hubicka <jh@suse.cz>
6770 * cfgloop.h (maybe_flat_loop_profile): Declare
6771 * cfgloopanal.cc (maybe_flat_loop_profile): New function.
6772 * tree-cfg.cc (print_loop_info): Print info about flat profiles.
6774 2023-07-21 Jan Hubicka <jh@suse.cz>
6776 * cfgloop.cc (get_estimated_loop_iterations): Use sreal::to_nearest_int
6777 * cfgloopanal.cc (expected_loop_iterations_unbounded): Likewise.
6778 * predict.cc (estimate_bb_frequencies): Likewise.
6779 * profile.cc (branch_prob): Likewise.
6780 * tree-ssa-loop-niter.cc (estimate_numbers_of_iterations): Likewise
6782 2023-07-21 Iain Sandoe <iain@sandoe.co.uk>
6784 * config.in: Regenerate.
6785 * config/darwin.h (DARWIN_LD_DEMANGLE): New.
6786 (LINK_COMMAND_SPEC_A): Add demangle handling.
6787 * configure: Regenerate.
6788 * configure.ac: Detect linker support for '-demangle'.
6790 2023-07-21 Jan Hubicka <jh@suse.cz>
6792 * sreal.cc (sreal::to_nearest_int): New.
6793 (sreal_verify_basics): Verify also to_nearest_int.
6794 (verify_aritmetics): Likewise.
6795 (sreal_verify_conversions): New.
6796 (sreal_cc_tests): Call sreal_verify_conversions.
6797 * sreal.h: (sreal::to_nearest_int): Declare
6799 2023-07-21 Jan Hubicka <jh@suse.cz>
6801 * tree-ssa-loop-ch.cc (enum ch_decision): New enum.
6802 (should_duplicate_loop_header_p): Return info on profitability.
6803 (do_while_loop_p): Watch for constant conditionals.
6804 (update_profile_after_ch): Do not sanity check that all
6805 static exits are taken.
6806 (ch_base::copy_headers): Run on all loops.
6807 (pass_ch::process_loop_p): Improve heuristics by handling also
6808 do_while loop and duplicating shortest sequence containing all
6811 2023-07-21 Jan Hubicka <jh@suse.cz>
6813 * tree-ssa-loop-niter.cc (finite_loop_p): Reorder to do cheap
6814 tests first; update finite_p flag.
6816 2023-07-21 Jan Hubicka <jh@suse.cz>
6818 * cfgloop.cc (flow_loop_dump): Use print_loop_info.
6819 * cfgloop.h (print_loop_info): Declare.
6820 * tree-cfg.cc (print_loop_info): Break out from ...; add
6821 printing of missing fields and profile
6822 (print_loop): ... here.
6824 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6826 * config/riscv/riscv-v.cc (expand_gather_scatter): Remove redundant variables.
6828 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6830 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Change condition order.
6831 (vectorizable_operation): Ditto.
6833 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6835 * config/riscv/autovec.md: Align order of mask and len.
6836 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
6837 (expand_gather_scatter): Ditto.
6838 * doc/md.texi: Ditto.
6839 * internal-fn.cc (add_len_and_mask_args): Ditto.
6840 (add_mask_and_len_args): Ditto.
6841 (expand_partial_load_optab_fn): Ditto.
6842 (expand_partial_store_optab_fn): Ditto.
6843 (expand_scatter_store_optab_fn): Ditto.
6844 (expand_gather_load_optab_fn): Ditto.
6845 (internal_fn_len_index): Ditto.
6846 (internal_fn_mask_index): Ditto.
6847 (internal_len_load_store_bias): Ditto.
6848 * tree-vect-stmts.cc (vectorizable_store): Ditto.
6849 (vectorizable_load): Ditto.
6851 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6853 * config/riscv/autovec.md (len_maskload<mode><vm>): Change LEN_MASK into MASK_LEN.
6854 (mask_len_load<mode><vm>): Ditto.
6855 (len_maskstore<mode><vm>): Ditto.
6856 (mask_len_store<mode><vm>): Ditto.
6857 (len_mask_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
6858 (mask_len_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
6859 (len_mask_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
6860 (mask_len_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
6861 (len_mask_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
6862 (mask_len_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
6863 (len_mask_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
6864 (mask_len_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
6865 (len_mask_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
6866 (mask_len_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
6867 (len_mask_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
6868 (mask_len_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
6869 (len_mask_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
6870 (mask_len_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
6871 (len_mask_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
6872 (mask_len_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
6873 (len_mask_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
6874 (mask_len_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
6875 (len_mask_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
6876 (mask_len_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
6877 (len_mask_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
6878 (mask_len_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
6879 (len_mask_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
6880 (mask_len_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
6881 (len_mask_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
6882 (mask_len_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
6883 (len_mask_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
6884 (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
6885 * doc/md.texi: Ditto.
6886 * genopinit.cc (main): Ditto.
6887 (CMP_NAME): Ditto. Ditto.
6888 * gimple-fold.cc (arith_overflowed_p): Ditto.
6889 (gimple_fold_partial_load_store_mem_ref): Ditto.
6890 (gimple_fold_call): Ditto.
6891 * internal-fn.cc (len_maskload_direct): Ditto.
6892 (mask_len_load_direct): Ditto.
6893 (len_maskstore_direct): Ditto.
6894 (mask_len_store_direct): Ditto.
6895 (expand_call_mem_ref): Ditto.
6896 (expand_len_maskload_optab_fn): Ditto.
6897 (expand_mask_len_load_optab_fn): Ditto.
6898 (expand_len_maskstore_optab_fn): Ditto.
6899 (expand_mask_len_store_optab_fn): Ditto.
6900 (direct_len_maskload_optab_supported_p): Ditto.
6901 (direct_mask_len_load_optab_supported_p): Ditto.
6902 (direct_len_maskstore_optab_supported_p): Ditto.
6903 (direct_mask_len_store_optab_supported_p): Ditto.
6904 (internal_load_fn_p): Ditto.
6905 (internal_store_fn_p): Ditto.
6906 (internal_gather_scatter_fn_p): Ditto.
6907 (internal_fn_len_index): Ditto.
6908 (internal_fn_mask_index): Ditto.
6909 (internal_fn_stored_value_index): Ditto.
6910 (internal_len_load_store_bias): Ditto.
6911 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
6912 (MASK_LEN_GATHER_LOAD): Ditto.
6913 (LEN_MASK_LOAD): Ditto.
6914 (MASK_LEN_LOAD): Ditto.
6915 (LEN_MASK_SCATTER_STORE): Ditto.
6916 (MASK_LEN_SCATTER_STORE): Ditto.
6917 (LEN_MASK_STORE): Ditto.
6918 (MASK_LEN_STORE): Ditto.
6919 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
6920 (supports_vec_scatter_store_p): Ditto.
6921 * optabs-tree.cc (target_supports_mask_load_store_p): Ditto.
6922 (target_supports_len_load_store_p): Ditto.
6923 * optabs.def (OPTAB_CD): Ditto.
6924 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Ditto.
6925 (call_may_clobber_ref_p_1): Ditto.
6926 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Ditto.
6927 (dse_optimize_stmt): Ditto.
6928 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
6929 (get_alias_ptr_type_for_ptr_address): Ditto.
6930 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
6931 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
6932 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
6933 (vect_get_strided_load_store_ops): Ditto.
6934 (vectorizable_store): Ditto.
6935 (vectorizable_load): Ditto.
6937 2023-07-21 Haochen Jiang <haochen.jiang@intel.com>
6939 * config/i386/i386.opt: Fix a typo.
6941 2023-07-21 Richard Biener <rguenther@suse.de>
6943 PR tree-optimization/88540
6944 * tree-ssa-phiopt.cc (minmax_replacement): Do not give up
6945 with NaNs but handle the simple case by if-converting to a
6948 2023-07-21 Andrew Pinski <apinski@marvell.com>
6950 * match.pd (minmax<minmax<a,b>,a>->minmax<a,b>): New
6953 2023-07-21 Richard Biener <rguenther@suse.de>
6955 PR tree-optimization/110742
6956 * tree-vect-slp.cc (vect_optimize_slp_pass::get_result_with_layout):
6957 Do not materialize an edge permutation in an external node with
6959 (vect_slp_analyze_node_operations_1): Guard purely internal
6962 2023-07-21 Jan Hubicka <jh@suse.cz>
6964 * cfgloop.cc: Include sreal.h.
6965 (flow_loop_dump): Dump sreal iteration exsitmate.
6966 (get_estimated_loop_iterations): Update.
6967 * cfgloop.h (expected_loop_iterations_by_profile): Declare.
6968 * cfgloopanal.cc (expected_loop_iterations_by_profile): New function.
6969 (expected_loop_iterations_unbounded): Use new API.
6970 * cfgloopmanip.cc (scale_loop_profile): Use
6971 expected_loop_iterations_by_profile
6972 * predict.cc (pass_profile::execute): Likewise.
6973 * profile.cc (branch_prob): Likewise.
6974 * tree-ssa-loop-niter.cc: Include sreal.h.
6975 (estimate_numbers_of_iterations): Likewise
6977 2023-07-21 Kewen Lin <linkw@linux.ibm.com>
6979 PR tree-optimization/110744
6980 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Correct the index of bias
6981 operand for ifn IFN_LEN_STORE.
6983 2023-07-21 liuhongt <hongtao.liu@intel.com>
6986 * common.opt: (fcf-protection=): Add EnumSet attribute to
6987 support combination of params.
6989 2023-07-21 David Malcolm <dmalcolm@redhat.com>
6991 PR middle-end/110612
6992 * text-art/table.cc (table_geometry::table_geometry): Drop m_table
6994 (table_geometry::table_x_to_canvas_x): Add cast to comparison.
6995 (table_geometry::table_y_to_canvas_y): Likewise.
6996 * text-art/table.h (table_geometry::m_table): Drop unused field.
6997 * text-art/widget.h (wrapper_widget::update_child_alloc_rects):
7000 2023-07-20 Uros Bizjak <ubizjak@gmail.com>
7003 * config/i386/i386-features.cc
7004 (general_scalar_chain::compute_convert_gain): Calculate gain
7005 for extend higpart case.
7006 (general_scalar_chain::convert_op): Handle
7007 ASHIFTRT/ASHIFT combined RTX.
7008 (general_scalar_to_vector_candidate_p): Enable ASHIFTRT for
7009 SImode for SSE2 targets. Handle ASHIFTRT/ASHIFT combined RTX.
7010 * config/i386/i386.md (*extend<dwi>2_doubleword_highpart):
7011 New define_insn_and_split pattern.
7012 (*extendv2di2_highpart_stv): Ditto.
7014 2023-07-20 Vladimir N. Makarov <vmakarov@redhat.com>
7016 * lra-constraints.cc (simplify_operand_subreg): Check frame pointer
7019 2023-07-20 Andrew Pinski <apinski@marvell.com>
7021 * combine.cc (dump_combine_stats): Remove.
7022 (dump_combine_total_stats): Remove.
7023 (total_attempts, total_merges, total_extras,
7024 total_successes): Remove.
7025 (combine_instructions): Don't increment total stats
7026 instead use statistics_counter_event.
7027 * dumpfile.cc (print_combine_total_stats): Remove.
7028 * dumpfile.h (print_combine_total_stats): Remove.
7029 (dump_combine_total_stats): Remove.
7030 * passes.cc (finish_optimization_passes):
7031 Don't call print_combine_total_stats.
7032 * rtl.h (dump_combine_total_stats): Remove.
7033 (dump_combine_stats): Remove.
7035 2023-07-20 Jan Hubicka <jh@suse.cz>
7037 * tree-ssa-loop-ch.cc (should_duplicate_loop_header_p): Use BIT instead of TRUTH
7040 2023-07-20 Martin Jambor <mjambor@suse.cz>
7042 * doc/invoke.texi (analyzer-text-art-string-ellipsis-threshold): New.
7043 (analyzer-text-art-ideal-canvas-width): Likewise.
7044 (analyzer-text-art-string-ellipsis-head-len): Likewise.
7045 (analyzer-text-art-string-ellipsis-tail-len): Likewise.
7047 2023-07-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
7049 * tree-vect-stmts.cc (check_load_store_for_partial_vectors):
7050 Refine code structure.
7052 2023-07-20 Jan Hubicka <jh@suse.cz>
7054 * tree-ssa-loop-ch.cc (edge_range_query): Rename to ...
7055 (get_range_query): ... this one; do
7056 (static_loop_exit): Add query parametr, turn ranger to reference.
7057 (loop_static_stmt_p): New function.
7058 (loop_static_op_p): New function.
7059 (loop_iv_derived_p): Remove.
7060 (loop_combined_static_and_iv_p): New function.
7061 (should_duplicate_loop_header_p): Discover combined onditionals;
7062 do not track iv derived; improve dumps.
7063 (pass_ch::execute): Fix whitespace.
7065 2023-07-20 Richard Biener <rguenther@suse.de>
7067 PR tree-optimization/110204
7068 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
7069 Look through copies generated by PRE.
7071 2023-07-20 Matthew Malcomson <matthew.malcomson@arm.com>
7073 * tree-vect-stmts.cc (get_group_load_store_type): Account for
7074 `gap` when checking if need to peel twice.
7076 2023-07-20 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
7079 * doc/extend.texi: Document iseqsig builtin.
7080 * builtins.cc (fold_builtin_iseqsig): New function.
7081 (fold_builtin_2): Handle BUILT_IN_ISEQSIG.
7082 (is_inexpensive_builtin): Handle BUILT_IN_ISEQSIG.
7083 * builtins.def (BUILT_IN_ISEQSIG): New built-in.
7085 2023-07-20 Pan Li <pan2.li@intel.com>
7087 * config/riscv/vector.md: Fix incorrect match_operand.
7089 2023-07-20 Roger Sayle <roger@nextmovesoftware.com>
7091 * config/i386/i386-expand.cc (ix86_expand_move): Don't call
7092 force_reg, to use SUBREG rather than create a new pseudo when
7093 inserting DFmode fields into TImode with insvti_{high,low}part.
7094 * config/i386/i386.md (*concat<mode><dwi>3_3): Split into two
7095 define_insn_and_split...
7096 (*concatditi3_3): 64-bit implementation. Provide alternative
7097 that allows register allocation to use SSE registers that is
7098 split into vec_concatv2di after reload.
7099 (*concatsidi3_3): 32-bit implementation.
7101 2023-07-20 Richard Biener <rguenther@suse.de>
7104 * internal-fn.cc (expand_vec_cond_optab_fn): When the
7105 value operands are equal to the original comparison operands
7106 preserve that equality by re-using the comparison expansion.
7107 * optabs.cc (emit_conditional_move): When the value operands
7108 are equal to the comparison operands and would be forced to
7109 a register by prepare_cmp_insn do so earlier, preserving the
7112 2023-07-20 Pan Li <pan2.li@intel.com>
7114 * config/riscv/vector.md: Align pattern format.
7116 2023-07-20 Haochen Jiang <haochen.jiang@intel.com>
7118 * doc/invoke.texi: Remove AVX512VP2INTERSECT in
7119 Granite Rapids{, D} from documentation.
7121 2023-07-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7123 * config/riscv/autovec.md
7124 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>):
7125 Refactor RVV machine modes.
7126 (len_mask_gather_load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
7127 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
7128 (len_mask_gather_load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
7129 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
7130 (len_mask_gather_load<mode><mode>): Ditto.
7131 (len_mask_gather_load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
7132 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
7133 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
7134 (len_mask_scatter_store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
7135 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
7136 (len_mask_scatter_store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
7137 (len_mask_scatter_store<mode><mode>): Ditto.
7138 (len_mask_scatter_store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
7139 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Ditto.
7140 (ADJUST_NUNITS): Ditto.
7141 (ADJUST_ALIGNMENT): Ditto.
7142 (ADJUST_BYTESIZE): Ditto.
7143 (ADJUST_PRECISION): Ditto.
7145 (RVV_WHOLE_MODES): Ditto.
7146 (RVV_FRACT_MODE): Ditto.
7147 (RVV_NF8_MODES): Ditto.
7148 (RVV_NF4_MODES): Ditto.
7149 (VECTOR_MODES_WITH_PREFIX): Ditto.
7150 (VECTOR_MODE_WITH_PREFIX): Ditto.
7151 (RVV_TUPLE_MODES): Ditto.
7152 (RVV_NF2_MODES): Ditto.
7153 (RVV_TUPLE_PARTIAL_MODES): Ditto.
7154 * config/riscv/riscv-v.cc (struct mode_vtype_group): Ditto.
7156 (TUPLE_ENTRY): Ditto.
7160 (preferred_simd_mode): Ditto.
7161 (autovectorize_vector_modes): Ditto.
7162 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
7163 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
7171 (vint8mf8_t): Ditto.
7172 (vuint8mf8_t): Ditto.
7173 (vint8mf4_t): Ditto.
7174 (vuint8mf4_t): Ditto.
7175 (vint8mf2_t): Ditto.
7176 (vuint8mf2_t): Ditto.
7178 (vuint8m1_t): Ditto.
7180 (vuint8m2_t): Ditto.
7182 (vuint8m4_t): Ditto.
7184 (vuint8m8_t): Ditto.
7185 (vint16mf4_t): Ditto.
7186 (vuint16mf4_t): Ditto.
7187 (vint16mf2_t): Ditto.
7188 (vuint16mf2_t): Ditto.
7189 (vint16m1_t): Ditto.
7190 (vuint16m1_t): Ditto.
7191 (vint16m2_t): Ditto.
7192 (vuint16m2_t): Ditto.
7193 (vint16m4_t): Ditto.
7194 (vuint16m4_t): Ditto.
7195 (vint16m8_t): Ditto.
7196 (vuint16m8_t): Ditto.
7197 (vint32mf2_t): Ditto.
7198 (vuint32mf2_t): Ditto.
7199 (vint32m1_t): Ditto.
7200 (vuint32m1_t): Ditto.
7201 (vint32m2_t): Ditto.
7202 (vuint32m2_t): Ditto.
7203 (vint32m4_t): Ditto.
7204 (vuint32m4_t): Ditto.
7205 (vint32m8_t): Ditto.
7206 (vuint32m8_t): Ditto.
7207 (vint64m1_t): Ditto.
7208 (vuint64m1_t): Ditto.
7209 (vint64m2_t): Ditto.
7210 (vuint64m2_t): Ditto.
7211 (vint64m4_t): Ditto.
7212 (vuint64m4_t): Ditto.
7213 (vint64m8_t): Ditto.
7214 (vuint64m8_t): Ditto.
7215 (vfloat16mf4_t): Ditto.
7216 (vfloat16mf2_t): Ditto.
7217 (vfloat16m1_t): Ditto.
7218 (vfloat16m2_t): Ditto.
7219 (vfloat16m4_t): Ditto.
7220 (vfloat16m8_t): Ditto.
7221 (vfloat32mf2_t): Ditto.
7222 (vfloat32m1_t): Ditto.
7223 (vfloat32m2_t): Ditto.
7224 (vfloat32m4_t): Ditto.
7225 (vfloat32m8_t): Ditto.
7226 (vfloat64m1_t): Ditto.
7227 (vfloat64m2_t): Ditto.
7228 (vfloat64m4_t): Ditto.
7229 (vfloat64m8_t): Ditto.
7230 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
7231 (TUPLE_ENTRY): Ditto.
7232 * config/riscv/riscv-vsetvl.cc (change_insn): Ditto.
7233 * config/riscv/riscv.cc (riscv_valid_lo_sum_p): Ditto.
7234 (riscv_v_adjust_nunits): Ditto.
7235 (riscv_v_adjust_bytesize): Ditto.
7236 (riscv_v_adjust_precision): Ditto.
7237 (riscv_convert_vector_bits): Ditto.
7238 * config/riscv/riscv.h (riscv_v_adjust_nunits): Ditto.
7239 * config/riscv/riscv.md: Ditto.
7240 * config/riscv/vector-iterators.md: Ditto.
7241 * config/riscv/vector.md
7242 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
7243 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
7244 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
7245 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
7246 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
7247 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
7248 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
7249 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
7250 (@pred_indexed_<order>load<V1T:mode><VNX1_QHSDI:mode>): Ditto.
7251 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
7252 (@pred_indexed_<order>load<V2T:mode><VNX2_QHSDI:mode>): Ditto.
7253 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
7254 (@pred_indexed_<order>load<V4T:mode><VNX4_QHSDI:mode>): Ditto.
7255 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
7256 (@pred_indexed_<order>load<V8T:mode><VNX8_QHSDI:mode>): Ditto.
7257 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
7258 (@pred_indexed_<order>load<V16T:mode><VNX16_QHSI:mode>): Ditto.
7259 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
7260 (@pred_indexed_<order>load<V32T:mode><VNX32_QHI:mode>): Ditto.
7261 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
7262 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
7263 (@pred_indexed_<order>store<V1T:mode><VNX1_QHSDI:mode>): Ditto.
7264 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
7265 (@pred_indexed_<order>store<V2T:mode><VNX2_QHSDI:mode>): Ditto.
7266 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
7267 (@pred_indexed_<order>store<V4T:mode><VNX4_QHSDI:mode>): Ditto.
7268 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
7269 (@pred_indexed_<order>store<V8T:mode><VNX8_QHSDI:mode>): Ditto.
7270 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
7271 (@pred_indexed_<order>store<V16T:mode><VNX16_QHSI:mode>): Ditto.
7272 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
7273 (@pred_indexed_<order>store<V32T:mode><VNX32_QHI:mode>): Ditto.
7274 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
7276 2023-07-19 Vladimir N. Makarov <vmakarov@redhat.com>
7278 * lra-int.h (lra_update_fp2sp_elimination): New prototype.
7279 (lra_asm_insn_error): New prototype.
7280 * lra-spills.cc (remove_pseudos): Add check for pseudo slot memory
7282 (lra_spill): Call lra_update_fp2sp_elimination.
7283 * lra-eliminations.cc: Remove trailing spaces.
7284 (elimination_fp2sp_occured_p): New static flag.
7285 (lra_eliminate_regs_1): Set the flag up.
7286 (update_reg_eliminate): Modify the assert for stack to frame
7287 pointer elimination.
7288 (lra_update_fp2sp_elimination): New function.
7289 (lra_eliminate): Clear flag elimination_fp2sp_occured_p.
7291 2023-07-19 Andrew Carlotti <andrew.carlotti@arm.com>
7293 * config/aarch64/aarch64.h (TARGET_MEMTAG): Remove armv8.5
7295 * config/aarch64/arm_acle.h: Remove unnecessary armv8.x
7296 dependencies from target pragmas.
7297 * config/aarch64/arm_fp16.h (target): Likewise.
7298 * config/aarch64/arm_neon.h (target): Likewise.
7300 2023-07-19 Andrew Pinski <apinski@marvell.com>
7302 PR tree-optimization/110252
7303 * tree-ssa-phiopt.cc (class auto_flow_sensitive): New class.
7304 (auto_flow_sensitive::auto_flow_sensitive): New constructor.
7305 (auto_flow_sensitive::~auto_flow_sensitive): New deconstructor.
7306 (match_simplify_replacement): Temporarily
7307 remove the flow sensitive info on the two statements that might
7310 2023-07-19 Andrew Pinski <apinski@marvell.com>
7312 * gimple-fold.cc (fosa_unwind): Replace `vrange_storage *`
7313 with flow_sensitive_info_storage.
7314 (follow_outer_ssa_edges): Update how to save off the flow
7316 (maybe_fold_comparisons_from_match_pd): Update restoring
7317 of flow sensitive info.
7318 * tree-ssanames.cc (flow_sensitive_info_storage::save): New method.
7319 (flow_sensitive_info_storage::restore): New method.
7320 (flow_sensitive_info_storage::save_and_clear): New method.
7321 (flow_sensitive_info_storage::clear_storage): New method.
7322 * tree-ssanames.h (class flow_sensitive_info_storage): New class.
7324 2023-07-19 Andrew Pinski <apinski@marvell.com>
7326 PR tree-optimization/110726
7327 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)):
7328 Add checks to make sure the type was one bit precision
7331 2023-07-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
7333 * doc/md.texi: Add mask_len_fold_left_plus.
7334 * internal-fn.cc (mask_len_fold_left_direct): Ditto.
7335 (expand_mask_len_fold_left_optab_fn): Ditto.
7336 (direct_mask_len_fold_left_optab_supported_p): Ditto.
7337 * internal-fn.def (MASK_LEN_FOLD_LEFT_PLUS): Ditto.
7338 * optabs.def (OPTAB_D): Ditto.
7340 2023-07-19 Jakub Jelinek <jakub@redhat.com>
7342 * tree-switch-conversion.h (class bit_test_cluster): Fix comment typo.
7344 2023-07-19 Jakub Jelinek <jakub@redhat.com>
7346 PR tree-optimization/110731
7347 * wide-int.cc (wi::divmod_internal): Always unpack dividend and
7348 divisor as UNSIGNED regardless of sgn.
7350 2023-07-19 Lehua Ding <lehua.ding@rivai.ai>
7352 * common/config/riscv/riscv-common.cc (riscv_supported_std_ext): Init.
7353 (standard_extensions_p): Add check.
7354 (riscv_subset_list::add): Just return NULL if it failed before.
7355 (riscv_subset_list::parse_std_ext): Continue parse when find a error
7356 (riscv_subset_list::parse): Just return NULL if it failed before.
7357 * config/riscv/riscv-subset.h (class riscv_subset_list): Add field.
7359 2023-07-19 Jan Beulich <jbeulich@suse.com>
7361 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
7363 (ix86_expand_vector_extract): Use gen_vec_extract_lo /
7365 (expand_vec_perm_broadcast_1): Use gen_vec_interleave_high /
7366 gen_vec_interleave_low. Rename local variable.
7368 2023-07-19 Jan Beulich <jbeulich@suse.com>
7370 * config/i386/sse.md (vec_dupv2df<mask_name>): Add new AVX512F
7371 alternative. Move AVX512VL part of condition to new "enabled"
7374 2023-07-19 liuhongt <hongtao.liu@intel.com>
7377 * config/i386/i386-builtins.cc
7378 (ix86_register_float16_builtin_type): Remove TARGET_SSE2.
7379 (ix86_register_bf16_builtin_type): Ditto.
7380 * config/i386/i386-c.cc (ix86_target_macros): When TARGET_SSE2
7381 isn't available, undef the macros which are used to check the
7382 backend support of the _Float16/__bf16 types when building
7383 libstdc++ and libgcc.
7384 * config/i386/i386.cc (construct_container): Issue errors for
7385 HFmode/BFmode when TARGET_SSE2 is not available.
7386 (function_value_32): Ditto.
7387 (ix86_scalar_mode_supported_p): Remove TARGET_SSE2 for HFmode/BFmode.
7388 (ix86_libgcc_floating_mode_supported_p): Ditto.
7389 (ix86_emit_support_tinfos): Adjust codes.
7390 (ix86_invalid_conversion): Return diagnostic message string
7391 when there's conversion from/to BF/HFmode w/o TARGET_SSE2.
7392 (ix86_invalid_unary_op): New function.
7393 (ix86_invalid_binary_op): Ditto.
7394 (TARGET_INVALID_UNARY_OP): Define.
7395 (TARGET_INVALID_BINARY_OP): Define.
7396 * config/i386/immintrin.h [__SSE2__]: Remove for fp16/bf16
7397 related instrinsics header files.
7398 * config/i386/i386.h (VALID_SSE2_TYPE_MODE): New macro.
7400 2023-07-18 Uros Bizjak <ubizjak@gmail.com>
7402 * dwarf2asm.cc: Change FALSE to false.
7403 * dwarf2cfi.cc (execute_dwarf2_frame): Change return type to void.
7404 * dwarf2out.cc (matches_main_base): Change return type from
7405 int to bool. Change "last_match" variable to bool.
7406 (dump_struct_debug): Change return type from int to bool.
7407 Change "matches" and "result" function arguments to bool.
7408 (is_pseudo_reg): Change return type from int to bool.
7409 (is_tagged_type): Ditto.
7410 (same_loc_p): Ditto.
7411 (same_dw_val_p): Change return type from int to bool and adjust
7412 function body accordingly.
7413 (same_attr_p): Ditto.
7414 (same_die_p): Ditto.
7415 (is_type_die): Ditto.
7416 (is_declaration_die): Ditto.
7417 (should_move_die_to_comdat): Ditto.
7418 (is_base_type): Ditto.
7419 (is_based_loc): Ditto.
7420 (local_scope_p): Ditto.
7421 (class_scope_p): Ditto.
7422 (class_or_namespace_scope_p): Ditto.
7423 (is_tagged_type): Ditto.
7424 (is_rust): Use void argument.
7425 (is_nested_in_subprogram): Change return type from int to bool.
7426 (contains_subprogram_definition): Ditto.
7427 (gen_struct_or_union_type_die): Change "nested", "complete"
7428 and "ns_decl" variables to bool.
7429 (is_naming_typedef_decl): Change FALSE to false.
7431 2023-07-18 Jan Hubicka <jh@suse.cz>
7433 * tree-ssa-loop-ch.cc (edge_range_query): Take loop argument; be ready
7434 for queries not in headers.
7435 (static_loop_exit): Add basic blck parameter; update use of
7437 (should_duplicate_loop_header_p): Add ranger and static_exits
7438 parameter. Do not account statements that will be optimized
7439 out after duplicaiton in overall size. Add ranger query to
7441 (update_profile_after_ch): Take static_exits has set instead of
7442 single eliminated_edge.
7443 (ch_base::copy_headers): Do all analysis in the first pass;
7444 remember invariant_exits and static_exits.
7446 2023-07-18 Jason Merrill <jason@redhat.com>
7448 * fold-const.cc (native_interpret_aggregate): Skip empty fields.
7450 2023-07-18 Gaius Mulley <gaiusmod2@gmail.com>
7452 * doc/gm2.texi (Semantic checking): Change example testwithptr
7455 2023-07-18 Richard Biener <rguenther@suse.de>
7457 PR middle-end/105715
7458 * gimple-isel.cc (gimple_expand_vec_exprs): Merge into...
7459 (pass_gimple_isel::execute): ... this. Duplicate
7460 comparison defs of COND_EXPRs.
7462 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7464 * config/riscv/riscv-selftests.cc (run_poly_int_selftests): Add more selftests.
7465 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Dynamic adjust size of VLA vectors.
7466 (riscv_convert_vector_bits): Ditto.
7468 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7470 * config/riscv/autovec.md (vec_shl_insert_<mode>): New patterns.
7471 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix bugs.
7473 2023-07-18 Juergen Christ <jchrist@linux.ibm.com>
7475 * config/s390/vx-builtins.md: New vsel pattern.
7477 2023-07-18 liuhongt <hongtao.liu@intel.com>
7480 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>):
7481 Remove # from assemble output.
7483 2023-07-18 liuhongt <hongtao.liu@intel.com>
7486 * config/i386/sync.md (cmpccxadd_<mode>): Adjust the pattern
7487 to explicitly set FLAGS_REG like *cmp<mode>_1, also add extra
7488 3 define_peephole2 after the pattern.
7490 2023-07-18 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
7492 * rtl-ssa/internals.inl: Fix when mode1 and mode2 are not ordred.
7494 2023-07-18 Pan Li <pan2.li@intel.com>
7495 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7497 * config/riscv/riscv.cc (struct machine_function): Add new field.
7498 (riscv_static_frm_mode_p): New function.
7499 (riscv_emit_frm_mode_set): New function for emit FRM.
7500 (riscv_emit_mode_set): Extract function for FRM.
7501 (riscv_mode_needed): Fix the TODO.
7502 (riscv_mode_entry): Initial dynamic frm RTL.
7503 (riscv_mode_exit): Return DYN_EXIT.
7504 * config/riscv/riscv.md: Add rdfrm.
7505 * config/riscv/vector-iterators.md (unspecv): Add DYN_EXIT unspecv.
7506 * config/riscv/vector.md (frm_modee): Add new mode dyn_exit.
7508 (fsrmsi_backup): New pattern for swap.
7509 (fsrmsi_restore): New pattern for restore.
7510 (fsrmsi_restore_exit): New pattern for restore exit.
7511 (frrmsi): New pattern for backup.
7513 2023-07-17 Arsen Arsenović <arsen@aarsen.me>
7515 * doc/extend.texi: Add @cindex on __auto_type.
7517 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
7519 * combine-stack-adj.cc (stack_memref_p): Change return type from
7520 int to bool and adjust function body accordingly.
7521 (rest_of_handle_stack_adjustments): Change return type to void.
7523 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
7525 * combine.cc (struct reg_stat_type): Change last_set_invalid to bool.
7526 (cant_combine_insn_p): Change return type from int to bool and adjust
7527 function body accordingly.
7528 (can_combine_p): Ditto.
7529 (combinable_i3pat): Ditto. Change "i1_not_in_src" and "i0_not_in_src"
7530 function arguments from int to bool.
7531 (contains_muldiv): Change return type from int to bool and adjust
7532 function body accordingly.
7533 (try_combine): Ditto. Change "new_direct_jump" pointer function
7534 argument from int to bool. Change "substed_i2", "substed_i1",
7535 "substed_i0", "added_sets_0", "added_sets_1", "added_sets_2",
7536 "i2dest_in_i2src", "i1dest_in_i1src", "i2dest_in_i1src",
7537 "i0dest_in_i0src", "i1dest_in_i0src", "i2dest_in_i0src",
7538 "i2dest_killed", "i1dest_killed", "i0dest_killed", "i1_feeds_i2_n",
7539 "i0_feeds_i2_n", "i0_feeds_i1_n", "i3_subst_into_i2", "have_mult",
7540 "swap_i2i3", "split_i2i3" and "changed_i3_dest" variables
7542 (subst): Change "in_dest", "in_cond" and "unique_copy" function
7543 arguments from int to bool.
7544 (combine_simplify_rtx): Change "in_dest" and "in_cond" function
7545 arguments from int to bool.
7546 (make_extraction): Change "unsignedp", "in_dest" and "in_compare"
7547 function argument from int to bool.
7548 (force_int_to_mode): Change "just_select" function argument
7549 from int to bool. Change "next_select" variable to bool.
7550 (rtx_equal_for_field_assignment_p): Change return type from
7551 int to bool and adjust function body accordingly.
7552 (merge_outer_ops): Ditto. Change "pcomp_p" pointer function
7553 argument from int to bool.
7554 (get_last_value_validate): Change return type from int to bool
7555 and adjust function body accordingly.
7556 (reg_dead_at_p): Ditto.
7557 (reg_bitfield_target_p): Ditto.
7558 (combine_instructions): Ditto. Change "new_direct_jump"
7560 (can_combine_p): Change return type from int to bool
7561 and adjust function body accordingly.
7562 (likely_spilled_retval_p): Ditto.
7563 (can_change_dest_mode): Change "added_sets" function argument
7565 (find_split_point): Change "unsignedp" variable to bool.
7566 (simplify_if_then_else): Change "comparison_p" and "swapped"
7568 (simplify_set): Change "other_changed" variable to bool.
7569 (expand_compound_operation): Change "unsignedp" variable to bool.
7570 (force_to_mode): Change "just_select" function argument
7571 from int to bool. Change "next_select" variable to bool.
7572 (extended_count): Change "unsignedp" function argument to bool.
7573 (simplify_shift_const_1): Change "complement_p" variable to bool.
7574 (simplify_comparison): Change "changed" variable to bool.
7575 (rest_of_handle_combine): Change return type to void.
7577 2023-07-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
7580 * Makefile.in (INTERNAL_FN_H): Add insn-opinit.h.
7582 2023-07-17 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
7584 * ira.cc (setup_reg_class_relations): Continue
7585 if regclass cl3 is hard_reg_set_empty_p.
7587 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7589 * config/riscv/riscv.cc (riscv_option_override): Add sorry check.
7591 2023-07-17 Martin Jambor <mjambor@suse.cz>
7593 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Remove unused variable
7596 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
7598 * tree-ssa-ccp.cc (ccp_finalize): Export value/mask known bits.
7600 2023-07-17 Lehua Ding <lehua.ding@rivai.ai>
7603 * common/config/riscv/riscv-common.cc (riscv_subset_list::handle_implied_ext):
7604 recur add all implied extensions.
7605 (riscv_subset_list::check_implied_ext): Add new method.
7606 (riscv_subset_list::parse): Call checker check_implied_ext.
7607 * config/riscv/riscv-subset.h: Add new method.
7609 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7611 * config/riscv/autovec.md (reduc_plus_scal_<mode>): New pattern.
7612 (reduc_smax_scal_<mode>): Ditto.
7613 (reduc_umax_scal_<mode>): Ditto.
7614 (reduc_smin_scal_<mode>): Ditto.
7615 (reduc_umin_scal_<mode>): Ditto.
7616 (reduc_and_scal_<mode>): Ditto.
7617 (reduc_ior_scal_<mode>): Ditto.
7618 (reduc_xor_scal_<mode>): Ditto.
7619 * config/riscv/riscv-protos.h (enum insn_type): Add reduction.
7620 (expand_reduction): New function.
7621 * config/riscv/riscv-v.cc (emit_vlmax_reduction_insn): Ditto.
7622 (emit_vlmax_fp_reduction_insn): Ditto.
7623 (get_m1_mode): Ditto.
7624 (expand_cond_len_binop): Fix name.
7625 (expand_reduction): New function
7626 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Fix VSETVL BUG.
7627 (validate_change_or_fail): New function.
7628 (change_insn): Fix VSETVL BUG.
7629 (change_vsetvl_insn): Ditto.
7630 (pass_vsetvl::backward_demand_fusion): Ditto.
7631 (pass_vsetvl::df_post_optimization): Ditto.
7633 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
7635 * ipa-prop.cc (ipcp_update_bits): Export value/mask known bits.
7637 2023-07-17 Christoph Müllner <christoph.muellner@vrull.eu>
7639 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p):
7640 Remove parameter name from declaration of unused parameter.
7642 2023-07-17 Kewen Lin <linkw@linux.ibm.com>
7644 PR tree-optimization/110652
7645 * tree-vect-stmts.cc (vectorizable_load): Initialize new_temp as
7648 2023-07-17 Richard Biener <rguenther@suse.de>
7650 PR tree-optimization/110669
7651 * tree-scalar-evolution.cc (analyze_and_compute_bitop_with_inv_effect):
7652 Check we matched a header PHI.
7654 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
7656 * tree-ssanames.cc (set_bitmask): New.
7657 * tree-ssanames.h (set_bitmask): New.
7659 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
7661 * value-range.cc (irange_bitmask::verify_mask): Mask need not be
7663 * value-range.h (irange_bitmask::union_): Normalize beforehand.
7664 (irange_bitmask::intersect): Same.
7666 2023-07-17 Andrew Pinski <apinski@marvell.com>
7668 PR tree-optimization/95923
7669 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)): New transformation.
7671 2023-07-17 Roger Sayle <roger@nextmovesoftware.com>
7673 * tree-if-conv.cc (predicate_scalar_phi): Make the arguments
7674 to the std::sort comparison lambda function const.
7676 2023-07-17 Andrew Pinski <apinski@marvell.com>
7678 PR tree-optimization/110666
7679 * match.pd (A NEEQ (A NEEQ CST)): Fix Outer EQ case.
7681 2023-07-17 Mo, Zewei <zewei.mo@intel.com>
7683 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Lunar Lake,
7684 Arrow Lake and Arrow Lake S.
7685 * common/config/i386/i386-common.cc:
7686 (processor_name): Add arrowlake.
7687 (processor_alias_table): Add arrow lake, arrow lake s and lunar
7689 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
7690 Add INTEL_COREI7_ARROWLAKE and INTEL_COREI7_ARROWLAKE_S.
7691 * config.gcc: Add -march=arrowlake and -march=arrowlake-s.
7692 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
7694 * config/i386/i386-c.cc (ix86_target_macros_internal): Add
7696 * config/i386/i386-options.cc (m_ARROWLAKE): New.
7697 (processor_cost_table): Add arrowlake.
7698 * config/i386/i386.h (enum processor_type):
7699 Add PROCESSOR_ARROWLAKE.
7700 * config/i386/x86-tune.def: Add m_ARROWLAKE.
7701 * doc/extend.texi: Add arrowlake and arrowlake-s.
7702 * doc/invoke.texi: Ditto.
7704 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
7706 * config/i386/sse.md (VI2_AVX2): Delete V32HI since we actually
7707 have the same iterator. Also renaming all the occurence to
7709 (usdot_prod<mode>): New define_expand.
7710 (udot_prod<mode>): Ditto.
7712 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
7714 * common/config/i386/cpuinfo.h (get_available_features):
7716 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM4_SET,
7717 OPTION_MASK_ISA2_SM4_UNSET): New.
7718 (OPTION_MASK_ISA2_AVX_UNSET): Add SM4.
7719 (ix86_handle_option): Handle -msm4.
7720 * common/config/i386/i386-cpuinfo.h (enum processor_features):
7722 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
7724 * config.gcc: Add sm4intrin.h.
7725 * config/i386/cpuid.h (bit_SM4): New.
7726 * config/i386/i386-builtin.def (BDESC): Add new builtins.
7727 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
7729 * config/i386/i386-isa.def (SM4): Add DEF_PTA(SM4).
7730 * config/i386/i386-options.cc (isa2_opts): Add -msm4.
7731 (ix86_valid_target_attribute_inner_p): Handle sm4.
7732 * config/i386/i386.opt: Add option -msm4.
7733 * config/i386/immintrin.h: Include sm4intrin.h
7734 * config/i386/sse.md (vsm4key4_<mode>): New define insn.
7735 (vsm4rnds4_<mode>): Ditto.
7736 * doc/extend.texi: Document sm4.
7737 * doc/invoke.texi: Document -msm4.
7738 * doc/sourcebuild.texi: Document target sm4.
7739 * config/i386/sm4intrin.h: New file.
7741 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
7743 * common/config/i386/cpuinfo.h (get_available_features):
7745 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SHA512_SET,
7746 OPTION_MASK_ISA2_SHA512_UNSET): New.
7747 (OPTION_MASK_ISA2_AVX_UNSET): Add SHA512.
7748 (ix86_handle_option): Handle -msha512.
7749 * common/config/i386/i386-cpuinfo.h (enum processor_features):
7751 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
7753 * config.gcc: Add sha512intrin.h.
7754 * config/i386/cpuid.h (bit_SHA512): New.
7755 * config/i386/i386-builtin-types.def:
7756 Add DEF_FUNCTION_TYPE (V4DI, V4DI, V4DI, V2DI).
7757 * config/i386/i386-builtin.def (BDESC): Add new builtins.
7758 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
7760 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
7761 V4DI_FTYPE_V4DI_V4DI_V2DI and V4DI_FTYPE_V4DI_V2DI.
7762 * config/i386/i386-isa.def (SHA512): Add DEF_PTA(SHA512).
7763 * config/i386/i386-options.cc (isa2_opts): Add -msha512.
7764 (ix86_valid_target_attribute_inner_p): Handle sha512.
7765 * config/i386/i386.opt: Add option -msha512.
7766 * config/i386/immintrin.h: Include sha512intrin.h.
7767 * config/i386/sse.md (vsha512msg1): New define insn.
7768 (vsha512msg2): Ditto.
7769 (vsha512rnds2): Ditto.
7770 * doc/extend.texi: Document sha512.
7771 * doc/invoke.texi: Document -msha512.
7772 * doc/sourcebuild.texi: Document target sha512.
7773 * config/i386/sha512intrin.h: New file.
7775 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
7777 * common/config/i386/cpuinfo.h (get_available_features):
7779 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM3_SET,
7780 OPTION_MASK_ISA2_SM3_UNSET): New.
7781 (OPTION_MASK_ISA2_AVX_UNSET): Add SM3.
7782 (ix86_handle_option): Handle -msm3.
7783 * common/config/i386/i386-cpuinfo.h (enum processor_features):
7785 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
7787 * config.gcc: Add sm3intrin.h
7788 * config/i386/cpuid.h (bit_SM3): New.
7789 * config/i386/i386-builtin-types.def:
7790 Add DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, V4SI, INT).
7791 * config/i386/i386-builtin.def (BDESC): Add new builtins.
7792 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
7794 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
7795 V4SI_FTYPE_V4SI_V4SI_V4SI_INT.
7796 * config/i386/i386-isa.def (SM3): Add DEF_PTA(SM3).
7797 * config/i386/i386-options.cc (isa2_opts): Add -msm3.
7798 (ix86_valid_target_attribute_inner_p): Handle sm3.
7799 * config/i386/i386.opt: Add option -msm3.
7800 * config/i386/immintrin.h: Include sm3intrin.h.
7801 * config/i386/sse.md (vsm3msg1): New define insn.
7804 * doc/extend.texi: Document sm3.
7805 * doc/invoke.texi: Document -msm3.
7806 * doc/sourcebuild.texi: Document target sm3.
7807 * config/i386/sm3intrin.h: New file.
7809 2023-07-17 Kong Lingling <lingling.kong@intel.com>
7810 Haochen Jiang <haochen.jiang@intel.com>
7812 * common/config/i386/cpuinfo.h (get_available_features): Detect
7814 * common/config/i386/i386-common.cc
7815 (OPTION_MASK_ISA2_AVXVNNIINT16_SET): New.
7816 (OPTION_MASK_ISA2_AVXVNNIINT16_UNSET): Ditto.
7817 (ix86_handle_option): Handle -mavxvnniint16.
7818 * common/config/i386/i386-cpuinfo.h (enum processor_features):
7819 Add FEATURE_AVXVNNIINT16.
7820 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
7822 * config.gcc: Add avxvnniint16.h.
7823 * config/i386/avxvnniint16intrin.h: New file.
7824 * config/i386/cpuid.h (bit_AVXVNNIINT16): New.
7825 * config/i386/i386-builtin.def: Add new builtins.
7826 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
7828 * config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint16.
7829 (ix86_valid_target_attribute_inner_p): Handle avxvnniint16intrin.h.
7830 * config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT16).
7831 * config/i386/i386.opt: Add option -mavxvnniint16.
7832 * config/i386/immintrin.h: Include avxvnniint16.h.
7833 * config/i386/sse.md
7834 (vpdp<vpdpwprodtype>_<mode>): New define_insn.
7835 * doc/extend.texi: Document avxvnniint16.
7836 * doc/invoke.texi: Document -mavxvnniint16.
7837 * doc/sourcebuild.texi: Document target avxvnniint16.
7839 2023-07-16 Jan Hubicka <jh@suse.cz>
7841 PR middle-end/110649
7842 * tree-vect-loop.cc (scale_profile_for_vect_loop): Rewrite.
7843 (vect_transform_loop): Move scale_profile_for_vect_loop after
7844 upper bound updates.
7846 2023-07-16 Jan Hubicka <jh@suse.cz>
7848 PR tree-optimization/110649
7849 * tree-vect-loop.cc (optimize_mask_stores): Set correctly
7850 probability of the if-then-else construct.
7852 2023-07-16 Jan Hubicka <jh@suse.cz>
7854 PR middle-end/110649
7855 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Avoid double profile update.
7857 2023-07-15 Andrew Pinski <apinski@marvell.com>
7859 * doc/contrib.texi: Update my entry.
7861 2023-07-15 John David Anglin <danglin@gcc.gnu.org>
7863 * config/pa/pa.md: Define constants R1_REGNUM, R19_REGNUM and
7865 (tgd_load): Restrict to !TARGET_64BIT. Use register constants.
7866 (tld_load): Likewise.
7867 (tgd_load_pic): Change to expander.
7868 (tld_load_pic, tld_offset_load, tp_load): Likewise.
7869 (tie_load_pic, tle_load): Likewise.
7870 (tgd_load_picsi, tgd_load_picdi): New.
7871 (tld_load_picsi, tld_load_picdi): New.
7872 (tld_offset_load<P:mode>): New.
7873 (tp_load<P:mode>): New.
7874 (tie_load_picsi, tie_load_picdi): New.
7875 (tle_load<P:mode>): New.
7877 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
7879 * config/arm/arm-mve-builtins-base.cc (vcmlaq, vcmlaq_rot90)
7880 (vcmlaq_rot180, vcmlaq_rot270): New.
7881 * config/arm/arm-mve-builtins-base.def (vcmlaq, vcmlaq_rot90)
7882 (vcmlaq_rot180, vcmlaq_rot270): New.
7883 * config/arm/arm-mve-builtins-base.h: (vcmlaq, vcmlaq_rot90)
7884 (vcmlaq_rot180, vcmlaq_rot270): New.
7885 * config/arm/arm-mve-builtins.cc
7886 (function_instance::has_inactive_argument): Handle vcmlaq,
7887 vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270.
7888 * config/arm/arm_mve.h (vcmlaq): Delete.
7889 (vcmlaq_rot180): Delete.
7890 (vcmlaq_rot270): Delete.
7891 (vcmlaq_rot90): Delete.
7893 (vcmlaq_rot180_m): Delete.
7894 (vcmlaq_rot270_m): Delete.
7895 (vcmlaq_rot90_m): Delete.
7896 (vcmlaq_f16): Delete.
7897 (vcmlaq_rot180_f16): Delete.
7898 (vcmlaq_rot270_f16): Delete.
7899 (vcmlaq_rot90_f16): Delete.
7900 (vcmlaq_f32): Delete.
7901 (vcmlaq_rot180_f32): Delete.
7902 (vcmlaq_rot270_f32): Delete.
7903 (vcmlaq_rot90_f32): Delete.
7904 (vcmlaq_m_f32): Delete.
7905 (vcmlaq_m_f16): Delete.
7906 (vcmlaq_rot180_m_f32): Delete.
7907 (vcmlaq_rot180_m_f16): Delete.
7908 (vcmlaq_rot270_m_f32): Delete.
7909 (vcmlaq_rot270_m_f16): Delete.
7910 (vcmlaq_rot90_m_f32): Delete.
7911 (vcmlaq_rot90_m_f16): Delete.
7912 (__arm_vcmlaq_f16): Delete.
7913 (__arm_vcmlaq_rot180_f16): Delete.
7914 (__arm_vcmlaq_rot270_f16): Delete.
7915 (__arm_vcmlaq_rot90_f16): Delete.
7916 (__arm_vcmlaq_f32): Delete.
7917 (__arm_vcmlaq_rot180_f32): Delete.
7918 (__arm_vcmlaq_rot270_f32): Delete.
7919 (__arm_vcmlaq_rot90_f32): Delete.
7920 (__arm_vcmlaq_m_f32): Delete.
7921 (__arm_vcmlaq_m_f16): Delete.
7922 (__arm_vcmlaq_rot180_m_f32): Delete.
7923 (__arm_vcmlaq_rot180_m_f16): Delete.
7924 (__arm_vcmlaq_rot270_m_f32): Delete.
7925 (__arm_vcmlaq_rot270_m_f16): Delete.
7926 (__arm_vcmlaq_rot90_m_f32): Delete.
7927 (__arm_vcmlaq_rot90_m_f16): Delete.
7928 (__arm_vcmlaq): Delete.
7929 (__arm_vcmlaq_rot180): Delete.
7930 (__arm_vcmlaq_rot270): Delete.
7931 (__arm_vcmlaq_rot90): Delete.
7932 (__arm_vcmlaq_m): Delete.
7933 (__arm_vcmlaq_rot180_m): Delete.
7934 (__arm_vcmlaq_rot270_m): Delete.
7935 (__arm_vcmlaq_rot90_m): Delete.
7937 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
7939 * config/arm/arm_mve_builtins.def (vcmlaq_rot90_f)
7940 (vcmlaq_rot270_f, vcmlaq_rot180_f, vcmlaq_f): Add "_f" suffix.
7941 * config/arm/iterators.md (MVE_VCMLAQ_M): New.
7942 (mve_insn): Add vcmla.
7943 (rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
7945 (mve_rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
7947 * config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Rename into ...
7948 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this.
7949 (mve_vcmlaq_m_f<mode>, mve_vcmlaq_rot180_m_f<mode>)
7950 (mve_vcmlaq_rot270_m_f<mode>, mve_vcmlaq_rot90_m_f<mode>): Merge
7952 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
7954 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
7956 * config/arm/arm-mve-builtins-base.cc (vcmulq, vcmulq_rot90)
7957 (vcmulq_rot180, vcmulq_rot270): New.
7958 * config/arm/arm-mve-builtins-base.def (vcmulq, vcmulq_rot90)
7959 (vcmulq_rot180, vcmulq_rot270): New.
7960 * config/arm/arm-mve-builtins-base.h: (vcmulq, vcmulq_rot90)
7961 (vcmulq_rot180, vcmulq_rot270): New.
7962 * config/arm/arm_mve.h (vcmulq_rot90): Delete.
7963 (vcmulq_rot270): Delete.
7964 (vcmulq_rot180): Delete.
7967 (vcmulq_rot180_m): Delete.
7968 (vcmulq_rot270_m): Delete.
7969 (vcmulq_rot90_m): Delete.
7971 (vcmulq_rot90_x): Delete.
7972 (vcmulq_rot180_x): Delete.
7973 (vcmulq_rot270_x): Delete.
7974 (vcmulq_rot90_f16): Delete.
7975 (vcmulq_rot270_f16): Delete.
7976 (vcmulq_rot180_f16): Delete.
7977 (vcmulq_f16): Delete.
7978 (vcmulq_rot90_f32): Delete.
7979 (vcmulq_rot270_f32): Delete.
7980 (vcmulq_rot180_f32): Delete.
7981 (vcmulq_f32): Delete.
7982 (vcmulq_m_f32): Delete.
7983 (vcmulq_m_f16): Delete.
7984 (vcmulq_rot180_m_f32): Delete.
7985 (vcmulq_rot180_m_f16): Delete.
7986 (vcmulq_rot270_m_f32): Delete.
7987 (vcmulq_rot270_m_f16): Delete.
7988 (vcmulq_rot90_m_f32): Delete.
7989 (vcmulq_rot90_m_f16): Delete.
7990 (vcmulq_x_f16): Delete.
7991 (vcmulq_x_f32): Delete.
7992 (vcmulq_rot90_x_f16): Delete.
7993 (vcmulq_rot90_x_f32): Delete.
7994 (vcmulq_rot180_x_f16): Delete.
7995 (vcmulq_rot180_x_f32): Delete.
7996 (vcmulq_rot270_x_f16): Delete.
7997 (vcmulq_rot270_x_f32): Delete.
7998 (__arm_vcmulq_rot90_f16): Delete.
7999 (__arm_vcmulq_rot270_f16): Delete.
8000 (__arm_vcmulq_rot180_f16): Delete.
8001 (__arm_vcmulq_f16): Delete.
8002 (__arm_vcmulq_rot90_f32): Delete.
8003 (__arm_vcmulq_rot270_f32): Delete.
8004 (__arm_vcmulq_rot180_f32): Delete.
8005 (__arm_vcmulq_f32): Delete.
8006 (__arm_vcmulq_m_f32): Delete.
8007 (__arm_vcmulq_m_f16): Delete.
8008 (__arm_vcmulq_rot180_m_f32): Delete.
8009 (__arm_vcmulq_rot180_m_f16): Delete.
8010 (__arm_vcmulq_rot270_m_f32): Delete.
8011 (__arm_vcmulq_rot270_m_f16): Delete.
8012 (__arm_vcmulq_rot90_m_f32): Delete.
8013 (__arm_vcmulq_rot90_m_f16): Delete.
8014 (__arm_vcmulq_x_f16): Delete.
8015 (__arm_vcmulq_x_f32): Delete.
8016 (__arm_vcmulq_rot90_x_f16): Delete.
8017 (__arm_vcmulq_rot90_x_f32): Delete.
8018 (__arm_vcmulq_rot180_x_f16): Delete.
8019 (__arm_vcmulq_rot180_x_f32): Delete.
8020 (__arm_vcmulq_rot270_x_f16): Delete.
8021 (__arm_vcmulq_rot270_x_f32): Delete.
8022 (__arm_vcmulq_rot90): Delete.
8023 (__arm_vcmulq_rot270): Delete.
8024 (__arm_vcmulq_rot180): Delete.
8025 (__arm_vcmulq): Delete.
8026 (__arm_vcmulq_m): Delete.
8027 (__arm_vcmulq_rot180_m): Delete.
8028 (__arm_vcmulq_rot270_m): Delete.
8029 (__arm_vcmulq_rot90_m): Delete.
8030 (__arm_vcmulq_x): Delete.
8031 (__arm_vcmulq_rot90_x): Delete.
8032 (__arm_vcmulq_rot180_x): Delete.
8033 (__arm_vcmulq_rot270_x): Delete.
8035 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
8037 * config/arm/arm_mve_builtins.def (vcmulq_rot90_f)
8038 (vcmulq_rot270_f, vcmulq_rot180_f, vcmulq_f): Add "_f" suffix.
8039 * config/arm/iterators.md (MVE_VCADDQ_VCMULQ)
8040 (MVE_VCADDQ_VCMULQ_M): New.
8041 (mve_insn): Add vcmul.
8042 (rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
8045 (mve_rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
8047 * config/arm/mve.md (mve_vcmulq<mve_rot><mode>): Merge into
8048 @mve_<mve_insn>q<mve_rot>_f<mode>.
8049 (mve_vcmulq_m_f<mode>, mve_vcmulq_rot180_m_f<mode>)
8050 (mve_vcmulq_rot270_m_f<mode>, mve_vcmulq_rot90_m_f<mode>): Merge
8051 into @mve_<mve_insn>q<mve_rot>_m_f<mode>.
8053 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
8055 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90)
8056 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
8057 * config/arm/arm-mve-builtins-base.def (vcaddq_rot90)
8058 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
8059 * config/arm/arm-mve-builtins-base.h: (vcaddq_rot90)
8060 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
8061 * config/arm/arm-mve-builtins-functions.h (class
8062 unspec_mve_function_exact_insn_rot): New.
8063 * config/arm/arm_mve.h (vcaddq_rot90): Delete.
8064 (vcaddq_rot270): Delete.
8065 (vhcaddq_rot90): Delete.
8066 (vhcaddq_rot270): Delete.
8067 (vcaddq_rot270_m): Delete.
8068 (vcaddq_rot90_m): Delete.
8069 (vhcaddq_rot270_m): Delete.
8070 (vhcaddq_rot90_m): Delete.
8071 (vcaddq_rot90_x): Delete.
8072 (vcaddq_rot270_x): Delete.
8073 (vhcaddq_rot90_x): Delete.
8074 (vhcaddq_rot270_x): Delete.
8075 (vcaddq_rot90_u8): Delete.
8076 (vcaddq_rot270_u8): Delete.
8077 (vhcaddq_rot90_s8): Delete.
8078 (vhcaddq_rot270_s8): Delete.
8079 (vcaddq_rot90_s8): Delete.
8080 (vcaddq_rot270_s8): Delete.
8081 (vcaddq_rot90_u16): Delete.
8082 (vcaddq_rot270_u16): Delete.
8083 (vhcaddq_rot90_s16): Delete.
8084 (vhcaddq_rot270_s16): Delete.
8085 (vcaddq_rot90_s16): Delete.
8086 (vcaddq_rot270_s16): Delete.
8087 (vcaddq_rot90_u32): Delete.
8088 (vcaddq_rot270_u32): Delete.
8089 (vhcaddq_rot90_s32): Delete.
8090 (vhcaddq_rot270_s32): Delete.
8091 (vcaddq_rot90_s32): Delete.
8092 (vcaddq_rot270_s32): Delete.
8093 (vcaddq_rot90_f16): Delete.
8094 (vcaddq_rot270_f16): Delete.
8095 (vcaddq_rot90_f32): Delete.
8096 (vcaddq_rot270_f32): Delete.
8097 (vcaddq_rot270_m_s8): Delete.
8098 (vcaddq_rot270_m_s32): Delete.
8099 (vcaddq_rot270_m_s16): Delete.
8100 (vcaddq_rot270_m_u8): Delete.
8101 (vcaddq_rot270_m_u32): Delete.
8102 (vcaddq_rot270_m_u16): Delete.
8103 (vcaddq_rot90_m_s8): Delete.
8104 (vcaddq_rot90_m_s32): Delete.
8105 (vcaddq_rot90_m_s16): Delete.
8106 (vcaddq_rot90_m_u8): Delete.
8107 (vcaddq_rot90_m_u32): Delete.
8108 (vcaddq_rot90_m_u16): Delete.
8109 (vhcaddq_rot270_m_s8): Delete.
8110 (vhcaddq_rot270_m_s32): Delete.
8111 (vhcaddq_rot270_m_s16): Delete.
8112 (vhcaddq_rot90_m_s8): Delete.
8113 (vhcaddq_rot90_m_s32): Delete.
8114 (vhcaddq_rot90_m_s16): Delete.
8115 (vcaddq_rot270_m_f32): Delete.
8116 (vcaddq_rot270_m_f16): Delete.
8117 (vcaddq_rot90_m_f32): Delete.
8118 (vcaddq_rot90_m_f16): Delete.
8119 (vcaddq_rot90_x_s8): Delete.
8120 (vcaddq_rot90_x_s16): Delete.
8121 (vcaddq_rot90_x_s32): Delete.
8122 (vcaddq_rot90_x_u8): Delete.
8123 (vcaddq_rot90_x_u16): Delete.
8124 (vcaddq_rot90_x_u32): Delete.
8125 (vcaddq_rot270_x_s8): Delete.
8126 (vcaddq_rot270_x_s16): Delete.
8127 (vcaddq_rot270_x_s32): Delete.
8128 (vcaddq_rot270_x_u8): Delete.
8129 (vcaddq_rot270_x_u16): Delete.
8130 (vcaddq_rot270_x_u32): Delete.
8131 (vhcaddq_rot90_x_s8): Delete.
8132 (vhcaddq_rot90_x_s16): Delete.
8133 (vhcaddq_rot90_x_s32): Delete.
8134 (vhcaddq_rot270_x_s8): Delete.
8135 (vhcaddq_rot270_x_s16): Delete.
8136 (vhcaddq_rot270_x_s32): Delete.
8137 (vcaddq_rot90_x_f16): Delete.
8138 (vcaddq_rot90_x_f32): Delete.
8139 (vcaddq_rot270_x_f16): Delete.
8140 (vcaddq_rot270_x_f32): Delete.
8141 (__arm_vcaddq_rot90_u8): Delete.
8142 (__arm_vcaddq_rot270_u8): Delete.
8143 (__arm_vhcaddq_rot90_s8): Delete.
8144 (__arm_vhcaddq_rot270_s8): Delete.
8145 (__arm_vcaddq_rot90_s8): Delete.
8146 (__arm_vcaddq_rot270_s8): Delete.
8147 (__arm_vcaddq_rot90_u16): Delete.
8148 (__arm_vcaddq_rot270_u16): Delete.
8149 (__arm_vhcaddq_rot90_s16): Delete.
8150 (__arm_vhcaddq_rot270_s16): Delete.
8151 (__arm_vcaddq_rot90_s16): Delete.
8152 (__arm_vcaddq_rot270_s16): Delete.
8153 (__arm_vcaddq_rot90_u32): Delete.
8154 (__arm_vcaddq_rot270_u32): Delete.
8155 (__arm_vhcaddq_rot90_s32): Delete.
8156 (__arm_vhcaddq_rot270_s32): Delete.
8157 (__arm_vcaddq_rot90_s32): Delete.
8158 (__arm_vcaddq_rot270_s32): Delete.
8159 (__arm_vcaddq_rot270_m_s8): Delete.
8160 (__arm_vcaddq_rot270_m_s32): Delete.
8161 (__arm_vcaddq_rot270_m_s16): Delete.
8162 (__arm_vcaddq_rot270_m_u8): Delete.
8163 (__arm_vcaddq_rot270_m_u32): Delete.
8164 (__arm_vcaddq_rot270_m_u16): Delete.
8165 (__arm_vcaddq_rot90_m_s8): Delete.
8166 (__arm_vcaddq_rot90_m_s32): Delete.
8167 (__arm_vcaddq_rot90_m_s16): Delete.
8168 (__arm_vcaddq_rot90_m_u8): Delete.
8169 (__arm_vcaddq_rot90_m_u32): Delete.
8170 (__arm_vcaddq_rot90_m_u16): Delete.
8171 (__arm_vhcaddq_rot270_m_s8): Delete.
8172 (__arm_vhcaddq_rot270_m_s32): Delete.
8173 (__arm_vhcaddq_rot270_m_s16): Delete.
8174 (__arm_vhcaddq_rot90_m_s8): Delete.
8175 (__arm_vhcaddq_rot90_m_s32): Delete.
8176 (__arm_vhcaddq_rot90_m_s16): Delete.
8177 (__arm_vcaddq_rot90_x_s8): Delete.
8178 (__arm_vcaddq_rot90_x_s16): Delete.
8179 (__arm_vcaddq_rot90_x_s32): Delete.
8180 (__arm_vcaddq_rot90_x_u8): Delete.
8181 (__arm_vcaddq_rot90_x_u16): Delete.
8182 (__arm_vcaddq_rot90_x_u32): Delete.
8183 (__arm_vcaddq_rot270_x_s8): Delete.
8184 (__arm_vcaddq_rot270_x_s16): Delete.
8185 (__arm_vcaddq_rot270_x_s32): Delete.
8186 (__arm_vcaddq_rot270_x_u8): Delete.
8187 (__arm_vcaddq_rot270_x_u16): Delete.
8188 (__arm_vcaddq_rot270_x_u32): Delete.
8189 (__arm_vhcaddq_rot90_x_s8): Delete.
8190 (__arm_vhcaddq_rot90_x_s16): Delete.
8191 (__arm_vhcaddq_rot90_x_s32): Delete.
8192 (__arm_vhcaddq_rot270_x_s8): Delete.
8193 (__arm_vhcaddq_rot270_x_s16): Delete.
8194 (__arm_vhcaddq_rot270_x_s32): Delete.
8195 (__arm_vcaddq_rot90_f16): Delete.
8196 (__arm_vcaddq_rot270_f16): Delete.
8197 (__arm_vcaddq_rot90_f32): Delete.
8198 (__arm_vcaddq_rot270_f32): Delete.
8199 (__arm_vcaddq_rot270_m_f32): Delete.
8200 (__arm_vcaddq_rot270_m_f16): Delete.
8201 (__arm_vcaddq_rot90_m_f32): Delete.
8202 (__arm_vcaddq_rot90_m_f16): Delete.
8203 (__arm_vcaddq_rot90_x_f16): Delete.
8204 (__arm_vcaddq_rot90_x_f32): Delete.
8205 (__arm_vcaddq_rot270_x_f16): Delete.
8206 (__arm_vcaddq_rot270_x_f32): Delete.
8207 (__arm_vcaddq_rot90): Delete.
8208 (__arm_vcaddq_rot270): Delete.
8209 (__arm_vhcaddq_rot90): Delete.
8210 (__arm_vhcaddq_rot270): Delete.
8211 (__arm_vcaddq_rot270_m): Delete.
8212 (__arm_vcaddq_rot90_m): Delete.
8213 (__arm_vhcaddq_rot270_m): Delete.
8214 (__arm_vhcaddq_rot90_m): Delete.
8215 (__arm_vcaddq_rot90_x): Delete.
8216 (__arm_vcaddq_rot270_x): Delete.
8217 (__arm_vhcaddq_rot90_x): Delete.
8218 (__arm_vhcaddq_rot270_x): Delete.
8220 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
8222 * config/arm/arm_mve_builtins.def (vcaddq_rot90_, vcaddq_rot270_)
8223 (vcaddq_rot90_f, vcaddq_rot90_f): Add "_" or "_f" suffix.
8224 * config/arm/iterators.md (mve_insn): Add vcadd, vhcadd.
8225 (isu): Add UNSPEC_VCADD90, UNSPEC_VCADD270, VCADDQ_ROT270_M_U,
8226 VCADDQ_ROT270_M_S, VCADDQ_ROT90_M_U, VCADDQ_ROT90_M_S,
8227 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S, VHCADDQ_ROT90_S,
8229 (rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S, VCADDQ_ROT90_M_U,
8230 VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S, VCADDQ_ROT270_M_U,
8231 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, VHCADDQ_ROT90_M_S,
8233 (mve_rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S,
8234 VCADDQ_ROT90_M_U, VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S,
8235 VCADDQ_ROT270_M_U, VHCADDQ_ROT90_S, VHCADDQ_ROT270_S,
8236 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S.
8237 (supf): Add VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S,
8238 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, UNSPEC_VCADD90,
8240 (VCADDQ_ROT270_M): Delete.
8241 (VCADDQ_M_F VxCADDQ VxCADDQ_M): New.
8242 (VCADDQ_ROT90_M): Delete.
8243 * config/arm/mve.md (mve_vcaddq<mve_rot><mode>)
8244 (mve_vhcaddq_rot270_s<mode>, mve_vhcaddq_rot90_s<mode>): Merge
8246 (@mve_<mve_insn>q<mve_rot>_<supf><mode>): ... this.
8247 (mve_vcaddq<mve_rot><mode>): Rename into ...
8248 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this
8249 (mve_vcaddq_rot270_m_<supf><mode>)
8250 (mve_vcaddq_rot90_m_<supf><mode>, mve_vhcaddq_rot270_m_s<mode>)
8251 (mve_vhcaddq_rot90_m_s<mode>): Merge into ...
8252 (@mve_<mve_insn>q<mve_rot>_m_<supf><mode>): ... this.
8253 (mve_vcaddq_rot270_m_f<mode>, mve_vcaddq_rot90_m_f<mode>): Merge
8255 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
8257 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
8260 * config/i386/i386.md (*bt<mode>_setcqi): Prefer string form
8261 preparation statement over braces for a single statement.
8262 (*bt<mode>_setncqi): Likewise.
8263 (*bt<mode>_setncqi_2): New define_insn_and_split.
8265 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
8267 * config/i386/i386-expand.cc (ix86_expand_move): Generalize special
8268 case inserting of 64-bit values into a TImode register, to handle
8269 both DImode and DFmode using either *insvti_lowpart_1
8270 or *isnvti_highpart_1.
8272 2023-07-14 Uros Bizjak <ubizjak@gmail.com>
8275 * fwprop.cc (contains_paradoxical_subreg_p): Move to ...
8276 * rtlanal.cc (contains_paradoxical_subreg_p): ... here.
8277 * rtlanal.h (contains_paradoxical_subreg_p): Add prototype.
8278 * cprop.cc (try_replace_reg): Do not set REG_EQUAL note
8279 when the original source contains a paradoxical subreg.
8281 2023-07-14 Jan Hubicka <jh@suse.cz>
8283 * passes.cc (execute_function_todo): Remove
8284 TODO_rebuild_frequencies
8285 * passes.def: Add rebuild_frequencies pass.
8286 * predict.cc (estimate_bb_frequencies): Drop
8288 (tree_estimate_probability): Update call of
8289 estimate_bb_frequencies.
8290 (rebuild_frequencies): Turn into a pass; verify CFG profile consistency
8291 first and do not rebuild if not necessary.
8292 (class pass_rebuild_frequencies): New.
8293 (make_pass_rebuild_frequencies): New.
8294 * profile-count.h: Add profile_count::very_large_p.
8295 * tree-inline.cc (optimize_inline_calls): Do not return
8296 TODO_rebuild_frequencies
8297 * tree-pass.h (TODO_rebuild_frequencies): Remove.
8298 (make_pass_rebuild_frequencies): Declare.
8300 2023-07-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8302 * config/riscv/autovec.md (cond_len_fma<mode>): New pattern.
8303 * config/riscv/riscv-protos.h (enum insn_type): New enum.
8304 (expand_cond_len_ternop): New function.
8305 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
8306 (expand_cond_len_ternop): Ditto.
8308 2023-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
8311 * config/bpf/bpf.md: Enable instruction scheduling.
8313 2023-07-14 Tamar Christina <tamar.christina@arm.com>
8315 PR tree-optimization/109154
8316 * tree-if-conv.cc (INCLUDE_ALGORITHM): Include.
8317 (struct bb_predicate): Add no_predicate_stmts.
8318 (set_bb_predicate): Increase predicate count.
8319 (set_bb_predicate_gimplified_stmts): Conditionally initialize
8321 (get_bb_num_predicate_stmts): New.
8322 (init_bb_predicate): Initialzie no_predicate_stmts.
8323 (release_bb_predicate): Cleanup no_predicate_stmts.
8324 (insert_gimplified_predicates): Preserve no_predicate_stmts.
8326 2023-07-14 Tamar Christina <tamar.christina@arm.com>
8328 PR tree-optimization/109154
8329 * tree-if-conv.cc (gen_simplified_condition,
8330 gen_phi_nest_statement): New.
8331 (gen_phi_arg_condition, predicate_scalar_phi): Use it.
8333 2023-07-14 Richard Biener <rguenther@suse.de>
8335 * gimple.h (gimple_phi_arg): New const overload.
8336 (gimple_phi_arg_def): Make gimple arg const.
8337 (gimple_phi_arg_def_from_edge): New inline function.
8338 * tree-phinodes.h (gimple_phi_arg_imm_use_ptr_from_edge):
8340 * tree-ssa-operands.h (PHI_ARG_DEF_FROM_EDGE): Direct to
8341 new inline function.
8342 (PHI_ARG_DEF_PTR_FROM_EDGE): Likewise.
8344 2023-07-14 Monk Chiang <monk.chiang@sifive.com>
8346 * common/config/riscv/riscv-common.cc:
8347 (riscv_implied_info): Add zihintntl item.
8348 (riscv_ext_version_table): Ditto.
8349 (riscv_ext_flag_table): Ditto.
8350 * config/riscv/riscv-opts.h (MASK_ZIHINTNTL): New macro.
8351 (TARGET_ZIHINTNTL): Ditto.
8353 2023-07-14 Die Li <lidie@eswincomputing.com>
8355 * config/riscv/riscv.md: Remove redundant portion in and<mode>3.
8357 2023-07-14 Oleg Endo <olegendo@gcc.gnu.org>
8360 * config/sh/sh.md (peephole2): Handle case where eliminated reg is also
8361 used by the address of the following memory operand.
8363 2023-07-13 Mikael Pettersson <mikpelinux@gmail.com>
8366 * config/pdp11/pdp11.cc (pdp11_expand_epilogue): Also
8367 deallocate alloca-only frame.
8369 2023-07-13 Iain Sandoe <iain@sandoe.co.uk>
8372 * config/darwin.h (DARWIN_PLATFORM_ID): New.
8373 (LINK_COMMAND_A): Use DARWIN_PLATFORM_ID to pass OS, OS version
8374 and SDK data to the static linker.
8376 2023-07-13 Carl Love <cel@us.ibm.com>
8378 * config/rs6000/rs6000-builtins.def (__builtin_set_fpscr_rn): Update
8379 built-in definition return type.
8380 * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Add check,
8381 define __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
8382 * config/rs6000/rs6000.md (rs6000_set_fpscr_rn): Add return
8383 argument to return FPSCR fields.
8384 * doc/extend.texi (__builtin_set_fpscr_rn): Update description for
8385 the return value. Add description for
8386 __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
8388 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
8391 * config/alpha/alpha.cc (alpha_emit_set_long_const):
8392 Always use DImode when constructing long const.
8394 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
8396 * haifa-sched.cc: Change TRUE/FALSE to true/false.
8398 * lra-assigns.cc: Ditto.
8399 * lra-constraints.cc: Ditto.
8400 * sel-sched.cc: Ditto.
8402 2023-07-13 Andrew Pinski <apinski@marvell.com>
8404 PR tree-optimization/110293
8405 PR tree-optimization/110539
8406 * match.pd: Expand the `x != (typeof x)(x == 0)`
8407 pattern to handle where the inner and outer comparsions
8408 are either `!=` or `==` and handle other constants
8411 2023-07-13 Vladimir N. Makarov <vmakarov@redhat.com>
8413 PR middle-end/109520
8414 * lra-int.h (lra_insn_recog_data): Add member asm_reloads_num.
8415 (lra_asm_insn_error): New prototype.
8416 * lra.cc: Include rtl_error.h.
8417 (lra_set_insn_recog_data): Initialize asm_reloads_num.
8418 (lra_asm_insn_error): New func whose code is taken from ...
8419 * lra-assigns.cc (lra_split_hard_reg_for): ... here. Use lra_asm_insn_error.
8420 * lra-constraints.cc (curr_insn_transform): Check reloads nummber for asm.
8422 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8424 * genmatch.cc (commutative_op): Add COND_LEN_*
8425 * internal-fn.cc (first_commutative_argument): Ditto.
8427 (get_unconditional_internal_fn): Ditto.
8428 (can_interpret_as_conditional_op_p): Ditto.
8429 (internal_fn_len_index): Ditto.
8430 * internal-fn.h (can_interpret_as_conditional_op_p): Ditt.
8431 * tree-ssa-math-opts.cc (convert_mult_to_fma_1): Ditto.
8432 (convert_mult_to_fma): Ditto.
8433 (math_opts_dom_walker::after_dom_children): Ditto.
8435 2023-07-13 Pan Li <pan2.li@intel.com>
8437 * config/riscv/riscv.cc (vxrm_rtx): New static var.
8439 (global_state_unknown_p): Removed.
8440 (riscv_entity_mode_after): Removed.
8441 (asm_insn_p): New function.
8442 (vxrm_unknown_p): New function for fixed-point.
8443 (riscv_vxrm_mode_after): Ditto.
8444 (frm_unknown_dynamic_p): New function for floating-point.
8445 (riscv_frm_mode_after): Ditto.
8446 (riscv_mode_after): Leverage new functions.
8448 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
8450 * tree-vect-stmts.cc (vect_model_load_cost): Remove.
8451 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS without
8452 calling vect_model_load_cost.
8454 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
8456 * tree-vect-stmts.cc (vect_model_load_cost): Assert this function only
8457 handle memory_access_type VMAT_CONTIGUOUS, remove some
8458 VMAT_CONTIGUOUS_PERMUTE related handlings.
8459 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS_PERMUTE
8460 without calling vect_model_load_cost.
8462 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
8464 * tree-vect-stmts.cc (vect_model_load_cost): Assert it won't get
8465 VMAT_CONTIGUOUS_REVERSE any more.
8466 (vectorizable_load): Adjust the costing handling on
8467 VMAT_CONTIGUOUS_REVERSE without calling vect_model_load_cost.
8469 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
8471 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
8472 VMAT_LOAD_STORE_LANES without calling vect_model_load_cost.
8473 (vectorizable_load): Remove VMAT_LOAD_STORE_LANES related handling and
8474 assert it will never get VMAT_LOAD_STORE_LANES.
8476 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
8478 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
8479 VMAT_GATHER_SCATTER without calling vect_model_load_cost.
8480 (vect_model_load_cost): Adjut the assertion on VMAT_GATHER_SCATTER,
8481 remove VMAT_GATHER_SCATTER related handlings and the related parameter
8484 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
8486 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling
8487 on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP without calling
8488 vect_model_load_cost.
8489 (vect_model_load_cost): Assert it won't get VMAT_ELEMENTWISE and
8490 VMAT_STRIDED_SLP any more, and remove their related handlings.
8492 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
8494 * tree-vect-stmts.cc (hoist_defs_of_uses): Add one argument HOIST_P.
8495 (vectorizable_load): Adjust the handling on VMAT_INVARIANT to respect
8496 hoisting decision and without calling vect_model_load_cost.
8497 (vect_model_load_cost): Assert it won't get VMAT_INVARIANT any more
8498 and remove VMAT_INVARIANT related handlings.
8500 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
8502 * tree-vect-stmts.cc (vect_build_gather_load_calls): Add the handlings
8503 on costing with one extra argument cost_vec.
8504 (vectorizable_load): Adjust the call to vect_build_gather_load_calls.
8505 (vect_model_load_cost): Assert it won't get VMAT_GATHER_SCATTER with
8506 gs_info.decl set any more.
8508 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
8510 * tree-vect-stmts.cc (vectorizable_load): Move and duplicate the call
8511 to vect_model_load_cost down to some different transform paths
8512 according to the handlings of different vect_memory_access_types.
8514 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
8516 * tree.h (wi::from_mpz): Hide from GENERATOR_FILE.
8518 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8520 * config/riscv/autovec.md
8521 (len_mask_gather_load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New pattern.
8522 (len_mask_gather_load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
8523 (len_mask_gather_load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
8524 (len_mask_gather_load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
8525 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
8526 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
8527 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
8528 (len_mask_gather_load<mode><mode>): Ditto.
8529 (len_mask_scatter_store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
8530 (len_mask_scatter_store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
8531 (len_mask_scatter_store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
8532 (len_mask_scatter_store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
8533 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
8534 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
8535 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
8536 (len_mask_scatter_store<mode><mode>): Ditto.
8537 * config/riscv/predicates.md (const_1_operand): New predicate.
8538 (vector_gs_scale_operand_16): Ditto.
8539 (vector_gs_scale_operand_32): Ditto.
8540 (vector_gs_scale_operand_64): Ditto.
8541 (vector_gs_extension_operand): Ditto.
8542 (vector_gs_scale_operand_16_rv32): Ditto.
8543 (vector_gs_scale_operand_32_rv32): Ditto.
8544 * config/riscv/riscv-protos.h (enum insn_type): Add gather/scatter.
8545 (expand_gather_scatter): New function.
8546 * config/riscv/riscv-v.cc (gen_const_vector_dup): Add gather/scatter.
8547 (emit_vlmax_masked_store_insn): New function.
8548 (emit_nonvlmax_masked_store_insn): Ditto.
8549 (modulo_sel_indices): Ditto.
8550 (expand_vec_perm): Fix SLP for gather/scatter.
8551 (prepare_gather_scatter): New function.
8552 (expand_gather_scatter): Ditto.
8553 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug of
8554 (subreg:SI (DI CONST_POLY_INT)).
8555 * config/riscv/vector-iterators.md: Add gather/scatter.
8556 * config/riscv/vector.md (vec_duplicate<mode>): Use "@" instead.
8557 (@vec_duplicate<mode>): Ditto.
8558 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>):
8560 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
8562 2023-07-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8564 * config/riscv/autovec.md (cond_len_<optab><mode>): New pattern.
8565 * config/riscv/riscv-protos.h (enum insn_type): New enum.
8566 (expand_cond_len_binop): New function.
8567 * config/riscv/riscv-v.cc (emit_nonvlmax_tu_insn): Ditto.
8568 (emit_nonvlmax_fp_tu_insn): Ditto.
8569 (need_fp_rounding_p): Ditto.
8570 (expand_cond_len_binop): Ditto.
8571 * config/riscv/riscv.cc (riscv_preferred_else_value): Ditto.
8572 (TARGET_PREFERRED_ELSE_VALUE): New target hook.
8574 2023-07-12 Jan Hubicka <jh@suse.cz>
8576 * tree-cfg.cc (gimple_duplicate_sese_region): Rename to ...
8577 (gimple_duplicate_seme_region): ... this; break out profile updating
8579 * tree-ssa-loop-ch.cc (update_profile_after_ch): ... here.
8580 (ch_base::copy_headers): Update.
8581 * tree-cfg.h (gimple_duplicate_sese_region): Rename to ...
8582 (gimple_duplicate_seme_region): ... this.
8584 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
8586 PR tree-optimization/107043
8587 * range-op.cc (operator_bitwise_and::op1_range): Update bitmask.
8589 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
8591 PR tree-optimization/107053
8592 * gimple-range-op.cc (cfn_popcount): Use known set bits.
8594 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
8596 * ira.cc (equiv_init_varies_p): Change return type from int to bool
8597 and adjust function body accordingly.
8598 (equiv_init_movable_p): Ditto.
8599 (memref_used_between_p): Ditto.
8600 * lra-constraints.cc (valid_address_p): Ditto.
8602 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
8604 * range-op.cc (irange_to_masked_value): Remove.
8605 (update_known_bitmask): Update irange value/mask pair instead of
8606 only updating nonzero bits.
8608 2023-07-12 Jan Hubicka <jh@suse.cz>
8610 * tree-cfg.cc (gimple_duplicate_sese_region): Add ORIG_ELIMINATED_EDGES
8611 parameter and rewrite profile updating code to handle edges elimination.
8612 * tree-cfg.h (gimple_duplicate_sese_region): Update prototpe.
8613 * tree-ssa-loop-ch.cc (loop_invariant_op_p): New function.
8614 (loop_iv_derived_p): New function.
8615 (should_duplicate_loop_header_p): Track invariant exit edges; fix handling
8616 of PHIs and propagation of IV derived variables.
8617 (ch_base::copy_headers): Pass around the invariant edges hash set.
8619 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
8621 * ifcvt.cc (cond_exec_changed_p): Change variable to bool.
8622 (last_active_insn): Change "skip_use_p" function argument to bool.
8623 (noce_operand_ok): Change return type from int to bool.
8624 (find_cond_trap): Ditto.
8625 (block_jumps_and_fallthru_p): Change "fallthru_p" and
8626 "jump_p" variables to bool.
8627 (noce_find_if_block): Change return type from int to bool.
8628 (cond_exec_find_if_block): Ditto.
8629 (find_if_case_1): Ditto.
8630 (find_if_case_2): Ditto.
8631 (dead_or_predicable): Ditto. Change "reversep" function arg to bool.
8632 (block_jumps_and_fallthru): Rename from block_jumps_and_fallthru_p.
8633 (cond_exec_process_insns): Change return type from int to bool.
8634 Change "mod_ok" function arg to bool.
8635 (cond_exec_process_if_block): Change return type from int to bool.
8636 Change "do_multiple_p" function arg to bool. Change "then_mod_ok"
8638 (noce_emit_store_flag): Change return type from int to bool.
8639 Change "reversep" function arg to bool. Change "cond_complex"
8641 (noce_try_move): Change return type from int to bool.
8642 (noce_try_ifelse_collapse): Ditto.
8643 (noce_try_store_flag): Ditto. Change "reversep" variable to bool.
8644 (noce_try_addcc): Change return type from int to bool. Change
8645 "subtract" variable to bool.
8646 (noce_try_store_flag_constants): Change return type from int to bool.
8647 (noce_try_store_flag_mask): Ditto. Change "reversep" variable to bool.
8648 (noce_try_cmove): Change return type from int to bool.
8649 (noce_try_cmove_arith): Ditto. Change "is_mem" variable to bool.
8650 (noce_try_minmax): Change return type from int to bool. Change
8651 "unsignedp" variable to bool.
8652 (noce_try_abs): Change return type from int to bool. Change
8653 "negate" variable to bool.
8654 (noce_try_sign_mask): Change return type from int to bool.
8655 (noce_try_move): Ditto.
8656 (noce_try_store_flag_constants): Ditto.
8657 (noce_try_cmove): Ditto.
8658 (noce_try_cmove_arith): Ditto.
8659 (noce_try_minmax): Ditto. Change "unsignedp" variable to bool.
8660 (noce_try_bitop): Change return type from int to bool.
8661 (noce_operand_ok): Ditto.
8662 (noce_convert_multiple_sets): Ditto.
8663 (noce_convert_multiple_sets_1): Ditto.
8664 (noce_process_if_block): Ditto.
8665 (check_cond_move_block): Ditto.
8666 (cond_move_process_if_block): Ditto. Change "success_p"
8668 (rest_of_handle_if_conversion): Change return type to void.
8670 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8672 * internal-fn.cc (FOR_EACH_CODE_MAPPING): Adapt for COND_LEN_* support.
8674 (get_conditional_len_internal_fn): New function.
8675 * internal-fn.h (get_conditional_len_internal_fn): Ditto.
8676 * tree-vect-stmts.cc (vectorizable_operation): Adapt for COND_LEN_*
8679 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
8682 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): Typo.
8684 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
8687 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): New
8688 define_insn_and_split derived from *add<dwi>3_doubleword_concat
8689 and *add<dwi>3_doubleword_zext.
8691 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
8694 * config/i386/i386.md (peephole2): Check !reg_mentioned_p when
8695 optimizing rega = 0; rega op= regb for op in [XOR,IOR,PLUS].
8696 (peephole2): Simplify rega = 0; rega op= rega cases.
8698 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
8700 * config/i386/i386-expand.cc (ix86_expand_int_compare): If
8701 testing a TImode SUBREG of a 128-bit vector register against
8702 zero, use a PTEST instruction instead of first moving it to
8703 a pair of scalar registers.
8705 2023-07-12 Robin Dapp <rdapp@ventanamicro.com>
8707 * genopinit.cc (main): Adjust maximal number of optabs and
8709 * gensupport.cc (find_optab): Shift optab by 20 and mode by
8711 * optabs-query.h (optab_handler): Ditto.
8712 (convert_optab_handler): Ditto.
8714 2023-07-12 Richard Biener <rguenther@suse.de>
8716 PR tree-optimization/110630
8717 * tree-vect-slp.cc (vect_add_slp_permutation): New
8718 offset parameter, honor that for the extract code generation.
8719 (vectorizable_slp_permutation_1): Handle offsetted identities.
8721 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8723 * config/riscv/autovec.md (smul<mode>3_highpart): New pattern.
8724 (umul<mode>3_highpart): Ditto.
8726 2023-07-12 Jan Beulich <jbeulich@suse.com>
8728 * config/i386/i386.md (extendbfsf2_1): Add new AVX512F
8729 alternative. Adjust original last alternative's "prefix"
8730 attribute to maybe_evex.
8732 2023-07-12 Jan Beulich <jbeulich@suse.com>
8734 * config/i386/sse.md (vec_dupv4sf): Make first alternative use
8735 vbroadcastss for AVX2. New AVX512F alternative.
8736 (*vec_dupv4si): New AVX2 and AVX512F alternatives using
8737 vpbroadcastd. Replace sselog1 by sseshuf1 in "type" attribute.
8739 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
8741 * config/riscv/peephole.md: Remove XThead* peephole passes.
8742 * config/riscv/thead.md: Include thead-peephole.md.
8743 * config/riscv/thead-peephole.md: New file.
8745 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
8747 * config/riscv/riscv-protos.h (riscv_regno_ok_for_index_p):
8749 (riscv_index_reg_class): Likewise.
8750 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p): New function.
8751 (riscv_index_reg_class): New function.
8752 * config/riscv/riscv.h (INDEX_REG_CLASS): Call new function
8753 riscv_index_reg_class().
8754 (REGNO_OK_FOR_INDEX_P): Call new function
8755 riscv_regno_ok_for_index_p().
8757 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
8759 * config/riscv/riscv-protos.h (enum riscv_address_type):
8760 New location of type definition.
8761 (struct riscv_address_info): Likewise.
8762 * config/riscv/riscv.cc (enum riscv_address_type):
8763 Old location of type definition.
8764 (struct riscv_address_info): Likewise.
8766 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
8768 * config/riscv/riscv.h (Xmode): New macro.
8770 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
8772 * config/riscv/riscv.cc (riscv_print_operand_address): Use
8773 output_addr_const rather than riscv_print_operand.
8775 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
8777 * config/riscv/thead.md: Adjust constraints of th_addsl.
8779 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
8781 * config/riscv/thead.cc (th_mempair_operands_p):
8782 Fix documentation of th_mempair_order_operands().
8784 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
8786 * config/riscv/thead.cc (th_mempair_save_regs):
8787 Emit REG_FRAME_RELATED_EXPR notes in prologue.
8789 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
8791 * config/riscv/riscv.md: No base-ISA extension splitter for XThead*.
8792 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
8793 New XThead extension INSN.
8794 (*zero_extendsidi2_th_extu): New XThead extension INSN.
8795 (*zero_extendhi<GPR:mode>2_th_extu): New XThead extension INSN.
8797 2023-07-12 liuhongt <hongtao.liu@intel.com>
8801 * config/i386/predicates.md
8802 (int_float_vector_all_ones_operand): New predicate.
8803 * config/i386/sse.md (*vmov<mode>_constm1_pternlog_false_dep): New
8805 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
8807 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
8809 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Adjust to
8810 define_insn_and_split to avoid false dependence.
8811 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
8812 (<mask_codefor>one_cmpl<mode>2<mask_name>): Adjust constraint
8813 of operands 1 to '0' to avoid false dependence.
8814 (*andnot<mode>3): Ditto.
8815 (iornot<mode>3): Ditto.
8816 (*<nlogic><mode>3): Ditto.
8818 2023-07-12 Mo, Zewei <zewei.mo@intel.com>
8820 * common/config/i386/cpuinfo.h
8821 (get_intel_cpu): Handle Granite Rapids D.
8822 * common/config/i386/i386-common.cc:
8823 (processor_alias_table): Add graniterapids-d.
8824 * common/config/i386/i386-cpuinfo.h
8825 (enum processor_subtypes): Add INTEL_COREI7_GRANITERAPIDS_D.
8826 * config.gcc: Add -march=graniterapids-d.
8827 * config/i386/driver-i386.cc (host_detect_local_cpu):
8828 Handle graniterapids-d.
8829 * config/i386/i386.h: (PTA_GRANITERAPIDS_D): New.
8830 * doc/extend.texi: Add graniterapids-d.
8831 * doc/invoke.texi: Ditto.
8833 2023-07-12 Haochen Jiang <haochen.jiang@intel.com>
8835 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
8836 Add OPTION_MASK_ISA_AVX512VL.
8837 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
8840 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8842 * config/riscv/riscv-protos.h (enum insn_type): Add vcompress optimization.
8843 * config/riscv/riscv-v.cc (emit_vlmax_compress_insn): Ditto.
8844 (shuffle_compress_patterns): Ditto.
8845 (expand_vec_perm_const_1): Ditto.
8847 2023-07-11 Uros Bizjak <ubizjak@gmail.com>
8849 * cfghooks.cc (verify_flow_info): Change "err" variable to bool.
8850 * cfghooks.h (struct cfg_hooks): Change return type of
8851 verify_flow_info from integer to bool.
8852 * cfgrtl.cc (can_delete_note_p): Change return type from int to bool.
8853 (can_delete_label_p): Ditto.
8854 (rtl_verify_flow_info): Change return type from int to bool
8855 and adjust function body accordingly. Change "err" variable to bool.
8856 (rtl_verify_flow_info_1): Ditto.
8857 (free_bb_for_insn): Change return type to void.
8858 (rtl_merge_blocks): Change "b_empty" variable to bool.
8859 (try_redirect_by_replacing_jump): Change "fallthru" variable to bool.
8860 (verify_hot_cold_block_grouping): Change return type from int to bool.
8861 Change "err" variable to bool.
8862 (rtl_verify_edges): Ditto.
8863 (rtl_verify_bb_insns): Ditto.
8864 (rtl_verify_bb_pointers): Ditto.
8865 (rtl_verify_bb_insn_chain): Ditto.
8866 (rtl_verify_fallthru): Ditto.
8867 (rtl_verify_bb_layout): Ditto.
8868 (purge_all_dead_edges): Change "purged" variable to bool.
8869 * cfgrtl.h (free_bb_for_insn): Change return type from int to void.
8870 * postreload-gcse.cc (expr_hasher::equal): Change "equiv_p" to bool.
8871 (load_killed_in_block_p): Change return type from int to bool
8872 and adjust function body accordingly.
8873 (oprs_unchanged_p): Return true/false.
8874 (rest_of_handle_gcse2): Change return type to void.
8875 * tree-cfg.cc (gimple_verify_flow_info): Change return type from
8876 int to bool. Change "err" variable to bool.
8878 2023-07-11 Gaius Mulley <gaiusmod2@gmail.com>
8880 * doc/gm2.texi (-Wuninit-variable-checking=) New item.
8882 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8884 * doc/md.texi: Add COND_LEN_* operations for loop control with length.
8885 * internal-fn.cc (cond_len_unary_direct): Ditto.
8886 (cond_len_binary_direct): Ditto.
8887 (cond_len_ternary_direct): Ditto.
8888 (expand_cond_len_unary_optab_fn): Ditto.
8889 (expand_cond_len_binary_optab_fn): Ditto.
8890 (expand_cond_len_ternary_optab_fn): Ditto.
8891 (direct_cond_len_unary_optab_supported_p): Ditto.
8892 (direct_cond_len_binary_optab_supported_p): Ditto.
8893 (direct_cond_len_ternary_optab_supported_p): Ditto.
8894 * internal-fn.def (COND_LEN_ADD): Ditto.
8895 (COND_LEN_SUB): Ditto.
8896 (COND_LEN_MUL): Ditto.
8897 (COND_LEN_DIV): Ditto.
8898 (COND_LEN_MOD): Ditto.
8899 (COND_LEN_RDIV): Ditto.
8900 (COND_LEN_MIN): Ditto.
8901 (COND_LEN_MAX): Ditto.
8902 (COND_LEN_FMIN): Ditto.
8903 (COND_LEN_FMAX): Ditto.
8904 (COND_LEN_AND): Ditto.
8905 (COND_LEN_IOR): Ditto.
8906 (COND_LEN_XOR): Ditto.
8907 (COND_LEN_SHL): Ditto.
8908 (COND_LEN_SHR): Ditto.
8909 (COND_LEN_FMA): Ditto.
8910 (COND_LEN_FMS): Ditto.
8911 (COND_LEN_FNMA): Ditto.
8912 (COND_LEN_FNMS): Ditto.
8913 (COND_LEN_NEG): Ditto.
8914 * optabs.def (OPTAB_D): Ditto.
8916 2023-07-11 Richard Biener <rguenther@suse.de>
8918 PR tree-optimization/110614
8919 * tree-vect-data-refs.cc (vect_supportable_dr_alignment):
8920 SLP splats are not suitable for re-align ops.
8922 2023-07-10 Peter Bergner <bergner@linux.ibm.com>
8924 * config/rs6000/predicates.md (quad_memory_operand): Remove redundant
8926 (vsx_quad_dform_memory_operand): Likewise.
8928 2023-07-10 Uros Bizjak <ubizjak@gmail.com>
8930 * reorg.cc (stop_search_p): Change return type from int to bool
8931 and adjust function body accordingly.
8932 (resource_conflicts_p): Ditto.
8933 (insn_references_resource_p): Change return type from int to bool.
8934 (insn_sets_resource_p): Ditto.
8935 (redirect_with_delay_slots_safe_p): Ditto.
8936 (condition_dominates_p): Change return type from int to bool
8937 and adjust function body accordingly.
8938 (redirect_with_delay_list_safe_p): Ditto.
8939 (check_annul_list_true_false): Ditto. Change "annul_true_p"
8940 function argument to bool.
8941 (steal_delay_list_from_target): Change "pannul_p" function
8942 argument to bool pointer. Change "must_annul" and "used_annul"
8943 variables from int to bool.
8944 (steal_delay_list_from_fallthrough): Ditto.
8945 (own_thread_p): Change return type from int to bool and adjust
8946 function body accordingly. Change "allow_fallthrough" function
8948 (reorg_redirect_jump): Change return type from int to bool.
8949 (fill_simple_delay_slots): Change "non_jumps_p" function
8950 argument from int to bool. Change "maybe_never" varible to bool.
8951 (fill_slots_from_thread): Change "likely", "thread_if_true" and
8952 "own_thread" function arguments to bool. Change "lose" and
8953 "must_annul" variables to bool.
8954 (delete_from_delay_slot): Change "had_barrier" variable to bool.
8955 (try_merge_delay_insns): Change "annul_p" variable to bool.
8956 (fill_eager_delay_slots): Change "own_target" and "own_fallthrouhg"
8958 (rest_of_handle_delay_slots): Change return type from int to void
8959 and adjust function body accordingly.
8961 2023-07-10 Kito Cheng <kito.cheng@sifive.com>
8963 * doc/extend.texi (RISC-V Operand Modifiers): New.
8965 2023-07-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8967 * config/riscv/riscv-vsetvl.cc (add_label_notes): Remove it.
8968 (insert_insn_end_basic_block): Ditto.
8969 (pass_vsetvl::commit_vsetvls): Adapt for new helper function.
8970 * gcse.cc (insert_insn_end_basic_block): Export as global function.
8971 * gcse.h (insert_insn_end_basic_block): Ditto.
8973 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
8976 * config/arm/arm-builtins.cc (arm_init_mve_builtins): Handle LTO.
8977 (arm_builtin_decl): Hahndle MVE builtins.
8978 * config/arm/arm-mve-builtins.cc (builtin_decl): New function.
8979 (add_unique_function): Fix handling of
8980 __ARM_MVE_PRESERVE_USER_NAMESPACE.
8981 (add_overloaded_function): Likewise.
8982 * config/arm/arm-protos.h (builtin_decl): New declaration.
8984 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
8986 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Document.
8988 2023-07-10 Xi Ruoyao <xry111@xry111.site>
8990 PR tree-optimization/110557
8991 * tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern):
8992 Ensure the output sign-extended if necessary.
8994 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
8996 * config/i386/i386.md (peephole2): Transform xchg insn with a
8997 REG_UNUSED note to a (simple) move.
8998 (*insvti_lowpart_1): New define_insn_and_split.
8999 (*insvdi_lowpart_1): Likewise.
9001 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
9003 * config/i386/i386-features.cc (compute_convert_gain): Tweak
9004 gains/costs for ROTATE/ROTATERT by integer constant on AVX512VL.
9005 (general_scalar_chain::convert_rotate): On TARGET_AVX512F generate
9006 avx512vl_rolv2di or avx412vl_rolv4si when appropriate.
9008 2023-07-10 liuhongt <hongtao.liu@intel.com>
9011 * config/i386/i386.md (*ieee_max<mode>3_1): New pre_reload
9012 splitter to detect fp max pattern.
9013 (*ieee_min<mode>3_1): Ditto, but for fp min pattern.
9015 2023-07-09 Jan Hubicka <jh@suse.cz>
9017 * cfg.cc (check_bb_profile): Dump counts with relative frequency.
9018 (dump_edge_info): Likewise.
9019 (dump_bb_info): Likewise.
9020 * profile-count.cc (profile_count::dump): Add comma between quality and
9023 2023-07-08 Jan Hubicka <jh@suse.cz>
9025 PR tree-optimization/110600
9026 * cfgloopmanip.cc (scale_loop_profile): Add mising profile_dump check.
9028 2023-07-08 Jan Hubicka <jh@suse.cz>
9030 PR middle-end/110590
9031 * cfgloopmanip.cc (scale_loop_profile): Avoid scaling exits within
9032 inner loops and be more careful about inconsistent profiles.
9033 (duplicate_loop_body_to_header_edge): Fix profile update when eliminated
9034 exit is followed by other exit.
9036 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
9038 * cprop.cc (reg_available_p): Change return type from int to bool.
9039 (reg_not_set_p): Ditto.
9040 (try_replace_reg): Ditto. Change "success" variable to bool.
9041 (cprop_jump): Change return type from int to void
9042 and adjust function body accordingly.
9043 (constprop_register): Ditto.
9044 (cprop_insn): Ditto. Change "changed" variable to bool.
9045 (local_cprop_pass): Change return type from int to void
9046 and adjust function body accordingly.
9047 (bypass_block): Ditto. Change "change", "may_be_loop_header"
9048 and "removed_p" variables to bool.
9049 (bypass_conditional_jumps): Change return type from int to void
9050 and adjust function body accordingly. Change "changed"
9052 (one_cprop_pass): Ditto.
9054 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
9056 * gcse.cc (expr_equiv_p): Change return type from int to bool.
9057 (oprs_unchanged_p): Change return type from int to void
9058 and adjust function body accordingly.
9059 (oprs_anticipatable_p): Ditto.
9060 (oprs_available_p): Ditto.
9061 (insert_expr_in_table): Ditto. Change "antic_p" and "avail_p"
9062 arguments to bool. Change "found" variable to bool.
9063 (load_killed_in_block_p): Change return type from int to void and
9064 adjust function body accordingly. Change "avail_p" argument to bool.
9065 (pre_expr_reaches_here_p): Change return type from int to void
9066 and adjust function body accordingly.
9067 (pre_delete): Ditto. Change "changed" variable to bool.
9068 (pre_gcse): Change return type from int to void
9069 and adjust function body accordingly. Change "did_insert" and
9070 "changed" variables to bool.
9071 (one_pre_gcse_pass): Change return type from int to void
9072 and adjust function body accordingly. Change "changed" variable
9074 (should_hoist_expr_to_dom): Change return type from int to void
9075 and adjust function body accordingly. Change
9076 "visited_allocated_locally" variable to bool.
9077 (hoist_code): Change return type from int to void and adjust
9078 function body accordingly. Change "changed" variable to bool.
9079 (one_code_hoisting_pass): Ditto.
9080 (pre_edge_insert): Change return type from int to void and adjust
9081 function body accordingly. Change "did_insert" variable to bool.
9082 (pre_expr_reaches_here_p_work): Change return type from int to void
9083 and adjust function body accordingly.
9084 (simple_mem): Ditto.
9085 (want_to_gcse_p): Change return type from int to void
9086 and adjust function body accordingly.
9087 (can_assign_to_reg_without_clobbers_p): Update function body
9088 for bool return type.
9089 (hash_scan_set): Change "antic_p" and "avail_p" variables to bool.
9090 (pre_insert_copies): Change "added_copy" variable to bool.
9092 2023-07-08 Jonathan Wakely <jwakely@redhat.com>
9096 * doc/invoke.texi (Warning Options): Fix typos.
9098 2023-07-07 Jan Hubicka <jh@suse.cz>
9100 * profile-count.cc (profile_count::dump): Add FUN
9101 parameter; print relative frequency.
9102 (profile_count::debug): Update.
9103 * profile-count.h (profile_count::dump): Update
9106 2023-07-07 Roger Sayle <roger@nextmovesoftware.com>
9110 * config/i386/i386-expand.cc (ix86_expand_move): Convert SETs of
9111 TImode destinations from paradoxical SUBREGs (setting the lowpart)
9112 into explicit zero extensions. Use *insvti_highpart_1 instruction
9113 to set the highpart of a TImode destination.
9115 2023-07-07 Jan Hubicka <jh@suse.cz>
9117 * predict.cc (force_edge_cold): Use
9118 set_edge_probability_and_rescale_others; improve dumps.
9120 2023-07-07 Jan Hubicka <jh@suse.cz>
9122 * cfgloopmanip.cc (scale_loop_profile): Fix computation of count_in and scaling blocks
9124 * tree-vect-loop-manip.cc (vect_do_peeling): Scale loop profile of the epilogue if bound
9127 2023-07-07 Juergen Christ <jchrist@linux.ibm.com>
9129 * config/s390/s390.cc (vec_init): Fix default case
9131 2023-07-07 Vladimir N. Makarov <vmakarov@redhat.com>
9133 * lra-assigns.cc (assign_by_spills): Add reload insns involving
9134 reload pseudos with non-refined class to be processed on the next
9136 * lra-constraints.cc (enough_allocatable_hard_regs_p): New func.
9137 (in_class_p): Use it.
9138 (print_curr_insn_alt): New func.
9139 (process_alt_operands): Use it. Improve debug info.
9140 (curr_insn_transform): Use print_curr_insn_alt. Refine reload
9141 pseudo class if it is not refined yet.
9143 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
9145 * value-range.cc (irange::get_bitmask_from_range): Return all the
9146 known bits for a singleton.
9147 (irange::set_range_from_bitmask): Set a range of a singleton when
9150 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
9152 * value-range.cc (irange::intersect): Leave normalization to
9155 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
9157 * data-streamer-in.cc (streamer_read_value_range): Adjust for
9159 * data-streamer-out.cc (streamer_write_vrange): Same.
9160 * range-op.cc (operator_cast::fold_range): Same.
9161 * value-range-pretty-print.cc
9162 (vrange_printer::print_irange_bitmasks): Same.
9163 * value-range-storage.cc (irange_storage::write_lengths_address):
9165 (irange_storage::set_irange): Same.
9166 (irange_storage::get_irange): Same.
9167 (irange_storage::size): Same.
9168 (irange_storage::dump): Same.
9169 * value-range-storage.h: Same.
9170 * value-range.cc (debug): New.
9171 (irange_bitmask::dump): New.
9172 (add_vrange): Adjust for value/mask.
9173 (irange::operator=): Same.
9174 (irange::set): Same.
9175 (irange::verify_range): Same.
9176 (irange::operator==): Same.
9177 (irange::contains_p): Same.
9178 (irange::irange_single_pair_union): Same.
9179 (irange::union_): Same.
9180 (irange::intersect): Same.
9181 (irange::invert): Same.
9182 (irange::get_nonzero_bits_from_range): Rename to...
9183 (irange::get_bitmask_from_range): ...this.
9184 (irange::set_range_from_nonzero_bits): Rename to...
9185 (irange::set_range_from_bitmask): ...this.
9186 (irange::set_nonzero_bits): Rename to...
9187 (irange::update_bitmask): ...this.
9188 (irange::get_nonzero_bits): Rename to...
9189 (irange::get_bitmask): ...this.
9190 (irange::intersect_nonzero_bits): Rename to...
9191 (irange::intersect_bitmask): ...this.
9192 (irange::union_nonzero_bits): Rename to...
9193 (irange::union_bitmask): ...this.
9194 (irange_bitmask::verify_mask): New.
9195 * value-range.h (class irange_bitmask): New.
9196 (irange_bitmask::set_unknown): New.
9197 (irange_bitmask::unknown_p): New.
9198 (irange_bitmask::irange_bitmask): New.
9199 (irange_bitmask::get_precision): New.
9200 (irange_bitmask::get_nonzero_bits): New.
9201 (irange_bitmask::set_nonzero_bits): New.
9202 (irange_bitmask::operator==): New.
9203 (irange_bitmask::union_): New.
9204 (irange_bitmask::intersect): New.
9205 (class irange): Friend vrange_printer.
9206 (irange::varying_compatible_p): Adjust for bitmask.
9207 (irange::set_varying): Same.
9208 (irange::set_nonzero): Same.
9210 2023-07-07 Jan Beulich <jbeulich@suse.com>
9212 * config/i386/sse.md (*vec_extractv2ti): Drop g modifiers.
9214 2023-07-07 Jan Beulich <jbeulich@suse.com>
9216 * config/i386/sse.md (@vec_extract_hi_<mode>): Drop last
9217 alternative. Switch new last alternative's "isa" attribute to
9219 (vec_extract_hi_v32qi): Likewise.
9221 2023-07-07 Pan Li <pan2.li@intel.com>
9222 Robin Dapp <rdapp@ventanamicro.com>
9224 * config/riscv/riscv.cc (riscv_emit_mode_set): Avoid emit insn
9226 (riscv_mode_entry): Take FRM_MODE_DYN as entry mode.
9227 (riscv_mode_exit): Likewise for exit mode.
9228 (riscv_mode_needed): Likewise for needed mode.
9229 (riscv_mode_after): Likewise for after mode.
9231 2023-07-07 Pan Li <pan2.li@intel.com>
9233 * config/riscv/vector.md: Fix typo.
9235 2023-07-06 Jan Hubicka <jh@suse.cz>
9238 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Scale loop frequency to maximal number
9239 of iterations determined.
9240 * tree-ssa-loop-ivcanon.cc (try_unroll_loop_completely): Likewise.
9242 2023-07-06 Jan Hubicka <jh@suse.cz>
9244 * cfgloopmanip.cc (scale_loop_profile): Rewrite exit edge
9245 probability update to be safe on loops with subloops.
9246 Make bound parameter to be iteration bound.
9247 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Update call
9248 of scale_loop_profile.
9249 * tree-vect-loop-manip.cc (vect_do_peeling): Likewise.
9251 2023-07-06 Hao Liu OS <hliu@os.amperecomputing.com>
9253 PR tree-optimization/110449
9254 * tree-vect-loop.cc (vectorizable_induction): use vec_n to replace
9255 vec_loop for the unrolled loop.
9257 2023-07-06 Jan Hubicka <jh@suse.cz>
9259 * cfg.cc (set_edge_probability_and_rescale_others): New function.
9260 (update_bb_profile_for_threading): Use it; simplify the rest.
9261 * cfg.h (set_edge_probability_and_rescale_others): Declare.
9262 * profile-count.h (profile_probability::apply_scale): New.
9264 2023-07-06 Claudiu Zissulescu <claziss@gmail.com>
9266 * doc/extend.texi (ARC Built-in Functions): Update documentation
9267 with missing builtins.
9269 2023-07-06 Richard Biener <rguenther@suse.de>
9271 PR tree-optimization/110556
9272 * tree-ssa-tail-merge.cc (gimple_equal_p): Check
9273 assign code and all operands of non-stores.
9275 2023-07-06 Richard Biener <rguenther@suse.de>
9277 PR tree-optimization/110563
9278 * tree-vectorizer.h (vect_determine_partial_vectors_and_peeling):
9279 Remove second argument.
9280 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
9281 Remove for_epilogue_p argument. Merge assert ...
9282 (vect_analyze_loop_2): ... with check done before determining
9283 partial vectors by moving it after.
9284 * tree-vect-loop-manip.cc (vect_do_peeling): Adjust.
9286 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
9288 * ggc-common.cc (gt_pch_note_reorder, gt_pch_save): Tighten up a
9289 few things re 'reorder' option and strings.
9290 * stringpool.cc (gt_pch_p_S): This is now 'gcc_unreachable'.
9292 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
9294 * gengtype-parse.cc: Clean up obsolete parametrized structs
9296 * gengtype.cc: Likewise.
9297 * gengtype.h: Likewise.
9299 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
9301 * gengtype.cc (struct walk_type_data): Remove 'needs_cast_p'.
9304 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
9306 * gengtype-parse.cc (token_names): Add '"user"'.
9307 * gengtype.h (gty_token): Add 'UNUSED_PARAM_IS' for use with
9308 'FIRST_TOKEN_WITH_VALUE'.
9310 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
9312 * doc/gty.texi (GTY Options) <string_length>: Enhance.
9314 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
9316 * gengtype.cc (write_root, write_roots): Explicitly reject
9317 'string_length' option.
9318 * doc/gty.texi (GTY Options) <string_length>: Document.
9320 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
9322 * ggc-internal.h (ggc_pch_count_object, ggc_pch_alloc_object)
9323 (ggc_pch_write_object): Remove 'bool is_string' argument.
9324 * ggc-common.cc: Adjust.
9325 * ggc-page.cc: Likewise.
9327 2023-07-06 Roger Sayle <roger@nextmovesoftware.com>
9329 * dwarf2out.cc (mem_loc_descriptor): Handle COPYSIGN.
9331 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
9333 * doc/extend.texi: Move x86 inlining rule to a new subsubsection
9334 and add description for inling of function with arch and tune
9337 2023-07-06 Richard Biener <rguenther@suse.de>
9339 PR tree-optimization/110515
9340 * tree-ssa-pre.cc (compute_avail): Make code dealing
9341 with hoisting loads with different alias-sets more
9344 2023-07-06 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
9346 * tree-vect-stmts.cc (vect_get_strided_load_store_ops): Fix ICE.
9348 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
9350 * config/i386/i386.cc (ix86_can_inline_p): If callee has
9351 default arch=x86-64 and tune=generic, do not block the
9352 inlining to its caller. Also allow callee with different
9353 arch= to be inlined if it has always_inline attribute and
9354 it's ISA is subset of caller's.
9356 2023-07-06 liuhongt <hongtao.liu@intel.com>
9358 * config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for
9359 DF/SFmode AND/IOR/XOR/ANDN operations.
9361 2023-07-06 Andrew Pinski <apinski@marvell.com>
9363 PR middle-end/110554
9364 * tree-vect-generic.cc (expand_vector_condition): For comparisons,
9365 just build using boolean_type_node instead of the cond_type.
9366 For non-comparisons/non-scalar-bitmask, build a ` != 0` gimple
9367 that will feed into the COND_EXPR.
9369 2023-07-06 liuhongt <hongtao.liu@intel.com>
9372 * config/i386/i386.md (movdf_internal): Disparage slightly for
9373 2 alternatives (r,v) and (v,r) by adding constraint modifier
9376 2023-07-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
9379 * config/rs6000/rs6000.cc (rs6000_expand_vector_extract): Remove redundant
9380 initialization of new_addr.
9382 2023-07-06 Hao Liu <hliu@os.amperecomputing.com>
9384 PR tree-optimization/110474
9385 * tree-vect-loop.cc (vect_analyze_loop_2): unscale the VF by suggested
9386 unroll factor while selecting the epilog vect loop VF.
9388 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
9390 * gimple-range-gori.cc (compute_operand_range): Convert to a tail
9393 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
9395 * gimple-range-gori.cc (compute_operand_range): After calling
9396 compute_operand2_range, recursively call self if needed.
9397 (compute_operand2_range): Turn into a leaf function.
9398 (gori_compute::compute_operand1_and_operand2_range): Finish
9399 operand2 calculation.
9400 * gimple-range-gori.h (compute_operand2_range): Remove name param.
9402 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
9404 * gimple-range-gori.cc (compute_operand_range): After calling
9405 compute_operand1_range, recursively call self if needed.
9406 (compute_operand1_range): Turn into a leaf function.
9407 (gori_compute::compute_operand1_and_operand2_range): Finish
9408 operand1 calculation.
9409 * gimple-range-gori.h (compute_operand1_range): Remove name param.
9411 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
9413 * gimple-range-gori.cc (compute_operand_range): Check for
9414 operand interdependence when both op1 and op2 are computed.
9415 (compute_operand1_and_operand2_range): No checks required now.
9417 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
9419 * gimple-range-gori.cc (compute_operand_range): Check for
9420 a relation between op1 and op2 and use that instead.
9421 (compute_operand1_range): Don't look for a relation override.
9422 (compute_operand2_range): Ditto.
9424 2023-07-05 Jonathan Wakely <jwakely@redhat.com>
9426 * doc/contrib.texi (Contributors): Update my entry.
9428 2023-07-05 Filip Kastl <filip.kastl@gmail.com>
9430 * value-prof.cc (gimple_mod_subtract_transform): Correct edge
9433 2023-07-05 Uros Bizjak <ubizjak@gmail.com>
9435 * sched-int.h (struct haifa_sched_info): Change can_schedule_ready_p,
9436 scehdule_more_p and contributes_to_priority indirect frunction
9437 type from int to bool.
9438 (no_real_insns_p): Change return type from int to bool.
9439 (contributes_to_priority): Ditto.
9440 * haifa-sched.cc (no_real_insns_p): Change return type from
9441 int to bool and adjust function body accordingly.
9442 * modulo-sched.cc (try_scheduling_node_in_cycle): Change "success"
9443 variable type from int to bool.
9444 (ps_insn_advance_column): Change return type from int to bool.
9445 (ps_has_conflicts): Ditto. Change "has_conflicts"
9446 variable type from int to bool.
9447 * sched-deps.cc (deps_may_trap_p): Change return type from int to bool.
9448 (conditions_mutex_p): Ditto.
9449 * sched-ebb.cc (schedule_more_p): Ditto.
9450 (ebb_contributes_to_priority): Change return type from
9451 int to bool and adjust function body accordingly.
9452 * sched-rgn.cc (is_cfg_nonregular): Ditto.
9453 (check_live_1): Ditto.
9455 (find_conditional_protection): Ditto.
9456 (is_conditionally_protected): Ditto.
9458 (is_exception_free): Ditto.
9459 (haifa_find_rgns): Change "unreachable" and "too_large_failure"
9460 variables from int to bool.
9461 (extend_rgns): Change "rescan" variable from int to bool.
9462 (check_live): Change return type from
9463 int to bool and adjust function body accordingly.
9464 (can_schedule_ready_p): Ditto.
9465 (schedule_more_p): Ditto.
9466 (contributes_to_priority): Ditto.
9468 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
9470 * doc/md.texi: Document that vec_set and vec_extract must not
9472 * gimple-isel.cc (gimple_expand_vec_set_expr): Rename this...
9473 (gimple_expand_vec_set_extract_expr): ...to this.
9474 (gimple_expand_vec_exprs): Call renamed function.
9475 * internal-fn.cc (vec_extract_direct): Add.
9476 (expand_vec_extract_optab_fn): New function to expand
9478 (direct_vec_extract_optab_supported_p): Add.
9479 * internal-fn.def (VEC_EXTRACT): Add.
9480 * optabs.cc (can_vec_extract_var_idx_p): New function.
9481 * optabs.h (can_vec_extract_var_idx_p): Declare.
9483 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
9485 * config/riscv/autovec.md: Add gen_lowpart.
9487 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
9489 * config/riscv/autovec.md: Allow register index operand.
9491 2023-07-05 Pan Li <pan2.li@intel.com>
9493 * config/riscv/riscv-vector-builtins.cc
9494 (function_expander::use_exact_insn): Use FRM_DYN instead of const0.
9496 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
9498 * config/riscv/autovec.md: Use float_truncate.
9500 2023-07-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
9502 * internal-fn.cc (internal_fn_len_index): Apply
9503 LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer.
9504 (internal_fn_mask_index): Ditto.
9505 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
9506 (supports_vec_scatter_store_p): Ditto.
9507 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
9508 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
9509 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
9510 (vect_get_strided_load_store_ops): Ditto.
9511 (vectorizable_store): Ditto.
9512 (vectorizable_load): Ditto.
9514 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
9515 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9517 * simplify-rtx.cc (native_encode_rtx): Ditto.
9518 (native_decode_vector_rtx): Ditto.
9519 (simplify_const_vector_byte_offset): Ditto.
9520 (simplify_const_vector_subreg): Ditto.
9521 * tree.cc (build_truth_vector_type_for_mode): Ditto.
9522 * varasm.cc (output_constant_pool_2): Ditto.
9524 2023-07-05 YunQiang Su <yunqiang.su@cipunited.com>
9526 * config/mips/mips.cc (mips_expand_block_move): don't expand for
9527 r6 with -mno-unaligned-access option if one or both of src and
9528 dest are unaligned. restruct: return directly if length is not const.
9529 (mips_block_move_straight): emit_move if ISA_HAS_UNALIGNED_ACCESS.
9531 2023-07-05 Jan Beulich <jbeulich@suse.com>
9534 * config/i386/sse.md: New splitters to simplify
9535 not;vec_duplicate as a singular vpternlog.
9536 (one_cmpl<mode>2): Allow broadcast for operand 1.
9537 (<mask_codefor>one_cmpl<mode>2<mask_name>): Likewise.
9539 2023-07-05 Jan Beulich <jbeulich@suse.com>
9542 * config/i386/sse.md: New splitters to simplify
9543 not;vec_duplicate;{ior,xor} as vec_duplicate;{iornot,xnor}.
9545 2023-07-05 Jan Beulich <jbeulich@suse.com>
9548 * config/i386/sse.md: Permit non-immediate operand 1 in AVX2
9549 form of splitter for PR target/100711.
9551 2023-07-05 Richard Biener <rguenther@suse.de>
9553 PR middle-end/110541
9554 * tree.def (VEC_PERM_EXPR): Adjust documentation to reflect
9557 2023-07-05 Jan Beulich <jbeulich@suse.com>
9560 * config/i386/sse.md (*andnot<mode>3): Add new alternatives
9561 for memory form operand 1.
9563 2023-07-05 Jan Beulich <jbeulich@suse.com>
9566 * config/i386/i386.cc (ix86_rtx_costs): Further special-case
9567 bitwise vector operations.
9568 * config/i386/sse.md (*iornot<mode>3): New insn.
9569 (*xnor<mode>3): Likewise.
9570 (*<nlogic><mode>3): Likewise.
9571 (andor): New code iterator.
9572 (nlogic): New code attribute.
9573 (ternlog_nlogic): Likewise.
9575 2023-07-05 Richard Biener <rguenther@suse.de>
9577 * tree-vect-stmts.cc (vect_mark_relevant): Fix typo.
9579 2023-07-05 yulong <shiyulong@iscas.ac.cn>
9581 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
9583 2023-07-05 yulong <shiyulong@iscas.ac.cn>
9585 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
9586 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
9587 (ADJUST_ALIGNMENT): Ditto.
9588 (RVV_TUPLE_PARTIAL_MODES): Ditto.
9589 (ADJUST_NUNITS): Ditto.
9590 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
9592 (vfloat16mf4x3_t): Ditto.
9593 (vfloat16mf4x4_t): Ditto.
9594 (vfloat16mf4x5_t): Ditto.
9595 (vfloat16mf4x6_t): Ditto.
9596 (vfloat16mf4x7_t): Ditto.
9597 (vfloat16mf4x8_t): Ditto.
9598 (vfloat16mf2x2_t): Ditto.
9599 (vfloat16mf2x3_t): Ditto.
9600 (vfloat16mf2x4_t): Ditto.
9601 (vfloat16mf2x5_t): Ditto.
9602 (vfloat16mf2x6_t): Ditto.
9603 (vfloat16mf2x7_t): Ditto.
9604 (vfloat16mf2x8_t): Ditto.
9605 (vfloat16m1x2_t): Ditto.
9606 (vfloat16m1x3_t): Ditto.
9607 (vfloat16m1x4_t): Ditto.
9608 (vfloat16m1x5_t): Ditto.
9609 (vfloat16m1x6_t): Ditto.
9610 (vfloat16m1x7_t): Ditto.
9611 (vfloat16m1x8_t): Ditto.
9612 (vfloat16m2x2_t): Ditto.
9613 (vfloat16m2x3_t): Ditto.
9614 (vfloat16m2x4_t): Ditto.
9615 (vfloat16m4x2_t): Ditto.
9616 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
9617 (vfloat16mf4x3_t): Ditto.
9618 (vfloat16mf4x4_t): Ditto.
9619 (vfloat16mf4x5_t): Ditto.
9620 (vfloat16mf4x6_t): Ditto.
9621 (vfloat16mf4x7_t): Ditto.
9622 (vfloat16mf4x8_t): Ditto.
9623 (vfloat16mf2x2_t): Ditto.
9624 (vfloat16mf2x3_t): Ditto.
9625 (vfloat16mf2x4_t): Ditto.
9626 (vfloat16mf2x5_t): Ditto.
9627 (vfloat16mf2x6_t): Ditto.
9628 (vfloat16mf2x7_t): Ditto.
9629 (vfloat16mf2x8_t): Ditto.
9630 (vfloat16m1x2_t): Ditto.
9631 (vfloat16m1x3_t): Ditto.
9632 (vfloat16m1x4_t): Ditto.
9633 (vfloat16m1x5_t): Ditto.
9634 (vfloat16m1x6_t): Ditto.
9635 (vfloat16m1x7_t): Ditto.
9636 (vfloat16m1x8_t): Ditto.
9637 (vfloat16m2x2_t): Ditto.
9638 (vfloat16m2x3_t): Ditto.
9639 (vfloat16m2x4_t): Ditto.
9640 (vfloat16m4x2_t): Ditto.
9641 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
9642 * config/riscv/riscv.md: New.
9643 * config/riscv/vector-iterators.md: New.
9645 2023-07-04 Andrew Pinski <apinski@marvell.com>
9647 PR tree-optimization/110487
9648 * match.pd (a !=/== CST1 ? CST2 : CST3): Always
9649 build a nonstandard integer and use that.
9651 2023-07-04 Andrew Pinski <apinski@marvell.com>
9653 * match.pd (a?-1:0): Cast type an integer type
9654 rather the type before the negative.
9657 2023-07-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
9659 * config/xtensa/xtensa.cc (machine_function, xtensa_expand_prologue):
9660 Change to use HARD_REG_BIT and its macros.
9661 * config/xtensa/xtensa.md
9662 (peephole2: regmove elimination during DFmode input reload):
9665 2023-07-04 Richard Biener <rguenther@suse.de>
9667 PR tree-optimization/110491
9668 * tree-ssa-phiopt.cc (match_simplify_replacement): Check
9669 whether the PHI args are possibly undefined before folding
9672 2023-07-04 Pan Li <pan2.li@intel.com>
9673 Thomas Schwinge <thomas@codesourcery.com>
9675 * lto-streamer-in.cc (lto_input_mode_table): Stream in the mode
9676 bits for machine mode table.
9677 * lto-streamer-out.cc (lto_write_mode_table): Stream out the
9678 HOST machine mode bits.
9679 * lto-streamer.h (struct lto_file_decl_data): New fields mode_bits.
9680 * tree-streamer.cc (streamer_mode_table): Take MAX_MACHINE_MODE
9682 * tree-streamer.h (streamer_mode_table): Ditto.
9683 (bp_pack_machine_mode): Take 1 << ceil_log2 (MAX_MACHINE_MODE)
9684 as the packing limit.
9685 (bp_unpack_machine_mode): Ditto with 'file_data->mode_bits'.
9687 2023-07-04 Thomas Schwinge <thomas@codesourcery.com>
9689 * lto-streamer.h (class lto_input_block): Capture
9690 'lto_file_decl_data *file_data' instead of just
9691 'unsigned char *mode_table'.
9692 * ipa-devirt.cc (ipa_odr_read_section): Adjust.
9693 * ipa-fnsummary.cc (inline_read_section): Likewise.
9694 * ipa-icf.cc (sem_item_optimizer::read_section): Likewise.
9695 * ipa-modref.cc (read_section): Likewise.
9696 * ipa-prop.cc (ipa_prop_read_section, read_replacements_section):
9698 * ipa-sra.cc (isra_read_summary_section): Likewise.
9699 * lto-cgraph.cc (input_cgraph_opt_section): Likewise.
9700 * lto-section-in.cc (lto_create_simple_input_block): Likewise.
9701 * lto-streamer-in.cc (lto_read_body_or_constructor)
9702 (lto_input_toplevel_asms): Likewise.
9703 * tree-streamer.h (bp_unpack_machine_mode): Likewise.
9705 2023-07-04 Richard Biener <rguenther@suse.de>
9707 * tree-ssa-phiopt.cc (pass_phiopt::execute): Mark SSA undefs.
9708 (empty_bb_or_one_feeding_into_p): Check for them.
9709 * tree-ssa.h (gimple_uses_undefined_value_p): Remove.
9710 * tree-ssa.cc (gimple_uses_undefined_value_p): Likewise.
9712 2023-07-04 Richard Biener <rguenther@suse.de>
9714 * tree-vect-loop.cc (vect_analyze_loop_costing): Remove
9715 check guarding scalar_niter underflow.
9717 2023-07-04 Hao Liu <hliu@os.amperecomputing.com>
9719 PR tree-optimization/110531
9720 * tree-vect-loop.cc (vect_analyze_loop_1): initialize
9721 slp_done_for_suggested_uf to false.
9723 2023-07-04 Richard Biener <rguenther@suse.de>
9725 PR tree-optimization/110228
9726 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute):
9727 Mark SSA may-undefs.
9728 (bb_no_side_effects_p): Check stmt uses for undefs.
9730 2023-07-04 Richard Biener <rguenther@suse.de>
9732 PR tree-optimization/110436
9733 * tree-vect-stmts.cc (vect_mark_relevant): Expand dumping,
9734 force live but not relevant pattern stmts relevant.
9736 2023-07-04 Lili Cui <lili.cui@intel.com>
9738 * config/i386/i386.h: Add PTA_ENQCMD and PTA_UINTR to PTA_SIERRAFOREST.
9739 * doc/invoke.texi: Update new isa to march=sierraforest and grandridge.
9741 2023-07-04 Richard Biener <rguenther@suse.de>
9743 PR middle-end/110495
9744 * tree.h (TREE_OVERFLOW): Do not mention VECTOR_CSTs
9745 since we do not set TREE_OVERFLOW on those since the
9746 introduction of VL vectors.
9747 * match.pd (x +- CST +- CST): For VECTOR_CST do not look
9748 at TREE_OVERFLOW to determine validity of association.
9750 2023-07-04 Richard Biener <rguenther@suse.de>
9752 PR tree-optimization/110310
9753 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
9754 Move costing part ...
9755 (vect_analyze_loop_costing): ... here. Integrate better
9756 estimate for epilogues from ...
9757 (vect_analyze_loop_2): Call vect_determine_partial_vectors_and_peeling
9758 with actual epilogue status.
9759 * tree-vect-loop-manip.cc (vect_do_peeling): ... here and
9760 avoid cancelling epilogue vectorization.
9761 (vect_update_epilogue_niters): Remove. No longer update
9762 epilogue LOOP_VINFO_NITERS.
9764 2023-07-04 Pan Li <pan2.li@intel.com>
9767 2023-07-03 Pan Li <pan2.li@intel.com>
9769 * config/riscv/vector.md: Fix typo.
9771 2023-07-04 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
9773 * doc/md.texi: Add len_mask_gather_load/len_mask_scatter_store.
9774 * internal-fn.cc (expand_scatter_store_optab_fn): Ditto.
9775 (expand_gather_load_optab_fn): Ditto.
9776 (internal_load_fn_p): Ditto.
9777 (internal_store_fn_p): Ditto.
9778 (internal_gather_scatter_fn_p): Ditto.
9779 (internal_fn_len_index): Ditto.
9780 (internal_fn_mask_index): Ditto.
9781 (internal_fn_stored_value_index): Ditto.
9782 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
9783 (LEN_MASK_SCATTER_STORE): Ditto.
9784 * optabs.def (OPTAB_CD): Ditto.
9786 2023-07-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9788 * config/riscv/riscv-vsetvl.cc
9789 (vector_insn_info::parse_insn): Add early break.
9791 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
9793 * config/cris/cris.md (CRIS_UNSPEC_SWAP_BITS): Remove.
9794 ("cris_swap_bits", "ctzsi2"): Use bitreverse instead.
9796 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
9798 * dwarf2out.cc (mem_loc_descriptor): Handle BITREVERSE.
9800 2023-07-03 Christoph Müllner <christoph.muellner@vrull.eu>
9802 * common/config/riscv/riscv-common.cc: Add support for zvbb,
9803 zvbc, zvkg, zvkned, zvknha, zvknhb, zvksed, zvksh, zvkn,
9804 zvknc, zvkng, zvks, zvksc, zvksg, zvkt and the implied subsets.
9805 * config/riscv/arch-canonicalize: Add canonicalization info for
9806 zvkn, zvknc, zvkng, zvks, zvksc, zvksg.
9807 * config/riscv/riscv-opts.h (MASK_ZVBB): New macro.
9808 (MASK_ZVBC): Likewise.
9809 (TARGET_ZVBB): Likewise.
9810 (TARGET_ZVBC): Likewise.
9811 (MASK_ZVKG): Likewise.
9812 (MASK_ZVKNED): Likewise.
9813 (MASK_ZVKNHA): Likewise.
9814 (MASK_ZVKNHB): Likewise.
9815 (MASK_ZVKSED): Likewise.
9816 (MASK_ZVKSH): Likewise.
9817 (MASK_ZVKN): Likewise.
9818 (MASK_ZVKNC): Likewise.
9819 (MASK_ZVKNG): Likewise.
9820 (MASK_ZVKS): Likewise.
9821 (MASK_ZVKSC): Likewise.
9822 (MASK_ZVKSG): Likewise.
9823 (MASK_ZVKT): Likewise.
9824 (TARGET_ZVKG): Likewise.
9825 (TARGET_ZVKNED): Likewise.
9826 (TARGET_ZVKNHA): Likewise.
9827 (TARGET_ZVKNHB): Likewise.
9828 (TARGET_ZVKSED): Likewise.
9829 (TARGET_ZVKSH): Likewise.
9830 (TARGET_ZVKN): Likewise.
9831 (TARGET_ZVKNC): Likewise.
9832 (TARGET_ZVKNG): Likewise.
9833 (TARGET_ZVKS): Likewise.
9834 (TARGET_ZVKSC): Likewise.
9835 (TARGET_ZVKSG): Likewise.
9836 (TARGET_ZVKT): Likewise.
9837 * config/riscv/riscv.opt: Introduction of riscv_zv{b,k}_subext.
9839 2023-07-03 Andrew Pinski <apinski@marvell.com>
9841 PR middle-end/110510
9842 * except.h (struct eh_landing_pad_d): Add chain_next GTY.
9844 2023-07-03 Iain Sandoe <iain@sandoe.co.uk>
9846 * config/darwin.h: Avoid duplicate multiply_defined specs on
9847 earlier Darwin versions with shared libgcc.
9849 2023-07-03 Uros Bizjak <ubizjak@gmail.com>
9851 * tree.h (tree_int_cst_equal): Change return type from int to bool.
9852 (operand_equal_for_phi_arg_p): Ditto.
9853 (tree_map_base_marked_p): Ditto.
9854 * tree.cc (contains_placeholder_p): Update function body
9855 for bool return type.
9856 (type_cache_hasher::equal): Ditto.
9857 (tree_map_base_hash): Change return type
9858 from int to void and adjust function body accordingly.
9859 (tree_int_cst_equal): Ditto.
9860 (operand_equal_for_phi_arg_p): Ditto.
9861 (get_narrower): Change "first" variable to bool.
9862 (cl_option_hasher::equal): Update function body for bool return type.
9863 * ggc.h (ggc_set_mark): Change return type from int to bool.
9864 (ggc_marked_p): Ditto.
9865 * ggc-page.cc (gt_ggc_mx): Change return type
9866 from int to void and adjust function body accordingly.
9867 (ggc_set_mark): Ditto.
9869 2023-07-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
9871 * config/riscv/autovec.md: Change order of
9872 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
9873 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
9874 * doc/md.texi: Ditto.
9875 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Ditto.
9876 * internal-fn.cc (len_maskload_direct): Ditto.
9877 (len_maskstore_direct): Ditto.
9878 (add_len_and_mask_args): New function.
9879 (expand_partial_load_optab_fn): Change order of
9880 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
9881 (expand_partial_store_optab_fn): Ditto.
9882 (internal_fn_len_index): New function.
9883 (internal_fn_mask_index): Change order of
9884 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
9885 (internal_fn_stored_value_index): Ditto.
9886 (internal_len_load_store_bias): Ditto.
9887 * internal-fn.h (internal_fn_len_index): New function.
9888 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Change order of
9889 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
9890 * tree-vect-stmts.cc (vectorizable_store): Ditto.
9891 (vectorizable_load): Ditto.
9893 2023-07-03 Gaius Mulley <gaiusmod2@gmail.com>
9896 * doc/gm2.texi (Semantic checking): Include examples using
9897 -Wuninit-variable-checking.
9899 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9901 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
9902 (*single_widen_fnma<mode>): Ditto.
9903 (*double_widen_fms<mode>): Ditto.
9904 (*single_widen_fms<mode>): Ditto.
9905 (*double_widen_fnms<mode>): Ditto.
9906 (*single_widen_fnms<mode>): Ditto.
9908 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9910 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>): Change "@"
9911 into "*" in pattern name which simplifies build files.
9912 (*pred_single_widen_mul<any_extend:su><mode>): Ditto.
9913 (*pred_single_widen_mul<mode>): New pattern.
9915 2023-07-03 Richard Sandiford <richard.sandiford@arm.com>
9917 * config/aarch64/aarch64-simd.md (vec_extract<mode><Vhalf>): Expect
9918 the index to be 0 or 1.
9920 2023-07-03 Lehua Ding <lehua.ding@rivai.ai>
9923 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9925 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
9926 (*single_widen_fnma<mode>): Ditto.
9927 (*double_widen_fms<mode>): Ditto.
9928 (*single_widen_fms<mode>): Ditto.
9929 (*double_widen_fnms<mode>): Ditto.
9930 (*single_widen_fnms<mode>): Ditto.
9932 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9934 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
9935 (*single_widen_fnma<mode>): Ditto.
9936 (*double_widen_fms<mode>): Ditto.
9937 (*single_widen_fms<mode>): Ditto.
9938 (*double_widen_fnms<mode>): Ditto.
9939 (*single_widen_fnms<mode>): Ditto.
9941 2023-07-03 Pan Li <pan2.li@intel.com>
9943 * config/riscv/vector.md: Fix typo.
9945 2023-07-03 Richard Biener <rguenther@suse.de>
9947 PR tree-optimization/110506
9948 * tree-vect-patterns.cc (vect_recog_rotate_pattern): Re-order
9949 TYPE_PRECISION access with INTEGRAL_TYPE_P check.
9951 2023-07-03 Richard Biener <rguenther@suse.de>
9953 PR tree-optimization/110506
9954 * tree-ssa-ccp.cc (get_value_for_expr): Check for integral
9955 type before relying on TYPE_PRECISION to produce a nonzero mask.
9957 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
9959 * config/mips/mips.md(*and<mode>3_mips16): Generates
9960 ZEB/ZEH instructions.
9962 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
9964 * config/mips/mips.cc(mips_9bit_offset_address_p): Restrict the
9965 address register to M16_REGS for MIPS16.
9966 (BUILTIN_AVAIL_MIPS16E2): Defined a new macro.
9967 (AVAIL_MIPS16E2_OR_NON_MIPS16): Same as above.
9968 (AVAIL_NON_MIPS16 (cache..)): Update to
9969 AVAIL_MIPS16E2_OR_NON_MIPS16.
9970 * config/mips/mips.h (ISA_HAS_CACHE): Add clause for ISA_HAS_MIPS16E2.
9971 * config/mips/mips.md (mips_cache): Mark as extended MIPS16.
9973 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
9975 * config/mips/mips.h(ISA_HAS_9BIT_DISPLACEMENT): Add clause
9976 for ISA_HAS_MIPS16E2.
9977 (ISA_HAS_SYNC): Same as above.
9978 (ISA_HAS_LL_SC): Same as above.
9980 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
9982 * config/mips/mips.cc(mips_expand_ins_as_unaligned_store):
9983 Add logics for generating instruction.
9984 * config/mips/mips.h(ISA_HAS_LWL_LWR): Add clause for ISA_HAS_MIPS16E2.
9985 * config/mips/mips.md(mov_<load>l): Generates instructions.
9986 (mov_<load>r): Same as above.
9987 (mov_<store>l): Adjusted for the conditions above.
9988 (mov_<store>r): Same as above.
9989 (mov_<store>l_mips16e2): Add machine description for `define_insn mov_<store>l_mips16e2`.
9990 (mov_<store>r_mips16e2): Add machine description for `define_insn mov_<store>r_mips16e2`.
9992 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
9994 * config/mips/mips.cc(mips_symbol_insns_1): Generates LUI instruction.
9995 (mips_const_insns): Same as above.
9996 (mips_output_move): Same as above.
9997 (mips_output_function_prologue): Same as above.
9998 * config/mips/mips.md: Same as above
10000 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
10002 * config/mips/constraints.md(Yz): New constraints for mips16e2.
10003 * config/mips/mips-protos.h(mips_bit_clear_p): Declared new function.
10004 (mips_bit_clear_info): Same as above.
10005 * config/mips/mips.cc(mips_bit_clear_info): New function for
10006 generating instructions.
10007 (mips_bit_clear_p): Same as above.
10008 * config/mips/mips.h(ISA_HAS_EXT_INS): Add clause for ISA_HAS_MIPS16E2.
10009 * config/mips/mips.md(extended_mips16): Generates EXT and INS instructions.
10010 (*and<mode>3): Generates INS instruction.
10011 (*and<mode>3_mips16): Generates EXT, INS and ANDI instructions.
10012 (ior<mode>3): Add logics for ORI instruction.
10013 (*ior<mode>3_mips16_asmacro): Generates ORI instrucion.
10014 (*ior<mode>3_mips16): Add logics for XORI instruction.
10015 (*xor<mode>3_mips16): Generates XORI instrucion.
10016 (*extzv<mode>): Add logics for EXT instruction.
10017 (*insv<mode>): Add logics for INS instruction.
10018 * config/mips/predicates.md(bit_clear_operand): New predicate for
10019 generating bitwise instructions.
10020 (and_reg_operand): Add logics for generating bitwise instructions.
10022 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
10024 * config/mips/mips.cc(mips_regno_mode_ok_for_base_p): Generate instructions
10025 that uses global pointer register.
10026 (mips16_unextended_reference_p): Same as above.
10027 (mips_pic_base_register): Same as above.
10028 (mips_init_relocs): Same as above.
10029 * config/mips/mips.h(MIPS16_GP_LOADS): Defined a new macro.
10030 (GLOBAL_POINTER_REGNUM): Moved to machine description `mips.md`.
10031 * config/mips/mips.md(GLOBAL_POINTER_REGNUM): Moved to here from above.
10032 (*lowsi_mips16_gp):New `define_insn *low<mode>_mips16`.
10034 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
10036 * config/mips/mips.h(ISA_HAS_CONDMOVE): Add condition for ISA_HAS_MIPS16E2.
10037 * config/mips/mips.md(*mov<GPR:mode>_on_<MOVECC:mode>): Add logics for MOVx insts.
10038 (*mov<GPR:mode>_on_<MOVECC:mode>_mips16e2): Generate MOVx instruction.
10039 (*mov<GPR:mode>_on_<GPR2:mode>_ne): Add logics for MOVx insts.
10040 (*mov<GPR:mode>_on_<GPR2:mode>_ne_mips16e2): Generate MOVx instruction.
10041 * config/mips/predicates.md(reg_or_0_operand_mips16e2): New predicate for MOVx insts.
10043 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
10045 * config/mips/mips.cc(mips_file_start): Add mips16e2 info
10047 * config/mips/mips.h(__mips_mips16e2): Defined a new
10049 (ISA_HAS_MIPS16E2): Defined a new macro.
10050 (ASM_SPEC): Pass mmips16e2 to the assembler.
10051 * config/mips/mips.opt: Add -m(no-)mips16e2 option.
10052 * config/mips/predicates.md: Add clause for TARGET_MIPS16E2.
10053 * doc/invoke.texi: Add -m(no-)mips16e2 option..
10055 2023-07-02 Jakub Jelinek <jakub@redhat.com>
10057 PR tree-optimization/110508
10058 * tree-ssa-math-opts.cc (match_uaddc_usubc): Only replace re2 with
10059 REALPART_EXPR opf nlhs if re2 is non-NULL.
10061 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
10063 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
10065 * config/xtensa/xtensa.md (*xtensa_clamps):
10066 Add TARGET_MINMAX to the condition.
10068 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
10070 * config/xtensa/xtensa.md (*eqne_INT_MIN):
10071 Add missing ":SI" to the match_operator.
10073 2023-07-02 Iain Sandoe <iain@sandoe.co.uk>
10076 * config/darwin.opt: Add fconstant-cfstrings alias to
10077 mconstant-cfstrings.
10078 * doc/invoke.texi: Amend invocation descriptions to reflect
10079 that the fconstant-cfstrings is a target-option alias and to
10080 add the missing mconstant-cfstrings option description to the
10083 2023-07-01 Jan Hubicka <jh@suse.cz>
10085 * tree-cfg.cc (gimple_duplicate_sese_region): Add elliminated_edge
10086 parmaeter; update profile.
10087 * tree-cfg.h (gimple_duplicate_sese_region): Update prototype.
10088 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Rename to ...
10089 (static_loop_exit): ... this; return the edge to be elliminated.
10090 (ch_base::copy_headers): Handle profile updating for eliminated exits.
10092 2023-07-01 Roger Sayle <roger@nextmovesoftware.com>
10094 * config/i386/i386-features.cc (compute_convert_gain): Provide
10095 gains/costs for ROTATE and ROTATERT (by an integer constant).
10096 (general_scalar_chain::convert_rotate): New helper function to
10097 convert a DImode or SImode rotation by an integer constant into
10099 (general_scalar_chain::convert_insn): Call the new convert_rotate
10100 for ROTATE and ROTATERT.
10101 (general_scalar_to_vector_candidate_p): Consider ROTATE and
10102 ROTATERT to be candidates if the second operand is an integer
10103 constant, valid for a rotation (or shift) in the given mode.
10104 * config/i386/i386-features.h (general_scalar_chain): Add new
10105 helper method convert_rotate.
10107 2023-07-01 Jan Hubicka <jh@suse.cz>
10109 PR tree-optimization/103680
10110 * cfg.cc (update_bb_profile_for_threading): Fix profile update;
10111 make message clearer.
10113 2023-06-30 Qing Zhao <qing.zhao@oracle.com>
10115 PR tree-optimization/101832
10116 * tree-object-size.cc (addr_object_size): Handle structure/union type
10117 when it has flexible size.
10119 2023-06-30 Eric Botcazou <ebotcazou@adacore.com>
10121 * gimple-fold.cc (fold_array_ctor_reference): Fix head comment.
10122 (fold_nonarray_ctor_reference): Likewise. Specifically deal
10123 with integral bit-fields.
10124 (fold_ctor_reference): Make sure that the constructor uses the
10125 native storage order.
10127 2023-06-30 Jan Hubicka <jh@suse.cz>
10129 PR middle-end/109849
10130 * predict.cc (estimate_bb_frequencies): Turn to static function.
10131 (expr_expected_value_1): Fix handling of binary expressions with
10133 * predict.def (PRED_MALLOC_NONNULL): Move later in the priority queue.
10134 (PRED_BUILTIN_EXPECT_WITH_PROBABILITY): Move to almost top of the priority
10136 * predict.h (estimate_bb_frequencies): No longer declare it.
10138 2023-06-30 Uros Bizjak <ubizjak@gmail.com>
10140 * fold-const.h (multiple_of_p): Change return type from int to bool.
10141 * fold-const.cc (split_tree): Change negl_p, neg_litp_p,
10142 neg_conp_p and neg_var_p variables to bool.
10143 (const_binop): Change sat_p variable to bool.
10144 (merge_ranges): Change no_overlap variable to bool.
10145 (extract_muldiv_1): Change same_p variable to bool.
10146 (tree_swap_operands_p): Update function body for bool return type.
10147 (fold_truth_andor): Change commutative variable to bool.
10148 (multiple_of_p): Change return type
10149 from int to void and adjust function body accordingly.
10150 * optabs.h (expand_twoval_unop): Change return type from int to bool.
10151 (expand_twoval_binop): Ditto.
10152 (can_compare_p): Ditto.
10153 (have_add2_insn): Ditto.
10154 (have_addptr3_insn): Ditto.
10155 (have_sub2_insn): Ditto.
10156 (have_insn_for): Ditto.
10157 * optabs.cc (add_equal_note): Ditto.
10158 (widen_operand): Change no_extend argument from int to bool.
10159 (expand_binop): Ditto.
10160 (expand_twoval_unop): Change return type
10161 from int to void and adjust function body accordingly.
10162 (expand_twoval_binop): Ditto.
10163 (can_compare_p): Ditto.
10164 (have_add2_insn): Ditto.
10165 (have_addptr3_insn): Ditto.
10166 (have_sub2_insn): Ditto.
10167 (have_insn_for): Ditto.
10169 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
10171 * config/aarch64/aarch64-simd.md
10172 (vec_widen_<su>abdl_lo_<mode>, vec_widen_<su>abdl_hi_<mode>):
10173 Expansions for abd vec widen optabs.
10174 (aarch64_<su>abdl<mode>_insn): VQW based abdl RTL.
10175 * config/aarch64/iterators.md (USMAX_EXT): Code attributes
10176 that give the appropriate extend RTL for the max RTL.
10178 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
10180 * internal-fn.def (VEC_WIDEN_ABD): New internal hilo optab.
10181 * optabs.def (vec_widen_sabd_optab,
10182 vec_widen_sabd_hi_optab, vec_widen_sabd_lo_optab,
10183 vec_widen_sabd_odd_even, vec_widen_sabd_even_optab,
10184 vec_widen_uabd_optab,
10185 vec_widen_uabd_hi_optab, vec_widen_uabd_lo_optab,
10186 vec_widen_uabd_odd_even, vec_widen_uabd_even_optab):
10188 * doc/md.texi: Document them.
10189 * tree-vect-patterns.cc (vect_recog_abd_pattern): Update to
10190 to build a VEC_WIDEN_ABD call if the input precision is smaller
10191 than the precision of the output.
10192 (vect_recog_widen_abd_pattern): Should an ABD expression be
10193 found preceeding an extension, replace the two with a
10196 2023-06-30 Pan Li <pan2.li@intel.com>
10198 * config/riscv/vector.md: Refactor the common condition.
10200 2023-06-30 Richard Biener <rguenther@suse.de>
10202 PR tree-optimization/110496
10203 * gimple-ssa-store-merging.cc (find_bswap_or_nop_1): Re-order
10204 verifying and TYPE_PRECISION query for the BIT_FIELD_REF case.
10206 2023-06-30 Richard Biener <rguenther@suse.de>
10208 PR middle-end/110489
10209 * statistics.cc (curr_statistics_hash): Add argument
10210 indicating whether we should allocate the hash.
10211 (statistics_fini_pass): If the hash isn't allocated
10212 only print the summary header.
10214 2023-06-30 Segher Boessenkool <segher@kernel.crashing.org>
10215 Thomas Schwinge <thomas@codesourcery.com>
10217 * config/nvptx/nvptx.cc (TARGET_LRA_P): Remove.
10219 2023-06-30 Jovan Dmitrović <jovan.dmitrovic@syrmia.com>
10222 * config/mips/mips.cc (mips_function_arg_alignment): Returns
10223 the alignment of function argument. In case of typedef type,
10224 it returns the aligment of the aliased type.
10225 (mips_function_arg_boundary): Relocated calculation of the
10226 aligment of function arguments.
10228 2023-06-29 Jan Hubicka <jh@suse.cz>
10230 PR tree-optimization/109849
10231 * ipa-fnsummary.cc (decompose_param_expr): Skip
10232 functions returning its parameter.
10233 (set_cond_stmt_execution_predicate): Return early
10234 if predicate was constructed.
10236 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
10239 * doc/extend.texi: Document GCC extension on a structure containing
10240 a flexible array member to be a member of another structure.
10242 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
10244 * print-tree.cc (print_node): Print new bit type_include_flexarray.
10245 * tree-core.h (struct tree_type_common): Use bit no_named_args_stdarg_p
10246 as type_include_flexarray for RECORD_TYPE or UNION_TYPE.
10247 * tree-streamer-in.cc (unpack_ts_type_common_value_fields): Stream
10248 in bit no_named_args_stdarg_p properly for its corresponding type.
10249 * tree-streamer-out.cc (pack_ts_type_common_value_fields): Stream
10250 out bit no_named_args_stdarg_p properly for its corresponding type.
10251 * tree.h (TYPE_INCLUDES_FLEXARRAY): New macro TYPE_INCLUDES_FLEXARRAY.
10253 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
10255 * tree-vrp.cc (maybe_set_nonzero_bits): Move from here...
10256 * tree-ssa-dom.cc (maybe_set_nonzero_bits): ...to here.
10257 * tree-vrp.h (maybe_set_nonzero_bits): Remove.
10259 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
10261 * value-range.cc (frange::set): Do not call verify_range.
10262 (frange::normalize_kind): Verify range.
10263 (frange::union_nans): Do not call verify_range.
10264 (frange::union_): Same.
10265 (frange::intersect): Same.
10266 (irange::irange_single_pair_union): Call normalize_kind if
10268 (irange::union_): Same.
10269 (irange::intersect): Same.
10270 (irange::set_range_from_nonzero_bits): Verify range.
10271 (irange::set_nonzero_bits): Call normalize_kind if necessary.
10272 (irange::get_nonzero_bits): Tweak comment.
10273 (irange::intersect_nonzero_bits): Call normalize_kind if
10275 (irange::union_nonzero_bits): Same.
10276 * value-range.h (irange::normalize_kind): Verify range.
10278 2023-06-29 Uros Bizjak <ubizjak@gmail.com>
10280 * cselib.h (rtx_equal_for_cselib_1):
10281 Change return type from int to bool.
10282 (references_value_p): Ditto.
10283 (rtx_equal_for_cselib_p): Ditto.
10284 * expr.h (can_store_by_pieces): Ditto.
10285 (try_casesi): Ditto.
10286 (try_tablejump): Ditto.
10287 (safe_from_p): Ditto.
10288 * sbitmap.h (bitmap_equal_p): Ditto.
10289 * cselib.cc (references_value_p): Change return type
10290 from int to void and adjust function body accordingly.
10291 (rtx_equal_for_cselib_1): Ditto.
10292 * expr.cc (is_aligning_offset): Ditto.
10293 (can_store_by_pieces): Ditto.
10294 (mostly_zeros_p): Ditto.
10295 (all_zeros_p): Ditto.
10296 (safe_from_p): Ditto.
10297 (is_aligning_offset): Ditto.
10298 (try_casesi): Ditto.
10299 (try_tablejump): Ditto.
10300 (store_constructor): Change "need_to_clear" and
10301 "const_bounds_p" variables to bool.
10302 * sbitmap.cc (bitmap_equal_p): Change return type from int to bool.
10304 2023-06-29 Robin Dapp <rdapp@ventanamicro.com>
10306 * tree-ssa-math-opts.cc (divmod_candidate_p): Use
10309 2023-06-29 Richard Biener <rguenther@suse.de>
10311 PR tree-optimization/110460
10312 * tree-vect-stmts.cc (get_related_vectype_for_scalar_type):
10313 Only allow integral, pointer and scalar float type scalar_type.
10315 2023-06-29 Lili Cui <lili.cui@intel.com>
10317 PR tree-optimization/110148
10318 * tree-ssa-reassoc.cc (rewrite_expr_tree_parallel): Handle loop-carried
10319 ops in this function.
10321 2023-06-29 Richard Biener <rguenther@suse.de>
10323 PR middle-end/110452
10324 * expr.cc (store_constructor): Handle uniform boolean
10325 vectors with integer mode specially.
10327 2023-06-29 Richard Biener <rguenther@suse.de>
10329 PR middle-end/110461
10330 * match.pd (bitop (convert@2 @0) (convert?@3 @1)): Disable
10333 2023-06-29 Richard Sandiford <richard.sandiford@arm.com>
10335 * vec.h (gt_pch_nx): Add overloads for va_gc_atomic.
10336 (array_slice): Relax va_gc constructor to handle all vectors
10337 with a vl_embed layout.
10339 2023-06-29 Pan Li <pan2.li@intel.com>
10341 * config/riscv/riscv.cc (riscv_emit_mode_set): Add emit for FRM.
10342 (riscv_mode_needed): Likewise.
10343 (riscv_entity_mode_after): Likewise.
10344 (riscv_mode_after): Likewise.
10345 (riscv_mode_entry): Likewise.
10346 (riscv_mode_exit): Likewise.
10347 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Add number
10349 * config/riscv/riscv.md: Add FRM register.
10350 * config/riscv/vector-iterators.md: Add FRM type.
10351 * config/riscv/vector.md (frm_mode): Define new attr for FRM mode.
10352 (fsrm): Define new insn for fsrm instruction.
10354 2023-06-29 Pan Li <pan2.li@intel.com>
10356 * config/riscv/riscv-protos.h (enum floating_point_rounding_mode):
10357 Add macro for static frm min and max.
10358 * config/riscv/riscv-vector-builtins-bases.cc
10359 (class binop_frm): New class for floating-point with frm.
10360 (BASE): Add vfadd for frm.
10361 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
10362 * config/riscv/riscv-vector-builtins-functions.def
10363 (vfadd_frm): Likewise.
10364 * config/riscv/riscv-vector-builtins-shapes.cc
10365 (struct alu_frm_def): New struct for alu with frm.
10366 (SHAPE): Add alu with frm.
10367 * config/riscv/riscv-vector-builtins-shapes.h: Likewise.
10368 * config/riscv/riscv-vector-builtins.cc
10369 (function_checker::report_out_of_range_and_not): New function
10370 for report out of range and not val.
10371 (function_checker::require_immediate_range_or): New function
10372 for checking in range or one val.
10373 * config/riscv/riscv-vector-builtins.h: Add function decl.
10375 2023-06-29 Cui, Lili <lili.cui@intel.com>
10377 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8
10378 from Rocketlake, move model value 0xbf from Alderlake to Raptorlake.
10380 2023-06-28 Hans-Peter Nilsson <hp@axis.com>
10383 * config/cris/cris.cc (cris_postdbr_cmpelim): Don't apply PATTERN
10384 to insn before validating it.
10386 2023-06-28 Jan Hubicka <jh@suse.cz>
10388 PR middle-end/110334
10389 * ipa-fnsummary.h (ipa_fn_summary): Add
10390 safe_to_inline_to_always_inline.
10391 * ipa-inline.cc (can_early_inline_edge_p): ICE
10392 if SSA is not built; do cycle checking for
10393 always_inline functions.
10394 (inline_always_inline_functions): Be recrusive;
10395 watch for cycles; do not updat overall summary.
10396 (early_inliner): Do not give up on always_inlines.
10397 * ipa-utils.cc (ipa_reverse_postorder): Do not skip
10400 2023-06-28 Uros Bizjak <ubizjak@gmail.com>
10402 * output.h (leaf_function_p): Change return type from int to bool.
10403 (final_forward_branch_p): Ditto.
10404 (only_leaf_regs_used): Ditto.
10405 (maybe_assemble_visibility): Ditto.
10406 * varasm.h (supports_one_only): Ditto.
10407 * rtl.h (compute_alignments): Change return type from int to void.
10408 * final.cc (app_on): Change return type from int to bool.
10409 (compute_alignments): Change return type from int to void
10410 and adjust function body accordingly.
10411 (shorten_branches): Change "something_changed" variable
10412 type from int to bool.
10413 (leaf_function_p): Change return type from int to bool
10414 and adjust function body accordingly.
10415 (final_forward_branch_p): Ditto.
10416 (only_leaf_regs_used): Ditto.
10417 * varasm.cc (contains_pointers_p): Change return type from
10418 int to bool and adjust function body accordingly.
10419 (compare_constant): Ditto.
10420 (maybe_assemble_visibility): Ditto.
10421 (supports_one_only): Ditto.
10423 2023-06-28 Manolis Tsamis <manolis.tsamis@vrull.eu>
10426 * regcprop.cc (maybe_mode_change): Check stack_pointer_rtx mode.
10427 (maybe_copy_reg_attrs): New function.
10428 (find_oldest_value_reg): Use maybe_copy_reg_attrs.
10429 (copyprop_hardreg_forward_1): Ditto.
10431 2023-06-28 Richard Biener <rguenther@suse.de>
10433 PR tree-optimization/110434
10434 * tree-nrv.cc (pass_nrv::execute): Remove CLOBBERs of
10435 VAR we replace with <retval>.
10437 2023-06-28 Richard Biener <rguenther@suse.de>
10439 PR tree-optimization/110451
10440 * tree-ssa-loop-im.cc (stmt_cost): [VEC_]COND_EXPR and
10441 tcc_comparison are expensive.
10443 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
10445 * config/i386/i386-expand.cc (ix86_expand_branch): Also use ptest
10446 for TImode comparisons on 32-bit architectures.
10447 * config/i386/i386.md (cbranch<mode>4): Change from SDWIM to
10448 SWIM1248x to exclude/avoid TImode being conditional on -m64.
10449 (cbranchti4): New define_expand for TImode on both TARGET_64BIT
10450 and/or with TARGET_SSE4_1.
10451 * config/i386/predicates.md (ix86_timode_comparison_operator):
10452 New predicate that depends upon TARGET_64BIT.
10453 (ix86_timode_comparison_operand): Likewise.
10455 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
10458 * config/i386/i386-features.cc (compute_convert_gain): Provide
10459 more accurate gains for conversion of scalar comparisons to
10462 2023-06-28 Richard Biener <rguenther@suse.de>
10464 PR tree-optimization/110443
10465 * tree-vect-slp.cc (vect_build_slp_tree_1): Reject non-grouped
10468 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
10470 * config/rs6000/rs6000.md (peephole2 for compare_and_move): New.
10471 (peephole2 for move_and_compare): New.
10472 (mode_iterator WORD): New. Set the mode to SI/DImode by
10474 (*mov<mode>_internal2): Change the mode iterator from P to WORD.
10475 (split pattern for compare_and_move): Likewise.
10477 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10479 * config/riscv/autovec-opt.md (*double_widen_fma<mode>): New pattern.
10480 (*single_widen_fma<mode>): Ditto.
10482 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
10485 * config/rs6000/altivec.md (*altivec_vupkhs<VU_char>_direct): Rename
10487 (altivec_vupkhs<VU_char>_direct): ...this.
10488 * config/rs6000/predicates.md (vspltisw_vupkhsw_constant_split): New
10489 predicate to test if a constant can be loaded with vspltisw and
10491 (easy_vector_constant): Call vspltisw_vupkhsw_constant_p to Check if
10492 a vector constant can be synthesized with a vspltisw and a vupkhsw.
10493 * config/rs6000/rs6000-protos.h (vspltisw_vupkhsw_constant_p):
10495 * config/rs6000/rs6000.cc (vspltisw_vupkhsw_constant_p): New
10496 function to return true if OP mode is V2DI and can be synthesized
10497 with vupkhsw and vspltisw.
10498 * config/rs6000/vsx.md (*vspltisw_v2di_split): New insn to load up
10499 constants with vspltisw and vupkhsw.
10501 2023-06-28 Jan Hubicka <jh@suse.cz>
10503 PR tree-optimization/110377
10504 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Pass statement to
10506 (ipa_analyze_node): Enable ranger.
10508 2023-06-28 Richard Biener <rguenther@suse.de>
10510 * tree.h (TYPE_PRECISION): Check for non-VECTOR_TYPE.
10511 (TYPE_PRECISION_RAW): Provide raw access to the precision
10513 * tree.cc (verify_type_variant): Compare TYPE_PRECISION_RAW.
10514 (gimple_canonical_types_compatible_p): Likewise.
10515 * tree-streamer-out.cc (pack_ts_type_common_value_fields):
10516 Stream TYPE_PRECISION_RAW.
10517 * tree-streamer-in.cc (unpack_ts_type_common_value_fields):
10519 * lto-streamer-out.cc (hash_tree): Hash TYPE_PRECISION_RAW.
10521 2023-06-28 Alexandre Oliva <oliva@adacore.com>
10523 * doc/extend.texi (zero-call-used-regs): Document leafy and
10525 * flag-types.h (zero_regs_flags): Add LEAFY_MODE, as well as
10526 LEAFY and variants.
10527 * function.cc (gen_call_ued_regs_seq): Set only_used for leaf
10528 functions in leafy mode.
10529 * opts.cc (zero_call_used_regs_opts): Add leafy and variants.
10531 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10533 * config/riscv/riscv-vector-builtins-bases.cc: Adapt expand.
10534 * config/riscv/vector.md (@pred_single_widen_<plus_minus:optab><mode>):
10536 (@pred_single_widen_add<mode>): New pattern.
10537 (@pred_single_widen_sub<mode>): New pattern.
10539 2023-06-28 liuhongt <hongtao.liu@intel.com>
10541 * config/i386/i386.cc (ix86_invalid_conversion): New function.
10542 (TARGET_INVALID_CONVERSION): Define as
10543 ix86_invalid_conversion.
10545 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
10547 * config/riscv/autovec.md (<optab><vnconvert><mode>2): New
10549 (<float_cvt><vnconvert><mode>2): Ditto.
10550 (<optab><mode><vnconvert>2): Ditto.
10551 (<float_cvt><mode><vnconvert>2): Ditto.
10552 * config/riscv/vector-iterators.md: Add vnconvert.
10554 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
10556 * config/riscv/autovec.md (extend<v_double_trunc><mode>2): New
10558 (extend<v_quad_trunc><mode>2): Ditto.
10559 (trunc<mode><v_double_trunc>2): Ditto.
10560 (trunc<mode><v_quad_trunc>2): Ditto.
10561 * config/riscv/vector-iterators.md: Add VQEXTF and HF to
10562 V_QUAD_TRUNC and v_quad_trunc.
10564 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
10566 * config/riscv/autovec.md (<float_cvt><vconvert><mode>2): New
10569 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
10571 * config/riscv/autovec.md (copysign<mode>3): Add expander.
10572 (xorsign<mode>3): Ditto.
10573 * config/riscv/riscv-vector-builtins-bases.cc (class vfsgnjn):
10575 * config/riscv/vector-iterators.md (copysign): Remove ncopysign.
10579 * config/riscv/vector.md (@pred_ncopysign<mode>): Split off.
10580 (@pred_ncopysign<mode>_scalar): Ditto.
10582 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
10584 * config/riscv/autovec.md: VF_AUTO -> VF.
10585 * config/riscv/vector-iterators.md: Introduce VF_ZVFHMIN,
10586 VWEXTF_ZVFHMIN and use TARGET_ZVFH in VWCONVERTI, VHF and
10588 * config/riscv/vector.md: Use new iterators.
10590 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
10592 * match.pd: Use element_mode and check if target supports
10593 operation with new type.
10595 2023-06-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
10597 * config/aarch64/aarch64-sve-builtins-base.cc
10598 (svdupq_impl::fold_nonconst_dupq): New method.
10599 (svdupq_impl::fold): Call fold_nonconst_dupq.
10601 2023-06-27 Andrew Pinski <apinski@marvell.com>
10603 PR middle-end/110420
10604 PR middle-end/103979
10605 PR middle-end/98619
10606 * gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile.
10608 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
10610 * ipa-cp.cc (decide_whether_version_node): Adjust comment.
10611 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Adjust
10613 (set_switch_stmt_execution_predicate): Same.
10614 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
10616 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
10618 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Adjust for use with
10619 ipa_vr instead of value_range.
10622 (ipa_get_value_range): Same.
10623 * value-range.cc (gt_pch_nx): Move to ipa-prop.cc and adjust for
10627 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
10629 * ipa-cp.cc (ipa_vr_operation_and_type_effects): New.
10630 * ipa-prop.cc (ipa_get_value_range): Adjust for ipa_vr.
10631 (ipa_set_jfunc_vr): Take a range.
10632 (ipa_compute_jump_functions_for_edge): Pass range to
10634 (ipa_write_jump_function): Call streamer write helper.
10635 (ipa_read_jump_function): Call streamer read helper.
10636 * ipa-prop.h (class ipa_vr): Change m_vr to an ipa_vr.
10638 2023-06-27 Richard Sandiford <richard.sandiford@arm.com>
10640 * gengtype-parse.cc (consume_until_comma_or_eos): Parse "= { ... }"
10641 as a probable initializer rather than a probable complete statement.
10643 2023-06-27 Richard Biener <rguenther@suse.de>
10645 PR tree-optimization/96208
10646 * tree-vect-slp.cc (vect_build_slp_tree_1): Allow
10647 a non-grouped load if it is the same for all lanes.
10648 (vect_build_slp_tree_2): Handle not grouped loads.
10649 (vect_optimize_slp_pass::remove_redundant_permutations):
10651 (vect_transform_slp_perm_load_1): Likewise.
10652 * tree-vect-stmts.cc (vect_model_load_cost): Likewise.
10653 (get_group_load_store_type): Likewise. Handle
10654 invariant accesses.
10655 (vectorizable_load): Likewise.
10657 2023-06-27 liuhongt <hongtao.liu@intel.com>
10659 PR rtl-optimization/110237
10660 * config/i386/sse.md (<avx512>_store<mode>_mask): Refine with
10662 (maskstore<mode><avx512fmaskmodelower): Ditto.
10663 (*<avx512>_store<mode>_mask): New define_insn, it's renamed
10664 from original <avx512>_store<mode>_mask.
10666 2023-06-27 liuhongt <hongtao.liu@intel.com>
10668 * config/i386/i386-features.cc (pass_insert_vzeroupper:gate):
10669 Move flag_expensive_optimizations && !optimize_size to ..
10670 * config/i386/i386-options.cc (ix86_option_override_internal):
10671 .. this, it makes -mvzeroupper independent of optimization
10672 level, but still keeps the behavior of architecture
10673 tuning(emit_vzeroupper) unchanged.
10675 2023-06-27 liuhongt <hongtao.liu@intel.com>
10678 * config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit
10679 vzeroupper for vzeroupper call_insn.
10681 2023-06-27 Andrew Pinski <apinski@marvell.com>
10683 * doc/extend.texi (__builtin_alloca_with_align_and_max): Fix
10686 2023-06-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10688 * config/riscv/riscv-v.cc (expand_const_vector): Fix stepped vector
10691 2023-06-26 Andrew Pinski <apinski@marvell.com>
10693 * doc/extend.texi (access attribute): Add
10695 (interrupt/interrupt_handler attribute):
10698 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
10700 * config/aarch64/aarch64-simd.md (aarch64_sqrshrun_n<mode>_insn):
10701 Use <DWI> instead of <V2XWIDE>.
10702 (aarch64_sqrshrun_n<mode>): Likewise.
10704 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
10706 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rsra_rnd_imm_p):
10708 (aarch64_rnd_imm_p): ... This.
10709 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec):
10711 (aarch64_int_rnd_operand): ... This.
10712 (aarch64_simd_rshrn_imm_vec): Delete.
10713 * config/aarch64/aarch64-simd.md (aarch64_<sra_op>rsra_n<mode>_insn):
10714 Adjust for the above.
10715 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): Likewise.
10716 (*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
10717 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
10718 (aarch64_sqrshrun_n<mode>_insn): Likewise.
10719 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): Likewise.
10720 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): Likewise.
10721 (aarch64_sqrshrun2_n<mode>_insn_le): Likewise.
10722 (aarch64_sqrshrun2_n<mode>_insn_be): Likewise.
10723 * config/aarch64/aarch64.cc (aarch64_const_vec_rsra_rnd_imm_p):
10725 (aarch64_rnd_imm_p): ... This.
10727 2023-06-26 Andreas Krebbel <krebbel@linux.ibm.com>
10729 * config/s390/s390.cc (s390_encode_section_info): Set
10730 SYMBOL_FLAG_SET_NOTALIGN2 only if the symbol has explicitely been
10733 2023-06-26 Jan Hubicka <jh@suse.cz>
10735 PR tree-optimization/109849
10736 * tree-ssa-dce.cc (make_forwarders_with_degenerate_phis): Fix profile
10737 count of newly constructed forwarder block.
10739 2023-06-26 Andrew Carlotti <andrew.carlotti@arm.com>
10741 * doc/optinfo.texi: Fix "steam" -> "stream".
10743 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10745 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Add LEN_MASK_STORE and
10747 (dse_optimize_stmt): Add LEN_MASK_STORE.
10749 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10751 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Fix gimple
10752 fold of LOAD/STORE with length.
10754 2023-06-26 Andrew MacLeod <amacleod@redhat.com>
10756 * gimple-range-gori.cc (compute_operand1_and_operand2_range):
10757 Check for interdependence between operands 1 and 2.
10759 2023-06-26 Richard Sandiford <richard.sandiford@arm.com>
10761 * tree-vect-stmts.cc (vectorizable_conversion): Take multi_step_cvt
10762 into account when costing non-widening/truncating conversions.
10764 2023-06-26 Richard Biener <rguenther@suse.de>
10766 PR tree-optimization/110381
10767 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
10768 Materialize permutes before fold-left reductions.
10770 2023-06-26 Pan Li <pan2.li@intel.com>
10772 * config/riscv/riscv-vector-builtins-bases.h: Remove duplicated decl.
10774 2023-06-26 Richard Biener <rguenther@suse.de>
10776 * varasm.cc (initializer_constant_valid_p_1): Also
10777 constrain the type of value to be scalar integral
10778 before dispatching to narrowing_initializer_constant_valid_p.
10780 2023-06-26 Richard Biener <rguenther@suse.de>
10782 * tree-ssa-scopedtables.cc (hashable_expr_equal_p):
10783 Use element_precision.
10785 2023-06-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10787 * config/riscv/autovec.md (vcond<V:mode><VI:mode>): Remove redundant
10789 (vcondu<V:mode><VI:mode>): Ditto.
10790 * config/riscv/riscv-protos.h (expand_vcond): Ditto.
10791 * config/riscv/riscv-v.cc (expand_vcond): Ditto.
10793 2023-06-26 Richard Biener <rguenther@suse.de>
10795 PR tree-optimization/110392
10796 * gimple-predicate-analysis.cc (uninit_analysis::is_use_guarded):
10797 Do early exits on true/false predicate only after normalization.
10799 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10801 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Change name "len" into
10804 2023-06-26 Roger Sayle <roger@nextmovesoftware.com>
10806 * config/i386/i386.md (peephole2): Simplify zeroing a register
10807 followed by an IOR, XOR or PLUS operation on it, into a move.
10808 (*ashl<dwi>3_doubleword_highpart): New define_insn_and_split to
10809 eliminate (and hide from reload) unnecessary word to doubleword
10810 extensions that are followed by left shifts by sufficiently large,
10811 but valid, bit counts.
10813 2023-06-26 liuhongt <hongtao.liu@intel.com>
10815 PR tree-optimization/110371
10816 PR tree-optimization/110018
10817 * tree-vect-stmts.cc (vectorizable_conversion): Use cvt_op to
10818 save intermediate type operand instead of "subtle" vec_dest
10821 2023-06-26 liuhongt <hongtao.liu@intel.com>
10823 PR tree-optimization/110371
10824 PR tree-optimization/110018
10825 * tree-vect-stmts.cc (vectorizable_conversion): Don't use
10826 intermiediate type for FIX_TRUNC_EXPR when ftrapping-math.
10828 2023-06-26 Hongyu Wang <hongyu.wang@intel.com>
10830 * config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
10831 Override tune_string with arch_string if tune_string is not
10832 explicitly specified.
10834 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10836 * config/riscv/riscv-vsetvl.cc (vector_insn_info::parse_insn): Ehance
10838 * config/riscv/riscv-vsetvl.h: New function.
10840 2023-06-25 Li Xu <xuli1@eswincomputing.com>
10842 * config/riscv/riscv-vector-builtins-bases.cc: change emit_insn to
10845 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10847 * config/riscv/autovec.md (len_load_<mode>): Remove.
10848 (len_maskload<mode><vm>): Remove.
10849 (len_store_<mode>): New pattern.
10850 (len_maskstore<mode><vm>): New pattern.
10851 * config/riscv/predicates.md (autovec_length_operand): New predicate.
10852 * config/riscv/riscv-protos.h (enum insn_type): New enum.
10853 (expand_load_store): New function.
10854 * config/riscv/riscv-v.cc (emit_vlmax_masked_insn): Ditto.
10855 (emit_nonvlmax_masked_insn): Ditto.
10856 (expand_load_store): Ditto.
10857 * config/riscv/riscv-vector-builtins.cc
10858 (function_expander::use_contiguous_store_insn): Add avl_type operand
10860 * config/riscv/vector.md: Ditto.
10862 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10864 * internal-fn.cc (expand_partial_store_optab_fn): Fix bug of BIAS
10867 2023-06-25 Pan Li <pan2.li@intel.com>
10869 * config/riscv/vector.md: Revert.
10871 2023-06-25 Pan Li <pan2.li@intel.com>
10873 * config/riscv/genrvv-type-indexer.cc (valid_type): Revert changes.
10874 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): Ditto.
10875 (ADJUST_ALIGNMENT): Ditto.
10876 (RVV_TUPLE_PARTIAL_MODES): Ditto.
10877 (ADJUST_NUNITS): Ditto.
10878 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t): Ditto.
10879 (vfloat16mf4x3_t): Ditto.
10880 (vfloat16mf4x4_t): Ditto.
10881 (vfloat16mf4x5_t): Ditto.
10882 (vfloat16mf4x6_t): Ditto.
10883 (vfloat16mf4x7_t): Ditto.
10884 (vfloat16mf4x8_t): Ditto.
10885 (vfloat16mf2x2_t): Ditto.
10886 (vfloat16mf2x3_t): Ditto.
10887 (vfloat16mf2x4_t): Ditto.
10888 (vfloat16mf2x5_t): Ditto.
10889 (vfloat16mf2x6_t): Ditto.
10890 (vfloat16mf2x7_t): Ditto.
10891 (vfloat16mf2x8_t): Ditto.
10892 (vfloat16m1x2_t): Ditto.
10893 (vfloat16m1x3_t): Ditto.
10894 (vfloat16m1x4_t): Ditto.
10895 (vfloat16m1x5_t): Ditto.
10896 (vfloat16m1x6_t): Ditto.
10897 (vfloat16m1x7_t): Ditto.
10898 (vfloat16m1x8_t): Ditto.
10899 (vfloat16m2x2_t): Ditto.
10900 (vfloat16m2x3_t): Diito.
10901 (vfloat16m2x4_t): Diito.
10902 (vfloat16m4x2_t): Diito.
10903 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Ditto.
10904 (vfloat16mf4x3_t): Ditto.
10905 (vfloat16mf4x4_t): Ditto.
10906 (vfloat16mf4x5_t): Ditto.
10907 (vfloat16mf4x6_t): Ditto.
10908 (vfloat16mf4x7_t): Ditto.
10909 (vfloat16mf4x8_t): Ditto.
10910 (vfloat16mf2x2_t): Ditto.
10911 (vfloat16mf2x3_t): Ditto.
10912 (vfloat16mf2x4_t): Ditto.
10913 (vfloat16mf2x5_t): Ditto.
10914 (vfloat16mf2x6_t): Ditto.
10915 (vfloat16mf2x7_t): Ditto.
10916 (vfloat16mf2x8_t): Ditto.
10917 (vfloat16m1x2_t): Ditto.
10918 (vfloat16m1x3_t): Ditto.
10919 (vfloat16m1x4_t): Ditto.
10920 (vfloat16m1x5_t): Ditto.
10921 (vfloat16m1x6_t): Ditto.
10922 (vfloat16m1x7_t): Ditto.
10923 (vfloat16m1x8_t): Ditto.
10924 (vfloat16m2x2_t): Ditto.
10925 (vfloat16m2x3_t): Ditto.
10926 (vfloat16m2x4_t): Ditto.
10927 (vfloat16m4x2_t): Ditto.
10928 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
10929 * config/riscv/riscv.md: Ditto.
10930 * config/riscv/vector-iterators.md: Ditto.
10932 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10934 * gimple-fold.cc (arith_overflowed_p): Apply LEN_MASK_{LOAD,STORE}.
10935 (gimple_fold_partial_load_store_mem_ref): Ditto.
10936 (gimple_fold_partial_store): Ditto.
10937 (gimple_fold_call): Ditto.
10939 2023-06-25 liuhongt <hongtao.liu@intel.com>
10942 * config/i386/sse.md (maskload<mode><avx512fmaskmodelower>):
10943 Refine pattern with UNSPEC_MASKLOAD.
10944 (maskload<mode><avx512fmaskmodelower>): Ditto.
10945 (*<avx512>_load<mode>_mask): Extend mode iterator to
10947 (*<avx512>_load<mode>): Ditto.
10949 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10951 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): Add LEN_MASK_STORE.
10953 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10955 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Apply
10956 LEN_MASK_{LOAD,STORE}
10958 2023-06-25 yulong <shiyulong@iscas.ac.cn>
10960 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
10962 2023-06-24 Roger Sayle <roger@nextmovesoftware.com>
10964 * config/i386/i386.md (*<code>qi_ext<mode>_3): New define_insn.
10966 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10968 * config/riscv/autovec.md (*fma<mode>): set clobber to Pmode in expand stage.
10969 (*fma<VI:mode><P:mode>): Ditto.
10970 (*fnma<mode>): Ditto.
10971 (*fnma<VI:mode><P:mode>): Ditto.
10973 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10975 * config/riscv/autovec.md (fma<mode>4): New pattern.
10976 (*fma<mode>): Ditto.
10977 (fnma<mode>4): Ditto.
10978 (*fnma<mode>): Ditto.
10979 (fms<mode>4): Ditto.
10980 (*fms<mode>): Ditto.
10981 (fnms<mode>4): Ditto.
10982 (*fnms<mode>): Ditto.
10983 * config/riscv/riscv-protos.h (emit_vlmax_fp_ternary_insn):
10985 * config/riscv/riscv-v.cc (emit_vlmax_fp_ternary_insn): Ditto.
10986 * config/riscv/vector.md: Fix attribute bug.
10988 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10990 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn):
10991 Apply LEN_MASK_{LOAD,STORE}.
10993 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10995 * tree-ssa-loop-ivopts.cc (get_alias_ptr_type_for_ptr_address):
10996 Add LEN_MASK_{LOAD,STORE}.
10998 2023-06-24 David Malcolm <dmalcolm@redhat.com>
11000 * diagnostic-format-sarif.cc: Add #define INCLUDE_VECTOR.
11001 * diagnostic.cc: Likewise.
11002 * text-art/box-drawing.cc: Likewise.
11003 * text-art/canvas.cc: Likewise.
11004 * text-art/ruler.cc: Likewise.
11005 * text-art/selftests.cc: Likewise.
11006 * text-art/selftests.h (text_art::canvas): New forward decl.
11007 * text-art/style.cc: Add #define INCLUDE_VECTOR.
11008 * text-art/styled-string.cc: Likewise.
11009 * text-art/table.cc: Likewise.
11010 * text-art/table.h: Remove #include <vector>.
11011 * text-art/theme.cc: Add #define INCLUDE_VECTOR.
11012 * text-art/types.h: Check that INCLUDE_VECTOR is defined.
11013 Remove #include of <vector> and <string>.
11014 * text-art/widget.cc: Add #define INCLUDE_VECTOR.
11015 * text-art/widget.h: Remove #include <vector>.
11017 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11019 * internal-fn.cc (expand_partial_store_optab_fn): Adapt for LEN_MASK_STORE.
11020 (internal_load_fn_p): Add LEN_MASK_LOAD.
11021 (internal_store_fn_p): Add LEN_MASK_STORE.
11022 (internal_fn_mask_index): Add LEN_MASK_{LOAD,STORE}.
11023 (internal_fn_stored_value_index): Add LEN_MASK_STORE.
11024 (internal_len_load_store_bias): Add LEN_MASK_{LOAD,STORE}.
11025 * optabs-tree.cc (can_vec_mask_load_store_p): Adapt for LEN_MASK_{LOAD,STORE}.
11026 (get_len_load_store_mode): Ditto.
11027 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
11028 (get_len_load_store_mode): Ditto.
11029 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
11030 (get_all_ones_mask): New function.
11031 (vectorizable_store): Apply LEN_MASK_{LOAD,STORE} into vectorizer.
11032 (vectorizable_load): Ditto.
11034 2023-06-23 Marek Polacek <polacek@redhat.com>
11036 * doc/cpp.texi (__cplusplus): Document value for -std=c++26 and
11037 -std=gnu++26. Document that for C++23, its value is 202302L.
11038 * doc/invoke.texi: Document -std=c++26 and -std=gnu++26.
11039 * dwarf2out.cc (highest_c_language): Handle GNU C++26.
11040 (gen_compile_unit_die): Likewise.
11042 2023-06-23 Jan Hubicka <jh@suse.cz>
11044 * tree-ssa-phiprop.cc (propagate_with_phi): Compute post dominators on
11046 (pass_phiprop::execute): Do not compute it here; return
11047 update_ssa_only_virtuals if something changed.
11048 (pass_data_phiprop): Remove TODO_update_ssa from todos.
11050 2023-06-23 Michael Meissner <meissner@linux.ibm.com>
11051 Aaron Sawdey <acsawdey@linux.ibm.com>
11054 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
11055 allowed prefixed lwa to be generated.
11056 * config/rs6000/fusion.md: Regenerate.
11057 * config/rs6000/predicates.md (ds_form_mem_operand): Delete.
11058 * config/rs6000/rs6000.md (prefixed attribute): Add support for load
11059 plus compare immediate fused insns.
11060 (maybe_prefixed): Likewise.
11062 2023-06-23 Roger Sayle <roger@nextmovesoftware.com>
11064 * simplify-rtx.cc (simplify_subreg): Optimize lowpart SUBREGs
11065 of ASHIFT to const0_rtx with sufficiently large shift count.
11066 Optimize highpart SUBREGs of ASHIFT as the shift operand when
11067 the shift count is the correct offset. Optimize SUBREGs of
11068 multi-word logic operations if the SUBREGs of both operands
11071 2023-06-23 Richard Biener <rguenther@suse.de>
11073 * varasm.cc (initializer_constant_valid_p_1): Only
11074 allow conversions between scalar floating point types.
11076 2023-06-23 Richard Biener <rguenther@suse.de>
11078 * tree-vect-stmts.cc (vectorizable_assignment):
11079 Properly handle non-integral operands when analyzing
11082 2023-06-23 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
11084 PR tree-optimization/110280
11085 * match.pd (vec_perm_expr(v, v, mask) -> v): Explicitly build vector
11086 using build_vector_from_val with the element of input operand, and
11087 mask's type if operand and mask's types don't match.
11089 2023-06-23 Richard Biener <rguenther@suse.de>
11091 * fold-const.cc (tree_simple_nonnegative_warnv_p): Guard
11092 the truth_value_p case with !VECTOR_TYPE_P.
11094 2023-06-23 Richard Biener <rguenther@suse.de>
11096 * tree-vect-patterns.cc (vect_look_through_possible_promotion):
11097 Exit early when the type isn't scalar integral.
11099 2023-06-23 Richard Biener <rguenther@suse.de>
11101 * match.pd ((outertype)((innertype0)a+(innertype1)b)
11102 -> ((newtype)a+(newtype)b)): Use element_precision
11105 2023-06-23 Richard Biener <rguenther@suse.de>
11107 * fold-const.cc (fold_binary_loc): Use element_precision
11108 when trying (double)float1 CMP (double)float2 to
11109 float1 CMP float2 simplification.
11110 * match.pd: Likewise.
11112 2023-06-23 Richard Biener <rguenther@suse.de>
11114 * tree-vect-stmts.cc (vectorizable_load): Avoid useless
11115 copies of VMAT_INVARIANT vectorized stmts, fix SLP support.
11117 2023-06-23 Richard Biener <rguenther@suse.de>
11119 * tree-vect-stmts.cc (vector_vector_composition_type):
11120 Handle composition of a vector from a number of elements that
11121 happens to match its number of lanes.
11123 2023-06-22 Marek Polacek <polacek@redhat.com>
11125 * configure.ac (--enable-host-bind-now): New check. Add
11126 -Wl,-z,now to LD_PICFLAG if --enable-host-bind-now.
11127 * configure: Regenerate.
11128 * doc/install.texi: Document --enable-host-bind-now.
11130 2023-06-22 Di Zhao OS <dizhao@os.amperecomputing.com>
11132 * config/aarch64/aarch64.cc: Change fma_reassoc_width for ampere1.
11134 2023-06-22 Richard Biener <rguenther@suse.de>
11136 PR tree-optimization/110332
11137 * tree-ssa-phiprop.cc (propagate_with_phi): Always
11138 check aliasing with edge inserted loads.
11140 2023-06-22 Roger Sayle <roger@nextmovesoftware.com>
11141 Uros Bizjak <ubizjak@gmail.com>
11143 * config/i386/i386-expand.cc (ix86_expand_sse_ptest): Recognize
11144 expansion of ptestc with equal operands as producing const1_rtx.
11145 * config/i386/i386.cc (ix86_rtx_costs): Provide accurate cost
11146 estimates of UNSPEC_PTEST, where the ptest performs the PAND
11147 or PAND of its operands.
11148 * config/i386/sse.md (define_split): Transform CCCmode UNSPEC_PTEST
11149 of reg_equal_p operands into an x86_stc instruction.
11150 (define_split): Split pandn/ptestz/set{n?}e into ptestc/set{n?}c.
11151 (define_split): Similar to above for strict_low_part destinations.
11152 (define_split): Split pandn/ptestz/j{n?}e into ptestc/j{n?}c.
11154 2023-06-22 David Malcolm <dmalcolm@redhat.com>
11157 * Makefile.in (ANALYZER_OBJS): Add analyzer/access-diagram.o.
11158 * doc/invoke.texi (Wanalyzer-out-of-bounds): Add description of
11160 (fanalyzer-debug-text-art): New.
11162 2023-06-22 David Malcolm <dmalcolm@redhat.com>
11164 * Makefile.in (OBJS-libcommon): Add text-art/box-drawing.o,
11165 text-art/canvas.o, text-art/ruler.o, text-art/selftests.o,
11166 text-art/style.o, text-art/styled-string.o, text-art/table.o,
11167 text-art/theme.o, and text-art/widget.o.
11168 * color-macros.h (COLOR_FG_BRIGHT_BLACK): New.
11169 (COLOR_FG_BRIGHT_RED): New.
11170 (COLOR_FG_BRIGHT_GREEN): New.
11171 (COLOR_FG_BRIGHT_YELLOW): New.
11172 (COLOR_FG_BRIGHT_BLUE): New.
11173 (COLOR_FG_BRIGHT_MAGENTA): New.
11174 (COLOR_FG_BRIGHT_CYAN): New.
11175 (COLOR_FG_BRIGHT_WHITE): New.
11176 (COLOR_BG_BRIGHT_BLACK): New.
11177 (COLOR_BG_BRIGHT_RED): New.
11178 (COLOR_BG_BRIGHT_GREEN): New.
11179 (COLOR_BG_BRIGHT_YELLOW): New.
11180 (COLOR_BG_BRIGHT_BLUE): New.
11181 (COLOR_BG_BRIGHT_MAGENTA): New.
11182 (COLOR_BG_BRIGHT_CYAN): New.
11183 (COLOR_BG_BRIGHT_WHITE): New.
11184 * common.opt (fdiagnostics-text-art-charset=): New option.
11185 (diagnostic-text-art.h): New SourceInclude.
11186 (diagnostic_text_art_charset) New Enum and EnumValues.
11187 * configure: Regenerate.
11188 * configure.ac (gccdepdir): Add text-art to loop.
11189 * diagnostic-diagram.h: New file.
11190 * diagnostic-format-json.cc (json_emit_diagram): New.
11191 (diagnostic_output_format_init_json): Wire it up to
11192 context->m_diagrams.m_emission_cb.
11193 * diagnostic-format-sarif.cc: Include "diagnostic-diagram.h" and
11194 "text-art/canvas.h".
11195 (sarif_result::on_nested_diagnostic): Move code to...
11196 (sarif_result::add_related_location): ...this new function.
11197 (sarif_result::on_diagram): New.
11198 (sarif_builder::emit_diagram): New.
11199 (sarif_builder::make_message_object_for_diagram): New.
11200 (sarif_emit_diagram): New.
11201 (diagnostic_output_format_init_sarif): Set
11202 context->m_diagrams.m_emission_cb to sarif_emit_diagram.
11203 * diagnostic-text-art.h: New file.
11204 * diagnostic.cc: Include "diagnostic-text-art.h",
11205 "diagnostic-diagram.h", and "text-art/theme.h".
11206 (diagnostic_initialize): Initialize context->m_diagrams and
11207 call diagnostics_text_art_charset_init.
11208 (diagnostic_finish): Clean up context->m_diagrams.m_theme.
11209 (diagnostic_emit_diagram): New.
11210 (diagnostics_text_art_charset_init): New.
11211 * diagnostic.h (text_art::theme): New forward decl.
11212 (class diagnostic_diagram): Likewise.
11213 (diagnostic_context::m_diagrams): New field.
11214 (diagnostic_emit_diagram): New decl.
11215 * doc/invoke.texi (Diagnostic Message Formatting Options): Add
11216 -fdiagnostics-text-art-charset=.
11217 (-fdiagnostics-plain-output): Add
11218 -fdiagnostics-text-art-charset=none.
11219 * gcc.cc: Include "diagnostic-text-art.h".
11220 (driver_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
11221 * opts-common.cc (decode_cmdline_options_to_array): Add
11222 "-fdiagnostics-text-art-charset=none" to expanded_args for
11223 -fdiagnostics-plain-output.
11224 * opts.cc: Include "diagnostic-text-art.h".
11225 (common_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
11226 * pretty-print.cc (pp_unicode_character): New.
11227 * pretty-print.h (pp_unicode_character): New decl.
11228 * selftest-run-tests.cc: Include "text-art/selftests.h".
11229 (selftest::run_tests): Call text_art_tests.
11230 * text-art/box-drawing-chars.inc: New file, generated by
11231 contrib/unicode/gen-box-drawing-chars.py.
11232 * text-art/box-drawing.cc: New file.
11233 * text-art/box-drawing.h: New file.
11234 * text-art/canvas.cc: New file.
11235 * text-art/canvas.h: New file.
11236 * text-art/ruler.cc: New file.
11237 * text-art/ruler.h: New file.
11238 * text-art/selftests.cc: New file.
11239 * text-art/selftests.h: New file.
11240 * text-art/style.cc: New file.
11241 * text-art/styled-string.cc: New file.
11242 * text-art/table.cc: New file.
11243 * text-art/table.h: New file.
11244 * text-art/theme.cc: New file.
11245 * text-art/theme.h: New file.
11246 * text-art/types.h: New file.
11247 * text-art/widget.cc: New file.
11248 * text-art/widget.h: New file.
11250 2023-06-21 Uros Bizjak <ubizjak@gmail.com>
11252 * function.h (emit_initial_value_sets):
11253 Change return type from int to void.
11254 (aggregate_value_p): Change return type from int to bool.
11255 (prologue_contains): Ditto.
11256 (epilogue_contains): Ditto.
11257 (prologue_epilogue_contains): Ditto.
11258 * function.cc (temp_slot): Make "in_use" variable bool.
11259 (make_slot_available): Update for changed "in_use" variable.
11260 (assign_stack_temp_for_type): Ditto.
11261 (emit_initial_value_sets): Change return type from int to void
11262 and update function body accordingly.
11263 (instantiate_virtual_regs): Ditto.
11264 (rest_of_handle_thread_prologue_and_epilogue): Ditto.
11265 (safe_insn_predicate): Change return type from int to bool.
11266 (aggregate_value_p): Change return type from int to bool
11267 and update function body accordingly.
11268 (prologue_contains): Change return type from int to bool.
11269 (prologue_epilogue_contains): Ditto.
11271 2023-06-21 Alexander Monakov <amonakov@ispras.ru>
11273 * common.opt (fp_contract_mode) [on]: Remove fallback.
11274 * config/sh/sh.md (*fmasf4): Correct flag_fp_contract_mode test.
11275 * doc/invoke.texi (-ffp-contract): Update.
11276 * trans-mem.cc (diagnose_tm_1): Skip internal function calls.
11278 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
11280 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
11281 Add alternatives to prefer to avoid same input and output Z register.
11282 (mask_gather_load<mode><v_int_container>): Likewise.
11283 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
11284 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
11285 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
11286 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
11288 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
11290 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
11291 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
11292 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
11293 <SVE_2BHSI:mode>_sxtw): Likewise.
11294 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
11295 <SVE_2BHSI:mode>_uxtw): Likewise.
11296 (@aarch64_ldff1_gather<mode>): Likewise.
11297 (@aarch64_ldff1_gather<mode>): Likewise.
11298 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
11299 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
11300 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
11301 <VNx4_NARROW:mode>): Likewise.
11302 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
11303 <VNx2_NARROW:mode>): Likewise.
11304 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
11305 <VNx2_NARROW:mode>_sxtw): Likewise.
11306 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
11307 <VNx2_NARROW:mode>_uxtw): Likewise.
11308 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
11309 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
11310 <SVE_PARTIAL_I:mode>): Likewise.
11312 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
11314 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
11315 Convert to compact alternatives syntax.
11316 (mask_gather_load<mode><v_int_container>): Likewise.
11317 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
11318 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
11319 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
11320 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
11322 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
11324 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
11325 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
11326 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
11327 <SVE_2BHSI:mode>_sxtw): Likewise.
11328 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
11329 <SVE_2BHSI:mode>_uxtw): Likewise.
11330 (@aarch64_ldff1_gather<mode>): Likewise.
11331 (@aarch64_ldff1_gather<mode>): Likewise.
11332 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
11333 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
11334 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
11335 <VNx4_NARROW:mode>): Likewise.
11336 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
11337 <VNx2_NARROW:mode>): Likewise.
11338 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
11339 <VNx2_NARROW:mode>_sxtw): Likewise.
11340 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
11341 <VNx2_NARROW:mode>_uxtw): Likewise.
11342 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
11343 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
11344 <SVE_PARTIAL_I:mode>): Likewise.
11346 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
11349 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
11351 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
11352 Convert to compact alternatives syntax.
11353 (mask_gather_load<mode><v_int_container>): Likewise.
11354 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
11355 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
11356 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
11357 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
11359 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
11361 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
11362 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
11363 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
11364 <SVE_2BHSI:mode>_sxtw): Likewise.
11365 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
11366 <SVE_2BHSI:mode>_uxtw): Likewise.
11367 (@aarch64_ldff1_gather<mode>): Likewise.
11368 (@aarch64_ldff1_gather<mode>): Likewise.
11369 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
11370 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
11371 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
11372 <VNx4_NARROW:mode>): Likewise.
11373 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
11374 <VNx2_NARROW:mode>): Likewise.
11375 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
11376 <VNx2_NARROW:mode>_sxtw): Likewise.
11377 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
11378 <VNx2_NARROW:mode>_uxtw): Likewise.
11379 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
11380 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
11381 <SVE_PARTIAL_I:mode>): Likewise.
11383 2023-06-21 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11385 * optabs-query.cc (can_vec_mask_load_store_p): Move to optabs-tree.cc.
11386 (get_len_load_store_mode): Ditto.
11387 * optabs-query.h (can_vec_mask_load_store_p): Move to optabs-tree.h.
11388 (get_len_load_store_mode): Ditto.
11389 * optabs-tree.cc (can_vec_mask_load_store_p): New function.
11390 (get_len_load_store_mode): Ditto.
11391 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
11392 (get_len_load_store_mode): Ditto.
11393 * tree-if-conv.cc: include optabs-tree instead of optabs-query
11395 2023-06-21 Richard Biener <rguenther@suse.de>
11397 * tree-ssa-loop-ivopts.cc (add_iv_candidate_for_use): Use
11398 split_constant_offset for the POINTER_PLUS_EXPR case.
11400 2023-06-21 Richard Biener <rguenther@suse.de>
11402 * tree-ssa-loop-ivopts.cc (record_group_use): Use
11403 split_constant_offset.
11405 2023-06-21 Richard Biener <rguenther@suse.de>
11407 * tree-loop-distribution.cc (classify_builtin_st): Use
11408 split_constant_offset.
11409 * tree-ssa-loop-ivopts.h (strip_offset): Remove.
11410 * tree-ssa-loop-ivopts.cc (strip_offset): Make static.
11412 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
11414 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
11415 Convert to compact alternatives syntax.
11416 (mask_gather_load<mode><v_int_container>): Likewise.
11417 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
11418 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
11419 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
11420 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
11422 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
11424 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
11425 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
11426 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
11427 <SVE_2BHSI:mode>_sxtw): Likewise.
11428 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
11429 <SVE_2BHSI:mode>_uxtw): Likewise.
11430 (@aarch64_ldff1_gather<mode>): Likewise.
11431 (@aarch64_ldff1_gather<mode>): Likewise.
11432 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
11433 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
11434 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
11435 <VNx4_NARROW:mode>): Likewise.
11436 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
11437 <VNx2_NARROW:mode>): Likewise.
11438 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
11439 <VNx2_NARROW:mode>_sxtw): Likewise.
11440 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
11441 <VNx2_NARROW:mode>_uxtw): Likewise.
11442 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
11443 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
11444 <SVE_PARTIAL_I:mode>): Likewise.
11446 2023-06-21 Tamar Christina <tamar.christina@arm.com>
11449 * doc/md.texi: Replace backslashchar.
11451 2023-06-21 Richard Biener <rguenther@suse.de>
11453 * config/i386/i386.cc (ix86_vector_costs::finish_cost):
11454 Overload. For masked main loops make sure the vectorization
11455 factor isn't more than double the number of iterations.
11457 2023-06-21 Jan Beulich <jbeulich@suse.com>
11459 * config/i386/i386-expand.cc (ix86_expand_copysign): Request
11460 value duplication by ix86_build_signbit_mask() when AVX512F and
11462 * config/i386/sse.md (*<avx512>_vternlog<mode>_all): Convert to
11463 2-alternative form. Adjust "mode" attribute. Add "enabled"
11465 (*<avx512>_vpternlog<mode>_1): Also permit when TARGET_AVX512F
11466 && !TARGET_PREFER_AVX256.
11467 (*<avx512>_vpternlog<mode>_2): Likewise.
11468 (*<avx512>_vpternlog<mode>_3): Likewise.
11470 2023-06-21 liuhongt <hongtao.liu@intel.com>
11473 * tree-vect-stmts.cc (vectorizable_conversion): Use
11474 intermiediate integer type for float_expr/fix_trunc_expr when
11475 direct optab is not existed.
11477 2023-06-20 Tamar Christina <tamar.christina@arm.com>
11479 PR bootstrap/110324
11480 * gensupport.cc (convert_syntax): Explicitly check for RTX code.
11482 2023-06-20 Richard Sandiford <richard.sandiford@arm.com>
11484 * config/aarch64/aarch64.md (stack_tie): Hard-code the first
11485 register operand to the stack pointer. Require the second register
11486 operand to have the number specified in a separate const_int operand.
11487 * config/aarch64/aarch64.cc (aarch64_emit_stack_tie): New function.
11488 (aarch64_allocate_and_probe_stack_space): Use it.
11489 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
11490 (aarch64_expand_epilogue): Likewise.
11492 2023-06-20 Jakub Jelinek <jakub@redhat.com>
11494 PR middle-end/79173
11495 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember lhs of
11496 IMAGPART_EXPR of arg2/arg3 and use that as arg3 if it has the right
11499 2023-06-20 Uros Bizjak <ubizjak@gmail.com>
11501 * calls.h (setjmp_call_p): Change return type from int to bool.
11502 * calls.cc (struct arg_data): Change "pass_on_stack" to bool.
11503 (store_one_arg): Change return type from int to bool
11504 and adjust function body accordingly. Change "sibcall_failure"
11506 (finalize_must_preallocate): Ditto. Change *must_preallocate pointer
11507 argument to bool. Change "partial_seen" variable to bool.
11508 (load_register_parameters): Change *sibcall_failure
11509 pointer argument to bool.
11510 (check_sibcall_argument_overlap_1): Change return type from int to bool
11511 and adjust function body accordingly.
11512 (check_sibcall_argument_overlap): Ditto. Change
11513 "mark_stored_args_map" argument to bool.
11514 (emit_call_1): Change "already_popped" variable to bool.
11515 (setjmp_call_p): Change return type from int to bool
11516 and adjust function body accordingly.
11517 (initialize_argument_information): Change *must_preallocate
11518 pointer argument to bool.
11519 (expand_call): Change "pcc_struct_value", "must_preallocate"
11520 and "sibcall_failure" variables to bool.
11521 (emit_library_call_value_1): Change "pcc_struct_value"
11524 2023-06-20 Martin Jambor <mjambor@suse.cz>
11527 * ipa-sra.cc (struct caller_issues): New field there_is_one.
11528 (check_for_caller_issues): Set it.
11529 (check_all_callers_for_issues): Check it.
11531 2023-06-20 Martin Jambor <mjambor@suse.cz>
11533 * ipa-prop.h (ipa_uid_to_idx_map_elt): New type.
11534 (struct ipcp_transformation): Rearrange members according to
11535 C++ class coding convention, add m_uid_to_idx,
11536 get_param_index and maybe_create_parm_idx_map.
11537 * ipa-cp.cc (ipcp_transformation::get_param_index): New function.
11538 (compare_uids): Likewise.
11539 (ipcp_transformation::maype_create_parm_idx_map): Likewise.
11540 * ipa-prop.cc (ipcp_get_parm_bits): Use get_param_index.
11541 (ipcp_update_bits): Accept TS as a parameter, assume it is not NULL.
11542 (ipcp_update_vr): Likewise.
11543 (ipcp_transform_function): Call, maybe_create_parm_idx_map of TS, bail
11544 out quickly if empty, pass it to ipcp_update_bits and ipcp_update_vr.
11546 2023-06-20 Carl Love <cel@us.ibm.com>
11548 * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin):
11549 Rename CODE_FOR_xsxsigqp_tf to CODE_FOR_xsxsigqp_tf_ti.
11550 Rename CODE_FOR_xsxsigqp_kf to CODE_FOR_xsxsigqp_kf_ti.
11551 Rename CCDE_FOR_xsxexpqp_tf to CODE_FOR_xsxexpqp_tf_di.
11552 Rename CODE_FOR_xsxexpqp_kf to CODE_FOR_xsxexpqp_kf_di.
11553 (CODE_FOR_xsxexpqp_kf_v2di, CODE_FOR_xsxsigqp_kf_v1ti,
11554 CODE_FOR_xsiexpqp_kf_v2di): Add case statements.
11555 * config/rs6000/rs6000-builtins.def
11556 (__builtin_vsx_scalar_extract_exp_to_vec,
11557 __builtin_vsx_scalar_extract_sig_to_vec,
11558 __builtin_vsx_scalar_insert_exp_vqp): Add new builtin definitions.
11559 Rename xsxexpqp_kf, xsxsigqp_kf, xsiexpqp_kf to xsexpqp_kf_di,
11560 xsxsigqp_kf_ti, xsiexpqp_kf_di respectively.
11561 * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
11562 Update case RS6000_OVLD_VEC_VSIE to handle MODE_VECTOR_INT for new
11563 overloaded instance. Update comments.
11564 * config/rs6000/rs6000-overload.def
11565 (__builtin_vec_scalar_insert_exp): Add new overload definition with
11567 (scalar_extract_exp_to_vec, scalar_extract_sig_to_vec): New
11568 overloaded definitions.
11569 * config/rs6000/vsx.md (V2DI_DI): New mode iterator.
11570 (DI_to_TI): New mode attribute.
11571 Rename xsxexpqp_<mode> to sxexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
11572 Rename xsxsigqp_<mode> to xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>.
11573 Rename xsiexpqp_<mode> to xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
11574 * doc/extend.texi (scalar_extract_exp_to_vec,
11575 scalar_extract_sig_to_vec): Add documentation for new builtins.
11576 (scalar_insert_exp): Add new overloaded builtin definition.
11578 2023-06-20 Li Xu <xuli1@eswincomputing.com>
11580 * config/riscv/riscv.cc (riscv_regmode_natural_size): set the natural
11581 size of vector mask mode to one rvv register.
11583 2023-06-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11585 * config/riscv/riscv-v.cc (expand_const_vector): Optimize codegen.
11587 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
11589 * config/riscv/riscv.cc (riscv_arg_has_vector): Add default
11592 2023-06-20 Richard Biener <rguenther@suse.de>
11594 * tree-ssa-dse.cc (dse_classify_store): When we found
11595 no defs and the basic-block with the original definition
11596 ends in __builtin_unreachable[_trap] the store is dead.
11598 2023-06-20 Richard Biener <rguenther@suse.de>
11600 * tree-ssa-phiprop.cc (phiprop_insert_phi): For simple loads
11601 keep the virtual SSA form up-to-date.
11603 2023-06-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
11605 * config/aarch64/aarch64-simd.md (*aarch64_addp_same_reg<mode>):
11606 New define_insn_and_split.
11608 2023-06-20 Tamar Christina <tamar.christina@arm.com>
11610 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Drop test comment.
11612 2023-06-20 Jan Beulich <jbeulich@suse.com>
11614 * config/i386/sse.md (vec_dupv2di): Correct %vmovddup input
11615 constraint. Add new AVX512F alternative.
11617 2023-06-20 Richard Biener <rguenther@suse.de>
11620 * dwarf2out.cc (process_scope_var): Continue processing
11621 the decl after setting a parent in case the existing DIE
11624 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
11626 * config/riscv/riscv.cc (riscv_scalable_vector_type_p): Delete.
11627 (riscv_arg_has_vector): Simplify.
11628 (riscv_pass_in_vector_p): Adjust warning message.
11630 2023-06-19 Jin Ma <jinma@linux.alibaba.com>
11632 * config/riscv/riscv.cc (riscv_compute_frame_info): Allocate frame for FCSR.
11633 (riscv_for_each_saved_reg): Save and restore FCSR in interrupt functions.
11634 * config/riscv/riscv.md (riscv_frcsr): New patterns.
11635 (riscv_fscsr): Likewise.
11637 2023-06-19 Toru Kisuki <tkisuki@tachyum.com>
11639 PR rtl-optimization/110305
11640 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
11641 Handle HONOR_SNANS for x + 0.0.
11643 2023-06-19 Jan Hubicka <jh@suse.cz>
11645 PR tree-optimization/109811
11646 PR tree-optimization/109849
11647 * passes.def: Add phiprop to early optimization passes.
11648 * tree-ssa-phiprop.cc: Allow clonning.
11650 2023-06-19 Tamar Christina <tamar.christina@arm.com>
11652 * config/aarch64/aarch64.md (arches): Add nosimd.
11653 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Rewrite to
11656 2023-06-19 Tamar Christina <tamar.christina@arm.com>
11657 Omar Tahir <Omar.Tahir2@arm.com>
11659 * gensupport.cc (class conlist, add_constraints, add_attributes,
11660 skip_spaces, expect_char, preprocess_compact_syntax,
11661 parse_section_layout, parse_section, convert_syntax): New.
11662 (process_rtx): Check for conversion.
11663 * genoutput.cc (process_template): Check for unresolved iterators.
11664 (class data): Add compact_syntax_p.
11665 (gen_insn): Use it.
11666 * gensupport.h (compact_syntax): New.
11667 (hash-set.h): Include.
11668 * doc/md.texi: Document it.
11670 2023-06-19 Uros Bizjak <ubizjak@gmail.com>
11672 * recog.h (check_asm_operands): Change return type from int to bool.
11673 (insn_invalid_p): Ditto.
11674 (verify_changes): Ditto.
11675 (apply_change_group): Ditto.
11676 (constrain_operands): Ditto.
11677 (constrain_operands_cached): Ditto.
11678 (validate_replace_rtx_subexp): Ditto.
11679 (validate_replace_rtx): Ditto.
11680 (validate_replace_rtx_part): Ditto.
11681 (validate_replace_rtx_part_nosimplify): Ditto.
11682 (added_clobbers_hard_reg_p): Ditto.
11683 (peep2_regno_dead_p): Ditto.
11684 (peep2_reg_dead_p): Ditto.
11685 (store_data_bypass_p): Ditto.
11686 (if_test_bypass_p): Ditto.
11687 * rtl.h (split_all_insns_noflow): Change
11688 return type from unsigned int to void.
11689 * genemit.cc (output_added_clobbers_hard_reg_p): Change return type
11690 of generated added_clobbers_hard_reg_p from int to bool and adjust
11691 function body accordingly. Change "used" variable type from
11693 * recog.cc (check_asm_operands): Change return type
11694 from int to bool and adjust function body accordingly.
11695 (insn_invalid_p): Ditto. Change "is_asm" variable to bool.
11696 (verify_changes): Change return type from int to bool.
11697 (apply_change_group): Change return type from int to bool
11698 and adjust function body accordingly.
11699 (validate_replace_rtx_subexp): Change return type from int to bool.
11700 (validate_replace_rtx): Ditto.
11701 (validate_replace_rtx_part): Ditto.
11702 (validate_replace_rtx_part_nosimplify): Ditto.
11703 (constrain_operands_cached): Ditto.
11704 (constrain_operands): Ditto. Change "lose" and "win"
11705 variables type from int to bool.
11706 (split_all_insns_noflow): Change return type from unsigned int
11707 to void and adjust function body accordingly.
11708 (peep2_regno_dead_p): Change return type from int to bool.
11709 (peep2_reg_dead_p): Ditto.
11710 (peep2_find_free_register): Change "success"
11711 variable type from int to bool
11712 (store_data_bypass_p_1): Change return type from int to bool.
11713 (store_data_bypass_p): Ditto.
11715 2023-06-19 Li Xu <xuli1@eswincomputing.com>
11717 * config/riscv/vector-iterators.md: zvfh/zvfhmin depends on the
11720 2023-06-19 Pan Li <pan2.li@intel.com>
11723 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
11725 * config/riscv/vector-iterators.md: Remove VWLMUL1, VWLMUL1_ZVE64,
11726 VWLMUL1_ZVE32, VI_ZVE64, VI_ZVE32, VWI, VWI_ZVE64, VWI_ZVE32,
11727 VF_ZVE63 and VF_ZVE32.
11728 * config/riscv/vector.md
11729 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Removed.
11730 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
11731 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>): Ditto.
11732 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
11733 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
11734 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): New pattern.
11735 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Ditto.
11736 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Ditto.
11737 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Ditto.
11738 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Ditto.
11740 2023-06-19 Pan Li <pan2.li@intel.com>
11743 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
11745 * config/riscv/vector-iterators.md: Add VHF, VSF, VDF,
11746 VHF_LMUL1, VSF_LMUL1, VDF_LMUL1, and remove unused attr.
11747 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): Removed.
11748 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
11749 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
11750 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
11751 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
11752 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
11753 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): New pattern.
11754 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Ditto.
11755 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Ditto.
11756 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Ditto.
11757 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Ditto.
11758 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Ditto.
11760 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
11762 * config/gcn/gcn.cc (gcn_expand_divmod_libfunc): New function.
11763 (gcn_init_libfuncs): Add div and mod functions for all modes.
11764 Add placeholders for divmod functions.
11765 (TARGET_EXPAND_DIVMOD_LIBFUNC): Define.
11767 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
11769 * tree-vect-generic.cc: Include optabs-libfuncs.h.
11770 (get_compute_type): Check optab_libfunc.
11771 * tree-vect-stmts.cc: Include optabs-libfuncs.h.
11772 (vectorizable_operation): Check optab_libfunc.
11774 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
11776 * config/gcn/gcn-protos.h (vgpr_4reg_mode_p): New function.
11777 * config/gcn/gcn-valu.md (V_4REG, V_4REG_ALT): New iterators.
11778 (V_MOV, V_MOV_ALT): Likewise.
11779 (scalar_mode, SCALAR_MODE): Add TImode.
11780 (vnsi, VnSI, vndi, VnDI): Likewise.
11781 (vec_merge, vec_merge_with_clobber, vec_merge_with_vcc): Use V_MOV.
11782 (mov<mode>, mov<mode>_unspec): Use V_MOV.
11783 (*mov<mode>_4reg): New insn.
11784 (mov<mode>_exec): New 4reg variant.
11785 (mov<mode>_sgprbase): Likewise.
11786 (reload_in<mode>, reload_out<mode>): Use V_MOV.
11787 (vec_set<mode>): Likewise.
11788 (vec_duplicate<mode><exec>): New 4reg variant.
11789 (vec_extract<mode><scalar_mode>): Likewise.
11790 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
11791 (vec_extract<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
11792 (vec_extract<V_4REG:mode><V_4REG_ALT:mode>_nop): New 4reg variant.
11793 (fold_extract_last_<mode>): Use V_MOV.
11794 (vec_init<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
11795 (vec_init<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
11796 (gather_load<mode><vnsi>, gather<mode>_expr<exec>,
11797 gather<mode>_insn_1offset<exec>, gather<mode>_insn_1offset_ds<exec>,
11798 gather<mode>_insn_2offsets<exec>): Use V_MOV.
11799 (scatter_store<mode><vnsi>, scatter<mode>_expr<exec_scatter>,
11800 scatter<mode>_insn_1offset<exec_scatter>,
11801 scatter<mode>_insn_1offset_ds<exec_scatter>,
11802 scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
11803 (maskload<mode>di, maskstore<mode>di, mask_gather_load<mode><vnsi>,
11804 mask_scatter_store<mode><vnsi>): Likewise.
11805 * config/gcn/gcn.cc (gcn_class_max_nregs): Use vgpr_4reg_mode_p.
11806 (gcn_hard_regno_mode_ok): Likewise.
11807 (GEN_VNM): Add TImode support.
11808 (USE_TI): New macro. Separate TImode operations from non-TImode ones.
11809 (gcn_vector_mode_supported_p): Add V64TImode, V32TImode, V16TImode,
11810 V8TImode, and V2TImode.
11811 (print_operand): Add 'J' and 'K' print codes.
11813 2023-06-19 Richard Biener <rguenther@suse.de>
11815 PR tree-optimization/110298
11816 * tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely):
11817 Clear number of iterations info before cleaning up the CFG.
11819 2023-06-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
11821 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
11822 Simplify vec_concat of lowpart subreg and high part vec_select.
11824 2023-06-19 Tobias Burnus <tobias@codesourcery.com>
11826 * doc/invoke.texi (-foffload-options): Remove '-O3' from the examples.
11828 2023-06-19 Richard Sandiford <richard.sandiford@arm.com>
11830 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
11831 Handle null niters_skip.
11833 2023-06-19 Richard Biener <rguenther@suse.de>
11835 * config/aarch64/aarch64.cc
11836 (aarch64_vector_costs::analyze_loop_vinfo): Fix reference
11837 to LOOP_VINFO_MASKS.
11839 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
11842 * common/config/avr/avr-common.cc: Remove setting
11843 of OPT_fdelete_null_pointer_checks.
11844 * config/avr/avr.cc (avr_option_override): Clear
11845 flag_delete_null_pointer_checks if zero_address_valid.
11846 (avr_addr_space_zero_address_valid): New function.
11847 (TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID): Provide target
11850 2023-06-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11851 Robin Dapp <rdapp.gcc@gmail.com>
11853 * doc/md.texi: Add len_mask{load,store}.
11854 * genopinit.cc (main): Ditto.
11856 * internal-fn.cc (len_maskload_direct): Ditto.
11857 (len_maskstore_direct): Ditto.
11858 (expand_call_mem_ref): Ditto.
11859 (expand_partial_load_optab_fn): Ditto.
11860 (expand_len_maskload_optab_fn): Ditto.
11861 (expand_partial_store_optab_fn): Ditto.
11862 (expand_len_maskstore_optab_fn): Ditto.
11863 (direct_len_maskload_optab_supported_p): Ditto.
11864 (direct_len_maskstore_optab_supported_p): Ditto.
11865 * internal-fn.def (LEN_MASK_LOAD): Ditto.
11866 (LEN_MASK_STORE): Ditto.
11867 * optabs.def (OPTAB_CD): Ditto.
11869 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
11871 * config/riscv/autovec.md (<optab><mode>2): Add unop expanders.
11873 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
11875 * config/riscv/autovec.md (<optab><mode>3): Implement binop
11877 * config/riscv/riscv-protos.h (emit_vlmax_fp_insn): Declare.
11878 (enum vxrm_field_enum): Rename this...
11879 (enum fixed_point_rounding_mode): ...to this.
11880 (enum frm_field_enum): Rename this...
11881 (enum floating_point_rounding_mode): ...to this.
11882 * config/riscv/riscv-v.cc (emit_vlmax_fp_insn): New function
11883 * config/riscv/riscv.cc (riscv_const_insns): Clarify const
11885 (riscv_libgcc_floating_mode_supported_p): Adjust comment.
11886 (riscv_excess_precision): Do not convert to float for ZVFH.
11887 * config/riscv/vector-iterators.md: Add VF_AUTO iterator.
11889 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
11891 * config/riscv/vector-iterators.md: Add VI_QH iterator.
11892 * config/riscv/autovec-opt.md
11893 (@pred_extract_first_sextdi<mode>): New vmv.x.s pattern
11894 that includes sign extension.
11895 (@pred_extract_first_sextsi<mode>): Dito for SImode.
11897 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
11899 * config/riscv/autovec.md (vec_set<mode>): Implement.
11900 (vec_extract<mode><vel>): Implement.
11901 * config/riscv/riscv-protos.h (enum insn_type): Add slide insn.
11902 (emit_vlmax_slide_insn): Declare.
11903 (emit_nonvlmax_slide_tu_insn): Declare.
11904 (emit_scalar_move_insn): Export.
11905 (emit_nonvlmax_integer_move_insn): Export.
11906 * config/riscv/riscv-v.cc (emit_vlmax_slide_insn): New function.
11907 (emit_nonvlmax_slide_tu_insn): New function.
11908 (emit_vlmax_masked_mu_insn): No change.
11909 (emit_vlmax_integer_move_insn): Export.
11911 2023-06-19 Richard Biener <rguenther@suse.de>
11913 * tree-vectorizer.h (enum vect_partial_vector_style): New.
11914 (_loop_vec_info::partial_vector_style): Likewise.
11915 (LOOP_VINFO_PARTIAL_VECTORS_STYLE): Likewise.
11916 (rgroup_controls::compare_type): Add.
11917 (vec_loop_masks): Change from a typedef to auto_vec<>
11919 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
11920 Adjust. Convert niters_skip to compare_type.
11921 (vect_set_loop_condition_partial_vectors_avx512): New function
11922 implementing the AVX512 partial vector codegen.
11923 (vect_set_loop_condition): Dispatch to the correct
11924 vect_set_loop_condition_partial_vectors_* function based on
11925 LOOP_VINFO_PARTIAL_VECTORS_STYLE.
11926 (vect_prepare_for_masked_peels): Compute LOOP_VINFO_MASK_SKIP_NITERS
11927 in the original niter type.
11928 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Initialize
11929 partial_vector_style.
11930 (can_produce_all_loop_masks_p): Adjust.
11931 (vect_verify_full_masking): Produce the rgroup_controls vector
11932 here. Set LOOP_VINFO_PARTIAL_VECTORS_STYLE on success.
11933 (vect_verify_full_masking_avx512): New function implementing
11934 verification of AVX512 style masking.
11935 (vect_verify_loop_lens): Set LOOP_VINFO_PARTIAL_VECTORS_STYLE.
11936 (vect_analyze_loop_2): Also try AVX512 style masking.
11938 (vect_estimate_min_profitable_iters): Implement AVX512 style
11939 mask producing cost.
11940 (vect_record_loop_mask): Do not build the rgroup_controls
11941 vector here but record masks in a hash-set.
11942 (vect_get_loop_mask): Implement AVX512 style mask query,
11943 complementing the existing while_ult style.
11945 2023-06-19 Richard Biener <rguenther@suse.de>
11947 * tree-vectorizer.h (vect_get_loop_mask): Add loop_vec_info
11949 * tree-vect-loop.cc (vect_get_loop_mask): Likewise.
11950 (vectorize_fold_left_reduction): Adjust.
11951 (vect_transform_reduction): Likewise.
11952 (vectorizable_live_operation): Likewise.
11953 * tree-vect-stmts.cc (vectorizable_call): Likewise.
11954 (vectorizable_operation): Likewise.
11955 (vectorizable_store): Likewise.
11956 (vectorizable_load): Likewise.
11957 (vectorizable_condition): Likewise.
11959 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
11962 * config/avr/avr.opt (mgas-isr-prologues, mmain-is-OS_task):
11963 Add Optimization option property.
11965 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
11967 * config/xtensa/xtensa.cc (xtensa_constantsynth_2insn):
11968 Add new pattern for the abovementioned case.
11970 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
11972 * config/xtensa/xtensa.cc
11973 (TARGET_MEMORY_MOVE_COST, xtensa_memory_move_cost): Remove.
11975 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
11977 * config/rs6000/rs6000.cc (TARGET_CONST_ANCHOR): New define.
11979 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
11981 * cse.cc (try_const_anchors): Check SCALAR_INT_MODE.
11983 2023-06-19 liuhongt <hongtao.liu@intel.com>
11986 * config/i386/sse.md (<sse2_avx2>_packsswb<mask_name>):
11988 (sse2_packsswb<mask_name>): .. this, ..
11989 (avx2_packsswb<mask_name>): .. this and ..
11990 (avx512bw_packsswb<mask_name>): .. this.
11991 (<sse2_avx2>_packssdw<mask_name>): Substitute with ..
11992 (sse2_packssdw<mask_name>): .. this, ..
11993 (avx2_packssdw<mask_name>): .. this and ..
11994 (avx512bw_packssdw<mask_name>): .. this.
11996 2023-06-19 liuhongt <hongtao.liu@intel.com>
11999 * config/i386/i386-expand.cc (ix86_split_mmx_pack): Use
12000 UNSPEC_US_TRUNCATE instead of original us_truncate for
12002 * config/i386/mmx.md (mmx_pack<s_trunsuffix>swb): Substitute
12004 (mmx_packsswb): .. this and ..
12005 (mmx_packuswb): .. this.
12006 (mmx_packusdw): Use UNSPEC_US_TRUNCATE instead of original
12008 (s_trunsuffix): Removed code iterator.
12009 (any_s_truncate): Ditto.
12010 * config/i386/sse.md (<sse2_avx2>_packuswb<mask_name>): Use
12011 UNSPEC_US_TRUNCATE instead of original us_truncate.
12012 (<sse4_1_avx2>_packusdw<mask_name>): Ditto.
12013 * config/i386/i386.md (UNSPEC_US_TRUNCATE): New unspec_c_enum.
12015 2023-06-18 Pan Li <pan2.li@intel.com>
12017 * config/riscv/riscv-vector-builtins-bases.cc: Fix one typo.
12019 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
12021 * rtl.h (*rtx_equal_p_callback_function):
12022 Change return type from int to bool.
12023 (rtx_equal_p): Ditto.
12024 (*hash_rtx_callback_function): Ditto.
12025 * rtl.cc (rtx_equal_p): Change return type from int to bool
12026 and adjust function body accordingly.
12027 * early-remat.cc (scratch_equal): Ditto.
12028 * sel-sched-ir.cc (skip_unspecs_callback): Ditto.
12029 (hash_with_unspec_callback): Ditto.
12031 2023-06-18 Jeff Law <jlaw@ventanamicro.com>
12033 * config/arc/arc.md (movqi_insn): Allow certain constants to
12034 be stored into memory in the pattern's condition.
12035 (movsf_insn): Similarly.
12037 2023-06-18 Honza <jh@ryzen3.suse.cz>
12039 PR tree-optimization/109849
12040 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Add new parameter
12041 ES; handle ipa_predicate::not_sra_candidate.
12042 (evaluate_properties_for_edge): Pass es to
12043 evaluate_conditions_for_known_args.
12044 (ipa_fn_summary_t::duplicate): Handle sra candidates.
12045 (dump_ipa_call_summary): Dump points_to_possible_sra_candidate.
12046 (load_or_store_of_ptr_parameter): New function.
12047 (points_to_possible_sra_candidate_p): New function.
12048 (analyze_function_body): Initialize points_to_possible_sra_candidate;
12049 determine sra predicates.
12050 (estimate_ipcp_clone_size_and_time): Update call of
12051 evaluate_conditions_for_known_args.
12052 (remap_edge_params): Update points_to_possible_sra_candidate.
12053 (read_ipa_call_summary): Stream points_to_possible_sra_candidate
12054 (write_ipa_call_summary): Likewise.
12055 * ipa-predicate.cc (ipa_predicate::add_clause): Handle not_sra_candidate.
12056 (dump_condition): Dump it.
12057 * ipa-predicate.h (struct inline_param_summary): Add
12058 points_to_possible_sra_candidate.
12060 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
12062 * config/i386/i386-expand.cc (ix86_expand_carry): New helper
12063 function for setting the carry flag.
12064 (ix86_expand_builtin) <handlecarry>: Use it here.
12065 * config/i386/i386-protos.h (ix86_expand_carry): Prototype here.
12066 * config/i386/i386.md (uaddc<mode>5): Use ix86_expand_carry.
12067 (usubc<mode>5): Likewise.
12069 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
12071 * config/i386/i386.md (*concat<mode><dwi>3_1): Use QImode
12072 for the immediate constant shift count.
12073 (*concat<mode><dwi>3_2): Likewise.
12074 (*concat<mode><dwi>3_3): Likewise.
12075 (*concat<mode><dwi>3_4): Likewise.
12076 (*concat<mode><dwi>3_5): Likewise.
12077 (*concat<mode><dwi>3_6): Likewise.
12079 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
12081 * cse.cc (hash_rtx_cb): Rename to hash_rtx.
12082 (hash_rtx): Remove.
12083 * early-remat.cc (remat_candidate_hasher::equal): Update
12084 to call rtx_equal_p with rtx_equal_p_callback_function argument.
12085 * rtl.cc (rtx_equal_p_cb): Rename to rtx_equal_p.
12086 (rtx_equal_p): Remove.
12087 * rtl.h (rtx_equal_p): Add rtx_equal_p_callback_function
12088 argument with NULL default value.
12089 (rtx_equal_p_cb): Remove function declaration.
12090 (hash_rtx_cb): Ditto.
12091 (hash_rtx): Add hash_rtx_callback_function argument
12092 with NULL default value.
12093 * sel-sched-ir.cc (free_nop_pool): Update function comment.
12094 (skip_unspecs_callback): Ditto.
12095 (vinsn_init): Update to call hash_rtx with
12096 hash_rtx_callback_function argument.
12097 (vinsn_equal_p): Ditto.
12099 2023-06-18 yulong <shiyulong@iscas.ac.cn>
12101 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
12102 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
12103 (ADJUST_ALIGNMENT): Ditto.
12104 (RVV_TUPLE_PARTIAL_MODES): Ditto.
12105 (ADJUST_NUNITS): Ditto.
12106 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
12108 (vfloat16mf4x3_t): Ditto.
12109 (vfloat16mf4x4_t): Ditto.
12110 (vfloat16mf4x5_t): Ditto.
12111 (vfloat16mf4x6_t): Ditto.
12112 (vfloat16mf4x7_t): Ditto.
12113 (vfloat16mf4x8_t): Ditto.
12114 (vfloat16mf2x2_t): Ditto.
12115 (vfloat16mf2x3_t): Ditto.
12116 (vfloat16mf2x4_t): Ditto.
12117 (vfloat16mf2x5_t): Ditto.
12118 (vfloat16mf2x6_t): Ditto.
12119 (vfloat16mf2x7_t): Ditto.
12120 (vfloat16mf2x8_t): Ditto.
12121 (vfloat16m1x2_t): Ditto.
12122 (vfloat16m1x3_t): Ditto.
12123 (vfloat16m1x4_t): Ditto.
12124 (vfloat16m1x5_t): Ditto.
12125 (vfloat16m1x6_t): Ditto.
12126 (vfloat16m1x7_t): Ditto.
12127 (vfloat16m1x8_t): Ditto.
12128 (vfloat16m2x2_t): Ditto.
12129 (vfloat16m2x3_t): Ditto.
12130 (vfloat16m2x4_t): Ditto.
12131 (vfloat16m4x2_t): Ditto.
12132 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
12133 (vfloat16mf4x3_t): Ditto.
12134 (vfloat16mf4x4_t): Ditto.
12135 (vfloat16mf4x5_t): Ditto.
12136 (vfloat16mf4x6_t): Ditto.
12137 (vfloat16mf4x7_t): Ditto.
12138 (vfloat16mf4x8_t): Ditto.
12139 (vfloat16mf2x2_t): Ditto.
12140 (vfloat16mf2x3_t): Ditto.
12141 (vfloat16mf2x4_t): Ditto.
12142 (vfloat16mf2x5_t): Ditto.
12143 (vfloat16mf2x6_t): Ditto.
12144 (vfloat16mf2x7_t): Ditto.
12145 (vfloat16mf2x8_t): Ditto.
12146 (vfloat16m1x2_t): Ditto.
12147 (vfloat16m1x3_t): Ditto.
12148 (vfloat16m1x4_t): Ditto.
12149 (vfloat16m1x5_t): Ditto.
12150 (vfloat16m1x6_t): Ditto.
12151 (vfloat16m1x7_t): Ditto.
12152 (vfloat16m1x8_t): Ditto.
12153 (vfloat16m2x2_t): Ditto.
12154 (vfloat16m2x3_t): Ditto.
12155 (vfloat16m2x4_t): Ditto.
12156 (vfloat16m4x2_t): Ditto.
12157 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
12158 * config/riscv/riscv.md: New.
12159 * config/riscv/vector-iterators.md: New.
12161 2023-06-17 Roger Sayle <roger@nextmovesoftware.com>
12163 * config/i386/i386-expand.cc (ix86_expand_move): Check that OP1 is
12164 CONST_WIDE_INT_P before calling ix86_convert_wide_int_to_broadcast.
12165 Generalize special case for converting TImode to V1TImode to handle
12166 all 128-bit vector conversions.
12168 2023-06-17 Costas Argyris <costas.argyris@gmail.com>
12170 * gcc-ar.cc (main): Refactor to slightly reduce code
12171 duplication. Avoid unnecessary elements in nargv.
12173 2023-06-16 Pan Li <pan2.li@intel.com>
12176 * config/riscv/riscv-vector-builtins-bases.cc: Add ret_mode for
12177 integer reduction expand.
12178 * config/riscv/vector-iterators.md: Add VQI, VHI, VSI and VDI,
12179 and the LMUL1 attr respectively.
12180 * config/riscv/vector.md
12181 (@pred_reduc_<reduc><mode><vlmul1>): Removed.
12182 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Likewise.
12183 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Likewise.
12184 (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>): New pattern.
12185 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Likewise.
12186 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Likewise.
12187 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Likewise.
12189 2023-06-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12192 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Fix bug.
12194 2023-06-16 Jakub Jelinek <jakub@redhat.com>
12196 PR middle-end/79173
12197 * builtin-types.def (BT_FN_UINT_UINT_UINT_UINT_UINTPTR,
12198 BT_FN_ULONG_ULONG_ULONG_ULONG_ULONGPTR,
12199 BT_FN_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONGPTR): New
12201 * builtins.def (BUILT_IN_ADDC, BUILT_IN_ADDCL, BUILT_IN_ADDCLL,
12202 BUILT_IN_SUBC, BUILT_IN_SUBCL, BUILT_IN_SUBCLL): New builtins.
12203 * builtins.cc (fold_builtin_addc_subc): New function.
12204 (fold_builtin_varargs): Handle BUILT_IN_{ADD,SUB}C{,L,LL}.
12205 * doc/extend.texi (__builtin_addc, __builtin_subc): Document.
12207 2023-06-16 Jakub Jelinek <jakub@redhat.com>
12209 PR tree-optimization/110271
12210 * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children)
12211 <case PLUS_EXPR>: Ignore return value from match_arith_overflow,
12212 instead call match_uaddc_usubc only if gsi_stmt (gsi) is still stmt.
12214 2023-06-16 Martin Jambor <mjambor@suse.cz>
12216 * configure: Regenerate.
12218 2023-06-16 Roger Sayle <roger@nextmovesoftware.com>
12219 Uros Bizjak <ubizjak@gmail.com>
12222 * config/i386/i386.md (*add<dwi>3_doubleword_concat): New
12223 define_insn_and_split combine *add<dwi>3_doubleword with
12224 a *concat<mode><dwi>3 for more efficient lowering after reload.
12226 2023-06-16 Vladimir N. Makarov <vmakarov@redhat.com>
12228 * ira-lives.cc: Include except.h.
12229 (process_bb_node_lives): Ignore conflicts from cleanup exceptions
12230 when the pseudo does not live at the exception landing pad.
12232 2023-06-16 Alex Coplan <alex.coplan@arm.com>
12234 * doc/invoke.texi: Document -Welaborated-enum-base.
12236 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12238 * config/aarch64/aarch64-simd-builtins.def (shrn2_n): Rename builtins to...
12239 (ushrn2_n): ... This.
12240 (sqshrn2_n): Rename builtins to...
12241 (ssqshrn2_n): ... This.
12242 (uqshrn2_n): Rename builtins to...
12243 (uqushrn2_n): ... This.
12244 * config/aarch64/arm_neon.h (vqshrn_high_n_s16): Adjust for the above.
12245 (vqshrn_high_n_s32): Likewise.
12246 (vqshrn_high_n_s64): Likewise.
12247 (vqshrn_high_n_u16): Likewise.
12248 (vqshrn_high_n_u32): Likewise.
12249 (vqshrn_high_n_u64): Likewise.
12250 (vshrn_high_n_s16): Likewise.
12251 (vshrn_high_n_s32): Likewise.
12252 (vshrn_high_n_s64): Likewise.
12253 (vshrn_high_n_u16): Likewise.
12254 (vshrn_high_n_u32): Likewise.
12255 (vshrn_high_n_u64): Likewise.
12256 * config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn2_n<mode>_insn_le):
12258 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_le): ... This.
12259 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
12260 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): Rename to...
12261 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_be): ... This.
12262 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
12263 (aarch64_<shrn_op>shrn2_n<mode>): Rename to...
12264 (aarch64_<shrn_op><sra_op>shrn2_n<mode>): ... This.
12265 Update expander for the above.
12267 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12269 * config/aarch64/aarch64-simd-builtins.def (shrn2): Rename builtins to...
12270 (shrn2_n): ... This.
12271 (rshrn2): Rename builtins to...
12272 (rshrn2_n): ... This.
12273 * config/aarch64/arm_neon.h (vrshrn_high_n_s16): Adjust for the above.
12274 (vrshrn_high_n_s32): Likewise.
12275 (vrshrn_high_n_s64): Likewise.
12276 (vrshrn_high_n_u16): Likewise.
12277 (vrshrn_high_n_u32): Likewise.
12278 (vrshrn_high_n_u64): Likewise.
12279 (vshrn_high_n_s16): Likewise.
12280 (vshrn_high_n_s32): Likewise.
12281 (vshrn_high_n_s64): Likewise.
12282 (vshrn_high_n_u16): Likewise.
12283 (vshrn_high_n_u32): Likewise.
12284 (vshrn_high_n_u64): Likewise.
12285 * config/aarch64/aarch64-simd.md (*aarch64_<srn_op>shrn<mode>2_vect_le):
12287 (*aarch64_<srn_op>shrn<mode>2_vect_be): Likewise.
12288 (aarch64_shrn2<mode>_insn_le): Likewise.
12289 (aarch64_shrn2<mode>_insn_be): Likewise.
12290 (aarch64_shrn2<mode>): Likewise.
12291 (aarch64_rshrn2<mode>_insn_le): Likewise.
12292 (aarch64_rshrn2<mode>_insn_be): Likewise.
12293 (aarch64_rshrn2<mode>): Likewise.
12294 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_le): Likewise.
12295 (aarch64_<shrn_op>shrn2_n<mode>_insn_le): New define_insn.
12296 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_be): Delete.
12297 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): New define_insn.
12298 (aarch64_<sur>q<r>shr<u>n2_n<mode>): Delete.
12299 (aarch64_<shrn_op>shrn2_n<mode>): New define_expand.
12300 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): New define_insn.
12301 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): New define_insn.
12302 (aarch64_<shrn_op>rshrn2_n<mode>): New define_expand.
12303 (aarch64_sqshrun2_n<mode>_insn_le): New define_insn.
12304 (aarch64_sqshrun2_n<mode>_insn_be): New define_insn.
12305 (aarch64_sqshrun2_n<mode>): New define_expand.
12306 (aarch64_sqrshrun2_n<mode>_insn_le): New define_insn.
12307 (aarch64_sqrshrun2_n<mode>_insn_be): New define_insn.
12308 (aarch64_sqrshrun2_n<mode>): New define_expand.
12309 * config/aarch64/iterators.md (UNSPEC_SQSHRUN, UNSPEC_SQRSHRUN,
12310 UNSPEC_SQSHRN, UNSPEC_UQSHRN, UNSPEC_SQRSHRN, UNSPEC_UQRSHRN):
12311 Delete unspec values.
12312 (VQSHRN_N): Delete int iterator.
12314 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12316 * config/aarch64/aarch64.h (AARCH64_VALID_SHRN_OP): Define.
12317 * config/aarch64/aarch64-simd.md
12318 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): Rename to...
12319 (*aarch64_<shrn_op><shrn_s>shrn_n<mode>_insn<vczle><vczbe>): ... This.
12320 Use SHIFTRT iterator and add AARCH64_VALID_SHRN_OP to condition.
12321 * config/aarch64/iterators.md (shrn_s): New code attribute.
12323 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12325 * config/aarch64/aarch64-simd.md (aarch64_<sur>q<r>shr<u>n_n<mode>):
12327 (aarch64_<shrn_op>shrn_n<mode>): ... This. Reimplement with RTL codes.
12328 (*aarch64_<shrn_op>rshrn_n<mode>_insn): New define_insn.
12329 (aarch64_sqrshrun_n<mode>_insn): Likewise.
12330 (aarch64_sqshrun_n<mode>_insn): Likewise.
12331 (aarch64_<shrn_op>rshrn_n<mode>): New define_expand.
12332 (aarch64_sqshrun_n<mode>): Likewise.
12333 (aarch64_sqrshrun_n<mode>): Likewise.
12334 * config/aarch64/iterators.md (V2XWIDE): Add HI and SI modes.
12336 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12338 * config/aarch64/aarch64-simd-builtins.def (shrn): Rename builtins to...
12339 (shrn_n): ... This.
12340 (rshrn): Rename builtins to...
12341 (rshrn_n): ... This.
12342 * config/aarch64/arm_neon.h (vshrn_n_s16): Adjust for the above.
12343 (vshrn_n_s32): Likewise.
12344 (vshrn_n_s64): Likewise.
12345 (vshrn_n_u16): Likewise.
12346 (vshrn_n_u32): Likewise.
12347 (vshrn_n_u64): Likewise.
12348 (vrshrn_n_s16): Likewise.
12349 (vrshrn_n_s32): Likewise.
12350 (vrshrn_n_s64): Likewise.
12351 (vrshrn_n_u16): Likewise.
12352 (vrshrn_n_u32): Likewise.
12353 (vrshrn_n_u64): Likewise.
12354 * config/aarch64/aarch64-simd.md
12355 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): Delete.
12356 (aarch64_shrn<mode>): Likewise.
12357 (aarch64_rshrn<mode><vczle><vczbe>_insn): Likewise.
12358 (aarch64_rshrn<mode>): Likewise.
12359 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): Likewise.
12360 (aarch64_<sur>q<r>shr<u>n_n<mode>): Likewise.
12361 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): New define_insn.
12362 (*aarch64_<shrn_op>rshrn_n<mode>_insn<vczle><vczbe>): Likewise.
12363 (*aarch64_sqshrun_n<mode>_insn<vczle><vczbe>): Likewise.
12364 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
12365 (aarch64_<shrn_op>shrn_n<mode>): New define_expand.
12366 (aarch64_<shrn_op>rshrn_n<mode>): Likewise.
12367 (aarch64_sqshrun_n<mode>): Likewise.
12368 (aarch64_sqrshrun_n<mode>): Likewise.
12369 * config/aarch64/iterators.md (ALL_TRUNC): New code iterator.
12370 (TRUNCEXTEND): New code attribute.
12371 (TRUNC_SHIFT): Likewise.
12372 (shrn_op): Likewise.
12373 * config/aarch64/predicates.md (aarch64_simd_umax_quarter_mode):
12376 2023-06-16 Pan Li <pan2.li@intel.com>
12378 * config/riscv/riscv-vsetvl.cc
12379 (pass_vsetvl::global_eliminate_vsetvl_insn): Initialize var by NULL.
12381 2023-06-16 Richard Biener <rguenther@suse.de>
12383 PR tree-optimization/110278
12384 * match.pd (uns < (typeof uns)(uns != 0) -> false): New.
12385 (x != (typeof x)(x == 0) -> true): Likewise.
12387 2023-06-16 Pali Rohár <pali@kernel.org>
12389 * config/i386/mingw-w64.h (CPP_SPEC): Adjust for -mcrtdll=.
12390 (REAL_LIBGCC_SPEC): New define.
12391 * config/i386/mingw.opt: Add mcrtdll=
12392 * config/i386/mingw32.h (CPP_SPEC): Adjust for -mcrtdll=.
12393 (REAL_LIBGCC_SPEC): Adjust for -mcrtdll=.
12394 (STARTFILE_SPEC): Adjust for -mcrtdll=.
12395 * doc/invoke.texi: Add mcrtdll= documentation.
12397 2023-06-16 Simon Dardis <simon.dardis@imgtec.com>
12399 * config/mips/mips.cc (enum mips_code_readable_setting):New enmu.
12400 (mips_handle_code_readable_attr):New static function.
12401 (mips_get_code_readable_attr):New static enum function.
12402 (mips_set_current_function):Set the code_readable mode.
12403 (mips_option_override):Same as above.
12404 * doc/extend.texi:Document code_readable.
12406 2023-06-16 Richard Biener <rguenther@suse.de>
12408 PR tree-optimization/110269
12409 * fold-const.cc (fold_binary_loc): Merge x != 0 folding
12410 with tree_expr_nonzero_p ...
12411 * match.pd (cmp (convert? addr@0) integer_zerop): With this
12414 2023-06-15 Marek Polacek <polacek@redhat.com>
12416 * Makefile.in: Set LD_PICFLAG. Use it. Set enable_host_pie.
12417 Remove NO_PIE_CFLAGS and NO_PIE_FLAG. Pass LD_PICFLAG to
12418 ALL_LINKERFLAGS. Use the "pic" build of libiberty if --enable-host-pie.
12419 * configure.ac (--enable-host-shared): Don't set PICFLAG here.
12420 (--enable-host-pie): New check. Set PICFLAG and LD_PICFLAG after this
12422 * configure: Regenerate.
12423 * doc/install.texi: Document --enable-host-pie.
12425 2023-06-15 Manolis Tsamis <manolis.tsamis@vrull.eu>
12427 * regcprop.cc (maybe_mode_change): Enable stack pointer
12430 2023-06-15 Andrew MacLeod <amacleod@redhat.com>
12432 PR tree-optimization/110266
12433 * gimple-range-fold.cc (adjust_imagpart_expr): Check for integer
12435 (adjust_realpart_expr): Ditto.
12437 2023-06-15 Jan Beulich <jbeulich@suse.com>
12439 * config/i386/sse.md (<avx512>_vec_dup<mode><mask_name>): Use
12442 2023-06-15 Jan Beulich <jbeulich@suse.com>
12444 * config/i386/constraints.md: Mention k and r for B.
12446 2023-06-15 Lulu Cheng <chenglulu@loongson.cn>
12447 Andrew Pinski <apinski@marvell.com>
12450 * config/loongarch/loongarch.md: Modify the register constraints for template
12451 "jumptable" and "indirect_jump" from "r" to "e".
12453 2023-06-15 Xi Ruoyao <xry111@xry111.site>
12455 * config/loongarch/loongarch-tune.h (loongarch_align): New
12457 * config/loongarch/loongarch-def.h (loongarch_cpu_align): New
12459 * config/loongarch/loongarch-def.c (loongarch_cpu_align): Define
12461 * config/loongarch/loongarch.cc
12462 (loongarch_option_override_internal): Set the value of
12463 -falign-functions= if -falign-functions is enabled but no value
12464 is given. Likewise for -falign-labels=.
12466 2023-06-15 Jakub Jelinek <jakub@redhat.com>
12468 PR middle-end/79173
12469 * internal-fn.def (UADDC, USUBC): New internal functions.
12470 * internal-fn.cc (expand_UADDC, expand_USUBC): New functions.
12471 (commutative_ternary_fn_p): Return true also for IFN_UADDC.
12472 * optabs.def (uaddc5_optab, usubc5_optab): New optabs.
12473 * tree-ssa-math-opts.cc (uaddc_cast, uaddc_ne0, uaddc_is_cplxpart,
12474 match_uaddc_usubc): New functions.
12475 (math_opts_dom_walker::after_dom_children): Call match_uaddc_usubc
12476 for PLUS_EXPR, MINUS_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR unless
12477 other optimizations have been successful for those.
12478 * gimple-fold.cc (gimple_fold_call): Handle IFN_UADDC and IFN_USUBC.
12479 * fold-const-call.cc (fold_const_call): Likewise.
12480 * gimple-range-fold.cc (adjust_imagpart_expr): Likewise.
12481 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Likewise.
12482 * doc/md.texi (uaddc<mode>5, usubc<mode>5): Document new named
12484 * config/i386/i386.md (uaddc<mode>5, usubc<mode>5): New
12485 define_expand patterns.
12486 (*setcc_qi_addqi3_cconly_overflow_1_<mode>, *setccc): Split
12487 into NOTE_INSN_DELETED note rather than nop instruction.
12488 (*setcc_qi_negqi_ccc_1_<mode>, *setcc_qi_negqi_ccc_2_<mode>):
12491 2023-06-15 Jakub Jelinek <jakub@redhat.com>
12493 PR middle-end/79173
12494 * config/i386/i386.md (subborrow<mode>): Add alternative with
12495 memory destination and add for it define_peephole2
12496 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer using memory
12497 destination in these patterns.
12499 2023-06-15 Jakub Jelinek <jakub@redhat.com>
12501 PR middle-end/79173
12502 * config/i386/i386.md (*sub<mode>_3, @add<mode>3_carry,
12503 addcarry<mode>, @sub<mode>3_carry, *add<mode>3_cc_overflow_1): Add
12504 define_peephole2 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer
12505 using memory destination in these patterns.
12507 2023-06-15 Jakub Jelinek <jakub@redhat.com>
12509 * gimple-fold.cc (gimple_fold_call): Move handling of arg0
12510 as well as arg1 INTEGER_CSTs for .UBSAN_CHECK_{ADD,SUB,MUL}
12511 and .{ADD,SUB,MUL}_OVERFLOW calls from here...
12512 * fold-const-call.cc (fold_const_call): ... here.
12514 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
12516 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>):
12517 Rename to <su>abd<mode>3.
12518 * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Rename
12521 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
12523 * doc/md.texi (sabd, uabd): Document them.
12524 * internal-fn.def (ABD): Use new optab.
12525 * optabs.def (sabd_optab, uabd_optab): New optabs,
12526 * tree-vect-patterns.cc (vect_recog_absolute_difference):
12527 Recognize the following idiom abs (a - b).
12528 (vect_recog_sad_pattern): Refactor to use
12529 vect_recog_absolute_difference.
12530 (vect_recog_abd_pattern): Use patterns found by
12531 vect_recog_absolute_difference to build a new ABD
12534 2023-06-15 chenxiaolong <chenxl04200420@163.com>
12536 * config/loongarch/loongarch.h (LARCH_CALL_RATIO): Modify the value
12537 of macro LARCH_CALL_RATIO on LoongArch to make it perform optimally.
12539 2023-06-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12541 * config/riscv/riscv-v.cc (shuffle_merge_patterns): New pattern.
12542 (expand_vec_perm_const_1): Add merge optmization.
12544 2023-06-15 Lehua Ding <lehua.ding@rivai.ai>
12547 * config/riscv/riscv.cc (riscv_get_arg_info): Return NULL_RTX for vector mode
12548 (riscv_pass_by_reference): Return true for vector mode
12550 2023-06-15 Pan Li <pan2.li@intel.com>
12552 * config/riscv/autovec-opt.md: Align the predictor sytle.
12553 * config/riscv/autovec.md: Ditto.
12555 2023-06-15 Pan Li <pan2.li@intel.com>
12557 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
12558 Take elen instead of scalar BITS_PER_WORD.
12559 (expand_vector_init_merge_repeating_sequence): Use inner_bits_size
12560 instead of scaler BITS_PER_WORD.
12562 2023-06-14 Jivan Hakobyan <jivanhakobyan9@gmail.com>
12564 * config/moxie/uclinux.h (MFWRAP_SPEC): Remove
12566 2023-06-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12568 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold):
12569 Fix signed comparison warning in loop from npats to enelts.
12571 2023-06-14 Thomas Schwinge <thomas@codesourcery.com>
12573 * gcc.cc (driver_handle_option): Forward host '-lgfortran', '-lm'
12574 to offloading compilation.
12575 * config/gcn/mkoffload.cc (main): Adjust.
12576 * config/nvptx/mkoffload.cc (main): Likewise.
12577 * doc/invoke.texi (foffload-options): Update example.
12579 2023-06-14 liuhongt <hongtao.liu@intel.com>
12582 * config/i386/sse.md (mov<mode>_internal>): Use x instead of v
12583 for alternative 2 since there's no evex version for vpcmpeqd
12586 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
12588 * gcc.cc (LINK_COMMAND_SPEC): Remove mudflap spec handling.
12590 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
12592 * config/sh/divtab.cc: Remove.
12594 2023-06-13 Jakub Jelinek <jakub@redhat.com>
12596 * config/i386/i386.cc (standard_sse_constant_opcode): Remove
12597 superfluous spaces around \t for vpcmpeqd.
12599 2023-06-13 Roger Sayle <roger@nextmovesoftware.com>
12601 * expr.cc (store_constructor) <case VECTOR_TYPE>: Don't bother
12602 clearing vectors with only a single element. Set CLEARED if the
12603 vector was initialized to zero.
12605 2023-06-13 Lehua Ding <lehua.ding@rivai.ai>
12607 * config/riscv/riscv-v.cc (struct mode_vtype_group): Remove duplicate
12610 (TUPLE_ENTRY): Undef.
12612 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12614 * config/riscv/riscv-v.cc (rvv_builder::single_step_npatterns_p): Add comment.
12615 (shuffle_generic_patterns): Ditto.
12616 (expand_vec_perm_const_1): Ditto.
12618 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12620 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): Fix bug.
12621 (shuffle_decompress_patterns): Ditto.
12623 2023-06-13 Richard Biener <rguenther@suse.de>
12625 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Free loop BBs.
12627 2023-06-13 Yanzhang Wang <yanzhang.wang@intel.com>
12628 Kito Cheng <kito.cheng@sifive.com>
12630 * config/riscv/riscv-protos.h (riscv_init_cumulative_args): Set
12631 warning flag if func is not builtin
12632 * config/riscv/riscv.cc
12633 (riscv_scalable_vector_type_p): Determine whether the type is scalable vector.
12634 (riscv_arg_has_vector): Determine whether the arg is vector type.
12635 (riscv_pass_in_vector_p): Check the vector type param is passed by value.
12636 (riscv_init_cumulative_args): The same as header.
12637 (riscv_get_arg_info): Add the checking.
12638 (riscv_function_value): Check the func return and set warning flag
12639 * config/riscv/riscv.h (INIT_CUMULATIVE_ARGS): Add a flag to
12640 determine whether warning psabi or not.
12642 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12644 * config/arm/arm-opts.h (enum arm_tp_type): Remove TP_CP15.
12645 Add TP_TPIDRURW, TP_TPIDRURO, TP_TPIDRPRW values.
12646 * config/arm/arm-protos.h (arm_output_load_tpidr): Declare prototype.
12647 * config/arm/arm.cc (arm_option_reconfigure_globals): Replace TP_CP15
12649 (arm_output_load_tpidr): Define.
12650 * config/arm/arm.h (TARGET_HARD_TP): Define in terms of TARGET_SOFT_TP.
12651 * config/arm/arm.md (load_tp_hard): Call arm_output_load_tpidr to output
12653 (reload_tp_hard): Likewise.
12654 * config/arm/arm.opt (tpidrurw, tpidruro, tpidrprw): New values for
12656 * doc/invoke.texi (Arm Options, mtp): Document new values.
12658 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12661 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Add
12662 AARCH64_TPIDRRO_EL0 value.
12663 * config/aarch64/aarch64.cc (aarch64_output_load_tp): Define.
12664 * config/aarch64/aarch64.opt (tpidr_el0, tpidr_el1, tpidr_el2,
12665 tpidr_el3, tpidrro_el3): New accepted values to -mtp=.
12666 * doc/invoke.texi (AArch64 Options): Document new -mtp= options.
12668 2023-06-13 Alexandre Oliva <oliva@adacore.com>
12670 * range-op-float.cc (frange_nextafter): Drop inline.
12671 (frelop_early_resolve): Add static.
12672 (frange_float): Likewise.
12674 2023-06-13 Richard Biener <rguenther@suse.de>
12676 PR middle-end/110232
12677 * fold-const.cc (native_interpret_vector): Use TYPE_SIZE_UNIT
12678 to check whether the buffer covers the whole vector.
12680 2023-06-13 Richard Biener <rguenther@suse.de>
12682 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): For
12683 .MASK_LOAD and friends set the size of the access to unknown.
12685 2023-06-13 Tejas Belagod <tbelagod@arm.com>
12688 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold): Fold sve
12689 calls that have a constant input predicate vector.
12690 (svlast_impl::is_lasta): Query to check if intrinsic is svlasta.
12691 (svlast_impl::is_lastb): Query to check if intrinsic is svlastb.
12692 (svlast_impl::vect_all_same): Check if all vector elements are equal.
12694 2023-06-13 Andi Kleen <ak@linux.intel.com>
12696 * config/i386/gcc-auto-profile: Regenerate.
12698 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12700 * config/riscv/vector-iterators.md: Fix requirement.
12702 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12704 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): New function.
12705 (shuffle_decompress_patterns): New function.
12706 (expand_vec_perm_const_1): Add decompress optimization.
12708 2023-06-12 Jeff Law <jlaw@ventanamicro.com>
12710 PR rtl-optimization/101188
12711 * postreload.cc (reload_cse_move2add_invalidate): New function,
12713 (reload_cse_move2add): Call reload_cse_move2add_invalidate.
12715 2023-06-12 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
12717 * config/aarch64/aarch64.cc (aarch64_expand_vector_init): Tweak condition
12718 if (n_var == n_elts && n_elts <= 16) to allow a single constant,
12719 and if maxv == 1, use constant element for duplicating into register.
12721 2023-06-12 Tobias Burnus <tobias@codesourcery.com>
12723 * gimplify.cc (gimplify_adjust_omp_clauses_1): Use
12724 GOMP_MAP_FORCE_PRESENT for 'present alloc' implicit mapping.
12725 (gimplify_adjust_omp_clauses): Change
12726 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC} to the equivalent
12727 GOMP_MAP_FORCE_PRESENT.
12728 * omp-low.cc (lower_omp_target): Remove handling of no-longer valid
12729 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC}; update map kinds used for
12730 to/from clauses with present modifier.
12732 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
12734 PR tree-optimization/110205
12735 * range-op-float.cc (range_operator::fold_range): Add default FII
12737 * range-op-mixed.h (class operator_gt): Add missing final overrides.
12738 * range-op.cc (range_op_handler::fold_range): Add RO_FII case.
12739 (operator_lshift ::update_bitmask): Add final override.
12740 (operator_rshift ::update_bitmask): Add final override.
12741 * range-op.h (range_operator::fold_range): Add FII prototype.
12743 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
12745 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
12746 Use range_op_handler directly.
12747 * range-op.cc (range_op_handler::range_op_handler): Unsigned
12748 param instead of tree-code.
12749 (ptr_op_widen_plus_signed): Delete.
12750 (ptr_op_widen_plus_unsigned): Delete.
12751 (ptr_op_widen_mult_signed): Delete.
12752 (ptr_op_widen_mult_unsigned): Delete.
12753 (range_op_table::initialize_integral_ops): Add new opcodes.
12754 * range-op.h (range_op_handler): Use unsigned.
12755 (OP_WIDEN_MULT_SIGNED): New.
12756 (OP_WIDEN_MULT_UNSIGNED): New.
12757 (OP_WIDEN_PLUS_SIGNED): New.
12758 (OP_WIDEN_PLUS_UNSIGNED): New.
12759 (RANGE_OP_TABLE_SIZE): New.
12760 (range_op_table::operator []): Use unsigned.
12761 (range_op_table::set): Use unsigned.
12762 (m_range_tree): Make unsigned.
12763 (ptr_op_widen_mult_signed): Remove.
12764 (ptr_op_widen_mult_unsigned): Remove.
12765 (ptr_op_widen_plus_signed): Remove.
12766 (ptr_op_widen_plus_unsigned): Remove.
12768 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
12770 * gimple-range-op.cc (gimple_range_op_handler): Set m_operator
12771 manually as there is no access to the default operator.
12772 (cfn_copysign::fold_range): Don't check for validity.
12773 (cfn_ubsan::fold_range): Ditto.
12774 (gimple_range_op_handler::maybe_builtin_call): Don't set to NULL.
12775 * range-op.cc (default_operator): New.
12776 (range_op_handler::range_op_handler): Use default_operator
12778 (range_op_handler::operator bool): Move from header, compare
12779 against default operator.
12780 (range_op_handler::range_op): New.
12781 * range-op.h (range_op_handler::operator bool): Move.
12783 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
12785 * range-op.cc (unified_table): Delete.
12786 (range_op_table operator_table): Instantiate.
12787 (range_op_table::range_op_table): Rename from unified_table.
12788 (range_op_handler::range_op_handler): Use range_op_table.
12789 * range-op.h (range_op_table::operator []): Inline.
12790 (range_op_table::set): Inline.
12792 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
12794 * gimple-range-gori.cc (gori_compute::condexpr_adjust): Do not
12796 * gimple-range-op.cc (get_code): Rename from get_code_and_type
12798 (gimple_range_op_handler::supported_p): No need for type.
12799 (gimple_range_op_handler::gimple_range_op_handler): Ditto.
12800 (cfn_copysign::fold_range): Ditto.
12801 (cfn_ubsan::fold_range): Ditto.
12802 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Ditto.
12803 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Ditto.
12804 * range-op-float.cc (operator_plus::op1_range): Ditto.
12805 (operator_mult::op1_range): Ditto.
12806 (range_op_float_tests): Ditto.
12807 * range-op.cc (get_op_handler): Remove.
12808 (range_op_handler::set_op_handler): Remove.
12809 (operator_plus::op1_range): No need for type.
12810 (operator_minus::op1_range): Ditto.
12811 (operator_mult::op1_range): Ditto.
12812 (operator_exact_divide::op1_range): Ditto.
12813 (operator_cast::op1_range): Ditto.
12814 (perator_bitwise_not::fold_range): Ditto.
12815 (operator_negate::fold_range): Ditto.
12816 * range-op.h (range_op_handler::range_op_handler): Remove type param.
12817 (range_cast): No need for type.
12818 (range_op_table::operator[]): Check for enum_code >= 0.
12819 * tree-data-ref.cc (compute_distributive_range): No need for type.
12820 * tree-ssa-loop-unswitch.cc (unswitch_predicate): Ditto.
12821 * value-query.cc (range_query::get_tree_range): Ditto.
12822 * value-relation.cc (relation_oracle::validate_relation): Ditto.
12823 * vr-values.cc (range_of_var_in_loop): Ditto.
12824 (simplify_using_ranges::fold_cond_with_ops): Ditto.
12826 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
12828 * range-op-mixed.h (operator_max): Remove final.
12829 * range-op-ptr.cc (pointer_table::pointer_table): Remove MAX_EXPR.
12830 (pointer_table::pointer_table): Remove.
12831 (class hybrid_max_operator): New.
12832 (range_op_table::initialize_pointer_ops): Add hybrid_max_operator.
12833 * range-op.cc (pointer_tree_table): Remove.
12834 (unified_table::unified_table): Comment out MAX_EXPR.
12835 (get_op_handler): Remove check of pointer table.
12836 * range-op.h (class pointer_table): Remove.
12838 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
12840 * range-op-mixed.h (operator_min): Remove final.
12841 * range-op-ptr.cc (pointer_table::pointer_table): Remove MIN_EXPR.
12842 (class hybrid_min_operator): New.
12843 (range_op_table::initialize_pointer_ops): Add hybrid_min_operator.
12844 * range-op.cc (unified_table::unified_table): Comment out MIN_EXPR.
12846 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
12848 * range-op-mixed.h (operator_bitwise_or): Remove final.
12849 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_IOR_EXPR.
12850 (class hybrid_or_operator): New.
12851 (range_op_table::initialize_pointer_ops): Add hybrid_or_operator.
12852 * range-op.cc (unified_table::unified_table): Comment out BIT_IOR_EXPR.
12854 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
12856 * range-op-mixed.h (operator_bitwise_and): Remove final.
12857 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_AND_EXPR.
12858 (class hybrid_and_operator): New.
12859 (range_op_table::initialize_pointer_ops): Add hybrid_and_operator.
12860 * range-op.cc (unified_table::unified_table): Comment out BIT_AND_EXPR.
12862 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
12864 * Makefile.in (OBJS): Add range-op-ptr.o.
12865 * range-op-mixed.h (update_known_bitmask): Move prototype here.
12866 (minus_op1_op2_relation_effect): Move prototype here.
12867 (wi_includes_zero_p): Move function to here.
12868 (wi_zero_p): Ditto.
12869 * range-op.cc (update_known_bitmask): Remove static.
12870 (wi_includes_zero_p): Move to header.
12871 (wi_zero_p): Move to header.
12872 (minus_op1_op2_relation_effect): Remove static.
12873 (operator_pointer_diff): Move class and routines to range-op-ptr.cc.
12874 (pointer_plus_operator): Ditto.
12875 (pointer_min_max_operator): Ditto.
12876 (pointer_and_operator): Ditto.
12877 (pointer_or_operator): Ditto.
12878 (pointer_table): Ditto.
12879 (range_op_table::initialize_pointer_ops): Ditto.
12880 * range-op-ptr.cc: New.
12882 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
12884 * range-op-mixed.h (class operator_max): Move from...
12885 * range-op.cc (unified_table::unified_table): Add MAX_EXPR.
12886 (get_op_handler): Remove the integral table.
12887 (class operator_max): Move from here.
12888 (integral_table::integral_table): Delete.
12889 * range-op.h (class integral_table): Delete.
12891 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
12893 * range-op-mixed.h (class operator_min): Move from...
12894 * range-op.cc (unified_table::unified_table): Add MIN_EXPR.
12895 (class operator_min): Move from here.
12896 (integral_table::integral_table): Remove MIN_EXPR.
12898 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
12900 * range-op-mixed.h (class operator_bitwise_or): Move from...
12901 * range-op.cc (unified_table::unified_table): Add BIT_IOR_EXPR.
12902 (class operator_bitwise_or): Move from here.
12903 (integral_table::integral_table): Remove BIT_IOR_EXPR.
12905 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
12907 * range-op-mixed.h (class operator_bitwise_and): Move from...
12908 * range-op.cc (unified_table::unified_table): Add BIT_AND_EXPR.
12909 (get_op_handler): Check for a pointer table entry first.
12910 (class operator_bitwise_and): Move from here.
12911 (integral_table::integral_table): Remove BIT_AND_EXPR.
12913 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
12915 * range-op-mixed.h (class operator_bitwise_xor): Move from...
12916 * range-op.cc (unified_table::unified_table): Add BIT_XOR_EXPR.
12917 (class operator_bitwise_xor): Move from here.
12918 (integral_table::integral_table): Remove BIT_XOR_EXPR.
12919 (pointer_table::pointer_table): Remove BIT_XOR_EXPR.
12921 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
12923 * range-op-mixed.h (class operator_bitwise_not): Move from...
12924 * range-op.cc (unified_table::unified_table): Add BIT_NOT_EXPR.
12925 (class operator_bitwise_not): Move from here.
12926 (integral_table::integral_table): Remove BIT_NOT_EXPR.
12927 (pointer_table::pointer_table): Remove BIT_NOT_EXPR.
12929 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
12931 * range-op-mixed.h (class operator_addr_expr): Move from...
12932 * range-op.cc (unified_table::unified_table): Add ADDR_EXPR.
12933 (class operator_addr_expr): Move from here.
12934 (integral_table::integral_table): Remove ADDR_EXPR.
12935 (pointer_table::pointer_table): Remove ADDR_EXPR.
12937 2023-06-12 Pan Li <pan2.li@intel.com>
12939 * config/riscv/riscv-vector-builtins-types.def
12940 (vfloat16m1_t): Add type to lmul1 ops.
12941 (vfloat16m2_t): Likewise.
12942 (vfloat16m4_t): Likewise.
12944 2023-06-12 Richard Biener <rguenther@suse.de>
12946 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): For
12947 .MASK_STORE and friend set the size of the access to
12950 2023-06-12 Tamar Christina <tamar.christina@arm.com>
12952 * config.in: Regenerate.
12953 * configure: Regenerate.
12954 * configure.ac: Remove DEFAULT_MATCHPD_PARTITIONS.
12956 2023-06-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12958 * config/riscv/autovec-opt.md
12959 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): New pattern.
12960 (*<any_shiftrt:optab>trunc<mode>): Ditto.
12961 * config/riscv/autovec.md (<optab><mode>3): Change to
12962 define_insn_and_split.
12963 (v<optab><mode>3): Ditto.
12964 (trunc<mode><v_double_trunc>2): Ditto.
12966 2023-06-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12968 * simplify-rtx.cc (simplify_const_unary_operation):
12969 Handle US_TRUNCATE, SS_TRUNCATE.
12971 2023-06-12 Eric Botcazou <ebotcazou@adacore.com>
12974 * doc/gm2.texi (Standard procedures): Fix Next link.
12976 2023-06-12 Tamar Christina <tamar.christina@arm.com>
12978 * config.in: Regenerate.
12980 2023-06-12 Andre Vieira <andre.simoesdiasvieira@arm.com>
12982 PR middle-end/110142
12983 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Don't pass
12984 subtype to vect_widened_op_tree and remove subtype parameter, also
12985 remove superfluous overloaded function definition.
12986 (vect_recog_widen_plus_pattern): Remove subtype parameter and dont pass
12987 to call to vect_recog_widen_op_pattern.
12988 (vect_recog_widen_minus_pattern): Likewise.
12990 2023-06-12 liuhongt <hongtao.liu@intel.com>
12992 * config/i386/sse.md (vec_pack<floatprefix>_float_<mode>): New expander.
12993 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
12994 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
12995 (vec_unpacks_lo_<mode>): Ditto.
12996 (vec_unpacks_hi_<mode>): Ditto.
12997 (sse_movlhps_<mode>): New define_insn.
12998 (ssse3_palignr<mode>_perm): Extend to V_128H.
12999 (V_128H): New mode iterator.
13000 (ssepackPHmode): New mode attribute.
13001 (vunpck_extract_mode): Ditto.
13002 (vpckfloat_concat_mode): Extend to VxSI/VxSF for _Float16.
13003 (vpckfloat_temp_mode): Ditto.
13004 (vpckfloat_op_mode): Ditto.
13005 (vunpckfixt_mode): Extend to VxHF.
13006 (vunpckfixt_model): Ditto.
13007 (vunpckfixt_extract_mode): Ditto.
13009 2023-06-12 Richard Biener <rguenther@suse.de>
13011 PR middle-end/110200
13012 * genmatch.cc (expr::gen_transform): Put braces around
13013 the if arm for the (convert ...) short-cut.
13015 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
13018 * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
13019 __builtin_unpack_vector_int128): Move from stanza power7 to vsx.
13021 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
13024 * config/rs6000/rs6000.cc (output_toc): Use the mode of the 128-bit
13025 floating constant itself for real_to_target call.
13027 2023-06-12 Pan Li <pan2.li@intel.com>
13029 * config/riscv/riscv-vector-builtins-types.def
13030 (vfloat16mf4_t): Add type to X2/X4/X8/X16/X32 vlmul ext ops.
13031 (vfloat16mf2_t): Ditto.
13032 (vfloat16m1_t): Ditto.
13033 (vfloat16m2_t): Ditto.
13034 (vfloat16m4_t): Ditto.
13036 2023-06-12 David Edelsohn <dje.gcc@gmail.com>
13038 * config/rs6000/rs6000-logue.cc (rs6000_stack_info):
13039 Do not require a stack frame when debugging is enabled for AIX.
13041 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
13043 * config/avr/avr.md (adjust_len) [insv_notbit_0, insv_notbit_7]:
13044 Remove attribute values.
13045 (insv_notbit): New post-reload insn.
13046 (*insv.not-shiftrt_split, *insv.xor1-bit.0_split)
13047 (*insv.not-bit.0_split, *insv.not-bit.7_split)
13048 (*insv.xor-extract_split): Split to insv_notbit.
13049 (*insv.not-shiftrt, *insv.xor1-bit.0, *insv.not-bit.0, *insv.not-bit.7)
13050 (*insv.xor-extract): Remove post-reload insns.
13051 * config/avr/avr.cc (avr_out_insert_notbit) [bitno]: Remove parameter.
13052 (avr_adjust_insn_length): Adjust call of avr_out_insert_notbit.
13053 [ADJUST_LEN_INSV_NOTBIT_0, ADJUST_LEN_INSV_NOTBIT_7]: Remove cases.
13054 * config/avr/avr-protos.h (avr_out_insert_notbit): Adjust prototype.
13056 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
13059 * config/avr/avr.md (adjust_len) [extr, extr_not]: New elements.
13060 (MSB, SIZE): New mode attributes.
13061 (any_shift): New code iterator.
13062 (*lshr<mode>3_split, *lshr<mode>3, lshr<mode>3)
13063 (*lshr<mode>3_const_split): Add constraint alternative for
13064 the case of shift-offset = MSB. Ditch "length" attribute.
13065 (extzv<mode): New. replaces extzv. Adjust following patterns.
13066 Use avr_out_extr, avr_out_extr_not to print asm.
13067 (*extzv.subreg.<mode>, *extzv.<mode>.subreg, *extzv.xor)
13068 (*extzv<mode>.ge, *neg.ashiftrt<mode>.msb, *extzv.io.lsr7): New.
13069 * config/avr/constraints.md (C15, C23, C31, Yil): New
13070 * config/avr/predicates.md (reg_or_low_io_operand)
13071 (const7_operand, reg_or_low_io_operand)
13072 (const15_operand, const_0_to_15_operand)
13073 (const23_operand, const_0_to_23_operand)
13074 (const31_operand, const_0_to_31_operand): New.
13075 * config/avr/avr-protos.h (avr_out_extr, avr_out_extr_not): New.
13076 * config/avr/avr.cc (avr_out_extr, avr_out_extr_not): New funcs.
13077 (lshrqi3_out, lshrhi3_out, lshrpsi3_out, lshrsi3_out): Adjust
13078 MSB case to new insn constraint "r" for operands[1].
13079 (avr_adjust_insn_length) [ADJUST_LEN_EXTR_NOT, ADJUST_LEN_EXTR]:
13080 Handle these cases.
13081 (avr_rtx_costs_1): Adjust cost for a new pattern.
13083 2023-06-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13085 * config/riscv/riscv-vsetvl.cc (available_occurrence_p): Enhance user vsetvl optimization.
13086 (vector_insn_info::parse_insn): Add rtx_insn parse.
13087 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance user vsetvl optimization.
13088 (get_first_vsetvl): New function.
13089 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
13090 (pass_vsetvl::cleanup_insns): Remove it.
13091 (pass_vsetvl::ssa_post_optimization): New function.
13092 (has_no_uses): Ditto.
13093 (pass_vsetvl::propagate_avl): Remove it.
13094 (pass_vsetvl::df_post_optimization): New function.
13095 (pass_vsetvl::lazy_vsetvl): Rework Phase 5 && Phase 6.
13096 * config/riscv/riscv-vsetvl.h: Adapt declaration.
13098 2023-06-10 Aldy Hernandez <aldyh@redhat.com>
13100 * ipa-cp.cc (ipcp_vr_lattice::init): Take type argument.
13101 (ipcp_vr_lattice::print): Call dump method.
13102 (ipcp_vr_lattice::meet_with): Adjust for m_vr being a
13104 (ipcp_vr_lattice::meet_with_1): Make argument a reference.
13105 (ipcp_vr_lattice::set_to_bottom): Set varying for an unsupported
13107 (initialize_node_lattices): Pass type when appropriate.
13108 (ipa_vr_operation_and_type_effects): Make type agnostic.
13109 (ipa_value_range_from_jfunc): Same.
13110 (propagate_vr_across_jump_function): Same.
13111 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
13112 (evaluate_properties_for_edge): Same.
13113 * ipa-prop.cc (ipa_vr::get_vrange): Same.
13114 (ipcp_update_vr): Same.
13115 * ipa-prop.h (ipa_value_range_from_jfunc): Same.
13116 (ipa_range_set_and_normalize): Same.
13118 2023-06-10 Georg-Johann Lay <avr@gjlay.de>
13122 * config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass.
13123 * config/avr/avr.cc (avr_pass_ifelse): New RTL pass.
13124 (avr_pass_data_ifelse): New pass_data for it.
13125 (make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost)
13126 (avr_canonicalize_comparison, avr_out_plus_set_ZN)
13127 (avr_out_cmp_ext): New functions.
13128 (compare_condtition): Make sure REG_CC dies in the branch insn.
13129 (avr_rtx_costs_1): Add computation of cbranch costs.
13130 (avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]:
13131 [ADJUST_LEN_CMP_SEXT]Handle them.
13132 (TARGET_CANONICALIZE_COMPARISON): New define.
13133 (avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern)
13134 (avr_reorg_remove_redundant_compare, avr_reorg): Remove functions.
13135 (TARGET_MACHINE_DEPENDENT_REORG): Remove define.
13136 * config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto.
13137 (make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx)
13138 (avr_out_cmp_zext): New Protos
13139 * config/avr/avr.md (branch, difficult_branch): Don't split insns.
13140 (*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1")
13141 (*swapped_tst<mode>, *add.for.eqne.<mode>): New insns.
13142 (*cbranch<mode>4): Rename to cbranch<mode>4_insn.
13143 (define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed.
13144 (define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed.
13145 Add new RTL peepholes for decrement-and-branch and *swapped_tst<mode>.
13146 Rework signtest-and-branch peepholes for *sbrx_branch<mode>.
13147 (adjust_len) [add_set_ZN, cmp_zext]: New.
13148 (QIPSI): New mode iterator.
13149 (ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators.
13150 (gelt): New code iterator.
13151 (gelt_eqne): New code attribute.
13152 (rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch)
13153 (branch_unspec, *negated_tst<mode>, *reversed_tst<mode>)
13154 (*cmpqi_sign_extend): Remove insns.
13155 (define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove.
13156 * config/avr/avr-dimode.md (cbranch<mode>4): Canonicalize comparisons.
13157 * config/avr/predicates.md (scratch_or_d_register_operand): New.
13158 * config/avr/constraints.md (Yxx): New constraint.
13160 2023-06-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13162 * config/riscv/autovec.md (select_vl<mode>): New pattern.
13163 * config/riscv/riscv-protos.h (expand_select_vl): New function.
13164 * config/riscv/riscv-v.cc (expand_select_vl): Ditto.
13166 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
13168 * range-op-float.cc (foperator_mult_div_base): Delete.
13169 (foperator_mult_div_base::find_range): Make static local function.
13170 (foperator_mult): Remove. Move prototypes to range-op-mixed.h
13171 (operator_mult::op1_range): Rename from foperator_mult.
13172 (operator_mult::op2_range): Ditto.
13173 (operator_mult::rv_fold): Ditto.
13174 (float_table::float_table): Remove MULT_EXPR.
13175 (class foperator_div): Inherit from range_operator.
13176 (float_table::float_table): Delete.
13177 * range-op-mixed.h (class operator_mult): Combined from integer
13179 * range-op.cc (float_tree_table): Delete.
13180 (op_mult): New object.
13181 (unified_table::unified_table): Add MULT_EXPR.
13182 (get_op_handler): Do not check float table any longer.
13183 (class cross_product_operator): Move to range-op-mixed.h.
13184 (class operator_mult): Move to range-op-mixed.h.
13185 (integral_table::integral_table): Remove MULT_EXPR.
13186 (pointer_table::pointer_table): Remove MULT_EXPR.
13187 * range-op.h (float_table): Remove.
13189 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
13191 * range-op-float.cc (foperator_negate): Remove. Move prototypes
13192 to range-op-mixed.h
13193 (operator_negate::fold_range): Rename from foperator_negate.
13194 (operator_negate::op1_range): Ditto.
13195 (float_table::float_table): Remove NEGATE_EXPR.
13196 * range-op-mixed.h (class operator_negate): Combined from integer
13198 * range-op.cc (op_negate): New object.
13199 (unified_table::unified_table): Add NEGATE_EXPR.
13200 (class operator_negate): Move to range-op-mixed.h.
13201 (integral_table::integral_table): Remove NEGATE_EXPR.
13202 (pointer_table::pointer_table): Remove NEGATE_EXPR.
13204 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
13206 * range-op-float.cc (foperator_minus): Remove. Move prototypes
13207 to range-op-mixed.h
13208 (operator_minus::fold_range): Rename from foperator_minus.
13209 (operator_minus::op1_range): Ditto.
13210 (operator_minus::op2_range): Ditto.
13211 (operator_minus::rv_fold): Ditto.
13212 (float_table::float_table): Remove MINUS_EXPR.
13213 * range-op-mixed.h (class operator_minus): Combined from integer
13215 * range-op.cc (op_minus): New object.
13216 (unified_table::unified_table): Add MINUS_EXPR.
13217 (class operator_minus): Move to range-op-mixed.h.
13218 (integral_table::integral_table): Remove MINUS_EXPR.
13219 (pointer_table::pointer_table): Remove MINUS_EXPR.
13221 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
13223 * range-op-float.cc (foperator_abs): Remove. Move prototypes
13224 to range-op-mixed.h
13225 (operator_abs::fold_range): Rename from foperator_abs.
13226 (operator_abs::op1_range): Ditto.
13227 (float_table::float_table): Remove ABS_EXPR.
13228 * range-op-mixed.h (class operator_abs): Combined from integer
13230 * range-op.cc (op_abs): New object.
13231 (unified_table::unified_table): Add ABS_EXPR.
13232 (class operator_abs): Move to range-op-mixed.h.
13233 (integral_table::integral_table): Remove ABS_EXPR.
13234 (pointer_table::pointer_table): Remove ABS_EXPR.
13236 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
13238 * range-op-float.cc (foperator_plus): Remove. Move prototypes
13239 to range-op-mixed.h
13240 (operator_plus::fold_range): Rename from foperator_plus.
13241 (operator_plus::op1_range): Ditto.
13242 (operator_plus::op2_range): Ditto.
13243 (operator_plus::rv_fold): Ditto.
13244 (float_table::float_table): Remove PLUS_EXPR.
13245 * range-op-mixed.h (class operator_plus): Combined from integer
13247 * range-op.cc (op_plus): New object.
13248 (unified_table::unified_table): Add PLUS_EXPR.
13249 (class operator_plus): Move to range-op-mixed.h.
13250 (integral_table::integral_table): Remove PLUS_EXPR.
13251 (pointer_table::pointer_table): Remove PLUS_EXPR.
13253 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
13255 * range-op-mixed.h (class operator_cast): Combined from integer
13257 * range-op.cc (op_cast): New object.
13258 (unified_table::unified_table): Add op_cast
13259 (class operator_cast): Move to range-op-mixed.h.
13260 (integral_table::integral_table): Remove op_cast
13261 (pointer_table::pointer_table): Remove op_cast.
13263 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
13265 * range-op-float.cc (operator_cst::fold_range): New.
13266 * range-op-mixed.h (class operator_cst): Move from integer file.
13267 * range-op.cc (op_cst): New object.
13268 (unified_table::unified_table): Add op_cst. Also use for REAL_CST.
13269 (class operator_cst): Move to range-op-mixed.h.
13270 (integral_table::integral_table): Remove op_cst.
13271 (pointer_table::pointer_table): Remove op_cst.
13273 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
13275 * range-op-float.cc (foperator_identity): Remove. Move prototypes
13276 to range-op-mixed.h
13277 (operator_identity::fold_range): Rename from foperator_identity.
13278 (operator_identity::op1_range): Ditto.
13279 (float_table::float_table): Remove fop_identity.
13280 * range-op-mixed.h (class operator_identity): Combined from integer
13282 * range-op.cc (op_identity): New object.
13283 (unified_table::unified_table): Add op_identity.
13284 (class operator_identity): Move to range-op-mixed.h.
13285 (integral_table::integral_table): Remove identity.
13286 (pointer_table::pointer_table): Remove identity.
13288 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
13290 * range-op-float.cc (foperator_ge): Remove. Move prototypes
13291 to range-op-mixed.h
13292 (operator_ge::fold_range): Rename from foperator_ge.
13293 (operator_ge::op1_range): Ditto.
13294 (float_table::float_table): Remove GE_EXPR.
13295 * range-op-mixed.h (class operator_ge): Combined from integer
13297 * range-op.cc (op_ge): New object.
13298 (unified_table::unified_table): Add GE_EXPR.
13299 (class operator_ge): Move to range-op-mixed.h.
13300 (ge_op1_op2_relation): Fold into
13301 operator_ge::op1_op2_relation.
13302 (integral_table::integral_table): Remove GE_EXPR.
13303 (pointer_table::pointer_table): Remove GE_EXPR.
13304 * range-op.h (ge_op1_op2_relation): Delete.
13306 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
13308 * range-op-float.cc (foperator_gt): Remove. Move prototypes
13309 to range-op-mixed.h
13310 (operator_gt::fold_range): Rename from foperator_gt.
13311 (operator_gt::op1_range): Ditto.
13312 (float_table::float_table): Remove GT_EXPR.
13313 * range-op-mixed.h (class operator_gt): Combined from integer
13315 * range-op.cc (op_gt): New object.
13316 (unified_table::unified_table): Add GT_EXPR.
13317 (class operator_gt): Move to range-op-mixed.h.
13318 (gt_op1_op2_relation): Fold into
13319 operator_gt::op1_op2_relation.
13320 (integral_table::integral_table): Remove GT_EXPR.
13321 (pointer_table::pointer_table): Remove GT_EXPR.
13322 * range-op.h (gt_op1_op2_relation): Delete.
13324 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
13326 * range-op-float.cc (foperator_le): Remove. Move prototypes
13327 to range-op-mixed.h
13328 (operator_le::fold_range): Rename from foperator_le.
13329 (operator_le::op1_range): Ditto.
13330 (float_table::float_table): Remove LE_EXPR.
13331 * range-op-mixed.h (class operator_le): Combined from integer
13333 * range-op.cc (op_le): New object.
13334 (unified_table::unified_table): Add LE_EXPR.
13335 (class operator_le): Move to range-op-mixed.h.
13336 (le_op1_op2_relation): Fold into
13337 operator_le::op1_op2_relation.
13338 (integral_table::integral_table): Remove LE_EXPR.
13339 (pointer_table::pointer_table): Remove LE_EXPR.
13340 * range-op.h (le_op1_op2_relation): Delete.
13342 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
13344 * range-op-float.cc (foperator_lt): Remove. Move prototypes
13345 to range-op-mixed.h
13346 (operator_lt::fold_range): Rename from foperator_lt.
13347 (operator_lt::op1_range): Ditto.
13348 (float_table::float_table): Remove LT_EXPR.
13349 * range-op-mixed.h (class operator_lt): Combined from integer
13351 * range-op.cc (op_lt): New object.
13352 (unified_table::unified_table): Add LT_EXPR.
13353 (class operator_lt): Move to range-op-mixed.h.
13354 (lt_op1_op2_relation): Fold into
13355 operator_lt::op1_op2_relation.
13356 (integral_table::integral_table): Remove LT_EXPR.
13357 (pointer_table::pointer_table): Remove LT_EXPR.
13358 * range-op.h (lt_op1_op2_relation): Delete.
13360 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
13362 * range-op-float.cc (foperator_not_equal): Remove. Move prototypes
13363 to range-op-mixed.h
13364 (operator_equal::fold_range): Rename from foperator_not_equal.
13365 (operator_equal::op1_range): Ditto.
13366 (float_table::float_table): Remove NE_EXPR.
13367 * range-op-mixed.h (class operator_not_equal): Combined from integer
13369 * range-op.cc (op_equal): New object.
13370 (unified_table::unified_table): Add NE_EXPR.
13371 (class operator_not_equal): Move to range-op-mixed.h.
13372 (not_equal_op1_op2_relation): Fold into
13373 operator_not_equal::op1_op2_relation.
13374 (integral_table::integral_table): Remove NE_EXPR.
13375 (pointer_table::pointer_table): Remove NE_EXPR.
13376 * range-op.h (not_equal_op1_op2_relation): Delete.
13378 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
13380 * range-op-float.cc (foperator_equal): Remove. Move prototypes
13381 to range-op-mixed.h
13382 (operator_equal::fold_range): Rename from foperator_equal.
13383 (operator_equal::op1_range): Ditto.
13384 (float_table::float_table): Remove EQ_EXPR.
13385 * range-op-mixed.h (class operator_equal): Combined from integer
13387 * range-op.cc (op_equal): New object.
13388 (unified_table::unified_table): Add EQ_EXPR.
13389 (class operator_equal): Move to range-op-mixed.h.
13390 (equal_op1_op2_relation): Fold into
13391 operator_equal::op1_op2_relation.
13392 (integral_table::integral_table): Remove EQ_EXPR.
13393 (pointer_table::pointer_table): Remove EQ_EXPR.
13394 * range-op.h (equal_op1_op2_relation): Delete.
13396 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
13398 * range-op-float.cc (class float_table): Move to header.
13399 (float_table::float_table): Move float only operators to...
13400 (range_op_table::initialize_float_ops): Here.
13401 * range-op-mixed.h: New.
13402 * range-op.cc (integral_tree_table, pointer_tree_table): Moved
13404 (float_tree_table): Moved from range-op-float.cc.
13405 (unified_tree_table): New.
13406 (unified_table::unified_table): New. Call initialize routines.
13407 (get_op_handler): Check unified table first.
13408 (range_op_handler::range_op_handler): Handle no type constructor.
13409 (integral_table::integral_table): Move integral only operators to...
13410 (range_op_table::initialize_integral_ops): Here.
13411 (pointer_table::pointer_table): Move pointer only operators to...
13412 (range_op_table::initialize_pointer_ops): Here.
13413 * range-op.h (enum bool_range_state): Move to range-op-mixed.h.
13414 (get_bool_state): Ditto.
13415 (empty_range_varying): Ditto.
13416 (relop_early_resolve): Ditto.
13417 (class range_op_table): Add new init methods for range types.
13418 (class integral_table): Move declaration to here.
13419 (class pointer_table): Move declaration to here.
13420 (class float_table): Move declaration to here.
13422 2023-06-09 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13423 Richard Sandiford <richard.sandiford@arm.com>
13424 Richard Biener <rguenther@suse.de>
13426 * doc/md.texi: Add SELECT_VL support.
13427 * internal-fn.def (SELECT_VL): Ditto.
13428 * optabs.def (OPTAB_D): Ditto.
13429 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Ditto.
13430 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Ditto.
13431 * tree-vect-stmts.cc (get_select_vl_data_ref_ptr): Ditto.
13432 (vectorizable_store): Ditto.
13433 (vectorizable_load): Ditto.
13434 * tree-vectorizer.h (LOOP_VINFO_USING_SELECT_VL_P): Ditto.
13436 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
13439 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Check param
13442 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
13444 * range-op.cc (range_cast): Move to...
13445 * range-op.h (range_cast): Here and add generic a version.
13447 2023-06-09 Marek Polacek <polacek@redhat.com>
13451 * doc/invoke.texi: Clarify that -Wmissing-field-initializers doesn't
13452 warn about designated initializers in C only.
13454 2023-06-09 Andrew Pinski <apinski@marvell.com>
13456 PR tree-optimization/97711
13457 PR tree-optimization/110155
13458 * match.pd ((zero_one == 0) ? y : z <op> y): Add plus to the op.
13459 ((zero_one != 0) ? z <op> y : y): Likewise.
13461 2023-06-09 Andrew Pinski <apinski@marvell.com>
13463 * match.pd ((zero_one ==/!= 0) ? y : z <op> y): Use
13464 multiply rather than negation/bit_and.
13466 2023-06-09 Andrew Pinski <apinski@marvell.com>
13468 * match.pd (`X & -Y -> X * Y`): Allow for truncation
13469 and the same type for unsigned types.
13471 2023-06-09 Andrew Pinski <apinski@marvell.com>
13473 PR tree-optimization/110165
13474 PR tree-optimization/110166
13475 * match.pd (zero_one_valued_p): Don't accept
13476 signed 1-bit integers.
13478 2023-06-09 Richard Biener <rguenther@suse.de>
13480 * match.pd (two conversions in a row): Use element_precision
13481 to DTRT for VECTOR_TYPE.
13483 2023-06-09 Pan Li <pan2.li@intel.com>
13485 * config/riscv/riscv.md (enabled): Move to another place, and
13486 add fp_vector_disabled to the cond.
13487 (fp_vector_disabled): New attr defined for disabling fp.
13488 * config/riscv/vector-iterators.md: Fix V_WHOLE and V_FRACT.
13490 2023-06-09 Pan Li <pan2.li@intel.com>
13492 * config/riscv/riscv-protos.h (enum frm_field_enum): Adjust
13495 2023-06-09 liuhongt <hongtao.liu@intel.com>
13498 * config/i386/i386.cc (ix86_gimple_fold_builtin): Explicitly
13499 view_convert_expr mask to signed type when folding pblendvb
13502 2023-06-09 liuhongt <hongtao.liu@intel.com>
13505 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
13506 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} into gimple
13507 ABSU_EXPR + VCE, don't fold _mm_abs_{pi8,pi16,pi32} w/o
13509 * config/i386/i386-builtin.def: Replace CODE_FOR_nothing with
13510 real codename for __builtin_ia32_pabs{b,w,d}.
13512 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
13514 * gimple-range-op.cc
13515 (gimple_range_op_handler::gimple_range_op_handler): Adjust.
13516 (gimple_range_op_handler::maybe_builtin_call): Adjust.
13517 * gimple-range-op.h (operand1, operand2): Use m_operator.
13518 * range-op.cc (integral_table, pointer_table): Relocate.
13519 (get_op_handler): Rename from get_handler and handle all types.
13520 (range_op_handler::range_op_handler): Relocate.
13521 (range_op_handler::set_op_handler): Relocate and adjust.
13522 (range_op_handler::range_op_handler): Relocate.
13523 (dispatch_trio): New.
13524 (RO_III, RO_IFI, RO_IFF, RO_FFF, RO_FIF, RO_FII): New consts.
13525 (range_op_handler::dispatch_kind): New.
13526 (range_op_handler::fold_range): Relocate and Use new dispatch value.
13527 (range_op_handler::op1_range): Ditto.
13528 (range_op_handler::op2_range): Ditto.
13529 (range_op_handler::lhs_op1_relation): Ditto.
13530 (range_op_handler::lhs_op2_relation): Ditto.
13531 (range_op_handler::op1_op2_relation): Ditto.
13532 (range_op_handler::set_op_handler): Use m_operator member.
13533 * range-op.h (range_op_handler::operator bool): Use m_operator.
13534 (range_op_handler::dispatch_kind): New.
13535 (range_op_handler::m_valid): Delete.
13536 (range_op_handler::m_int): Delete
13537 (range_op_handler::m_float): Delete
13538 (range_op_handler::m_operator): New.
13539 (range_op_table::operator[]): Relocate from .cc file.
13540 (range_op_table::set): Ditto.
13541 * value-range.h (class vrange): Make range_op_handler a friend.
13543 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
13545 * gimple-range-op.cc (cfn_constant_float_p): Change base class.
13546 (cfn_pass_through_arg1): Adjust using statemenmt.
13547 (cfn_signbit): Change base class, adjust using statement.
13548 (cfn_copysign): Ditto.
13550 (cfn_sincos): Ditto.
13551 * range-op-float.cc (fold_range): Change class to range_operator.
13555 (lhs_op1_relation): Ditto.
13556 (lhs_op2_relation): Ditto.
13557 (op1_op2_relation): Ditto.
13558 (foperator_*): Ditto.
13559 (class float_table): New. Inherit from range_op_table.
13560 (floating_tree_table) Change to range_op_table pointer.
13561 (class floating_op_table): Delete.
13562 * range-op.cc (operator_equal): Adjust using statement.
13563 (operator_not_equal): Ditto.
13564 (operator_lt, operator_le, operator_gt, operator_ge): Ditto.
13565 (operator_minus, operator_cast): Ditto.
13566 (operator_bitwise_and, pointer_plus_operator): Ditto.
13567 (get_float_handle): Change return type.
13568 * range-op.h (range_operator_float): Delete. Relocate all methods
13569 into class range_operator.
13570 (range_op_handler::m_float): Change type to range_operator.
13571 (floating_op_table): Delete.
13572 (floating_tree_table): Change type.
13574 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
13576 * range-op.cc (range_operator::fold_range): Call virtual routine.
13577 (range_operator::update_bitmask): New.
13578 (operator_equal::update_bitmask): New.
13579 (operator_not_equal::update_bitmask): New.
13580 (operator_lt::update_bitmask): New.
13581 (operator_le::update_bitmask): New.
13582 (operator_gt::update_bitmask): New.
13583 (operator_ge::update_bitmask): New.
13584 (operator_ge::update_bitmask): New.
13585 (operator_plus::update_bitmask): New.
13586 (operator_minus::update_bitmask): New.
13587 (operator_pointer_diff::update_bitmask): New.
13588 (operator_min::update_bitmask): New.
13589 (operator_max::update_bitmask): New.
13590 (operator_mult::update_bitmask): New.
13591 (operator_div:operator_div):New.
13592 (operator_div::update_bitmask): New.
13593 (operator_div::m_code): New member.
13594 (operator_exact_divide::operator_exact_divide): New constructor.
13595 (operator_lshift::update_bitmask): New.
13596 (operator_rshift::update_bitmask): New.
13597 (operator_bitwise_and::update_bitmask): New.
13598 (operator_bitwise_or::update_bitmask): New.
13599 (operator_bitwise_xor::update_bitmask): New.
13600 (operator_trunc_mod::update_bitmask): New.
13601 (op_ident, op_unknown, op_ptr_min_max): New.
13602 (op_nop, op_convert): Delete.
13603 (op_ssa, op_paren, op_obj_type): Delete.
13604 (op_realpart, op_imagpart): Delete.
13605 (op_ptr_min, op_ptr_max): Delete.
13606 (pointer_plus_operator:update_bitmask): New.
13607 (range_op_table::set): Do not use m_code.
13608 (integral_table::integral_table): Adjust to single instances.
13609 * range-op.h (range_operator::range_operator): Delete.
13610 (range_operator::m_code): Delete.
13611 (range_operator::update_bitmask): New.
13613 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
13615 * range-op-float.cc (range_operator_float::fold_range): Return
13616 NAN of the result type.
13618 2023-06-08 Jakub Jelinek <jakub@redhat.com>
13620 * optabs.cc (expand_ffs): Add forward declaration.
13621 (expand_doubleword_clz): Rename to ...
13622 (expand_doubleword_clz_ctz_ffs): ... this. Add UNOPTAB argument,
13623 handle also doubleword CTZ and FFS in addition to CLZ.
13624 (expand_unop): Adjust caller. Also call it for doubleword
13625 ctz_optab and ffs_optab.
13627 2023-06-08 Jakub Jelinek <jakub@redhat.com>
13630 * config/i386/i386-expand.cc (ix86_expand_vector_init_general): For
13631 n_words == 2 recurse with mmx_ok as first argument rather than false.
13633 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
13635 * wide-int.cc (wi::bitreverse_large): Use HOST_WIDE_INT_1U to
13636 avoid sign extension/undefined behaviour when setting each bit.
13638 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
13639 Uros Bizjak <ubizjak@gmail.com>
13641 * config/i386/i386-expand.cc (ix86_expand_builtin) <handlecarry>:
13642 Use new x86_stc instruction when the carry flag must be set.
13643 * config/i386/i386.cc (ix86_cc_mode): Use CCCmode for *x86_cmc.
13644 (ix86_rtx_costs): Provide accurate rtx_costs for *x86_cmc.
13645 * config/i386/i386.h (TARGET_SLOW_STC): New define.
13646 * config/i386/i386.md (UNSPEC_STC): New UNSPEC for stc.
13647 (x86_stc): New define_insn.
13648 (define_peephole2): Convert x86_stc into alternate implementation
13649 on pentium4 without -Os when a QImode register is available.
13650 (*x86_cmc): New define_insn.
13651 (define_peephole2): Convert *x86_cmc into alternate implementation
13652 on pentium4 without -Os when a QImode register is available.
13653 (*setccc): New define_insn_and_split for a no-op CCCmode move.
13654 (*setcc_qi_negqi_ccc_1_<mode>): New define_insn_and_split to
13655 recognize (and eliminate) the carry flag being copied to itself.
13656 (*setcc_qi_negqi_ccc_2_<mode>): Likewise.
13657 * config/i386/x86-tune.def (X86_TUNE_SLOW_STC): New tuning flag.
13659 2023-06-07 Andrew Pinski <apinski@marvell.com>
13661 * match.pd: Fix comment for the
13662 `(zero_one ==/!= 0) ? y : z <op> y` patterns.
13664 2023-06-07 Jeff Law <jlaw@ventanamicro.com>
13665 Jeff Law <jlaw@ventanamicro.com>
13667 * config/riscv/bitmanip.md (rotrdi3, rotrsi3, rotlsi3): New expanders.
13668 (rotrsi3_sext): Expose generator.
13669 (rotlsi3 pattern): Hide generator.
13670 * config/riscv/riscv-protos.h (riscv_emit_binary): New function
13672 * config/riscv/riscv.cc (riscv_emit_binary): Removed static
13673 * config/riscv/riscv.md (addsi3, subsi3, negsi2): Hide generator.
13674 (mulsi3, <optab>si3): Likewise.
13675 (addsi3, subsi3, negsi2, mulsi3, <optab>si3): New expanders.
13676 (addv<mode>4, subv<mode>4, mulv<mode>4): Use riscv_emit_binary.
13677 (<u>mulsidi3): Likewise.
13678 (addsi3_extended, subsi3_extended, negsi2_extended): Expose generator.
13679 (mulsi3_extended, <optab>si3_extended): Likewise.
13680 (splitter for shadd feeding divison): Update RTL pattern to account
13681 for changes in how 32 bit ops are expanded for TARGET_64BIT.
13682 * loop-iv.cc (get_biv_step_1): Process src of extension when it PLUS.
13684 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
13687 * config/riscv/riscv.cc (riscv_print_operand): Calculate
13688 memmodel only when it is valid.
13690 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
13692 * config/riscv/riscv.cc (riscv_const_insns): Recursively call
13693 for constant element of a vector.
13695 2023-06-07 Jakub Jelinek <jakub@redhat.com>
13697 * match.pd (zero_one_valued_p): Don't handle integer_zerop specially,
13698 instead compare tree_nonzero_bits <= 1U rather than just == 1.
13700 2023-06-07 Alex Coplan <alex.coplan@arm.com>
13703 * config/aarch64/aarch64-builtins.cc (aarch64_general_simulate_builtin):
13705 (aarch64_init_ls64_builtins): ... here. Switch to declaring public ACLE
13706 names for builtins.
13707 (aarch64_general_init_builtins): Ensure we invoke the arm_acle.h
13708 setup if in_lto_p, just like we do for SVE.
13709 * config/aarch64/arm_acle.h: (__arm_ld64b): Delete.
13710 (__arm_st64b): Delete.
13711 (__arm_st64bv): Delete.
13712 (__arm_st64bv0): Delete.
13714 2023-06-07 Alex Coplan <alex.coplan@arm.com>
13717 * config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64):
13718 Use input operand for the destination address.
13719 * config/aarch64/aarch64.md (st64b): Fix constraint on address
13722 2023-06-07 Alex Coplan <alex.coplan@arm.com>
13725 * config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types):
13726 Replace eight consecutive spaces with tabs.
13727 (aarch64_init_ls64_builtins): Likewise.
13728 (aarch64_expand_builtin_ls64): Likewise.
13729 * config/aarch64/aarch64.md (ld64b): Likewise.
13732 (st64bv0): Likewise.
13734 2023-06-07 Vladimir N. Makarov <vmakarov@redhat.com>
13736 * ira-costs.cc: (find_costs_and_classes): Constrain classes of pic
13737 offset table pseudo to a general reg subset.
13739 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13741 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode><vczle><vczbe>):
13743 (*aarch64_sqmovun<mode>_insn<vczle><vczbe>): ... This. Reimplement
13745 (aarch64_sqmovun<mode> [SD_HSDI]): Reimplement with RTL codes.
13746 (aarch64_sqxtun2<mode>_le): Likewise.
13747 (aarch64_sqxtun2<mode>_be): Likewise.
13748 (aarch64_sqxtun2<mode>): Adjust for the above.
13749 (aarch64_sqmovun<mode>): New define_expand.
13750 * config/aarch64/iterators.md (UNSPEC_SQXTUN): Delete.
13751 (half_mask): New mode attribute.
13752 * config/aarch64/predicates.md (aarch64_simd_umax_half_mode):
13755 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13757 * config/aarch64/aarch64-simd.md (aarch64_addp<mode><vczle><vczbe>):
13759 (aarch64_addp<mode>_insn): ... This...
13760 (aarch64_addp<mode><vczle><vczbe>_insn): ... And this.
13761 (aarch64_addp<mode>): New define_expand.
13763 2023-06-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13765 * config/riscv/riscv-protos.h (expand_vec_perm_const): New function.
13766 * config/riscv/riscv-v.cc
13767 (rvv_builder::can_duplicate_repeating_sequence_p): Support POLY
13769 (rvv_builder::single_step_npatterns_p): New function.
13770 (rvv_builder::npatterns_all_equal_p): Ditto.
13771 (const_vec_all_in_range_p): Support POLY handling.
13772 (gen_const_vector_dup): Ditto.
13773 (emit_vlmax_gather_insn): Add vrgatherei16.
13774 (emit_vlmax_masked_gather_mu_insn): Ditto.
13775 (expand_const_vector): Add VLA SLP const vector support.
13776 (expand_vec_perm): Support POLY.
13777 (struct expand_vec_perm_d): New struct.
13778 (shuffle_generic_patterns): New function.
13779 (expand_vec_perm_const_1): Ditto.
13780 (expand_vec_perm_const): Ditto.
13781 * config/riscv/riscv.cc (riscv_vectorize_vec_perm_const): Ditto.
13782 (TARGET_VECTORIZE_VEC_PERM_CONST): New targethook.
13784 2023-06-07 Andrew Pinski <apinski@marvell.com>
13786 PR middle-end/110117
13787 * expr.cc (expand_single_bit_test): Handle
13788 const_int from expand_expr.
13790 2023-06-07 Andrew Pinski <apinski@marvell.com>
13792 * expr.cc (do_store_flag): Rearrange the
13793 TER code so that it overrides the nonzero bits
13794 info if we had `a & POW2`.
13796 2023-06-07 Andrew Pinski <apinski@marvell.com>
13798 PR tree-optimization/110134
13799 * match.pd (-A CMP -B -> B CMP A): Allow EQ/NE for all integer
13801 (-A CMP CST -> B CMP (-CST)): Likewise.
13803 2023-06-07 Andrew Pinski <apinski@marvell.com>
13805 PR tree-optimization/89263
13806 PR tree-optimization/99069
13807 PR tree-optimization/20083
13808 PR tree-optimization/94898
13809 * match.pd: Add patterns to optimize `a ? onezero : onezero` with
13810 one of the operands are constant.
13812 2023-06-07 Andrew Pinski <apinski@marvell.com>
13814 * match.pd (zero_one_valued_p): Match 0 integer constant
13817 2023-06-07 Pan Li <pan2.li@intel.com>
13819 * config/riscv/riscv-vector-builtins-types.def
13820 (vfloat32mf2_t): Take RVV_REQUIRE_ELEN_FP_16 as requirement.
13821 (vfloat32m1_t): Ditto.
13822 (vfloat32m2_t): Ditto.
13823 (vfloat32m4_t): Ditto.
13824 (vfloat32m8_t): Ditto.
13825 (vint16mf4_t): Ditto.
13826 (vint16mf2_t): Ditto.
13827 (vint16m1_t): Ditto.
13828 (vint16m2_t): Ditto.
13829 (vint16m4_t): Ditto.
13830 (vint16m8_t): Ditto.
13831 (vuint16mf4_t): Ditto.
13832 (vuint16mf2_t): Ditto.
13833 (vuint16m1_t): Ditto.
13834 (vuint16m2_t): Ditto.
13835 (vuint16m4_t): Ditto.
13836 (vuint16m8_t): Ditto.
13837 (vint32mf2_t): Ditto.
13838 (vint32m1_t): Ditto.
13839 (vint32m2_t): Ditto.
13840 (vint32m4_t): Ditto.
13841 (vint32m8_t): Ditto.
13842 (vuint32mf2_t): Ditto.
13843 (vuint32m1_t): Ditto.
13844 (vuint32m2_t): Ditto.
13845 (vuint32m4_t): Ditto.
13846 (vuint32m8_t): Ditto.
13848 2023-06-07 Jason Merrill <jason@redhat.com>
13851 * doc/invoke.texi: Document it.
13853 2023-06-06 Roger Sayle <roger@nextmovesoftware.com>
13855 * doc/rtl.texi (bitreverse, copysign): Document new RTX codes.
13856 * rtl.def (BITREVERSE, COPYSIGN): Define new RTX codes.
13857 * simplify-rtx.cc (simplify_unary_operation_1): Optimize
13858 NOT (BITREVERSE x) as BITREVERSE (NOT x).
13859 Optimize POPCOUNT (BITREVERSE x) as POPCOUNT x.
13860 Optimize PARITY (BITREVERSE x) as PARITY x.
13861 Optimize BITREVERSE (BITREVERSE x) as x.
13862 (simplify_const_unary_operation) <case BITREVERSE>: Evaluate
13863 BITREVERSE of a constant integer at compile-time.
13864 (simplify_binary_operation_1) <case COPYSIGN>: Optimize
13865 COPY_SIGN (x, x) as x. Optimize COPYSIGN (x, C) as ABS x
13866 or NEG (ABS x) for constant C. Optimize COPYSIGN (ABS x, y)
13867 and COPYSIGN (NEG x, y) as COPYSIGN (x, y).
13868 Optimize COPYSIGN (x, ABS y) as ABS x.
13869 Optimize COPYSIGN (COPYSIGN (x, y), z) as COPYSIGN (x, z).
13870 Optimize COPYSIGN (x, COPYSIGN (y, z)) as COPYSIGN (x, z).
13871 (simplify_const_binary_operation): Evaluate COPYSIGN of constant
13872 arguments at compile-time.
13874 2023-06-06 Uros Bizjak <ubizjak@gmail.com>
13876 * rtl.h (function_invariant_p): Change return type from int to bool.
13877 * reload1.cc (function_invariant_p): Change return type from
13878 int to bool and adjust function body accordingly.
13880 2023-06-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13882 * config/riscv/autovec-opt.md (*<optab>_fma<mode>): New pattern.
13883 (*single_<optab>mult_plus<mode>): Ditto.
13884 (*double_<optab>mult_plus<mode>): Ditto.
13885 (*sign_zero_extend_fma): Ditto.
13886 (*zero_sign_extend_fma): Ditto.
13887 * config/riscv/riscv-protos.h (enum insn_type): New enum.
13889 2023-06-06 Kwok Cheung Yeung <kcy@codesourcery.com>
13890 Tobias Burnus <tobias@codesourcery.com>
13892 * gimplify.cc (omp_notice_variable): Apply GOVD_MAP_ALLOC_ONLY flag
13893 and defaultmap flags if the defaultmap has GOVD_MAP_FORCE_PRESENT flag
13895 (omp_get_attachment): Handle map clauses with 'present' modifier.
13896 (omp_group_base): Likewise.
13897 (gimplify_scan_omp_clauses): Reorder present maps to come first.
13898 Set GOVD flags for present defaultmaps.
13899 (gimplify_adjust_omp_clauses_1): Set map kind for present defaultmaps.
13900 * omp-low.cc (scan_sharing_clauses): Handle 'always, present' map
13902 (lower_omp_target): Handle map clauses with 'present' modifier.
13903 Handle 'to' and 'from' clauses with 'present'.
13904 * tree-core.h (enum omp_clause_defaultmap_kind): Add
13905 OMP_CLAUSE_DEFAULTMAP_PRESENT defaultmap kind.
13906 * tree-pretty-print.cc (dump_omp_clause): Handle 'map', 'to' and
13907 'from' clauses with 'present' modifier. Handle present defaultmap.
13908 * tree.h (OMP_CLAUSE_MOTION_PRESENT): New #define.
13910 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
13912 * config/rs6000/genfusion.pl: Delete some dead code.
13914 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
13916 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): New, rewritten and
13918 (gen_ld_cmpi_p10): ... this.
13920 2023-06-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
13923 * config/rs6000/rs6000.cc (vec_const_128bit_to_bytes): Remove
13924 duplicate expression.
13926 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13928 * config/aarch64/aarch64-builtins.cc (aarch64_general_gimple_fold_builtin):
13929 Handle unsigned reduc_plus_scal_ builtins.
13930 * config/aarch64/aarch64-simd-builtins.def (addp): Delete DImode instances.
13931 * config/aarch64/aarch64-simd.md (aarch64_addpdi): Delete.
13932 * config/aarch64/arm_neon.h (vpaddd_s64): Reimplement with
13933 __builtin_aarch64_reduc_plus_scal_v2di.
13934 (vpaddd_u64): Reimplement with __builtin_aarch64_reduc_plus_scal_v2di_uu.
13936 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13938 * config/aarch64/aarch64-simd.md (aarch64_<sur>shr_n<mode>): Delete.
13939 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): New define_insn.
13940 (aarch64_<sra_op>rshr_n<mode>): New define_expand.
13942 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13944 * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Delete.
13945 (aarch64_shrn<mode>_insn_be): Delete.
13946 (*aarch64_<srn_op>shrn<mode>_vect): Rename to...
13947 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): ... This.
13948 (aarch64_shrn<mode>): Remove reference to the above deleted patterns.
13949 (aarch64_rshrn<mode>_insn_le): Delete.
13950 (aarch64_rshrn<mode>_insn_be): Delete.
13951 (aarch64_rshrn<mode><vczle><vczbe>_insn): New define_insn.
13952 (aarch64_rshrn<mode>): Remove references to the above deleted patterns.
13954 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13956 * config/aarch64/aarch64-protos.h (aarch64_parallel_select_half_p):
13958 (aarch64_pars_overlap_p): Likewise.
13959 * config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>):
13960 Express in terms of UNSPEC_ADDV.
13961 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): Likewise.
13962 (*aarch64_<su>addlv<mode>_reduction): Define.
13963 (*aarch64_uaddlv<mode>_reduction_2): Likewise.
13964 * config/aarch64/aarch64.cc (aarch64_parallel_select_half_p): Define.
13965 (aarch64_pars_overlap_p): Likewise.
13966 * config/aarch64/iterators.md (UNSPEC_SADDLV, UNSPEC_UADDLV): Delete.
13967 (VQUADW): New mode attribute.
13968 (VWIDE2X_S): Likewise.
13970 (su): Delete handling of UNSPEC_SADDLV, UNSPEC_UADDLV.
13971 * config/aarch64/predicates.md (vect_par_cnst_select_half): Define.
13973 2023-06-06 Richard Biener <rguenther@suse.de>
13975 PR middle-end/110055
13976 * gimplify.cc (gimplify_target_expr): Do not emit
13977 CLOBBERs for variables which have static storage duration
13978 after gimplifying their initializers.
13980 2023-06-06 Richard Biener <rguenther@suse.de>
13982 PR tree-optimization/109143
13983 * tree-ssa-structalias.cc (solution_set_expand): Avoid
13984 one bitmap iteration and optimize bit range setting.
13986 2023-06-06 Hans-Peter Nilsson <hp@axis.com>
13988 PR bootstrap/110120
13989 * postreload.cc (reload_cse_move2add, move2add_use_add2_insn): Use
13990 XVECEXP, not XEXP, to access first item of a PARALLEL.
13992 2023-06-06 Pan Li <pan2.li@intel.com>
13994 * config/riscv/riscv-vector-builtins-types.def
13995 (vfloat16mf4_t): Add vfloat16mf4_t to WF operations.
13996 (vfloat16mf2_t): Likewise.
13997 (vfloat16m1_t): Likewise.
13998 (vfloat16m2_t): Likewise.
13999 (vfloat16m4_t): Likewise.
14000 (vfloat16m8_t): Likewise.
14001 * config/riscv/vector-iterators.md: Add FP=16 to VWF, VWF_ZVE64,
14002 VWLMUL1, VWLMUL1_ZVE64, vwlmul1 and vwlmul1_zve64.
14004 2023-06-06 Fei Gao <gaofei@eswincomputing.com>
14006 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Use Pmode
14007 for cfi reg/mem machmode
14008 (riscv_adjust_libcall_cfi_epilogue): Use Pmode for cfi reg machmode
14010 2023-06-06 Li Xu <xuli1@eswincomputing.com>
14012 * config/riscv/vector-iterators.md:
14013 Fix 'REQUIREMENT' for machine_mode 'MODE'.
14014 * config/riscv/vector.md (@pred_indexed_<order>store<VNX16_QHS:mode>
14015 <VNX16_QHSI:mode>): change VNX16_QHSI to VNX16_QHSDI.
14016 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>): Ditto.
14018 2023-06-06 Pan Li <pan2.li@intel.com>
14020 * config/riscv/vector-iterators.md: Fix typo in mode attr.
14022 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
14023 Joel Hutton <joel.hutton@arm.com>
14025 * doc/generic.texi: Remove old tree codes.
14026 * expr.cc (expand_expr_real_2): Remove old tree code cases.
14027 * gimple-pretty-print.cc (dump_binary_rhs): Likewise.
14028 * optabs-tree.cc (optab_for_tree_code): Likewise.
14029 (supportable_half_widening_operation): Likewise.
14030 * tree-cfg.cc (verify_gimple_assign_binary): Likewise.
14031 * tree-inline.cc (estimate_operator_cost): Likewise.
14032 (op_symbol_code): Likewise.
14033 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Likewise.
14034 (vect_analyze_data_ref_accesses): Likewise.
14035 * tree-vect-generic.cc (expand_vector_operations_1): Likewise.
14036 * cfgexpand.cc (expand_debug_expr): Likewise.
14037 * tree-vect-stmts.cc (vectorizable_conversion): Likewise.
14038 (supportable_widening_operation): Likewise.
14039 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
14041 * optabs.def (vec_widen_ssubl_hi_optab, vec_widen_ssubl_lo_optab,
14042 vec_widen_saddl_hi_optab, vec_widen_saddl_lo_optab,
14043 vec_widen_usubl_hi_optab, vec_widen_usubl_lo_optab,
14044 vec_widen_uaddl_hi_optab, vec_widen_uaddl_lo_optab): Remove optabs.
14045 * tree-pretty-print.cc (dump_generic_node): Remove tree code definition.
14046 * tree.def (WIDEN_PLUS_EXPR, WIDEN_MINUS_EXPR, VEC_WIDEN_PLUS_HI_EXPR,
14047 VEC_WIDEN_PLUS_LO_EXPR, VEC_WIDEN_MINUS_HI_EXPR,
14048 VEC_WIDEN_MINUS_LO_EXPR): Likewise.
14050 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
14051 Joel Hutton <joel.hutton@arm.com>
14052 Tamar Christina <tamar.christina@arm.com>
14054 * config/aarch64/aarch64-simd.md (vec_widen_<su>addl_lo_<mode>): Rename
14056 (vec_widen_<su>add_lo_<mode>): ... to this.
14057 (vec_widen_<su>addl_hi_<mode>): Rename this ...
14058 (vec_widen_<su>add_hi_<mode>): ... to this.
14059 (vec_widen_<su>subl_lo_<mode>): Rename this ...
14060 (vec_widen_<su>sub_lo_<mode>): ... to this.
14061 (vec_widen_<su>subl_hi_<mode>): Rename this ...
14062 (vec_widen_<su>sub_hi_<mode>): ...to this.
14063 * doc/generic.texi: Document new IFN codes.
14064 * internal-fn.cc (lookup_hilo_internal_fn): Add lookup function.
14065 (commutative_binary_fn_p): Add widen_plus fn's.
14066 (widening_fn_p): New function.
14067 (narrowing_fn_p): New function.
14068 (direct_internal_fn_optab): Change visibility.
14069 * internal-fn.def (DEF_INTERNAL_WIDENING_OPTAB_FN): Macro to define an
14070 internal_fn that expands into multiple internal_fns for widening.
14071 (IFN_VEC_WIDEN_PLUS, IFN_VEC_WIDEN_PLUS_HI, IFN_VEC_WIDEN_PLUS_LO,
14072 IFN_VEC_WIDEN_PLUS_EVEN, IFN_VEC_WIDEN_PLUS_ODD,
14073 IFN_VEC_WIDEN_MINUS, IFN_VEC_WIDEN_MINUS_HI,
14074 IFN_VEC_WIDEN_MINUS_LO, IFN_VEC_WIDEN_MINUS_ODD,
14075 IFN_VEC_WIDEN_MINUS_EVEN): Define widening plus,minus functions.
14076 * internal-fn.h (direct_internal_fn_optab): Declare new prototype.
14077 (lookup_hilo_internal_fn): Likewise.
14078 (widening_fn_p): Likewise.
14079 (Narrowing_fn_p): Likewise.
14080 * optabs.cc (commutative_optab_p): Add widening plus optabs.
14081 * optabs.def (OPTAB_D): Define widen add, sub optabs.
14082 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Support
14083 patterns with a hi/lo or even/odd split.
14084 (vect_recog_sad_pattern): Refactor to use new IFN codes.
14085 (vect_recog_widen_plus_pattern): Likewise.
14086 (vect_recog_widen_minus_pattern): Likewise.
14087 (vect_recog_average_pattern): Likewise.
14088 * tree-vect-stmts.cc (vectorizable_conversion): Add support for
14090 (supportable_widening_operation): Likewise.
14091 * tree.def (WIDEN_SUM_EXPR): Update example to use new IFNs.
14093 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
14094 Joel Hutton <joel.hutton@arm.com>
14096 * tree-vect-patterns.cc: Add include for gimple-iterator.
14097 (vect_recog_widen_op_pattern): Refactor to use code_helper.
14098 (vect_gimple_build): New function.
14099 * tree-vect-stmts.cc (simple_integer_narrowing): Refactor to use
14101 (vectorizable_call): Likewise.
14102 (vect_gen_widened_results_half): Likewise.
14103 (vect_create_vectorized_demotion_stmts): Likewise.
14104 (vect_create_vectorized_promotion_stmts): Likewise.
14105 (vect_create_half_widening_stmts): Likewise.
14106 (vectorizable_conversion): Likewise.
14107 (supportable_widening_operation): Likewise.
14108 (supportable_narrowing_operation): Likewise.
14109 * tree-vectorizer.h (supportable_widening_operation): Change
14110 prototype to use code_helper.
14111 (supportable_narrowing_operation): Likewise.
14112 (vect_gimple_build): New function prototype.
14113 * tree.h (code_helper::safe_as_tree_code): New function.
14114 (code_helper::safe_as_fn_code): New function.
14116 2023-06-05 Roger Sayle <roger@nextmovesoftware.com>
14118 * wide-int.cc (wi::bitreverse_large): New function implementing
14119 bit reversal of an integer.
14120 * wide-int.h (wi::bitreverse): New (template) function prototype.
14121 (bitreverse_large): Prototype helper function/implementation.
14122 (wi::bitreverse): New template wrapper around bitreverse_large.
14124 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
14126 * rtl.h (print_rtl_single): Change return type from int to void.
14127 (print_rtl_single_with_indent): Ditto.
14128 * print-rtl.h (class rtx_writer): Ditto. Change m_sawclose to bool.
14129 * print-rtl.cc (rtx_writer::rtx_writer): Update for m_sawclose change.
14130 (rtx_writer::print_rtx_operand_code_0): Ditto.
14131 (rtx_writer::print_rtx_operand_codes_E_and_V): Ditto.
14132 (rtx_writer::print_rtx_operand_code_i): Ditto.
14133 (rtx_writer::print_rtx_operand_code_u): Ditto.
14134 (rtx_writer::print_rtx_operand): Ditto.
14135 (rtx_writer::print_rtx): Ditto.
14136 (rtx_writer::finish_directive): Ditto.
14137 (print_rtl_single): Change return type from int to void
14138 and adjust function body accordingly.
14139 (rtx_writer::print_rtl_single_with_indent): Ditto.
14141 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
14143 * rtl.h (reg_classes_intersect_p): Change return type from int to bool.
14144 (reg_class_subset_p): Ditto.
14145 * reginfo.cc (reg_classes_intersect_p): Ditto.
14146 (reg_class_subset_p): Ditto.
14148 2023-06-05 Pan Li <pan2.li@intel.com>
14150 * config/riscv/riscv-vector-builtins-types.def
14151 (vfloat32mf2_t): New type for DEF_RVV_WEXTF_OPS.
14152 (vfloat32m1_t): Ditto.
14153 (vfloat32m2_t): Ditto.
14154 (vfloat32m4_t): Ditto.
14155 (vfloat32m8_t): Ditto.
14156 (vint16mf4_t): New type for DEF_RVV_CONVERT_I_OPS.
14157 (vint16mf2_t): Ditto.
14158 (vint16m1_t): Ditto.
14159 (vint16m2_t): Ditto.
14160 (vint16m4_t): Ditto.
14161 (vint16m8_t): Ditto.
14162 (vuint16mf4_t): New type for DEF_RVV_CONVERT_U_OPS.
14163 (vuint16mf2_t): Ditto.
14164 (vuint16m1_t): Ditto.
14165 (vuint16m2_t): Ditto.
14166 (vuint16m4_t): Ditto.
14167 (vuint16m8_t): Ditto.
14168 (vint32mf2_t): New type for DEF_RVV_WCONVERT_I_OPS.
14169 (vint32m1_t): Ditto.
14170 (vint32m2_t): Ditto.
14171 (vint32m4_t): Ditto.
14172 (vint32m8_t): Ditto.
14173 (vuint32mf2_t): New type for DEF_RVV_WCONVERT_U_OPS.
14174 (vuint32m1_t): Ditto.
14175 (vuint32m2_t): Ditto.
14176 (vuint32m4_t): Ditto.
14177 (vuint32m8_t): Ditto.
14178 * config/riscv/vector-iterators.md: Add FP=16 support for V,
14179 VWCONVERTI, VCONVERT, VNCONVERT, VMUL1 and vlmul1.
14181 2023-06-05 Andrew Pinski <apinski@marvell.com>
14183 PR bootstrap/110085
14184 * Makefile.in (clean): Remove the removing of
14185 MULTILIB_DIR/MULTILIB_OPTIONS directories.
14187 2023-06-05 YunQiang Su <yunqiang.su@cipunited.com>
14189 * config/mips/mips-protos.h (mips_emit_speculation_barrier): New
14191 * config/mips/mips.cc (speculation_barrier_libfunc): New static
14193 (mips_init_libfuncs): Initialize it.
14194 (mips_emit_speculation_barrier): New function.
14195 * config/mips/mips.md (speculation_barrier): Call
14196 mips_emit_speculation_barrier.
14198 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14200 * config/riscv/riscv-v.cc (class rvv_builder): Reorganize functions.
14201 (rvv_builder::can_duplicate_repeating_sequence_p): Ditto.
14202 (rvv_builder::repeating_sequence_use_merge_profitable_p): Ditto.
14203 (rvv_builder::get_merged_repeating_sequence): Ditto.
14204 (rvv_builder::get_merge_scalar_mask): Ditto.
14205 (emit_scalar_move_insn): Ditto.
14206 (emit_vlmax_integer_move_insn): Ditto.
14207 (emit_nonvlmax_integer_move_insn): Ditto.
14208 (emit_vlmax_gather_insn): Ditto.
14209 (emit_vlmax_masked_gather_mu_insn): Ditto.
14210 (get_repeating_sequence_dup_machine_mode): Ditto.
14212 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14214 * config/riscv/autovec.md: Split arguments.
14215 * config/riscv/riscv-protos.h (expand_vec_perm): Ditto.
14216 * config/riscv/riscv-v.cc (expand_vec_perm): Ditto.
14218 2023-06-04 Andrew Pinski <apinski@marvell.com>
14220 * expr.cc (do_store_flag): Improve for single bit testing
14221 not against zero but against that single bit.
14223 2023-06-04 Andrew Pinski <apinski@marvell.com>
14225 * expr.cc (do_store_flag): Extend the one bit checking case
14226 to handle the case where we don't have an and but rather still
14227 one bit is known to be non-zero.
14229 2023-06-04 Jeff Law <jlaw@ventanamicro.com>
14231 * config/h8300/constraints.md (Zz): Make this a normal
14233 * config/h8300/h8300.cc (TARGET_LRA_P): Remove.
14234 * config/h8300/logical.md (H8/SX bit patterns): Remove.
14236 2023-06-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
14238 * config/xtensa/xtensa.md (*btrue_INT_MIN, *eqne_INT_MIN):
14239 New insn_and_split patterns.
14241 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14244 * config/riscv/riscv-vector-builtins-bases.cc: Change expand approach.
14245 * config/riscv/vector.md (@vlmul_extx2<mode>): Remove it.
14246 (@vlmul_extx4<mode>): Ditto.
14247 (@vlmul_extx8<mode>): Ditto.
14248 (@vlmul_extx16<mode>): Ditto.
14249 (@vlmul_extx32<mode>): Ditto.
14250 (@vlmul_extx64<mode>): Ditto.
14251 (*vlmul_extx2<mode>): Ditto.
14252 (*vlmul_extx4<mode>): Ditto.
14253 (*vlmul_extx8<mode>): Ditto.
14254 (*vlmul_extx16<mode>): Ditto.
14255 (*vlmul_extx32<mode>): Ditto.
14256 (*vlmul_extx64<mode>): Ditto.
14258 2023-06-04 Pan Li <pan2.li@intel.com>
14260 * config/riscv/riscv-vector-builtins-types.def
14261 (vfloat32mf2_t): Add vfloat32mf2_t type to vfncvt.f.f.w operations.
14262 (vfloat32m1_t): Likewise.
14263 (vfloat32m2_t): Likewise.
14264 (vfloat32m4_t): Likewise.
14265 (vfloat32m8_t): Likewise.
14266 * config/riscv/riscv-vector-builtins.def: Fix typo in comments.
14267 * config/riscv/vector-iterators.md: Add single to half machine
14270 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14272 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move to autovec-opt.md.
14273 (*n<optab><mode>): Ditto.
14274 * config/riscv/autovec.md (*<optab>not<mode>): Ditto.
14275 (*n<optab><mode>): Ditto.
14276 * config/riscv/vector.md: Ditto.
14278 2023-06-04 Roger Sayle <roger@nextmovesoftware.com>
14281 * config/i386/i386-features.cc (scalar_chain::convert_compare):
14282 Update or delete REG_EQUAL notes, converting CONST_INT and
14283 CONST_WIDE_INT immediate operands to a suitable CONST_VECTOR.
14285 2023-06-04 Jason Merrill <jason@redhat.com>
14288 * tree-eh.cc (lower_resx): Pass the exception pointer to the
14290 * except.h: Tweak comment.
14292 2023-06-04 Hans-Peter Nilsson <hp@axis.com>
14294 * postreload.cc (move2add_use_add2_insn): Handle
14295 trivial single_sets. Rename variable PAT to SET.
14296 (move2add_use_add3_insn, reload_cse_move2add): Similar.
14298 2023-06-04 Pan Li <pan2.li@intel.com>
14300 * config/riscv/riscv-vector-builtins-types.def
14301 (vfloat16mf4_t): Add the float16 type to DEF_RVV_F_OPS.
14302 (vfloat16mf2_t): Likewise.
14303 (vfloat16m1_t): Likewise.
14304 (vfloat16m2_t): Likewise.
14305 (vfloat16m4_t): Likewise.
14306 (vfloat16m8_t): Likewise.
14307 * config/riscv/riscv.md: Add vfloat16*_t to attr mode.
14308 * config/riscv/vector-iterators.md: Add vfloat16*_t machine mode
14309 to V, V_WHOLE, V_FRACT, VINDEX, VM, VEL and sew.
14310 * config/riscv/vector.md: Add vfloat16*_t machine mode to sew,
14313 2023-06-03 Fei Gao <gaofei@eswincomputing.com>
14315 * config/riscv/riscv.cc (riscv_expand_epilogue): fix cfi issue with
14318 2023-06-03 Die Li <lidie@eswincomputing.com>
14320 * config/riscv/thead.md (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Delete.
14322 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14324 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
14326 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14328 * config/riscv/vector.md: Add vector-opt.md.
14329 * config/riscv/autovec-opt.md: New file.
14331 2023-06-03 liuhongt <hongtao.liu@intel.com>
14333 PR tree-optimization/110067
14334 * gimple-ssa-store-merging.cc (find_bswap_or_nop): Don't try
14335 bswap + rotate when TYPE_PRECISION(n->type) > n->range.
14337 2023-06-03 liuhongt <hongtao.liu@intel.com>
14340 * config/i386/mmx.md (truncv2hiv2qi2): New define_insn.
14341 (truncv2si<mode>2): Ditto.
14343 2023-06-02 Andrew Pinski <apinski@marvell.com>
14345 PR rtl-optimization/102733
14346 * dse.cc (store_info): Add addrspace field.
14347 (record_store): Record the address space
14348 and check to make sure they are the same.
14350 2023-06-02 Andrew Pinski <apinski@marvell.com>
14352 PR rtl-optimization/110042
14353 * ifcvt.cc (bbs_ok_for_cmove_arith): Allow paradoxical subregs.
14354 (bb_valid_for_noce_process_p): Strip the subreg for the SET_DEST.
14356 2023-06-02 Iain Sandoe <iain@sandoe.co.uk>
14359 * config/rs6000/rs6000.cc (darwin_rs6000_special_round_type_align):
14360 Make sure that we do not have a cap on field alignment before altering
14361 the struct layout based on the type alignment of the first entry.
14363 2023-06-02 David Faust <david.faust@oracle.com>
14366 * btfout.cc (btf_absolute_func_id): New function.
14367 (btf_asm_func_type): Call it here. Change index parameter from
14368 size_t to ctf_id_t. Use PRIu64 formatter.
14370 2023-06-02 Alex Coplan <alex.coplan@arm.com>
14372 * btfout.cc (btf_asm_type): Use PRIu64 instead of %lu for uint64_t.
14373 (btf_asm_datasec_type): Likewise.
14375 2023-06-02 Carl Love <cel@us.ibm.com>
14377 * config/rs6000/rs6000-builtins.def (__builtin_altivec_tr_stxvrhx,
14378 __builtin_altivec_tr_stxvrwx): Fix type of third argument.
14380 2023-06-02 Jason Merrill <jason@redhat.com>
14384 * tree.h (DECL_MERGEABLE): New.
14385 * tree-core.h (struct tree_decl_common): Mention it.
14386 * gimplify.cc (gimplify_init_constructor): Check it.
14387 * cgraph.cc (symtab_node::address_can_be_compared_p): Likewise.
14388 * varasm.cc (categorize_decl_for_section): Likewise.
14390 2023-06-02 Uros Bizjak <ubizjak@gmail.com>
14392 * rtl.h (stack_regs_mentioned): Change return type from int to bool.
14393 * reg-stack.cc (struct_block_info_def): Change "done" to bool.
14394 (stack_regs_mentioned_p): Change return type from int to bool
14395 and adjust function body accordingly.
14396 (stack_regs_mentioned): Ditto.
14397 (check_asm_stack_operands): Ditto. Change "malformed_asm"
14399 (move_for_stack_reg): Recode handling of control_flow_insn_deleted.
14400 (swap_rtx_condition_1): Change return type from int to bool
14401 and adjust function body accordingly. Change "r" variable to bool.
14402 (swap_rtx_condition): Change return type from int to bool
14403 and adjust function body accordingly.
14404 (subst_stack_regs_pat): Recode handling of control_flow_insn_deleted.
14405 (subst_stack_regs): Ditto.
14406 (convert_regs_entry): Change return type from int to bool and adjust
14407 function body accordingly. Change "inserted" variable to bool.
14408 (convert_regs_1): Recode handling of control_flow_insn_deleted.
14409 (convert_regs_2): Recode handling of cfg_altered.
14410 (convert_regs): Ditto. Change "inserted" variable to bool.
14412 2023-06-02 Jason Merrill <jason@redhat.com>
14415 * varasm.cc (output_constant) [REAL_TYPE]: Check that sizes match.
14416 (initializer_constant_valid_p_1): Compare float precision.
14418 2023-06-02 Alexander Monakov <amonakov@ispras.ru>
14420 * doc/extend.texi (Vector Extensions): Clarify bitwise shift
14423 2023-06-02 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14425 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Change decrement IV flow.
14426 (vect_set_loop_condition_partial_vectors): Ditto.
14428 2023-06-02 Georg-Johann Lay <avr@gjlay.de>
14431 * config/avr/avr.md: Add an RTL peephole to optimize operations on
14432 non-LD_REGS after a move from LD_REGS.
14433 (piaop): New code iterator.
14435 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
14438 * doc/install.texi: Document (optional) Perl usage for parallel
14439 testing of libgomp.
14441 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
14444 * doc/install.texi (Perl): Back to requiring "Perl version 5.6.1 (or
14447 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14448 KuanLin Chen <best124612@gmail.com>
14450 * config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
14451 * config/riscv/riscv-vector-builtins-shapes.cc (struct fault_load_def): Ditto.
14453 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14455 * config/riscv/riscv-v.cc (expand_vec_series): Optimize reverse series index vector.
14457 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14459 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
14461 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14463 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_VXRM_ENUM): Add
14465 (DEF_RVV_FRM_ENUM): Ditto.
14467 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14469 * config/riscv/riscv-vector-builtins-bases.cc: Change vwadd.wv/vwsub.wv
14470 intrinsic API expander
14471 * config/riscv/vector.md
14472 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Remove it.
14473 (@pred_single_widen_sub<any_extend:su><mode>): New pattern.
14474 (@pred_single_widen_add<any_extend:su><mode>): New pattern.
14476 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14478 * config/riscv/autovec.md (vec_perm<mode>): New pattern.
14479 * config/riscv/predicates.md (vector_perm_operand): New predicate.
14480 * config/riscv/riscv-protos.h (enum insn_type): New enum.
14481 (expand_vec_perm): New function.
14482 * config/riscv/riscv-v.cc (const_vec_all_in_range_p): Ditto.
14483 (gen_const_vector_dup): Ditto.
14484 (emit_vlmax_gather_insn): Ditto.
14485 (emit_vlmax_masked_gather_mu_insn): Ditto.
14486 (expand_vec_perm): Ditto.
14488 2023-06-01 Jason Merrill <jason@redhat.com>
14490 * doc/invoke.texi (-Wpedantic): Improve clarity.
14492 2023-06-01 Uros Bizjak <ubizjak@gmail.com>
14494 * rtl.h (exp_equiv_p): Change return type from int to bool.
14495 * cse.cc (mention_regs): Change return type from int to bool
14496 and adjust function body accordingly.
14497 (exp_equiv_p): Ditto.
14498 (insert_regs): Ditto. Change "modified" function argument to bool
14499 and update usage accordingly.
14500 (record_jump_cond): Remove always zero "reversed_nonequality"
14501 function argument and update usage accordingly.
14502 (fold_rtx): Change "changed" variable to bool.
14503 (record_jump_equiv): Remove unneeded "reversed_nonequality" variable.
14504 (is_dead_reg): Change return type from int to bool.
14506 2023-06-01 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
14508 * config/xtensa/xtensa.md (adddi3, subdi3):
14509 New RTL generation patterns implemented according to the instruc-
14510 tion idioms described in the Xtensa ISA reference manual (p. 600).
14512 2023-06-01 Roger Sayle <roger@nextmovesoftware.com>
14513 Uros Bizjak <ubizjak@gmail.com>
14516 * config/i386/i386-builtin.def (__builtin_ia32_ptestz128): Use new
14517 CODE_for_sse4_1_ptestzv2di.
14518 (__builtin_ia32_ptestc128): Use new CODE_for_sse4_1_ptestcv2di.
14519 (__builtin_ia32_ptestz256): Use new CODE_for_avx_ptestzv4di.
14520 (__builtin_ia32_ptestc256): Use new CODE_for_avx_ptestcv4di.
14521 * config/i386/i386-expand.cc (ix86_expand_branch): Use CCZmode
14522 when expanding UNSPEC_PTEST to compare against zero.
14523 * config/i386/i386-features.cc (scalar_chain::convert_compare):
14524 Likewise generate CCZmode UNSPEC_PTESTs when converting comparisons.
14525 (general_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
14526 (timode_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
14527 * config/i386/i386-protos.h (ix86_match_ptest_ccmode): Prototype.
14528 * config/i386/i386.cc (ix86_match_ptest_ccmode): New predicate to
14529 check for suitable matching modes for the UNSPEC_PTEST pattern.
14530 * config/i386/sse.md (define_split): When splitting UNSPEC_MOVMSK
14531 to UNSPEC_PTEST, preserve the FLAG_REG mode as CCZ.
14532 (*<sse4_1>_ptest<mode>): Add asterisk to hide define_insn. Remove
14533 ":CC" mode of FLAGS_REG, instead use ix86_match_ptest_ccmode.
14534 (<sse4_1>_ptestz<mode>): New define_expand to specify CCZ.
14535 (<sse4_1>_ptestc<mode>): New define_expand to specify CCC.
14536 (<sse4_1>_ptest<mode>): A define_expand using CC to preserve the
14538 (*ptest<mode>_and): Specify CCZ to only perform this optimization
14539 when only the Z flag is required.
14541 2023-06-01 Jonathan Wakely <jwakely@redhat.com>
14544 * doc/invoke.texi (x86 Options): Fix description of -m32 option.
14546 2023-06-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14548 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
14549 Add =r,m and =r,m alternatives.
14550 (load_pair<DREG:mode><DREG2:mode>): Likewise.
14551 (vec_store_pair<DREG:mode><DREG2:mode>): Likewise.
14553 2023-06-01 Pan Li <pan2.li@intel.com>
14555 * common/config/riscv/riscv-common.cc: Add FP_16 mask to zvfhmin
14557 * config/riscv/genrvv-type-indexer.cc (valid_type): Allow FP16.
14558 (main): Disable FP16 tuple.
14559 * config/riscv/riscv-opts.h (MASK_VECTOR_ELEN_FP_16): New macro.
14560 (TARGET_VECTOR_ELEN_FP_16): Ditto.
14561 * config/riscv/riscv-vector-builtins.cc (check_required_extensions):
14563 * config/riscv/riscv-vector-builtins.def (vfloat16mf4_t): New type.
14564 (vfloat16mf2_t): Ditto.
14565 (vfloat16m1_t): Ditto.
14566 (vfloat16m2_t): Ditto.
14567 (vfloat16m4_t): Ditto.
14568 (vfloat16m8_t): Ditto.
14569 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ELEN_FP_16):
14571 * config/riscv/riscv-vector-switch.def (ENTRY): Allow FP16
14572 machine mode based on TARGET_VECTOR_ELEN_FP_16.
14574 2023-06-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14576 * config/riscv/riscv-vector-builtins.cc (register_frm): New function.
14577 (DEF_RVV_FRM_ENUM): New macro.
14578 (handle_pragma_vector): Add FRM enum
14579 * config/riscv/riscv-vector-builtins.def (DEF_RVV_FRM_ENUM): New macro.
14586 2023-05-31 Roger Sayle <roger@nextmovesoftware.com>
14587 Richard Sandiford <richard.sandiford@arm.com>
14589 * fold-const-call.cc (fold_const_call_ss) <CFN_BUILT_IN_BSWAP*>:
14590 Update call to wi::bswap.
14591 * simplify-rtx.cc (simplify_const_unary_operation) <case BSWAP>:
14592 Update call to wi::bswap.
14593 * tree-ssa-ccp.cc (evaluate_stmt) <case BUILT_IN_BSWAP*>:
14594 Update calls to wi::bswap.
14595 * wide-int.cc (wide_int_storage::bswap): Remove/rename to...
14596 (wi::bswap_large): New function, with revised API.
14597 * wide-int.h (wi::bswap): New (template) function prototype.
14598 (wide_int_storage::bswap): Remove method.
14599 (sext_large, zext_large): Consistent indentation/line wrapping.
14600 (bswap_large): Prototype helper function containing implementation.
14601 (wi::bswap): New template wrapper around bswap_large.
14603 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14606 * config/aarch64/aarch64-simd.md (<sur>dot_prod<vsi2qi>): Rename to...
14607 (<sur>dot_prod<vsi2qi><vczle><vczbe>): ... This.
14608 (usdot_prod<vsi2qi>): Rename to...
14609 (usdot_prod<vsi2qi><vczle><vczbe>): ... This.
14610 (aarch64_<sur>dot_lane<vsi2qi>): Rename to...
14611 (aarch64_<sur>dot_lane<vsi2qi><vczle><vczbe>): ... This.
14612 (aarch64_<sur>dot_laneq<vsi2qi>): Rename to...
14613 (aarch64_<sur>dot_laneq<vsi2qi><vczle><vczbe>): ... This.
14614 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi>): Rename to...
14615 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi><vczle><vczbe>):
14618 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14621 * config/aarch64/aarch64-simd.md (aarch64_sq<r>dmulh<mode>): Rename to...
14622 (aarch64_sq<r>dmulh<mode><vczle><vczbe>): ... This.
14623 (aarch64_sq<r>dmulh_n<mode>): Rename to...
14624 (aarch64_sq<r>dmulh_n<mode><vczle><vczbe>): ... This.
14625 (aarch64_sq<r>dmulh_lane<mode>): Rename to...
14626 (aarch64_sq<r>dmulh_lane<mode><vczle><vczbe>): ... This.
14627 (aarch64_sq<r>dmulh_laneq<mode>): Rename to...
14628 (aarch64_sq<r>dmulh_laneq<mode><vczle><vczbe>): ... This.
14629 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>): Rename to...
14630 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode><vczle><vczbe>): ... This.
14631 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>): Rename to...
14632 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode><vczle><vczbe>): ... This.
14633 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>): Rename to...
14634 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode><vczle><vczbe>): ... This.
14636 2023-05-31 David Faust <david.faust@oracle.com>
14638 * btfout.cc (btf_kind_names): New.
14639 (btf_kind_name): New.
14640 (btf_absolute_var_id): New utility function.
14641 (btf_relative_var_id): Likewise.
14642 (btf_relative_func_id): Likewise.
14643 (btf_absolute_datasec_id): Likewise.
14644 (btf_asm_type_ref): New.
14645 (btf_asm_type): Update asm comments and use btf_asm_type_ref ().
14646 (btf_asm_array): Likewise. Accept ctf_container_ref parameter.
14647 (btf_asm_varent): Likewise.
14648 (btf_asm_func_arg): Likewise.
14649 (btf_asm_datasec_entry): Likewise.
14650 (btf_asm_datasec_type): Likewise.
14651 (btf_asm_func_type): Likewise. Add index parameter.
14652 (btf_asm_enum_const): Likewise.
14653 (btf_asm_sou_member): Likewise.
14654 (output_btf_vars): Update btf_asm_* call accordingly.
14655 (output_asm_btf_sou_fields): Likewise.
14656 (output_asm_btf_enum_list): Likewise.
14657 (output_asm_btf_func_args_list): Likewise.
14658 (output_asm_btf_vlen_bytes): Likewise.
14659 (output_btf_func_types): Add ctf_container_ref parameter.
14660 Pass it to btf_asm_func_type.
14661 (output_btf_datasec_types): Update btf_asm_datsec_type call similarly.
14662 (btf_output): Update output_btf_func_types call similarly.
14664 2023-05-31 David Faust <david.faust@oracle.com>
14666 * btfout.cc (btf_asm_type): Add dedicated cases for BTF_KIND_ARRAY
14667 and BTF_KIND_FWD which do not use the size/type field at all.
14669 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
14671 * rtl.h (subreg_lowpart_p): Change return type from int to bool.
14672 (active_insn_p): Ditto.
14673 (in_sequence_p): Ditto.
14674 (unshare_all_rtl): Change return type from int to void.
14675 * emit-rtl.h (mem_expr_equal_p): Change return type from int to bool.
14676 * emit-rtl.cc (subreg_lowpart_p): Change return type from int to bool
14677 and adjust function body accordingly.
14678 (mem_expr_equal_p): Ditto.
14679 (unshare_all_rtl): Change return type from int to void
14680 and adjust function body accordingly.
14681 (verify_rtx_sharing): Remove unneeded return.
14682 (active_insn_p): Change return type from int to bool
14683 and adjust function body accordingly.
14684 (in_sequence_p): Ditto.
14686 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
14688 * rtl.h (true_dependence): Change return type from int to bool.
14689 (canon_true_dependence): Ditto.
14690 (read_dependence): Ditto.
14691 (anti_dependence): Ditto.
14692 (canon_anti_dependence): Ditto.
14693 (output_dependence): Ditto.
14694 (canon_output_dependence): Ditto.
14695 (may_alias_p): Ditto.
14696 * alias.h (alias_sets_conflict_p): Ditto.
14697 (alias_sets_must_conflict_p): Ditto.
14698 (objects_must_conflict_p): Ditto.
14699 (nonoverlapping_memrefs_p): Ditto.
14700 * alias.cc (rtx_equal_for_memref_p): Remove forward declaration.
14701 (record_set): Ditto.
14702 (base_alias_check): Ditto.
14703 (find_base_value): Ditto.
14704 (mems_in_disjoint_alias_sets_p): Ditto.
14705 (get_alias_set_entry): Ditto.
14706 (decl_for_component_ref): Ditto.
14707 (write_dependence_p): Ditto.
14708 (memory_modified_1): Ditto.
14709 (mems_in_disjoint_alias_set_p): Change return type from int to bool
14710 and adjust function body accordingly.
14711 (alias_sets_conflict_p): Ditto.
14712 (alias_sets_must_conflict_p): Ditto.
14713 (objects_must_conflict_p): Ditto.
14714 (rtx_equal_for_memref_p): Ditto.
14715 (base_alias_check): Ditto.
14716 (read_dependence): Ditto.
14717 (nonoverlapping_memrefs_p): Ditto.
14718 (true_dependence_1): Ditto.
14719 (true_dependence): Ditto.
14720 (canon_true_dependence): Ditto.
14721 (write_dependence_p): Ditto.
14722 (anti_dependence): Ditto.
14723 (canon_anti_dependence): Ditto.
14724 (output_dependence): Ditto.
14725 (canon_output_dependence): Ditto.
14726 (may_alias_p): Ditto.
14727 (init_alias_analysis): Change "changed" variable to bool.
14729 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14731 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): Change
14732 expand into define_insn_and_split.
14734 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14736 * config/riscv/vector.md: Remove FRM.
14738 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14740 * config/riscv/vector.md: Remove FRM.
14742 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14744 * config/riscv/vector.md: Remove FRM.
14746 2023-05-31 Christophe Lyon <christophe.lyon@linaro.org>
14749 * config/aarch64/aarch64.md (aarch64_rev16si2_alt3): New
14752 2023-05-31 Richard Biener <rguenther@suse.de>
14755 PR tree-optimization/109143
14756 * tree-ssa-structalias.cc (struct topo_info): Remove.
14757 (init_topo_info): Likewise.
14758 (free_topo_info): Likewise.
14759 (compute_topo_order): Simplify API, put the component
14760 with ESCAPED last so it's processed first.
14761 (topo_visit): Adjust.
14762 (solve_graph): Likewise.
14764 2023-05-31 Richard Biener <rguenther@suse.de>
14766 * tree-ssa-structalias.cc (constraint_stats::num_avoided_edges):
14768 (add_graph_edge): Count redundant edges we avoid to create.
14769 (dump_sa_stats): Dump them.
14770 (ipa_pta_execute): Do not dump generating constraints when
14771 we are not dumping them.
14773 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14775 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>): Rewrite
14776 output template to avoid explicit switch on which_alternative.
14777 (*aarch64_simd_mov<VQMOV:mode>): Likewise.
14778 (and<mode>3): Likewise.
14779 (ior<mode>3): Likewise.
14780 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Likewise.
14782 2023-05-31 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
14784 * config/xtensa/predicates.md (xtensa_bit_join_operator):
14786 * config/xtensa/xtensa.md (ior_op): Remove.
14787 (*shlrd_reg): Rename from "*shlrd_reg_<code>", and add the
14788 insn_and_split pattern of the same name to express and capture
14789 the bit-combining operation with both sides swapped.
14790 In addition, replace use of code iterator with new operator
14792 (*shlrd_const, *shlrd_per_byte):
14793 Likewise regarding the code iterator.
14795 2023-05-31 Cui, Lili <lili.cui@intel.com>
14797 PR tree-optimization/110038
14798 * params.opt: Add a limit on tree-reassoc-width.
14799 * tree-ssa-reassoc.cc
14800 (rewrite_expr_tree_parallel): Add width limit.
14802 2023-05-31 Pan Li <pan2.li@intel.com>
14804 * common/config/riscv/riscv-common.cc:
14805 (riscv_implied_info): Add zvfh item.
14806 (riscv_ext_version_table): Ditto.
14807 (riscv_ext_flag_table): Ditto.
14808 * config/riscv/riscv-opts.h (MASK_ZVFH): New macro.
14809 (TARGET_ZVFH): Ditto.
14811 2023-05-30 liuhongt <hongtao.liu@intel.com>
14813 PR tree-optimization/108804
14814 * tree-vect-patterns.cc (vect_get_range_info): Remove static.
14815 * tree-vect-stmts.cc (vect_create_vectorized_demotion_stmts):
14816 Add new parameter narrow_src_p.
14817 (vectorizable_conversion): Enhance NARROW FLOAT_EXPR
14818 vectorization by truncating to lower precision.
14819 * tree-vectorizer.h (vect_get_range_info): New declare.
14821 2023-05-30 Vladimir N. Makarov <vmakarov@redhat.com>
14823 * lra-int.h (lra_update_sp_offset): Add the prototype.
14824 * lra.cc (setup_sp_offset): Change the return type. Use
14825 lra_update_sp_offset.
14826 * lra-eliminations.cc (lra_update_sp_offset): New function.
14827 (lra_process_new_insns): Push the current insn to reprocess if the
14828 input reload changes sp offset.
14830 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
14833 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
14834 Fix misleading identation.
14836 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
14838 * rtl.h (comparison_dominates_p): Change return type from int to bool.
14839 (condjump_p): Ditto.
14840 (any_condjump_p): Ditto.
14841 (any_uncondjump_p): Ditto.
14842 (simplejump_p): Ditto.
14843 (returnjump_p): Ditto.
14844 (eh_returnjump_p): Ditto.
14845 (onlyjump_p): Ditto.
14846 (invert_jump_1): Ditto.
14847 (invert_jump): Ditto.
14848 (rtx_renumbered_equal_p): Ditto.
14849 (redirect_jump_1): Ditto.
14850 (redirect_jump): Ditto.
14851 (condjump_in_parallel_p): Ditto.
14852 * jump.cc (invert_exp_1): Adjust forward declaration.
14853 (comparison_dominates_p): Change return type from int to bool
14854 and adjust function body accordingly.
14855 (simplejump_p): Ditto.
14856 (condjump_p): Ditto.
14857 (condjump_in_parallel_p): Ditto.
14858 (any_uncondjump_p): Ditto.
14859 (any_condjump_p): Ditto.
14860 (returnjump_p): Ditto.
14861 (eh_returnjump_p): Ditto.
14862 (onlyjump_p): Ditto.
14863 (redirect_jump_1): Ditto.
14864 (redirect_jump): Ditto.
14865 (invert_exp_1): Ditto.
14866 (invert_jump_1): Ditto.
14867 (invert_jump): Ditto.
14868 (rtx_renumbered_equal_p): Ditto.
14870 2023-05-30 Andrew Pinski <apinski@marvell.com>
14872 * fold-const.cc (minmax_from_comparison): Add support for NE_EXPR.
14873 * match.pd ((cond (cmp (convert1? x) c1) (convert2? x) c2) pattern):
14874 Add ne as a possible cmp.
14875 ((a CMP b) ? minmax<a, c> : minmax<b, c> pattern): Likewise.
14877 2023-05-30 Andrew Pinski <apinski@marvell.com>
14879 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): New
14882 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
14884 * simplify-rtx.cc (simplify_binary_operation_1) <AND>: Use wide-int
14885 instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of
14886 (and (extend X) C) as (zero_extend (and X C)), to also optimize
14887 modes wider than HOST_WIDE_INT.
14889 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
14892 * simplify-rtx.cc (simplify_const_relational_operation): Return
14893 early if we have a MODE_CC comparison that isn't a COMPARE against
14896 2023-05-30 Robin Dapp <rdapp@ventanamicro.com>
14898 * config/riscv/riscv.cc (riscv_const_insns): Allow
14899 const_vec_duplicates.
14901 2023-05-30 liuhongt <hongtao.liu@intel.com>
14903 PR middle-end/108938
14904 * gimple-ssa-store-merging.cc (is_bswap_or_nop_p): New
14905 function, cut from original find_bswap_or_nop function.
14906 (find_bswap_or_nop): Add a new parameter, detect bswap +
14907 rotate and save rotate result in the new parameter.
14908 (bswap_replace): Add a new parameter to indicate rotate and
14909 generate rotate stmt if needed.
14910 (maybe_optimize_vector_constructor): Adjust for new rotate
14911 parameter in the upper 2 functions.
14912 (pass_optimize_bswap::execute): Ditto.
14913 (imm_store_chain_info::output_merged_store): Ditto.
14915 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14917 * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>): Delete.
14918 (aarch64_<su>adalp<mode>): New define_expand.
14919 (*aarch64_<su>adalp<mode><vczle><vczbe>_insn): New define_insn.
14920 (aarch64_<su>addlp<mode>): Convert to define_expand.
14921 (*aarch64_<su>addlp<mode><vczle><vczbe>_insn): New define_insn.
14922 * config/aarch64/iterators.md (UNSPEC_SADDLP, UNSPEC_UADDLP): Delete.
14924 (USADDLP): Likewise.
14925 * config/aarch64/predicates.md (vect_par_cnst_even_or_odd_half): Define.
14927 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14929 * config/aarch64/aarch64-builtins.cc (VAR1): Move to after inclusion of
14930 aarch64-builtin-iterators.h. Add definition to remap shadd, uhadd,
14931 srhadd, urhadd builtin codes for standard optab ones.
14932 * config/aarch64/aarch64-simd.md (<u>avg<mode>3_floor): Rename to...
14933 (<su_optab>avg<mode>3_floor): ... This. Expand to RTL codes rather than
14935 (<u>avg<mode>3_ceil): Rename to...
14936 (<su_optab>avg<mode>3_ceil): ... This. Expand to RTL codes rather than
14938 (aarch64_<su>hsub<mode>): New define_expand.
14939 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): Split into...
14940 (*aarch64_<su>h<ADDSUB:optab><mode><vczle><vczbe>_insn): ... This...
14941 (*aarch64_<su>rhadd<mode><vczle><vczbe>_insn): ... And this.
14943 2023-05-30 Andreas Schwab <schwab@suse.de>
14946 * config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to
14947 match libsanitizer.
14949 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14951 * config/aarch64/aarch64-modes.def (V16HI, V8SI, V4DI, V2TI): New modes.
14952 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rnd_cst_p):
14954 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
14955 * config/aarch64/aarch64-simd.md (*aarch64_simd_sra<mode>): Rename to...
14956 (aarch64_<sra_op>sra_n<mode>_insn): ... This.
14957 (aarch64_<sra_op>rsra_n<mode>_insn): New define_insn.
14958 (aarch64_<sra_op>sra_n<mode>): New define_expand.
14959 (aarch64_<sra_op>rsra_n<mode>): Likewise.
14960 (aarch64_<sur>sra_n<mode>): Rename to...
14961 (aarch64_<sur>sra_ndi): ... This.
14962 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode): Add
14963 any_target_p argument.
14964 (aarch64_extract_vec_duplicate_wide_int): Define.
14965 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
14966 (aarch64_const_vec_rnd_cst_p): Likewise.
14967 (aarch64_vector_mode_supported_any_target_p): Likewise.
14968 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise.
14969 * config/aarch64/iterators.md (UNSPEC_SRSRA, UNSPEC_URSRA): Delete.
14970 (VSRA): Adjust for the above.
14972 (V2XWIDE): New mode_attr.
14973 (vec_or_offset): Likewise.
14974 (SHIFTEXTEND): Likewise.
14975 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec): New
14977 * doc/tm.texi (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
14978 clarify that it applies to current target options.
14979 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Document.
14980 * doc/tm.texi.in: Regenerate.
14981 * stor-layout.cc (mode_for_vector): Check
14982 vector_mode_supported_any_target_p when iterating through vector modes.
14983 * target.def (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
14984 clarify that it applies to current target options.
14985 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Define.
14987 2023-05-30 Lili Cui <lili.cui@intel.com>
14989 PR tree-optimization/98350
14990 * tree-ssa-reassoc.cc
14991 (rewrite_expr_tree_parallel): Rewrite this function.
14992 (rank_ops_for_fma): New.
14993 (reassociate_bb): Handle new function.
14995 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
14997 * rtl.h (rtx_addr_can_trap_p): Change return type from int to bool.
14998 (rtx_unstable_p): Ditto.
14999 (reg_mentioned_p): Ditto.
15000 (reg_referenced_p): Ditto.
15001 (reg_used_between_p): Ditto.
15002 (reg_set_between_p): Ditto.
15003 (modified_between_p): Ditto.
15004 (no_labels_between_p): Ditto.
15005 (modified_in_p): Ditto.
15006 (reg_set_p): Ditto.
15007 (multiple_sets): Ditto.
15008 (set_noop_p): Ditto.
15009 (noop_move_p): Ditto.
15010 (reg_overlap_mentioned_p): Ditto.
15011 (dead_or_set_p): Ditto.
15012 (dead_or_set_regno_p): Ditto.
15013 (find_reg_fusage): Ditto.
15014 (find_regno_fusage): Ditto.
15015 (side_effects_p): Ditto.
15016 (volatile_refs_p): Ditto.
15017 (volatile_insn_p): Ditto.
15018 (may_trap_p_1): Ditto.
15019 (may_trap_p): Ditto.
15020 (may_trap_or_fault_p): Ditto.
15021 (computed_jump_p): Ditto.
15022 (auto_inc_p): Ditto.
15023 (loc_mentioned_in_p): Ditto.
15024 * rtlanal.cc (computed_jump_p_1): Adjust forward declaration.
15025 (rtx_unstable_p): Change return type from int to bool
15026 and adjust function body accordingly.
15027 (rtx_addr_can_trap_p): Ditto.
15028 (reg_mentioned_p): Ditto.
15029 (no_labels_between_p): Ditto.
15030 (reg_used_between_p): Ditto.
15031 (reg_referenced_p): Ditto.
15032 (reg_set_between_p): Ditto.
15033 (reg_set_p): Ditto.
15034 (modified_between_p): Ditto.
15035 (modified_in_p): Ditto.
15036 (multiple_sets): Ditto.
15037 (set_noop_p): Ditto.
15038 (noop_move_p): Ditto.
15039 (reg_overlap_mentioned_p): Ditto.
15040 (dead_or_set_p): Ditto.
15041 (dead_or_set_regno_p): Ditto.
15042 (find_reg_fusage): Ditto.
15043 (find_regno_fusage): Ditto.
15044 (remove_node_from_insn_list): Ditto.
15045 (volatile_insn_p): Ditto.
15046 (volatile_refs_p): Ditto.
15047 (side_effects_p): Ditto.
15048 (may_trap_p_1): Ditto.
15049 (may_trap_p): Ditto.
15050 (may_trap_or_fault_p): Ditto.
15051 (computed_jump_p): Ditto.
15052 (auto_inc_p): Ditto.
15053 (loc_mentioned_in_p): Ditto.
15054 * combine.cc (can_combine_p): Update indirect function.
15056 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15058 * config/riscv/autovec.md (<optab><mode><vconvert>2): New pattern.
15059 * config/riscv/iterators.md: New attribute.
15060 * config/riscv/vector-iterators.md: New attribute.
15062 2023-05-30 From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
15064 * config/riscv/riscv.md: Fix signed and unsigned comparison
15067 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15069 * config/riscv/autovec.md (fnma<mode>4): New pattern.
15070 (*fnma<mode>): Ditto.
15072 2023-05-29 Die Li <lidie@eswincomputing.com>
15074 * config/riscv/riscv.cc (riscv_expand_conditional_move_onesided):
15076 (riscv_expand_conditional_move): Reuse the TARGET_SFB_ALU expand
15077 process for TARGET_XTHEADCONDMOV
15079 2023-05-29 Uros Bizjak <ubizjak@gmail.com>
15082 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also require
15083 TARGET_AVX512BW to generate truncv16hiv16qi2.
15085 2023-05-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
15087 * config/riscv/riscv.md (and<mode>3): New expander.
15088 (*and<mode>3) New pattern.
15089 * config/riscv/predicates.md (arith_operand_or_mode_mask): New
15092 2023-05-29 Pan Li <pan2.li@intel.com>
15094 * config/riscv/riscv-v.cc (emit_vlmax_insn): Remove unnecessary
15095 comments and rename local variables.
15096 (emit_nonvlmax_insn): Diito.
15097 (emit_vlmax_merge_insn): Ditto.
15098 (emit_vlmax_cmp_insn): Ditto.
15099 (emit_vlmax_cmp_mu_insn): Ditto.
15100 (emit_scalar_move_insn): Ditto.
15102 2023-05-29 Pan Li <pan2.li@intel.com>
15104 * config/riscv/riscv-v.cc (emit_vlmax_insn): Eliminate the
15106 (emit_nonvlmax_insn): Ditto.
15107 (emit_vlmax_merge_insn): Ditto.
15108 (emit_vlmax_cmp_insn): Ditto.
15109 (emit_vlmax_cmp_mu_insn): Ditto.
15110 (expand_vec_series): Ditto.
15112 2023-05-29 Pan Li <pan2.li@intel.com>
15114 * config/riscv/riscv-protos.h (enum insn_type): New type.
15115 * config/riscv/riscv-v.cc (RVV_INSN_OPERANDS_MAX): New macro.
15116 (rvv_builder::can_duplicate_repeating_sequence_p): Align the referenced
15118 (rvv_builder::get_merged_repeating_sequence): Ditto.
15119 (rvv_builder::repeating_sequence_use_merge_profitable_p): New function
15120 to evaluate the optimization cost.
15121 (rvv_builder::get_merge_scalar_mask): New function to get the merge
15123 (emit_scalar_move_insn): New function to emit vmv.s.x.
15124 (emit_vlmax_integer_move_insn): New function to emit vlmax vmv.v.x.
15125 (emit_nonvlmax_integer_move_insn): New function to emit nonvlmax
15127 (get_repeating_sequence_dup_machine_mode): New function to get the dup
15129 (expand_vector_init_merge_repeating_sequence): New function to perform
15131 (expand_vec_init): Add this vector init optimization.
15132 * config/riscv/riscv.h (BITS_PER_WORD): New macro.
15134 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
15136 * tree-ssa-loop-manip.cc (create_iv): Try harder to find a SLOC to
15137 put onto the increment when it is inserted after the position.
15139 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
15141 * match.pd ((T)P - (T)(P + A) -> -(T) A): Avoid artificial overflow
15144 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15146 * config/riscv/riscv-vsetvl.cc (source_equal_p): Fix ICE.
15148 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15150 * config/riscv/autovec.md (fma<mode>4): New pattern.
15151 (*fma<mode>): Ditto.
15152 * config/riscv/riscv-protos.h (enum insn_type): New enum.
15153 (emit_vlmax_ternary_insn): New function.
15154 * config/riscv/riscv-v.cc (emit_vlmax_ternary_insn): Ditto.
15156 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15158 * config/riscv/vector.md: Fix vimuladd instruction bug.
15160 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15162 * config/riscv/riscv.cc (global_state_unknown_p): New function.
15163 (riscv_mode_after): Fix incorrect VXM.
15165 2023-05-29 Pan Li <pan2.li@intel.com>
15167 * common/config/riscv/riscv-common.cc:
15168 (riscv_implied_info): Add zvfhmin item.
15169 (riscv_ext_version_table): Ditto.
15170 (riscv_ext_flag_table): Ditto.
15171 * config/riscv/riscv-opts.h (MASK_ZVFHMIN): New macro.
15172 (TARGET_ZFHMIN): Align indent.
15173 (TARGET_ZFH): Ditto.
15174 (TARGET_ZVFHMIN): New macro.
15176 2023-05-27 liuhongt <hongtao.liu@intel.com>
15179 * config/i386/sse.md (*andnot<mode>3): Extend below splitter
15180 to VI_AVX2 to cover more modes.
15182 2023-05-27 liuhongt <hongtao.liu@intel.com>
15184 * config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI):
15185 Remove ATOM and ICELAKE(and later) core processors.
15187 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
15189 * config/riscv/autovec.md (<optab><mode>2): Add vneg/vnot.
15191 * config/riscv/riscv-protos.h (emit_vlmax_masked_mu_insn):
15193 * config/riscv/riscv-v.cc (emit_vlmax_masked_mu_insn): New
15196 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
15197 Juzhe Zhong <juzhe.zhong@rivai.ai>
15199 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): New
15201 (<optab><v_quad_trunc><mode>2): Dito.
15202 (<optab><v_oct_trunc><mode>2): Dito.
15203 (trunc<mode><v_double_trunc>2): Dito.
15204 (trunc<mode><v_quad_trunc>2): Dito.
15205 (trunc<mode><v_oct_trunc>2): Dito.
15206 * config/riscv/riscv-protos.h (vectorize_related_mode): Define.
15207 (autovectorize_vector_modes): Define.
15208 * config/riscv/riscv-v.cc (vectorize_related_mode): Implement
15210 (autovectorize_vector_modes): Implement hook.
15211 * config/riscv/riscv.cc (riscv_autovectorize_vector_modes):
15212 Implement target hook.
15213 (riscv_vectorize_related_mode): Implement target hook.
15214 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
15215 (TARGET_VECTORIZE_RELATED_MODE): Define.
15216 * config/riscv/vector-iterators.md: Add lowercase versions of
15217 mode_attr iterators.
15219 2023-05-26 Andrew Stubbs <ams@codesourcery.com>
15220 Tobias Burnus <tobias@codesourcery.com>
15222 * config/gcn/gcn-hsa.h (XNACKOPT): New macro.
15223 (ASM_SPEC): Use XNACKOPT.
15224 * config/gcn/gcn-opts.h (enum sram_ecc_type): Rename to ...
15225 (enum hsaco_attr_type): ... this, and generalize the names.
15226 (TARGET_XNACK): New macro.
15227 * config/gcn/gcn.cc (gcn_option_override): Update to sorry for all
15229 (output_file_start): Update xnack handling.
15230 (gcn_hsa_declare_function_name): Use TARGET_XNACK.
15231 * config/gcn/gcn.opt (-mxnack): Add the "on/off/any" syntax.
15232 (sram_ecc_type): Rename to ...
15233 (hsaco_attr_type: ... this.)
15234 * config/gcn/mkoffload.cc (SET_XNACK_ANY): New macro.
15235 (TEST_XNACK): Delete.
15236 (TEST_XNACK_ANY): New macro.
15237 (TEST_XNACK_ON): New macro.
15238 (main): Support the new -mxnack=on/off/any syntax.
15239 * doc/invoke.texi (-mxnack): Update for new syntax.
15241 2023-05-26 Andrew Pinski <apinski@marvell.com>
15243 * genmatch.cc (emit_debug_printf): New function.
15244 (dt_simplify::gen_1): Emit printf into the code
15245 before the `return true` or returning the folded result
15246 instead of emitting it always.
15248 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
15250 * config/xtensa/xtensa-protos.h
15251 (xtensa_expand_block_set_unrolled_loop,
15252 xtensa_expand_block_set_small_loop): Remove.
15253 (xtensa_expand_block_set): New prototype.
15254 * config/xtensa/xtensa.cc
15255 (xtensa_expand_block_set_libcall): New subfunction.
15256 (xtensa_expand_block_set_unrolled_loop,
15257 xtensa_expand_block_set_small_loop): Rewrite as subfunctions.
15258 (xtensa_expand_block_set): New function that calls the above
15260 * config/xtensa/xtensa.md (memsetsi): Change to invoke only
15261 xtensa_expand_block_set().
15263 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
15265 * config/xtensa/xtensa-protos.h (xtensa_m1_or_1_thru_15):
15267 * config/xtensa/xtensa.cc (xtensa_m1_or_1_thru_15):
15269 * config/xtensa/constraints.md (O):
15270 Change to use the above function.
15271 * config/xtensa/xtensa.md (*subsi3_from_const):
15272 New insn_and_split pattern.
15274 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
15276 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3):
15277 Retract excessive line folding, and correct the value of
15278 the "length" insn attribute related to TARGET_DENSITY.
15279 (*extzvsi-1bit_addsubx): Ditto.
15281 2023-05-26 Uros Bizjak <ubizjak@gmail.com>
15283 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi):
15284 Do not disable call to ix86_expand_vecop_qihi2.
15286 2023-05-26 liuhongt <hongtao.liu@intel.com>
15290 * ira-costs.cc (scan_one_insn): Only use NO_REGS in cost
15291 calculation when !hard_regno_mode_ok for GENERAL_REGS and
15292 mode, otherwise still use GENERAL_REGS.
15294 2023-05-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15296 * config/riscv/riscv.cc (vector_zero_call_used_regs): Add
15297 explict VL and drop VL in ops.
15299 2023-05-25 Jin Ma <jinma@linux.alibaba.com>
15301 * sched-deps.cc (sched_macro_fuse_insns): Insns should not be fusion
15302 in different BB blocks.
15304 2023-05-25 Uros Bizjak <ubizjak@gmail.com>
15306 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
15307 Rewrite to expand to 2x-wider (e.g. V16QI -> V16HImode)
15308 instructions when available. Emulate truncation via
15309 ix86_expand_vec_perm_const_1 when native truncate insn
15311 (ix86_expand_vecop_qihi_partial) <case MULT>: Use pmovzx
15312 when available. Trivially rename some variables.
15313 (ix86_expand_vecop_qihi): Unconditionally call ix86_expand_vecop_qihi2.
15314 * config/i386/i386.cc (ix86_multiplication_cost): Rewrite cost
15315 calculation of V*QImode emulations to account for generation of
15316 2x-wider mode instructions.
15317 (ix86_shift_rotate_cost): Update cost calculation of V*QImode
15318 emulations to account for generation of 2x-wider mode instructions.
15320 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
15323 * config/avr/avr.cc (avr_can_inline_p): New static function.
15324 (TARGET_CAN_INLINE_P): Define to that function.
15326 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
15329 * config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6.
15330 Handle any bit position and use mode QISI.
15331 * config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
15332 of 2 insns for bit-transfer of respective style.
15334 2023-05-25 Christophe Lyon <christophe.lyon@linaro.org>
15336 * config/arm/iterators.md (MVE_6): Remove.
15337 * config/arm/mve.md: Replace MVE_6 with MVE_5.
15339 2023-05-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15340 Richard Sandiford <richard.sandiford@arm.com>
15342 * tree-vect-loop-manip.cc (vect_adjust_loop_lens_control): New
15344 (vect_set_loop_controls_directly): Add decrement IV support.
15345 (vect_set_loop_condition_partial_vectors): Ditto.
15346 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): New
15348 * tree-vectorizer.h (LOOP_VINFO_USING_DECREMENTING_IV_P): New
15351 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15354 * config/aarch64/aarch64-simd.md (aarch64_fcadd<rot><mode>): Rename to...
15355 (aarch64_fcadd<rot><mode><vczle><vczbe>): ... This.
15356 Fix canonicalization of PLUS operands.
15357 (aarch64_fcmla<rot><mode>): Rename to...
15358 (aarch64_fcmla<rot><mode><vczle><vczbe>): ... This.
15359 Fix canonicalization of PLUS operands.
15360 (aarch64_fcmla_lane<rot><mode>): Rename to...
15361 (aarch64_fcmla_lane<rot><mode><vczle><vczbe>): ... This.
15362 Fix canonicalization of PLUS operands.
15363 (aarch64_fcmla_laneq<rot>v4hf): Rename to...
15364 (aarch64_fcmla_laneq<rot>v4hf<vczle><vczbe>): ... This.
15365 Fix canonicalization of PLUS operands.
15366 (aarch64_fcmlaq_lane<rot><mode>): Fix canonicalization of PLUS operands.
15368 2023-05-25 Chris Sidebottom <chris.sidebottom@arm.com>
15370 * config/arm/arm.md (rbitsi2): Rename to...
15371 (arm_rbit): ... This.
15372 (ctzsi2): Adjust for the above.
15373 (arm_rev16si2): Convert to define_expand.
15374 (arm_rev16si2_alt1): New pattern.
15375 (arm_rev16si2_alt): Rename to...
15376 (*arm_rev16si2_alt2): ... This.
15377 * config/arm/arm_acle.h (__ror, __rorl, __rorll, __clz, __clzl, __clzll,
15378 __cls, __clsl, __clsll, __revsh, __rev, __revl, __revll, __rev16,
15379 __rev16l, __rev16ll, __rbit, __rbitl, __rbitll): Define intrinsics.
15380 * config/arm/arm_acle_builtins.def (rbit, rev16si2): Define builtins.
15382 2023-05-25 Alex Coplan <alex.coplan@arm.com>
15385 * config/arm/arm.md (movdf): Generate temporary pseudo in DImode
15387 * config/arm/vfp.md (no_literal_pool_df_immediate): Rather than punning an
15388 lvalue DFmode pseudo into DImode, use a DImode pseudo and pun it into
15389 DFmode as an rvalue.
15391 2023-05-25 Richard Biener <rguenther@suse.de>
15394 * tree-vect-stmts.cc (vectorizable_condition): For
15395 embedded comparisons also handle the case when the target
15396 only provides vec_cmp and vcond_mask.
15398 2023-05-25 Claudiu Zissulescu <claziss@gmail.com>
15400 * config/arc/arc.cc (arc_call_tls_get_addr): Simplify access using
15403 2023-05-25 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
15405 * config/aarch64/aarch64.cc (scalar_move_insn_p): New function.
15406 (seq_cost_ignoring_scalar_moves): Likewise.
15407 (aarch64_expand_vector_init): Call seq_cost_ignoring_scalar_moves.
15409 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15411 * config/aarch64/arm_neon.h (vcage_f64): Reimplement with builtins.
15412 (vcage_f32): Likewise.
15413 (vcages_f32): Likewise.
15414 (vcageq_f32): Likewise.
15415 (vcaged_f64): Likewise.
15416 (vcageq_f64): Likewise.
15417 (vcagts_f32): Likewise.
15418 (vcagt_f32): Likewise.
15419 (vcagt_f64): Likewise.
15420 (vcagtq_f32): Likewise.
15421 (vcagtd_f64): Likewise.
15422 (vcagtq_f64): Likewise.
15423 (vcale_f32): Likewise.
15424 (vcale_f64): Likewise.
15425 (vcaled_f64): Likewise.
15426 (vcales_f32): Likewise.
15427 (vcaleq_f32): Likewise.
15428 (vcaleq_f64): Likewise.
15429 (vcalt_f32): Likewise.
15430 (vcalt_f64): Likewise.
15431 (vcaltd_f64): Likewise.
15432 (vcaltq_f32): Likewise.
15433 (vcaltq_f64): Likewise.
15434 (vcalts_f32): Likewise.
15436 2023-05-25 Hu, Lin1 <lin1.hu@intel.com>
15440 * config/i386/avx512bwintrin.h (_mm512_srli_epi16): Change type from
15441 int to const int or const int to const unsigned int.
15442 (_mm512_mask_srli_epi16): Ditto.
15443 (_mm512_slli_epi16): Ditto.
15444 (_mm512_mask_slli_epi16): Ditto.
15445 (_mm512_maskz_slli_epi16): Ditto.
15446 (_mm512_srai_epi16): Ditto.
15447 (_mm512_mask_srai_epi16): Ditto.
15448 (_mm512_maskz_srai_epi16): Ditto.
15449 * config/i386/avx512fintrin.h (_mm512_slli_epi64): Ditto.
15450 (_mm512_mask_slli_epi64): Ditto.
15451 (_mm512_maskz_slli_epi64): Ditto.
15452 (_mm512_srli_epi64): Ditto.
15453 (_mm512_mask_srli_epi64): Ditto.
15454 (_mm512_maskz_srli_epi64): Ditto.
15455 (_mm512_srai_epi64): Ditto.
15456 (_mm512_mask_srai_epi64): Ditto.
15457 (_mm512_maskz_srai_epi64): Ditto.
15458 (_mm512_slli_epi32): Ditto.
15459 (_mm512_mask_slli_epi32): Ditto.
15460 (_mm512_maskz_slli_epi32): Ditto.
15461 (_mm512_srli_epi32): Ditto.
15462 (_mm512_mask_srli_epi32): Ditto.
15463 (_mm512_maskz_srli_epi32): Ditto.
15464 (_mm512_srai_epi32): Ditto.
15465 (_mm512_mask_srai_epi32): Ditto.
15466 (_mm512_maskz_srai_epi32): Ditto.
15467 * config/i386/avx512vlbwintrin.h (_mm256_mask_srai_epi16): Ditto.
15468 (_mm256_maskz_srai_epi16): Ditto.
15469 (_mm_mask_srai_epi16): Ditto.
15470 (_mm_maskz_srai_epi16): Ditto.
15471 (_mm256_mask_slli_epi16): Ditto.
15472 (_mm256_maskz_slli_epi16): Ditto.
15473 (_mm_mask_slli_epi16): Ditto.
15474 (_mm_maskz_slli_epi16): Ditto.
15475 (_mm_maskz_srli_epi16): Ditto.
15476 * config/i386/avx512vlintrin.h (_mm256_mask_srli_epi32): Ditto.
15477 (_mm256_maskz_srli_epi32): Ditto.
15478 (_mm_mask_srli_epi32): Ditto.
15479 (_mm_maskz_srli_epi32): Ditto.
15480 (_mm256_mask_srli_epi64): Ditto.
15481 (_mm256_maskz_srli_epi64): Ditto.
15482 (_mm_mask_srli_epi64): Ditto.
15483 (_mm_maskz_srli_epi64): Ditto.
15484 (_mm256_mask_srai_epi32): Ditto.
15485 (_mm256_maskz_srai_epi32): Ditto.
15486 (_mm_mask_srai_epi32): Ditto.
15487 (_mm_maskz_srai_epi32): Ditto.
15488 (_mm256_srai_epi64): Ditto.
15489 (_mm256_mask_srai_epi64): Ditto.
15490 (_mm256_maskz_srai_epi64): Ditto.
15491 (_mm_srai_epi64): Ditto.
15492 (_mm_mask_srai_epi64): Ditto.
15493 (_mm_maskz_srai_epi64): Ditto.
15494 (_mm_mask_slli_epi32): Ditto.
15495 (_mm_maskz_slli_epi32): Ditto.
15496 (_mm_mask_slli_epi64): Ditto.
15497 (_mm_maskz_slli_epi64): Ditto.
15498 (_mm256_mask_slli_epi32): Ditto.
15499 (_mm256_maskz_slli_epi32): Ditto.
15500 (_mm256_mask_slli_epi64): Ditto.
15501 (_mm256_maskz_slli_epi64): Ditto.
15503 2023-05-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15505 * config/riscv/vector.md: Remove FRM_REGNUM dependency in rtz
15508 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
15510 * data-streamer-in.cc (streamer_read_value_range): Handle NANs.
15511 * data-streamer-out.cc (streamer_write_vrange): Same.
15512 * value-range.h (class vrange): Make streamer_write_vrange a friend.
15514 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
15516 * value-query.cc (range_query::get_tree_range): Set NAN directly
15518 * value-range.cc (frange::set): Assert that bounds are not NAN.
15520 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
15522 * value-range.cc (add_vrange): Handle known NANs.
15524 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
15526 * value-range.h (frange::set_nan): New.
15528 2023-05-25 Alexandre Oliva <oliva@adacore.com>
15531 * emit-rtl.cc (validate_subreg): Reject a SUBREG of a MEM that
15532 requires stricter alignment than MEM's.
15534 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
15536 PR tree-optimization/107822
15537 PR tree-optimization/107986
15538 * Makefile.in (OBJS): Add gimple-range-phi.o.
15539 * gimple-range-cache.h (ranger_cache::m_estimate): New
15540 phi_analyzer pointer member.
15541 * gimple-range-fold.cc (fold_using_range::range_of_phi): Use
15542 phi_analyzer if no loop info is available.
15543 * gimple-range-phi.cc: New file.
15544 * gimple-range-phi.h: New file.
15545 * tree-vrp.cc (execute_ranger_vrp): Utililze a phi_analyzer.
15547 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
15549 * gimple-range-fold.cc (fur_list::fur_list): Add range_query param
15551 (fold_range): Add range_query parameter.
15552 (fur_relation::fur_relation): New.
15553 (fur_relation::trio): New.
15554 (fur_relation::register_relation): New.
15555 (fold_relations): New.
15556 * gimple-range-fold.h (fold_range): Adjust prototypes.
15557 (fold_relations): New.
15559 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
15561 * gimple-range-cache.cc (ssa_cache::range_of_expr): New.
15562 * gimple-range-cache.h (class ssa_cache): Inherit from range_query.
15563 (ranger_cache::const_query): New.
15564 * gimple-range.cc (gimple_ranger::const_query): New.
15565 * gimple-range.h (gimple_ranger::const_query): New prototype.
15567 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
15569 * gimple-range-cache.cc (ssa_cache::dump): Use get_range.
15570 (ssa_cache::dump_range_query): Delete.
15571 (ssa_lazy_cache::dump_range_query): Delete.
15572 (ssa_lazy_cache::get_range): Move from header file.
15573 (ssa_lazy_cache::clear_range): ditto.
15574 (ssa_lazy_cache::clear): Ditto.
15575 * gimple-range-cache.h (class ssa_cache): Virtualize.
15576 (class ssa_lazy_cache): Inherit and virtualize.
15578 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
15580 * value-range.h (vrange::kind): Remove.
15582 2023-05-24 Roger Sayle <roger@nextmovesoftware.com>
15584 PR middle-end/109840
15585 * match.pd <popcount optimizations>: Preserve zero-extension when
15586 optimizing popcount((T)bswap(x)) and popcount((T)rotate(x,y)) as
15587 popcount((T)x), so the popcount's argument keeps the same type.
15588 <parity optimizations>: Likewise preserve extensions when
15589 simplifying parity((T)bswap(x)) and parity((T)rotate(x,y)) as
15590 parity((T)x), so that the parity's argument type is the same.
15592 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
15594 * ipa-cp.cc (ipa_value_range_from_jfunc): Use new ipa_vr API.
15595 (ipcp_store_vr_results): Same.
15596 * ipa-prop.cc (ipa_vr::ipa_vr): New.
15597 (ipa_vr::get_vrange): New.
15598 (ipa_vr::set_unknown): New.
15599 (ipa_vr::streamer_read): New.
15600 (ipa_vr::streamer_write): New.
15601 (write_ipcp_transformation_info): Use new ipa_vr API.
15602 (read_ipcp_transformation_info): Same.
15603 (ipa_vr::nonzero_p): Delete.
15604 (ipcp_update_vr): Use new ipa_vr API.
15605 * ipa-prop.h (class ipa_vr): Provide an API and hide internals.
15606 * ipa-sra.cc (zap_useless_ipcp_results): Use new ipa_vr API.
15608 2023-05-24 Jan-Benedict Glaw <jbglaw@lug-owl.de>
15610 * config/mcore/mcore.cc (output_inline_const) Make buffer smaller to
15611 silence overflow warnings later on.
15613 2023-05-24 Uros Bizjak <ubizjak@gmail.com>
15615 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
15616 Remove handling of V8QImode.
15617 * config/i386/mmx.md (v<insn>v8qi3): Move from sse.md.
15618 Call ix86_expand_vecop_qihi_partial. Enable for TARGET_MMX_WITH_SSE.
15619 (v<insn>v4qi3): Ditto.
15620 * config/i386/sse.md (v<insn>v8qi3): Remove.
15622 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15625 * config/aarch64/aarch64-simd.md (aarch64_simd_lshr<mode>): Rename to...
15626 (aarch64_simd_lshr<mode><vczle><vczbe>): ... This.
15627 (aarch64_simd_ashr<mode>): Rename to...
15628 (aarch64_simd_ashr<mode><vczle><vczbe>): ... This.
15629 (aarch64_simd_imm_shl<mode>): Rename to...
15630 (aarch64_simd_imm_shl<mode><vczle><vczbe>): ... This.
15631 (aarch64_simd_reg_sshl<mode>): Rename to...
15632 (aarch64_simd_reg_sshl<mode><vczle><vczbe>): ... This.
15633 (aarch64_simd_reg_shl<mode>_unsigned): Rename to...
15634 (aarch64_simd_reg_shl<mode>_unsigned<vczle><vczbe>): ... This.
15635 (aarch64_simd_reg_shl<mode>_signed): Rename to...
15636 (aarch64_simd_reg_shl<mode>_signed<vczle><vczbe>): ... This.
15637 (vec_shr_<mode>): Rename to...
15638 (vec_shr_<mode><vczle><vczbe>): ... This.
15639 (aarch64_<sur>shl<mode>): Rename to...
15640 (aarch64_<sur>shl<mode><vczle><vczbe>): ... This.
15641 (aarch64_<sur>q<r>shl<mode>): Rename to...
15642 (aarch64_<sur>q<r>shl<mode><vczle><vczbe>): ... This.
15644 2023-05-24 Richard Biener <rguenther@suse.de>
15647 * config/i386/i386-expand.cc (ix86_expand_vector_init_general):
15648 Perform final vector composition using
15649 ix86_expand_vector_init_general instead of setting
15650 the highpart and lowpart which causes spilling.
15652 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
15654 PR tree-optimization/109695
15655 * gimple-range-cache.cc (ranger_cache::get_global_range): Add
15657 * gimple-range-cache.h (ranger_cache::get_global_range): Ditto.
15658 * gimple-range.cc (gimple_ranger::range_of_stmt): Pass changed
15659 flag to set_global_range.
15660 (gimple_ranger::prefill_stmt_dependencies): Ditto.
15662 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
15664 PR tree-optimization/109695
15665 * gimple-range-cache.cc (temporal_cache::temporal_value): Return
15667 (temporal_cache::current_p): Check always_current method.
15668 (temporal_cache::set_always_current): Add param and set value
15670 (temporal_cache::always_current_p): New.
15671 (ranger_cache::get_global_range): Adjust.
15672 (ranger_cache::set_global_range): set always current first.
15674 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
15676 PR tree-optimization/109695
15677 * gimple-range-cache.cc (ranger_cache::get_global_range): Call
15678 fold_range with global query to choose an initial value.
15680 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15682 * config/riscv/riscv-protos.h (enum frm_field_enum): Add FRM_
15685 2023-05-24 Richard Biener <rguenther@suse.de>
15687 PR tree-optimization/109849
15688 * tree-ssa-pre.cc (do_hoist_insertion): Do not intersect
15689 expressions but take the first sets.
15691 2023-05-24 Gaius Mulley <gaiusmod2@gmail.com>
15694 * doc/gm2.texi (High procedure function): New node.
15695 (Using): New menu entry for High procedure function.
15697 2023-05-24 Richard Sandiford <richard.sandiford@arm.com>
15699 PR rtl-optimization/109940
15700 * early-remat.cc (postorder_index): Rename to...
15701 (rpo_index): ...this.
15702 (compare_candidates): Sort by decreasing rpo_index rather than
15703 increasing postorder_index.
15704 (early_remat::sort_candidates): Calculate the forward RPO from
15706 (early_remat::local_phase): Follow forward RPO using DF_FORWARD,
15707 rather than DF_BACKWARD in reverse.
15709 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15712 * config/arm/arm-builtins.cc (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS): Use
15713 qualifier_none for the return operand.
15715 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15717 * config/riscv/autovec.md (<optab><mode>3): New pattern.
15718 (one_cmpl<mode>2): Ditto.
15719 (*<optab>not<mode>): Ditto.
15720 (*n<optab><mode>): Ditto.
15721 * config/riscv/riscv-v.cc (expand_vec_cmp_float): Change to
15724 2023-05-24 Kewen Lin <linkw@linux.ibm.com>
15726 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Adjust the
15727 calculation on n_perms by considering nvectors_per_build.
15729 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15730 Richard Sandiford <richard.sandiford@arm.com>
15732 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): New pattern.
15733 (vec_cmp<mode><vm>): New pattern.
15734 (vec_cmpu<mode><vm>): New pattern.
15735 (vcond<V:mode><VI:mode>): New pattern.
15736 (vcondu<V:mode><VI:mode>): New pattern.
15737 * config/riscv/riscv-protos.h (enum insn_type): Add new enum.
15738 (emit_vlmax_merge_insn): New function.
15739 (emit_vlmax_cmp_insn): Ditto.
15740 (emit_vlmax_cmp_mu_insn): Ditto.
15741 (expand_vec_cmp): Ditto.
15742 (expand_vec_cmp_float): Ditto.
15743 (expand_vcond): Ditto.
15744 * config/riscv/riscv-v.cc (emit_vlmax_merge_insn): Ditto.
15745 (emit_vlmax_cmp_insn): Ditto.
15746 (emit_vlmax_cmp_mu_insn): Ditto.
15747 (get_cmp_insn_code): Ditto.
15748 (expand_vec_cmp): Ditto.
15749 (expand_vec_cmp_float): Ditto.
15750 (expand_vcond): Ditto.
15752 2023-05-24 Pan Li <pan2.li@intel.com>
15754 * config/riscv/genrvv-type-indexer.cc (main): Add
15755 unsigned_eew*_lmul1_interpret for indexer.
15756 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
15757 Register vuint*m1_t interpret function.
15758 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
15759 New macro for vuint8m1_t.
15760 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
15761 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
15762 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
15763 (vbool1_t): Add to unsigned_eew*_interpret_ops.
15764 (vbool2_t): Likewise.
15765 (vbool4_t): Likewise.
15766 (vbool8_t): Likewise.
15767 (vbool16_t): Likewise.
15768 (vbool32_t): Likewise.
15769 (vbool64_t): Likewise.
15770 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
15771 New macro for vuint*m1_t.
15772 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
15773 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
15774 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
15775 (required_extensions_p): Add vuint*m1_t interpret case.
15776 * config/riscv/riscv-vector-builtins.def (unsigned_eew8_lmul1_interpret):
15777 Add vuint*m1_t interpret to base type.
15778 (unsigned_eew16_lmul1_interpret): Likewise.
15779 (unsigned_eew32_lmul1_interpret): Likewise.
15780 (unsigned_eew64_lmul1_interpret): Likewise.
15782 2023-05-24 Pan Li <pan2.li@intel.com>
15784 * config/riscv/genrvv-type-indexer.cc (EEW_SIZE_LIST): New macro
15785 for the eew size list.
15786 (LMUL1_LOG2): New macro for the log2 value of lmul=1.
15787 (main): Add signed_eew*_lmul1_interpret for indexer.
15788 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
15789 Register vint*m1_t interpret function.
15790 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
15791 New macro for vint8m1_t.
15792 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
15793 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
15794 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
15795 (vbool1_t): Add to signed_eew*_interpret_ops.
15796 (vbool2_t): Likewise.
15797 (vbool4_t): Likewise.
15798 (vbool8_t): Likewise.
15799 (vbool16_t): Likewise.
15800 (vbool32_t): Likewise.
15801 (vbool64_t): Likewise.
15802 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
15803 New macro for vint*m1_t.
15804 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
15805 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
15806 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
15807 (required_extensions_p): Add vint8m1_t interpret case.
15808 * config/riscv/riscv-vector-builtins.def (signed_eew8_lmul1_interpret):
15809 Add vint*m1_t interpret to base type.
15810 (signed_eew16_lmul1_interpret): Likewise.
15811 (signed_eew32_lmul1_interpret): Likewise.
15812 (signed_eew64_lmul1_interpret): Likewise.
15814 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15816 * config/riscv/autovec.md: Adjust for new interface.
15817 * config/riscv/riscv-protos.h (emit_vlmax_insn): Add VL operand.
15818 (emit_nonvlmax_insn): Add AVL operand.
15819 * config/riscv/riscv-v.cc (emit_vlmax_insn): Add VL operand.
15820 (emit_nonvlmax_insn): Add AVL operand.
15821 (sew64_scalar_helper): Adjust for new interface.
15822 (expand_tuple_move): Ditto.
15823 * config/riscv/vector.md: Ditto.
15825 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15827 * config/riscv/riscv-v.cc (expand_vec_series): Remove magic number.
15828 (expand_const_vector): Ditto.
15829 (legitimize_move): Ditto.
15830 (sew64_scalar_helper): Ditto.
15831 (expand_tuple_move): Ditto.
15832 (expand_vector_init_insert_elems): Ditto.
15833 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
15835 2023-05-24 liuhongt <hongtao.liu@intel.com>
15838 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
15839 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} and
15840 _mm_abs_{pi8,pi16,pi32} into gimple ABS_EXPR.
15841 (ix86_masked_all_ones): Handle 64-bit mask.
15842 * config/i386/i386-builtin.def: Replace icode of related
15843 non-mask simd abs builtins with CODE_FOR_nothing.
15845 2023-05-23 Martin Uecker <uecker@tugraz.at>
15848 * function.cc (gimplify_parm_type): Remove function.
15849 (gimplify_parameters): Call gimplify_type_sizes.
15851 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
15853 * config/xtensa/xtensa.md (*addsubx): Rename from '*addx',
15854 and change to also accept '*subx' pattern.
15857 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
15859 * config/xtensa/predicates.md (addsub_operator): New.
15860 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3,
15861 *extzvsi-1bit_addsubx): New insn_and_split patterns.
15862 * config/xtensa/xtensa.cc (xtensa_rtx_costs):
15863 Add a special case about ifcvt 'noce_try_cmove()' to handle
15864 constant loads that do not fit into signed 12 bits in the
15865 patterns added above.
15867 2023-05-23 Richard Biener <rguenther@suse.de>
15869 PR tree-optimization/109747
15870 * tree-vect-slp.cc (vect_prologue_cost_for_slp): Pass down
15871 the SLP node only once to the cost hook.
15873 2023-05-23 Georg-Johann Lay <avr@gjlay.de>
15875 * config/avr/avr.cc (avr_insn_cost): New static function.
15876 (TARGET_INSN_COST): Define to that function.
15878 2023-05-23 Richard Biener <rguenther@suse.de>
15881 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
15882 For vector construction or splats apply GPR->XMM move
15883 costing. QImode memory can be handled directly only
15884 with SSE4.1 pinsrb.
15886 2023-05-23 Richard Biener <rguenther@suse.de>
15888 PR tree-optimization/108752
15889 * tree-vect-stmts.cc (vectorizable_operation): For bit
15890 operations with generic word_mode vectors do not cost
15891 an extra stmt. For plus, minus and negate also cost the
15892 constant materialization.
15894 2023-05-23 Uros Bizjak <ubizjak@gmail.com>
15896 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial):
15897 Call ix86_expand_vec_shift_qihi_constant for shifts
15898 with constant count operand.
15899 * config/i386/i386.cc (ix86_shift_rotate_cost):
15900 Handle V4QImode and V8QImode.
15901 * config/i386/mmx.md (<insn>v8qi3): New insn pattern.
15902 (<insn>v4qi3): Ditto.
15904 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15906 * config/riscv/vector.md: Add mode.
15908 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
15910 PR tree-optimization/109934
15911 * value-range.cc (irange::invert): Remove buggy special case.
15913 2023-05-23 Richard Biener <rguenther@suse.de>
15915 * tree-ssa-pre.cc (compute_antic_aux): Dump the correct
15918 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
15921 * config/aarch64/aarch64.cc (aarch64_modes_tieable_p): Allow
15922 subregs between any scalars that are 64 bits or smaller.
15923 * config/aarch64/iterators.md (SUBDI_BITS): New int iterator.
15924 (bits_etype): New int attribute.
15925 * config/aarch64/aarch64.md (*insv_reg<mode>_<SUBDI_BITS>)
15926 (*aarch64_bfi<GPI:mode><ALLX:mode>_<SUBDI_BITS>): New patterns.
15927 (*aarch64_bfidi<ALLX:mode>_subreg_<SUBDI_BITS>): Likewise.
15929 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
15931 * doc/md.texi: Document that <FOO> can be used to refer to the
15932 numerical value of an int iterator FOO. Tweak other parts of
15933 the int iterator documentation.
15934 * read-rtl.cc (iterator_group::has_self_attr): New field.
15935 (map_attr_string): When has_self_attr is true, make <FOO>
15936 expand to the current value of iterator FOO.
15937 (initialize_iterators): Set has_self_attr for int iterators.
15939 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15941 * config/riscv/autovec.md: Refactor the framework of RVV auto-vectorization.
15942 * config/riscv/riscv-protos.h (RVV_MISC_OP_NUM): Ditto.
15943 (RVV_UNOP_NUM): New macro.
15944 (RVV_BINOP_NUM): Ditto.
15945 (legitimize_move): Refactor the framework of RVV auto-vectorization.
15946 (emit_vlmax_op): Ditto.
15947 (emit_vlmax_reg_op): Ditto.
15948 (emit_len_op): Ditto.
15949 (emit_len_binop): Ditto.
15950 (emit_vlmax_tany_many): Ditto.
15951 (emit_nonvlmax_tany_many): Ditto.
15952 (sew64_scalar_helper): Ditto.
15953 (expand_tuple_move): Ditto.
15954 * config/riscv/riscv-v.cc (emit_pred_op): Ditto.
15955 (emit_pred_binop): Ditto.
15956 (emit_vlmax_op): Ditto.
15957 (emit_vlmax_tany_many): New function.
15958 (emit_len_op): Remove.
15959 (emit_nonvlmax_tany_many): New function.
15960 (emit_vlmax_reg_op): Remove.
15961 (emit_len_binop): Ditto.
15962 (emit_index_op): Ditto.
15963 (expand_vec_series): Refactor the framework of RVV auto-vectorization.
15964 (expand_const_vector): Ditto.
15965 (legitimize_move): Ditto.
15966 (sew64_scalar_helper): Ditto.
15967 (expand_tuple_move): Ditto.
15968 (expand_vector_init_insert_elems): Ditto.
15969 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
15970 * config/riscv/vector.md: Ditto.
15972 2023-05-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15975 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Add predicate
15976 and constraint for operand 0.
15977 (add_vec_concat_subst_be): Likewise.
15979 2023-05-23 Richard Biener <rguenther@suse.de>
15981 PR tree-optimization/109849
15982 * tree-ssa-pre.cc (do_hoist_insertion): Compute ANTIC_OUT
15983 and use that to determine what to hoist.
15985 2023-05-23 Eric Botcazou <ebotcazou@adacore.com>
15987 * fold-const.cc (native_encode_initializer) <CONSTRUCTOR>: Apply the
15988 specific treatment for bit-fields only if they have an integral type
15989 and filter out non-integral bit-fields that do not start and end on
15992 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
15994 PR tree-optimization/109920
15995 * value-range.h (RESIZABLE>::~int_range): Use delete[].
15997 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
15999 * config/i386/i386.cc (ix86_shift_rotate_cost): Correct
16000 calcuation of integer vector mode costs to reflect generated
16001 instruction sequences of different integer vector modes and
16002 different target ABIs. Remove "speed" function argument.
16003 (ix86_rtx_costs): Update call for removed function argument.
16004 (ix86_vector_costs::add_stmt_cost): Ditto.
16006 2023-05-22 Aldy Hernandez <aldyh@redhat.com>
16008 * value-range.h (class Value_Range): Implement set_zero,
16009 set_nonzero, and nonzero_p.
16011 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
16013 * config/i386/i386.cc (ix86_multiplication_cost): Add
16014 the cost of a memory read to the cost of V?QImode sequences.
16016 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16018 * config/riscv/riscv-v.cc: Add "m_" prefix.
16020 2023-05-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16022 * tree-vect-loop.cc (vect_get_loop_len): Fix issue for
16023 multiple-rgroup of length.
16024 * tree-vect-stmts.cc (vectorizable_store): Ditto.
16025 (vectorizable_load): Ditto.
16026 * tree-vectorizer.h (vect_get_loop_len): Ditto.
16028 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16030 * config/riscv/riscv.cc (riscv_const_insns): Reorganize the
16033 2023-05-22 Kewen Lin <linkw@linux.ibm.com>
16035 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Refactor the
16036 handling for the case index == count.
16038 2023-05-21 Georg-Johann Lay <avr@gjlay.de>
16041 * config/avr/avr.cc (avr_fold_builtin) [AVR_BUILTIN_INSERT_BITS]:
16042 Don't fold to XOR / AND / XOR if just one bit is copied to the
16045 2023-05-21 Roger Sayle <roger@nextmovesoftware.com>
16047 * config/nvptx/nvptx.cc (nvptx_expand_brev): Expand target
16048 builtin for bit reversal using brev instruction.
16049 (enum nvptx_builtins): Add NVPTX_BUILTIN_BREV and
16050 NVPTX_BUILTIN_BREVLL.
16051 (nvptx_init_builtins): Define "brev" and "brevll".
16052 (nvptx_expand_builtin): Expand NVPTX_BUILTIN_BREV and
16053 NVPTX_BUILTIN_BREVLL via nvptx_expand_brev function.
16054 * doc/extend.texi (Nvidia PTX Builtin-in Functions): New
16055 section, document __builtin_nvptx_brev{,ll}.
16057 2023-05-21 Jakub Jelinek <jakub@redhat.com>
16059 PR tree-optimization/109505
16060 * match.pd ((x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2),
16061 Combine successive equal operations with constants,
16062 (A +- CST1) +- CST2 -> A + CST3, (CST1 - A) +- CST2 -> CST3 - A,
16063 CST1 - (CST2 - A) -> CST3 + A): Use ! on ops with 2 CONSTANT_CLASS_P
16066 2023-05-21 Andrew Pinski <apinski@marvell.com>
16068 * expr.cc (expand_single_bit_test): Correct bitpos for big-endian.
16070 2023-05-21 Pan Li <pan2.li@intel.com>
16072 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): Add the
16073 rest bool size, aka 2, 4, 8, 16, 32, 64.
16074 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
16075 Register vbool[2|4|8|16|32|64] interpret function.
16076 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_BOOL2_INTERPRET_OPS):
16077 New macro for vbool2_t.
16078 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
16079 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
16080 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
16081 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
16082 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
16083 (vint8m1_t): Add the type to bool[2|4|8|16|32|64]_interpret_ops.
16084 (vint16m1_t): Likewise.
16085 (vint32m1_t): Likewise.
16086 (vint64m1_t): Likewise.
16087 (vuint8m1_t): Likewise.
16088 (vuint16m1_t): Likewise.
16089 (vuint32m1_t): Likewise.
16090 (vuint64m1_t): Likewise.
16091 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_BOOL2_INTERPRET_OPS):
16092 New macro for vbool2_t.
16093 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
16094 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
16095 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
16096 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
16097 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
16098 (required_extensions_p): Add vbool[2|4|8|16|32|64] interpret case.
16099 * config/riscv/riscv-vector-builtins.def (bool2_interpret): Add
16100 vbool2_t interprect to base type.
16101 (bool4_interpret): Likewise.
16102 (bool8_interpret): Likewise.
16103 (bool16_interpret): Likewise.
16104 (bool32_interpret): Likewise.
16105 (bool64_interpret): Likewise.
16107 2023-05-21 Andrew Pinski <apinski@marvell.com>
16109 PR middle-end/109919
16110 * expr.cc (expand_single_bit_test): Don't use the
16111 target for expand_expr.
16113 2023-05-20 Gerald Pfeifer <gerald@pfeifer.com>
16115 * doc/install.texi (Specific): Remove de facto empty alpha*-*-*
16118 2023-05-20 Pan Li <pan2.li@intel.com>
16120 * mode-switching.cc (entity_map): Initialize the array to zero.
16123 2023-05-20 Triffid Hunter <triffid.hunter@gmail.com>
16126 * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi):
16127 Remove superfluous "parallel" in insn pattern.
16128 ([u]divmod<mode>4): Tidy code. Use gcc_unreachable() instead of
16129 printing error text to assembly.
16131 2023-05-20 Andrew Pinski <apinski@marvell.com>
16133 * expr.cc (fold_single_bit_test): Rename to ...
16134 (expand_single_bit_test): This and expand directly.
16135 (do_store_flag): Update for the rename function.
16137 2023-05-20 Andrew Pinski <apinski@marvell.com>
16139 * expr.cc (fold_single_bit_test): Use BIT_FIELD_REF
16140 instead of shift/and.
16142 2023-05-20 Andrew Pinski <apinski@marvell.com>
16144 * expr.cc (fold_single_bit_test): Add an assert
16145 and simplify based on code being NE_EXPR or EQ_EXPR.
16147 2023-05-20 Andrew Pinski <apinski@marvell.com>
16149 * expr.cc (fold_single_bit_test): Take inner and bitnum
16150 instead of arg0 and arg1. Update the code.
16151 (do_store_flag): Don't create a tree when calling
16152 fold_single_bit_test instead just call it with the bitnum
16153 and the inner tree.
16155 2023-05-20 Andrew Pinski <apinski@marvell.com>
16157 * expr.cc (fold_single_bit_test): Use get_def_for_expr
16158 instead of checking the inner's code.
16160 2023-05-20 Andrew Pinski <apinski@marvell.com>
16162 * expr.cc (fold_single_bit_test_into_sign_test): Inline into ...
16163 (fold_single_bit_test): This and simplify.
16165 2023-05-20 Andrew Pinski <apinski@marvell.com>
16167 * fold-const.cc (fold_single_bit_test_into_sign_test): Move to
16169 (fold_single_bit_test): Likewise.
16170 * expr.cc (fold_single_bit_test_into_sign_test): Move from fold-const.cc
16171 (fold_single_bit_test): Likewise and make static.
16172 * fold-const.h (fold_single_bit_test): Remove declaration.
16174 2023-05-20 Die Li <lidie@eswincomputing.com>
16176 * config/riscv/riscv.cc (riscv_expand_conditional_move): Fix mode
16179 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
16181 * config/riscv/bitmanip.md (branch<X:mode>_bext): New split pattern.
16183 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
16186 * config/riscv/bitmanip.md
16187 (<bitmanip_optab>disi2): Match with any_extend.
16188 (<bitmanip_optab>disi2_sext): New pattern to match
16189 with sign extend using an ANDI instruction.
16191 2023-05-19 Nathan Sidwell <nathan@acm.org>
16194 * opts.h (handle_deferred_dump_options): Declare.
16195 * opts-global.cc (handle_common_deferred_options): Do not handle
16197 (handle_deferred_dump_options): New.
16198 * toplev.cc (toplev::main): Call it after plugin init.
16200 2023-05-19 Joern Rennecke <joern.rennecke@embecosm.com>
16202 * config/riscv/constraints.md (DsS, DsD): Restore agreement
16203 with shiftm1 mode attribute.
16205 2023-05-19 Andrew Pinski <apinski@marvell.com>
16208 * gcc.cc (default_compilers["@c-header"]): Add %w
16209 after the --output-pch.
16211 2023-05-19 Vineet Gupta <vineetg@rivosinc.com>
16213 * config/riscv/riscv.cc (riscv_split_integer): if loval is equal
16214 to hival, ASHIFT the corresponding regs.
16216 2023-05-19 Robin Dapp <rdapp@ventanamicro.com>
16218 * config/riscv/riscv.cc (riscv_const_insns): Remove else.
16220 2023-05-19 Jakub Jelinek <jakub@redhat.com>
16222 PR tree-optimization/105776
16223 * tree-ssa-math-opts.cc (arith_overflow_check_p): If cast_stmt is
16224 non-NULL, allow division statement to have a cast as single imm use
16225 rather than comparison/condition.
16226 (match_arith_overflow): In that case remove the cast stmt in addition
16227 to the division statement.
16229 2023-05-19 Jakub Jelinek <jakub@redhat.com>
16231 PR tree-optimization/101856
16232 * tree-ssa-math-opts.cc (match_arith_overflow): Pattern detect
16233 unsigned __builtin_mul_overflow_p even when umulv4_optab doesn't
16234 support it but umul_highpart_optab does.
16236 2023-05-19 Eric Botcazou <ebotcazou@adacore.com>
16238 * varasm.cc (output_constructor_bitfield): Call tree_to_uhwi instead
16239 of tree_to_shwi on array indices. Minor tweaks.
16241 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
16243 * alias.cc (ref_all_alias_ptr_type_p): Use _P() defines from tree.h.
16244 * attribs.cc (diag_attr_exclusions): Ditto.
16245 (decl_attributes): Ditto.
16246 (build_type_attribute_qual_variant): Ditto.
16247 * builtins.cc (fold_builtin_carg): Ditto.
16248 (fold_builtin_next_arg): Ditto.
16249 (do_mpc_arg2): Ditto.
16250 * cfgexpand.cc (expand_return): Ditto.
16251 * cgraph.h (decl_in_symtab_p): Ditto.
16252 (symtab_node::get_create): Ditto.
16253 * dwarf2out.cc (base_type_die): Ditto.
16254 (implicit_ptr_descriptor): Ditto.
16255 (gen_array_type_die): Ditto.
16256 (gen_type_die_with_usage): Ditto.
16257 (optimize_location_into_implicit_ptr): Ditto.
16258 * expr.cc (do_store_flag): Ditto.
16259 * fold-const.cc (negate_expr_p): Ditto.
16260 (fold_negate_expr_1): Ditto.
16261 (fold_convert_const): Ditto.
16262 (fold_convert_loc): Ditto.
16263 (constant_boolean_node): Ditto.
16264 (fold_binary_op_with_conditional_arg): Ditto.
16265 (build_fold_addr_expr_with_type_loc): Ditto.
16266 (fold_comparison): Ditto.
16267 (fold_checksum_tree): Ditto.
16268 (tree_unary_nonnegative_warnv_p): Ditto.
16269 (integer_valued_real_unary_p): Ditto.
16270 (fold_read_from_constant_string): Ditto.
16271 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text): Ditto.
16272 * gimple-expr.cc (useless_type_conversion_p): Ditto.
16273 (is_gimple_reg): Ditto.
16274 (is_gimple_asm_val): Ditto.
16275 (mark_addressable): Ditto.
16276 * gimple-expr.h (is_gimple_variable): Ditto.
16277 (virtual_operand_p): Ditto.
16278 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores): Ditto.
16279 * gimplify.cc (gimplify_bind_expr): Ditto.
16280 (gimplify_return_expr): Ditto.
16281 (gimple_add_padding_init_for_auto_var): Ditto.
16282 (gimplify_addr_expr): Ditto.
16283 (omp_add_variable): Ditto.
16284 (omp_notice_variable): Ditto.
16285 (omp_get_base_pointer): Ditto.
16286 (omp_strip_components_and_deref): Ditto.
16287 (omp_strip_indirections): Ditto.
16288 (omp_accumulate_sibling_list): Ditto.
16289 (omp_build_struct_sibling_lists): Ditto.
16290 (gimplify_adjust_omp_clauses_1): Ditto.
16291 (gimplify_adjust_omp_clauses): Ditto.
16292 (gimplify_omp_for): Ditto.
16293 (goa_lhs_expr_p): Ditto.
16294 (gimplify_one_sizepos): Ditto.
16295 * graphite-scop-detection.cc (scop_detection::graphite_can_represent_scev): Ditto.
16296 * ipa-devirt.cc (odr_types_equivalent_p): Ditto.
16297 * ipa-prop.cc (ipa_set_jf_constant): Ditto.
16298 (propagate_controlled_uses): Ditto.
16299 * ipa-sra.cc (type_prevails_p): Ditto.
16300 (scan_expr_access): Ditto.
16301 * optabs-tree.cc (optab_for_tree_code): Ditto.
16302 * toplev.cc (wrapup_global_declaration_1): Ditto.
16303 * trans-mem.cc (transaction_invariant_address_p): Ditto.
16304 * tree-cfg.cc (verify_types_in_gimple_reference): Ditto.
16305 (verify_gimple_comparison): Ditto.
16306 (verify_gimple_assign_binary): Ditto.
16307 (verify_gimple_assign_single): Ditto.
16308 * tree-complex.cc (get_component_ssa_name): Ditto.
16309 * tree-emutls.cc (lower_emutls_2): Ditto.
16310 * tree-inline.cc (copy_tree_body_r): Ditto.
16311 (estimate_move_cost): Ditto.
16312 (copy_decl_for_dup_finish): Ditto.
16313 * tree-nested.cc (convert_nonlocal_omp_clauses): Ditto.
16314 (note_nonlocal_vla_type): Ditto.
16315 (convert_local_omp_clauses): Ditto.
16316 (remap_vla_decls): Ditto.
16317 (fixup_vla_decls): Ditto.
16318 * tree-parloops.cc (loop_has_vector_phi_nodes): Ditto.
16319 * tree-pretty-print.cc (print_declaration): Ditto.
16320 (print_call_name): Ditto.
16321 * tree-sra.cc (compare_access_positions): Ditto.
16322 * tree-ssa-alias.cc (compare_type_sizes): Ditto.
16323 * tree-ssa-ccp.cc (get_default_value): Ditto.
16324 * tree-ssa-coalesce.cc (populate_coalesce_list_for_outofssa): Ditto.
16325 * tree-ssa-dom.cc (reduce_vector_comparison_to_scalar_comparison): Ditto.
16326 * tree-ssa-forwprop.cc (can_propagate_from): Ditto.
16327 * tree-ssa-propagate.cc (may_propagate_copy): Ditto.
16328 * tree-ssa-sccvn.cc (fully_constant_vn_reference_p): Ditto.
16329 * tree-ssa-sink.cc (statement_sink_location): Ditto.
16330 * tree-ssa-structalias.cc (type_must_have_pointers): Ditto.
16331 * tree-ssa-ter.cc (find_replaceable_in_bb): Ditto.
16332 * tree-ssa-uninit.cc (warn_uninit): Ditto.
16333 * tree-ssa.cc (maybe_rewrite_mem_ref_base): Ditto.
16334 (non_rewritable_mem_ref_base): Ditto.
16335 * tree-streamer-in.cc (lto_input_ts_type_non_common_tree_pointers): Ditto.
16336 * tree-streamer-out.cc (write_ts_type_non_common_tree_pointers): Ditto.
16337 * tree-vect-generic.cc (do_binop): Ditto.
16339 * tree-vect-stmts.cc (vect_init_vector): Ditto.
16340 * tree-vector-builder.h (tree_vector_builder::note_representative): Ditto.
16341 * tree.cc (sign_mask_for): Ditto.
16342 (verify_type_variant): Ditto.
16343 (gimple_canonical_types_compatible_p): Ditto.
16344 (verify_type): Ditto.
16345 * ubsan.cc (get_ubsan_type_info_for_type): Ditto.
16346 * var-tracking.cc (prepare_call_arguments): Ditto.
16347 (vt_add_function_parameters): Ditto.
16348 * varasm.cc (decode_addr_const): Ditto.
16350 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
16352 * omp-low.cc (scan_sharing_clauses): Use _P() defines from tree.h.
16353 (lower_reduction_clauses): Ditto.
16354 (lower_send_clauses): Ditto.
16355 (lower_omp_task_reductions): Ditto.
16356 * omp-oacc-neuter-broadcast.cc (install_var_field): Ditto.
16357 (worker_single_copy): Ditto.
16358 * omp-offload.cc (oacc_rewrite_var_decl): Ditto.
16359 * omp-simd-clone.cc (plausible_type_for_simd_clone): Ditto.
16361 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
16363 * lto-streamer-in.cc (lto_input_var_decl_ref): Use _P defines from
16365 (lto_read_body_or_constructor): Ditto.
16366 * lto-streamer-out.cc (tree_is_indexable): Ditto.
16367 (lto_output_var_decl_ref): Ditto.
16368 (DFS::DFS_write_tree_body): Ditto.
16369 (wrap_refs): Ditto.
16370 (write_symbol_extension_info): Ditto.
16372 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
16374 * config/aarch64/aarch64.cc (aarch64_short_vector_p): Use _P
16375 defines from tree.h.
16376 (aarch64_mangle_type): Ditto.
16377 * config/alpha/alpha.cc (alpha_in_small_data_p): Ditto.
16378 (alpha_gimplify_va_arg_1): Ditto.
16379 * config/arc/arc.cc (arc_encode_section_info): Ditto.
16380 (arc_is_aux_reg_p): Ditto.
16381 (arc_is_uncached_mem_p): Ditto.
16382 (arc_handle_aux_attribute): Ditto.
16383 * config/arm/arm.cc (arm_handle_isr_attribute): Ditto.
16384 (arm_handle_cmse_nonsecure_call): Ditto.
16385 (arm_set_default_type_attributes): Ditto.
16386 (arm_is_segment_info_known): Ditto.
16387 (arm_mangle_type): Ditto.
16388 * config/arm/unknown-elf.h (IN_NAMED_SECTION_P): Ditto.
16389 * config/avr/avr.cc (avr_lookup_function_attribute1): Ditto.
16390 (avr_decl_absdata_p): Ditto.
16391 (avr_insert_attributes): Ditto.
16392 (avr_section_type_flags): Ditto.
16393 (avr_encode_section_info): Ditto.
16394 * config/bfin/bfin.cc (bfin_handle_l2_attribute): Ditto.
16395 * config/bpf/bpf.cc (bpf_core_compute): Ditto.
16396 * config/c6x/c6x.cc (c6x_in_small_data_p): Ditto.
16397 * config/csky/csky.cc (csky_handle_isr_attribute): Ditto.
16398 (csky_mangle_type): Ditto.
16399 * config/darwin-c.cc (darwin_pragma_unused): Ditto.
16400 * config/darwin.cc (is_objc_metadata): Ditto.
16401 * config/epiphany/epiphany.cc (epiphany_function_ok_for_sibcall): Ditto.
16402 * config/epiphany/epiphany.h (ROUND_TYPE_ALIGN): Ditto.
16403 * config/frv/frv.cc (frv_emit_movsi): Ditto.
16404 * config/gcn/gcn-tree.cc (gcn_lockless_update): Ditto.
16405 * config/gcn/gcn.cc (gcn_asm_output_symbol_ref): Ditto.
16406 * config/h8300/h8300.cc (h8300_encode_section_info): Ditto.
16407 * config/i386/i386-expand.cc: Ditto.
16408 * config/i386/i386.cc (type_natural_mode): Ditto.
16409 (ix86_function_arg): Ditto.
16410 (ix86_data_alignment): Ditto.
16411 (ix86_local_alignment): Ditto.
16412 (ix86_simd_clone_compute_vecsize_and_simdlen): Ditto.
16413 * config/i386/winnt-cxx.cc (i386_pe_type_dllimport_p): Ditto.
16414 (i386_pe_type_dllexport_p): Ditto.
16415 (i386_pe_adjust_class_at_definition): Ditto.
16416 * config/i386/winnt.cc (i386_pe_determine_dllimport_p): Ditto.
16417 (i386_pe_binds_local_p): Ditto.
16418 (i386_pe_section_type_flags): Ditto.
16419 * config/ia64/ia64.cc (ia64_encode_section_info): Ditto.
16420 (ia64_gimplify_va_arg): Ditto.
16421 (ia64_in_small_data_p): Ditto.
16422 * config/iq2000/iq2000.cc (iq2000_function_arg): Ditto.
16423 * config/lm32/lm32.cc (lm32_in_small_data_p): Ditto.
16424 * config/loongarch/loongarch.cc (loongarch_handle_model_attribute): Ditto.
16425 * config/m32c/m32c.cc (m32c_insert_attributes): Ditto.
16426 * config/mcore/mcore.cc (mcore_mark_dllimport): Ditto.
16427 (mcore_encode_section_info): Ditto.
16428 * config/microblaze/microblaze.cc (microblaze_elf_in_small_data_p): Ditto.
16429 * config/mips/mips.cc (mips_output_aligned_decl_common): Ditto.
16430 * config/mmix/mmix.cc (mmix_encode_section_info): Ditto.
16431 * config/nvptx/nvptx.cc (nvptx_encode_section_info): Ditto.
16432 (pass_in_memory): Ditto.
16433 (nvptx_generate_vector_shuffle): Ditto.
16434 (nvptx_lockless_update): Ditto.
16435 * config/pa/pa.cc (pa_function_arg_padding): Ditto.
16436 (pa_function_value): Ditto.
16437 (pa_function_arg): Ditto.
16438 * config/pa/pa.h (IN_NAMED_SECTION_P): Ditto.
16439 (TEXT_SPACE_P): Ditto.
16440 * config/pa/som.h (MAKE_DECL_ONE_ONLY): Ditto.
16441 * config/pdp11/pdp11.cc (pdp11_return_in_memory): Ditto.
16442 * config/riscv/riscv.cc (riscv_in_small_data_p): Ditto.
16443 (riscv_mangle_type): Ditto.
16444 * config/rl78/rl78.cc (rl78_insert_attributes): Ditto.
16445 (rl78_addsi3_internal): Ditto.
16446 * config/rs6000/aix.h (ROUND_TYPE_ALIGN): Ditto.
16447 * config/rs6000/darwin.h (ROUND_TYPE_ALIGN): Ditto.
16448 * config/rs6000/freebsd64.h (ROUND_TYPE_ALIGN): Ditto.
16449 * config/rs6000/linux64.h (ROUND_TYPE_ALIGN): Ditto.
16450 * config/rs6000/rs6000-call.cc (rs6000_function_arg_boundary): Ditto.
16451 (rs6000_function_arg_advance_1): Ditto.
16452 (rs6000_function_arg): Ditto.
16453 (rs6000_pass_by_reference): Ditto.
16454 * config/rs6000/rs6000-logue.cc (rs6000_function_ok_for_sibcall): Ditto.
16455 * config/rs6000/rs6000.cc (rs6000_data_alignment): Ditto.
16456 (rs6000_set_default_type_attributes): Ditto.
16457 (rs6000_elf_in_small_data_p): Ditto.
16458 (IN_NAMED_SECTION): Ditto.
16459 (rs6000_xcoff_encode_section_info): Ditto.
16460 (rs6000_function_value): Ditto.
16461 (invalid_arg_for_unprototyped_fn): Ditto.
16462 * config/s390/s390-c.cc (s390_fn_types_compatible): Ditto.
16463 (s390_vec_n_elem): Ditto.
16464 * config/s390/s390.cc (s390_check_type_for_vector_abi): Ditto.
16465 (s390_function_arg_integer): Ditto.
16466 (s390_return_in_memory): Ditto.
16467 (s390_encode_section_info): Ditto.
16468 * config/sh/sh.cc (sh_gimplify_va_arg_expr): Ditto.
16469 (sh_function_value): Ditto.
16470 * config/sol2.cc (solaris_insert_attributes): Ditto.
16471 * config/sparc/sparc.cc (function_arg_slotno): Ditto.
16472 * config/sparc/sparc.h (ROUND_TYPE_ALIGN): Ditto.
16473 * config/stormy16/stormy16.cc (xstormy16_encode_section_info): Ditto.
16474 (xstormy16_handle_below100_attribute): Ditto.
16475 * config/v850/v850.cc (v850_encode_section_info): Ditto.
16476 (v850_insert_attributes): Ditto.
16477 * config/visium/visium.cc (visium_pass_by_reference): Ditto.
16478 (visium_return_in_memory): Ditto.
16479 * config/xtensa/xtensa.cc (xtensa_multibss_section_type_flags): Ditto.
16481 2023-05-18 Uros Bizjak <ubizjak@gmail.com>
16483 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial): New.
16484 (ix86_expand_vecop_qihi): Add op2vec bool variable.
16485 Do not set REG_EQUAL note.
16486 * config/i386/i386-protos.h (ix86_expand_vecop_qihi_partial):
16488 * config/i386/i386.cc (ix86_multiplication_cost): Handle
16489 V4QImode and V8QImode.
16490 * config/i386/mmx.md (mulv8qi3): New expander.
16492 * config/i386/sse.md (mulv8qi3): Remove.
16494 2023-05-18 Georg-Johann Lay <avr@gjlay.de>
16496 * config/avr/gen-avr-mmcu-specs.cc: Remove stale */ after // comment.
16498 2023-05-18 Jonathan Wakely <jwakely@redhat.com>
16500 PR bootstrap/105831
16501 * config.gcc: Use = operator instead of ==.
16503 2023-05-18 Michael Bäuerle <micha@NetBSD.org>
16505 PR bootstrap/105831
16506 * config/nvptx/gen-opt.sh: Use = operator instead of ==.
16507 * configure.ac: Likewise.
16508 * configure: Regenerate.
16510 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
16512 * config/arm/arm_mve.h: (__ARM_mve_typeid): Add more pointer types.
16513 (__ARM_mve_coerce1): Remove.
16514 (__ARM_mve_coerce2): Remove.
16515 (__ARM_mve_coerce3): Remove.
16516 (__ARM_mve_coerce_i_scalar): New.
16517 (__ARM_mve_coerce_s8_ptr): New.
16518 (__ARM_mve_coerce_u8_ptr): New.
16519 (__ARM_mve_coerce_s16_ptr): New.
16520 (__ARM_mve_coerce_u16_ptr): New.
16521 (__ARM_mve_coerce_s32_ptr): New.
16522 (__ARM_mve_coerce_u32_ptr): New.
16523 (__ARM_mve_coerce_s64_ptr): New.
16524 (__ARM_mve_coerce_u64_ptr): New.
16525 (__ARM_mve_coerce_f_scalar): New.
16526 (__ARM_mve_coerce_f16_ptr): New.
16527 (__ARM_mve_coerce_f32_ptr): New.
16528 (__arm_vst4q): Change _coerce_ overloads.
16529 (__arm_vbicq): Change _coerce_ overloads.
16530 (__arm_vld1q): Change _coerce_ overloads.
16531 (__arm_vld1q_z): Change _coerce_ overloads.
16532 (__arm_vld2q): Change _coerce_ overloads.
16533 (__arm_vld4q): Change _coerce_ overloads.
16534 (__arm_vldrhq_gather_offset): Change _coerce_ overloads.
16535 (__arm_vldrhq_gather_offset_z): Change _coerce_ overloads.
16536 (__arm_vldrhq_gather_shifted_offset): Change _coerce_ overloads.
16537 (__arm_vldrhq_gather_shifted_offset_z): Change _coerce_ overloads.
16538 (__arm_vldrwq_gather_offset): Change _coerce_ overloads.
16539 (__arm_vldrwq_gather_offset_z): Change _coerce_ overloads.
16540 (__arm_vldrwq_gather_shifted_offset): Change _coerce_ overloads.
16541 (__arm_vldrwq_gather_shifted_offset_z): Change _coerce_ overloads.
16542 (__arm_vst1q_p): Change _coerce_ overloads.
16543 (__arm_vst2q): Change _coerce_ overloads.
16544 (__arm_vst1q): Change _coerce_ overloads.
16545 (__arm_vstrhq): Change _coerce_ overloads.
16546 (__arm_vstrhq_p): Change _coerce_ overloads.
16547 (__arm_vstrhq_scatter_offset_p): Change _coerce_ overloads.
16548 (__arm_vstrhq_scatter_offset): Change _coerce_ overloads.
16549 (__arm_vstrhq_scatter_shifted_offset_p): Change _coerce_ overloads.
16550 (__arm_vstrhq_scatter_shifted_offset): Change _coerce_ overloads.
16551 (__arm_vstrwq_p): Change _coerce_ overloads.
16552 (__arm_vstrwq): Change _coerce_ overloads.
16553 (__arm_vstrwq_scatter_offset): Change _coerce_ overloads.
16554 (__arm_vstrwq_scatter_offset_p): Change _coerce_ overloads.
16555 (__arm_vstrwq_scatter_shifted_offset): Change _coerce_ overloads.
16556 (__arm_vstrwq_scatter_shifted_offset_p): Change _coerce_ overloads.
16557 (__arm_vsetq_lane): Change _coerce_ overloads.
16558 (__arm_vldrbq_gather_offset): Change _coerce_ overloads.
16559 (__arm_vdwdupq_x_u8): Change _coerce_ overloads.
16560 (__arm_vdwdupq_x_u16): Change _coerce_ overloads.
16561 (__arm_vdwdupq_x_u32): Change _coerce_ overloads.
16562 (__arm_viwdupq_x_u8): Change _coerce_ overloads.
16563 (__arm_viwdupq_x_u16): Change _coerce_ overloads.
16564 (__arm_viwdupq_x_u32): Change _coerce_ overloads.
16565 (__arm_vidupq_x_u8): Change _coerce_ overloads.
16566 (__arm_vddupq_x_u8): Change _coerce_ overloads.
16567 (__arm_vidupq_x_u16): Change _coerce_ overloads.
16568 (__arm_vddupq_x_u16): Change _coerce_ overloads.
16569 (__arm_vidupq_x_u32): Change _coerce_ overloads.
16570 (__arm_vddupq_x_u32): Change _coerce_ overloads.
16571 (__arm_vldrdq_gather_offset): Change _coerce_ overloads.
16572 (__arm_vldrdq_gather_offset_z): Change _coerce_ overloads.
16573 (__arm_vldrdq_gather_shifted_offset): Change _coerce_ overloads.
16574 (__arm_vldrdq_gather_shifted_offset_z): Change _coerce_ overloads.
16575 (__arm_vldrbq_gather_offset_z): Change _coerce_ overloads.
16576 (__arm_vidupq_u16): Change _coerce_ overloads.
16577 (__arm_vidupq_u32): Change _coerce_ overloads.
16578 (__arm_vidupq_u8): Change _coerce_ overloads.
16579 (__arm_vddupq_u16): Change _coerce_ overloads.
16580 (__arm_vddupq_u32): Change _coerce_ overloads.
16581 (__arm_vddupq_u8): Change _coerce_ overloads.
16582 (__arm_viwdupq_m): Change _coerce_ overloads.
16583 (__arm_viwdupq_u16): Change _coerce_ overloads.
16584 (__arm_viwdupq_u32): Change _coerce_ overloads.
16585 (__arm_viwdupq_u8): Change _coerce_ overloads.
16586 (__arm_vdwdupq_m): Change _coerce_ overloads.
16587 (__arm_vdwdupq_u16): Change _coerce_ overloads.
16588 (__arm_vdwdupq_u32): Change _coerce_ overloads.
16589 (__arm_vdwdupq_u8): Change _coerce_ overloads.
16590 (__arm_vstrbq): Change _coerce_ overloads.
16591 (__arm_vstrbq_p): Change _coerce_ overloads.
16592 (__arm_vstrbq_scatter_offset_p): Change _coerce_ overloads.
16593 (__arm_vstrdq_scatter_offset_p): Change _coerce_ overloads.
16594 (__arm_vstrdq_scatter_offset): Change _coerce_ overloads.
16595 (__arm_vstrdq_scatter_shifted_offset_p): Change _coerce_ overloads.
16596 (__arm_vstrdq_scatter_shifted_offset): Change _coerce_ overloads.
16598 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
16600 * config/arm/arm_mve.h (__arm_vbicq): Change coerce on
16603 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
16605 * config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic.
16606 (__arm_vadcq_u32): Likewise.
16607 (__arm_vadcq_m_s32): Likewise.
16608 (__arm_vadcq_m_u32): Likewise.
16609 (__arm_vsbcq_s32): Likewise.
16610 (__arm_vsbcq_u32): Likewise.
16611 (__arm_vsbcq_m_s32): Likewise.
16612 (__arm_vsbcq_m_u32): Likewise.
16613 * config/arm/mve.md (get_fpscr_nzcvqc): Make unspec_volatile.
16615 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
16617 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrev64q_f<mode>)
16618 (mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf)
16619 (mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_<supf><mode>)
16620 (mve_vrev64q_<supf><mode>, mve_vcvtq_from_f_<supf><mode>)
16621 (mve_vmovltq_<supf><mode>, mve_vmovlbq_<supf><mode>)
16622 (mve_vcvtpq_<supf><mode>, mve_vcvtnq_<supf><mode>)
16623 (mve_vcvtmq_<supf><mode>, mve_vcvtaq_<supf><mode>)
16624 (mve_vmvnq_n_<supf><mode>, mve_vrev16q_<supf>v16qi)
16625 (mve_vctp<MVE_vctp>q<MVE_vpred>, mve_vbrsrq_n_f<mode>)
16626 (mve_vbrsrq_n_<supf><mode>, mve_vandq_f<mode>, mve_vbicq_f<mode>)
16627 (mve_vctp<MVE_vctp>q_m<MVE_vpred>, mve_vcvtbq_f16_f32v8hf)
16628 (mve_vcvttq_f16_f32v8hf, mve_veorq_f<mode>)
16629 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
16630 (mve_vmlsldavxq_s<mode>, mve_vornq_f<mode>, mve_vorrq_f<mode>)
16631 (mve_vrmlaldavhxq_sv4si, mve_vcvtq_m_to_f_<supf><mode>)
16632 (mve_vshlcq_<supf><mode>, mve_vmvnq_m_<supf><mode>)
16633 (mve_vpselq_<supf><mode>, mve_vcvtbq_m_f16_f32v8hf)
16634 (mve_vcvtbq_m_f32_f16v4sf, mve_vcvttq_m_f16_f32v8hf)
16635 (mve_vcvttq_m_f32_f16v4sf, mve_vmlaldavq_p_<supf><mode>)
16636 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
16637 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>)
16638 (mve_vmvnq_m_n_<supf><mode>, mve_vorrq_m_n_<supf><mode>)
16639 (mve_vpselq_f<mode>, mve_vrev32q_m_fv8hf)
16640 (mve_vrev32q_m_<supf><mode>, mve_vrev64q_m_f<mode>)
16641 (mve_vrmlaldavhaxq_sv4si, mve_vrmlaldavhxq_p_sv4si)
16642 (mve_vrmlsldavhaxq_sv4si, mve_vrmlsldavhq_p_sv4si)
16643 (mve_vrmlsldavhxq_p_sv4si, mve_vrev16q_m_<supf>v16qi)
16644 (mve_vrmlaldavhq_p_<supf>v4si, mve_vrmlsldavhaq_sv4si)
16645 (mve_vandq_m_<supf><mode>, mve_vbicq_m_<supf><mode>)
16646 (mve_veorq_m_<supf><mode>, mve_vornq_m_<supf><mode>)
16647 (mve_vorrq_m_<supf><mode>, mve_vandq_m_f<mode>)
16648 (mve_vbicq_m_f<mode>, mve_veorq_m_f<mode>, mve_vornq_m_f<mode>)
16649 (mve_vorrq_m_f<mode>)
16650 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn)
16651 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn)
16652 (mve_vstrdq_scatter_base_wb_p_<supf>v2di) : Fix spacing and
16653 capitalization in the emitted asm.
16655 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
16657 * config/arm/constraints.md (mve_vldrd_immediate): Move it to
16659 (Ri): Move constraint definition from predicates.md.
16660 (Rl): Define new constraint.
16661 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Add
16662 missing constraint.
16663 (mve_vstrwq_scatter_base_wb_p_fv4sf): Add missing Up constraint
16664 for op 1, use mve_vstrw_immediate predicate and Rl constraint for
16665 op 2. Fix asm output spacing.
16666 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Add missing constraint.
16667 * config/arm/predicates.md (Ri) Move constraint to constraints.md
16668 (mve_vldrd_immediate): Move it from
16670 (mve_vstrw_immediate): New predicate.
16672 2023-05-18 Pan Li <pan2.li@intel.com>
16673 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16674 Kito Cheng <kito.cheng@sifive.com>
16675 Richard Biener <rguenther@suse.de>
16676 Richard Sandiford <richard.sandiford@arm.com>
16678 * combine.cc (struct reg_stat_type): Extend machine_mode to 16 bits.
16679 * cse.cc (struct qty_table_elem): Extend machine_mode to 16 bits
16680 (struct table_elt): Extend machine_mode to 16 bits.
16681 (struct set): Ditto.
16682 * genmodes.cc (emit_mode_wider): Extend type from char to short.
16683 (emit_mode_complex): Ditto.
16684 (emit_mode_inner): Ditto.
16685 (emit_class_narrowest_mode): Ditto.
16686 * genopinit.cc (main): Extend the machine_mode limit.
16687 * ira-int.h (struct ira_allocno): Extend machine_mode to 16 bits and
16688 re-ordered the struct fields for padding.
16689 * machmode.h (MACHINE_MODE_BITSIZE): New macro.
16690 (GET_MODE_2XWIDER_MODE): Extend type from char to short.
16691 (get_mode_alignment): Extend type from char to short.
16692 * ree.cc (struct ext_modified): Extend machine_mode to 16 bits and
16693 removed the ATTRIBUTE_PACKED.
16694 * rtl-ssa/accesses.h: Extend machine_mode to 16 bits, narrow
16695 * rtl-ssa/internals.inl (rtl_ssa::access_info): Adjust the assignment.
16696 m_kind to 2 bits and remove m_spare.
16697 * rtl.h (RTX_CODE_BITSIZE): New macro.
16698 (struct rtx_def): Swap both the bit size and location between the
16699 rtx_code and the machine_mode.
16700 (subreg_shape::unique_id): Extend the machine_mode limit.
16701 * rtlanal.h: Extend machine_mode to 16 bits.
16702 * tree-core.h (struct tree_type_common): Extend machine_mode to 16
16703 bits and re-ordered the struct fields for padding.
16704 (struct tree_decl_common): Extend machine_mode to 16 bits.
16706 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
16708 * genrecog.cc (print_nonbool_test): Fix type error of
16709 switch (SUBREG_BYTE (op))'.
16711 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
16713 * common/config/riscv/riscv-common.cc: Remove
16714 trailing spaces on lines.
16715 * config/riscv/riscv.cc (riscv_legitimize_move): Likewise.
16716 * config/riscv/riscv.h (enum reg_class): Likewise.
16717 * config/riscv/riscv.md: Likewise.
16719 2023-05-17 John David Anglin <danglin@gcc.gnu.org>
16721 * config/pa/pa.md (clear_cache): New.
16723 2023-05-17 Arsen Arsenović <arsen@aarsen.me>
16725 * doc/extend.texi (C++ Concepts) <forall>: Remove extraneous
16726 parenthesis. Fix misnamed index entry.
16727 <concept>: Fix misnamed index entry.
16729 2023-05-17 Jivan Hakobyan <jivanhakobyan9@gmail.com>
16731 * config/riscv/riscv.md (*<optab><GPR:mode>3_mask): New pattern,
16733 (*<optab>si3_mask, *<optab>di3_mask): Here.
16734 (*<optab>si3_mask_1, *<optab>di3_mask_1): And here.
16735 * config/riscv/bitmanip.md (*<bitmanip_optab><GPR:mode>3_mask): New
16737 (*<bitmanip_optab>si3_sext_mask): Likewise.
16738 * config/riscv/iterators.md (shiftm1): Use const_si_mask_operand
16739 and const_di_mask_operand.
16740 (bitmanip_rotate): New iterator.
16741 (bitmanip_optab): Add rotates.
16742 * config/riscv/predicates.md (const_si_mask_operand): Renamed
16743 from const31_operand. Generalize to handle more mask constants.
16744 (const_di_mask_operand): Similarly.
16746 2023-05-17 Jakub Jelinek <jakub@redhat.com>
16749 * config/i386/i386-builtin-types.def (FLOAT128): Use
16750 float128t_type_node rather than float128_type_node.
16752 2023-05-17 Alexander Monakov <amonakov@ispras.ru>
16754 * tree-ssa-math-opts.cc (convert_mult_to_fma): Enable only for
16755 FP_CONTRACT_FAST (no functional change).
16757 2023-05-17 Uros Bizjak <ubizjak@gmail.com>
16759 * config/i386/i386.cc (ix86_multiplication_cost): Correct
16760 calcuation of integer vector mode costs to reflect generated
16761 instruction sequences of different integer vector modes and
16762 different target ABIs.
16764 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16766 * config/riscv/riscv-opts.h (enum riscv_entity): New enum.
16767 * config/riscv/riscv.cc (riscv_emit_mode_set): New function.
16768 (riscv_mode_needed): Ditto.
16769 (riscv_mode_after): Ditto.
16770 (riscv_mode_entry): Ditto.
16771 (riscv_mode_exit): Ditto.
16772 (riscv_mode_priority): Ditto.
16773 (TARGET_MODE_EMIT): New target hook.
16774 (TARGET_MODE_NEEDED): Ditto.
16775 (TARGET_MODE_AFTER): Ditto.
16776 (TARGET_MODE_ENTRY): Ditto.
16777 (TARGET_MODE_EXIT): Ditto.
16778 (TARGET_MODE_PRIORITY): Ditto.
16779 * config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto.
16780 (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
16781 * config/riscv/riscv.md: Add csrwvxrm.
16782 * config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute.
16783 (vxrmsi): New pattern.
16785 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16787 * config/riscv/riscv-vector-builtins-bases.cc: Introduce rounding mode.
16788 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
16789 (struct narrow_alu_def): Ditto.
16790 * config/riscv/riscv-vector-builtins.cc (function_builder::apply_predication): Ditto.
16791 (function_expander::use_exact_insn): Ditto.
16792 * config/riscv/riscv-vector-builtins.h (function_checker::arg_num): New function.
16793 (function_base::has_rounding_mode_operand_p): New function.
16795 2023-05-17 Andrew Pinski <apinski@marvell.com>
16797 * tree-ssa-forwprop.cc (simplify_builtin_call): Check
16798 against 0 instead of calling integer_zerop.
16800 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16802 * config/riscv/riscv-vector-builtins.cc (register_vxrm): New function.
16803 (DEF_RVV_VXRM_ENUM): New macro.
16804 (handle_pragma_vector): Add vxrm enum register.
16805 * config/riscv/riscv-vector-builtins.def (DEF_RVV_VXRM_ENUM): New macro.
16811 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
16813 * value-range.h (Value_Range::operator=): New.
16815 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
16817 * value-range.cc (vrange::operator=): Add a stub to copy
16818 unsupported ranges.
16819 * value-range.h (is_a <unsupported_range>): New.
16820 (Value_Range::operator=): Support copying unsupported ranges.
16822 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
16824 * data-streamer-in.cc (streamer_read_real_value): New.
16825 (streamer_read_value_range): New.
16826 * data-streamer-out.cc (streamer_write_real_value): New.
16827 (streamer_write_vrange): New.
16828 * data-streamer.h (streamer_write_vrange): New.
16829 (streamer_read_value_range): New.
16831 2023-05-17 Jonathan Wakely <jwakely@redhat.com>
16834 * doc/invoke.texi (Code Gen Options): Note that -fshort-enums
16835 is ignored for a fixed underlying type.
16836 (C++ Dialect Options): Likewise for -fstrict-enums.
16838 2023-05-17 Tobias Burnus <tobias@codesourcery.com>
16840 * gimplify.cc (gimplify_scan_omp_clauses): Remove Fortran
16843 2023-05-17 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
16845 * config/s390/s390.cc (TARGET_ATOMIC_ALIGN_FOR_MODE):
16847 (s390_atomic_align_for_mode): New.
16849 2023-05-17 Jakub Jelinek <jakub@redhat.com>
16851 * wide-int.cc (wi::from_array): Add missing closing paren in function
16854 2023-05-17 Kewen Lin <linkw@linux.ibm.com>
16856 * tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with
16857 suggested unroll factor once the previous analysis fails.
16859 2023-05-17 Pan Li <pan2.li@intel.com>
16861 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): New
16863 (main): Add bool1 to the type indexer.
16864 * config/riscv/riscv-vector-builtins-functions.def
16865 (vreinterpret): Register vbool1 interpret function.
16866 * config/riscv/riscv-vector-builtins-types.def
16867 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
16868 (vint8m1_t): Add the type to bool1_interpret_ops.
16869 (vint16m1_t): Ditto.
16870 (vint32m1_t): Ditto.
16871 (vint64m1_t): Ditto.
16872 (vuint8m1_t): Ditto.
16873 (vuint16m1_t): Ditto.
16874 (vuint32m1_t): Ditto.
16875 (vuint64m1_t): Ditto.
16876 * config/riscv/riscv-vector-builtins.cc
16877 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
16878 (required_extensions_p): Add bool1 interpret case.
16879 * config/riscv/riscv-vector-builtins.def
16880 (bool1_interpret): Add bool1 interpret to base type.
16881 * config/riscv/vector.md (@vreinterpret<mode>): Add new expand
16882 with VB dest for vreinterpret.
16884 2023-05-17 Jiufu Guo <guojiufu@linux.ibm.com>
16887 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Support building
16888 constants through "lis; xoris".
16890 2023-05-16 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
16892 * common/config/rs6000/rs6000-common.cc: Add REE pass as a
16893 default rs6000 target pass for O2 and above.
16894 * doc/invoke.texi: Document -free
16896 2023-05-16 Kito Cheng <kito.cheng@sifive.com>
16898 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
16899 Fix wrong select_kind...
16901 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
16903 * config/s390/s390-protos.h (s390_expand_setmem): Change
16904 function signature.
16905 * config/s390/s390.cc (s390_expand_setmem): For memset's less
16906 than or equal to 256 byte do not perform a libc call.
16907 * config/s390/s390.md: Change expander into a version which
16910 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
16912 * config/s390/s390-protos.h (s390_expand_movmem): New.
16913 * config/s390/s390.cc (s390_expand_movmem): New.
16914 * config/s390/s390.md (movmem<mode>): New.
16918 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
16920 * config/s390/s390-protos.h (s390_expand_cpymem): Change
16921 function signature.
16922 * config/s390/s390.cc (s390_expand_cpymem): For memcpy's less
16923 than or equal to 256 byte do not perform a libc call.
16924 (s390_expand_insv): Adapt new function signature of
16925 s390_expand_cpymem.
16926 * config/s390/s390.md: Change expander into a version which
16929 2023-05-16 Andrew Pinski <apinski@marvell.com>
16931 PR tree-optimization/109424
16932 * match.pd: Add patterns for min/max of zero_one_valued
16935 2023-05-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16937 * config/riscv/riscv-protos.h (enum frm_field_enum): New enum.
16938 * config/riscv/riscv-vector-builtins.cc
16939 (function_expander::use_ternop_insn): Add default rounding mode.
16940 (function_expander::use_widen_ternop_insn): Ditto.
16941 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add FRM REGNUM.
16942 (riscv_hard_regno_mode_ok): Ditto.
16943 (riscv_conditional_register_usage): Ditto.
16944 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
16945 (FRM_REG_P): Ditto.
16946 (RISCV_DWARF_FRM): Ditto.
16947 * config/riscv/riscv.md: Ditto.
16948 * config/riscv/vector-iterators.md: split no frm and has frm operations.
16949 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
16950 (@pred_<optab><mode>): Ditto.
16952 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
16954 PR tree-optimization/109695
16955 * value-range.cc (irange::operator=): Resize range.
16956 (irange::union_): Same.
16957 (irange::intersect): Same.
16958 (irange::invert): Same.
16959 (int_range_max): Default to 3 sub-ranges and resize as needed.
16960 * value-range.h (irange::maybe_resize): New.
16962 (int_range::int_range): Adjust for resizing.
16963 (int_range::operator=): Same.
16965 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
16967 * ipa-cp.cc (ipcp_vr_lattice::meet_with_1): Avoid unnecessary
16969 * value-range.cc (irange::union_nonzero_bits): Return TRUE only
16970 when range changed.
16972 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16974 * config/riscv/riscv-protos.h (enum vxrm_field_enum): New enum.
16975 * config/riscv/riscv-vector-builtins.cc
16976 (function_expander::use_exact_insn): Add default rounding mode operand.
16977 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add VXRM_REGNUM.
16978 (riscv_hard_regno_mode_ok): Ditto.
16979 (riscv_conditional_register_usage): Ditto.
16980 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
16981 (VXRM_REG_P): Ditto.
16982 (RISCV_DWARF_VXRM): Ditto.
16983 * config/riscv/riscv.md: Ditto.
16984 * config/riscv/vector.md: Ditto
16986 2023-05-15 Pan Li <pan2.li@intel.com>
16988 * optabs.cc (maybe_gen_insn): Add case to generate instruction
16989 that has 11 operands.
16991 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16993 * config/aarch64/aarch64.cc (aarch64_rtx_costs, NEG case): Add costing
16994 logic for vector modes.
16996 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16999 * config/aarch64/aarch64-simd.md (aarch64_cm<optab><mode>): Rename to...
17000 (aarch64_cm<optab><mode><vczle><vczbe>): ... This.
17001 (aarch64_cmtst<mode>): Rename to...
17002 (aarch64_cmtst<mode><vczle><vczbe>): ... This.
17003 (*aarch64_cmtst_same_<mode>): Rename to...
17004 (*aarch64_cmtst_same_<mode><vczle><vczbe>): ... This.
17005 (*aarch64_cmtstdi): Rename to...
17006 (*aarch64_cmtstdi<vczle><vczbe>): ... This.
17007 (aarch64_fac<optab><mode>): Rename to...
17008 (aarch64_fac<optab><mode><vczle><vczbe>): ... This.
17010 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17013 * config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>): Rename to...
17014 (aarch64_s<optab><mode><vczle><vczbe>): ... This.
17016 2023-05-15 Pan Li <pan2.li@intel.com>
17017 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17018 kito-cheng <kito.cheng@sifive.com>
17020 * config/riscv/riscv-v.cc (const_vlmax_p): New function for
17021 deciding the mode is constant or not.
17022 (set_len_and_policy): Optimize VLS-VLMAX code gen to vsetivli.
17024 2023-05-15 Richard Biener <rguenther@suse.de>
17026 PR tree-optimization/109848
17027 * tree-ssa-forwprop.cc (pass_forwprop::execute): Put the
17028 TARGET_MEM_REF address preparation before the store, not
17031 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17033 * config/riscv/riscv.cc
17034 (riscv_vectorize_preferred_vector_alignment): New function.
17035 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): New target hook.
17037 2023-05-14 Andrew Pinski <apinski@marvell.com>
17039 PR tree-optimization/109829
17040 * match.pd: Add pattern for `signbit(x) !=/== 0 ? x : -x`.
17042 2023-05-14 Uros Bizjak <ubizjak@gmail.com>
17045 * config/i386/i386.cc: Revert the 2023-05-11 change.
17046 (ix86_widen_mult_cost): Return high value instead of
17047 ICEing for unsupported modes.
17049 2023-05-14 Ard Biesheuvel <ardb@kernel.org>
17051 * config/i386/i386.cc (x86_function_profiler): Take
17052 ix86_direct_extern_access into account when generating calls
17055 2023-05-14 Pan Li <pan2.li@intel.com>
17057 * config/riscv/riscv-vector-builtins.cc (required_extensions_p):
17058 Refactor the or pattern to switch cases.
17060 2023-05-13 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
17062 * config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback): Rename
17063 aarch64_expand_vector_init to this, and remove interleaving case.
17064 Recursively call aarch64_expand_vector_init_fallback, instead of
17065 aarch64_expand_vector_init.
17066 (aarch64_unzip_vector_init): New function.
17067 (aarch64_expand_vector_init): Likewise.
17069 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
17071 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns):
17072 Pull out function call from the gcc_assert.
17074 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
17076 * config/riscv/riscv-vsetvl.cc (vlmul_to_str): New.
17077 (policy_to_str): New.
17078 (vector_insn_info::dump): Use vlmul_to_str and policy_to_str.
17080 2023-05-13 Andrew Pinski <apinski@marvell.com>
17082 PR tree-optimization/109834
17083 * match.pd (popcount(bswap(x))->popcount(x)): Fix up unsigned type checking.
17084 (popcount(rotate(x,y))->popcount(x)): Likewise.
17086 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
17088 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also
17089 reject ymm instructions for TARGET_PREFER_AVX128. Use generic
17090 gen_extend_insn to generate zero/sign extension instructions.
17092 (ix86_expand_vecop_qihi): Initialize interleave functions
17093 for MULT code only. Fix comments.
17095 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
17098 * config/i386/mmx.md (mulv2si3): Remove expander.
17099 (mulv2si3): Rename insn pattern from *mulv2si.
17101 2023-05-12 Tobias Burnus <tobias@codesourcery.com>
17103 PR libstdc++/109816
17104 * lto-cgraph.cc (output_symtab): Guard lto_output_toplevel_asms by
17105 '!lto_stream_offload_p'.
17107 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
17108 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17111 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vsetvl_at_end): New.
17112 (local_avl_compatible_p): New.
17113 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance local optimizations
17114 for LCM, rewrite as a backward algorithm.
17115 (pass_vsetvl::cleanup_insns): Use new local_eliminate_vsetvl_insn
17116 interface, handle a BB at once.
17118 2023-05-12 Richard Biener <rguenther@suse.de>
17120 PR tree-optimization/64731
17121 * tree-ssa-forwprop.cc (pass_forwprop::execute): Also
17122 handle TARGET_MEM_REF destinations of stores from vector
17125 2023-05-12 Richard Biener <rguenther@suse.de>
17127 PR tree-optimization/109791
17128 * match.pd (minus (convert ADDR_EXPR@0) (convert (pointer_plus @1 @2))):
17130 (minus (convert (pointer_plus @1 @2)) (convert ADDR_EXPR@0)):
17133 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17135 * config/arm/arm-mve-builtins-base.cc (vsriq): New.
17136 * config/arm/arm-mve-builtins-base.def (vsriq): New.
17137 * config/arm/arm-mve-builtins-base.h (vsriq): New.
17138 * config/arm/arm-mve-builtins.cc
17139 (function_instance::has_inactive_argument): Handle vsriq.
17140 * config/arm/arm_mve.h (vsriq): Remove.
17142 (vsriq_n_u8): Remove.
17143 (vsriq_n_s8): Remove.
17144 (vsriq_n_u16): Remove.
17145 (vsriq_n_s16): Remove.
17146 (vsriq_n_u32): Remove.
17147 (vsriq_n_s32): Remove.
17148 (vsriq_m_n_s8): Remove.
17149 (vsriq_m_n_u8): Remove.
17150 (vsriq_m_n_s16): Remove.
17151 (vsriq_m_n_u16): Remove.
17152 (vsriq_m_n_s32): Remove.
17153 (vsriq_m_n_u32): Remove.
17154 (__arm_vsriq_n_u8): Remove.
17155 (__arm_vsriq_n_s8): Remove.
17156 (__arm_vsriq_n_u16): Remove.
17157 (__arm_vsriq_n_s16): Remove.
17158 (__arm_vsriq_n_u32): Remove.
17159 (__arm_vsriq_n_s32): Remove.
17160 (__arm_vsriq_m_n_s8): Remove.
17161 (__arm_vsriq_m_n_u8): Remove.
17162 (__arm_vsriq_m_n_s16): Remove.
17163 (__arm_vsriq_m_n_u16): Remove.
17164 (__arm_vsriq_m_n_s32): Remove.
17165 (__arm_vsriq_m_n_u32): Remove.
17166 (__arm_vsriq): Remove.
17167 (__arm_vsriq_m): Remove.
17169 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17171 * config/arm/iterators.md (mve_insn): Add vsri.
17172 * config/arm/mve.md (mve_vsriq_n_<supf><mode>): Rename into ...
17173 (@mve_<mve_insn>q_n_<supf><mode>): .,. this.
17174 (mve_vsriq_m_n_<supf><mode>): Rename into ...
17175 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
17177 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17179 * config/arm/arm-mve-builtins-shapes.cc (ternary_rshift): New.
17180 * config/arm/arm-mve-builtins-shapes.h (ternary_rshift): New.
17182 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17184 * config/arm/arm-mve-builtins-base.cc (vsliq): New.
17185 * config/arm/arm-mve-builtins-base.def (vsliq): New.
17186 * config/arm/arm-mve-builtins-base.h (vsliq): New.
17187 * config/arm/arm-mve-builtins.cc
17188 (function_instance::has_inactive_argument): Handle vsliq.
17189 * config/arm/arm_mve.h (vsliq): Remove.
17191 (vsliq_n_u8): Remove.
17192 (vsliq_n_s8): Remove.
17193 (vsliq_n_u16): Remove.
17194 (vsliq_n_s16): Remove.
17195 (vsliq_n_u32): Remove.
17196 (vsliq_n_s32): Remove.
17197 (vsliq_m_n_s8): Remove.
17198 (vsliq_m_n_s32): Remove.
17199 (vsliq_m_n_s16): Remove.
17200 (vsliq_m_n_u8): Remove.
17201 (vsliq_m_n_u32): Remove.
17202 (vsliq_m_n_u16): Remove.
17203 (__arm_vsliq_n_u8): Remove.
17204 (__arm_vsliq_n_s8): Remove.
17205 (__arm_vsliq_n_u16): Remove.
17206 (__arm_vsliq_n_s16): Remove.
17207 (__arm_vsliq_n_u32): Remove.
17208 (__arm_vsliq_n_s32): Remove.
17209 (__arm_vsliq_m_n_s8): Remove.
17210 (__arm_vsliq_m_n_s32): Remove.
17211 (__arm_vsliq_m_n_s16): Remove.
17212 (__arm_vsliq_m_n_u8): Remove.
17213 (__arm_vsliq_m_n_u32): Remove.
17214 (__arm_vsliq_m_n_u16): Remove.
17215 (__arm_vsliq): Remove.
17216 (__arm_vsliq_m): Remove.
17218 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17220 * config/arm/iterators.md (mve_insn>): Add vsli.
17221 * config/arm/mve.md (mve_vsliq_n_<supf><mode>): Rename into ...
17222 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
17223 (mve_vsliq_m_n_<supf><mode>): Rename into ...
17224 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
17226 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17228 * config/arm/arm-mve-builtins-shapes.cc (ternary_lshift): New.
17229 * config/arm/arm-mve-builtins-shapes.h (ternary_lshift): New.
17231 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17233 * config/arm/arm-mve-builtins-base.cc (vpselq): New.
17234 * config/arm/arm-mve-builtins-base.def (vpselq): New.
17235 * config/arm/arm-mve-builtins-base.h (vpselq): New.
17236 * config/arm/arm_mve.h (vpselq): Remove.
17237 (vpselq_u8): Remove.
17238 (vpselq_s8): Remove.
17239 (vpselq_u16): Remove.
17240 (vpselq_s16): Remove.
17241 (vpselq_u32): Remove.
17242 (vpselq_s32): Remove.
17243 (vpselq_u64): Remove.
17244 (vpselq_s64): Remove.
17245 (vpselq_f16): Remove.
17246 (vpselq_f32): Remove.
17247 (__arm_vpselq_u8): Remove.
17248 (__arm_vpselq_s8): Remove.
17249 (__arm_vpselq_u16): Remove.
17250 (__arm_vpselq_s16): Remove.
17251 (__arm_vpselq_u32): Remove.
17252 (__arm_vpselq_s32): Remove.
17253 (__arm_vpselq_u64): Remove.
17254 (__arm_vpselq_s64): Remove.
17255 (__arm_vpselq_f16): Remove.
17256 (__arm_vpselq_f32): Remove.
17257 (__arm_vpselq): Remove.
17259 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17261 * config/arm/arm-mve-builtins-shapes.cc (vpsel): New.
17262 * config/arm/arm-mve-builtins-shapes.h (vpsel): New.
17264 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17266 * config/arm/arm.cc (arm_expand_vcond): Use gen_mve_q instead of
17268 * config/arm/iterators.md (MVE_VPSELQ_F): New.
17269 (mve_insn): Add vpsel.
17270 * config/arm/mve.md (@mve_vpselq_<supf><mode>): Rename into ...
17271 (@mve_<mve_insn>q_<supf><mode>): ... this.
17272 (@mve_vpselq_f<mode>): Rename into ...
17273 (@mve_<mve_insn>q_f<mode>): ... this.
17275 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17277 * config/arm/arm-mve-builtins-base.cc (vfmaq, vfmasq, vfmsq): New.
17278 * config/arm/arm-mve-builtins-base.def (vfmaq, vfmasq, vfmsq): New.
17279 * config/arm/arm-mve-builtins-base.h (vfmaq, vfmasq, vfmsq): New.
17280 * config/arm/arm-mve-builtins.cc
17281 (function_instance::has_inactive_argument): Handle vfmaq, vfmasq,
17283 * config/arm/arm_mve.h (vfmaq): Remove.
17287 (vfmasq_m): Remove.
17289 (vfmaq_f16): Remove.
17290 (vfmaq_n_f16): Remove.
17291 (vfmasq_n_f16): Remove.
17292 (vfmsq_f16): Remove.
17293 (vfmaq_f32): Remove.
17294 (vfmaq_n_f32): Remove.
17295 (vfmasq_n_f32): Remove.
17296 (vfmsq_f32): Remove.
17297 (vfmaq_m_f32): Remove.
17298 (vfmaq_m_f16): Remove.
17299 (vfmaq_m_n_f32): Remove.
17300 (vfmaq_m_n_f16): Remove.
17301 (vfmasq_m_n_f32): Remove.
17302 (vfmasq_m_n_f16): Remove.
17303 (vfmsq_m_f32): Remove.
17304 (vfmsq_m_f16): Remove.
17305 (__arm_vfmaq_f16): Remove.
17306 (__arm_vfmaq_n_f16): Remove.
17307 (__arm_vfmasq_n_f16): Remove.
17308 (__arm_vfmsq_f16): Remove.
17309 (__arm_vfmaq_f32): Remove.
17310 (__arm_vfmaq_n_f32): Remove.
17311 (__arm_vfmasq_n_f32): Remove.
17312 (__arm_vfmsq_f32): Remove.
17313 (__arm_vfmaq_m_f32): Remove.
17314 (__arm_vfmaq_m_f16): Remove.
17315 (__arm_vfmaq_m_n_f32): Remove.
17316 (__arm_vfmaq_m_n_f16): Remove.
17317 (__arm_vfmasq_m_n_f32): Remove.
17318 (__arm_vfmasq_m_n_f16): Remove.
17319 (__arm_vfmsq_m_f32): Remove.
17320 (__arm_vfmsq_m_f16): Remove.
17321 (__arm_vfmaq): Remove.
17322 (__arm_vfmasq): Remove.
17323 (__arm_vfmsq): Remove.
17324 (__arm_vfmaq_m): Remove.
17325 (__arm_vfmasq_m): Remove.
17326 (__arm_vfmsq_m): Remove.
17328 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17330 * config/arm/iterators.md (MVE_FP_M_BINARY): Add VFMAQ_M_F,
17332 (MVE_FP_M_N_BINARY): Add VFMAQ_M_N_F, VFMASQ_M_N_F.
17333 (MVE_VFMxQ_F, MVE_VFMAxQ_N_F): New.
17334 (mve_insn): Add vfma, vfmas, vfms.
17335 * config/arm/mve.md (mve_vfmaq_f<mode>, mve_vfmsq_f<mode>): Merge
17337 (@mve_<mve_insn>q_f<mode>): ... this.
17338 (mve_vfmaq_n_f<mode>, mve_vfmasq_n_f<mode>): Merge into ...
17339 (@mve_<mve_insn>q_n_f<mode>): ... this.
17340 (mve_vfmaq_m_f<mode>, mve_vfmsq_m_f<mode>): Merge into
17341 @mve_<mve_insn>q_m_f<mode>.
17342 (mve_vfmaq_m_n_f<mode>, mve_vfmasq_m_n_f<mode>): Merge into
17343 @mve_<mve_insn>q_m_n_f<mode>.
17345 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17347 * config/arm/arm-mve-builtins-shapes.cc (ternary_opt_n): New.
17348 * config/arm/arm-mve-builtins-shapes.h (ternary_opt_n): New.
17350 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17352 * config/arm/arm-mve-builtins-base.cc
17353 (FUNCTION_WITH_RTX_M_N_NO_F): New.
17355 * config/arm/arm-mve-builtins-base.def (vmvnq): New.
17356 * config/arm/arm-mve-builtins-base.h (vmvnq): New.
17357 * config/arm/arm_mve.h (vmvnq): Remove.
17360 (vmvnq_s8): Remove.
17361 (vmvnq_s16): Remove.
17362 (vmvnq_s32): Remove.
17363 (vmvnq_n_s16): Remove.
17364 (vmvnq_n_s32): Remove.
17365 (vmvnq_u8): Remove.
17366 (vmvnq_u16): Remove.
17367 (vmvnq_u32): Remove.
17368 (vmvnq_n_u16): Remove.
17369 (vmvnq_n_u32): Remove.
17370 (vmvnq_m_u8): Remove.
17371 (vmvnq_m_s8): Remove.
17372 (vmvnq_m_u16): Remove.
17373 (vmvnq_m_s16): Remove.
17374 (vmvnq_m_u32): Remove.
17375 (vmvnq_m_s32): Remove.
17376 (vmvnq_m_n_s16): Remove.
17377 (vmvnq_m_n_u16): Remove.
17378 (vmvnq_m_n_s32): Remove.
17379 (vmvnq_m_n_u32): Remove.
17380 (vmvnq_x_s8): Remove.
17381 (vmvnq_x_s16): Remove.
17382 (vmvnq_x_s32): Remove.
17383 (vmvnq_x_u8): Remove.
17384 (vmvnq_x_u16): Remove.
17385 (vmvnq_x_u32): Remove.
17386 (vmvnq_x_n_s16): Remove.
17387 (vmvnq_x_n_s32): Remove.
17388 (vmvnq_x_n_u16): Remove.
17389 (vmvnq_x_n_u32): Remove.
17390 (__arm_vmvnq_s8): Remove.
17391 (__arm_vmvnq_s16): Remove.
17392 (__arm_vmvnq_s32): Remove.
17393 (__arm_vmvnq_n_s16): Remove.
17394 (__arm_vmvnq_n_s32): Remove.
17395 (__arm_vmvnq_u8): Remove.
17396 (__arm_vmvnq_u16): Remove.
17397 (__arm_vmvnq_u32): Remove.
17398 (__arm_vmvnq_n_u16): Remove.
17399 (__arm_vmvnq_n_u32): Remove.
17400 (__arm_vmvnq_m_u8): Remove.
17401 (__arm_vmvnq_m_s8): Remove.
17402 (__arm_vmvnq_m_u16): Remove.
17403 (__arm_vmvnq_m_s16): Remove.
17404 (__arm_vmvnq_m_u32): Remove.
17405 (__arm_vmvnq_m_s32): Remove.
17406 (__arm_vmvnq_m_n_s16): Remove.
17407 (__arm_vmvnq_m_n_u16): Remove.
17408 (__arm_vmvnq_m_n_s32): Remove.
17409 (__arm_vmvnq_m_n_u32): Remove.
17410 (__arm_vmvnq_x_s8): Remove.
17411 (__arm_vmvnq_x_s16): Remove.
17412 (__arm_vmvnq_x_s32): Remove.
17413 (__arm_vmvnq_x_u8): Remove.
17414 (__arm_vmvnq_x_u16): Remove.
17415 (__arm_vmvnq_x_u32): Remove.
17416 (__arm_vmvnq_x_n_s16): Remove.
17417 (__arm_vmvnq_x_n_s32): Remove.
17418 (__arm_vmvnq_x_n_u16): Remove.
17419 (__arm_vmvnq_x_n_u32): Remove.
17420 (__arm_vmvnq): Remove.
17421 (__arm_vmvnq_m): Remove.
17422 (__arm_vmvnq_x): Remove.
17424 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17426 * config/arm/iterators.md (mve_insn): Add vmvn.
17427 * config/arm/mve.md (mve_vmvnq_n_<supf><mode>): Rename into ...
17428 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
17429 (mve_vmvnq_m_<supf><mode>): Rename into ...
17430 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
17431 (mve_vmvnq_m_n_<supf><mode>): Rename into ...
17432 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
17434 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17436 * config/arm/arm-mve-builtins-shapes.cc (mvn): New.
17437 * config/arm/arm-mve-builtins-shapes.h (mvn): New.
17439 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17441 * config/arm/arm-mve-builtins-base.cc (vbrsrq): New.
17442 * config/arm/arm-mve-builtins-base.def (vbrsrq): New.
17443 * config/arm/arm-mve-builtins-base.h (vbrsrq): New.
17444 * config/arm/arm_mve.h (vbrsrq): Remove.
17445 (vbrsrq_m): Remove.
17446 (vbrsrq_x): Remove.
17447 (vbrsrq_n_f16): Remove.
17448 (vbrsrq_n_f32): Remove.
17449 (vbrsrq_n_u8): Remove.
17450 (vbrsrq_n_s8): Remove.
17451 (vbrsrq_n_u16): Remove.
17452 (vbrsrq_n_s16): Remove.
17453 (vbrsrq_n_u32): Remove.
17454 (vbrsrq_n_s32): Remove.
17455 (vbrsrq_m_n_s8): Remove.
17456 (vbrsrq_m_n_s32): Remove.
17457 (vbrsrq_m_n_s16): Remove.
17458 (vbrsrq_m_n_u8): Remove.
17459 (vbrsrq_m_n_u32): Remove.
17460 (vbrsrq_m_n_u16): Remove.
17461 (vbrsrq_m_n_f32): Remove.
17462 (vbrsrq_m_n_f16): Remove.
17463 (vbrsrq_x_n_s8): Remove.
17464 (vbrsrq_x_n_s16): Remove.
17465 (vbrsrq_x_n_s32): Remove.
17466 (vbrsrq_x_n_u8): Remove.
17467 (vbrsrq_x_n_u16): Remove.
17468 (vbrsrq_x_n_u32): Remove.
17469 (vbrsrq_x_n_f16): Remove.
17470 (vbrsrq_x_n_f32): Remove.
17471 (__arm_vbrsrq_n_u8): Remove.
17472 (__arm_vbrsrq_n_s8): Remove.
17473 (__arm_vbrsrq_n_u16): Remove.
17474 (__arm_vbrsrq_n_s16): Remove.
17475 (__arm_vbrsrq_n_u32): Remove.
17476 (__arm_vbrsrq_n_s32): Remove.
17477 (__arm_vbrsrq_m_n_s8): Remove.
17478 (__arm_vbrsrq_m_n_s32): Remove.
17479 (__arm_vbrsrq_m_n_s16): Remove.
17480 (__arm_vbrsrq_m_n_u8): Remove.
17481 (__arm_vbrsrq_m_n_u32): Remove.
17482 (__arm_vbrsrq_m_n_u16): Remove.
17483 (__arm_vbrsrq_x_n_s8): Remove.
17484 (__arm_vbrsrq_x_n_s16): Remove.
17485 (__arm_vbrsrq_x_n_s32): Remove.
17486 (__arm_vbrsrq_x_n_u8): Remove.
17487 (__arm_vbrsrq_x_n_u16): Remove.
17488 (__arm_vbrsrq_x_n_u32): Remove.
17489 (__arm_vbrsrq_n_f16): Remove.
17490 (__arm_vbrsrq_n_f32): Remove.
17491 (__arm_vbrsrq_m_n_f32): Remove.
17492 (__arm_vbrsrq_m_n_f16): Remove.
17493 (__arm_vbrsrq_x_n_f16): Remove.
17494 (__arm_vbrsrq_x_n_f32): Remove.
17495 (__arm_vbrsrq): Remove.
17496 (__arm_vbrsrq_m): Remove.
17497 (__arm_vbrsrq_x): Remove.
17499 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17501 * config/arm/iterators.md (MVE_VBRSR_M_N_FP, MVE_VBRSR_N_FP): New.
17502 (mve_insn): Add vbrsr.
17503 * config/arm/mve.md (mve_vbrsrq_n_f<mode>): Rename into ...
17504 (@mve_<mve_insn>q_n_f<mode>): ... this.
17505 (mve_vbrsrq_n_<supf><mode>): Rename into ...
17506 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
17507 (mve_vbrsrq_m_n_<supf><mode>): Rename into ...
17508 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
17509 (mve_vbrsrq_m_n_f<mode>): Rename into ...
17510 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
17512 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17514 * config/arm/arm-mve-builtins-shapes.cc (binary_imm32): New.
17515 * config/arm/arm-mve-builtins-shapes.h (binary_imm32): New.
17517 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17519 * config/arm/arm-mve-builtins-base.cc (vqshluq): New.
17520 * config/arm/arm-mve-builtins-base.def (vqshluq): New.
17521 * config/arm/arm-mve-builtins-base.h (vqshluq): New.
17522 * config/arm/arm_mve.h (vqshluq): Remove.
17523 (vqshluq_m): Remove.
17524 (vqshluq_n_s8): Remove.
17525 (vqshluq_n_s16): Remove.
17526 (vqshluq_n_s32): Remove.
17527 (vqshluq_m_n_s8): Remove.
17528 (vqshluq_m_n_s16): Remove.
17529 (vqshluq_m_n_s32): Remove.
17530 (__arm_vqshluq_n_s8): Remove.
17531 (__arm_vqshluq_n_s16): Remove.
17532 (__arm_vqshluq_n_s32): Remove.
17533 (__arm_vqshluq_m_n_s8): Remove.
17534 (__arm_vqshluq_m_n_s16): Remove.
17535 (__arm_vqshluq_m_n_s32): Remove.
17536 (__arm_vqshluq): Remove.
17537 (__arm_vqshluq_m): Remove.
17539 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17541 * config/arm/iterators.md (mve_insn): Add vqshlu.
17542 (supf): Add VQSHLUQ_M_N_S, VQSHLUQ_N_S.
17543 (VQSHLUQ_M_N, VQSHLUQ_N): New.
17544 * config/arm/mve.md (mve_vqshluq_n_s<mode>): Change name into ...
17545 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
17546 (mve_vqshluq_m_n_s<mode>): Change name into ...
17547 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
17549 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17551 * config/arm/arm-mve-builtins-shapes.cc
17552 (binary_lshift_unsigned): New.
17553 * config/arm/arm-mve-builtins-shapes.h
17554 (binary_lshift_unsigned): New.
17556 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17558 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhaq)
17559 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
17560 * config/arm/arm-mve-builtins-base.def (vrmlaldavhaq)
17561 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
17562 * config/arm/arm-mve-builtins-base.h (vrmlaldavhaq)
17563 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
17564 * config/arm/arm-mve-builtins-functions.h: Handle vrmlaldavhaq,
17565 vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq.
17566 * config/arm/arm_mve.h (vrmlaldavhaq): Remove.
17567 (vrmlaldavhaxq): Remove.
17568 (vrmlsldavhaq): Remove.
17569 (vrmlsldavhaxq): Remove.
17570 (vrmlaldavhaq_p): Remove.
17571 (vrmlaldavhaxq_p): Remove.
17572 (vrmlsldavhaq_p): Remove.
17573 (vrmlsldavhaxq_p): Remove.
17574 (vrmlaldavhaq_s32): Remove.
17575 (vrmlaldavhaq_u32): Remove.
17576 (vrmlaldavhaxq_s32): Remove.
17577 (vrmlsldavhaq_s32): Remove.
17578 (vrmlsldavhaxq_s32): Remove.
17579 (vrmlaldavhaq_p_s32): Remove.
17580 (vrmlaldavhaq_p_u32): Remove.
17581 (vrmlaldavhaxq_p_s32): Remove.
17582 (vrmlsldavhaq_p_s32): Remove.
17583 (vrmlsldavhaxq_p_s32): Remove.
17584 (__arm_vrmlaldavhaq_s32): Remove.
17585 (__arm_vrmlaldavhaq_u32): Remove.
17586 (__arm_vrmlaldavhaxq_s32): Remove.
17587 (__arm_vrmlsldavhaq_s32): Remove.
17588 (__arm_vrmlsldavhaxq_s32): Remove.
17589 (__arm_vrmlaldavhaq_p_s32): Remove.
17590 (__arm_vrmlaldavhaq_p_u32): Remove.
17591 (__arm_vrmlaldavhaxq_p_s32): Remove.
17592 (__arm_vrmlsldavhaq_p_s32): Remove.
17593 (__arm_vrmlsldavhaxq_p_s32): Remove.
17594 (__arm_vrmlaldavhaq): Remove.
17595 (__arm_vrmlaldavhaxq): Remove.
17596 (__arm_vrmlsldavhaq): Remove.
17597 (__arm_vrmlsldavhaxq): Remove.
17598 (__arm_vrmlaldavhaq_p): Remove.
17599 (__arm_vrmlaldavhaxq_p): Remove.
17600 (__arm_vrmlsldavhaq_p): Remove.
17601 (__arm_vrmlsldavhaxq_p): Remove.
17603 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17605 * config/arm/iterators.md (MVE_VRMLxLDAVHAxQ)
17606 (MVE_VRMLxLDAVHAxQ_P): New.
17607 (mve_insn): Add vrmlaldavha, vrmlaldavhax, vrmlsldavha,
17609 (supf): Add VRMLALDAVHAXQ_P_S, VRMLALDAVHAXQ_S, VRMLSLDAVHAQ_P_S,
17610 VRMLSLDAVHAQ_S, VRMLSLDAVHAXQ_P_S, VRMLSLDAVHAXQ_S,
17612 * config/arm/mve.md (mve_vrmlaldavhaq_<supf>v4si)
17613 (mve_vrmlaldavhaxq_sv4si, mve_vrmlsldavhaxq_sv4si)
17614 (mve_vrmlsldavhaq_sv4si): Merge into ...
17615 (@mve_<mve_insn>q_<supf>v4si): ... this.
17616 (mve_vrmlaldavhaq_p_sv4si, mve_vrmlaldavhaq_p_uv4si)
17617 (mve_vrmlaldavhaxq_p_sv4si, mve_vrmlsldavhaq_p_sv4si)
17618 (mve_vrmlsldavhaxq_p_sv4si): Merge into ...
17619 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
17621 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17623 * config/arm/arm-mve-builtins-base.cc (vqdmullbq, vqdmulltq): New.
17624 * config/arm/arm-mve-builtins-base.def (vqdmullbq, vqdmulltq):
17626 * config/arm/arm-mve-builtins-base.h (vqdmullbq, vqdmulltq): New.
17627 * config/arm/arm_mve.h (vqdmulltq): Remove.
17628 (vqdmullbq): Remove.
17629 (vqdmullbq_m): Remove.
17630 (vqdmulltq_m): Remove.
17631 (vqdmulltq_s16): Remove.
17632 (vqdmulltq_n_s16): Remove.
17633 (vqdmullbq_s16): Remove.
17634 (vqdmullbq_n_s16): Remove.
17635 (vqdmulltq_s32): Remove.
17636 (vqdmulltq_n_s32): Remove.
17637 (vqdmullbq_s32): Remove.
17638 (vqdmullbq_n_s32): Remove.
17639 (vqdmullbq_m_n_s32): Remove.
17640 (vqdmullbq_m_n_s16): Remove.
17641 (vqdmullbq_m_s32): Remove.
17642 (vqdmullbq_m_s16): Remove.
17643 (vqdmulltq_m_n_s32): Remove.
17644 (vqdmulltq_m_n_s16): Remove.
17645 (vqdmulltq_m_s32): Remove.
17646 (vqdmulltq_m_s16): Remove.
17647 (__arm_vqdmulltq_s16): Remove.
17648 (__arm_vqdmulltq_n_s16): Remove.
17649 (__arm_vqdmullbq_s16): Remove.
17650 (__arm_vqdmullbq_n_s16): Remove.
17651 (__arm_vqdmulltq_s32): Remove.
17652 (__arm_vqdmulltq_n_s32): Remove.
17653 (__arm_vqdmullbq_s32): Remove.
17654 (__arm_vqdmullbq_n_s32): Remove.
17655 (__arm_vqdmullbq_m_n_s32): Remove.
17656 (__arm_vqdmullbq_m_n_s16): Remove.
17657 (__arm_vqdmullbq_m_s32): Remove.
17658 (__arm_vqdmullbq_m_s16): Remove.
17659 (__arm_vqdmulltq_m_n_s32): Remove.
17660 (__arm_vqdmulltq_m_n_s16): Remove.
17661 (__arm_vqdmulltq_m_s32): Remove.
17662 (__arm_vqdmulltq_m_s16): Remove.
17663 (__arm_vqdmulltq): Remove.
17664 (__arm_vqdmullbq): Remove.
17665 (__arm_vqdmullbq_m): Remove.
17666 (__arm_vqdmulltq_m): Remove.
17668 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17670 * config/arm/iterators.md (MVE_VQDMULLxQ, MVE_VQDMULLxQ_M)
17671 (MVE_VQDMULLxQ_M_N, MVE_VQDMULLxQ_N): New.
17672 (mve_insn): Add vqdmullb, vqdmullt.
17673 (supf): Add VQDMULLBQ_S, VQDMULLBQ_M_S, VQDMULLBQ_M_N_S,
17674 VQDMULLBQ_N_S, VQDMULLTQ_S, VQDMULLTQ_M_S, VQDMULLTQ_M_N_S,
17676 * config/arm/mve.md (mve_vqdmullbq_n_s<mode>)
17677 (mve_vqdmulltq_n_s<mode>): Merge into ...
17678 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
17679 (mve_vqdmullbq_s<mode>, mve_vqdmulltq_s<mode>): Merge into ...
17680 (@mve_<mve_insn>q_<supf><mode>): ... this.
17681 (mve_vqdmullbq_m_n_s<mode>, mve_vqdmulltq_m_n_s<mode>): Merge into
17683 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
17684 (mve_vqdmullbq_m_s<mode>, mve_vqdmulltq_m_s<mode>): Merge into ...
17685 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
17687 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
17689 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_opt_n): New.
17690 * config/arm/arm-mve-builtins-shapes.h (binary_widen_opt_n): New.
17692 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
17694 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi):
17695 Drop unused parameter.
17696 (riscv_select_multilib): Ditto.
17697 (riscv_compute_multilib): Update call site of
17698 riscv_select_multilib_by_abi and riscv_select_multilib_by_abi.
17700 2023-05-12 Juzhe Zhong <juzhe.zhong@rivai.ai>
17702 * config/riscv/autovec.md (vec_init<mode><vel>): New pattern.
17703 * config/riscv/riscv-protos.h (expand_vec_init): New function.
17704 * config/riscv/riscv-v.cc (class rvv_builder): New class.
17705 (rvv_builder::can_duplicate_repeating_sequence_p): New function.
17706 (rvv_builder::get_merged_repeating_sequence): Ditto.
17707 (expand_vector_init_insert_elems): Ditto.
17708 (expand_vec_init): Ditto.
17709 * config/riscv/vector-iterators.md: New attribute.
17711 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
17713 * config/rs6000/rs6000-builtins.def
17714 (__builtin_vsx_scalar_insert_exp): Replace bif-pattern from xsiexpdp
17716 (__builtin_vsx_scalar_insert_exp_dp): Replace bif-pattern from
17717 xsiexpdpf to xsiexpdpf_di.
17718 * config/rs6000/vsx.md (xsiexpdp): Rename to...
17719 (xsiexpdp_<mode>): ..., set the mode of second operand to GPR and
17720 replace TARGET_64BIT with TARGET_POWERPC64.
17721 (xsiexpdpf): Rename to...
17722 (xsiexpdpf_<mode>): ..., set the mode of second operand to GPR and
17723 replace TARGET_64BIT with TARGET_POWERPC64.
17725 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
17727 * config/rs6000/rs6000-builtins.def
17728 (__builtin_vsx_scalar_extract_sig): Set return type to const signed
17730 * config/rs6000/vsx.md (xsxsigdp): Replace TARGET_64BIT with
17733 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
17735 * config/rs6000/rs6000-builtins.def
17736 (__builtin_vsx_scalar_extract_exp): Set return type to const signed
17737 int and set its bif-pattern to xsxexpdp_si, move it from power9-64
17739 * config/rs6000/vsx.md (xsxexpdp): Rename to ...
17740 (xsxexpdp_<mode>): ..., set mode of operand 0 to GPR and remove
17741 TARGET_64BIT check.
17742 * doc/extend.texi (scalar_extract_exp): Remove 64-bit environment
17743 requirement when it has a 64-bit argument.
17745 2023-05-12 Pan Li <pan2.li@intel.com>
17746 Richard Sandiford <richard.sandiford@arm.com>
17747 Richard Biener <rguenther@suse.de>
17748 Jakub Jelinek <jakub@redhat.com>
17750 * mux-utils.h: Add overload operator == and != for pointer_mux.
17751 * var-tracking.cc: Included mux-utils.h for pointer_tmux.
17752 (decl_or_value): Changed from void * to pointer_mux<tree_node, rtx_def>.
17753 (dv_is_decl_p): Reconciled to the new type, aka pointer_mux.
17754 (dv_as_decl): Ditto.
17755 (dv_as_opaque): Removed due to unnecessary.
17756 (struct variable_hasher): Take decl_or_value as compare_type.
17757 (variable_hasher::equal): Diito.
17758 (dv_from_decl): Reconciled to the new type, aka pointer_mux.
17759 (dv_from_value): Ditto.
17760 (attrs_list_member): Ditto.
17761 (vars_copy): Ditto.
17762 (var_reg_decl_set): Ditto.
17763 (var_reg_delete_and_set): Ditto.
17764 (find_loc_in_1pdv): Ditto.
17765 (canonicalize_values_star): Ditto.
17766 (variable_post_merge_new_vals): Ditto.
17767 (dump_onepart_variable_differences): Ditto.
17768 (variable_different_p): Ditto.
17769 (set_slot_part): Ditto.
17770 (clobber_slot_part): Ditto.
17771 (clobber_variable_part): Ditto.
17773 2023-05-11 mtsamis <manolis.tsamis@vrull.eu>
17775 * match.pd: simplify vector shift + bit_and + multiply.
17777 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
17779 * config/arm/arm-mve-builtins-base.cc (vmlaq, vmlasq, vqdmlahq)
17780 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
17781 * config/arm/arm-mve-builtins-base.def (vmlaq, vmlasq, vqdmlahq)
17782 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
17783 * config/arm/arm-mve-builtins-base.h (vmlaq, vmlasq, vqdmlahq)
17784 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
17785 * config/arm/arm-mve-builtins.cc
17786 (function_instance::has_inactive_argument): Handle vmlaq, vmlasq,
17787 vqdmlahq, vqdmlashq, vqrdmlahq, vqrdmlashq.
17788 * config/arm/arm_mve.h (vqrdmlashq): Remove.
17789 (vqrdmlahq): Remove.
17790 (vqdmlashq): Remove.
17791 (vqdmlahq): Remove.
17795 (vmlasq_m): Remove.
17796 (vqdmlashq_m): Remove.
17797 (vqdmlahq_m): Remove.
17798 (vqrdmlahq_m): Remove.
17799 (vqrdmlashq_m): Remove.
17800 (vmlasq_n_u8): Remove.
17801 (vmlaq_n_u8): Remove.
17802 (vqrdmlashq_n_s8): Remove.
17803 (vqrdmlahq_n_s8): Remove.
17804 (vqdmlahq_n_s8): Remove.
17805 (vqdmlashq_n_s8): Remove.
17806 (vmlasq_n_s8): Remove.
17807 (vmlaq_n_s8): Remove.
17808 (vmlasq_n_u16): Remove.
17809 (vmlaq_n_u16): Remove.
17810 (vqrdmlashq_n_s16): Remove.
17811 (vqrdmlahq_n_s16): Remove.
17812 (vqdmlashq_n_s16): Remove.
17813 (vqdmlahq_n_s16): Remove.
17814 (vmlasq_n_s16): Remove.
17815 (vmlaq_n_s16): Remove.
17816 (vmlasq_n_u32): Remove.
17817 (vmlaq_n_u32): Remove.
17818 (vqrdmlashq_n_s32): Remove.
17819 (vqrdmlahq_n_s32): Remove.
17820 (vqdmlashq_n_s32): Remove.
17821 (vqdmlahq_n_s32): Remove.
17822 (vmlasq_n_s32): Remove.
17823 (vmlaq_n_s32): Remove.
17824 (vmlaq_m_n_s8): Remove.
17825 (vmlaq_m_n_s32): Remove.
17826 (vmlaq_m_n_s16): Remove.
17827 (vmlaq_m_n_u8): Remove.
17828 (vmlaq_m_n_u32): Remove.
17829 (vmlaq_m_n_u16): Remove.
17830 (vmlasq_m_n_s8): Remove.
17831 (vmlasq_m_n_s32): Remove.
17832 (vmlasq_m_n_s16): Remove.
17833 (vmlasq_m_n_u8): Remove.
17834 (vmlasq_m_n_u32): Remove.
17835 (vmlasq_m_n_u16): Remove.
17836 (vqdmlashq_m_n_s8): Remove.
17837 (vqdmlashq_m_n_s32): Remove.
17838 (vqdmlashq_m_n_s16): Remove.
17839 (vqdmlahq_m_n_s8): Remove.
17840 (vqdmlahq_m_n_s32): Remove.
17841 (vqdmlahq_m_n_s16): Remove.
17842 (vqrdmlahq_m_n_s8): Remove.
17843 (vqrdmlahq_m_n_s32): Remove.
17844 (vqrdmlahq_m_n_s16): Remove.
17845 (vqrdmlashq_m_n_s8): Remove.
17846 (vqrdmlashq_m_n_s32): Remove.
17847 (vqrdmlashq_m_n_s16): Remove.
17848 (__arm_vmlasq_n_u8): Remove.
17849 (__arm_vmlaq_n_u8): Remove.
17850 (__arm_vqrdmlashq_n_s8): Remove.
17851 (__arm_vqdmlashq_n_s8): Remove.
17852 (__arm_vqrdmlahq_n_s8): Remove.
17853 (__arm_vqdmlahq_n_s8): Remove.
17854 (__arm_vmlasq_n_s8): Remove.
17855 (__arm_vmlaq_n_s8): Remove.
17856 (__arm_vmlasq_n_u16): Remove.
17857 (__arm_vmlaq_n_u16): Remove.
17858 (__arm_vqrdmlashq_n_s16): Remove.
17859 (__arm_vqdmlashq_n_s16): Remove.
17860 (__arm_vqrdmlahq_n_s16): Remove.
17861 (__arm_vqdmlahq_n_s16): Remove.
17862 (__arm_vmlasq_n_s16): Remove.
17863 (__arm_vmlaq_n_s16): Remove.
17864 (__arm_vmlasq_n_u32): Remove.
17865 (__arm_vmlaq_n_u32): Remove.
17866 (__arm_vqrdmlashq_n_s32): Remove.
17867 (__arm_vqdmlashq_n_s32): Remove.
17868 (__arm_vqrdmlahq_n_s32): Remove.
17869 (__arm_vqdmlahq_n_s32): Remove.
17870 (__arm_vmlasq_n_s32): Remove.
17871 (__arm_vmlaq_n_s32): Remove.
17872 (__arm_vmlaq_m_n_s8): Remove.
17873 (__arm_vmlaq_m_n_s32): Remove.
17874 (__arm_vmlaq_m_n_s16): Remove.
17875 (__arm_vmlaq_m_n_u8): Remove.
17876 (__arm_vmlaq_m_n_u32): Remove.
17877 (__arm_vmlaq_m_n_u16): Remove.
17878 (__arm_vmlasq_m_n_s8): Remove.
17879 (__arm_vmlasq_m_n_s32): Remove.
17880 (__arm_vmlasq_m_n_s16): Remove.
17881 (__arm_vmlasq_m_n_u8): Remove.
17882 (__arm_vmlasq_m_n_u32): Remove.
17883 (__arm_vmlasq_m_n_u16): Remove.
17884 (__arm_vqdmlahq_m_n_s8): Remove.
17885 (__arm_vqdmlahq_m_n_s32): Remove.
17886 (__arm_vqdmlahq_m_n_s16): Remove.
17887 (__arm_vqrdmlahq_m_n_s8): Remove.
17888 (__arm_vqrdmlahq_m_n_s32): Remove.
17889 (__arm_vqrdmlahq_m_n_s16): Remove.
17890 (__arm_vqrdmlashq_m_n_s8): Remove.
17891 (__arm_vqrdmlashq_m_n_s32): Remove.
17892 (__arm_vqrdmlashq_m_n_s16): Remove.
17893 (__arm_vqdmlashq_m_n_s8): Remove.
17894 (__arm_vqdmlashq_m_n_s16): Remove.
17895 (__arm_vqdmlashq_m_n_s32): Remove.
17896 (__arm_vmlasq): Remove.
17897 (__arm_vmlaq): Remove.
17898 (__arm_vqrdmlashq): Remove.
17899 (__arm_vqdmlashq): Remove.
17900 (__arm_vqrdmlahq): Remove.
17901 (__arm_vqdmlahq): Remove.
17902 (__arm_vmlaq_m): Remove.
17903 (__arm_vmlasq_m): Remove.
17904 (__arm_vqdmlahq_m): Remove.
17905 (__arm_vqrdmlahq_m): Remove.
17906 (__arm_vqrdmlashq_m): Remove.
17907 (__arm_vqdmlashq_m): Remove.
17909 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
17911 * config/arm/iterators.md (MVE_VMLxQ_N): New.
17912 (mve_insn): Add vmla, vmlas, vqdmlah, vqdmlash, vqrdmlah,
17914 (supf): Add VQDMLAHQ_N_S, VQDMLASHQ_N_S, VQRDMLAHQ_N_S,
17916 * config/arm/mve.md (mve_vmlaq_n_<supf><mode>)
17917 (mve_vmlasq_n_<supf><mode>, mve_vqdmlahq_n_<supf><mode>)
17918 (mve_vqdmlashq_n_<supf><mode>, mve_vqrdmlahq_n_<supf><mode>)
17919 (mve_vqrdmlashq_n_<supf><mode>): Merge into ...
17920 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
17922 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
17924 * config/arm/arm-mve-builtins-shapes.cc (ternary_n): New.
17925 * config/arm/arm-mve-builtins-shapes.h (ternary_n): New.
17927 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
17929 * config/arm/arm-mve-builtins-base.cc (vqdmladhq, vqdmladhxq)
17930 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
17931 (vqrdmlsdhxq): New.
17932 * config/arm/arm-mve-builtins-base.def (vqdmladhq, vqdmladhxq)
17933 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
17934 (vqrdmlsdhxq): New.
17935 * config/arm/arm-mve-builtins-base.h (vqdmladhq, vqdmladhxq)
17936 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
17937 (vqrdmlsdhxq): New.
17938 * config/arm/arm-mve-builtins.cc
17939 (function_instance::has_inactive_argument): Handle vqrdmladhq,
17940 vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq vqdmladhq, vqdmladhxq,
17941 vqdmlsdhq, vqdmlsdhxq.
17942 * config/arm/arm_mve.h (vqrdmlsdhxq): Remove.
17943 (vqrdmlsdhq): Remove.
17944 (vqrdmladhxq): Remove.
17945 (vqrdmladhq): Remove.
17946 (vqdmlsdhxq): Remove.
17947 (vqdmlsdhq): Remove.
17948 (vqdmladhxq): Remove.
17949 (vqdmladhq): Remove.
17950 (vqdmladhq_m): Remove.
17951 (vqdmladhxq_m): Remove.
17952 (vqdmlsdhq_m): Remove.
17953 (vqdmlsdhxq_m): Remove.
17954 (vqrdmladhq_m): Remove.
17955 (vqrdmladhxq_m): Remove.
17956 (vqrdmlsdhq_m): Remove.
17957 (vqrdmlsdhxq_m): Remove.
17958 (vqrdmlsdhxq_s8): Remove.
17959 (vqrdmlsdhq_s8): Remove.
17960 (vqrdmladhxq_s8): Remove.
17961 (vqrdmladhq_s8): Remove.
17962 (vqdmlsdhxq_s8): Remove.
17963 (vqdmlsdhq_s8): Remove.
17964 (vqdmladhxq_s8): Remove.
17965 (vqdmladhq_s8): Remove.
17966 (vqrdmlsdhxq_s16): Remove.
17967 (vqrdmlsdhq_s16): Remove.
17968 (vqrdmladhxq_s16): Remove.
17969 (vqrdmladhq_s16): Remove.
17970 (vqdmlsdhxq_s16): Remove.
17971 (vqdmlsdhq_s16): Remove.
17972 (vqdmladhxq_s16): Remove.
17973 (vqdmladhq_s16): Remove.
17974 (vqrdmlsdhxq_s32): Remove.
17975 (vqrdmlsdhq_s32): Remove.
17976 (vqrdmladhxq_s32): Remove.
17977 (vqrdmladhq_s32): Remove.
17978 (vqdmlsdhxq_s32): Remove.
17979 (vqdmlsdhq_s32): Remove.
17980 (vqdmladhxq_s32): Remove.
17981 (vqdmladhq_s32): Remove.
17982 (vqdmladhq_m_s8): Remove.
17983 (vqdmladhq_m_s32): Remove.
17984 (vqdmladhq_m_s16): Remove.
17985 (vqdmladhxq_m_s8): Remove.
17986 (vqdmladhxq_m_s32): Remove.
17987 (vqdmladhxq_m_s16): Remove.
17988 (vqdmlsdhq_m_s8): Remove.
17989 (vqdmlsdhq_m_s32): Remove.
17990 (vqdmlsdhq_m_s16): Remove.
17991 (vqdmlsdhxq_m_s8): Remove.
17992 (vqdmlsdhxq_m_s32): Remove.
17993 (vqdmlsdhxq_m_s16): Remove.
17994 (vqrdmladhq_m_s8): Remove.
17995 (vqrdmladhq_m_s32): Remove.
17996 (vqrdmladhq_m_s16): Remove.
17997 (vqrdmladhxq_m_s8): Remove.
17998 (vqrdmladhxq_m_s32): Remove.
17999 (vqrdmladhxq_m_s16): Remove.
18000 (vqrdmlsdhq_m_s8): Remove.
18001 (vqrdmlsdhq_m_s32): Remove.
18002 (vqrdmlsdhq_m_s16): Remove.
18003 (vqrdmlsdhxq_m_s8): Remove.
18004 (vqrdmlsdhxq_m_s32): Remove.
18005 (vqrdmlsdhxq_m_s16): Remove.
18006 (__arm_vqrdmlsdhxq_s8): Remove.
18007 (__arm_vqrdmlsdhq_s8): Remove.
18008 (__arm_vqrdmladhxq_s8): Remove.
18009 (__arm_vqrdmladhq_s8): Remove.
18010 (__arm_vqdmlsdhxq_s8): Remove.
18011 (__arm_vqdmlsdhq_s8): Remove.
18012 (__arm_vqdmladhxq_s8): Remove.
18013 (__arm_vqdmladhq_s8): Remove.
18014 (__arm_vqrdmlsdhxq_s16): Remove.
18015 (__arm_vqrdmlsdhq_s16): Remove.
18016 (__arm_vqrdmladhxq_s16): Remove.
18017 (__arm_vqrdmladhq_s16): Remove.
18018 (__arm_vqdmlsdhxq_s16): Remove.
18019 (__arm_vqdmlsdhq_s16): Remove.
18020 (__arm_vqdmladhxq_s16): Remove.
18021 (__arm_vqdmladhq_s16): Remove.
18022 (__arm_vqrdmlsdhxq_s32): Remove.
18023 (__arm_vqrdmlsdhq_s32): Remove.
18024 (__arm_vqrdmladhxq_s32): Remove.
18025 (__arm_vqrdmladhq_s32): Remove.
18026 (__arm_vqdmlsdhxq_s32): Remove.
18027 (__arm_vqdmlsdhq_s32): Remove.
18028 (__arm_vqdmladhxq_s32): Remove.
18029 (__arm_vqdmladhq_s32): Remove.
18030 (__arm_vqdmladhq_m_s8): Remove.
18031 (__arm_vqdmladhq_m_s32): Remove.
18032 (__arm_vqdmladhq_m_s16): Remove.
18033 (__arm_vqdmladhxq_m_s8): Remove.
18034 (__arm_vqdmladhxq_m_s32): Remove.
18035 (__arm_vqdmladhxq_m_s16): Remove.
18036 (__arm_vqdmlsdhq_m_s8): Remove.
18037 (__arm_vqdmlsdhq_m_s32): Remove.
18038 (__arm_vqdmlsdhq_m_s16): Remove.
18039 (__arm_vqdmlsdhxq_m_s8): Remove.
18040 (__arm_vqdmlsdhxq_m_s32): Remove.
18041 (__arm_vqdmlsdhxq_m_s16): Remove.
18042 (__arm_vqrdmladhq_m_s8): Remove.
18043 (__arm_vqrdmladhq_m_s32): Remove.
18044 (__arm_vqrdmladhq_m_s16): Remove.
18045 (__arm_vqrdmladhxq_m_s8): Remove.
18046 (__arm_vqrdmladhxq_m_s32): Remove.
18047 (__arm_vqrdmladhxq_m_s16): Remove.
18048 (__arm_vqrdmlsdhq_m_s8): Remove.
18049 (__arm_vqrdmlsdhq_m_s32): Remove.
18050 (__arm_vqrdmlsdhq_m_s16): Remove.
18051 (__arm_vqrdmlsdhxq_m_s8): Remove.
18052 (__arm_vqrdmlsdhxq_m_s32): Remove.
18053 (__arm_vqrdmlsdhxq_m_s16): Remove.
18054 (__arm_vqrdmlsdhxq): Remove.
18055 (__arm_vqrdmlsdhq): Remove.
18056 (__arm_vqrdmladhxq): Remove.
18057 (__arm_vqrdmladhq): Remove.
18058 (__arm_vqdmlsdhxq): Remove.
18059 (__arm_vqdmlsdhq): Remove.
18060 (__arm_vqdmladhxq): Remove.
18061 (__arm_vqdmladhq): Remove.
18062 (__arm_vqdmladhq_m): Remove.
18063 (__arm_vqdmladhxq_m): Remove.
18064 (__arm_vqdmlsdhq_m): Remove.
18065 (__arm_vqdmlsdhxq_m): Remove.
18066 (__arm_vqrdmladhq_m): Remove.
18067 (__arm_vqrdmladhxq_m): Remove.
18068 (__arm_vqrdmlsdhq_m): Remove.
18069 (__arm_vqrdmlsdhxq_m): Remove.
18071 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18073 * config/arm/iterators.md (MVE_VQxDMLxDHxQ_S): New.
18074 (mve_insn): Add vqdmladh, vqdmladhx, vqdmlsdh, vqdmlsdhx,
18075 vqrdmladh, vqrdmladhx, vqrdmlsdh, vqrdmlsdhx.
18076 (supf): Add VQDMLADHQ_S, VQDMLADHXQ_S, VQDMLSDHQ_S, VQDMLSDHXQ_S,
18077 VQRDMLADHQ_S,VQRDMLADHXQ_S, VQRDMLSDHQ_S, VQRDMLSDHXQ_S.
18078 * config/arm/mve.md (mve_vqrdmladhq_s<mode>)
18079 (mve_vqrdmladhxq_s<mode>, mve_vqrdmlsdhq_s<mode>)
18080 (mve_vqrdmlsdhxq_s<mode>, mve_vqdmlsdhxq_s<mode>)
18081 (mve_vqdmlsdhq_s<mode>, mve_vqdmladhxq_s<mode>)
18082 (mve_vqdmladhq_s<mode>): Merge into ...
18083 (@mve_<mve_insn>q_<supf><mode>): ... this.
18085 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18087 * config/arm/arm-mve-builtins-shapes.cc (ternary): New.
18088 * config/arm/arm-mve-builtins-shapes.h (ternary): New.
18090 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18092 * config/arm/arm-mve-builtins-base.cc (vmlaldavaq, vmlaldavaxq)
18093 (vmlsldavaq, vmlsldavaxq): New.
18094 * config/arm/arm-mve-builtins-base.def (vmlaldavaq, vmlaldavaxq)
18095 (vmlsldavaq, vmlsldavaxq): New.
18096 * config/arm/arm-mve-builtins-base.h (vmlaldavaq, vmlaldavaxq)
18097 (vmlsldavaq, vmlsldavaxq): New.
18098 * config/arm/arm_mve.h (vmlaldavaq): Remove.
18099 (vmlaldavaxq): Remove.
18100 (vmlsldavaq): Remove.
18101 (vmlsldavaxq): Remove.
18102 (vmlaldavaq_p): Remove.
18103 (vmlaldavaxq_p): Remove.
18104 (vmlsldavaq_p): Remove.
18105 (vmlsldavaxq_p): Remove.
18106 (vmlaldavaq_s16): Remove.
18107 (vmlaldavaxq_s16): Remove.
18108 (vmlsldavaq_s16): Remove.
18109 (vmlsldavaxq_s16): Remove.
18110 (vmlaldavaq_u16): Remove.
18111 (vmlaldavaq_s32): Remove.
18112 (vmlaldavaxq_s32): Remove.
18113 (vmlsldavaq_s32): Remove.
18114 (vmlsldavaxq_s32): Remove.
18115 (vmlaldavaq_u32): Remove.
18116 (vmlaldavaq_p_s32): Remove.
18117 (vmlaldavaq_p_s16): Remove.
18118 (vmlaldavaq_p_u32): Remove.
18119 (vmlaldavaq_p_u16): Remove.
18120 (vmlaldavaxq_p_s32): Remove.
18121 (vmlaldavaxq_p_s16): Remove.
18122 (vmlsldavaq_p_s32): Remove.
18123 (vmlsldavaq_p_s16): Remove.
18124 (vmlsldavaxq_p_s32): Remove.
18125 (vmlsldavaxq_p_s16): Remove.
18126 (__arm_vmlaldavaq_s16): Remove.
18127 (__arm_vmlaldavaxq_s16): Remove.
18128 (__arm_vmlsldavaq_s16): Remove.
18129 (__arm_vmlsldavaxq_s16): Remove.
18130 (__arm_vmlaldavaq_u16): Remove.
18131 (__arm_vmlaldavaq_s32): Remove.
18132 (__arm_vmlaldavaxq_s32): Remove.
18133 (__arm_vmlsldavaq_s32): Remove.
18134 (__arm_vmlsldavaxq_s32): Remove.
18135 (__arm_vmlaldavaq_u32): Remove.
18136 (__arm_vmlaldavaq_p_s32): Remove.
18137 (__arm_vmlaldavaq_p_s16): Remove.
18138 (__arm_vmlaldavaq_p_u32): Remove.
18139 (__arm_vmlaldavaq_p_u16): Remove.
18140 (__arm_vmlaldavaxq_p_s32): Remove.
18141 (__arm_vmlaldavaxq_p_s16): Remove.
18142 (__arm_vmlsldavaq_p_s32): Remove.
18143 (__arm_vmlsldavaq_p_s16): Remove.
18144 (__arm_vmlsldavaxq_p_s32): Remove.
18145 (__arm_vmlsldavaxq_p_s16): Remove.
18146 (__arm_vmlaldavaq): Remove.
18147 (__arm_vmlaldavaxq): Remove.
18148 (__arm_vmlsldavaq): Remove.
18149 (__arm_vmlsldavaxq): Remove.
18150 (__arm_vmlaldavaq_p): Remove.
18151 (__arm_vmlaldavaxq_p): Remove.
18152 (__arm_vmlsldavaq_p): Remove.
18153 (__arm_vmlsldavaxq_p): Remove.
18155 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18157 * config/arm/iterators.md (MVE_VMLxLDAVAxQ, MVE_VMLxLDAVAxQ_P):
18159 (mve_insn): Add vmlaldava, vmlaldavax, vmlsldava, vmlsldavax.
18160 (supf): Add VMLALDAVAXQ_P_S, VMLALDAVAXQ_S, VMLSLDAVAQ_P_S,
18161 VMLSLDAVAQ_S, VMLSLDAVAXQ_P_S, VMLSLDAVAXQ_S.
18162 * config/arm/mve.md (mve_vmlaldavaq_<supf><mode>)
18163 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
18164 (mve_vmlaldavaxq_s<mode>): Merge into ...
18165 (@mve_<mve_insn>q_<supf><mode>): ... this.
18166 (mve_vmlaldavaq_p_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>)
18167 (mve_vmlsldavaq_p_s<mode>, mve_vmlsldavaxq_p_s<mode>): Merge into
18169 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
18171 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18173 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int64): New.
18174 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int64): New.
18176 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18178 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhq, vrmlaldavhxq)
18179 (vrmlsldavhq, vrmlsldavhxq): New.
18180 * config/arm/arm-mve-builtins-base.def (vrmlaldavhq, vrmlaldavhxq)
18181 (vrmlsldavhq, vrmlsldavhxq): New.
18182 * config/arm/arm-mve-builtins-base.h (vrmlaldavhq, vrmlaldavhxq)
18183 (vrmlsldavhq, vrmlsldavhxq): New.
18184 * config/arm/arm-mve-builtins-functions.h
18185 (unspec_mve_function_exact_insn_pred_p): Handle vrmlaldavhq,
18186 vrmlaldavhxq, vrmlsldavhq, vrmlsldavhxq.
18187 * config/arm/arm_mve.h (vrmlaldavhq): Remove.
18188 (vrmlsldavhxq): Remove.
18189 (vrmlsldavhq): Remove.
18190 (vrmlaldavhxq): Remove.
18191 (vrmlaldavhq_p): Remove.
18192 (vrmlaldavhxq_p): Remove.
18193 (vrmlsldavhq_p): Remove.
18194 (vrmlsldavhxq_p): Remove.
18195 (vrmlaldavhq_u32): Remove.
18196 (vrmlsldavhxq_s32): Remove.
18197 (vrmlsldavhq_s32): Remove.
18198 (vrmlaldavhxq_s32): Remove.
18199 (vrmlaldavhq_s32): Remove.
18200 (vrmlaldavhq_p_s32): Remove.
18201 (vrmlaldavhxq_p_s32): Remove.
18202 (vrmlsldavhq_p_s32): Remove.
18203 (vrmlsldavhxq_p_s32): Remove.
18204 (vrmlaldavhq_p_u32): Remove.
18205 (__arm_vrmlaldavhq_u32): Remove.
18206 (__arm_vrmlsldavhxq_s32): Remove.
18207 (__arm_vrmlsldavhq_s32): Remove.
18208 (__arm_vrmlaldavhxq_s32): Remove.
18209 (__arm_vrmlaldavhq_s32): Remove.
18210 (__arm_vrmlaldavhq_p_s32): Remove.
18211 (__arm_vrmlaldavhxq_p_s32): Remove.
18212 (__arm_vrmlsldavhq_p_s32): Remove.
18213 (__arm_vrmlsldavhxq_p_s32): Remove.
18214 (__arm_vrmlaldavhq_p_u32): Remove.
18215 (__arm_vrmlaldavhq): Remove.
18216 (__arm_vrmlsldavhxq): Remove.
18217 (__arm_vrmlsldavhq): Remove.
18218 (__arm_vrmlaldavhxq): Remove.
18219 (__arm_vrmlaldavhq_p): Remove.
18220 (__arm_vrmlaldavhxq_p): Remove.
18221 (__arm_vrmlsldavhq_p): Remove.
18222 (__arm_vrmlsldavhxq_p): Remove.
18224 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18226 * config/arm/iterators.md (MVE_VRMLxLDAVxQ, MVE_VRMLxLDAVHxQ_P):
18228 (mve_insn): Add vrmlaldavh, vrmlaldavhx, vrmlsldavh, vrmlsldavhx.
18229 (supf): Add VRMLALDAVHXQ_P_S, VRMLALDAVHXQ_S, VRMLSLDAVHQ_P_S,
18230 VRMLSLDAVHQ_S, VRMLSLDAVHXQ_P_S, VRMLSLDAVHXQ_S.
18231 * config/arm/mve.md (mve_vrmlaldavhxq_sv4si)
18232 (mve_vrmlsldavhq_sv4si, mve_vrmlsldavhxq_sv4si)
18233 (mve_vrmlaldavhq_<supf>v4si): Merge into ...
18234 (@mve_<mve_insn>q_<supf>v4si): ... this.
18235 (mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhq_p_sv4si)
18236 (mve_vrmlsldavhxq_p_sv4si, mve_vrmlaldavhq_p_<supf>v4si): Merge
18238 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
18240 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18242 * config/arm/arm-mve-builtins-base.cc (vmlaldavq, vmlaldavxq)
18243 (vmlsldavq, vmlsldavxq): New.
18244 * config/arm/arm-mve-builtins-base.def (vmlaldavq, vmlaldavxq)
18245 (vmlsldavq, vmlsldavxq): New.
18246 * config/arm/arm-mve-builtins-base.h (vmlaldavq, vmlaldavxq)
18247 (vmlsldavq, vmlsldavxq): New.
18248 * config/arm/arm_mve.h (vmlaldavq): Remove.
18249 (vmlsldavxq): Remove.
18250 (vmlsldavq): Remove.
18251 (vmlaldavxq): Remove.
18252 (vmlaldavq_p): Remove.
18253 (vmlaldavxq_p): Remove.
18254 (vmlsldavq_p): Remove.
18255 (vmlsldavxq_p): Remove.
18256 (vmlaldavq_u16): Remove.
18257 (vmlsldavxq_s16): Remove.
18258 (vmlsldavq_s16): Remove.
18259 (vmlaldavxq_s16): Remove.
18260 (vmlaldavq_s16): Remove.
18261 (vmlaldavq_u32): Remove.
18262 (vmlsldavxq_s32): Remove.
18263 (vmlsldavq_s32): Remove.
18264 (vmlaldavxq_s32): Remove.
18265 (vmlaldavq_s32): Remove.
18266 (vmlaldavq_p_s16): Remove.
18267 (vmlaldavxq_p_s16): Remove.
18268 (vmlsldavq_p_s16): Remove.
18269 (vmlsldavxq_p_s16): Remove.
18270 (vmlaldavq_p_u16): Remove.
18271 (vmlaldavq_p_s32): Remove.
18272 (vmlaldavxq_p_s32): Remove.
18273 (vmlsldavq_p_s32): Remove.
18274 (vmlsldavxq_p_s32): Remove.
18275 (vmlaldavq_p_u32): Remove.
18276 (__arm_vmlaldavq_u16): Remove.
18277 (__arm_vmlsldavxq_s16): Remove.
18278 (__arm_vmlsldavq_s16): Remove.
18279 (__arm_vmlaldavxq_s16): Remove.
18280 (__arm_vmlaldavq_s16): Remove.
18281 (__arm_vmlaldavq_u32): Remove.
18282 (__arm_vmlsldavxq_s32): Remove.
18283 (__arm_vmlsldavq_s32): Remove.
18284 (__arm_vmlaldavxq_s32): Remove.
18285 (__arm_vmlaldavq_s32): Remove.
18286 (__arm_vmlaldavq_p_s16): Remove.
18287 (__arm_vmlaldavxq_p_s16): Remove.
18288 (__arm_vmlsldavq_p_s16): Remove.
18289 (__arm_vmlsldavxq_p_s16): Remove.
18290 (__arm_vmlaldavq_p_u16): Remove.
18291 (__arm_vmlaldavq_p_s32): Remove.
18292 (__arm_vmlaldavxq_p_s32): Remove.
18293 (__arm_vmlsldavq_p_s32): Remove.
18294 (__arm_vmlsldavxq_p_s32): Remove.
18295 (__arm_vmlaldavq_p_u32): Remove.
18296 (__arm_vmlaldavq): Remove.
18297 (__arm_vmlsldavxq): Remove.
18298 (__arm_vmlsldavq): Remove.
18299 (__arm_vmlaldavxq): Remove.
18300 (__arm_vmlaldavq_p): Remove.
18301 (__arm_vmlaldavxq_p): Remove.
18302 (__arm_vmlsldavq_p): Remove.
18303 (__arm_vmlsldavxq_p): Remove.
18305 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18307 * config/arm/iterators.md (MVE_VMLxLDAVxQ, MVE_VMLxLDAVxQ_P): New.
18308 (mve_insn): Add vmlaldav, vmlaldavx, vmlsldav, vmlsldavx.
18309 (supf): Add VMLALDAVXQ_S, VMLSLDAVQ_S, VMLSLDAVXQ_S,
18310 VMLALDAVXQ_P_S, VMLSLDAVQ_P_S, VMLSLDAVXQ_P_S.
18311 * config/arm/mve.md (mve_vmlaldavq_<supf><mode>)
18312 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
18313 (mve_vmlsldavxq_s<mode>): Merge into ...
18314 (@mve_<mve_insn>q_<supf><mode>): ... this.
18315 (mve_vmlaldavq_p_<supf><mode>, mve_vmlaldavxq_p_s<mode>)
18316 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>): Merge into
18318 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
18320 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18322 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int64): New.
18323 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int64): New.
18325 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18327 * config/arm/arm-mve-builtins-base.cc (vabavq): New.
18328 * config/arm/arm-mve-builtins-base.def (vabavq): New.
18329 * config/arm/arm-mve-builtins-base.h (vabavq): New.
18330 * config/arm/arm_mve.h (vabavq): Remove.
18331 (vabavq_p): Remove.
18332 (vabavq_s8): Remove.
18333 (vabavq_s16): Remove.
18334 (vabavq_s32): Remove.
18335 (vabavq_u8): Remove.
18336 (vabavq_u16): Remove.
18337 (vabavq_u32): Remove.
18338 (vabavq_p_s8): Remove.
18339 (vabavq_p_u8): Remove.
18340 (vabavq_p_s16): Remove.
18341 (vabavq_p_u16): Remove.
18342 (vabavq_p_s32): Remove.
18343 (vabavq_p_u32): Remove.
18344 (__arm_vabavq_s8): Remove.
18345 (__arm_vabavq_s16): Remove.
18346 (__arm_vabavq_s32): Remove.
18347 (__arm_vabavq_u8): Remove.
18348 (__arm_vabavq_u16): Remove.
18349 (__arm_vabavq_u32): Remove.
18350 (__arm_vabavq_p_s8): Remove.
18351 (__arm_vabavq_p_u8): Remove.
18352 (__arm_vabavq_p_s16): Remove.
18353 (__arm_vabavq_p_u16): Remove.
18354 (__arm_vabavq_p_s32): Remove.
18355 (__arm_vabavq_p_u32): Remove.
18356 (__arm_vabavq): Remove.
18357 (__arm_vabavq_p): Remove.
18359 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18361 * config/arm/iterators.md (mve_insn): Add vabav.
18362 * config/arm/mve.md (mve_vabavq_<supf><mode>): Rename into ...
18363 (@mve_<mve_insn>q_<supf><mode>): ... this,.
18364 (mve_vabavq_p_<supf><mode>): Rename into ...
18365 (@mve_<mve_insn>q_p_<supf><mode>): ... this,.
18367 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18369 * config/arm/arm-mve-builtins-base.cc (vmladavaxq, vmladavaq)
18370 (vmlsdavaq, vmlsdavaxq): New.
18371 * config/arm/arm-mve-builtins-base.def (vmladavaxq, vmladavaq)
18372 (vmlsdavaq, vmlsdavaxq): New.
18373 * config/arm/arm-mve-builtins-base.h (vmladavaxq, vmladavaq)
18374 (vmlsdavaq, vmlsdavaxq): New.
18375 * config/arm/arm_mve.h (vmladavaq): Remove.
18376 (vmlsdavaxq): Remove.
18377 (vmlsdavaq): Remove.
18378 (vmladavaxq): Remove.
18379 (vmladavaq_p): Remove.
18380 (vmladavaxq_p): Remove.
18381 (vmlsdavaq_p): Remove.
18382 (vmlsdavaxq_p): Remove.
18383 (vmladavaq_u8): Remove.
18384 (vmlsdavaxq_s8): Remove.
18385 (vmlsdavaq_s8): Remove.
18386 (vmladavaxq_s8): Remove.
18387 (vmladavaq_s8): Remove.
18388 (vmladavaq_u16): Remove.
18389 (vmlsdavaxq_s16): Remove.
18390 (vmlsdavaq_s16): Remove.
18391 (vmladavaxq_s16): Remove.
18392 (vmladavaq_s16): Remove.
18393 (vmladavaq_u32): Remove.
18394 (vmlsdavaxq_s32): Remove.
18395 (vmlsdavaq_s32): Remove.
18396 (vmladavaxq_s32): Remove.
18397 (vmladavaq_s32): Remove.
18398 (vmladavaq_p_s8): Remove.
18399 (vmladavaq_p_s32): Remove.
18400 (vmladavaq_p_s16): Remove.
18401 (vmladavaq_p_u8): Remove.
18402 (vmladavaq_p_u32): Remove.
18403 (vmladavaq_p_u16): Remove.
18404 (vmladavaxq_p_s8): Remove.
18405 (vmladavaxq_p_s32): Remove.
18406 (vmladavaxq_p_s16): Remove.
18407 (vmlsdavaq_p_s8): Remove.
18408 (vmlsdavaq_p_s32): Remove.
18409 (vmlsdavaq_p_s16): Remove.
18410 (vmlsdavaxq_p_s8): Remove.
18411 (vmlsdavaxq_p_s32): Remove.
18412 (vmlsdavaxq_p_s16): Remove.
18413 (__arm_vmladavaq_u8): Remove.
18414 (__arm_vmlsdavaxq_s8): Remove.
18415 (__arm_vmlsdavaq_s8): Remove.
18416 (__arm_vmladavaxq_s8): Remove.
18417 (__arm_vmladavaq_s8): Remove.
18418 (__arm_vmladavaq_u16): Remove.
18419 (__arm_vmlsdavaxq_s16): Remove.
18420 (__arm_vmlsdavaq_s16): Remove.
18421 (__arm_vmladavaxq_s16): Remove.
18422 (__arm_vmladavaq_s16): Remove.
18423 (__arm_vmladavaq_u32): Remove.
18424 (__arm_vmlsdavaxq_s32): Remove.
18425 (__arm_vmlsdavaq_s32): Remove.
18426 (__arm_vmladavaxq_s32): Remove.
18427 (__arm_vmladavaq_s32): Remove.
18428 (__arm_vmladavaq_p_s8): Remove.
18429 (__arm_vmladavaq_p_s32): Remove.
18430 (__arm_vmladavaq_p_s16): Remove.
18431 (__arm_vmladavaq_p_u8): Remove.
18432 (__arm_vmladavaq_p_u32): Remove.
18433 (__arm_vmladavaq_p_u16): Remove.
18434 (__arm_vmladavaxq_p_s8): Remove.
18435 (__arm_vmladavaxq_p_s32): Remove.
18436 (__arm_vmladavaxq_p_s16): Remove.
18437 (__arm_vmlsdavaq_p_s8): Remove.
18438 (__arm_vmlsdavaq_p_s32): Remove.
18439 (__arm_vmlsdavaq_p_s16): Remove.
18440 (__arm_vmlsdavaxq_p_s8): Remove.
18441 (__arm_vmlsdavaxq_p_s32): Remove.
18442 (__arm_vmlsdavaxq_p_s16): Remove.
18443 (__arm_vmladavaq): Remove.
18444 (__arm_vmlsdavaxq): Remove.
18445 (__arm_vmlsdavaq): Remove.
18446 (__arm_vmladavaxq): Remove.
18447 (__arm_vmladavaq_p): Remove.
18448 (__arm_vmladavaxq_p): Remove.
18449 (__arm_vmlsdavaq_p): Remove.
18450 (__arm_vmlsdavaxq_p): Remove.
18452 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18454 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): New.
18455 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int32): New.
18457 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18459 * config/arm/arm-mve-builtins-base.cc (vmladavq, vmladavxq)
18460 (vmlsdavq, vmlsdavxq): New.
18461 * config/arm/arm-mve-builtins-base.def (vmladavq, vmladavxq)
18462 (vmlsdavq, vmlsdavxq): New.
18463 * config/arm/arm-mve-builtins-base.h (vmladavq, vmladavxq)
18464 (vmlsdavq, vmlsdavxq): New.
18465 * config/arm/arm_mve.h (vmladavq): Remove.
18466 (vmlsdavxq): Remove.
18467 (vmlsdavq): Remove.
18468 (vmladavxq): Remove.
18469 (vmladavq_p): Remove.
18470 (vmlsdavxq_p): Remove.
18471 (vmlsdavq_p): Remove.
18472 (vmladavxq_p): Remove.
18473 (vmladavq_u8): Remove.
18474 (vmlsdavxq_s8): Remove.
18475 (vmlsdavq_s8): Remove.
18476 (vmladavxq_s8): Remove.
18477 (vmladavq_s8): Remove.
18478 (vmladavq_u16): Remove.
18479 (vmlsdavxq_s16): Remove.
18480 (vmlsdavq_s16): Remove.
18481 (vmladavxq_s16): Remove.
18482 (vmladavq_s16): Remove.
18483 (vmladavq_u32): Remove.
18484 (vmlsdavxq_s32): Remove.
18485 (vmlsdavq_s32): Remove.
18486 (vmladavxq_s32): Remove.
18487 (vmladavq_s32): Remove.
18488 (vmladavq_p_u8): Remove.
18489 (vmlsdavxq_p_s8): Remove.
18490 (vmlsdavq_p_s8): Remove.
18491 (vmladavxq_p_s8): Remove.
18492 (vmladavq_p_s8): Remove.
18493 (vmladavq_p_u16): Remove.
18494 (vmlsdavxq_p_s16): Remove.
18495 (vmlsdavq_p_s16): Remove.
18496 (vmladavxq_p_s16): Remove.
18497 (vmladavq_p_s16): Remove.
18498 (vmladavq_p_u32): Remove.
18499 (vmlsdavxq_p_s32): Remove.
18500 (vmlsdavq_p_s32): Remove.
18501 (vmladavxq_p_s32): Remove.
18502 (vmladavq_p_s32): Remove.
18503 (__arm_vmladavq_u8): Remove.
18504 (__arm_vmlsdavxq_s8): Remove.
18505 (__arm_vmlsdavq_s8): Remove.
18506 (__arm_vmladavxq_s8): Remove.
18507 (__arm_vmladavq_s8): Remove.
18508 (__arm_vmladavq_u16): Remove.
18509 (__arm_vmlsdavxq_s16): Remove.
18510 (__arm_vmlsdavq_s16): Remove.
18511 (__arm_vmladavxq_s16): Remove.
18512 (__arm_vmladavq_s16): Remove.
18513 (__arm_vmladavq_u32): Remove.
18514 (__arm_vmlsdavxq_s32): Remove.
18515 (__arm_vmlsdavq_s32): Remove.
18516 (__arm_vmladavxq_s32): Remove.
18517 (__arm_vmladavq_s32): Remove.
18518 (__arm_vmladavq_p_u8): Remove.
18519 (__arm_vmlsdavxq_p_s8): Remove.
18520 (__arm_vmlsdavq_p_s8): Remove.
18521 (__arm_vmladavxq_p_s8): Remove.
18522 (__arm_vmladavq_p_s8): Remove.
18523 (__arm_vmladavq_p_u16): Remove.
18524 (__arm_vmlsdavxq_p_s16): Remove.
18525 (__arm_vmlsdavq_p_s16): Remove.
18526 (__arm_vmladavxq_p_s16): Remove.
18527 (__arm_vmladavq_p_s16): Remove.
18528 (__arm_vmladavq_p_u32): Remove.
18529 (__arm_vmlsdavxq_p_s32): Remove.
18530 (__arm_vmlsdavq_p_s32): Remove.
18531 (__arm_vmladavxq_p_s32): Remove.
18532 (__arm_vmladavq_p_s32): Remove.
18533 (__arm_vmladavq): Remove.
18534 (__arm_vmlsdavxq): Remove.
18535 (__arm_vmlsdavq): Remove.
18536 (__arm_vmladavxq): Remove.
18537 (__arm_vmladavq_p): Remove.
18538 (__arm_vmlsdavxq_p): Remove.
18539 (__arm_vmlsdavq_p): Remove.
18540 (__arm_vmladavxq_p): Remove.
18542 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18544 * config/arm/iterators.md (MVE_VMLxDAVQ, MVE_VMLxDAVQ_P)
18545 (MVE_VMLxDAVAQ, MVE_VMLxDAVAQ_P): New.
18546 (mve_insn): Add vmladava, vmladavax, vmladav, vmladavx, vmlsdava,
18547 vmlsdavax, vmlsdav, vmlsdavx.
18548 (supf): Add VMLADAVAXQ_P_S, VMLADAVAXQ_S, VMLADAVXQ_P_S,
18549 VMLADAVXQ_S, VMLSDAVAQ_P_S, VMLSDAVAQ_S, VMLSDAVAXQ_P_S,
18550 VMLSDAVAXQ_S, VMLSDAVQ_P_S, VMLSDAVQ_S, VMLSDAVXQ_P_S,
18552 * config/arm/mve.md (mve_vmladavq_<supf><mode>)
18553 (mve_vmladavxq_s<mode>, mve_vmlsdavq_s<mode>)
18554 (mve_vmlsdavxq_s<mode>): Merge into ...
18555 (@mve_<mve_insn>q_<supf><mode>): ... this.
18556 (mve_vmlsdavaq_s<mode>, mve_vmladavaxq_s<mode>)
18557 (mve_vmlsdavaxq_s<mode>, mve_vmladavaq_<supf><mode>): Merge into
18559 (@mve_<mve_insn>q_<supf><mode>): ... this.
18560 (mve_vmladavq_p_<supf><mode>, mve_vmladavxq_p_s<mode>)
18561 (mve_vmlsdavq_p_s<mode>, mve_vmlsdavxq_p_s<mode>): Merge into ...
18562 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
18563 (mve_vmladavaq_p_<supf><mode>, mve_vmladavaxq_p_s<mode>)
18564 (mve_vmlsdavaq_p_s<mode>, mve_vmlsdavaxq_p_s<mode>): Merge into
18566 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
18568 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18570 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int32): New.
18571 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int32): New.
18573 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18575 * config/arm/arm-mve-builtins-base.cc (vaddlvaq): New.
18576 * config/arm/arm-mve-builtins-base.def (vaddlvaq): New.
18577 * config/arm/arm-mve-builtins-base.h (vaddlvaq): New.
18578 * config/arm/arm_mve.h (vaddlvaq): Remove.
18579 (vaddlvaq_p): Remove.
18580 (vaddlvaq_u32): Remove.
18581 (vaddlvaq_s32): Remove.
18582 (vaddlvaq_p_s32): Remove.
18583 (vaddlvaq_p_u32): Remove.
18584 (__arm_vaddlvaq_u32): Remove.
18585 (__arm_vaddlvaq_s32): Remove.
18586 (__arm_vaddlvaq_p_s32): Remove.
18587 (__arm_vaddlvaq_p_u32): Remove.
18588 (__arm_vaddlvaq): Remove.
18589 (__arm_vaddlvaq_p): Remove.
18591 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18593 * config/arm/arm-mve-builtins-shapes.cc (unary_widen_acc): New.
18594 * config/arm/arm-mve-builtins-shapes.h (unary_widen_acc): New.
18596 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18598 * config/arm/iterators.md (mve_insn): Add vaddlva.
18599 * config/arm/mve.md (mve_vaddlvaq_<supf>v4si): Rename into ...
18600 (@mve_<mve_insn>q_<supf>v4si): ... this.
18601 (mve_vaddlvaq_p_<supf>v4si): Rename into ...
18602 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
18604 2023-05-11 Uros Bizjak <ubizjak@gmail.com>
18607 * config/i386/i386.cc (ix86_widen_mult_cost):
18608 Handle V4HImode and V2SImode.
18610 2023-05-11 Andrew Pinski <apinski@marvell.com>
18612 * tree-ssa-dce.cc (simple_dce_from_worklist): For ssa names
18613 defined by a phi node with more than one uses, allow for the
18614 only uses are in that same defining statement.
18616 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
18618 * config/riscv/riscv.cc (riscv_const_insns): Add permissible
18621 2023-05-11 Pan Li <pan2.li@intel.com>
18623 * config/riscv/vector.md: Add comments for simplifying to vmset.
18625 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
18627 * config/riscv/autovec.md (<optab><mode>3): Add scalar shift
18629 (v<optab><mode>3): Add vector shift pattern.
18630 * config/riscv/vector-iterators.md: New iterator.
18632 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
18634 * config/riscv/autovec.md: Use renamed functions.
18635 * config/riscv/riscv-protos.h (emit_vlmax_op): Rename.
18636 (emit_vlmax_reg_op): To this.
18637 (emit_nonvlmax_op): Rename.
18638 (emit_len_op): To this.
18639 (emit_nonvlmax_binop): Rename.
18640 (emit_len_binop): To this.
18641 * config/riscv/riscv-v.cc (emit_pred_op): Add default parameter.
18642 (emit_pred_binop): Remove vlmax_p.
18643 (emit_vlmax_op): Rename.
18644 (emit_vlmax_reg_op): To this.
18645 (emit_nonvlmax_op): Rename.
18646 (emit_len_op): To this.
18647 (emit_nonvlmax_binop): Rename.
18648 (emit_len_binop): To this.
18649 (sew64_scalar_helper): Use renamed functions.
18650 (expand_tuple_move): Use renamed functions.
18651 * config/riscv/riscv.cc (vector_zero_call_used_regs): Use
18653 * config/riscv/vector.md: Use renamed functions.
18655 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
18656 Michael Collison <collison@rivosinc.com>
18658 * config/riscv/autovec.md (<optab><mode>3): Add integer binops.
18659 * config/riscv/riscv-protos.h (emit_nonvlmax_binop): Declare.
18660 * config/riscv/riscv-v.cc (emit_pred_op): New function.
18661 (set_expander_dest_and_mask): New function.
18662 (emit_pred_binop): New function.
18663 (emit_nonvlmax_binop): New function.
18665 2023-05-11 Pan Li <pan2.li@intel.com>
18667 * cfgloopmanip.cc (create_empty_loop_on_edge): Add PLUS_EXPR.
18668 * gimple-loop-interchange.cc
18669 (tree_loop_interchange::map_inductions_to_loop): Ditto.
18670 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Ditto.
18671 * tree-ssa-loop-ivopts.cc (create_new_iv): Ditto.
18672 * tree-ssa-loop-manip.cc (create_iv): Ditto.
18673 (tree_transform_and_unroll_loop): Ditto.
18674 (canonicalize_loop_ivs): Ditto.
18675 * tree-ssa-loop-manip.h (create_iv): Ditto.
18676 * tree-vect-data-refs.cc (vect_create_data_ref_ptr): Ditto.
18677 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly):
18679 (vect_set_loop_condition_normal): Ditto.
18680 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Ditto.
18681 * tree-vect-stmts.cc (vectorizable_store): Ditto.
18682 (vectorizable_load): Ditto.
18684 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18686 * config/arm/arm-mve-builtins-base.cc (vmovlbq, vmovltq): New.
18687 * config/arm/arm-mve-builtins-base.def (vmovlbq, vmovltq): New.
18688 * config/arm/arm-mve-builtins-base.h (vmovlbq, vmovltq): New.
18689 * config/arm/arm_mve.h (vmovlbq): Remove.
18691 (vmovlbq_m): Remove.
18692 (vmovltq_m): Remove.
18693 (vmovlbq_x): Remove.
18694 (vmovltq_x): Remove.
18695 (vmovlbq_s8): Remove.
18696 (vmovlbq_s16): Remove.
18697 (vmovltq_s8): Remove.
18698 (vmovltq_s16): Remove.
18699 (vmovltq_u8): Remove.
18700 (vmovltq_u16): Remove.
18701 (vmovlbq_u8): Remove.
18702 (vmovlbq_u16): Remove.
18703 (vmovlbq_m_s8): Remove.
18704 (vmovltq_m_s8): Remove.
18705 (vmovlbq_m_u8): Remove.
18706 (vmovltq_m_u8): Remove.
18707 (vmovlbq_m_s16): Remove.
18708 (vmovltq_m_s16): Remove.
18709 (vmovlbq_m_u16): Remove.
18710 (vmovltq_m_u16): Remove.
18711 (vmovlbq_x_s8): Remove.
18712 (vmovlbq_x_s16): Remove.
18713 (vmovlbq_x_u8): Remove.
18714 (vmovlbq_x_u16): Remove.
18715 (vmovltq_x_s8): Remove.
18716 (vmovltq_x_s16): Remove.
18717 (vmovltq_x_u8): Remove.
18718 (vmovltq_x_u16): Remove.
18719 (__arm_vmovlbq_s8): Remove.
18720 (__arm_vmovlbq_s16): Remove.
18721 (__arm_vmovltq_s8): Remove.
18722 (__arm_vmovltq_s16): Remove.
18723 (__arm_vmovltq_u8): Remove.
18724 (__arm_vmovltq_u16): Remove.
18725 (__arm_vmovlbq_u8): Remove.
18726 (__arm_vmovlbq_u16): Remove.
18727 (__arm_vmovlbq_m_s8): Remove.
18728 (__arm_vmovltq_m_s8): Remove.
18729 (__arm_vmovlbq_m_u8): Remove.
18730 (__arm_vmovltq_m_u8): Remove.
18731 (__arm_vmovlbq_m_s16): Remove.
18732 (__arm_vmovltq_m_s16): Remove.
18733 (__arm_vmovlbq_m_u16): Remove.
18734 (__arm_vmovltq_m_u16): Remove.
18735 (__arm_vmovlbq_x_s8): Remove.
18736 (__arm_vmovlbq_x_s16): Remove.
18737 (__arm_vmovlbq_x_u8): Remove.
18738 (__arm_vmovlbq_x_u16): Remove.
18739 (__arm_vmovltq_x_s8): Remove.
18740 (__arm_vmovltq_x_s16): Remove.
18741 (__arm_vmovltq_x_u8): Remove.
18742 (__arm_vmovltq_x_u16): Remove.
18743 (__arm_vmovlbq): Remove.
18744 (__arm_vmovltq): Remove.
18745 (__arm_vmovlbq_m): Remove.
18746 (__arm_vmovltq_m): Remove.
18747 (__arm_vmovlbq_x): Remove.
18748 (__arm_vmovltq_x): Remove.
18750 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18752 * config/arm/arm-mve-builtins-shapes.cc (unary_widen): New.
18753 * config/arm/arm-mve-builtins-shapes.h (unary_widen): New.
18755 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18757 * config/arm/iterators.md (mve_insn): Add vmovlb, vmovlt.
18758 (VMOVLBQ, VMOVLTQ): Merge into ...
18759 (VMOVLxQ): ... this.
18760 (VMOVLTQ_M, VMOVLBQ_M): Merge into ...
18761 (VMOVLxQ_M): ... this.
18762 * config/arm/mve.md (mve_vmovltq_<supf><mode>)
18763 (mve_vmovlbq_<supf><mode>): Merge into ...
18764 (@mve_<mve_insn>q_<supf><mode>): ... this.
18765 (mve_vmovlbq_m_<supf><mode>, mve_vmovltq_m_<supf><mode>): Merge
18767 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
18769 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18771 * config/arm/arm-mve-builtins-base.cc (vaddlvq): New.
18772 * config/arm/arm-mve-builtins-base.def (vaddlvq): New.
18773 * config/arm/arm-mve-builtins-base.h (vaddlvq): New.
18774 * config/arm/arm-mve-builtins-functions.h
18775 (unspec_mve_function_exact_insn_pred_p): Handle vaddlvq.
18776 * config/arm/arm_mve.h (vaddlvq): Remove.
18777 (vaddlvq_p): Remove.
18778 (vaddlvq_s32): Remove.
18779 (vaddlvq_u32): Remove.
18780 (vaddlvq_p_s32): Remove.
18781 (vaddlvq_p_u32): Remove.
18782 (__arm_vaddlvq_s32): Remove.
18783 (__arm_vaddlvq_u32): Remove.
18784 (__arm_vaddlvq_p_s32): Remove.
18785 (__arm_vaddlvq_p_u32): Remove.
18786 (__arm_vaddlvq): Remove.
18787 (__arm_vaddlvq_p): Remove.
18789 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18791 * config/arm/iterators.md (mve_insn): Add vaddlv.
18792 * config/arm/mve.md (mve_vaddlvq_<supf>v4si): Rename into ...
18793 (@mve_<mve_insn>q_<supf>v4si): ... this.
18794 (mve_vaddlvq_p_<supf>v4si): Rename into ...
18795 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
18797 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18799 * config/arm/arm-mve-builtins-shapes.cc (unary_acc): New.
18800 * config/arm/arm-mve-builtins-shapes.h (unary_acc): New.
18802 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18804 * config/arm/arm-mve-builtins-base.cc (vaddvaq): New.
18805 * config/arm/arm-mve-builtins-base.def (vaddvaq): New.
18806 * config/arm/arm-mve-builtins-base.h (vaddvaq): New.
18807 * config/arm/arm_mve.h (vaddvaq): Remove.
18808 (vaddvaq_p): Remove.
18809 (vaddvaq_u8): Remove.
18810 (vaddvaq_s8): Remove.
18811 (vaddvaq_u16): Remove.
18812 (vaddvaq_s16): Remove.
18813 (vaddvaq_u32): Remove.
18814 (vaddvaq_s32): Remove.
18815 (vaddvaq_p_u8): Remove.
18816 (vaddvaq_p_s8): Remove.
18817 (vaddvaq_p_u16): Remove.
18818 (vaddvaq_p_s16): Remove.
18819 (vaddvaq_p_u32): Remove.
18820 (vaddvaq_p_s32): Remove.
18821 (__arm_vaddvaq_u8): Remove.
18822 (__arm_vaddvaq_s8): Remove.
18823 (__arm_vaddvaq_u16): Remove.
18824 (__arm_vaddvaq_s16): Remove.
18825 (__arm_vaddvaq_u32): Remove.
18826 (__arm_vaddvaq_s32): Remove.
18827 (__arm_vaddvaq_p_u8): Remove.
18828 (__arm_vaddvaq_p_s8): Remove.
18829 (__arm_vaddvaq_p_u16): Remove.
18830 (__arm_vaddvaq_p_s16): Remove.
18831 (__arm_vaddvaq_p_u32): Remove.
18832 (__arm_vaddvaq_p_s32): Remove.
18833 (__arm_vaddvaq): Remove.
18834 (__arm_vaddvaq_p): Remove.
18836 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18838 * config/arm/arm-mve-builtins-shapes.cc (unary_int32_acc): New.
18839 * config/arm/arm-mve-builtins-shapes.h (unary_int32_acc): New.
18841 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18843 * config/arm/iterators.md (mve_insn): Add vaddva.
18844 * config/arm/mve.md (mve_vaddvaq_<supf><mode>): Rename into ...
18845 (@mve_<mve_insn>q_<supf><mode>): ... this.
18846 (mve_vaddvaq_p_<supf><mode>): Rename into ...
18847 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
18849 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18851 * config/arm/arm-mve-builtins-base.cc (vaddvq): New.
18852 * config/arm/arm-mve-builtins-base.def (vaddvq): New.
18853 * config/arm/arm-mve-builtins-base.h (vaddvq): New.
18854 * config/arm/arm_mve.h (vaddvq): Remove.
18855 (vaddvq_p): Remove.
18856 (vaddvq_s8): Remove.
18857 (vaddvq_s16): Remove.
18858 (vaddvq_s32): Remove.
18859 (vaddvq_u8): Remove.
18860 (vaddvq_u16): Remove.
18861 (vaddvq_u32): Remove.
18862 (vaddvq_p_u8): Remove.
18863 (vaddvq_p_s8): Remove.
18864 (vaddvq_p_u16): Remove.
18865 (vaddvq_p_s16): Remove.
18866 (vaddvq_p_u32): Remove.
18867 (vaddvq_p_s32): Remove.
18868 (__arm_vaddvq_s8): Remove.
18869 (__arm_vaddvq_s16): Remove.
18870 (__arm_vaddvq_s32): Remove.
18871 (__arm_vaddvq_u8): Remove.
18872 (__arm_vaddvq_u16): Remove.
18873 (__arm_vaddvq_u32): Remove.
18874 (__arm_vaddvq_p_u8): Remove.
18875 (__arm_vaddvq_p_s8): Remove.
18876 (__arm_vaddvq_p_u16): Remove.
18877 (__arm_vaddvq_p_s16): Remove.
18878 (__arm_vaddvq_p_u32): Remove.
18879 (__arm_vaddvq_p_s32): Remove.
18880 (__arm_vaddvq): Remove.
18881 (__arm_vaddvq_p): Remove.
18883 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18885 * config/arm/arm-mve-builtins-shapes.cc (unary_int32): New.
18886 * config/arm/arm-mve-builtins-shapes.h (unary_int32): New.
18888 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18890 * config/arm/iterators.md (mve_insn): Add vaddv.
18891 * config/arm/mve.md (@mve_vaddvq_<supf><mode>): Rename into ...
18892 (@mve_<mve_insn>q_<supf><mode>): ... this.
18893 (mve_vaddvq_p_<supf><mode>): Rename into ...
18894 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
18895 * config/arm/vec-common.md: Use gen_mve_q instead of
18898 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18900 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N): New.
18902 * config/arm/arm-mve-builtins-base.def (vdupq): New.
18903 * config/arm/arm-mve-builtins-base.h: (vdupq): New.
18904 * config/arm/arm_mve.h (vdupq_n): Remove.
18906 (vdupq_n_f16): Remove.
18907 (vdupq_n_f32): Remove.
18908 (vdupq_n_s8): Remove.
18909 (vdupq_n_s16): Remove.
18910 (vdupq_n_s32): Remove.
18911 (vdupq_n_u8): Remove.
18912 (vdupq_n_u16): Remove.
18913 (vdupq_n_u32): Remove.
18914 (vdupq_m_n_u8): Remove.
18915 (vdupq_m_n_s8): Remove.
18916 (vdupq_m_n_u16): Remove.
18917 (vdupq_m_n_s16): Remove.
18918 (vdupq_m_n_u32): Remove.
18919 (vdupq_m_n_s32): Remove.
18920 (vdupq_m_n_f16): Remove.
18921 (vdupq_m_n_f32): Remove.
18922 (vdupq_x_n_s8): Remove.
18923 (vdupq_x_n_s16): Remove.
18924 (vdupq_x_n_s32): Remove.
18925 (vdupq_x_n_u8): Remove.
18926 (vdupq_x_n_u16): Remove.
18927 (vdupq_x_n_u32): Remove.
18928 (vdupq_x_n_f16): Remove.
18929 (vdupq_x_n_f32): Remove.
18930 (__arm_vdupq_n_s8): Remove.
18931 (__arm_vdupq_n_s16): Remove.
18932 (__arm_vdupq_n_s32): Remove.
18933 (__arm_vdupq_n_u8): Remove.
18934 (__arm_vdupq_n_u16): Remove.
18935 (__arm_vdupq_n_u32): Remove.
18936 (__arm_vdupq_m_n_u8): Remove.
18937 (__arm_vdupq_m_n_s8): Remove.
18938 (__arm_vdupq_m_n_u16): Remove.
18939 (__arm_vdupq_m_n_s16): Remove.
18940 (__arm_vdupq_m_n_u32): Remove.
18941 (__arm_vdupq_m_n_s32): Remove.
18942 (__arm_vdupq_x_n_s8): Remove.
18943 (__arm_vdupq_x_n_s16): Remove.
18944 (__arm_vdupq_x_n_s32): Remove.
18945 (__arm_vdupq_x_n_u8): Remove.
18946 (__arm_vdupq_x_n_u16): Remove.
18947 (__arm_vdupq_x_n_u32): Remove.
18948 (__arm_vdupq_n_f16): Remove.
18949 (__arm_vdupq_n_f32): Remove.
18950 (__arm_vdupq_m_n_f16): Remove.
18951 (__arm_vdupq_m_n_f32): Remove.
18952 (__arm_vdupq_x_n_f16): Remove.
18953 (__arm_vdupq_x_n_f32): Remove.
18954 (__arm_vdupq_n): Remove.
18955 (__arm_vdupq_m): Remove.
18957 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18959 * config/arm/arm-mve-builtins-shapes.cc (unary_n): New.
18960 * config/arm/arm-mve-builtins-shapes.h (unary_n): New.
18962 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18964 * config/arm/iterators.md (MVE_FP_M_N_VDUPQ_ONLY)
18965 (MVE_FP_N_VDUPQ_ONLY): New.
18966 (mve_insn): Add vdupq.
18967 * config/arm/mve.md (mve_vdupq_n_f<mode>): Rename into ...
18968 (@mve_<mve_insn>q_n_f<mode>): ... this.
18969 (mve_vdupq_n_<supf><mode>): Rename into ...
18970 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
18971 (mve_vdupq_m_n_<supf><mode>): Rename into ...
18972 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
18973 (mve_vdupq_m_n_f<mode>): Rename into ...
18974 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
18976 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
18978 * config/arm/arm-mve-builtins-base.cc (vrev16q, vrev32q, vrev64q):
18980 * config/arm/arm-mve-builtins-base.def (vrev16q, vrev32q)
18982 * config/arm/arm-mve-builtins-base.h (vrev16q, vrev32q)
18984 * config/arm/arm_mve.h (vrev16q): Remove.
18987 (vrev64q_m): Remove.
18988 (vrev16q_m): Remove.
18989 (vrev32q_m): Remove.
18990 (vrev16q_x): Remove.
18991 (vrev32q_x): Remove.
18992 (vrev64q_x): Remove.
18993 (vrev64q_f16): Remove.
18994 (vrev64q_f32): Remove.
18995 (vrev32q_f16): Remove.
18996 (vrev16q_s8): Remove.
18997 (vrev32q_s8): Remove.
18998 (vrev32q_s16): Remove.
18999 (vrev64q_s8): Remove.
19000 (vrev64q_s16): Remove.
19001 (vrev64q_s32): Remove.
19002 (vrev64q_u8): Remove.
19003 (vrev64q_u16): Remove.
19004 (vrev64q_u32): Remove.
19005 (vrev32q_u8): Remove.
19006 (vrev32q_u16): Remove.
19007 (vrev16q_u8): Remove.
19008 (vrev64q_m_u8): Remove.
19009 (vrev64q_m_s8): Remove.
19010 (vrev64q_m_u16): Remove.
19011 (vrev64q_m_s16): Remove.
19012 (vrev64q_m_u32): Remove.
19013 (vrev64q_m_s32): Remove.
19014 (vrev16q_m_s8): Remove.
19015 (vrev32q_m_f16): Remove.
19016 (vrev16q_m_u8): Remove.
19017 (vrev32q_m_s8): Remove.
19018 (vrev64q_m_f16): Remove.
19019 (vrev32q_m_u8): Remove.
19020 (vrev32q_m_s16): Remove.
19021 (vrev64q_m_f32): Remove.
19022 (vrev32q_m_u16): Remove.
19023 (vrev16q_x_s8): Remove.
19024 (vrev16q_x_u8): Remove.
19025 (vrev32q_x_s8): Remove.
19026 (vrev32q_x_s16): Remove.
19027 (vrev32q_x_u8): Remove.
19028 (vrev32q_x_u16): Remove.
19029 (vrev64q_x_s8): Remove.
19030 (vrev64q_x_s16): Remove.
19031 (vrev64q_x_s32): Remove.
19032 (vrev64q_x_u8): Remove.
19033 (vrev64q_x_u16): Remove.
19034 (vrev64q_x_u32): Remove.
19035 (vrev32q_x_f16): Remove.
19036 (vrev64q_x_f16): Remove.
19037 (vrev64q_x_f32): Remove.
19038 (__arm_vrev16q_s8): Remove.
19039 (__arm_vrev32q_s8): Remove.
19040 (__arm_vrev32q_s16): Remove.
19041 (__arm_vrev64q_s8): Remove.
19042 (__arm_vrev64q_s16): Remove.
19043 (__arm_vrev64q_s32): Remove.
19044 (__arm_vrev64q_u8): Remove.
19045 (__arm_vrev64q_u16): Remove.
19046 (__arm_vrev64q_u32): Remove.
19047 (__arm_vrev32q_u8): Remove.
19048 (__arm_vrev32q_u16): Remove.
19049 (__arm_vrev16q_u8): Remove.
19050 (__arm_vrev64q_m_u8): Remove.
19051 (__arm_vrev64q_m_s8): Remove.
19052 (__arm_vrev64q_m_u16): Remove.
19053 (__arm_vrev64q_m_s16): Remove.
19054 (__arm_vrev64q_m_u32): Remove.
19055 (__arm_vrev64q_m_s32): Remove.
19056 (__arm_vrev16q_m_s8): Remove.
19057 (__arm_vrev16q_m_u8): Remove.
19058 (__arm_vrev32q_m_s8): Remove.
19059 (__arm_vrev32q_m_u8): Remove.
19060 (__arm_vrev32q_m_s16): Remove.
19061 (__arm_vrev32q_m_u16): Remove.
19062 (__arm_vrev16q_x_s8): Remove.
19063 (__arm_vrev16q_x_u8): Remove.
19064 (__arm_vrev32q_x_s8): Remove.
19065 (__arm_vrev32q_x_s16): Remove.
19066 (__arm_vrev32q_x_u8): Remove.
19067 (__arm_vrev32q_x_u16): Remove.
19068 (__arm_vrev64q_x_s8): Remove.
19069 (__arm_vrev64q_x_s16): Remove.
19070 (__arm_vrev64q_x_s32): Remove.
19071 (__arm_vrev64q_x_u8): Remove.
19072 (__arm_vrev64q_x_u16): Remove.
19073 (__arm_vrev64q_x_u32): Remove.
19074 (__arm_vrev64q_f16): Remove.
19075 (__arm_vrev64q_f32): Remove.
19076 (__arm_vrev32q_f16): Remove.
19077 (__arm_vrev32q_m_f16): Remove.
19078 (__arm_vrev64q_m_f16): Remove.
19079 (__arm_vrev64q_m_f32): Remove.
19080 (__arm_vrev32q_x_f16): Remove.
19081 (__arm_vrev64q_x_f16): Remove.
19082 (__arm_vrev64q_x_f32): Remove.
19083 (__arm_vrev16q): Remove.
19084 (__arm_vrev32q): Remove.
19085 (__arm_vrev64q): Remove.
19086 (__arm_vrev64q_m): Remove.
19087 (__arm_vrev16q_m): Remove.
19088 (__arm_vrev32q_m): Remove.
19089 (__arm_vrev16q_x): Remove.
19090 (__arm_vrev32q_x): Remove.
19091 (__arm_vrev64q_x): Remove.
19093 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19095 * config/arm/iterators.md (MVE_V8HF, MVE_V16QI)
19096 (MVE_FP_VREV64Q_ONLY, MVE_FP_M_VREV64Q_ONLY, MVE_FP_VREV32Q_ONLY)
19097 (MVE_FP_M_VREV32Q_ONLY): New iterators.
19098 (mve_insn): Add vrev16q, vrev32q, vrev64q.
19099 * config/arm/mve.md (mve_vrev64q_f<mode>): Rename into ...
19100 (@mve_<mve_insn>q_f<mode>): ... this
19101 (mve_vrev32q_fv8hf): Rename into @mve_<mve_insn>q_f<mode>.
19102 (mve_vrev64q_<supf><mode>): Rename into ...
19103 (@mve_<mve_insn>q_<supf><mode>): ... this.
19104 (mve_vrev32q_<supf><mode>): Rename into
19105 @mve_<mve_insn>q_<supf><mode>.
19106 (mve_vrev16q_<supf>v16qi): Rename into
19107 @mve_<mve_insn>q_<supf><mode>.
19108 (mve_vrev64q_m_<supf><mode>): Rename into
19109 @mve_<mve_insn>q_m_<supf><mode>.
19110 (mve_vrev32q_m_fv8hf): Rename into @mve_<mve_insn>q_m_f<mode>.
19111 (mve_vrev32q_m_<supf><mode>): Rename into
19112 @mve_<mve_insn>q_m_<supf><mode>.
19113 (mve_vrev64q_m_f<mode>): Rename into @mve_<mve_insn>q_m_f<mode>.
19114 (mve_vrev16q_m_<supf>v16qi): Rename into
19115 @mve_<mve_insn>q_m_<supf><mode>.
19117 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19119 * config/arm/arm-mve-builtins-base.cc (vcmpeqq, vcmpneq, vcmpgeq)
19120 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
19121 * config/arm/arm-mve-builtins-base.def (vcmpeqq, vcmpneq, vcmpgeq)
19122 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
19123 * config/arm/arm-mve-builtins-base.h (vcmpeqq, vcmpneq, vcmpgeq)
19124 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
19125 * config/arm/arm-mve-builtins-functions.h (class
19126 unspec_based_mve_function_exact_insn_vcmp): New.
19127 * config/arm/arm-mve-builtins.cc
19128 (function_instance::has_inactive_argument): Handle vcmp.
19129 * config/arm/arm_mve.h (vcmpneq): Remove.
19137 (vcmpneq_m): Remove.
19138 (vcmphiq_m): Remove.
19139 (vcmpeqq_m): Remove.
19140 (vcmpcsq_m): Remove.
19141 (vcmpcsq_m_n): Remove.
19142 (vcmpltq_m): Remove.
19143 (vcmpleq_m): Remove.
19144 (vcmpgtq_m): Remove.
19145 (vcmpgeq_m): Remove.
19146 (vcmpneq_s8): Remove.
19147 (vcmpneq_s16): Remove.
19148 (vcmpneq_s32): Remove.
19149 (vcmpneq_u8): Remove.
19150 (vcmpneq_u16): Remove.
19151 (vcmpneq_u32): Remove.
19152 (vcmpneq_n_u8): Remove.
19153 (vcmphiq_u8): Remove.
19154 (vcmphiq_n_u8): Remove.
19155 (vcmpeqq_u8): Remove.
19156 (vcmpeqq_n_u8): Remove.
19157 (vcmpcsq_u8): Remove.
19158 (vcmpcsq_n_u8): Remove.
19159 (vcmpneq_n_s8): Remove.
19160 (vcmpltq_s8): Remove.
19161 (vcmpltq_n_s8): Remove.
19162 (vcmpleq_s8): Remove.
19163 (vcmpleq_n_s8): Remove.
19164 (vcmpgtq_s8): Remove.
19165 (vcmpgtq_n_s8): Remove.
19166 (vcmpgeq_s8): Remove.
19167 (vcmpgeq_n_s8): Remove.
19168 (vcmpeqq_s8): Remove.
19169 (vcmpeqq_n_s8): Remove.
19170 (vcmpneq_n_u16): Remove.
19171 (vcmphiq_u16): Remove.
19172 (vcmphiq_n_u16): Remove.
19173 (vcmpeqq_u16): Remove.
19174 (vcmpeqq_n_u16): Remove.
19175 (vcmpcsq_u16): Remove.
19176 (vcmpcsq_n_u16): Remove.
19177 (vcmpneq_n_s16): Remove.
19178 (vcmpltq_s16): Remove.
19179 (vcmpltq_n_s16): Remove.
19180 (vcmpleq_s16): Remove.
19181 (vcmpleq_n_s16): Remove.
19182 (vcmpgtq_s16): Remove.
19183 (vcmpgtq_n_s16): Remove.
19184 (vcmpgeq_s16): Remove.
19185 (vcmpgeq_n_s16): Remove.
19186 (vcmpeqq_s16): Remove.
19187 (vcmpeqq_n_s16): Remove.
19188 (vcmpneq_n_u32): Remove.
19189 (vcmphiq_u32): Remove.
19190 (vcmphiq_n_u32): Remove.
19191 (vcmpeqq_u32): Remove.
19192 (vcmpeqq_n_u32): Remove.
19193 (vcmpcsq_u32): Remove.
19194 (vcmpcsq_n_u32): Remove.
19195 (vcmpneq_n_s32): Remove.
19196 (vcmpltq_s32): Remove.
19197 (vcmpltq_n_s32): Remove.
19198 (vcmpleq_s32): Remove.
19199 (vcmpleq_n_s32): Remove.
19200 (vcmpgtq_s32): Remove.
19201 (vcmpgtq_n_s32): Remove.
19202 (vcmpgeq_s32): Remove.
19203 (vcmpgeq_n_s32): Remove.
19204 (vcmpeqq_s32): Remove.
19205 (vcmpeqq_n_s32): Remove.
19206 (vcmpneq_n_f16): Remove.
19207 (vcmpneq_f16): Remove.
19208 (vcmpltq_n_f16): Remove.
19209 (vcmpltq_f16): Remove.
19210 (vcmpleq_n_f16): Remove.
19211 (vcmpleq_f16): Remove.
19212 (vcmpgtq_n_f16): Remove.
19213 (vcmpgtq_f16): Remove.
19214 (vcmpgeq_n_f16): Remove.
19215 (vcmpgeq_f16): Remove.
19216 (vcmpeqq_n_f16): Remove.
19217 (vcmpeqq_f16): Remove.
19218 (vcmpneq_n_f32): Remove.
19219 (vcmpneq_f32): Remove.
19220 (vcmpltq_n_f32): Remove.
19221 (vcmpltq_f32): Remove.
19222 (vcmpleq_n_f32): Remove.
19223 (vcmpleq_f32): Remove.
19224 (vcmpgtq_n_f32): Remove.
19225 (vcmpgtq_f32): Remove.
19226 (vcmpgeq_n_f32): Remove.
19227 (vcmpgeq_f32): Remove.
19228 (vcmpeqq_n_f32): Remove.
19229 (vcmpeqq_f32): Remove.
19230 (vcmpeqq_m_f16): Remove.
19231 (vcmpeqq_m_f32): Remove.
19232 (vcmpneq_m_u8): Remove.
19233 (vcmpneq_m_n_u8): Remove.
19234 (vcmphiq_m_u8): Remove.
19235 (vcmphiq_m_n_u8): Remove.
19236 (vcmpeqq_m_u8): Remove.
19237 (vcmpeqq_m_n_u8): Remove.
19238 (vcmpcsq_m_u8): Remove.
19239 (vcmpcsq_m_n_u8): Remove.
19240 (vcmpneq_m_s8): Remove.
19241 (vcmpneq_m_n_s8): Remove.
19242 (vcmpltq_m_s8): Remove.
19243 (vcmpltq_m_n_s8): Remove.
19244 (vcmpleq_m_s8): Remove.
19245 (vcmpleq_m_n_s8): Remove.
19246 (vcmpgtq_m_s8): Remove.
19247 (vcmpgtq_m_n_s8): Remove.
19248 (vcmpgeq_m_s8): Remove.
19249 (vcmpgeq_m_n_s8): Remove.
19250 (vcmpeqq_m_s8): Remove.
19251 (vcmpeqq_m_n_s8): Remove.
19252 (vcmpneq_m_u16): Remove.
19253 (vcmpneq_m_n_u16): Remove.
19254 (vcmphiq_m_u16): Remove.
19255 (vcmphiq_m_n_u16): Remove.
19256 (vcmpeqq_m_u16): Remove.
19257 (vcmpeqq_m_n_u16): Remove.
19258 (vcmpcsq_m_u16): Remove.
19259 (vcmpcsq_m_n_u16): Remove.
19260 (vcmpneq_m_s16): Remove.
19261 (vcmpneq_m_n_s16): Remove.
19262 (vcmpltq_m_s16): Remove.
19263 (vcmpltq_m_n_s16): Remove.
19264 (vcmpleq_m_s16): Remove.
19265 (vcmpleq_m_n_s16): Remove.
19266 (vcmpgtq_m_s16): Remove.
19267 (vcmpgtq_m_n_s16): Remove.
19268 (vcmpgeq_m_s16): Remove.
19269 (vcmpgeq_m_n_s16): Remove.
19270 (vcmpeqq_m_s16): Remove.
19271 (vcmpeqq_m_n_s16): Remove.
19272 (vcmpneq_m_u32): Remove.
19273 (vcmpneq_m_n_u32): Remove.
19274 (vcmphiq_m_u32): Remove.
19275 (vcmphiq_m_n_u32): Remove.
19276 (vcmpeqq_m_u32): Remove.
19277 (vcmpeqq_m_n_u32): Remove.
19278 (vcmpcsq_m_u32): Remove.
19279 (vcmpcsq_m_n_u32): Remove.
19280 (vcmpneq_m_s32): Remove.
19281 (vcmpneq_m_n_s32): Remove.
19282 (vcmpltq_m_s32): Remove.
19283 (vcmpltq_m_n_s32): Remove.
19284 (vcmpleq_m_s32): Remove.
19285 (vcmpleq_m_n_s32): Remove.
19286 (vcmpgtq_m_s32): Remove.
19287 (vcmpgtq_m_n_s32): Remove.
19288 (vcmpgeq_m_s32): Remove.
19289 (vcmpgeq_m_n_s32): Remove.
19290 (vcmpeqq_m_s32): Remove.
19291 (vcmpeqq_m_n_s32): Remove.
19292 (vcmpeqq_m_n_f16): Remove.
19293 (vcmpgeq_m_f16): Remove.
19294 (vcmpgeq_m_n_f16): Remove.
19295 (vcmpgtq_m_f16): Remove.
19296 (vcmpgtq_m_n_f16): Remove.
19297 (vcmpleq_m_f16): Remove.
19298 (vcmpleq_m_n_f16): Remove.
19299 (vcmpltq_m_f16): Remove.
19300 (vcmpltq_m_n_f16): Remove.
19301 (vcmpneq_m_f16): Remove.
19302 (vcmpneq_m_n_f16): Remove.
19303 (vcmpeqq_m_n_f32): Remove.
19304 (vcmpgeq_m_f32): Remove.
19305 (vcmpgeq_m_n_f32): Remove.
19306 (vcmpgtq_m_f32): Remove.
19307 (vcmpgtq_m_n_f32): Remove.
19308 (vcmpleq_m_f32): Remove.
19309 (vcmpleq_m_n_f32): Remove.
19310 (vcmpltq_m_f32): Remove.
19311 (vcmpltq_m_n_f32): Remove.
19312 (vcmpneq_m_f32): Remove.
19313 (vcmpneq_m_n_f32): Remove.
19314 (__arm_vcmpneq_s8): Remove.
19315 (__arm_vcmpneq_s16): Remove.
19316 (__arm_vcmpneq_s32): Remove.
19317 (__arm_vcmpneq_u8): Remove.
19318 (__arm_vcmpneq_u16): Remove.
19319 (__arm_vcmpneq_u32): Remove.
19320 (__arm_vcmpneq_n_u8): Remove.
19321 (__arm_vcmphiq_u8): Remove.
19322 (__arm_vcmphiq_n_u8): Remove.
19323 (__arm_vcmpeqq_u8): Remove.
19324 (__arm_vcmpeqq_n_u8): Remove.
19325 (__arm_vcmpcsq_u8): Remove.
19326 (__arm_vcmpcsq_n_u8): Remove.
19327 (__arm_vcmpneq_n_s8): Remove.
19328 (__arm_vcmpltq_s8): Remove.
19329 (__arm_vcmpltq_n_s8): Remove.
19330 (__arm_vcmpleq_s8): Remove.
19331 (__arm_vcmpleq_n_s8): Remove.
19332 (__arm_vcmpgtq_s8): Remove.
19333 (__arm_vcmpgtq_n_s8): Remove.
19334 (__arm_vcmpgeq_s8): Remove.
19335 (__arm_vcmpgeq_n_s8): Remove.
19336 (__arm_vcmpeqq_s8): Remove.
19337 (__arm_vcmpeqq_n_s8): Remove.
19338 (__arm_vcmpneq_n_u16): Remove.
19339 (__arm_vcmphiq_u16): Remove.
19340 (__arm_vcmphiq_n_u16): Remove.
19341 (__arm_vcmpeqq_u16): Remove.
19342 (__arm_vcmpeqq_n_u16): Remove.
19343 (__arm_vcmpcsq_u16): Remove.
19344 (__arm_vcmpcsq_n_u16): Remove.
19345 (__arm_vcmpneq_n_s16): Remove.
19346 (__arm_vcmpltq_s16): Remove.
19347 (__arm_vcmpltq_n_s16): Remove.
19348 (__arm_vcmpleq_s16): Remove.
19349 (__arm_vcmpleq_n_s16): Remove.
19350 (__arm_vcmpgtq_s16): Remove.
19351 (__arm_vcmpgtq_n_s16): Remove.
19352 (__arm_vcmpgeq_s16): Remove.
19353 (__arm_vcmpgeq_n_s16): Remove.
19354 (__arm_vcmpeqq_s16): Remove.
19355 (__arm_vcmpeqq_n_s16): Remove.
19356 (__arm_vcmpneq_n_u32): Remove.
19357 (__arm_vcmphiq_u32): Remove.
19358 (__arm_vcmphiq_n_u32): Remove.
19359 (__arm_vcmpeqq_u32): Remove.
19360 (__arm_vcmpeqq_n_u32): Remove.
19361 (__arm_vcmpcsq_u32): Remove.
19362 (__arm_vcmpcsq_n_u32): Remove.
19363 (__arm_vcmpneq_n_s32): Remove.
19364 (__arm_vcmpltq_s32): Remove.
19365 (__arm_vcmpltq_n_s32): Remove.
19366 (__arm_vcmpleq_s32): Remove.
19367 (__arm_vcmpleq_n_s32): Remove.
19368 (__arm_vcmpgtq_s32): Remove.
19369 (__arm_vcmpgtq_n_s32): Remove.
19370 (__arm_vcmpgeq_s32): Remove.
19371 (__arm_vcmpgeq_n_s32): Remove.
19372 (__arm_vcmpeqq_s32): Remove.
19373 (__arm_vcmpeqq_n_s32): Remove.
19374 (__arm_vcmpneq_m_u8): Remove.
19375 (__arm_vcmpneq_m_n_u8): Remove.
19376 (__arm_vcmphiq_m_u8): Remove.
19377 (__arm_vcmphiq_m_n_u8): Remove.
19378 (__arm_vcmpeqq_m_u8): Remove.
19379 (__arm_vcmpeqq_m_n_u8): Remove.
19380 (__arm_vcmpcsq_m_u8): Remove.
19381 (__arm_vcmpcsq_m_n_u8): Remove.
19382 (__arm_vcmpneq_m_s8): Remove.
19383 (__arm_vcmpneq_m_n_s8): Remove.
19384 (__arm_vcmpltq_m_s8): Remove.
19385 (__arm_vcmpltq_m_n_s8): Remove.
19386 (__arm_vcmpleq_m_s8): Remove.
19387 (__arm_vcmpleq_m_n_s8): Remove.
19388 (__arm_vcmpgtq_m_s8): Remove.
19389 (__arm_vcmpgtq_m_n_s8): Remove.
19390 (__arm_vcmpgeq_m_s8): Remove.
19391 (__arm_vcmpgeq_m_n_s8): Remove.
19392 (__arm_vcmpeqq_m_s8): Remove.
19393 (__arm_vcmpeqq_m_n_s8): Remove.
19394 (__arm_vcmpneq_m_u16): Remove.
19395 (__arm_vcmpneq_m_n_u16): Remove.
19396 (__arm_vcmphiq_m_u16): Remove.
19397 (__arm_vcmphiq_m_n_u16): Remove.
19398 (__arm_vcmpeqq_m_u16): Remove.
19399 (__arm_vcmpeqq_m_n_u16): Remove.
19400 (__arm_vcmpcsq_m_u16): Remove.
19401 (__arm_vcmpcsq_m_n_u16): Remove.
19402 (__arm_vcmpneq_m_s16): Remove.
19403 (__arm_vcmpneq_m_n_s16): Remove.
19404 (__arm_vcmpltq_m_s16): Remove.
19405 (__arm_vcmpltq_m_n_s16): Remove.
19406 (__arm_vcmpleq_m_s16): Remove.
19407 (__arm_vcmpleq_m_n_s16): Remove.
19408 (__arm_vcmpgtq_m_s16): Remove.
19409 (__arm_vcmpgtq_m_n_s16): Remove.
19410 (__arm_vcmpgeq_m_s16): Remove.
19411 (__arm_vcmpgeq_m_n_s16): Remove.
19412 (__arm_vcmpeqq_m_s16): Remove.
19413 (__arm_vcmpeqq_m_n_s16): Remove.
19414 (__arm_vcmpneq_m_u32): Remove.
19415 (__arm_vcmpneq_m_n_u32): Remove.
19416 (__arm_vcmphiq_m_u32): Remove.
19417 (__arm_vcmphiq_m_n_u32): Remove.
19418 (__arm_vcmpeqq_m_u32): Remove.
19419 (__arm_vcmpeqq_m_n_u32): Remove.
19420 (__arm_vcmpcsq_m_u32): Remove.
19421 (__arm_vcmpcsq_m_n_u32): Remove.
19422 (__arm_vcmpneq_m_s32): Remove.
19423 (__arm_vcmpneq_m_n_s32): Remove.
19424 (__arm_vcmpltq_m_s32): Remove.
19425 (__arm_vcmpltq_m_n_s32): Remove.
19426 (__arm_vcmpleq_m_s32): Remove.
19427 (__arm_vcmpleq_m_n_s32): Remove.
19428 (__arm_vcmpgtq_m_s32): Remove.
19429 (__arm_vcmpgtq_m_n_s32): Remove.
19430 (__arm_vcmpgeq_m_s32): Remove.
19431 (__arm_vcmpgeq_m_n_s32): Remove.
19432 (__arm_vcmpeqq_m_s32): Remove.
19433 (__arm_vcmpeqq_m_n_s32): Remove.
19434 (__arm_vcmpneq_n_f16): Remove.
19435 (__arm_vcmpneq_f16): Remove.
19436 (__arm_vcmpltq_n_f16): Remove.
19437 (__arm_vcmpltq_f16): Remove.
19438 (__arm_vcmpleq_n_f16): Remove.
19439 (__arm_vcmpleq_f16): Remove.
19440 (__arm_vcmpgtq_n_f16): Remove.
19441 (__arm_vcmpgtq_f16): Remove.
19442 (__arm_vcmpgeq_n_f16): Remove.
19443 (__arm_vcmpgeq_f16): Remove.
19444 (__arm_vcmpeqq_n_f16): Remove.
19445 (__arm_vcmpeqq_f16): Remove.
19446 (__arm_vcmpneq_n_f32): Remove.
19447 (__arm_vcmpneq_f32): Remove.
19448 (__arm_vcmpltq_n_f32): Remove.
19449 (__arm_vcmpltq_f32): Remove.
19450 (__arm_vcmpleq_n_f32): Remove.
19451 (__arm_vcmpleq_f32): Remove.
19452 (__arm_vcmpgtq_n_f32): Remove.
19453 (__arm_vcmpgtq_f32): Remove.
19454 (__arm_vcmpgeq_n_f32): Remove.
19455 (__arm_vcmpgeq_f32): Remove.
19456 (__arm_vcmpeqq_n_f32): Remove.
19457 (__arm_vcmpeqq_f32): Remove.
19458 (__arm_vcmpeqq_m_f16): Remove.
19459 (__arm_vcmpeqq_m_f32): Remove.
19460 (__arm_vcmpeqq_m_n_f16): Remove.
19461 (__arm_vcmpgeq_m_f16): Remove.
19462 (__arm_vcmpgeq_m_n_f16): Remove.
19463 (__arm_vcmpgtq_m_f16): Remove.
19464 (__arm_vcmpgtq_m_n_f16): Remove.
19465 (__arm_vcmpleq_m_f16): Remove.
19466 (__arm_vcmpleq_m_n_f16): Remove.
19467 (__arm_vcmpltq_m_f16): Remove.
19468 (__arm_vcmpltq_m_n_f16): Remove.
19469 (__arm_vcmpneq_m_f16): Remove.
19470 (__arm_vcmpneq_m_n_f16): Remove.
19471 (__arm_vcmpeqq_m_n_f32): Remove.
19472 (__arm_vcmpgeq_m_f32): Remove.
19473 (__arm_vcmpgeq_m_n_f32): Remove.
19474 (__arm_vcmpgtq_m_f32): Remove.
19475 (__arm_vcmpgtq_m_n_f32): Remove.
19476 (__arm_vcmpleq_m_f32): Remove.
19477 (__arm_vcmpleq_m_n_f32): Remove.
19478 (__arm_vcmpltq_m_f32): Remove.
19479 (__arm_vcmpltq_m_n_f32): Remove.
19480 (__arm_vcmpneq_m_f32): Remove.
19481 (__arm_vcmpneq_m_n_f32): Remove.
19482 (__arm_vcmpneq): Remove.
19483 (__arm_vcmphiq): Remove.
19484 (__arm_vcmpeqq): Remove.
19485 (__arm_vcmpcsq): Remove.
19486 (__arm_vcmpltq): Remove.
19487 (__arm_vcmpleq): Remove.
19488 (__arm_vcmpgtq): Remove.
19489 (__arm_vcmpgeq): Remove.
19490 (__arm_vcmpneq_m): Remove.
19491 (__arm_vcmphiq_m): Remove.
19492 (__arm_vcmpeqq_m): Remove.
19493 (__arm_vcmpcsq_m): Remove.
19494 (__arm_vcmpltq_m): Remove.
19495 (__arm_vcmpleq_m): Remove.
19496 (__arm_vcmpgtq_m): Remove.
19497 (__arm_vcmpgeq_m): Remove.
19499 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19501 * config/arm/arm-mve-builtins-shapes.cc (cmp): New.
19502 * config/arm/arm-mve-builtins-shapes.h (cmp): New.
19504 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
19506 * config/arm/iterators.md (MVE_CMP_M, MVE_CMP_M_F, MVE_CMP_M_N)
19507 (MVE_CMP_M_N_F, mve_cmp_op1): New.
19510 * config/arm/mve.md (mve_vcmp<mve_cmp_op>q_n_<mode>): Rename into ...
19511 (@mve_vcmp<mve_cmp_op>q_n_<mode>): ... this.
19512 (mve_vcmpeqq_m_f<mode>, mve_vcmpgeq_m_f<mode>)
19513 (mve_vcmpgtq_m_f<mode>, mve_vcmpleq_m_f<mode>)
19514 (mve_vcmpltq_m_f<mode>, mve_vcmpneq_m_f<mode>): Merge into ...
19515 (@mve_vcmp<mve_cmp_op1>q_m_f<mode>): ... this.
19516 (mve_vcmpcsq_m_u<mode>, mve_vcmpeqq_m_<supf><mode>)
19517 (mve_vcmpgeq_m_s<mode>, mve_vcmpgtq_m_s<mode>)
19518 (mve_vcmphiq_m_u<mode>, mve_vcmpleq_m_s<mode>)
19519 (mve_vcmpltq_m_s<mode>, mve_vcmpneq_m_<supf><mode>): Merge into
19521 (@mve_vcmp<mve_cmp_op1>q_m_<supf><mode>): ... this.
19522 (mve_vcmpcsq_m_n_u<mode>, mve_vcmpeqq_m_n_<supf><mode>)
19523 (mve_vcmpgeq_m_n_s<mode>, mve_vcmpgtq_m_n_s<mode>)
19524 (mve_vcmphiq_m_n_u<mode>, mve_vcmpleq_m_n_s<mode>)
19525 (mve_vcmpltq_m_n_s<mode>, mve_vcmpneq_m_n_<supf><mode>): Merge
19527 (@mve_vcmp<mve_cmp_op1>q_m_n_<supf><mode>): ... this.
19528 (mve_vcmpeqq_m_n_f<mode>, mve_vcmpgeq_m_n_f<mode>)
19529 (mve_vcmpgtq_m_n_f<mode>, mve_vcmpleq_m_n_f<mode>)
19530 (mve_vcmpltq_m_n_f<mode>, mve_vcmpneq_m_n_f<mode>): Merge into ...
19531 (@mve_vcmp<mve_cmp_op1>q_m_n_f<mode>): ... this.
19533 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
19535 * match.pd <popcount optimizations>: Simplify popcount(X|Y) +
19536 popcount(X&Y) as popcount(X)+popcount(Y). Likewise, simplify
19537 popcount(X)+popcount(Y)-popcount(X&Y) as popcount(X|Y), and
19540 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
19542 * match.pd <popcount optimizations>: Simplify popcount(bswap(x))
19543 as popcount(x). Simplify popcount(rotate(x,y)) as popcount(x).
19544 <parity optimizations>: Simplify parity(bswap(x)) as parity(x).
19545 Simplify parity(rotate(x,y)) as parity(x).
19547 2023-05-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19549 * config/riscv/autovec.md (@vec_series<mode>): New pattern
19550 * config/riscv/riscv-protos.h (expand_vec_series): New function.
19551 * config/riscv/riscv-v.cc (emit_binop): Ditto.
19552 (emit_index_op): Ditto.
19553 (expand_vec_series): Ditto.
19554 (expand_const_vector): Add series vector handling.
19555 * config/riscv/riscv.cc (riscv_const_insns): Enable series vector for testing.
19557 2023-05-10 Roger Sayle <roger@nextmovesoftware.com>
19559 * config/i386/i386.md (*concat<mode><dwi>3_1): Use preferred
19560 [(const_int 0)] idiom, instead of [(clobber (const_int 0))].
19561 (*concat<mode><dwi>3_2): Likewise.
19562 (*concat<mode><dwi>3_3): Likewise.
19563 (*concat<mode><dwi>3_4): Likewise.
19564 (*concat<mode><dwi>3_5): Likewise.
19565 (*concat<mode><dwi>3_6): Likewise.
19566 (*concat<mode><dwi>3_7): Likewise.
19568 2023-05-10 Uros Bizjak <ubizjak@gmail.com>
19571 * config/i386/mmx.md (sse4_1_<code>v2qiv2si2): New insn pattern.
19572 (<insn>v4qiv4hi2): New expander.
19573 (<insn>v2hiv2si2): Ditto.
19574 (<insn>v2qiv2si2): Ditto.
19575 (<insn>v2qiv2hi2): Ditto.
19577 2023-05-10 Jeff Law <jlaw@ventanamicro>
19579 * config/h8300/constraints.md (Q): Make this a special memory
19583 2023-05-10 Jakub Jelinek <jakub@redhat.com>
19586 * ipa-prop.cc (ipa_get_callee_param_type): Don't return TREE_VALUE (t)
19587 if t is void_list_node.
19589 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19591 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode>_insn_le): Delete.
19592 (aarch64_sqmovun<mode>_insn_be): Delete.
19593 (aarch64_sqmovun<mode><vczle><vczbe>): New define_insn.
19594 (aarch64_sqmovun<mode>): Delete expander.
19596 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19599 * config/aarch64/aarch64-simd.md (aarch64_<PERMUTE:perm_insn><mode>):
19601 (aarch64_<PERMUTE:perm_insn><mode><vczle><vczbe>): ... This.
19602 (aarch64_rev<REVERSE:rev_op><mode>): Rename to...
19603 (aarch64_rev<REVERSE:rev_op><mode><vczle><vczbe>): ... This.
19605 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19608 * config/aarch64/aarch64-simd.md (aarch64_<su_optab>q<addsub><mode>):
19610 (aarch64_<su_optab>q<addsub><mode><vczle><vczbe>): ... This.
19611 (aarch64_<sur>qadd<mode>): Rename to...
19612 (aarch64_<sur>qadd<mode><vczle><vczbe>): ... This.
19614 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19616 * config/aarch64/aarch64-simd.md
19617 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_le): Delete.
19618 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_be): Delete.
19619 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): New define_insn.
19620 (aarch64_<sur>q<r>shr<u>n_n<mode>): Simplify expander.
19622 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19625 * config/aarch64/aarch64-simd.md (aarch64_xtn<mode>_insn_le): Delete.
19626 (aarch64_xtn<mode>_insn_be): Likewise.
19627 (trunc<mode><Vnarrowq>2): Rename to...
19628 (trunc<mode><Vnarrowq>2<vczle><vczbe>): ... This.
19629 (aarch64_xtn<mode>): Move under the above. Just emit the truncate RTL.
19630 (aarch64_<su>qmovn<mode>): Likewise.
19631 (aarch64_<su>qmovn<mode><vczle><vczbe>): New define_insn.
19632 (aarch64_<su>qmovn<mode>_insn_le): Delete.
19633 (aarch64_<su>qmovn<mode>_insn_be): Likewise.
19635 2023-05-10 Li Xu <xuli1@eswincomputing.com>
19637 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): For vfmv.f.s/vmv.x.s
19638 intruction replace null avl with (const_int 0).
19640 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19642 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Fix
19645 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19648 * config/riscv/riscv-vsetvl.cc (avl_source_has_vsetvl_p): New function.
19649 (source_equal_p): Fix dead loop in vsetvl avl checking.
19651 2023-05-10 Hans-Peter Nilsson <hp@axis.com>
19653 * config/cris/cris.cc (cris_postdbr_cmpelim): Correct mode
19654 of modeadjusted_dccr.
19656 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
19658 * config/arm/arm-mve-builtins-base.cc (vmaxaq, vminaq): New.
19659 * config/arm/arm-mve-builtins-base.def (vmaxaq, vminaq): New.
19660 * config/arm/arm-mve-builtins-base.h (vmaxaq, vminaq): New.
19661 * config/arm/arm-mve-builtins.cc
19662 (function_instance::has_inactive_argument): Handle vmaxaq and
19664 * config/arm/arm_mve.h (vminaq): Remove.
19666 (vminaq_m): Remove.
19667 (vmaxaq_m): Remove.
19668 (vminaq_s8): Remove.
19669 (vmaxaq_s8): Remove.
19670 (vminaq_s16): Remove.
19671 (vmaxaq_s16): Remove.
19672 (vminaq_s32): Remove.
19673 (vmaxaq_s32): Remove.
19674 (vminaq_m_s8): Remove.
19675 (vmaxaq_m_s8): Remove.
19676 (vminaq_m_s16): Remove.
19677 (vmaxaq_m_s16): Remove.
19678 (vminaq_m_s32): Remove.
19679 (vmaxaq_m_s32): Remove.
19680 (__arm_vminaq_s8): Remove.
19681 (__arm_vmaxaq_s8): Remove.
19682 (__arm_vminaq_s16): Remove.
19683 (__arm_vmaxaq_s16): Remove.
19684 (__arm_vminaq_s32): Remove.
19685 (__arm_vmaxaq_s32): Remove.
19686 (__arm_vminaq_m_s8): Remove.
19687 (__arm_vmaxaq_m_s8): Remove.
19688 (__arm_vminaq_m_s16): Remove.
19689 (__arm_vmaxaq_m_s16): Remove.
19690 (__arm_vminaq_m_s32): Remove.
19691 (__arm_vmaxaq_m_s32): Remove.
19692 (__arm_vminaq): Remove.
19693 (__arm_vmaxaq): Remove.
19694 (__arm_vminaq_m): Remove.
19695 (__arm_vmaxaq_m): Remove.
19697 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
19699 * config/arm/iterators.md (MVE_VMAXAVMINAQ, MVE_VMAXAVMINAQ_M):
19701 (mve_insn): Add vmaxa, vmina.
19702 (supf): Add VMAXAQ_S, VMAXAQ_M_S, VMINAQ_S, VMINAQ_M_S.
19703 * config/arm/mve.md (mve_vmaxaq_s<mode>, mve_vminaq_s<mode>):
19705 (@mve_<mve_insn>q_<supf><mode>): ... this.
19706 (mve_vmaxaq_m_s<mode>, mve_vminaq_m_s<mode>): Merge into ...
19707 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
19709 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
19711 * config/arm/arm-mve-builtins-shapes.cc (binary_maxamina): New.
19712 * config/arm/arm-mve-builtins-shapes.h (binary_maxamina): New.
19714 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
19716 * config/arm/arm-mve-builtins-base.cc (vmaxnmaq, vminnmaq): New.
19717 * config/arm/arm-mve-builtins-base.def (vmaxnmaq, vminnmaq): New.
19718 * config/arm/arm-mve-builtins-base.h (vmaxnmaq, vminnmaq): New.
19719 * config/arm/arm-mve-builtins.cc
19720 (function_instance::has_inactive_argument): Handle vmaxnmaq and
19722 * config/arm/arm_mve.h (vminnmaq): Remove.
19723 (vmaxnmaq): Remove.
19724 (vmaxnmaq_m): Remove.
19725 (vminnmaq_m): Remove.
19726 (vminnmaq_f16): Remove.
19727 (vmaxnmaq_f16): Remove.
19728 (vminnmaq_f32): Remove.
19729 (vmaxnmaq_f32): Remove.
19730 (vmaxnmaq_m_f16): Remove.
19731 (vminnmaq_m_f16): Remove.
19732 (vmaxnmaq_m_f32): Remove.
19733 (vminnmaq_m_f32): Remove.
19734 (__arm_vminnmaq_f16): Remove.
19735 (__arm_vmaxnmaq_f16): Remove.
19736 (__arm_vminnmaq_f32): Remove.
19737 (__arm_vmaxnmaq_f32): Remove.
19738 (__arm_vmaxnmaq_m_f16): Remove.
19739 (__arm_vminnmaq_m_f16): Remove.
19740 (__arm_vmaxnmaq_m_f32): Remove.
19741 (__arm_vminnmaq_m_f32): Remove.
19742 (__arm_vminnmaq): Remove.
19743 (__arm_vmaxnmaq): Remove.
19744 (__arm_vmaxnmaq_m): Remove.
19745 (__arm_vminnmaq_m): Remove.
19747 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
19749 * config/arm/iterators.md (MVE_VMAXNMA_VMINNMAQ)
19750 (MVE_VMAXNMA_VMINNMAQ_M): New.
19751 (mve_insn): Add vmaxnma, vminnma.
19752 * config/arm/mve.md (mve_vmaxnmaq_f<mode>, mve_vminnmaq_f<mode>):
19754 (@mve_<mve_insn>q_f<mode>): ... this.
19755 (mve_vmaxnmaq_m_f<mode>, mve_vminnmaq_m_f<mode>): Merge into ...
19756 (@mve_<mve_insn>q_m_f<mode>): ... this.
19758 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
19760 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_F): New.
19761 (vmaxnmavq, vmaxnmvq, vminnmavq, vminnmvq): New.
19762 * config/arm/arm-mve-builtins-base.def (vmaxnmavq, vmaxnmvq)
19763 (vminnmavq, vminnmvq): New.
19764 * config/arm/arm-mve-builtins-base.h (vmaxnmavq, vmaxnmvq)
19765 (vminnmavq, vminnmvq): New.
19766 * config/arm/arm_mve.h (vminnmvq): Remove.
19767 (vminnmavq): Remove.
19768 (vmaxnmvq): Remove.
19769 (vmaxnmavq): Remove.
19770 (vmaxnmavq_p): Remove.
19771 (vmaxnmvq_p): Remove.
19772 (vminnmavq_p): Remove.
19773 (vminnmvq_p): Remove.
19774 (vminnmvq_f16): Remove.
19775 (vminnmavq_f16): Remove.
19776 (vmaxnmvq_f16): Remove.
19777 (vmaxnmavq_f16): Remove.
19778 (vminnmvq_f32): Remove.
19779 (vminnmavq_f32): Remove.
19780 (vmaxnmvq_f32): Remove.
19781 (vmaxnmavq_f32): Remove.
19782 (vmaxnmavq_p_f16): Remove.
19783 (vmaxnmvq_p_f16): Remove.
19784 (vminnmavq_p_f16): Remove.
19785 (vminnmvq_p_f16): Remove.
19786 (vmaxnmavq_p_f32): Remove.
19787 (vmaxnmvq_p_f32): Remove.
19788 (vminnmavq_p_f32): Remove.
19789 (vminnmvq_p_f32): Remove.
19790 (__arm_vminnmvq_f16): Remove.
19791 (__arm_vminnmavq_f16): Remove.
19792 (__arm_vmaxnmvq_f16): Remove.
19793 (__arm_vmaxnmavq_f16): Remove.
19794 (__arm_vminnmvq_f32): Remove.
19795 (__arm_vminnmavq_f32): Remove.
19796 (__arm_vmaxnmvq_f32): Remove.
19797 (__arm_vmaxnmavq_f32): Remove.
19798 (__arm_vmaxnmavq_p_f16): Remove.
19799 (__arm_vmaxnmvq_p_f16): Remove.
19800 (__arm_vminnmavq_p_f16): Remove.
19801 (__arm_vminnmvq_p_f16): Remove.
19802 (__arm_vmaxnmavq_p_f32): Remove.
19803 (__arm_vmaxnmvq_p_f32): Remove.
19804 (__arm_vminnmavq_p_f32): Remove.
19805 (__arm_vminnmvq_p_f32): Remove.
19806 (__arm_vminnmvq): Remove.
19807 (__arm_vminnmavq): Remove.
19808 (__arm_vmaxnmvq): Remove.
19809 (__arm_vmaxnmavq): Remove.
19810 (__arm_vmaxnmavq_p): Remove.
19811 (__arm_vmaxnmvq_p): Remove.
19812 (__arm_vminnmavq_p): Remove.
19813 (__arm_vminnmvq_p): Remove.
19814 (__arm_vmaxnmavq_m): Remove.
19815 (__arm_vmaxnmvq_m): Remove.
19817 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
19819 * config/arm/arm-mve-builtins-functions.h
19820 (unspec_mve_function_exact_insn_pred_p): Use code_for_mve_q_p_f.
19822 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
19824 * config/arm/iterators.md (MVE_VMAXNMxV_MINNMxVQ)
19825 (MVE_VMAXNMxV_MINNMxVQ_P): New.
19826 (mve_insn): Add vmaxnmav, vmaxnmv, vminnmav, vminnmv.
19827 * config/arm/mve.md (mve_vmaxnmavq_f<mode>, mve_vmaxnmvq_f<mode>)
19828 (mve_vminnmavq_f<mode>, mve_vminnmvq_f<mode>): Merge into ...
19829 (@mve_<mve_insn>q_f<mode>): ... this.
19830 (mve_vmaxnmavq_p_f<mode>, mve_vmaxnmvq_p_f<mode>)
19831 (mve_vminnmavq_p_f<mode>, mve_vminnmvq_p_f<mode>): Merge into ...
19832 (@mve_<mve_insn>q_p_f<mode>): ... this.
19834 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
19836 * config/arm/arm-mve-builtins-base.cc (vmaxnmq, vminnmq): New.
19837 * config/arm/arm-mve-builtins-base.def (vmaxnmq, vminnmq): New.
19838 * config/arm/arm-mve-builtins-base.h (vmaxnmq, vminnmq): New.
19839 * config/arm/arm_mve.h (vminnmq): Remove.
19841 (vmaxnmq_m): Remove.
19842 (vminnmq_m): Remove.
19843 (vminnmq_x): Remove.
19844 (vmaxnmq_x): Remove.
19845 (vminnmq_f16): Remove.
19846 (vmaxnmq_f16): Remove.
19847 (vminnmq_f32): Remove.
19848 (vmaxnmq_f32): Remove.
19849 (vmaxnmq_m_f32): Remove.
19850 (vmaxnmq_m_f16): Remove.
19851 (vminnmq_m_f32): Remove.
19852 (vminnmq_m_f16): Remove.
19853 (vminnmq_x_f16): Remove.
19854 (vminnmq_x_f32): Remove.
19855 (vmaxnmq_x_f16): Remove.
19856 (vmaxnmq_x_f32): Remove.
19857 (__arm_vminnmq_f16): Remove.
19858 (__arm_vmaxnmq_f16): Remove.
19859 (__arm_vminnmq_f32): Remove.
19860 (__arm_vmaxnmq_f32): Remove.
19861 (__arm_vmaxnmq_m_f32): Remove.
19862 (__arm_vmaxnmq_m_f16): Remove.
19863 (__arm_vminnmq_m_f32): Remove.
19864 (__arm_vminnmq_m_f16): Remove.
19865 (__arm_vminnmq_x_f16): Remove.
19866 (__arm_vminnmq_x_f32): Remove.
19867 (__arm_vmaxnmq_x_f16): Remove.
19868 (__arm_vmaxnmq_x_f32): Remove.
19869 (__arm_vminnmq): Remove.
19870 (__arm_vmaxnmq): Remove.
19871 (__arm_vmaxnmq_m): Remove.
19872 (__arm_vminnmq_m): Remove.
19873 (__arm_vminnmq_x): Remove.
19874 (__arm_vmaxnmq_x): Remove.
19876 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
19878 * config/arm/iterators.md (MAX_MIN_F): New.
19879 (MVE_FP_M_BINARY): Add VMAXNMQ_M_F, VMINNMQ_M_F.
19880 (mve_insn): Add vmaxnm, vminnm.
19881 (max_min_f_str): New.
19882 * config/arm/mve.md (mve_vmaxnmq_f<mode>, mve_vminnmq_f<mode>):
19884 (@mve_<max_min_f_str>q_f<mode>): ... this.
19885 (mve_vmaxnmq_m_f<mode>, mve_vminnmq_m_f<mode>): Merge into ...
19886 (@mve_<mve_insn>q_m_f<mode>): ... this.
19888 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
19890 * config/arm/vec-common.md (smin<mode>3): Use VDQWH iterator.
19891 (smax<mode>3): Likewise.
19893 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
19895 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_S_U)
19896 (FUNCTION_PRED_P_S): New.
19897 (vmaxavq, vminavq, vmaxvq, vminvq): New.
19898 * config/arm/arm-mve-builtins-base.def (vmaxavq, vminavq, vmaxvq)
19900 * config/arm/arm-mve-builtins-base.h (vmaxavq, vminavq, vmaxvq)
19902 * config/arm/arm_mve.h (vminvq): Remove.
19904 (vminvq_p): Remove.
19905 (vmaxvq_p): Remove.
19906 (vminvq_u8): Remove.
19907 (vmaxvq_u8): Remove.
19908 (vminvq_s8): Remove.
19909 (vmaxvq_s8): Remove.
19910 (vminvq_u16): Remove.
19911 (vmaxvq_u16): Remove.
19912 (vminvq_s16): Remove.
19913 (vmaxvq_s16): Remove.
19914 (vminvq_u32): Remove.
19915 (vmaxvq_u32): Remove.
19916 (vminvq_s32): Remove.
19917 (vmaxvq_s32): Remove.
19918 (vminvq_p_u8): Remove.
19919 (vmaxvq_p_u8): Remove.
19920 (vminvq_p_s8): Remove.
19921 (vmaxvq_p_s8): Remove.
19922 (vminvq_p_u16): Remove.
19923 (vmaxvq_p_u16): Remove.
19924 (vminvq_p_s16): Remove.
19925 (vmaxvq_p_s16): Remove.
19926 (vminvq_p_u32): Remove.
19927 (vmaxvq_p_u32): Remove.
19928 (vminvq_p_s32): Remove.
19929 (vmaxvq_p_s32): Remove.
19930 (__arm_vminvq_u8): Remove.
19931 (__arm_vmaxvq_u8): Remove.
19932 (__arm_vminvq_s8): Remove.
19933 (__arm_vmaxvq_s8): Remove.
19934 (__arm_vminvq_u16): Remove.
19935 (__arm_vmaxvq_u16): Remove.
19936 (__arm_vminvq_s16): Remove.
19937 (__arm_vmaxvq_s16): Remove.
19938 (__arm_vminvq_u32): Remove.
19939 (__arm_vmaxvq_u32): Remove.
19940 (__arm_vminvq_s32): Remove.
19941 (__arm_vmaxvq_s32): Remove.
19942 (__arm_vminvq_p_u8): Remove.
19943 (__arm_vmaxvq_p_u8): Remove.
19944 (__arm_vminvq_p_s8): Remove.
19945 (__arm_vmaxvq_p_s8): Remove.
19946 (__arm_vminvq_p_u16): Remove.
19947 (__arm_vmaxvq_p_u16): Remove.
19948 (__arm_vminvq_p_s16): Remove.
19949 (__arm_vmaxvq_p_s16): Remove.
19950 (__arm_vminvq_p_u32): Remove.
19951 (__arm_vmaxvq_p_u32): Remove.
19952 (__arm_vminvq_p_s32): Remove.
19953 (__arm_vmaxvq_p_s32): Remove.
19954 (__arm_vminvq): Remove.
19955 (__arm_vmaxvq): Remove.
19956 (__arm_vminvq_p): Remove.
19957 (__arm_vmaxvq_p): Remove.
19960 (vminavq_p): Remove.
19961 (vmaxavq_p): Remove.
19962 (vminavq_s8): Remove.
19963 (vmaxavq_s8): Remove.
19964 (vminavq_s16): Remove.
19965 (vmaxavq_s16): Remove.
19966 (vminavq_s32): Remove.
19967 (vmaxavq_s32): Remove.
19968 (vminavq_p_s8): Remove.
19969 (vmaxavq_p_s8): Remove.
19970 (vminavq_p_s16): Remove.
19971 (vmaxavq_p_s16): Remove.
19972 (vminavq_p_s32): Remove.
19973 (vmaxavq_p_s32): Remove.
19974 (__arm_vminavq_s8): Remove.
19975 (__arm_vmaxavq_s8): Remove.
19976 (__arm_vminavq_s16): Remove.
19977 (__arm_vmaxavq_s16): Remove.
19978 (__arm_vminavq_s32): Remove.
19979 (__arm_vmaxavq_s32): Remove.
19980 (__arm_vminavq_p_s8): Remove.
19981 (__arm_vmaxavq_p_s8): Remove.
19982 (__arm_vminavq_p_s16): Remove.
19983 (__arm_vmaxavq_p_s16): Remove.
19984 (__arm_vminavq_p_s32): Remove.
19985 (__arm_vmaxavq_p_s32): Remove.
19986 (__arm_vminavq): Remove.
19987 (__arm_vmaxavq): Remove.
19988 (__arm_vminavq_p): Remove.
19989 (__arm_vmaxavq_p): Remove.
19991 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
19993 * config/arm/iterators.md (MVE_VMAXVQ_VMINVQ, MVE_VMAXVQ_VMINVQ_P): New.
19994 (mve_insn): Add vmaxav, vmaxv, vminav, vminv.
19995 (supf): Add VMAXAVQ_S, VMAXAVQ_P_S, VMINAVQ_S, VMINAVQ_P_S.
19996 * config/arm/mve.md (mve_vmaxavq_s<mode>, mve_vmaxvq_<supf><mode>)
19997 (mve_vminavq_s<mode>, mve_vminvq_<supf><mode>): Merge into ...
19998 (@mve_<mve_insn>q_<supf><mode>): ... this.
19999 (mve_vmaxavq_p_s<mode>, mve_vmaxvq_p_<supf><mode>)
20000 (mve_vminavq_p_s<mode>, mve_vminvq_p_<supf><mode>): Merge into ...
20001 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
20003 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20005 * config/arm/arm-mve-builtins-functions.h (class
20006 unspec_mve_function_exact_insn_pred_p): New.
20008 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20010 * config/arm/arm-mve-builtins-shapes.cc (binary_maxavminav): New.
20011 * config/arm/arm-mve-builtins-shapes.h (binary_maxavminav): New.
20013 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20015 * config/arm/arm-mve-builtins-shapes.cc (binary_maxvminv): New.
20016 * config/arm/arm-mve-builtins-shapes.h (binary_maxvminv): New.
20018 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
20020 * config/aarch64/aarch64-protos.h (aarch64_adjust_reg_alloc_order):
20022 * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define.
20023 (ADJUST_REG_ALLOC_ORDER): Likewise.
20024 * config/aarch64/aarch64.cc (aarch64_adjust_reg_alloc_order): New
20026 * config/aarch64/aarch64-sve.md (*vcond_mask_<mode><vpred>): Use
20027 Upa rather than Upl for unpredicated movprfx alternatives.
20029 2023-05-09 Jeff Law <jlaw@ventanamicro>
20031 * config/h8300/testcompare.md: Add peephole2 which uses a memory
20032 load to set flags, thus eliminating a compare against zero.
20034 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20036 * config/arm/arm-mve-builtins-base.cc (vshllbq, vshlltq): New.
20037 * config/arm/arm-mve-builtins-base.def (vshllbq, vshlltq): New.
20038 * config/arm/arm-mve-builtins-base.h (vshllbq, vshlltq): New.
20039 * config/arm/arm_mve.h (vshlltq): Remove.
20041 (vshllbq_m): Remove.
20042 (vshlltq_m): Remove.
20043 (vshllbq_x): Remove.
20044 (vshlltq_x): Remove.
20045 (vshlltq_n_u8): Remove.
20046 (vshllbq_n_u8): Remove.
20047 (vshlltq_n_s8): Remove.
20048 (vshllbq_n_s8): Remove.
20049 (vshlltq_n_u16): Remove.
20050 (vshllbq_n_u16): Remove.
20051 (vshlltq_n_s16): Remove.
20052 (vshllbq_n_s16): Remove.
20053 (vshllbq_m_n_s8): Remove.
20054 (vshllbq_m_n_s16): Remove.
20055 (vshllbq_m_n_u8): Remove.
20056 (vshllbq_m_n_u16): Remove.
20057 (vshlltq_m_n_s8): Remove.
20058 (vshlltq_m_n_s16): Remove.
20059 (vshlltq_m_n_u8): Remove.
20060 (vshlltq_m_n_u16): Remove.
20061 (vshllbq_x_n_s8): Remove.
20062 (vshllbq_x_n_s16): Remove.
20063 (vshllbq_x_n_u8): Remove.
20064 (vshllbq_x_n_u16): Remove.
20065 (vshlltq_x_n_s8): Remove.
20066 (vshlltq_x_n_s16): Remove.
20067 (vshlltq_x_n_u8): Remove.
20068 (vshlltq_x_n_u16): Remove.
20069 (__arm_vshlltq_n_u8): Remove.
20070 (__arm_vshllbq_n_u8): Remove.
20071 (__arm_vshlltq_n_s8): Remove.
20072 (__arm_vshllbq_n_s8): Remove.
20073 (__arm_vshlltq_n_u16): Remove.
20074 (__arm_vshllbq_n_u16): Remove.
20075 (__arm_vshlltq_n_s16): Remove.
20076 (__arm_vshllbq_n_s16): Remove.
20077 (__arm_vshllbq_m_n_s8): Remove.
20078 (__arm_vshllbq_m_n_s16): Remove.
20079 (__arm_vshllbq_m_n_u8): Remove.
20080 (__arm_vshllbq_m_n_u16): Remove.
20081 (__arm_vshlltq_m_n_s8): Remove.
20082 (__arm_vshlltq_m_n_s16): Remove.
20083 (__arm_vshlltq_m_n_u8): Remove.
20084 (__arm_vshlltq_m_n_u16): Remove.
20085 (__arm_vshllbq_x_n_s8): Remove.
20086 (__arm_vshllbq_x_n_s16): Remove.
20087 (__arm_vshllbq_x_n_u8): Remove.
20088 (__arm_vshllbq_x_n_u16): Remove.
20089 (__arm_vshlltq_x_n_s8): Remove.
20090 (__arm_vshlltq_x_n_s16): Remove.
20091 (__arm_vshlltq_x_n_u8): Remove.
20092 (__arm_vshlltq_x_n_u16): Remove.
20093 (__arm_vshlltq): Remove.
20094 (__arm_vshllbq): Remove.
20095 (__arm_vshllbq_m): Remove.
20096 (__arm_vshlltq_m): Remove.
20097 (__arm_vshllbq_x): Remove.
20098 (__arm_vshlltq_x): Remove.
20100 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20102 * config/arm/iterators.md (mve_insn): Add vshllb, vshllt.
20103 (VSHLLBQ_N, VSHLLTQ_N): Remove.
20105 (VSHLLBQ_M_N, VSHLLTQ_M_N): Remove.
20106 (VSHLLxQ_M_N): New.
20107 * config/arm/mve.md (mve_vshllbq_n_<supf><mode>)
20108 (mve_vshlltq_n_<supf><mode>): Merge into ...
20109 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
20110 (mve_vshllbq_m_n_<supf><mode>, mve_vshlltq_m_n_<supf><mode>):
20112 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
20114 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20116 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_n): New.
20117 * config/arm/arm-mve-builtins-shapes.h (binary_widen_n): New.
20119 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20121 * config/arm/arm-mve-builtins-base.cc (vmovnbq, vmovntq, vqmovnbq)
20122 (vqmovntq, vqmovunbq, vqmovuntq): New.
20123 * config/arm/arm-mve-builtins-base.def (vmovnbq, vmovntq)
20124 (vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq): New.
20125 * config/arm/arm-mve-builtins-base.h (vmovnbq, vmovntq, vqmovnbq)
20126 (vqmovntq, vqmovunbq, vqmovuntq): New.
20127 * config/arm/arm-mve-builtins.cc
20128 (function_instance::has_inactive_argument): Handle vmovnbq,
20129 vmovntq, vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq.
20130 * config/arm/arm_mve.h (vqmovntq): Remove.
20131 (vqmovnbq): Remove.
20132 (vqmovnbq_m): Remove.
20133 (vqmovntq_m): Remove.
20134 (vqmovntq_u16): Remove.
20135 (vqmovnbq_u16): Remove.
20136 (vqmovntq_s16): Remove.
20137 (vqmovnbq_s16): Remove.
20138 (vqmovntq_u32): Remove.
20139 (vqmovnbq_u32): Remove.
20140 (vqmovntq_s32): Remove.
20141 (vqmovnbq_s32): Remove.
20142 (vqmovnbq_m_s16): Remove.
20143 (vqmovntq_m_s16): Remove.
20144 (vqmovnbq_m_u16): Remove.
20145 (vqmovntq_m_u16): Remove.
20146 (vqmovnbq_m_s32): Remove.
20147 (vqmovntq_m_s32): Remove.
20148 (vqmovnbq_m_u32): Remove.
20149 (vqmovntq_m_u32): Remove.
20150 (__arm_vqmovntq_u16): Remove.
20151 (__arm_vqmovnbq_u16): Remove.
20152 (__arm_vqmovntq_s16): Remove.
20153 (__arm_vqmovnbq_s16): Remove.
20154 (__arm_vqmovntq_u32): Remove.
20155 (__arm_vqmovnbq_u32): Remove.
20156 (__arm_vqmovntq_s32): Remove.
20157 (__arm_vqmovnbq_s32): Remove.
20158 (__arm_vqmovnbq_m_s16): Remove.
20159 (__arm_vqmovntq_m_s16): Remove.
20160 (__arm_vqmovnbq_m_u16): Remove.
20161 (__arm_vqmovntq_m_u16): Remove.
20162 (__arm_vqmovnbq_m_s32): Remove.
20163 (__arm_vqmovntq_m_s32): Remove.
20164 (__arm_vqmovnbq_m_u32): Remove.
20165 (__arm_vqmovntq_m_u32): Remove.
20166 (__arm_vqmovntq): Remove.
20167 (__arm_vqmovnbq): Remove.
20168 (__arm_vqmovnbq_m): Remove.
20169 (__arm_vqmovntq_m): Remove.
20172 (vmovnbq_m): Remove.
20173 (vmovntq_m): Remove.
20174 (vmovntq_u16): Remove.
20175 (vmovnbq_u16): Remove.
20176 (vmovntq_s16): Remove.
20177 (vmovnbq_s16): Remove.
20178 (vmovntq_u32): Remove.
20179 (vmovnbq_u32): Remove.
20180 (vmovntq_s32): Remove.
20181 (vmovnbq_s32): Remove.
20182 (vmovnbq_m_s16): Remove.
20183 (vmovntq_m_s16): Remove.
20184 (vmovnbq_m_u16): Remove.
20185 (vmovntq_m_u16): Remove.
20186 (vmovnbq_m_s32): Remove.
20187 (vmovntq_m_s32): Remove.
20188 (vmovnbq_m_u32): Remove.
20189 (vmovntq_m_u32): Remove.
20190 (__arm_vmovntq_u16): Remove.
20191 (__arm_vmovnbq_u16): Remove.
20192 (__arm_vmovntq_s16): Remove.
20193 (__arm_vmovnbq_s16): Remove.
20194 (__arm_vmovntq_u32): Remove.
20195 (__arm_vmovnbq_u32): Remove.
20196 (__arm_vmovntq_s32): Remove.
20197 (__arm_vmovnbq_s32): Remove.
20198 (__arm_vmovnbq_m_s16): Remove.
20199 (__arm_vmovntq_m_s16): Remove.
20200 (__arm_vmovnbq_m_u16): Remove.
20201 (__arm_vmovntq_m_u16): Remove.
20202 (__arm_vmovnbq_m_s32): Remove.
20203 (__arm_vmovntq_m_s32): Remove.
20204 (__arm_vmovnbq_m_u32): Remove.
20205 (__arm_vmovntq_m_u32): Remove.
20206 (__arm_vmovntq): Remove.
20207 (__arm_vmovnbq): Remove.
20208 (__arm_vmovnbq_m): Remove.
20209 (__arm_vmovntq_m): Remove.
20210 (vqmovuntq): Remove.
20211 (vqmovunbq): Remove.
20212 (vqmovunbq_m): Remove.
20213 (vqmovuntq_m): Remove.
20214 (vqmovuntq_s16): Remove.
20215 (vqmovunbq_s16): Remove.
20216 (vqmovuntq_s32): Remove.
20217 (vqmovunbq_s32): Remove.
20218 (vqmovunbq_m_s16): Remove.
20219 (vqmovuntq_m_s16): Remove.
20220 (vqmovunbq_m_s32): Remove.
20221 (vqmovuntq_m_s32): Remove.
20222 (__arm_vqmovuntq_s16): Remove.
20223 (__arm_vqmovunbq_s16): Remove.
20224 (__arm_vqmovuntq_s32): Remove.
20225 (__arm_vqmovunbq_s32): Remove.
20226 (__arm_vqmovunbq_m_s16): Remove.
20227 (__arm_vqmovuntq_m_s16): Remove.
20228 (__arm_vqmovunbq_m_s32): Remove.
20229 (__arm_vqmovuntq_m_s32): Remove.
20230 (__arm_vqmovuntq): Remove.
20231 (__arm_vqmovunbq): Remove.
20232 (__arm_vqmovunbq_m): Remove.
20233 (__arm_vqmovuntq_m): Remove.
20235 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20237 * config/arm/iterators.md (MVE_MOVN, MVE_MOVN_M): New.
20238 (mve_insn): Add vmovnb, vmovnt, vqmovnb, vqmovnt, vqmovunb,
20241 (supf): Add VQMOVUNBQ_M_S, VQMOVUNBQ_S, VQMOVUNTQ_M_S,
20243 * config/arm/mve.md (mve_vmovnbq_<supf><mode>)
20244 (mve_vmovntq_<supf><mode>, mve_vqmovnbq_<supf><mode>)
20245 (mve_vqmovntq_<supf><mode>, mve_vqmovunbq_s<mode>)
20246 (mve_vqmovuntq_s<mode>): Merge into ...
20247 (@mve_<mve_insn>q_<supf><mode>): ... this.
20248 (mve_vmovnbq_m_<supf><mode>, mve_vmovntq_m_<supf><mode>)
20249 (mve_vqmovnbq_m_<supf><mode>, mve_vqmovntq_m_<supf><mode>)
20250 (mve_vqmovunbq_m_s<mode>, mve_vqmovuntq_m_s<mode>): Merge into ...
20251 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
20253 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20255 * config/arm/arm-mve-builtins-shapes.cc (binary_move_narrow): New.
20256 (binary_move_narrow_unsigned): New.
20257 * config/arm/arm-mve-builtins-shapes.h (binary_move_narrow): New.
20258 (binary_move_narrow_unsigned): New.
20260 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20262 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_F): New.
20263 (vrndaq, vrndmq, vrndnq, vrndpq, vrndq, vrndxq): New.
20264 * config/arm/arm-mve-builtins-base.def (vrndaq, vrndmq, vrndnq)
20265 (vrndpq, vrndq, vrndxq): New.
20266 * config/arm/arm-mve-builtins-base.h (vrndaq, vrndmq, vrndnq)
20267 (vrndpq, vrndq, vrndxq): New.
20268 * config/arm/arm_mve.h (vrndxq): Remove.
20274 (vrndaq_m): Remove.
20275 (vrndmq_m): Remove.
20276 (vrndnq_m): Remove.
20277 (vrndpq_m): Remove.
20279 (vrndxq_m): Remove.
20281 (vrndnq_x): Remove.
20282 (vrndmq_x): Remove.
20283 (vrndpq_x): Remove.
20284 (vrndaq_x): Remove.
20285 (vrndxq_x): Remove.
20286 (vrndxq_f16): Remove.
20287 (vrndxq_f32): Remove.
20288 (vrndq_f16): Remove.
20289 (vrndq_f32): Remove.
20290 (vrndpq_f16): Remove.
20291 (vrndpq_f32): Remove.
20292 (vrndnq_f16): Remove.
20293 (vrndnq_f32): Remove.
20294 (vrndmq_f16): Remove.
20295 (vrndmq_f32): Remove.
20296 (vrndaq_f16): Remove.
20297 (vrndaq_f32): Remove.
20298 (vrndaq_m_f16): Remove.
20299 (vrndmq_m_f16): Remove.
20300 (vrndnq_m_f16): Remove.
20301 (vrndpq_m_f16): Remove.
20302 (vrndq_m_f16): Remove.
20303 (vrndxq_m_f16): Remove.
20304 (vrndaq_m_f32): Remove.
20305 (vrndmq_m_f32): Remove.
20306 (vrndnq_m_f32): Remove.
20307 (vrndpq_m_f32): Remove.
20308 (vrndq_m_f32): Remove.
20309 (vrndxq_m_f32): Remove.
20310 (vrndq_x_f16): Remove.
20311 (vrndq_x_f32): Remove.
20312 (vrndnq_x_f16): Remove.
20313 (vrndnq_x_f32): Remove.
20314 (vrndmq_x_f16): Remove.
20315 (vrndmq_x_f32): Remove.
20316 (vrndpq_x_f16): Remove.
20317 (vrndpq_x_f32): Remove.
20318 (vrndaq_x_f16): Remove.
20319 (vrndaq_x_f32): Remove.
20320 (vrndxq_x_f16): Remove.
20321 (vrndxq_x_f32): Remove.
20322 (__arm_vrndxq_f16): Remove.
20323 (__arm_vrndxq_f32): Remove.
20324 (__arm_vrndq_f16): Remove.
20325 (__arm_vrndq_f32): Remove.
20326 (__arm_vrndpq_f16): Remove.
20327 (__arm_vrndpq_f32): Remove.
20328 (__arm_vrndnq_f16): Remove.
20329 (__arm_vrndnq_f32): Remove.
20330 (__arm_vrndmq_f16): Remove.
20331 (__arm_vrndmq_f32): Remove.
20332 (__arm_vrndaq_f16): Remove.
20333 (__arm_vrndaq_f32): Remove.
20334 (__arm_vrndaq_m_f16): Remove.
20335 (__arm_vrndmq_m_f16): Remove.
20336 (__arm_vrndnq_m_f16): Remove.
20337 (__arm_vrndpq_m_f16): Remove.
20338 (__arm_vrndq_m_f16): Remove.
20339 (__arm_vrndxq_m_f16): Remove.
20340 (__arm_vrndaq_m_f32): Remove.
20341 (__arm_vrndmq_m_f32): Remove.
20342 (__arm_vrndnq_m_f32): Remove.
20343 (__arm_vrndpq_m_f32): Remove.
20344 (__arm_vrndq_m_f32): Remove.
20345 (__arm_vrndxq_m_f32): Remove.
20346 (__arm_vrndq_x_f16): Remove.
20347 (__arm_vrndq_x_f32): Remove.
20348 (__arm_vrndnq_x_f16): Remove.
20349 (__arm_vrndnq_x_f32): Remove.
20350 (__arm_vrndmq_x_f16): Remove.
20351 (__arm_vrndmq_x_f32): Remove.
20352 (__arm_vrndpq_x_f16): Remove.
20353 (__arm_vrndpq_x_f32): Remove.
20354 (__arm_vrndaq_x_f16): Remove.
20355 (__arm_vrndaq_x_f32): Remove.
20356 (__arm_vrndxq_x_f16): Remove.
20357 (__arm_vrndxq_x_f32): Remove.
20358 (__arm_vrndxq): Remove.
20359 (__arm_vrndq): Remove.
20360 (__arm_vrndpq): Remove.
20361 (__arm_vrndnq): Remove.
20362 (__arm_vrndmq): Remove.
20363 (__arm_vrndaq): Remove.
20364 (__arm_vrndaq_m): Remove.
20365 (__arm_vrndmq_m): Remove.
20366 (__arm_vrndnq_m): Remove.
20367 (__arm_vrndpq_m): Remove.
20368 (__arm_vrndq_m): Remove.
20369 (__arm_vrndxq_m): Remove.
20370 (__arm_vrndq_x): Remove.
20371 (__arm_vrndnq_x): Remove.
20372 (__arm_vrndmq_x): Remove.
20373 (__arm_vrndpq_x): Remove.
20374 (__arm_vrndaq_x): Remove.
20375 (__arm_vrndxq_x): Remove.
20377 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20379 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N_NO_U_F): New.
20380 (vabsq, vnegq, vclsq, vclzq, vqabsq, vqnegq): New.
20381 * config/arm/arm-mve-builtins-base.def (vabsq, vnegq, vclsq)
20382 (vclzq, vqabsq, vqnegq): New.
20383 * config/arm/arm-mve-builtins-base.h (vabsq, vnegq, vclsq, vclzq)
20384 (vqabsq, vqnegq): New.
20385 * config/arm/arm_mve.h (vabsq): Remove.
20388 (vabsq_f16): Remove.
20389 (vabsq_f32): Remove.
20390 (vabsq_s8): Remove.
20391 (vabsq_s16): Remove.
20392 (vabsq_s32): Remove.
20393 (vabsq_m_s8): Remove.
20394 (vabsq_m_s16): Remove.
20395 (vabsq_m_s32): Remove.
20396 (vabsq_m_f16): Remove.
20397 (vabsq_m_f32): Remove.
20398 (vabsq_x_s8): Remove.
20399 (vabsq_x_s16): Remove.
20400 (vabsq_x_s32): Remove.
20401 (vabsq_x_f16): Remove.
20402 (vabsq_x_f32): Remove.
20403 (__arm_vabsq_s8): Remove.
20404 (__arm_vabsq_s16): Remove.
20405 (__arm_vabsq_s32): Remove.
20406 (__arm_vabsq_m_s8): Remove.
20407 (__arm_vabsq_m_s16): Remove.
20408 (__arm_vabsq_m_s32): Remove.
20409 (__arm_vabsq_x_s8): Remove.
20410 (__arm_vabsq_x_s16): Remove.
20411 (__arm_vabsq_x_s32): Remove.
20412 (__arm_vabsq_f16): Remove.
20413 (__arm_vabsq_f32): Remove.
20414 (__arm_vabsq_m_f16): Remove.
20415 (__arm_vabsq_m_f32): Remove.
20416 (__arm_vabsq_x_f16): Remove.
20417 (__arm_vabsq_x_f32): Remove.
20418 (__arm_vabsq): Remove.
20419 (__arm_vabsq_m): Remove.
20420 (__arm_vabsq_x): Remove.
20424 (vnegq_f16): Remove.
20425 (vnegq_f32): Remove.
20426 (vnegq_s8): Remove.
20427 (vnegq_s16): Remove.
20428 (vnegq_s32): Remove.
20429 (vnegq_m_s8): Remove.
20430 (vnegq_m_s16): Remove.
20431 (vnegq_m_s32): Remove.
20432 (vnegq_m_f16): Remove.
20433 (vnegq_m_f32): Remove.
20434 (vnegq_x_s8): Remove.
20435 (vnegq_x_s16): Remove.
20436 (vnegq_x_s32): Remove.
20437 (vnegq_x_f16): Remove.
20438 (vnegq_x_f32): Remove.
20439 (__arm_vnegq_s8): Remove.
20440 (__arm_vnegq_s16): Remove.
20441 (__arm_vnegq_s32): Remove.
20442 (__arm_vnegq_m_s8): Remove.
20443 (__arm_vnegq_m_s16): Remove.
20444 (__arm_vnegq_m_s32): Remove.
20445 (__arm_vnegq_x_s8): Remove.
20446 (__arm_vnegq_x_s16): Remove.
20447 (__arm_vnegq_x_s32): Remove.
20448 (__arm_vnegq_f16): Remove.
20449 (__arm_vnegq_f32): Remove.
20450 (__arm_vnegq_m_f16): Remove.
20451 (__arm_vnegq_m_f32): Remove.
20452 (__arm_vnegq_x_f16): Remove.
20453 (__arm_vnegq_x_f32): Remove.
20454 (__arm_vnegq): Remove.
20455 (__arm_vnegq_m): Remove.
20456 (__arm_vnegq_x): Remove.
20460 (vclsq_s8): Remove.
20461 (vclsq_s16): Remove.
20462 (vclsq_s32): Remove.
20463 (vclsq_m_s8): Remove.
20464 (vclsq_m_s16): Remove.
20465 (vclsq_m_s32): Remove.
20466 (vclsq_x_s8): Remove.
20467 (vclsq_x_s16): Remove.
20468 (vclsq_x_s32): Remove.
20469 (__arm_vclsq_s8): Remove.
20470 (__arm_vclsq_s16): Remove.
20471 (__arm_vclsq_s32): Remove.
20472 (__arm_vclsq_m_s8): Remove.
20473 (__arm_vclsq_m_s16): Remove.
20474 (__arm_vclsq_m_s32): Remove.
20475 (__arm_vclsq_x_s8): Remove.
20476 (__arm_vclsq_x_s16): Remove.
20477 (__arm_vclsq_x_s32): Remove.
20478 (__arm_vclsq): Remove.
20479 (__arm_vclsq_m): Remove.
20480 (__arm_vclsq_x): Remove.
20484 (vclzq_s8): Remove.
20485 (vclzq_s16): Remove.
20486 (vclzq_s32): Remove.
20487 (vclzq_u8): Remove.
20488 (vclzq_u16): Remove.
20489 (vclzq_u32): Remove.
20490 (vclzq_m_u8): Remove.
20491 (vclzq_m_s8): Remove.
20492 (vclzq_m_u16): Remove.
20493 (vclzq_m_s16): Remove.
20494 (vclzq_m_u32): Remove.
20495 (vclzq_m_s32): Remove.
20496 (vclzq_x_s8): Remove.
20497 (vclzq_x_s16): Remove.
20498 (vclzq_x_s32): Remove.
20499 (vclzq_x_u8): Remove.
20500 (vclzq_x_u16): Remove.
20501 (vclzq_x_u32): Remove.
20502 (__arm_vclzq_s8): Remove.
20503 (__arm_vclzq_s16): Remove.
20504 (__arm_vclzq_s32): Remove.
20505 (__arm_vclzq_u8): Remove.
20506 (__arm_vclzq_u16): Remove.
20507 (__arm_vclzq_u32): Remove.
20508 (__arm_vclzq_m_u8): Remove.
20509 (__arm_vclzq_m_s8): Remove.
20510 (__arm_vclzq_m_u16): Remove.
20511 (__arm_vclzq_m_s16): Remove.
20512 (__arm_vclzq_m_u32): Remove.
20513 (__arm_vclzq_m_s32): Remove.
20514 (__arm_vclzq_x_s8): Remove.
20515 (__arm_vclzq_x_s16): Remove.
20516 (__arm_vclzq_x_s32): Remove.
20517 (__arm_vclzq_x_u8): Remove.
20518 (__arm_vclzq_x_u16): Remove.
20519 (__arm_vclzq_x_u32): Remove.
20520 (__arm_vclzq): Remove.
20521 (__arm_vclzq_m): Remove.
20522 (__arm_vclzq_x): Remove.
20525 (vqnegq_m): Remove.
20526 (vqabsq_m): Remove.
20527 (vqabsq_s8): Remove.
20528 (vqabsq_s16): Remove.
20529 (vqabsq_s32): Remove.
20530 (vqnegq_s8): Remove.
20531 (vqnegq_s16): Remove.
20532 (vqnegq_s32): Remove.
20533 (vqnegq_m_s8): Remove.
20534 (vqabsq_m_s8): Remove.
20535 (vqnegq_m_s16): Remove.
20536 (vqabsq_m_s16): Remove.
20537 (vqnegq_m_s32): Remove.
20538 (vqabsq_m_s32): Remove.
20539 (__arm_vqabsq_s8): Remove.
20540 (__arm_vqabsq_s16): Remove.
20541 (__arm_vqabsq_s32): Remove.
20542 (__arm_vqnegq_s8): Remove.
20543 (__arm_vqnegq_s16): Remove.
20544 (__arm_vqnegq_s32): Remove.
20545 (__arm_vqnegq_m_s8): Remove.
20546 (__arm_vqabsq_m_s8): Remove.
20547 (__arm_vqnegq_m_s16): Remove.
20548 (__arm_vqabsq_m_s16): Remove.
20549 (__arm_vqnegq_m_s32): Remove.
20550 (__arm_vqabsq_m_s32): Remove.
20551 (__arm_vqabsq): Remove.
20552 (__arm_vqnegq): Remove.
20553 (__arm_vqnegq_m): Remove.
20554 (__arm_vqabsq_m): Remove.
20556 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20558 * config/arm/iterators.md (MVE_INT_M_UNARY, MVE_INT_UNARY)
20559 (MVE_FP_UNARY, MVE_FP_M_UNARY): New.
20560 (mve_insn): Add vabs, vcls, vclz, vneg, vqabs, vqneg, vrnda,
20561 vrndm, vrndn, vrndp, vrnd, vrndx.
20562 (isu): Add VABSQ_M_S, VCLSQ_M_S, VCLZQ_M_S, VCLZQ_M_U, VNEGQ_M_S,
20563 VQABSQ_M_S, VQNEGQ_M_S.
20565 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrndxq_f<mode>)
20566 (mve_vrndq_f<mode>, mve_vrndpq_f<mode>, mve_vrndnq_f<mode>)
20567 (mve_vrndmq_f<mode>, mve_vrndaq_f<mode>): Merge into ...
20568 (@mve_<mve_insn>q_f<mode>): ... this.
20569 (mve_vnegq_f<mode>, mve_vabsq_f<mode>): Merge into ...
20570 (mve_v<absneg_str>q_f<mode>): ... this.
20571 (mve_vnegq_s<mode>, mve_vabsq_s<mode>): Merge into ...
20572 (mve_v<absneg_str>q_s<mode>): ... this.
20573 (mve_vclsq_s<mode>, mve_vqnegq_s<mode>, mve_vqabsq_s<mode>): Merge into ...
20574 (@mve_<mve_insn>q_<supf><mode>): ... this.
20575 (mve_vabsq_m_s<mode>, mve_vclsq_m_s<mode>)
20576 (mve_vclzq_m_<supf><mode>, mve_vnegq_m_s<mode>)
20577 (mve_vqabsq_m_s<mode>, mve_vqnegq_m_s<mode>): Merge into ...
20578 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
20579 (mve_vabsq_m_f<mode>, mve_vnegq_m_f<mode>, mve_vrndaq_m_f<mode>)
20580 (mve_vrndmq_m_f<mode>, mve_vrndnq_m_f<mode>, mve_vrndpq_m_f<mode>)
20581 (mve_vrndxq_m_f<mode>): Merge into ...
20582 (@mve_<mve_insn>q_m_f<mode>): ... this.
20584 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
20586 * config/arm/arm-mve-builtins-shapes.cc (unary): New.
20587 * config/arm/arm-mve-builtins-shapes.h (unary): New.
20589 2023-05-09 Jakub Jelinek <jakub@redhat.com>
20591 * mux-utils.h: Fix comment typo, avoides -> avoids.
20593 2023-05-09 Jakub Jelinek <jakub@redhat.com>
20595 PR tree-optimization/109778
20596 * wide-int.h (wi::lrotate, wi::rrotate): Call wi::lrshift on
20597 wi::zext (x, width) rather than x if width != precision, rather
20598 than using wi::zext (right, width) after the shift.
20599 * tree-ssa-ccp.cc (bit_value_binop): Call wi::ext on the results
20600 of wi::lrotate or wi::rrotate.
20602 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
20604 * genmatch.cc (get_out_file): Make static and rename to ...
20605 (choose_output): ... this. Reimplement. Update all uses ...
20606 (decision_tree::gen): ... here and ...
20609 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
20611 * genmatch.cc (showUsage): Reimplement as ...
20612 (usage): ...this. Adjust all uses.
20613 (main): Print usage when no arguments. Add missing 'return 1'.
20615 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
20617 * genmatch.cc (header_file): Make static.
20618 (emit_func): Rename to...
20619 (fp_decl): ... this. Adjust all uses.
20620 (fp_decl_done): New function. Use it...
20621 (decision_tree::gen): ... here and...
20622 (write_predicate): ... here.
20625 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
20627 * ira-conflicts.cc (can_use_same_reg_p): Skip over non-matching
20630 2023-05-08 Roger Sayle <roger@nextmovesoftware.com>
20631 Uros Bizjak <ubizjak@gmail.com>
20633 * config/i386/i386.md (any_or_plus): Move definition earlier.
20634 (*insvti_highpart_1): New define_insn_and_split to overwrite
20635 (insv) the highpart of a TImode register/memory.
20637 2023-05-08 Eugene Rozenfeld <erozen@microsoft.com>
20639 * auto-profile.cc (auto_profile): Check todo from early_inline
20640 to see if cleanup_tree_vfg needs to be called.
20641 (early_inline): Return todo from early_inliner.
20643 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
20645 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vector_info):
20647 (pass_vsetvl::get_block_info): New.
20648 (pass_vsetvl::update_vector_info): New.
20649 (pass_vsetvl::simple_vsetvl): Use get_vector_info.
20650 (pass_vsetvl::compute_local_backward_infos): Ditto.
20651 (pass_vsetvl::transfer_before): Ditto.
20652 (pass_vsetvl::transfer_after): Ditto.
20653 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
20654 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
20655 (pass_vsetvl::cleanup_insns): Ditto.
20656 (pass_vsetvl::compute_local_backward_infos): Use
20657 update_vector_info.
20659 2023-05-08 Jeff Law <jlaw@ventanamicro>
20661 * config/stormy16/stormy16.md (zero_extendhisi2): Fix length.
20663 2023-05-08 Richard Biener <rguenther@suse.de>
20664 Michael Meissner <meissner@linux.ibm.com>
20666 PR middle-end/108623
20667 * tree-core.h (tree_type_common): Bump up precision field to 16 bits.
20668 Align bit fields > 1 bit to at least an 8-bit boundary.
20670 2023-05-08 Andrew Pinski <apinski@marvell.com>
20672 PR tree-optimization/109424
20673 PR tree-optimization/59424
20674 * tree-ssa-phiopt.cc (factor_out_conditional_conversion): Rename to ...
20675 (factor_out_conditional_operation): This and add support for all unary
20677 (pass_phiopt::execute): Update call to factor_out_conditional_conversion
20678 to call factor_out_conditional_operation instead.
20680 2023-05-08 Andrew Pinski <apinski@marvell.com>
20682 * tree-ssa-phiopt.cc (pass_phiopt::execute): Loop
20683 over factor_out_conditional_conversion.
20685 2023-05-08 Andrew Pinski <apinski@marvell.com>
20687 PR tree-optimization/49959
20688 PR tree-optimization/103771
20689 * tree-ssa-phiopt.cc (pass_phiopt::execute): Support
20690 Diamond shapped bb form for factor_out_conditional_conversion.
20692 2023-05-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20694 * config/riscv/autovec.md (movmisalign<mode>): New pattern.
20695 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): Delete.
20696 (riscv_vector_get_mask_mode): Ditto.
20697 (get_mask_policy_no_pred): Ditto.
20698 (get_tail_policy_no_pred): Ditto.
20699 (get_mask_mode): New function.
20700 * config/riscv/riscv-v.cc (get_mask_policy_no_pred): Delete.
20701 (get_tail_policy_no_pred): Ditto.
20702 (riscv_vector_mask_mode_p): Ditto.
20703 (riscv_vector_get_mask_mode): Ditto.
20704 (get_mask_mode): New function.
20705 * config/riscv/riscv-vector-builtins.cc (use_real_merge_p): Remove
20707 (get_tail_policy_for_pred): Ditto.
20708 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred): Ditto.
20709 (get_mask_policy_for_pred): Ditto
20710 * config/riscv/riscv.cc (riscv_get_mask_mode): Refine codes.
20712 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
20714 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi): New.
20715 (riscv_select_multilib): New.
20716 (riscv_compute_multilib): Extract logic to riscv_select_multilib and
20717 also handle select_by_abi.
20718 * config/riscv/elf.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Change it
20719 to select_by_abi_arch_cmodel from 1.
20720 * config/riscv/linux.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Define.
20721 * config/riscv/riscv-opts.h (enum riscv_multilib_select_kind): New.
20723 2023-05-08 Alexander Monakov <amonakov@ispras.ru>
20725 * Makefile.in: (gimple-match-head.o-warn): Remove.
20726 (GIMPLE_MATCH_PD_SEQ_SRC): Do not depend on
20727 gimple-match-exports.cc.
20728 (gimple-match-auto.h): Only depend on s-gimple-match.
20729 (generic-match-auto.h): Likewise.
20731 2023-05-08 Andrew Pinski <apinski@marvell.com>
20733 PR tree-optimization/109691
20734 * tree-ssa-dce.cc (simple_dce_from_worklist): Add need_eh_cleanup
20736 If the removed statement can throw, have need_eh_cleanup
20737 include the bb of that statement.
20738 * tree-ssa-dce.h (simple_dce_from_worklist): Update declaration.
20739 * tree-ssa-propagate.cc (struct prop_stats_d): Remove
20741 (substitute_and_fold_dom_walker::substitute_and_fold_dom_walker):
20742 Initialize dceworklist instead of stmts_to_remove.
20743 (substitute_and_fold_dom_walker::~substitute_and_fold_dom_walker):
20744 Destore dceworklist instead of stmts_to_remove.
20745 (substitute_and_fold_dom_walker::before_dom_children):
20746 Set dceworklist instead of adding to stmts_to_remove.
20747 (substitute_and_fold_engine::substitute_and_fold):
20748 Call simple_dce_from_worklist instead of poping
20750 Don't update the stat on removal statements.
20752 2023-05-07 Andrew Pinski <apinski@marvell.com>
20755 * config/aarch64/aarch64-builtins.cc (aarch64_simd_switcher::aarch64_simd_switcher):
20756 Change argument type to aarch64_feature_flags.
20757 * config/aarch64/aarch64-protos.h (aarch64_simd_switcher): Change
20758 constructor argument type to aarch64_feature_flags.
20759 Change m_old_asm_isa_flags to be aarch64_feature_flags.
20761 2023-05-07 Jiufu Guo <guojiufu@linux.ibm.com>
20763 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Generate
20764 more parallel code if can_create_pseudo_p.
20766 2023-05-07 Roger Sayle <roger@nextmovesoftware.com>
20769 * lower-subreg.cc (resolve_simple_move): Don't emit a clobber
20770 immediately before moving a multi-word register by parts.
20772 2023-05-06 Jeff Law <jlaw@ventanamicro>
20774 * config/riscv/riscv-v.cc (riscv_vector_preferred_simd_mode): Delete.
20776 2023-05-06 Michael Collison <collison@rivosinc.com>
20778 * tree-vect-slp.cc (can_duplicate_and_interleave_p):
20779 Check that GET_MODE_NUNITS is a multiple of 2.
20781 2023-05-06 Michael Collison <collison@rivosinc.com>
20783 * config/riscv/riscv.cc
20784 (riscv_estimated_poly_value): Implement
20785 TARGET_ESTIMATED_POLY_VALUE.
20786 (riscv_preferred_simd_mode): Implement
20787 TARGET_VECTORIZE_PREFERRED_SIMD_MODE.
20788 (riscv_get_mask_mode): Implement TARGET_VECTORIZE_GET_MASK_MODE.
20789 (riscv_empty_mask_is_expensive): Implement
20790 TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE.
20791 (riscv_vectorize_create_costs): Implement
20792 TARGET_VECTORIZE_CREATE_COSTS.
20793 (riscv_support_vector_misalignment): Implement
20794 TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT.
20795 (TARGET_ESTIMATED_POLY_VALUE): Register target macro.
20796 (TARGET_VECTORIZE_GET_MASK_MODE): Ditto.
20797 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Ditto.
20798 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
20800 2023-05-06 Jeff Law <jlaw@ventanamicro>
20802 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Remove
20803 duplicate definition.
20805 2023-05-06 Michael Collison <collison@rivosinc.com>
20807 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): New function.
20808 (riscv_vector_preferred_simd_mode): Ditto.
20809 (get_mask_policy_no_pred): Ditto.
20810 (get_tail_policy_no_pred): Ditto.
20811 (riscv_vector_mask_mode_p): Ditto.
20812 (riscv_vector_get_mask_mode): Ditto.
20814 2023-05-06 Michael Collison <collison@rivosinc.com>
20816 * config/riscv/riscv-vector-builtins.cc (get_tail_policy_for_pred):
20817 Remove static declaration to to make externally visible.
20818 (get_mask_policy_for_pred): Ditto.
20819 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred):
20820 New external declaration.
20821 (get_mask_policy_for_pred): Ditto.
20823 2023-05-06 Michael Collison <collison@rivosinc.com>
20825 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): New.
20826 (riscv_vector_get_mask_mode): Ditto.
20827 (get_mask_policy_no_pred): Ditto.
20828 (get_tail_policy_no_pred): Ditto.
20830 2023-05-06 Xi Ruoyao <xry111@xry111.site>
20832 * config/loongarch/loongarch.h (struct machine_function): Add
20833 reg_is_wrapped_separately array for register wrapping
20835 * config/loongarch/loongarch.cc
20836 (loongarch_get_separate_components): New function.
20837 (loongarch_components_for_bb): Likewise.
20838 (loongarch_disqualify_components): Likewise.
20839 (loongarch_process_components): Likewise.
20840 (loongarch_emit_prologue_components): Likewise.
20841 (loongarch_emit_epilogue_components): Likewise.
20842 (loongarch_set_handled_components): Likewise.
20843 (TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS): Define.
20844 (TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB): Likewise.
20845 (TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS): Likewise.
20846 (TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS): Likewise.
20847 (TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS): Likewise.
20848 (TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS): Likewise.
20849 (loongarch_for_each_saved_reg): Skip registers that are wrapped
20852 2023-05-06 Xi Ruoyao <xry111@xry111.site>
20855 * Makefile.in (s-macro_list): Pass -nostdinc to
20858 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20860 * config/riscv/riscv-protos.h (preferred_simd_mode): New function.
20861 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Ditto.
20862 (preferred_simd_mode): Ditto.
20863 * config/riscv/riscv.cc (riscv_get_arg_info): Handle RVV type in function arg.
20864 (riscv_convert_vector_bits): Adjust for RVV auto-vectorization.
20865 (riscv_preferred_simd_mode): New function.
20866 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): New target hook support.
20867 * config/riscv/vector.md: Add autovec.md.
20868 * config/riscv/autovec.md: New file.
20870 2023-05-06 Jakub Jelinek <jakub@redhat.com>
20872 * real.h (dconst_pi): Define.
20873 (dconst_e_ptr): Formatting fix.
20874 (dconst_pi_ptr): Declare.
20875 * real.cc (dconst_pi_ptr): New function.
20876 * gimple-range-op.cc (cfn_sincos::fold_range): Intersect the generic
20877 boundaries range with range computed from sin/cos of the particular
20878 bounds if the argument range is shorter than 2*pi.
20879 (cfn_sincos::op1_range): Take bulps into account when determining
20880 which result ranges are always invalid or behave like known NAN.
20882 2023-05-06 Aldy Hernandez <aldyh@redhat.com>
20884 * gimple-range-cache.cc (sbr_sparse_bitmap::set_bb_range): Do not
20885 pass type to vrange_storage::equal_p.
20886 * value-range-storage.cc (vrange_storage::equal_p): Remove type.
20887 (irange_storage::equal_p): Same.
20888 (frange_storage::equal_p): Same.
20889 * value-range-storage.h (class frange_storage): Same.
20891 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20894 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): Remove it.
20895 (pass_vsetvl::local_eliminate_vsetvl_insn): New function.
20897 2023-05-06 liuhongt <hongtao.liu@intel.com>
20899 * combine.cc (maybe_swap_commutative_operands): Canonicalize
20900 vec_merge when mask is constant.
20901 * doc/md.texi: Document vec_merge canonicalization.
20903 2023-05-06 Jakub Jelinek <jakub@redhat.com>
20905 * value-range.h (frange_arithmetic): Declare.
20906 * range-op-float.cc (frange_arithmetic): No longer static.
20907 * gimple-range-op.cc (frange_mpfr_arg1): New function.
20908 (cfn_sqrt::fold_range): Intersect the generic boundaries range
20909 with range computed from sqrt of the particular bounds.
20910 (cfn_sqrt::op1_range): Intersect the generic boundaries range
20911 with range computed from squared particular bounds.
20913 2023-05-06 Jakub Jelinek <jakub@redhat.com>
20915 * Makefile.in (check_p_numbers): Rename to one_to_9999, move
20916 earlier with helper variables also renamed.
20917 (MATCH_SPLUT_SEQ): Use $(wordlist 1,$(NUM_MATCH_SPLITS),$(one_to_9999))
20918 instead of $(shell seq 1 $(NUM_MATCH_SPLITS)).
20919 (check_p_subdirs): Use $(one_to_9999) instead of $(check_p_numbers).
20921 2023-05-06 Hans-Peter Nilsson <hp@axis.com>
20923 * config/cris/cris.md (splitop): Add PLUS.
20924 * config/cris/cris.cc (cris_split_constant): Also handle
20925 PLUS when a split into two insns may be useful.
20927 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
20929 * config/cris/cris.md (movandsplit1): New define_peephole2.
20931 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
20933 * config/cris/cris.md (lsrandsplit1): New define_peephole2.
20935 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
20937 * doc/md.texi (define_peephole2): Document order of scanning.
20939 2023-05-05 Pan Li <pan2.li@intel.com>
20940 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20942 * config/riscv/vector.md: Allow const as the operand of RVV
20943 indexed load/store.
20945 2023-05-05 Pan Li <pan2.li@intel.com>
20947 * config/riscv/riscv.h (VECTOR_STORE_FLAG_VALUE): Add new macro
20948 consumed by simplify_rtx.
20950 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
20952 * config/arm/arm-mve-builtins-base.cc (vrshrq, vshrq): New.
20953 * config/arm/arm-mve-builtins-base.def (vrshrq, vshrq): New.
20954 * config/arm/arm-mve-builtins-base.h (vrshrq, vshrq): New.
20955 * config/arm/arm_mve.h (vshrq): Remove.
20957 (vrshrq_m): Remove.
20959 (vrshrq_x): Remove.
20961 (vshrq_n_s8): Remove.
20962 (vshrq_n_s16): Remove.
20963 (vshrq_n_s32): Remove.
20964 (vshrq_n_u8): Remove.
20965 (vshrq_n_u16): Remove.
20966 (vshrq_n_u32): Remove.
20967 (vrshrq_n_u8): Remove.
20968 (vrshrq_n_s8): Remove.
20969 (vrshrq_n_u16): Remove.
20970 (vrshrq_n_s16): Remove.
20971 (vrshrq_n_u32): Remove.
20972 (vrshrq_n_s32): Remove.
20973 (vrshrq_m_n_s8): Remove.
20974 (vrshrq_m_n_s32): Remove.
20975 (vrshrq_m_n_s16): Remove.
20976 (vrshrq_m_n_u8): Remove.
20977 (vrshrq_m_n_u32): Remove.
20978 (vrshrq_m_n_u16): Remove.
20979 (vshrq_m_n_s8): Remove.
20980 (vshrq_m_n_s32): Remove.
20981 (vshrq_m_n_s16): Remove.
20982 (vshrq_m_n_u8): Remove.
20983 (vshrq_m_n_u32): Remove.
20984 (vshrq_m_n_u16): Remove.
20985 (vrshrq_x_n_s8): Remove.
20986 (vrshrq_x_n_s16): Remove.
20987 (vrshrq_x_n_s32): Remove.
20988 (vrshrq_x_n_u8): Remove.
20989 (vrshrq_x_n_u16): Remove.
20990 (vrshrq_x_n_u32): Remove.
20991 (vshrq_x_n_s8): Remove.
20992 (vshrq_x_n_s16): Remove.
20993 (vshrq_x_n_s32): Remove.
20994 (vshrq_x_n_u8): Remove.
20995 (vshrq_x_n_u16): Remove.
20996 (vshrq_x_n_u32): Remove.
20997 (__arm_vshrq_n_s8): Remove.
20998 (__arm_vshrq_n_s16): Remove.
20999 (__arm_vshrq_n_s32): Remove.
21000 (__arm_vshrq_n_u8): Remove.
21001 (__arm_vshrq_n_u16): Remove.
21002 (__arm_vshrq_n_u32): Remove.
21003 (__arm_vrshrq_n_u8): Remove.
21004 (__arm_vrshrq_n_s8): Remove.
21005 (__arm_vrshrq_n_u16): Remove.
21006 (__arm_vrshrq_n_s16): Remove.
21007 (__arm_vrshrq_n_u32): Remove.
21008 (__arm_vrshrq_n_s32): Remove.
21009 (__arm_vrshrq_m_n_s8): Remove.
21010 (__arm_vrshrq_m_n_s32): Remove.
21011 (__arm_vrshrq_m_n_s16): Remove.
21012 (__arm_vrshrq_m_n_u8): Remove.
21013 (__arm_vrshrq_m_n_u32): Remove.
21014 (__arm_vrshrq_m_n_u16): Remove.
21015 (__arm_vshrq_m_n_s8): Remove.
21016 (__arm_vshrq_m_n_s32): Remove.
21017 (__arm_vshrq_m_n_s16): Remove.
21018 (__arm_vshrq_m_n_u8): Remove.
21019 (__arm_vshrq_m_n_u32): Remove.
21020 (__arm_vshrq_m_n_u16): Remove.
21021 (__arm_vrshrq_x_n_s8): Remove.
21022 (__arm_vrshrq_x_n_s16): Remove.
21023 (__arm_vrshrq_x_n_s32): Remove.
21024 (__arm_vrshrq_x_n_u8): Remove.
21025 (__arm_vrshrq_x_n_u16): Remove.
21026 (__arm_vrshrq_x_n_u32): Remove.
21027 (__arm_vshrq_x_n_s8): Remove.
21028 (__arm_vshrq_x_n_s16): Remove.
21029 (__arm_vshrq_x_n_s32): Remove.
21030 (__arm_vshrq_x_n_u8): Remove.
21031 (__arm_vshrq_x_n_u16): Remove.
21032 (__arm_vshrq_x_n_u32): Remove.
21033 (__arm_vshrq): Remove.
21034 (__arm_vrshrq): Remove.
21035 (__arm_vrshrq_m): Remove.
21036 (__arm_vshrq_m): Remove.
21037 (__arm_vrshrq_x): Remove.
21038 (__arm_vshrq_x): Remove.
21040 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21042 * config/arm/iterators.md (MVE_VSHRQ_M_N, MVE_VSHRQ_N): New.
21043 (mve_insn): Add vrshr, vshr.
21044 * config/arm/mve.md (mve_vshrq_n_<supf><mode>)
21045 (mve_vrshrq_n_<supf><mode>): Merge into ...
21046 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
21047 (mve_vrshrq_m_n_<supf><mode>, mve_vshrq_m_n_<supf><mode>): Merge
21049 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
21051 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21053 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift): New.
21054 * config/arm/arm-mve-builtins-shapes.h (binary_rshift): New.
21056 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21058 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_U_F): New.
21059 (vqshrunbq, vqshruntq, vqrshrunbq, vqrshruntq): New.
21060 * config/arm/arm-mve-builtins-base.def (vqshrunbq, vqshruntq)
21061 (vqrshrunbq, vqrshruntq): New.
21062 * config/arm/arm-mve-builtins-base.h (vqshrunbq, vqshruntq)
21063 (vqrshrunbq, vqrshruntq): New.
21064 * config/arm/arm-mve-builtins.cc
21065 (function_instance::has_inactive_argument): Handle vqshrunbq,
21066 vqshruntq, vqrshrunbq, vqrshruntq.
21067 * config/arm/arm_mve.h (vqrshrunbq): Remove.
21068 (vqrshruntq): Remove.
21069 (vqrshrunbq_m): Remove.
21070 (vqrshruntq_m): Remove.
21071 (vqrshrunbq_n_s16): Remove.
21072 (vqrshrunbq_n_s32): Remove.
21073 (vqrshruntq_n_s16): Remove.
21074 (vqrshruntq_n_s32): Remove.
21075 (vqrshrunbq_m_n_s32): Remove.
21076 (vqrshrunbq_m_n_s16): Remove.
21077 (vqrshruntq_m_n_s32): Remove.
21078 (vqrshruntq_m_n_s16): Remove.
21079 (__arm_vqrshrunbq_n_s16): Remove.
21080 (__arm_vqrshrunbq_n_s32): Remove.
21081 (__arm_vqrshruntq_n_s16): Remove.
21082 (__arm_vqrshruntq_n_s32): Remove.
21083 (__arm_vqrshrunbq_m_n_s32): Remove.
21084 (__arm_vqrshrunbq_m_n_s16): Remove.
21085 (__arm_vqrshruntq_m_n_s32): Remove.
21086 (__arm_vqrshruntq_m_n_s16): Remove.
21087 (__arm_vqrshrunbq): Remove.
21088 (__arm_vqrshruntq): Remove.
21089 (__arm_vqrshrunbq_m): Remove.
21090 (__arm_vqrshruntq_m): Remove.
21091 (vqshrunbq): Remove.
21092 (vqshruntq): Remove.
21093 (vqshrunbq_m): Remove.
21094 (vqshruntq_m): Remove.
21095 (vqshrunbq_n_s16): Remove.
21096 (vqshruntq_n_s16): Remove.
21097 (vqshrunbq_n_s32): Remove.
21098 (vqshruntq_n_s32): Remove.
21099 (vqshrunbq_m_n_s32): Remove.
21100 (vqshrunbq_m_n_s16): Remove.
21101 (vqshruntq_m_n_s32): Remove.
21102 (vqshruntq_m_n_s16): Remove.
21103 (__arm_vqshrunbq_n_s16): Remove.
21104 (__arm_vqshruntq_n_s16): Remove.
21105 (__arm_vqshrunbq_n_s32): Remove.
21106 (__arm_vqshruntq_n_s32): Remove.
21107 (__arm_vqshrunbq_m_n_s32): Remove.
21108 (__arm_vqshrunbq_m_n_s16): Remove.
21109 (__arm_vqshruntq_m_n_s32): Remove.
21110 (__arm_vqshruntq_m_n_s16): Remove.
21111 (__arm_vqshrunbq): Remove.
21112 (__arm_vqshruntq): Remove.
21113 (__arm_vqshrunbq_m): Remove.
21114 (__arm_vqshruntq_m): Remove.
21116 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21118 * config/arm/iterators.md (MVE_SHRN_N): Add VQRSHRUNBQ,
21119 VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
21120 (MVE_SHRN_M_N): Likewise.
21121 (mve_insn): Add vqrshrunb, vqrshrunt, vqshrunb, vqshrunt.
21122 (isu): Add VQRSHRUNBQ, VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
21124 * config/arm/mve.md (mve_vqrshrunbq_n_s<mode>): Remove.
21125 (mve_vqrshruntq_n_s<mode>): Remove.
21126 (mve_vqshrunbq_n_s<mode>): Remove.
21127 (mve_vqshruntq_n_s<mode>): Remove.
21128 (mve_vqrshrunbq_m_n_s<mode>): Remove.
21129 (mve_vqrshruntq_m_n_s<mode>): Remove.
21130 (mve_vqshrunbq_m_n_s<mode>): Remove.
21131 (mve_vqshruntq_m_n_s<mode>): Remove.
21133 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21135 * config/arm/arm-mve-builtins-shapes.cc
21136 (binary_rshift_narrow_unsigned): New.
21137 * config/arm/arm-mve-builtins-shapes.h
21138 (binary_rshift_narrow_unsigned): New.
21140 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21142 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_F): New.
21143 (vshrnbq, vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq)
21144 (vqrshrnbq, vqrshrntq): New.
21145 * config/arm/arm-mve-builtins-base.def (vshrnbq, vshrntq)
21146 (vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq):
21148 * config/arm/arm-mve-builtins-base.h (vshrnbq, vshrntq, vrshrnbq)
21149 (vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq): New.
21150 * config/arm/arm-mve-builtins.cc
21151 (function_instance::has_inactive_argument): Handle vshrnbq,
21152 vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq,
21154 * config/arm/arm_mve.h (vshrnbq): Remove.
21156 (vshrnbq_m): Remove.
21157 (vshrntq_m): Remove.
21158 (vshrnbq_n_s16): Remove.
21159 (vshrntq_n_s16): Remove.
21160 (vshrnbq_n_u16): Remove.
21161 (vshrntq_n_u16): Remove.
21162 (vshrnbq_n_s32): Remove.
21163 (vshrntq_n_s32): Remove.
21164 (vshrnbq_n_u32): Remove.
21165 (vshrntq_n_u32): Remove.
21166 (vshrnbq_m_n_s32): Remove.
21167 (vshrnbq_m_n_s16): Remove.
21168 (vshrnbq_m_n_u32): Remove.
21169 (vshrnbq_m_n_u16): Remove.
21170 (vshrntq_m_n_s32): Remove.
21171 (vshrntq_m_n_s16): Remove.
21172 (vshrntq_m_n_u32): Remove.
21173 (vshrntq_m_n_u16): Remove.
21174 (__arm_vshrnbq_n_s16): Remove.
21175 (__arm_vshrntq_n_s16): Remove.
21176 (__arm_vshrnbq_n_u16): Remove.
21177 (__arm_vshrntq_n_u16): Remove.
21178 (__arm_vshrnbq_n_s32): Remove.
21179 (__arm_vshrntq_n_s32): Remove.
21180 (__arm_vshrnbq_n_u32): Remove.
21181 (__arm_vshrntq_n_u32): Remove.
21182 (__arm_vshrnbq_m_n_s32): Remove.
21183 (__arm_vshrnbq_m_n_s16): Remove.
21184 (__arm_vshrnbq_m_n_u32): Remove.
21185 (__arm_vshrnbq_m_n_u16): Remove.
21186 (__arm_vshrntq_m_n_s32): Remove.
21187 (__arm_vshrntq_m_n_s16): Remove.
21188 (__arm_vshrntq_m_n_u32): Remove.
21189 (__arm_vshrntq_m_n_u16): Remove.
21190 (__arm_vshrnbq): Remove.
21191 (__arm_vshrntq): Remove.
21192 (__arm_vshrnbq_m): Remove.
21193 (__arm_vshrntq_m): Remove.
21194 (vrshrnbq): Remove.
21195 (vrshrntq): Remove.
21196 (vrshrnbq_m): Remove.
21197 (vrshrntq_m): Remove.
21198 (vrshrnbq_n_s16): Remove.
21199 (vrshrntq_n_s16): Remove.
21200 (vrshrnbq_n_u16): Remove.
21201 (vrshrntq_n_u16): Remove.
21202 (vrshrnbq_n_s32): Remove.
21203 (vrshrntq_n_s32): Remove.
21204 (vrshrnbq_n_u32): Remove.
21205 (vrshrntq_n_u32): Remove.
21206 (vrshrnbq_m_n_s32): Remove.
21207 (vrshrnbq_m_n_s16): Remove.
21208 (vrshrnbq_m_n_u32): Remove.
21209 (vrshrnbq_m_n_u16): Remove.
21210 (vrshrntq_m_n_s32): Remove.
21211 (vrshrntq_m_n_s16): Remove.
21212 (vrshrntq_m_n_u32): Remove.
21213 (vrshrntq_m_n_u16): Remove.
21214 (__arm_vrshrnbq_n_s16): Remove.
21215 (__arm_vrshrntq_n_s16): Remove.
21216 (__arm_vrshrnbq_n_u16): Remove.
21217 (__arm_vrshrntq_n_u16): Remove.
21218 (__arm_vrshrnbq_n_s32): Remove.
21219 (__arm_vrshrntq_n_s32): Remove.
21220 (__arm_vrshrnbq_n_u32): Remove.
21221 (__arm_vrshrntq_n_u32): Remove.
21222 (__arm_vrshrnbq_m_n_s32): Remove.
21223 (__arm_vrshrnbq_m_n_s16): Remove.
21224 (__arm_vrshrnbq_m_n_u32): Remove.
21225 (__arm_vrshrnbq_m_n_u16): Remove.
21226 (__arm_vrshrntq_m_n_s32): Remove.
21227 (__arm_vrshrntq_m_n_s16): Remove.
21228 (__arm_vrshrntq_m_n_u32): Remove.
21229 (__arm_vrshrntq_m_n_u16): Remove.
21230 (__arm_vrshrnbq): Remove.
21231 (__arm_vrshrntq): Remove.
21232 (__arm_vrshrnbq_m): Remove.
21233 (__arm_vrshrntq_m): Remove.
21234 (vqshrnbq): Remove.
21235 (vqshrntq): Remove.
21236 (vqshrnbq_m): Remove.
21237 (vqshrntq_m): Remove.
21238 (vqshrnbq_n_s16): Remove.
21239 (vqshrntq_n_s16): Remove.
21240 (vqshrnbq_n_u16): Remove.
21241 (vqshrntq_n_u16): Remove.
21242 (vqshrnbq_n_s32): Remove.
21243 (vqshrntq_n_s32): Remove.
21244 (vqshrnbq_n_u32): Remove.
21245 (vqshrntq_n_u32): Remove.
21246 (vqshrnbq_m_n_s32): Remove.
21247 (vqshrnbq_m_n_s16): Remove.
21248 (vqshrnbq_m_n_u32): Remove.
21249 (vqshrnbq_m_n_u16): Remove.
21250 (vqshrntq_m_n_s32): Remove.
21251 (vqshrntq_m_n_s16): Remove.
21252 (vqshrntq_m_n_u32): Remove.
21253 (vqshrntq_m_n_u16): Remove.
21254 (__arm_vqshrnbq_n_s16): Remove.
21255 (__arm_vqshrntq_n_s16): Remove.
21256 (__arm_vqshrnbq_n_u16): Remove.
21257 (__arm_vqshrntq_n_u16): Remove.
21258 (__arm_vqshrnbq_n_s32): Remove.
21259 (__arm_vqshrntq_n_s32): Remove.
21260 (__arm_vqshrnbq_n_u32): Remove.
21261 (__arm_vqshrntq_n_u32): Remove.
21262 (__arm_vqshrnbq_m_n_s32): Remove.
21263 (__arm_vqshrnbq_m_n_s16): Remove.
21264 (__arm_vqshrnbq_m_n_u32): Remove.
21265 (__arm_vqshrnbq_m_n_u16): Remove.
21266 (__arm_vqshrntq_m_n_s32): Remove.
21267 (__arm_vqshrntq_m_n_s16): Remove.
21268 (__arm_vqshrntq_m_n_u32): Remove.
21269 (__arm_vqshrntq_m_n_u16): Remove.
21270 (__arm_vqshrnbq): Remove.
21271 (__arm_vqshrntq): Remove.
21272 (__arm_vqshrnbq_m): Remove.
21273 (__arm_vqshrntq_m): Remove.
21274 (vqrshrnbq): Remove.
21275 (vqrshrntq): Remove.
21276 (vqrshrnbq_m): Remove.
21277 (vqrshrntq_m): Remove.
21278 (vqrshrnbq_n_s16): Remove.
21279 (vqrshrnbq_n_u16): Remove.
21280 (vqrshrnbq_n_s32): Remove.
21281 (vqrshrnbq_n_u32): Remove.
21282 (vqrshrntq_n_s16): Remove.
21283 (vqrshrntq_n_u16): Remove.
21284 (vqrshrntq_n_s32): Remove.
21285 (vqrshrntq_n_u32): Remove.
21286 (vqrshrnbq_m_n_s32): Remove.
21287 (vqrshrnbq_m_n_s16): Remove.
21288 (vqrshrnbq_m_n_u32): Remove.
21289 (vqrshrnbq_m_n_u16): Remove.
21290 (vqrshrntq_m_n_s32): Remove.
21291 (vqrshrntq_m_n_s16): Remove.
21292 (vqrshrntq_m_n_u32): Remove.
21293 (vqrshrntq_m_n_u16): Remove.
21294 (__arm_vqrshrnbq_n_s16): Remove.
21295 (__arm_vqrshrnbq_n_u16): Remove.
21296 (__arm_vqrshrnbq_n_s32): Remove.
21297 (__arm_vqrshrnbq_n_u32): Remove.
21298 (__arm_vqrshrntq_n_s16): Remove.
21299 (__arm_vqrshrntq_n_u16): Remove.
21300 (__arm_vqrshrntq_n_s32): Remove.
21301 (__arm_vqrshrntq_n_u32): Remove.
21302 (__arm_vqrshrnbq_m_n_s32): Remove.
21303 (__arm_vqrshrnbq_m_n_s16): Remove.
21304 (__arm_vqrshrnbq_m_n_u32): Remove.
21305 (__arm_vqrshrnbq_m_n_u16): Remove.
21306 (__arm_vqrshrntq_m_n_s32): Remove.
21307 (__arm_vqrshrntq_m_n_s16): Remove.
21308 (__arm_vqrshrntq_m_n_u32): Remove.
21309 (__arm_vqrshrntq_m_n_u16): Remove.
21310 (__arm_vqrshrnbq): Remove.
21311 (__arm_vqrshrntq): Remove.
21312 (__arm_vqrshrnbq_m): Remove.
21313 (__arm_vqrshrntq_m): Remove.
21315 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21317 * config/arm/iterators.md (MVE_SHRN_N, MVE_SHRN_M_N): New.
21318 (mve_insn): Add vqrshrnb, vqrshrnt, vqshrnb, vqshrnt, vrshrnb,
21319 vrshrnt, vshrnb, vshrnt.
21321 * config/arm/mve.md (mve_vqrshrnbq_n_<supf><mode>)
21322 (mve_vqrshrntq_n_<supf><mode>, mve_vqshrnbq_n_<supf><mode>)
21323 (mve_vqshrntq_n_<supf><mode>, mve_vrshrnbq_n_<supf><mode>)
21324 (mve_vrshrntq_n_<supf><mode>, mve_vshrnbq_n_<supf><mode>)
21325 (mve_vshrntq_n_<supf><mode>): Merge into ...
21326 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
21327 (mve_vqrshrnbq_m_n_<supf><mode>, mve_vqrshrntq_m_n_<supf><mode>)
21328 (mve_vqshrnbq_m_n_<supf><mode>, mve_vqshrntq_m_n_<supf><mode>)
21329 (mve_vrshrnbq_m_n_<supf><mode>, mve_vrshrntq_m_n_<supf><mode>)
21330 (mve_vshrnbq_m_n_<supf><mode>, mve_vshrntq_m_n_<supf><mode>):
21332 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
21334 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21336 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift_narrow):
21338 * config/arm/arm-mve-builtins-shapes.h (binary_rshift_narrow): New.
21340 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21342 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_NO_F): New.
21343 (vmaxq, vminq): New.
21344 * config/arm/arm-mve-builtins-base.def (vmaxq, vminq): New.
21345 * config/arm/arm-mve-builtins-base.h (vmaxq, vminq): New.
21346 * config/arm/arm_mve.h (vminq): Remove.
21352 (vminq_u8): Remove.
21353 (vmaxq_u8): Remove.
21354 (vminq_s8): Remove.
21355 (vmaxq_s8): Remove.
21356 (vminq_u16): Remove.
21357 (vmaxq_u16): Remove.
21358 (vminq_s16): Remove.
21359 (vmaxq_s16): Remove.
21360 (vminq_u32): Remove.
21361 (vmaxq_u32): Remove.
21362 (vminq_s32): Remove.
21363 (vmaxq_s32): Remove.
21364 (vmaxq_m_s8): Remove.
21365 (vmaxq_m_s32): Remove.
21366 (vmaxq_m_s16): Remove.
21367 (vmaxq_m_u8): Remove.
21368 (vmaxq_m_u32): Remove.
21369 (vmaxq_m_u16): Remove.
21370 (vminq_m_s8): Remove.
21371 (vminq_m_s32): Remove.
21372 (vminq_m_s16): Remove.
21373 (vminq_m_u8): Remove.
21374 (vminq_m_u32): Remove.
21375 (vminq_m_u16): Remove.
21376 (vminq_x_s8): Remove.
21377 (vminq_x_s16): Remove.
21378 (vminq_x_s32): Remove.
21379 (vminq_x_u8): Remove.
21380 (vminq_x_u16): Remove.
21381 (vminq_x_u32): Remove.
21382 (vmaxq_x_s8): Remove.
21383 (vmaxq_x_s16): Remove.
21384 (vmaxq_x_s32): Remove.
21385 (vmaxq_x_u8): Remove.
21386 (vmaxq_x_u16): Remove.
21387 (vmaxq_x_u32): Remove.
21388 (__arm_vminq_u8): Remove.
21389 (__arm_vmaxq_u8): Remove.
21390 (__arm_vminq_s8): Remove.
21391 (__arm_vmaxq_s8): Remove.
21392 (__arm_vminq_u16): Remove.
21393 (__arm_vmaxq_u16): Remove.
21394 (__arm_vminq_s16): Remove.
21395 (__arm_vmaxq_s16): Remove.
21396 (__arm_vminq_u32): Remove.
21397 (__arm_vmaxq_u32): Remove.
21398 (__arm_vminq_s32): Remove.
21399 (__arm_vmaxq_s32): Remove.
21400 (__arm_vmaxq_m_s8): Remove.
21401 (__arm_vmaxq_m_s32): Remove.
21402 (__arm_vmaxq_m_s16): Remove.
21403 (__arm_vmaxq_m_u8): Remove.
21404 (__arm_vmaxq_m_u32): Remove.
21405 (__arm_vmaxq_m_u16): Remove.
21406 (__arm_vminq_m_s8): Remove.
21407 (__arm_vminq_m_s32): Remove.
21408 (__arm_vminq_m_s16): Remove.
21409 (__arm_vminq_m_u8): Remove.
21410 (__arm_vminq_m_u32): Remove.
21411 (__arm_vminq_m_u16): Remove.
21412 (__arm_vminq_x_s8): Remove.
21413 (__arm_vminq_x_s16): Remove.
21414 (__arm_vminq_x_s32): Remove.
21415 (__arm_vminq_x_u8): Remove.
21416 (__arm_vminq_x_u16): Remove.
21417 (__arm_vminq_x_u32): Remove.
21418 (__arm_vmaxq_x_s8): Remove.
21419 (__arm_vmaxq_x_s16): Remove.
21420 (__arm_vmaxq_x_s32): Remove.
21421 (__arm_vmaxq_x_u8): Remove.
21422 (__arm_vmaxq_x_u16): Remove.
21423 (__arm_vmaxq_x_u32): Remove.
21424 (__arm_vminq): Remove.
21425 (__arm_vmaxq): Remove.
21426 (__arm_vmaxq_m): Remove.
21427 (__arm_vminq_m): Remove.
21428 (__arm_vminq_x): Remove.
21429 (__arm_vmaxq_x): Remove.
21431 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21433 * config/arm/iterators.md (MAX_MIN_SU): New.
21434 (max_min_su_str): New.
21435 (max_min_supf): New.
21436 * config/arm/mve.md (mve_vmaxq_s<mode>, mve_vmaxq_u<mode>)
21437 (mve_vminq_s<mode>, mve_vminq_u<mode>): Merge into ...
21438 (mve_<max_min_su_str>q_<max_min_supf><mode>): ... this.
21440 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21442 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_R): New.
21443 (vqshlq, vshlq): New.
21444 * config/arm/arm-mve-builtins-base.def (vqshlq, vshlq): New.
21445 * config/arm/arm-mve-builtins-base.h (vqshlq, vshlq): New.
21446 * config/arm/arm_mve.h (vshlq): Remove.
21449 (vshlq_m_r): Remove.
21451 (vshlq_m_n): Remove.
21453 (vshlq_x_n): Remove.
21454 (vshlq_s8): Remove.
21455 (vshlq_s16): Remove.
21456 (vshlq_s32): Remove.
21457 (vshlq_u8): Remove.
21458 (vshlq_u16): Remove.
21459 (vshlq_u32): Remove.
21460 (vshlq_r_u8): Remove.
21461 (vshlq_n_u8): Remove.
21462 (vshlq_r_s8): Remove.
21463 (vshlq_n_s8): Remove.
21464 (vshlq_r_u16): Remove.
21465 (vshlq_n_u16): Remove.
21466 (vshlq_r_s16): Remove.
21467 (vshlq_n_s16): Remove.
21468 (vshlq_r_u32): Remove.
21469 (vshlq_n_u32): Remove.
21470 (vshlq_r_s32): Remove.
21471 (vshlq_n_s32): Remove.
21472 (vshlq_m_r_u8): Remove.
21473 (vshlq_m_r_s8): Remove.
21474 (vshlq_m_r_u16): Remove.
21475 (vshlq_m_r_s16): Remove.
21476 (vshlq_m_r_u32): Remove.
21477 (vshlq_m_r_s32): Remove.
21478 (vshlq_m_u8): Remove.
21479 (vshlq_m_s8): Remove.
21480 (vshlq_m_u16): Remove.
21481 (vshlq_m_s16): Remove.
21482 (vshlq_m_u32): Remove.
21483 (vshlq_m_s32): Remove.
21484 (vshlq_m_n_s8): Remove.
21485 (vshlq_m_n_s32): Remove.
21486 (vshlq_m_n_s16): Remove.
21487 (vshlq_m_n_u8): Remove.
21488 (vshlq_m_n_u32): Remove.
21489 (vshlq_m_n_u16): Remove.
21490 (vshlq_x_s8): Remove.
21491 (vshlq_x_s16): Remove.
21492 (vshlq_x_s32): Remove.
21493 (vshlq_x_u8): Remove.
21494 (vshlq_x_u16): Remove.
21495 (vshlq_x_u32): Remove.
21496 (vshlq_x_n_s8): Remove.
21497 (vshlq_x_n_s16): Remove.
21498 (vshlq_x_n_s32): Remove.
21499 (vshlq_x_n_u8): Remove.
21500 (vshlq_x_n_u16): Remove.
21501 (vshlq_x_n_u32): Remove.
21502 (__arm_vshlq_s8): Remove.
21503 (__arm_vshlq_s16): Remove.
21504 (__arm_vshlq_s32): Remove.
21505 (__arm_vshlq_u8): Remove.
21506 (__arm_vshlq_u16): Remove.
21507 (__arm_vshlq_u32): Remove.
21508 (__arm_vshlq_r_u8): Remove.
21509 (__arm_vshlq_n_u8): Remove.
21510 (__arm_vshlq_r_s8): Remove.
21511 (__arm_vshlq_n_s8): Remove.
21512 (__arm_vshlq_r_u16): Remove.
21513 (__arm_vshlq_n_u16): Remove.
21514 (__arm_vshlq_r_s16): Remove.
21515 (__arm_vshlq_n_s16): Remove.
21516 (__arm_vshlq_r_u32): Remove.
21517 (__arm_vshlq_n_u32): Remove.
21518 (__arm_vshlq_r_s32): Remove.
21519 (__arm_vshlq_n_s32): Remove.
21520 (__arm_vshlq_m_r_u8): Remove.
21521 (__arm_vshlq_m_r_s8): Remove.
21522 (__arm_vshlq_m_r_u16): Remove.
21523 (__arm_vshlq_m_r_s16): Remove.
21524 (__arm_vshlq_m_r_u32): Remove.
21525 (__arm_vshlq_m_r_s32): Remove.
21526 (__arm_vshlq_m_u8): Remove.
21527 (__arm_vshlq_m_s8): Remove.
21528 (__arm_vshlq_m_u16): Remove.
21529 (__arm_vshlq_m_s16): Remove.
21530 (__arm_vshlq_m_u32): Remove.
21531 (__arm_vshlq_m_s32): Remove.
21532 (__arm_vshlq_m_n_s8): Remove.
21533 (__arm_vshlq_m_n_s32): Remove.
21534 (__arm_vshlq_m_n_s16): Remove.
21535 (__arm_vshlq_m_n_u8): Remove.
21536 (__arm_vshlq_m_n_u32): Remove.
21537 (__arm_vshlq_m_n_u16): Remove.
21538 (__arm_vshlq_x_s8): Remove.
21539 (__arm_vshlq_x_s16): Remove.
21540 (__arm_vshlq_x_s32): Remove.
21541 (__arm_vshlq_x_u8): Remove.
21542 (__arm_vshlq_x_u16): Remove.
21543 (__arm_vshlq_x_u32): Remove.
21544 (__arm_vshlq_x_n_s8): Remove.
21545 (__arm_vshlq_x_n_s16): Remove.
21546 (__arm_vshlq_x_n_s32): Remove.
21547 (__arm_vshlq_x_n_u8): Remove.
21548 (__arm_vshlq_x_n_u16): Remove.
21549 (__arm_vshlq_x_n_u32): Remove.
21550 (__arm_vshlq): Remove.
21551 (__arm_vshlq_r): Remove.
21552 (__arm_vshlq_n): Remove.
21553 (__arm_vshlq_m_r): Remove.
21554 (__arm_vshlq_m): Remove.
21555 (__arm_vshlq_m_n): Remove.
21556 (__arm_vshlq_x): Remove.
21557 (__arm_vshlq_x_n): Remove.
21559 (vqshlq_r): Remove.
21560 (vqshlq_n): Remove.
21561 (vqshlq_m_r): Remove.
21562 (vqshlq_m_n): Remove.
21563 (vqshlq_m): Remove.
21564 (vqshlq_u8): Remove.
21565 (vqshlq_r_u8): Remove.
21566 (vqshlq_n_u8): Remove.
21567 (vqshlq_s8): Remove.
21568 (vqshlq_r_s8): Remove.
21569 (vqshlq_n_s8): Remove.
21570 (vqshlq_u16): Remove.
21571 (vqshlq_r_u16): Remove.
21572 (vqshlq_n_u16): Remove.
21573 (vqshlq_s16): Remove.
21574 (vqshlq_r_s16): Remove.
21575 (vqshlq_n_s16): Remove.
21576 (vqshlq_u32): Remove.
21577 (vqshlq_r_u32): Remove.
21578 (vqshlq_n_u32): Remove.
21579 (vqshlq_s32): Remove.
21580 (vqshlq_r_s32): Remove.
21581 (vqshlq_n_s32): Remove.
21582 (vqshlq_m_r_u8): Remove.
21583 (vqshlq_m_r_s8): Remove.
21584 (vqshlq_m_r_u16): Remove.
21585 (vqshlq_m_r_s16): Remove.
21586 (vqshlq_m_r_u32): Remove.
21587 (vqshlq_m_r_s32): Remove.
21588 (vqshlq_m_n_s8): Remove.
21589 (vqshlq_m_n_s32): Remove.
21590 (vqshlq_m_n_s16): Remove.
21591 (vqshlq_m_n_u8): Remove.
21592 (vqshlq_m_n_u32): Remove.
21593 (vqshlq_m_n_u16): Remove.
21594 (vqshlq_m_s8): Remove.
21595 (vqshlq_m_s32): Remove.
21596 (vqshlq_m_s16): Remove.
21597 (vqshlq_m_u8): Remove.
21598 (vqshlq_m_u32): Remove.
21599 (vqshlq_m_u16): Remove.
21600 (__arm_vqshlq_u8): Remove.
21601 (__arm_vqshlq_r_u8): Remove.
21602 (__arm_vqshlq_n_u8): Remove.
21603 (__arm_vqshlq_s8): Remove.
21604 (__arm_vqshlq_r_s8): Remove.
21605 (__arm_vqshlq_n_s8): Remove.
21606 (__arm_vqshlq_u16): Remove.
21607 (__arm_vqshlq_r_u16): Remove.
21608 (__arm_vqshlq_n_u16): Remove.
21609 (__arm_vqshlq_s16): Remove.
21610 (__arm_vqshlq_r_s16): Remove.
21611 (__arm_vqshlq_n_s16): Remove.
21612 (__arm_vqshlq_u32): Remove.
21613 (__arm_vqshlq_r_u32): Remove.
21614 (__arm_vqshlq_n_u32): Remove.
21615 (__arm_vqshlq_s32): Remove.
21616 (__arm_vqshlq_r_s32): Remove.
21617 (__arm_vqshlq_n_s32): Remove.
21618 (__arm_vqshlq_m_r_u8): Remove.
21619 (__arm_vqshlq_m_r_s8): Remove.
21620 (__arm_vqshlq_m_r_u16): Remove.
21621 (__arm_vqshlq_m_r_s16): Remove.
21622 (__arm_vqshlq_m_r_u32): Remove.
21623 (__arm_vqshlq_m_r_s32): Remove.
21624 (__arm_vqshlq_m_n_s8): Remove.
21625 (__arm_vqshlq_m_n_s32): Remove.
21626 (__arm_vqshlq_m_n_s16): Remove.
21627 (__arm_vqshlq_m_n_u8): Remove.
21628 (__arm_vqshlq_m_n_u32): Remove.
21629 (__arm_vqshlq_m_n_u16): Remove.
21630 (__arm_vqshlq_m_s8): Remove.
21631 (__arm_vqshlq_m_s32): Remove.
21632 (__arm_vqshlq_m_s16): Remove.
21633 (__arm_vqshlq_m_u8): Remove.
21634 (__arm_vqshlq_m_u32): Remove.
21635 (__arm_vqshlq_m_u16): Remove.
21636 (__arm_vqshlq): Remove.
21637 (__arm_vqshlq_r): Remove.
21638 (__arm_vqshlq_n): Remove.
21639 (__arm_vqshlq_m_r): Remove.
21640 (__arm_vqshlq_m_n): Remove.
21641 (__arm_vqshlq_m): Remove.
21643 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21645 * config/arm/arm-mve-builtins-functions.h (class
21646 unspec_mve_function_exact_insn_vshl): New.
21648 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21650 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift_r): New.
21651 * config/arm/arm-mve-builtins-shapes.h (binary_lshift_r): New.
21653 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21655 * config/arm/arm-mve-builtins.cc (has_inactive_argument)
21656 (finish_opt_n_resolution): Handle MODE_r.
21657 * config/arm/arm-mve-builtins.def (r): New mode.
21659 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21661 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift): New.
21662 * config/arm/arm-mve-builtins-shapes.h (binary_lshift): New.
21664 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21666 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N): New.
21668 * config/arm/arm-mve-builtins-base.def (vabdq): New.
21669 * config/arm/arm-mve-builtins-base.h (vabdq): New.
21670 * config/arm/arm_mve.h (vabdq): Remove.
21673 (vabdq_u8): Remove.
21674 (vabdq_s8): Remove.
21675 (vabdq_u16): Remove.
21676 (vabdq_s16): Remove.
21677 (vabdq_u32): Remove.
21678 (vabdq_s32): Remove.
21679 (vabdq_f16): Remove.
21680 (vabdq_f32): Remove.
21681 (vabdq_m_s8): Remove.
21682 (vabdq_m_s32): Remove.
21683 (vabdq_m_s16): Remove.
21684 (vabdq_m_u8): Remove.
21685 (vabdq_m_u32): Remove.
21686 (vabdq_m_u16): Remove.
21687 (vabdq_m_f32): Remove.
21688 (vabdq_m_f16): Remove.
21689 (vabdq_x_s8): Remove.
21690 (vabdq_x_s16): Remove.
21691 (vabdq_x_s32): Remove.
21692 (vabdq_x_u8): Remove.
21693 (vabdq_x_u16): Remove.
21694 (vabdq_x_u32): Remove.
21695 (vabdq_x_f16): Remove.
21696 (vabdq_x_f32): Remove.
21697 (__arm_vabdq_u8): Remove.
21698 (__arm_vabdq_s8): Remove.
21699 (__arm_vabdq_u16): Remove.
21700 (__arm_vabdq_s16): Remove.
21701 (__arm_vabdq_u32): Remove.
21702 (__arm_vabdq_s32): Remove.
21703 (__arm_vabdq_m_s8): Remove.
21704 (__arm_vabdq_m_s32): Remove.
21705 (__arm_vabdq_m_s16): Remove.
21706 (__arm_vabdq_m_u8): Remove.
21707 (__arm_vabdq_m_u32): Remove.
21708 (__arm_vabdq_m_u16): Remove.
21709 (__arm_vabdq_x_s8): Remove.
21710 (__arm_vabdq_x_s16): Remove.
21711 (__arm_vabdq_x_s32): Remove.
21712 (__arm_vabdq_x_u8): Remove.
21713 (__arm_vabdq_x_u16): Remove.
21714 (__arm_vabdq_x_u32): Remove.
21715 (__arm_vabdq_f16): Remove.
21716 (__arm_vabdq_f32): Remove.
21717 (__arm_vabdq_m_f32): Remove.
21718 (__arm_vabdq_m_f16): Remove.
21719 (__arm_vabdq_x_f16): Remove.
21720 (__arm_vabdq_x_f32): Remove.
21721 (__arm_vabdq): Remove.
21722 (__arm_vabdq_m): Remove.
21723 (__arm_vabdq_x): Remove.
21725 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21727 * config/arm/iterators.md (MVE_FP_M_BINARY): Add vabdq.
21728 (MVE_FP_VABDQ_ONLY): New.
21729 (mve_insn): Add vabd.
21730 * config/arm/mve.md (mve_vabdq_f<mode>): Move into ...
21731 (@mve_<mve_insn>q_f<mode>): ... this.
21732 (mve_vabdq_m_f<mode>): Remove.
21734 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21736 * config/arm/arm-mve-builtins-base.cc (vqrdmulhq): New.
21737 * config/arm/arm-mve-builtins-base.def (vqrdmulhq): New.
21738 * config/arm/arm-mve-builtins-base.h (vqrdmulhq): New.
21739 * config/arm/arm_mve.h (vqrdmulhq): Remove.
21740 (vqrdmulhq_m): Remove.
21741 (vqrdmulhq_s8): Remove.
21742 (vqrdmulhq_n_s8): Remove.
21743 (vqrdmulhq_s16): Remove.
21744 (vqrdmulhq_n_s16): Remove.
21745 (vqrdmulhq_s32): Remove.
21746 (vqrdmulhq_n_s32): Remove.
21747 (vqrdmulhq_m_n_s8): Remove.
21748 (vqrdmulhq_m_n_s32): Remove.
21749 (vqrdmulhq_m_n_s16): Remove.
21750 (vqrdmulhq_m_s8): Remove.
21751 (vqrdmulhq_m_s32): Remove.
21752 (vqrdmulhq_m_s16): Remove.
21753 (__arm_vqrdmulhq_s8): Remove.
21754 (__arm_vqrdmulhq_n_s8): Remove.
21755 (__arm_vqrdmulhq_s16): Remove.
21756 (__arm_vqrdmulhq_n_s16): Remove.
21757 (__arm_vqrdmulhq_s32): Remove.
21758 (__arm_vqrdmulhq_n_s32): Remove.
21759 (__arm_vqrdmulhq_m_n_s8): Remove.
21760 (__arm_vqrdmulhq_m_n_s32): Remove.
21761 (__arm_vqrdmulhq_m_n_s16): Remove.
21762 (__arm_vqrdmulhq_m_s8): Remove.
21763 (__arm_vqrdmulhq_m_s32): Remove.
21764 (__arm_vqrdmulhq_m_s16): Remove.
21765 (__arm_vqrdmulhq): Remove.
21766 (__arm_vqrdmulhq_m): Remove.
21768 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21770 * config/arm/iterators.md (MVE_SHIFT_M_R, MVE_SHIFT_M_N)
21771 (MVE_SHIFT_N, MVE_SHIFT_R): New.
21772 (mve_insn): Add vqshl, vshl.
21773 * config/arm/mve.md (mve_vqshlq_n_<supf><mode>)
21774 (mve_vshlq_n_<supf><mode>): Merge into ...
21775 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
21776 (mve_vqshlq_r_<supf><mode>, mve_vshlq_r_<supf><mode>): Merge into
21778 (@mve_<mve_insn>q_r_<supf><mode>): ... this.
21779 (mve_vqshlq_m_r_<supf><mode>, mve_vshlq_m_r_<supf><mode>): Merge
21781 (@mve_<mve_insn>q_m_r_<supf><mode>): ... this.
21782 (mve_vqshlq_m_n_<supf><mode>, mve_vshlq_m_n_<supf><mode>): Merge
21784 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
21785 * config/arm/vec-common.md (mve_vshlq_<supf><mode>): Transform
21787 (@mve_<mve_insn>q_<supf><mode>): ... this.
21789 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21791 * config/arm/arm-mve-builtins-base.cc (vqrshlq, vrshlq): New.
21792 * config/arm/arm-mve-builtins-base.def (vqrshlq, vrshlq): New.
21793 * config/arm/arm-mve-builtins-base.h (vqrshlq, vrshlq): New.
21794 * config/arm/arm-mve-builtins.cc (has_inactive_argument): Handle
21796 * config/arm/arm_mve.h (vrshlq): Remove.
21797 (vrshlq_m_n): Remove.
21798 (vrshlq_m): Remove.
21799 (vrshlq_x): Remove.
21800 (vrshlq_u8): Remove.
21801 (vrshlq_n_u8): Remove.
21802 (vrshlq_s8): Remove.
21803 (vrshlq_n_s8): Remove.
21804 (vrshlq_u16): Remove.
21805 (vrshlq_n_u16): Remove.
21806 (vrshlq_s16): Remove.
21807 (vrshlq_n_s16): Remove.
21808 (vrshlq_u32): Remove.
21809 (vrshlq_n_u32): Remove.
21810 (vrshlq_s32): Remove.
21811 (vrshlq_n_s32): Remove.
21812 (vrshlq_m_n_u8): Remove.
21813 (vrshlq_m_n_s8): Remove.
21814 (vrshlq_m_n_u16): Remove.
21815 (vrshlq_m_n_s16): Remove.
21816 (vrshlq_m_n_u32): Remove.
21817 (vrshlq_m_n_s32): Remove.
21818 (vrshlq_m_s8): Remove.
21819 (vrshlq_m_s32): Remove.
21820 (vrshlq_m_s16): Remove.
21821 (vrshlq_m_u8): Remove.
21822 (vrshlq_m_u32): Remove.
21823 (vrshlq_m_u16): Remove.
21824 (vrshlq_x_s8): Remove.
21825 (vrshlq_x_s16): Remove.
21826 (vrshlq_x_s32): Remove.
21827 (vrshlq_x_u8): Remove.
21828 (vrshlq_x_u16): Remove.
21829 (vrshlq_x_u32): Remove.
21830 (__arm_vrshlq_u8): Remove.
21831 (__arm_vrshlq_n_u8): Remove.
21832 (__arm_vrshlq_s8): Remove.
21833 (__arm_vrshlq_n_s8): Remove.
21834 (__arm_vrshlq_u16): Remove.
21835 (__arm_vrshlq_n_u16): Remove.
21836 (__arm_vrshlq_s16): Remove.
21837 (__arm_vrshlq_n_s16): Remove.
21838 (__arm_vrshlq_u32): Remove.
21839 (__arm_vrshlq_n_u32): Remove.
21840 (__arm_vrshlq_s32): Remove.
21841 (__arm_vrshlq_n_s32): Remove.
21842 (__arm_vrshlq_m_n_u8): Remove.
21843 (__arm_vrshlq_m_n_s8): Remove.
21844 (__arm_vrshlq_m_n_u16): Remove.
21845 (__arm_vrshlq_m_n_s16): Remove.
21846 (__arm_vrshlq_m_n_u32): Remove.
21847 (__arm_vrshlq_m_n_s32): Remove.
21848 (__arm_vrshlq_m_s8): Remove.
21849 (__arm_vrshlq_m_s32): Remove.
21850 (__arm_vrshlq_m_s16): Remove.
21851 (__arm_vrshlq_m_u8): Remove.
21852 (__arm_vrshlq_m_u32): Remove.
21853 (__arm_vrshlq_m_u16): Remove.
21854 (__arm_vrshlq_x_s8): Remove.
21855 (__arm_vrshlq_x_s16): Remove.
21856 (__arm_vrshlq_x_s32): Remove.
21857 (__arm_vrshlq_x_u8): Remove.
21858 (__arm_vrshlq_x_u16): Remove.
21859 (__arm_vrshlq_x_u32): Remove.
21860 (__arm_vrshlq): Remove.
21861 (__arm_vrshlq_m_n): Remove.
21862 (__arm_vrshlq_m): Remove.
21863 (__arm_vrshlq_x): Remove.
21865 (vqrshlq_m_n): Remove.
21866 (vqrshlq_m): Remove.
21867 (vqrshlq_u8): Remove.
21868 (vqrshlq_n_u8): Remove.
21869 (vqrshlq_s8): Remove.
21870 (vqrshlq_n_s8): Remove.
21871 (vqrshlq_u16): Remove.
21872 (vqrshlq_n_u16): Remove.
21873 (vqrshlq_s16): Remove.
21874 (vqrshlq_n_s16): Remove.
21875 (vqrshlq_u32): Remove.
21876 (vqrshlq_n_u32): Remove.
21877 (vqrshlq_s32): Remove.
21878 (vqrshlq_n_s32): Remove.
21879 (vqrshlq_m_n_u8): Remove.
21880 (vqrshlq_m_n_s8): Remove.
21881 (vqrshlq_m_n_u16): Remove.
21882 (vqrshlq_m_n_s16): Remove.
21883 (vqrshlq_m_n_u32): Remove.
21884 (vqrshlq_m_n_s32): Remove.
21885 (vqrshlq_m_s8): Remove.
21886 (vqrshlq_m_s32): Remove.
21887 (vqrshlq_m_s16): Remove.
21888 (vqrshlq_m_u8): Remove.
21889 (vqrshlq_m_u32): Remove.
21890 (vqrshlq_m_u16): Remove.
21891 (__arm_vqrshlq_u8): Remove.
21892 (__arm_vqrshlq_n_u8): Remove.
21893 (__arm_vqrshlq_s8): Remove.
21894 (__arm_vqrshlq_n_s8): Remove.
21895 (__arm_vqrshlq_u16): Remove.
21896 (__arm_vqrshlq_n_u16): Remove.
21897 (__arm_vqrshlq_s16): Remove.
21898 (__arm_vqrshlq_n_s16): Remove.
21899 (__arm_vqrshlq_u32): Remove.
21900 (__arm_vqrshlq_n_u32): Remove.
21901 (__arm_vqrshlq_s32): Remove.
21902 (__arm_vqrshlq_n_s32): Remove.
21903 (__arm_vqrshlq_m_n_u8): Remove.
21904 (__arm_vqrshlq_m_n_s8): Remove.
21905 (__arm_vqrshlq_m_n_u16): Remove.
21906 (__arm_vqrshlq_m_n_s16): Remove.
21907 (__arm_vqrshlq_m_n_u32): Remove.
21908 (__arm_vqrshlq_m_n_s32): Remove.
21909 (__arm_vqrshlq_m_s8): Remove.
21910 (__arm_vqrshlq_m_s32): Remove.
21911 (__arm_vqrshlq_m_s16): Remove.
21912 (__arm_vqrshlq_m_u8): Remove.
21913 (__arm_vqrshlq_m_u32): Remove.
21914 (__arm_vqrshlq_m_u16): Remove.
21915 (__arm_vqrshlq): Remove.
21916 (__arm_vqrshlq_m_n): Remove.
21917 (__arm_vqrshlq_m): Remove.
21919 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21921 * config/arm/iterators.md (MVE_RSHIFT_M_N, MVE_RSHIFT_N): New.
21922 (mve_insn): Add vqrshl, vrshl.
21923 * config/arm/mve.md (mve_vqrshlq_n_<supf><mode>)
21924 (mve_vrshlq_n_<supf><mode>): Merge into ...
21925 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
21926 (mve_vqrshlq_m_n_<supf><mode>, mve_vrshlq_m_n_<supf><mode>): Merge
21928 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
21930 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
21932 * config/arm/arm-mve-builtins-shapes.cc (binary_round_lshift): New.
21933 * config/arm/arm-mve-builtins-shapes.h (binary_round_lshift): New.
21935 2023-05-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21938 * config/riscv/riscv-vsetvl.cc (avl_info::multiple_source_equal_p): Add
21939 denegrate PHI optmization.
21941 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
21943 * config/i386/predicates.md (register_no_SP_operand):
21944 Rename from index_register_operand.
21945 (call_register_operand): Update for rename.
21946 * config/i386/i386.md (*lea<mode>_general_[1234]): Update for rename.
21948 2023-05-05 Tamar Christina <tamar.christina@arm.com>
21951 * Makefile.in (NUM_MATCH_SPLITS, MATCH_SPLITS_SEQ,
21952 GIMPLE_MATCH_PD_SEQ_SRC, GIMPLE_MATCH_PD_SEQ_O,
21953 GENERIC_MATCH_PD_SEQ_SRC, GENERIC_MATCH_PD_SEQ_O): New.
21954 (OBJS, MOSTLYCLEANFILES, .PRECIOUS): Use them.
21955 (s-match): Split into s-generic-match and s-gimple-match.
21956 * configure.ac (with-matchpd-partitions,
21957 DEFAULT_MATCHPD_PARTITIONS): New.
21958 * configure: Regenerate.
21960 2023-05-05 Tamar Christina <tamar.christina@arm.com>
21963 * genmatch.cc (emit_func, SIZED_BASED_CHUNKS, get_out_file): New.
21964 (decision_tree::gen): Accept list of files instead of single and update
21965 to write function definition to header and main file.
21966 (write_predicate): Likewise.
21967 (write_header): Emit pragmas and new includes.
21968 (main): Create file buffers and cleanup.
21969 (showUsage, write_header_includes): New.
21971 2023-05-05 Tamar Christina <tamar.christina@arm.com>
21974 * Makefile.in (OBJS): Add gimple-match-exports.o.
21975 * genmatch.cc (decision_tree::gen): Export gimple_gimplify helpers.
21976 * gimple-match-head.cc (gimple_simplify, gimple_resimplify1,
21977 gimple_resimplify2, gimple_resimplify3, gimple_resimplify4,
21978 gimple_resimplify5, constant_for_folding, convert_conditional_op,
21979 maybe_resimplify_conditional_op, gimple_match_op::resimplify,
21980 maybe_build_generic_op, build_call_internal, maybe_push_res_to_seq,
21981 do_valueize, try_conditional_simplification, gimple_extract,
21982 gimple_extract_op, canonicalize_code, commutative_binary_op_p,
21983 commutative_ternary_op_p, first_commutative_argument,
21984 associative_binary_op_p, directly_supported_p,
21985 get_conditional_internal_fn): Moved to gimple-match-exports.cc
21986 * gimple-match-exports.cc: New file.
21988 2023-05-05 Tamar Christina <tamar.christina@arm.com>
21991 * genmatch.cc (decision_tree::gen, write_predicate): Generate new
21993 (dt_simplify::gen_1): Use it.
21995 2023-05-05 Tamar Christina <tamar.christina@arm.com>
21998 * genmatch.cc (output_line_directive): Only emit commented directive
22001 2023-05-05 Tamar Christina <tamar.christina@arm.com>
22004 * genmatch.cc (dt_simplify::gen_1): Only emit labels if used.
22006 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
22008 * config/gcn/gcn.cc (gcn_vectorize_builtin_vectorized_function): Remove
22009 unused in_mode/in_n variables.
22011 2023-05-05 Richard Biener <rguenther@suse.de>
22013 PR tree-optimization/109735
22014 * tree-vect-stmts.cc (vectorizable_operation): Perform
22015 conversion for POINTER_DIFF_EXPR unconditionally.
22017 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
22019 * config/i386/mmx.md (mulv2si3): New expander.
22020 (*mulv2si3): New insn pattern.
22022 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
22023 Thomas Schwinge <thomas@codesourcery.com>
22026 * config/nvptx/mkoffload.cc (process): Emit dummy procedure
22027 alongside reverse-offload function table to prevent NULL values
22028 of the function addresses.
22030 2023-05-05 Jakub Jelinek <jakub@redhat.com>
22032 * builtins.cc (do_mpfr_ckconv, do_mpc_ckconv): Fix comment typo,
22034 * fold-const-call.cc (do_mpfr_ckconv, do_mpc_ckconv): Likewise.
22036 2023-05-05 Andrew Pinski <apinski@marvell.com>
22038 PR tree-optimization/109732
22039 * tree-ssa-phiopt.cc (match_simplify_replacement): Fix the selection
22040 of the argtrue/argfalse.
22042 2023-05-05 Andrew Pinski <apinski@marvell.com>
22044 PR tree-optimization/109722
22045 * match.pd: Extend the `ABS<a> == 0` pattern
22046 to cover `ABSU<a> == 0` too.
22048 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
22051 * config/i386/predicates.md (index_reg_operand): New predicate.
22052 * config/i386/i386.md (ashift to lea spliter): Use
22053 general_reg_operand and index_reg_operand predicates.
22055 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22057 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn2<mode>_insn_le):
22058 Rename and reimplement with RTL codes to...
22059 (aarch64_<optab>hn2<mode>_insn_le): .. This.
22060 (aarch64_r<optab>hn2<mode>_insn_le): New pattern.
22061 (aarch64_<sur><addsub>hn2<mode>_insn_be): Rename and reimplement with RTL
22063 (aarch64_<optab>hn2<mode>_insn_be): ... This.
22064 (aarch64_r<optab>hn2<mode>_insn_be): New pattern.
22065 (aarch64_<sur><addsub>hn2<mode>): Rename and adjust expander to...
22066 (aarch64_<optab>hn2<mode>): ... This.
22067 (aarch64_r<optab>hn2<mode>): New expander.
22068 * config/aarch64/iterators.md (UNSPEC_ADDHN, UNSPEC_RADDHN,
22069 UNSPEC_SUBHN, UNSPEC_RSUBHN): Delete unspecs.
22070 (ADDSUBHN): Delete.
22071 (sur): Remove handling of the above.
22072 (addsub): Likewise.
22074 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22076 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn<mode>_insn_le):
22078 (aarch64_<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
22079 (aarch64_<sur><addsub>hn<mode>_insn_be): Delete.
22080 (aarch64_r<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
22081 (aarch64_<sur><addsub>hn<mode>): Delete.
22082 (aarch64_<optab>hn<mode>): New define_expand.
22083 (aarch64_r<optab>hn<mode>): Likewise.
22084 * config/aarch64/predicates.md (aarch64_simd_raddsubhn_imm_vec):
22087 2023-05-04 Andrew Pinski <apinski@marvell.com>
22089 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Handle
22090 diamond form bb with forwarder only empty blocks better.
22092 2023-05-04 Andrew Pinski <apinski@marvell.com>
22094 * tree-ssa-threadupdate.cc (copy_phi_arg_into_existing_phi): Move to ...
22095 * tree-cfg.cc (copy_phi_arg_into_existing_phi): Here and remove static.
22096 (gimple_duplicate_sese_tail): Use copy_phi_arg_into_existing_phi instead
22097 of an inline version of it.
22098 * tree-cfgcleanup.cc (remove_forwarder_block): Likewise.
22099 * tree-cfg.h (copy_phi_arg_into_existing_phi): New declaration.
22101 2023-05-04 Andrew Pinski <apinski@marvell.com>
22103 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Change
22104 the default argument value for dce_ssa_names to nullptr.
22105 Check to make sure dce_ssa_names is a non-nullptr before
22106 calling simple_dce_from_worklist.
22108 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
22110 * config/i386/predicates.md (index_register_operand): Reject
22111 arg_pointer_rtx, frame_pointer_rtx, stack_pointer_rtx and
22112 VIRTUAL_REGISTER_P operands. Allow subregs of memory before reload.
22113 (call_register_no_elim_operand): Rewrite as ...
22114 (call_register_operand): ... this.
22115 (call_insn_operand): Use call_register_operand predicate.
22117 2023-05-04 Richard Biener <rguenther@suse.de>
22119 PR tree-optimization/109721
22120 * tree-vect-stmts.cc (vectorizable_operation): Make sure
22121 to test word_mode for all !target_support_p operations.
22123 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22126 * config/aarch64/aarch64-simd.md (aarch64_<su>aba<mode>): Rename to...
22127 (aarch64_<su>aba<mode><vczle><vczbe>): ... This.
22128 (aarch64_mla<mode>): Rename to...
22129 (aarch64_mla<mode><vczle><vczbe>): ... This.
22130 (*aarch64_mla_elt<mode>): Rename to...
22131 (*aarch64_mla_elt<mode><vczle><vczbe>): ... This.
22132 (*aarch64_mla_elt_<vswap_width_name><mode>): Rename to...
22133 (*aarch64_mla_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
22134 (aarch64_mla_n<mode>): Rename to...
22135 (aarch64_mla_n<mode><vczle><vczbe>): ... This.
22136 (aarch64_mls<mode>): Rename to...
22137 (aarch64_mls<mode><vczle><vczbe>): ... This.
22138 (*aarch64_mls_elt<mode>): Rename to...
22139 (*aarch64_mls_elt<mode><vczle><vczbe>): ... This.
22140 (*aarch64_mls_elt_<vswap_width_name><mode>): Rename to...
22141 (*aarch64_mls_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
22142 (aarch64_mls_n<mode>): Rename to...
22143 (aarch64_mls_n<mode><vczle><vczbe>): ... This.
22144 (fma<mode>4): Rename to...
22145 (fma<mode>4<vczle><vczbe>): ... This.
22146 (*aarch64_fma4_elt<mode>): Rename to...
22147 (*aarch64_fma4_elt<mode><vczle><vczbe>): ... This.
22148 (*aarch64_fma4_elt_<vswap_width_name><mode>): Rename to...
22149 (*aarch64_fma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
22150 (*aarch64_fma4_elt_from_dup<mode>): Rename to...
22151 (*aarch64_fma4_elt_from_dup<mode><vczle><vczbe>): ... This.
22152 (fnma<mode>4): Rename to...
22153 (fnma<mode>4<vczle><vczbe>): ... This.
22154 (*aarch64_fnma4_elt<mode>): Rename to...
22155 (*aarch64_fnma4_elt<mode><vczle><vczbe>): ... This.
22156 (*aarch64_fnma4_elt_<vswap_width_name><mode>): Rename to...
22157 (*aarch64_fnma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
22158 (*aarch64_fnma4_elt_from_dup<mode>): Rename to...
22159 (*aarch64_fnma4_elt_from_dup<mode><vczle><vczbe>): ... This.
22160 (aarch64_simd_bsl<mode>_internal): Rename to...
22161 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>): ... This.
22162 (*aarch64_simd_bsl<mode>_alt): Rename to...
22163 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>): ... This.
22165 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22168 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>): Rename to...
22169 (aarch64_<su>abd<mode><vczle><vczbe>): ... This.
22170 (fabd<mode>3): Rename to...
22171 (fabd<mode>3<vczle><vczbe>): ... This.
22172 (aarch64_<optab>p<mode>): Rename to...
22173 (aarch64_<optab>p<mode><vczle><vczbe>): ... This.
22174 (aarch64_faddp<mode>): Rename to...
22175 (aarch64_faddp<mode><vczle><vczbe>): ... This.
22177 2023-05-04 Martin Liska <mliska@suse.cz>
22179 * gcov.cc (GCOV_JSON_FORMAT_VERSION): New definition.
22180 (print_version): Use it.
22181 (generate_results): Likewise.
22183 2023-05-04 Richard Biener <rguenther@suse.de>
22185 * tree-cfg.h (last_stmt): Rename to ...
22186 (last_nondebug_stmt): ... this.
22187 * tree-cfg.cc (last_stmt): Rename to ...
22188 (last_nondebug_stmt): ... this.
22189 (assign_discriminators): Adjust.
22190 (group_case_labels_stmt): Likewise.
22191 (gimple_can_duplicate_bb_p): Likewise.
22192 (execute_fixup_cfg): Likewise.
22193 * auto-profile.cc (afdo_propagate_circuit): Likewise.
22194 * gimple-range.cc (gimple_ranger::range_on_exit): Likewise.
22195 * omp-expand.cc (workshare_safe_to_combine_p): Likewise.
22196 (determine_parallel_type): Likewise.
22197 (adjust_context_and_scope): Likewise.
22198 (expand_task_call): Likewise.
22199 (remove_exit_barrier): Likewise.
22200 (expand_omp_taskreg): Likewise.
22201 (expand_omp_for_init_counts): Likewise.
22202 (expand_omp_for_init_vars): Likewise.
22203 (expand_omp_for_static_chunk): Likewise.
22204 (expand_omp_simd): Likewise.
22205 (expand_oacc_for): Likewise.
22206 (expand_omp_for): Likewise.
22207 (expand_omp_sections): Likewise.
22208 (expand_omp_atomic_fetch_op): Likewise.
22209 (expand_omp_atomic_cas): Likewise.
22210 (expand_omp_atomic): Likewise.
22211 (expand_omp_target): Likewise.
22212 (expand_omp): Likewise.
22213 (omp_make_gimple_edges): Likewise.
22214 * trans-mem.cc (tm_region_init): Likewise.
22215 * tree-inline.cc (redirect_all_calls): Likewise.
22216 * tree-parloops.cc (gen_parallel_loop): Likewise.
22217 * tree-ssa-loop-ch.cc (do_while_loop_p): Likewise.
22218 * tree-ssa-loop-ivcanon.cc (canonicalize_loop_induction_variables):
22220 * tree-ssa-loop-ivopts.cc (stmt_after_ip_normal_pos): Likewise.
22221 (may_eliminate_iv): Likewise.
22222 * tree-ssa-loop-manip.cc (standard_iv_increment_position): Likewise.
22223 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations):
22225 (estimate_numbers_of_iterations): Likewise.
22226 * tree-ssa-loop-split.cc (compute_added_num_insns): Likewise.
22227 * tree-ssa-loop-unswitch.cc (get_predicates_for_bb): Likewise.
22228 (set_predicates_for_bb): Likewise.
22229 (init_loop_unswitch_info): Likewise.
22230 (hoist_guard): Likewise.
22231 * tree-ssa-phiopt.cc (match_simplify_replacement): Likewise.
22232 (minmax_replacement): Likewise.
22233 * tree-ssa-reassoc.cc (update_range_test): Likewise.
22234 (optimize_range_tests_to_bit_test): Likewise.
22235 (optimize_range_tests_var_bound): Likewise.
22236 (optimize_range_tests): Likewise.
22237 (no_side_effect_bb): Likewise.
22238 (suitable_cond_bb): Likewise.
22239 (maybe_optimize_range_tests): Likewise.
22240 (reassociate_bb): Likewise.
22241 * tree-vrp.cc (rvrp_folder::pre_fold_bb): Likewise.
22243 2023-05-04 Jakub Jelinek <jakub@redhat.com>
22246 * config/i386/i386-features.cc (timode_scalar_chain::convert_insn):
22247 If src is REG, change its mode to V1TImode and call fix_debug_reg_uses
22248 for it only if it still has TImode. Don't decide whether to call
22249 fix_debug_reg_uses based on whether SRC is ever set or not.
22251 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
22253 * config/cris/cris.cc (cris_split_constant): New function.
22254 * config/cris/cris.md (splitop): New iterator.
22255 (opsplit1): New define_peephole2.
22256 * config/cris/cris-protos.h (cris_split_constant): Declare.
22257 (cris_splittable_constant_p): New macro.
22259 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
22261 * config/cris/cris.cc (TARGET_SPILL_CLASS): Define
22264 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
22266 * config/cris/cris.cc (cris_side_effect_mode_ok): Use
22267 lra_in_progress, not reload_in_progress.
22268 * config/cris/cris.md ("movdi", "*addi_reload"): Ditto.
22269 * config/cris/constraints.md ("Q"): Ditto.
22271 2023-05-03 Andrew Pinski <apinski@marvell.com>
22273 * tree-ssa-dce.cc (simple_dce_from_worklist): Record
22274 stats on removed number of statements and phis.
22276 2023-05-03 Aldy Hernandez <aldyh@redhat.com>
22278 PR tree-optimization/109711
22279 * value-range.cc (irange::verify_range): Allow types of
22282 2023-05-03 Alexander Monakov <amonakov@ispras.ru>
22285 * calls.cc (can_implement_as_sibling_call_p): Reject calls
22286 to __sanitizer_cov_trace_pc.
22288 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
22291 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Add
22292 a new ABI break parameter for GCC 14. Set it to the alignment
22293 of enums that have an underlying type. Take the true alignment
22294 of such enums from the TYPE_ALIGN of the underlying type's
22296 (aarch64_function_arg_boundary): Update accordingly.
22297 (aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Likewise.
22298 Warn about ABI differences.
22300 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
22303 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Rename
22304 ABI break variables to abi_break_gcc_9 and abi_break_gcc_13.
22305 (aarch64_layout_arg, aarch64_function_arg_boundary): Likewise.
22306 (aarch64_gimplify_va_arg_expr): Likewise.
22308 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
22310 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_NO_F)
22311 (FUNCTION_WITHOUT_N_NO_F, FUNCTION_WITH_M_N_NO_U_F): New.
22312 (vhaddq, vhsubq, vmulhq, vqaddq, vqsubq, vqdmulhq, vrhaddq)
22314 * config/arm/arm-mve-builtins-base.def (vhaddq, vhsubq, vmulhq)
22315 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
22316 * config/arm/arm-mve-builtins-base.h (vhaddq, vhsubq, vmulhq)
22317 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
22318 * config/arm/arm_mve.h (vhsubq): Remove.
22320 (vhaddq_m): Remove.
22321 (vhsubq_m): Remove.
22322 (vhaddq_x): Remove.
22323 (vhsubq_x): Remove.
22324 (vhsubq_u8): Remove.
22325 (vhsubq_n_u8): Remove.
22326 (vhaddq_u8): Remove.
22327 (vhaddq_n_u8): Remove.
22328 (vhsubq_s8): Remove.
22329 (vhsubq_n_s8): Remove.
22330 (vhaddq_s8): Remove.
22331 (vhaddq_n_s8): Remove.
22332 (vhsubq_u16): Remove.
22333 (vhsubq_n_u16): Remove.
22334 (vhaddq_u16): Remove.
22335 (vhaddq_n_u16): Remove.
22336 (vhsubq_s16): Remove.
22337 (vhsubq_n_s16): Remove.
22338 (vhaddq_s16): Remove.
22339 (vhaddq_n_s16): Remove.
22340 (vhsubq_u32): Remove.
22341 (vhsubq_n_u32): Remove.
22342 (vhaddq_u32): Remove.
22343 (vhaddq_n_u32): Remove.
22344 (vhsubq_s32): Remove.
22345 (vhsubq_n_s32): Remove.
22346 (vhaddq_s32): Remove.
22347 (vhaddq_n_s32): Remove.
22348 (vhaddq_m_n_s8): Remove.
22349 (vhaddq_m_n_s32): Remove.
22350 (vhaddq_m_n_s16): Remove.
22351 (vhaddq_m_n_u8): Remove.
22352 (vhaddq_m_n_u32): Remove.
22353 (vhaddq_m_n_u16): Remove.
22354 (vhaddq_m_s8): Remove.
22355 (vhaddq_m_s32): Remove.
22356 (vhaddq_m_s16): Remove.
22357 (vhaddq_m_u8): Remove.
22358 (vhaddq_m_u32): Remove.
22359 (vhaddq_m_u16): Remove.
22360 (vhsubq_m_n_s8): Remove.
22361 (vhsubq_m_n_s32): Remove.
22362 (vhsubq_m_n_s16): Remove.
22363 (vhsubq_m_n_u8): Remove.
22364 (vhsubq_m_n_u32): Remove.
22365 (vhsubq_m_n_u16): Remove.
22366 (vhsubq_m_s8): Remove.
22367 (vhsubq_m_s32): Remove.
22368 (vhsubq_m_s16): Remove.
22369 (vhsubq_m_u8): Remove.
22370 (vhsubq_m_u32): Remove.
22371 (vhsubq_m_u16): Remove.
22372 (vhaddq_x_n_s8): Remove.
22373 (vhaddq_x_n_s16): Remove.
22374 (vhaddq_x_n_s32): Remove.
22375 (vhaddq_x_n_u8): Remove.
22376 (vhaddq_x_n_u16): Remove.
22377 (vhaddq_x_n_u32): Remove.
22378 (vhaddq_x_s8): Remove.
22379 (vhaddq_x_s16): Remove.
22380 (vhaddq_x_s32): Remove.
22381 (vhaddq_x_u8): Remove.
22382 (vhaddq_x_u16): Remove.
22383 (vhaddq_x_u32): Remove.
22384 (vhsubq_x_n_s8): Remove.
22385 (vhsubq_x_n_s16): Remove.
22386 (vhsubq_x_n_s32): Remove.
22387 (vhsubq_x_n_u8): Remove.
22388 (vhsubq_x_n_u16): Remove.
22389 (vhsubq_x_n_u32): Remove.
22390 (vhsubq_x_s8): Remove.
22391 (vhsubq_x_s16): Remove.
22392 (vhsubq_x_s32): Remove.
22393 (vhsubq_x_u8): Remove.
22394 (vhsubq_x_u16): Remove.
22395 (vhsubq_x_u32): Remove.
22396 (__arm_vhsubq_u8): Remove.
22397 (__arm_vhsubq_n_u8): Remove.
22398 (__arm_vhaddq_u8): Remove.
22399 (__arm_vhaddq_n_u8): Remove.
22400 (__arm_vhsubq_s8): Remove.
22401 (__arm_vhsubq_n_s8): Remove.
22402 (__arm_vhaddq_s8): Remove.
22403 (__arm_vhaddq_n_s8): Remove.
22404 (__arm_vhsubq_u16): Remove.
22405 (__arm_vhsubq_n_u16): Remove.
22406 (__arm_vhaddq_u16): Remove.
22407 (__arm_vhaddq_n_u16): Remove.
22408 (__arm_vhsubq_s16): Remove.
22409 (__arm_vhsubq_n_s16): Remove.
22410 (__arm_vhaddq_s16): Remove.
22411 (__arm_vhaddq_n_s16): Remove.
22412 (__arm_vhsubq_u32): Remove.
22413 (__arm_vhsubq_n_u32): Remove.
22414 (__arm_vhaddq_u32): Remove.
22415 (__arm_vhaddq_n_u32): Remove.
22416 (__arm_vhsubq_s32): Remove.
22417 (__arm_vhsubq_n_s32): Remove.
22418 (__arm_vhaddq_s32): Remove.
22419 (__arm_vhaddq_n_s32): Remove.
22420 (__arm_vhaddq_m_n_s8): Remove.
22421 (__arm_vhaddq_m_n_s32): Remove.
22422 (__arm_vhaddq_m_n_s16): Remove.
22423 (__arm_vhaddq_m_n_u8): Remove.
22424 (__arm_vhaddq_m_n_u32): Remove.
22425 (__arm_vhaddq_m_n_u16): Remove.
22426 (__arm_vhaddq_m_s8): Remove.
22427 (__arm_vhaddq_m_s32): Remove.
22428 (__arm_vhaddq_m_s16): Remove.
22429 (__arm_vhaddq_m_u8): Remove.
22430 (__arm_vhaddq_m_u32): Remove.
22431 (__arm_vhaddq_m_u16): Remove.
22432 (__arm_vhsubq_m_n_s8): Remove.
22433 (__arm_vhsubq_m_n_s32): Remove.
22434 (__arm_vhsubq_m_n_s16): Remove.
22435 (__arm_vhsubq_m_n_u8): Remove.
22436 (__arm_vhsubq_m_n_u32): Remove.
22437 (__arm_vhsubq_m_n_u16): Remove.
22438 (__arm_vhsubq_m_s8): Remove.
22439 (__arm_vhsubq_m_s32): Remove.
22440 (__arm_vhsubq_m_s16): Remove.
22441 (__arm_vhsubq_m_u8): Remove.
22442 (__arm_vhsubq_m_u32): Remove.
22443 (__arm_vhsubq_m_u16): Remove.
22444 (__arm_vhaddq_x_n_s8): Remove.
22445 (__arm_vhaddq_x_n_s16): Remove.
22446 (__arm_vhaddq_x_n_s32): Remove.
22447 (__arm_vhaddq_x_n_u8): Remove.
22448 (__arm_vhaddq_x_n_u16): Remove.
22449 (__arm_vhaddq_x_n_u32): Remove.
22450 (__arm_vhaddq_x_s8): Remove.
22451 (__arm_vhaddq_x_s16): Remove.
22452 (__arm_vhaddq_x_s32): Remove.
22453 (__arm_vhaddq_x_u8): Remove.
22454 (__arm_vhaddq_x_u16): Remove.
22455 (__arm_vhaddq_x_u32): Remove.
22456 (__arm_vhsubq_x_n_s8): Remove.
22457 (__arm_vhsubq_x_n_s16): Remove.
22458 (__arm_vhsubq_x_n_s32): Remove.
22459 (__arm_vhsubq_x_n_u8): Remove.
22460 (__arm_vhsubq_x_n_u16): Remove.
22461 (__arm_vhsubq_x_n_u32): Remove.
22462 (__arm_vhsubq_x_s8): Remove.
22463 (__arm_vhsubq_x_s16): Remove.
22464 (__arm_vhsubq_x_s32): Remove.
22465 (__arm_vhsubq_x_u8): Remove.
22466 (__arm_vhsubq_x_u16): Remove.
22467 (__arm_vhsubq_x_u32): Remove.
22468 (__arm_vhsubq): Remove.
22469 (__arm_vhaddq): Remove.
22470 (__arm_vhaddq_m): Remove.
22471 (__arm_vhsubq_m): Remove.
22472 (__arm_vhaddq_x): Remove.
22473 (__arm_vhsubq_x): Remove.
22475 (vmulhq_m): Remove.
22476 (vmulhq_x): Remove.
22477 (vmulhq_u8): Remove.
22478 (vmulhq_s8): Remove.
22479 (vmulhq_u16): Remove.
22480 (vmulhq_s16): Remove.
22481 (vmulhq_u32): Remove.
22482 (vmulhq_s32): Remove.
22483 (vmulhq_m_s8): Remove.
22484 (vmulhq_m_s32): Remove.
22485 (vmulhq_m_s16): Remove.
22486 (vmulhq_m_u8): Remove.
22487 (vmulhq_m_u32): Remove.
22488 (vmulhq_m_u16): Remove.
22489 (vmulhq_x_s8): Remove.
22490 (vmulhq_x_s16): Remove.
22491 (vmulhq_x_s32): Remove.
22492 (vmulhq_x_u8): Remove.
22493 (vmulhq_x_u16): Remove.
22494 (vmulhq_x_u32): Remove.
22495 (__arm_vmulhq_u8): Remove.
22496 (__arm_vmulhq_s8): Remove.
22497 (__arm_vmulhq_u16): Remove.
22498 (__arm_vmulhq_s16): Remove.
22499 (__arm_vmulhq_u32): Remove.
22500 (__arm_vmulhq_s32): Remove.
22501 (__arm_vmulhq_m_s8): Remove.
22502 (__arm_vmulhq_m_s32): Remove.
22503 (__arm_vmulhq_m_s16): Remove.
22504 (__arm_vmulhq_m_u8): Remove.
22505 (__arm_vmulhq_m_u32): Remove.
22506 (__arm_vmulhq_m_u16): Remove.
22507 (__arm_vmulhq_x_s8): Remove.
22508 (__arm_vmulhq_x_s16): Remove.
22509 (__arm_vmulhq_x_s32): Remove.
22510 (__arm_vmulhq_x_u8): Remove.
22511 (__arm_vmulhq_x_u16): Remove.
22512 (__arm_vmulhq_x_u32): Remove.
22513 (__arm_vmulhq): Remove.
22514 (__arm_vmulhq_m): Remove.
22515 (__arm_vmulhq_x): Remove.
22518 (vqaddq_m): Remove.
22519 (vqsubq_m): Remove.
22520 (vqsubq_u8): Remove.
22521 (vqsubq_n_u8): Remove.
22522 (vqaddq_u8): Remove.
22523 (vqaddq_n_u8): Remove.
22524 (vqsubq_s8): Remove.
22525 (vqsubq_n_s8): Remove.
22526 (vqaddq_s8): Remove.
22527 (vqaddq_n_s8): Remove.
22528 (vqsubq_u16): Remove.
22529 (vqsubq_n_u16): Remove.
22530 (vqaddq_u16): Remove.
22531 (vqaddq_n_u16): Remove.
22532 (vqsubq_s16): Remove.
22533 (vqsubq_n_s16): Remove.
22534 (vqaddq_s16): Remove.
22535 (vqaddq_n_s16): Remove.
22536 (vqsubq_u32): Remove.
22537 (vqsubq_n_u32): Remove.
22538 (vqaddq_u32): Remove.
22539 (vqaddq_n_u32): Remove.
22540 (vqsubq_s32): Remove.
22541 (vqsubq_n_s32): Remove.
22542 (vqaddq_s32): Remove.
22543 (vqaddq_n_s32): Remove.
22544 (vqaddq_m_n_s8): Remove.
22545 (vqaddq_m_n_s32): Remove.
22546 (vqaddq_m_n_s16): Remove.
22547 (vqaddq_m_n_u8): Remove.
22548 (vqaddq_m_n_u32): Remove.
22549 (vqaddq_m_n_u16): Remove.
22550 (vqaddq_m_s8): Remove.
22551 (vqaddq_m_s32): Remove.
22552 (vqaddq_m_s16): Remove.
22553 (vqaddq_m_u8): Remove.
22554 (vqaddq_m_u32): Remove.
22555 (vqaddq_m_u16): Remove.
22556 (vqsubq_m_n_s8): Remove.
22557 (vqsubq_m_n_s32): Remove.
22558 (vqsubq_m_n_s16): Remove.
22559 (vqsubq_m_n_u8): Remove.
22560 (vqsubq_m_n_u32): Remove.
22561 (vqsubq_m_n_u16): Remove.
22562 (vqsubq_m_s8): Remove.
22563 (vqsubq_m_s32): Remove.
22564 (vqsubq_m_s16): Remove.
22565 (vqsubq_m_u8): Remove.
22566 (vqsubq_m_u32): Remove.
22567 (vqsubq_m_u16): Remove.
22568 (__arm_vqsubq_u8): Remove.
22569 (__arm_vqsubq_n_u8): Remove.
22570 (__arm_vqaddq_u8): Remove.
22571 (__arm_vqaddq_n_u8): Remove.
22572 (__arm_vqsubq_s8): Remove.
22573 (__arm_vqsubq_n_s8): Remove.
22574 (__arm_vqaddq_s8): Remove.
22575 (__arm_vqaddq_n_s8): Remove.
22576 (__arm_vqsubq_u16): Remove.
22577 (__arm_vqsubq_n_u16): Remove.
22578 (__arm_vqaddq_u16): Remove.
22579 (__arm_vqaddq_n_u16): Remove.
22580 (__arm_vqsubq_s16): Remove.
22581 (__arm_vqsubq_n_s16): Remove.
22582 (__arm_vqaddq_s16): Remove.
22583 (__arm_vqaddq_n_s16): Remove.
22584 (__arm_vqsubq_u32): Remove.
22585 (__arm_vqsubq_n_u32): Remove.
22586 (__arm_vqaddq_u32): Remove.
22587 (__arm_vqaddq_n_u32): Remove.
22588 (__arm_vqsubq_s32): Remove.
22589 (__arm_vqsubq_n_s32): Remove.
22590 (__arm_vqaddq_s32): Remove.
22591 (__arm_vqaddq_n_s32): Remove.
22592 (__arm_vqaddq_m_n_s8): Remove.
22593 (__arm_vqaddq_m_n_s32): Remove.
22594 (__arm_vqaddq_m_n_s16): Remove.
22595 (__arm_vqaddq_m_n_u8): Remove.
22596 (__arm_vqaddq_m_n_u32): Remove.
22597 (__arm_vqaddq_m_n_u16): Remove.
22598 (__arm_vqaddq_m_s8): Remove.
22599 (__arm_vqaddq_m_s32): Remove.
22600 (__arm_vqaddq_m_s16): Remove.
22601 (__arm_vqaddq_m_u8): Remove.
22602 (__arm_vqaddq_m_u32): Remove.
22603 (__arm_vqaddq_m_u16): Remove.
22604 (__arm_vqsubq_m_n_s8): Remove.
22605 (__arm_vqsubq_m_n_s32): Remove.
22606 (__arm_vqsubq_m_n_s16): Remove.
22607 (__arm_vqsubq_m_n_u8): Remove.
22608 (__arm_vqsubq_m_n_u32): Remove.
22609 (__arm_vqsubq_m_n_u16): Remove.
22610 (__arm_vqsubq_m_s8): Remove.
22611 (__arm_vqsubq_m_s32): Remove.
22612 (__arm_vqsubq_m_s16): Remove.
22613 (__arm_vqsubq_m_u8): Remove.
22614 (__arm_vqsubq_m_u32): Remove.
22615 (__arm_vqsubq_m_u16): Remove.
22616 (__arm_vqsubq): Remove.
22617 (__arm_vqaddq): Remove.
22618 (__arm_vqaddq_m): Remove.
22619 (__arm_vqsubq_m): Remove.
22620 (vqdmulhq): Remove.
22621 (vqdmulhq_m): Remove.
22622 (vqdmulhq_s8): Remove.
22623 (vqdmulhq_n_s8): Remove.
22624 (vqdmulhq_s16): Remove.
22625 (vqdmulhq_n_s16): Remove.
22626 (vqdmulhq_s32): Remove.
22627 (vqdmulhq_n_s32): Remove.
22628 (vqdmulhq_m_n_s8): Remove.
22629 (vqdmulhq_m_n_s32): Remove.
22630 (vqdmulhq_m_n_s16): Remove.
22631 (vqdmulhq_m_s8): Remove.
22632 (vqdmulhq_m_s32): Remove.
22633 (vqdmulhq_m_s16): Remove.
22634 (__arm_vqdmulhq_s8): Remove.
22635 (__arm_vqdmulhq_n_s8): Remove.
22636 (__arm_vqdmulhq_s16): Remove.
22637 (__arm_vqdmulhq_n_s16): Remove.
22638 (__arm_vqdmulhq_s32): Remove.
22639 (__arm_vqdmulhq_n_s32): Remove.
22640 (__arm_vqdmulhq_m_n_s8): Remove.
22641 (__arm_vqdmulhq_m_n_s32): Remove.
22642 (__arm_vqdmulhq_m_n_s16): Remove.
22643 (__arm_vqdmulhq_m_s8): Remove.
22644 (__arm_vqdmulhq_m_s32): Remove.
22645 (__arm_vqdmulhq_m_s16): Remove.
22646 (__arm_vqdmulhq): Remove.
22647 (__arm_vqdmulhq_m): Remove.
22649 (vrhaddq_m): Remove.
22650 (vrhaddq_x): Remove.
22651 (vrhaddq_u8): Remove.
22652 (vrhaddq_s8): Remove.
22653 (vrhaddq_u16): Remove.
22654 (vrhaddq_s16): Remove.
22655 (vrhaddq_u32): Remove.
22656 (vrhaddq_s32): Remove.
22657 (vrhaddq_m_s8): Remove.
22658 (vrhaddq_m_s32): Remove.
22659 (vrhaddq_m_s16): Remove.
22660 (vrhaddq_m_u8): Remove.
22661 (vrhaddq_m_u32): Remove.
22662 (vrhaddq_m_u16): Remove.
22663 (vrhaddq_x_s8): Remove.
22664 (vrhaddq_x_s16): Remove.
22665 (vrhaddq_x_s32): Remove.
22666 (vrhaddq_x_u8): Remove.
22667 (vrhaddq_x_u16): Remove.
22668 (vrhaddq_x_u32): Remove.
22669 (__arm_vrhaddq_u8): Remove.
22670 (__arm_vrhaddq_s8): Remove.
22671 (__arm_vrhaddq_u16): Remove.
22672 (__arm_vrhaddq_s16): Remove.
22673 (__arm_vrhaddq_u32): Remove.
22674 (__arm_vrhaddq_s32): Remove.
22675 (__arm_vrhaddq_m_s8): Remove.
22676 (__arm_vrhaddq_m_s32): Remove.
22677 (__arm_vrhaddq_m_s16): Remove.
22678 (__arm_vrhaddq_m_u8): Remove.
22679 (__arm_vrhaddq_m_u32): Remove.
22680 (__arm_vrhaddq_m_u16): Remove.
22681 (__arm_vrhaddq_x_s8): Remove.
22682 (__arm_vrhaddq_x_s16): Remove.
22683 (__arm_vrhaddq_x_s32): Remove.
22684 (__arm_vrhaddq_x_u8): Remove.
22685 (__arm_vrhaddq_x_u16): Remove.
22686 (__arm_vrhaddq_x_u32): Remove.
22687 (__arm_vrhaddq): Remove.
22688 (__arm_vrhaddq_m): Remove.
22689 (__arm_vrhaddq_x): Remove.
22691 (vrmulhq_m): Remove.
22692 (vrmulhq_x): Remove.
22693 (vrmulhq_u8): Remove.
22694 (vrmulhq_s8): Remove.
22695 (vrmulhq_u16): Remove.
22696 (vrmulhq_s16): Remove.
22697 (vrmulhq_u32): Remove.
22698 (vrmulhq_s32): Remove.
22699 (vrmulhq_m_s8): Remove.
22700 (vrmulhq_m_s32): Remove.
22701 (vrmulhq_m_s16): Remove.
22702 (vrmulhq_m_u8): Remove.
22703 (vrmulhq_m_u32): Remove.
22704 (vrmulhq_m_u16): Remove.
22705 (vrmulhq_x_s8): Remove.
22706 (vrmulhq_x_s16): Remove.
22707 (vrmulhq_x_s32): Remove.
22708 (vrmulhq_x_u8): Remove.
22709 (vrmulhq_x_u16): Remove.
22710 (vrmulhq_x_u32): Remove.
22711 (__arm_vrmulhq_u8): Remove.
22712 (__arm_vrmulhq_s8): Remove.
22713 (__arm_vrmulhq_u16): Remove.
22714 (__arm_vrmulhq_s16): Remove.
22715 (__arm_vrmulhq_u32): Remove.
22716 (__arm_vrmulhq_s32): Remove.
22717 (__arm_vrmulhq_m_s8): Remove.
22718 (__arm_vrmulhq_m_s32): Remove.
22719 (__arm_vrmulhq_m_s16): Remove.
22720 (__arm_vrmulhq_m_u8): Remove.
22721 (__arm_vrmulhq_m_u32): Remove.
22722 (__arm_vrmulhq_m_u16): Remove.
22723 (__arm_vrmulhq_x_s8): Remove.
22724 (__arm_vrmulhq_x_s16): Remove.
22725 (__arm_vrmulhq_x_s32): Remove.
22726 (__arm_vrmulhq_x_u8): Remove.
22727 (__arm_vrmulhq_x_u16): Remove.
22728 (__arm_vrmulhq_x_u32): Remove.
22729 (__arm_vrmulhq): Remove.
22730 (__arm_vrmulhq_m): Remove.
22731 (__arm_vrmulhq_x): Remove.
22733 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
22735 * config/arm/iterators.md (MVE_INT_SU_BINARY): New.
22736 (mve_insn): Add vabdq, vhaddq, vhsubq, vmulhq, vqaddq, vqdmulhq,
22737 vqrdmulhq, vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq.
22738 (supf): Add VQDMULHQ_S, VQRDMULHQ_S.
22739 * config/arm/mve.md (mve_vabdq_<supf><mode>)
22740 (@mve_vhaddq_<supf><mode>, mve_vhsubq_<supf><mode>)
22741 (mve_vmulhq_<supf><mode>, mve_vqaddq_<supf><mode>)
22742 (mve_vqdmulhq_s<mode>, mve_vqrdmulhq_s<mode>)
22743 (mve_vqrshlq_<supf><mode>, mve_vqshlq_<supf><mode>)
22744 (mve_vqsubq_<supf><mode>, @mve_vrhaddq_<supf><mode>)
22745 (mve_vrmulhq_<supf><mode>, mve_vrshlq_<supf><mode>): Merge into
22747 (@mve_<mve_insn>q_<supf><mode>): ... this.
22748 * config/arm/vec-common.md (avg<mode>3_floor, uavg<mode>3_floor)
22749 (avg<mode>3_ceil, uavg<mode>3_ceil): Use gen_mve_q instead of
22750 gen_mve_vhaddq / gen_mve_vrhaddq.
22752 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
22754 * config/arm/iterators.md (MVE_INT_SU_M_N_BINARY): New.
22755 (mve_insn): Add vhaddq, vhsubq, vmlaq, vmlasq, vqaddq, vqdmlahq,
22756 vqdmlashq, vqdmulhq, vqrdmlahq, vqrdmlashq, vqrdmulhq, vqsubq.
22757 (supf): Add VQDMLAHQ_M_N_S, VQDMLASHQ_M_N_S, VQRDMLAHQ_M_N_S,
22758 VQRDMLASHQ_M_N_S, VQDMULHQ_M_N_S, VQRDMULHQ_M_N_S.
22759 * config/arm/mve.md (mve_vhaddq_m_n_<supf><mode>)
22760 (mve_vhsubq_m_n_<supf><mode>, mve_vmlaq_m_n_<supf><mode>)
22761 (mve_vmlasq_m_n_<supf><mode>, mve_vqaddq_m_n_<supf><mode>)
22762 (mve_vqdmlahq_m_n_s<mode>, mve_vqdmlashq_m_n_s<mode>)
22763 (mve_vqrdmlahq_m_n_s<mode>, mve_vqrdmlashq_m_n_s<mode>)
22764 (mve_vqsubq_m_n_<supf><mode>, mve_vqdmulhq_m_n_s<mode>)
22765 (mve_vqrdmulhq_m_n_s<mode>): Merge into ...
22766 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
22768 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
22770 * config/arm/iterators.md (MVE_INT_SU_N_BINARY): New.
22771 (mve_insn): Add vhaddq, vhsubq, vqaddq, vqdmulhq, vqrdmulhq,
22773 (supf): Add VQDMULHQ_N_S, VQRDMULHQ_N_S.
22774 * config/arm/mve.md (mve_vhaddq_n_<supf><mode>)
22775 (mve_vhsubq_n_<supf><mode>, mve_vqaddq_n_<supf><mode>)
22776 (mve_vqdmulhq_n_s<mode>, mve_vqrdmulhq_n_s<mode>)
22777 (mve_vqsubq_n_<supf><mode>): Merge into ...
22778 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
22780 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
22782 * config/arm/iterators.md (MVE_INT_SU_M_BINARY): New.
22783 (mve_insn): Add vabdq, vhaddq, vhsubq, vmaxq, vminq, vmulhq,
22784 vqaddq, vqdmladhq, vqdmladhxq, vqdmlsdhq, vqdmlsdhxq, vqdmulhq,
22785 vqrdmladhq, vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq, vqrdmulhq,
22786 vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq, vshlq.
22787 (supf): Add VQDMLADHQ_M_S, VQDMLADHXQ_M_S, VQDMLSDHQ_M_S,
22788 VQDMLSDHXQ_M_S, VQDMULHQ_M_S, VQRDMLADHQ_M_S, VQRDMLADHXQ_M_S,
22789 VQRDMLSDHQ_M_S, VQRDMLSDHXQ_M_S, VQRDMULHQ_M_S.
22790 * config/arm/mve.md (@mve_<mve_insn>q_m_<supf><mode>): New.
22791 (mve_vshlq_m_<supf><mode>): Merged into
22792 @mve_<mve_insn>q_m_<supf><mode>.
22793 (mve_vabdq_m_<supf><mode>): Likewise.
22794 (mve_vhaddq_m_<supf><mode>): Likewise.
22795 (mve_vhsubq_m_<supf><mode>): Likewise.
22796 (mve_vmaxq_m_<supf><mode>): Likewise.
22797 (mve_vminq_m_<supf><mode>): Likewise.
22798 (mve_vmulhq_m_<supf><mode>): Likewise.
22799 (mve_vqaddq_m_<supf><mode>): Likewise.
22800 (mve_vqrshlq_m_<supf><mode>): Likewise.
22801 (mve_vqshlq_m_<supf><mode>): Likewise.
22802 (mve_vqsubq_m_<supf><mode>): Likewise.
22803 (mve_vrhaddq_m_<supf><mode>): Likewise.
22804 (mve_vrmulhq_m_<supf><mode>): Likewise.
22805 (mve_vrshlq_m_<supf><mode>): Likewise.
22806 (mve_vqdmladhq_m_s<mode>): Likewise.
22807 (mve_vqdmladhxq_m_s<mode>): Likewise.
22808 (mve_vqdmlsdhq_m_s<mode>): Likewise.
22809 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
22810 (mve_vqdmulhq_m_s<mode>): Likewise.
22811 (mve_vqrdmladhq_m_s<mode>): Likewise.
22812 (mve_vqrdmladhxq_m_s<mode>): Likewise.
22813 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
22814 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
22815 (mve_vqrdmulhq_m_s<mode>): Likewise.
22817 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
22819 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_M_N): New. (vcreateq): New.
22820 * config/arm/arm-mve-builtins-base.def (vcreateq): New.
22821 * config/arm/arm-mve-builtins-base.h (vcreateq): New.
22822 * config/arm/arm_mve.h (vcreateq_f16): Remove.
22823 (vcreateq_f32): Remove.
22824 (vcreateq_u8): Remove.
22825 (vcreateq_u16): Remove.
22826 (vcreateq_u32): Remove.
22827 (vcreateq_u64): Remove.
22828 (vcreateq_s8): Remove.
22829 (vcreateq_s16): Remove.
22830 (vcreateq_s32): Remove.
22831 (vcreateq_s64): Remove.
22832 (__arm_vcreateq_u8): Remove.
22833 (__arm_vcreateq_u16): Remove.
22834 (__arm_vcreateq_u32): Remove.
22835 (__arm_vcreateq_u64): Remove.
22836 (__arm_vcreateq_s8): Remove.
22837 (__arm_vcreateq_s16): Remove.
22838 (__arm_vcreateq_s32): Remove.
22839 (__arm_vcreateq_s64): Remove.
22840 (__arm_vcreateq_f16): Remove.
22841 (__arm_vcreateq_f32): Remove.
22843 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
22845 * config/arm/iterators.md (MVE_FP_CREATE_ONLY): New.
22846 (mve_insn): Add VCREATEQ_S, VCREATEQ_U, VCREATEQ_F.
22847 * config/arm/mve.md (mve_vcreateq_f<mode>): Rename into ...
22848 (@mve_<mve_insn>q_f<mode>): ... this.
22849 (mve_vcreateq_<supf><mode>): Rename into ...
22850 (@mve_<mve_insn>q_<supf><mode>): ... this.
22852 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
22854 * config/arm/arm-mve-builtins-shapes.cc (create): New.
22855 * config/arm/arm-mve-builtins-shapes.h: (create): New.
22857 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
22859 * config/arm/arm-mve-builtins-functions.h (class
22860 unspec_mve_function_exact_insn): New.
22862 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
22864 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N_NO_N_F): New.
22866 * config/arm/arm-mve-builtins-base.def (vorrq): New.
22867 * config/arm/arm-mve-builtins-base.h (vorrq): New.
22868 * config/arm/arm-mve-builtins.cc
22869 (function_instance::has_inactive_argument): Handle vorrq.
22870 * config/arm/arm_mve.h (vorrq): Remove.
22871 (vorrq_m_n): Remove.
22874 (vorrq_u8): Remove.
22875 (vorrq_s8): Remove.
22876 (vorrq_u16): Remove.
22877 (vorrq_s16): Remove.
22878 (vorrq_u32): Remove.
22879 (vorrq_s32): Remove.
22880 (vorrq_n_u16): Remove.
22881 (vorrq_f16): Remove.
22882 (vorrq_n_s16): Remove.
22883 (vorrq_n_u32): Remove.
22884 (vorrq_f32): Remove.
22885 (vorrq_n_s32): Remove.
22886 (vorrq_m_n_s16): Remove.
22887 (vorrq_m_n_u16): Remove.
22888 (vorrq_m_n_s32): Remove.
22889 (vorrq_m_n_u32): Remove.
22890 (vorrq_m_s8): Remove.
22891 (vorrq_m_s32): Remove.
22892 (vorrq_m_s16): Remove.
22893 (vorrq_m_u8): Remove.
22894 (vorrq_m_u32): Remove.
22895 (vorrq_m_u16): Remove.
22896 (vorrq_m_f32): Remove.
22897 (vorrq_m_f16): Remove.
22898 (vorrq_x_s8): Remove.
22899 (vorrq_x_s16): Remove.
22900 (vorrq_x_s32): Remove.
22901 (vorrq_x_u8): Remove.
22902 (vorrq_x_u16): Remove.
22903 (vorrq_x_u32): Remove.
22904 (vorrq_x_f16): Remove.
22905 (vorrq_x_f32): Remove.
22906 (__arm_vorrq_u8): Remove.
22907 (__arm_vorrq_s8): Remove.
22908 (__arm_vorrq_u16): Remove.
22909 (__arm_vorrq_s16): Remove.
22910 (__arm_vorrq_u32): Remove.
22911 (__arm_vorrq_s32): Remove.
22912 (__arm_vorrq_n_u16): Remove.
22913 (__arm_vorrq_n_s16): Remove.
22914 (__arm_vorrq_n_u32): Remove.
22915 (__arm_vorrq_n_s32): Remove.
22916 (__arm_vorrq_m_n_s16): Remove.
22917 (__arm_vorrq_m_n_u16): Remove.
22918 (__arm_vorrq_m_n_s32): Remove.
22919 (__arm_vorrq_m_n_u32): Remove.
22920 (__arm_vorrq_m_s8): Remove.
22921 (__arm_vorrq_m_s32): Remove.
22922 (__arm_vorrq_m_s16): Remove.
22923 (__arm_vorrq_m_u8): Remove.
22924 (__arm_vorrq_m_u32): Remove.
22925 (__arm_vorrq_m_u16): Remove.
22926 (__arm_vorrq_x_s8): Remove.
22927 (__arm_vorrq_x_s16): Remove.
22928 (__arm_vorrq_x_s32): Remove.
22929 (__arm_vorrq_x_u8): Remove.
22930 (__arm_vorrq_x_u16): Remove.
22931 (__arm_vorrq_x_u32): Remove.
22932 (__arm_vorrq_f16): Remove.
22933 (__arm_vorrq_f32): Remove.
22934 (__arm_vorrq_m_f32): Remove.
22935 (__arm_vorrq_m_f16): Remove.
22936 (__arm_vorrq_x_f16): Remove.
22937 (__arm_vorrq_x_f32): Remove.
22938 (__arm_vorrq): Remove.
22939 (__arm_vorrq_m_n): Remove.
22940 (__arm_vorrq_m): Remove.
22941 (__arm_vorrq_x): Remove.
22943 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
22945 * config/arm/arm-mve-builtins-shapes.cc (binary_orrq): New.
22946 * config/arm/arm-mve-builtins-shapes.h (binary_orrq): New.
22947 * config/arm/arm-mve-builtins.cc (preds_m_or_none): Remove static.
22948 * config/arm/arm-mve-builtins.h (preds_m_or_none): Declare.
22950 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
22952 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M): New.
22953 (vandq,veorq): New.
22954 * config/arm/arm-mve-builtins-base.def (vandq, veorq): New.
22955 * config/arm/arm-mve-builtins-base.h (vandq, veorq): New.
22956 * config/arm/arm_mve.h (vandq): Remove.
22959 (vandq_u8): Remove.
22960 (vandq_s8): Remove.
22961 (vandq_u16): Remove.
22962 (vandq_s16): Remove.
22963 (vandq_u32): Remove.
22964 (vandq_s32): Remove.
22965 (vandq_f16): Remove.
22966 (vandq_f32): Remove.
22967 (vandq_m_s8): Remove.
22968 (vandq_m_s32): Remove.
22969 (vandq_m_s16): Remove.
22970 (vandq_m_u8): Remove.
22971 (vandq_m_u32): Remove.
22972 (vandq_m_u16): Remove.
22973 (vandq_m_f32): Remove.
22974 (vandq_m_f16): Remove.
22975 (vandq_x_s8): Remove.
22976 (vandq_x_s16): Remove.
22977 (vandq_x_s32): Remove.
22978 (vandq_x_u8): Remove.
22979 (vandq_x_u16): Remove.
22980 (vandq_x_u32): Remove.
22981 (vandq_x_f16): Remove.
22982 (vandq_x_f32): Remove.
22983 (__arm_vandq_u8): Remove.
22984 (__arm_vandq_s8): Remove.
22985 (__arm_vandq_u16): Remove.
22986 (__arm_vandq_s16): Remove.
22987 (__arm_vandq_u32): Remove.
22988 (__arm_vandq_s32): Remove.
22989 (__arm_vandq_m_s8): Remove.
22990 (__arm_vandq_m_s32): Remove.
22991 (__arm_vandq_m_s16): Remove.
22992 (__arm_vandq_m_u8): Remove.
22993 (__arm_vandq_m_u32): Remove.
22994 (__arm_vandq_m_u16): Remove.
22995 (__arm_vandq_x_s8): Remove.
22996 (__arm_vandq_x_s16): Remove.
22997 (__arm_vandq_x_s32): Remove.
22998 (__arm_vandq_x_u8): Remove.
22999 (__arm_vandq_x_u16): Remove.
23000 (__arm_vandq_x_u32): Remove.
23001 (__arm_vandq_f16): Remove.
23002 (__arm_vandq_f32): Remove.
23003 (__arm_vandq_m_f32): Remove.
23004 (__arm_vandq_m_f16): Remove.
23005 (__arm_vandq_x_f16): Remove.
23006 (__arm_vandq_x_f32): Remove.
23007 (__arm_vandq): Remove.
23008 (__arm_vandq_m): Remove.
23009 (__arm_vandq_x): Remove.
23012 (veorq_u8): Remove.
23013 (veorq_s8): Remove.
23014 (veorq_u16): Remove.
23015 (veorq_s16): Remove.
23016 (veorq_u32): Remove.
23017 (veorq_s32): Remove.
23018 (veorq_f16): Remove.
23019 (veorq_f32): Remove.
23020 (veorq_m_s8): Remove.
23021 (veorq_m_s32): Remove.
23022 (veorq_m_s16): Remove.
23023 (veorq_m_u8): Remove.
23024 (veorq_m_u32): Remove.
23025 (veorq_m_u16): Remove.
23026 (veorq_m_f32): Remove.
23027 (veorq_m_f16): Remove.
23028 (veorq_x_s8): Remove.
23029 (veorq_x_s16): Remove.
23030 (veorq_x_s32): Remove.
23031 (veorq_x_u8): Remove.
23032 (veorq_x_u16): Remove.
23033 (veorq_x_u32): Remove.
23034 (veorq_x_f16): Remove.
23035 (veorq_x_f32): Remove.
23036 (__arm_veorq_u8): Remove.
23037 (__arm_veorq_s8): Remove.
23038 (__arm_veorq_u16): Remove.
23039 (__arm_veorq_s16): Remove.
23040 (__arm_veorq_u32): Remove.
23041 (__arm_veorq_s32): Remove.
23042 (__arm_veorq_m_s8): Remove.
23043 (__arm_veorq_m_s32): Remove.
23044 (__arm_veorq_m_s16): Remove.
23045 (__arm_veorq_m_u8): Remove.
23046 (__arm_veorq_m_u32): Remove.
23047 (__arm_veorq_m_u16): Remove.
23048 (__arm_veorq_x_s8): Remove.
23049 (__arm_veorq_x_s16): Remove.
23050 (__arm_veorq_x_s32): Remove.
23051 (__arm_veorq_x_u8): Remove.
23052 (__arm_veorq_x_u16): Remove.
23053 (__arm_veorq_x_u32): Remove.
23054 (__arm_veorq_f16): Remove.
23055 (__arm_veorq_f32): Remove.
23056 (__arm_veorq_m_f32): Remove.
23057 (__arm_veorq_m_f16): Remove.
23058 (__arm_veorq_x_f16): Remove.
23059 (__arm_veorq_x_f32): Remove.
23060 (__arm_veorq): Remove.
23061 (__arm_veorq_m): Remove.
23062 (__arm_veorq_x): Remove.
23064 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
23066 * config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC)
23067 (MVE_FP_M_BINARY_LOGIC): New.
23068 (MVE_INT_M_N_BINARY_LOGIC): New.
23069 (MVE_INT_N_BINARY_LOGIC): New.
23070 (mve_insn): Add vand, veor, vorr, vbic.
23071 * config/arm/mve.md (mve_vandq_m_<supf><mode>)
23072 (mve_veorq_m_<supf><mode>, mve_vorrq_m_<supf><mode>)
23073 (mve_vbicq_m_<supf><mode>): Merge into ...
23074 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
23075 (mve_vandq_m_f<mode>, mve_veorq_m_f<mode>, mve_vorrq_m_f<mode>)
23076 (mve_vbicq_m_f<mode>): Merge into ...
23077 (@mve_<mve_insn>q_m_f<mode>): ... this.
23078 (mve_vorrq_n_<supf><mode>)
23079 (mve_vbicq_n_<supf><mode>): Merge into ...
23080 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23081 (mve_vorrq_m_n_<supf><mode>, mve_vbicq_m_n_<supf><mode>): Merge
23083 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23085 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
23087 * config/arm/arm-mve-builtins-shapes.cc (binary): New.
23088 * config/arm/arm-mve-builtins-shapes.h (binary): New.
23090 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
23092 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N):
23094 (vaddq, vmulq, vsubq): New.
23095 * config/arm/arm-mve-builtins-base.def (vaddq, vmulq, vsubq): New.
23096 * config/arm/arm-mve-builtins-base.h (vaddq, vmulq, vsubq): New.
23097 * config/arm/arm_mve.h (vaddq): Remove.
23100 (vaddq_n_u8): Remove.
23101 (vaddq_n_s8): Remove.
23102 (vaddq_n_u16): Remove.
23103 (vaddq_n_s16): Remove.
23104 (vaddq_n_u32): Remove.
23105 (vaddq_n_s32): Remove.
23106 (vaddq_n_f16): Remove.
23107 (vaddq_n_f32): Remove.
23108 (vaddq_m_n_s8): Remove.
23109 (vaddq_m_n_s32): Remove.
23110 (vaddq_m_n_s16): Remove.
23111 (vaddq_m_n_u8): Remove.
23112 (vaddq_m_n_u32): Remove.
23113 (vaddq_m_n_u16): Remove.
23114 (vaddq_m_s8): Remove.
23115 (vaddq_m_s32): Remove.
23116 (vaddq_m_s16): Remove.
23117 (vaddq_m_u8): Remove.
23118 (vaddq_m_u32): Remove.
23119 (vaddq_m_u16): Remove.
23120 (vaddq_m_f32): Remove.
23121 (vaddq_m_f16): Remove.
23122 (vaddq_m_n_f32): Remove.
23123 (vaddq_m_n_f16): Remove.
23124 (vaddq_s8): Remove.
23125 (vaddq_s16): Remove.
23126 (vaddq_s32): Remove.
23127 (vaddq_u8): Remove.
23128 (vaddq_u16): Remove.
23129 (vaddq_u32): Remove.
23130 (vaddq_f16): Remove.
23131 (vaddq_f32): Remove.
23132 (vaddq_x_s8): Remove.
23133 (vaddq_x_s16): Remove.
23134 (vaddq_x_s32): Remove.
23135 (vaddq_x_n_s8): Remove.
23136 (vaddq_x_n_s16): Remove.
23137 (vaddq_x_n_s32): Remove.
23138 (vaddq_x_u8): Remove.
23139 (vaddq_x_u16): Remove.
23140 (vaddq_x_u32): Remove.
23141 (vaddq_x_n_u8): Remove.
23142 (vaddq_x_n_u16): Remove.
23143 (vaddq_x_n_u32): Remove.
23144 (vaddq_x_f16): Remove.
23145 (vaddq_x_f32): Remove.
23146 (vaddq_x_n_f16): Remove.
23147 (vaddq_x_n_f32): Remove.
23148 (__arm_vaddq_n_u8): Remove.
23149 (__arm_vaddq_n_s8): Remove.
23150 (__arm_vaddq_n_u16): Remove.
23151 (__arm_vaddq_n_s16): Remove.
23152 (__arm_vaddq_n_u32): Remove.
23153 (__arm_vaddq_n_s32): Remove.
23154 (__arm_vaddq_m_n_s8): Remove.
23155 (__arm_vaddq_m_n_s32): Remove.
23156 (__arm_vaddq_m_n_s16): Remove.
23157 (__arm_vaddq_m_n_u8): Remove.
23158 (__arm_vaddq_m_n_u32): Remove.
23159 (__arm_vaddq_m_n_u16): Remove.
23160 (__arm_vaddq_m_s8): Remove.
23161 (__arm_vaddq_m_s32): Remove.
23162 (__arm_vaddq_m_s16): Remove.
23163 (__arm_vaddq_m_u8): Remove.
23164 (__arm_vaddq_m_u32): Remove.
23165 (__arm_vaddq_m_u16): Remove.
23166 (__arm_vaddq_s8): Remove.
23167 (__arm_vaddq_s16): Remove.
23168 (__arm_vaddq_s32): Remove.
23169 (__arm_vaddq_u8): Remove.
23170 (__arm_vaddq_u16): Remove.
23171 (__arm_vaddq_u32): Remove.
23172 (__arm_vaddq_x_s8): Remove.
23173 (__arm_vaddq_x_s16): Remove.
23174 (__arm_vaddq_x_s32): Remove.
23175 (__arm_vaddq_x_n_s8): Remove.
23176 (__arm_vaddq_x_n_s16): Remove.
23177 (__arm_vaddq_x_n_s32): Remove.
23178 (__arm_vaddq_x_u8): Remove.
23179 (__arm_vaddq_x_u16): Remove.
23180 (__arm_vaddq_x_u32): Remove.
23181 (__arm_vaddq_x_n_u8): Remove.
23182 (__arm_vaddq_x_n_u16): Remove.
23183 (__arm_vaddq_x_n_u32): Remove.
23184 (__arm_vaddq_n_f16): Remove.
23185 (__arm_vaddq_n_f32): Remove.
23186 (__arm_vaddq_m_f32): Remove.
23187 (__arm_vaddq_m_f16): Remove.
23188 (__arm_vaddq_m_n_f32): Remove.
23189 (__arm_vaddq_m_n_f16): Remove.
23190 (__arm_vaddq_f16): Remove.
23191 (__arm_vaddq_f32): Remove.
23192 (__arm_vaddq_x_f16): Remove.
23193 (__arm_vaddq_x_f32): Remove.
23194 (__arm_vaddq_x_n_f16): Remove.
23195 (__arm_vaddq_x_n_f32): Remove.
23196 (__arm_vaddq): Remove.
23197 (__arm_vaddq_m): Remove.
23198 (__arm_vaddq_x): Remove.
23202 (vmulq_u8): Remove.
23203 (vmulq_n_u8): Remove.
23204 (vmulq_s8): Remove.
23205 (vmulq_n_s8): Remove.
23206 (vmulq_u16): Remove.
23207 (vmulq_n_u16): Remove.
23208 (vmulq_s16): Remove.
23209 (vmulq_n_s16): Remove.
23210 (vmulq_u32): Remove.
23211 (vmulq_n_u32): Remove.
23212 (vmulq_s32): Remove.
23213 (vmulq_n_s32): Remove.
23214 (vmulq_n_f16): Remove.
23215 (vmulq_f16): Remove.
23216 (vmulq_n_f32): Remove.
23217 (vmulq_f32): Remove.
23218 (vmulq_m_n_s8): Remove.
23219 (vmulq_m_n_s32): Remove.
23220 (vmulq_m_n_s16): Remove.
23221 (vmulq_m_n_u8): Remove.
23222 (vmulq_m_n_u32): Remove.
23223 (vmulq_m_n_u16): Remove.
23224 (vmulq_m_s8): Remove.
23225 (vmulq_m_s32): Remove.
23226 (vmulq_m_s16): Remove.
23227 (vmulq_m_u8): Remove.
23228 (vmulq_m_u32): Remove.
23229 (vmulq_m_u16): Remove.
23230 (vmulq_m_f32): Remove.
23231 (vmulq_m_f16): Remove.
23232 (vmulq_m_n_f32): Remove.
23233 (vmulq_m_n_f16): Remove.
23234 (vmulq_x_s8): Remove.
23235 (vmulq_x_s16): Remove.
23236 (vmulq_x_s32): Remove.
23237 (vmulq_x_n_s8): Remove.
23238 (vmulq_x_n_s16): Remove.
23239 (vmulq_x_n_s32): Remove.
23240 (vmulq_x_u8): Remove.
23241 (vmulq_x_u16): Remove.
23242 (vmulq_x_u32): Remove.
23243 (vmulq_x_n_u8): Remove.
23244 (vmulq_x_n_u16): Remove.
23245 (vmulq_x_n_u32): Remove.
23246 (vmulq_x_f16): Remove.
23247 (vmulq_x_f32): Remove.
23248 (vmulq_x_n_f16): Remove.
23249 (vmulq_x_n_f32): Remove.
23250 (__arm_vmulq_u8): Remove.
23251 (__arm_vmulq_n_u8): Remove.
23252 (__arm_vmulq_s8): Remove.
23253 (__arm_vmulq_n_s8): Remove.
23254 (__arm_vmulq_u16): Remove.
23255 (__arm_vmulq_n_u16): Remove.
23256 (__arm_vmulq_s16): Remove.
23257 (__arm_vmulq_n_s16): Remove.
23258 (__arm_vmulq_u32): Remove.
23259 (__arm_vmulq_n_u32): Remove.
23260 (__arm_vmulq_s32): Remove.
23261 (__arm_vmulq_n_s32): Remove.
23262 (__arm_vmulq_m_n_s8): Remove.
23263 (__arm_vmulq_m_n_s32): Remove.
23264 (__arm_vmulq_m_n_s16): Remove.
23265 (__arm_vmulq_m_n_u8): Remove.
23266 (__arm_vmulq_m_n_u32): Remove.
23267 (__arm_vmulq_m_n_u16): Remove.
23268 (__arm_vmulq_m_s8): Remove.
23269 (__arm_vmulq_m_s32): Remove.
23270 (__arm_vmulq_m_s16): Remove.
23271 (__arm_vmulq_m_u8): Remove.
23272 (__arm_vmulq_m_u32): Remove.
23273 (__arm_vmulq_m_u16): Remove.
23274 (__arm_vmulq_x_s8): Remove.
23275 (__arm_vmulq_x_s16): Remove.
23276 (__arm_vmulq_x_s32): Remove.
23277 (__arm_vmulq_x_n_s8): Remove.
23278 (__arm_vmulq_x_n_s16): Remove.
23279 (__arm_vmulq_x_n_s32): Remove.
23280 (__arm_vmulq_x_u8): Remove.
23281 (__arm_vmulq_x_u16): Remove.
23282 (__arm_vmulq_x_u32): Remove.
23283 (__arm_vmulq_x_n_u8): Remove.
23284 (__arm_vmulq_x_n_u16): Remove.
23285 (__arm_vmulq_x_n_u32): Remove.
23286 (__arm_vmulq_n_f16): Remove.
23287 (__arm_vmulq_f16): Remove.
23288 (__arm_vmulq_n_f32): Remove.
23289 (__arm_vmulq_f32): Remove.
23290 (__arm_vmulq_m_f32): Remove.
23291 (__arm_vmulq_m_f16): Remove.
23292 (__arm_vmulq_m_n_f32): Remove.
23293 (__arm_vmulq_m_n_f16): Remove.
23294 (__arm_vmulq_x_f16): Remove.
23295 (__arm_vmulq_x_f32): Remove.
23296 (__arm_vmulq_x_n_f16): Remove.
23297 (__arm_vmulq_x_n_f32): Remove.
23298 (__arm_vmulq): Remove.
23299 (__arm_vmulq_m): Remove.
23300 (__arm_vmulq_x): Remove.
23304 (vsubq_n_f16): Remove.
23305 (vsubq_n_f32): Remove.
23306 (vsubq_u8): Remove.
23307 (vsubq_n_u8): Remove.
23308 (vsubq_s8): Remove.
23309 (vsubq_n_s8): Remove.
23310 (vsubq_u16): Remove.
23311 (vsubq_n_u16): Remove.
23312 (vsubq_s16): Remove.
23313 (vsubq_n_s16): Remove.
23314 (vsubq_u32): Remove.
23315 (vsubq_n_u32): Remove.
23316 (vsubq_s32): Remove.
23317 (vsubq_n_s32): Remove.
23318 (vsubq_f16): Remove.
23319 (vsubq_f32): Remove.
23320 (vsubq_m_s8): Remove.
23321 (vsubq_m_u8): Remove.
23322 (vsubq_m_s16): Remove.
23323 (vsubq_m_u16): Remove.
23324 (vsubq_m_s32): Remove.
23325 (vsubq_m_u32): Remove.
23326 (vsubq_m_n_s8): Remove.
23327 (vsubq_m_n_s32): Remove.
23328 (vsubq_m_n_s16): Remove.
23329 (vsubq_m_n_u8): Remove.
23330 (vsubq_m_n_u32): Remove.
23331 (vsubq_m_n_u16): Remove.
23332 (vsubq_m_f32): Remove.
23333 (vsubq_m_f16): Remove.
23334 (vsubq_m_n_f32): Remove.
23335 (vsubq_m_n_f16): Remove.
23336 (vsubq_x_s8): Remove.
23337 (vsubq_x_s16): Remove.
23338 (vsubq_x_s32): Remove.
23339 (vsubq_x_n_s8): Remove.
23340 (vsubq_x_n_s16): Remove.
23341 (vsubq_x_n_s32): Remove.
23342 (vsubq_x_u8): Remove.
23343 (vsubq_x_u16): Remove.
23344 (vsubq_x_u32): Remove.
23345 (vsubq_x_n_u8): Remove.
23346 (vsubq_x_n_u16): Remove.
23347 (vsubq_x_n_u32): Remove.
23348 (vsubq_x_f16): Remove.
23349 (vsubq_x_f32): Remove.
23350 (vsubq_x_n_f16): Remove.
23351 (vsubq_x_n_f32): Remove.
23352 (__arm_vsubq_u8): Remove.
23353 (__arm_vsubq_n_u8): Remove.
23354 (__arm_vsubq_s8): Remove.
23355 (__arm_vsubq_n_s8): Remove.
23356 (__arm_vsubq_u16): Remove.
23357 (__arm_vsubq_n_u16): Remove.
23358 (__arm_vsubq_s16): Remove.
23359 (__arm_vsubq_n_s16): Remove.
23360 (__arm_vsubq_u32): Remove.
23361 (__arm_vsubq_n_u32): Remove.
23362 (__arm_vsubq_s32): Remove.
23363 (__arm_vsubq_n_s32): Remove.
23364 (__arm_vsubq_m_s8): Remove.
23365 (__arm_vsubq_m_u8): Remove.
23366 (__arm_vsubq_m_s16): Remove.
23367 (__arm_vsubq_m_u16): Remove.
23368 (__arm_vsubq_m_s32): Remove.
23369 (__arm_vsubq_m_u32): Remove.
23370 (__arm_vsubq_m_n_s8): Remove.
23371 (__arm_vsubq_m_n_s32): Remove.
23372 (__arm_vsubq_m_n_s16): Remove.
23373 (__arm_vsubq_m_n_u8): Remove.
23374 (__arm_vsubq_m_n_u32): Remove.
23375 (__arm_vsubq_m_n_u16): Remove.
23376 (__arm_vsubq_x_s8): Remove.
23377 (__arm_vsubq_x_s16): Remove.
23378 (__arm_vsubq_x_s32): Remove.
23379 (__arm_vsubq_x_n_s8): Remove.
23380 (__arm_vsubq_x_n_s16): Remove.
23381 (__arm_vsubq_x_n_s32): Remove.
23382 (__arm_vsubq_x_u8): Remove.
23383 (__arm_vsubq_x_u16): Remove.
23384 (__arm_vsubq_x_u32): Remove.
23385 (__arm_vsubq_x_n_u8): Remove.
23386 (__arm_vsubq_x_n_u16): Remove.
23387 (__arm_vsubq_x_n_u32): Remove.
23388 (__arm_vsubq_n_f16): Remove.
23389 (__arm_vsubq_n_f32): Remove.
23390 (__arm_vsubq_f16): Remove.
23391 (__arm_vsubq_f32): Remove.
23392 (__arm_vsubq_m_f32): Remove.
23393 (__arm_vsubq_m_f16): Remove.
23394 (__arm_vsubq_m_n_f32): Remove.
23395 (__arm_vsubq_m_n_f16): Remove.
23396 (__arm_vsubq_x_f16): Remove.
23397 (__arm_vsubq_x_f32): Remove.
23398 (__arm_vsubq_x_n_f16): Remove.
23399 (__arm_vsubq_x_n_f32): Remove.
23400 (__arm_vsubq): Remove.
23401 (__arm_vsubq_m): Remove.
23402 (__arm_vsubq_x): Remove.
23403 * config/arm/arm_mve_builtins.def (vsubq_u, vsubq_s, vsubq_f):
23405 (vmulq_u, vmulq_s, vmulq_f): Remove.
23406 * config/arm/mve.md (mve_vsubq_<supf><mode>): Remove.
23407 (mve_vmulq_<supf><mode>): Remove.
23409 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
23411 * config/arm/iterators.md (MVE_INT_BINARY_RTX, MVE_INT_M_BINARY)
23412 (MVE_INT_M_N_BINARY, MVE_INT_N_BINARY, MVE_FP_M_BINARY)
23413 (MVE_FP_M_N_BINARY, MVE_FP_N_BINARY, mve_addsubmul, mve_insn): New
23415 * config/arm/mve.md
23416 (mve_vsubq_n_f<mode>, mve_vaddq_n_f<mode>, mve_vmulq_n_f<mode>):
23418 (@mve_<mve_insn>q_n_f<mode>): ... this.
23419 (mve_vaddq_n_<supf><mode>, mve_vmulq_n_<supf><mode>)
23420 (mve_vsubq_n_<supf><mode>): Factorize into ...
23421 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23422 (mve_vaddq<mode>, mve_vmulq<mode>, mve_vsubq<mode>): Factorize
23424 (mve_<mve_addsubmul>q<mode>): ... this.
23425 (mve_vaddq_f<mode>, mve_vmulq_f<mode>, mve_vsubq_f<mode>):
23427 (mve_<mve_addsubmul>q_f<mode>): ... this.
23428 (mve_vaddq_m_<supf><mode>, mve_vmulq_m_<supf><mode>)
23429 (mve_vsubq_m_<supf><mode>): Factorize into ...
23430 (@mve_<mve_insn>q_m_<supf><mode>): ... this,
23431 (mve_vaddq_m_n_<supf><mode>, mve_vmulq_m_n_<supf><mode>)
23432 (mve_vsubq_m_n_<supf><mode>): Factorize into ...
23433 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23434 (mve_vaddq_m_f<mode>, mve_vmulq_m_f<mode>, mve_vsubq_m_f<mode>):
23436 (@mve_<mve_insn>q_m_f<mode>): ... this.
23437 (mve_vaddq_m_n_f<mode>, mve_vmulq_m_n_f<mode>)
23438 (mve_vsubq_m_n_f<mode>): Factorize into ...
23439 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
23441 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
23443 * config/arm/arm-mve-builtins-functions.h (class
23444 unspec_based_mve_function_base): New.
23445 (class unspec_based_mve_function_exact_insn): New.
23447 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
23449 * config/arm/arm-mve-builtins-shapes.cc (binary_opt_n): New.
23450 * config/arm/arm-mve-builtins-shapes.h (binary_opt_n): New.
23452 2023-05-03 Murray Steele <murray.steele@arm.com>
23453 Christophe Lyon <christophe.lyon@arm.com>
23455 * config/arm/arm-mve-builtins-base.cc (class
23456 vuninitializedq_impl): New.
23457 * config/arm/arm-mve-builtins-base.def (vuninitializedq): New.
23458 * config/arm/arm-mve-builtins-base.h (vuninitializedq): New
23460 * config/arm/arm-mve-builtins-shapes.cc (inherent): New.
23461 * config/arm/arm-mve-builtins-shapes.h (inherent): New
23463 * config/arm/arm_mve_types.h (__arm_vuninitializedq): Move to ...
23464 * config/arm/arm_mve.h (__arm_vuninitializedq): ... here.
23465 (__arm_vuninitializedq_u8): Remove.
23466 (__arm_vuninitializedq_u16): Remove.
23467 (__arm_vuninitializedq_u32): Remove.
23468 (__arm_vuninitializedq_u64): Remove.
23469 (__arm_vuninitializedq_s8): Remove.
23470 (__arm_vuninitializedq_s16): Remove.
23471 (__arm_vuninitializedq_s32): Remove.
23472 (__arm_vuninitializedq_s64): Remove.
23473 (__arm_vuninitializedq_f16): Remove.
23474 (__arm_vuninitializedq_f32): Remove.
23476 2023-05-03 Murray Steele <murray.steele@arm.com>
23477 Christophe Lyon <christophe.lyon@arm.com>
23479 * config/arm/arm-mve-builtins-base.cc (vreinterpretq_impl): New class.
23480 * config/arm/arm-mve-builtins-base.def: Define vreinterpretq.
23481 * config/arm/arm-mve-builtins-base.h (vreinterpretq): New declaration.
23482 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): New function.
23483 (parse_type): Likewise.
23484 (parse_signature): Likewise.
23485 (build_one): Likewise.
23486 (build_all): Likewise.
23487 (overloaded_base): New struct.
23488 (unary_convert_def): Likewise.
23489 * config/arm/arm-mve-builtins-shapes.h (unary_convert): Declare.
23490 * config/arm/arm-mve-builtins.cc (TYPES_reinterpret_signed1): New
23492 (TYPES_reinterpret_unsigned1): Likewise.
23493 (TYPES_reinterpret_integer): Likewise.
23494 (TYPES_reinterpret_integer1): Likewise.
23495 (TYPES_reinterpret_float1): Likewise.
23496 (TYPES_reinterpret_float): Likewise.
23497 (reinterpret_integer): New.
23498 (reinterpret_float): New.
23499 (handle_arm_mve_h): Register builtins.
23500 * config/arm/arm_mve.h (vreinterpretq_s16): Remove.
23501 (vreinterpretq_s32): Likewise.
23502 (vreinterpretq_s64): Likewise.
23503 (vreinterpretq_s8): Likewise.
23504 (vreinterpretq_u16): Likewise.
23505 (vreinterpretq_u32): Likewise.
23506 (vreinterpretq_u64): Likewise.
23507 (vreinterpretq_u8): Likewise.
23508 (vreinterpretq_f16): Likewise.
23509 (vreinterpretq_f32): Likewise.
23510 (vreinterpretq_s16_s32): Likewise.
23511 (vreinterpretq_s16_s64): Likewise.
23512 (vreinterpretq_s16_s8): Likewise.
23513 (vreinterpretq_s16_u16): Likewise.
23514 (vreinterpretq_s16_u32): Likewise.
23515 (vreinterpretq_s16_u64): Likewise.
23516 (vreinterpretq_s16_u8): Likewise.
23517 (vreinterpretq_s32_s16): Likewise.
23518 (vreinterpretq_s32_s64): Likewise.
23519 (vreinterpretq_s32_s8): Likewise.
23520 (vreinterpretq_s32_u16): Likewise.
23521 (vreinterpretq_s32_u32): Likewise.
23522 (vreinterpretq_s32_u64): Likewise.
23523 (vreinterpretq_s32_u8): Likewise.
23524 (vreinterpretq_s64_s16): Likewise.
23525 (vreinterpretq_s64_s32): Likewise.
23526 (vreinterpretq_s64_s8): Likewise.
23527 (vreinterpretq_s64_u16): Likewise.
23528 (vreinterpretq_s64_u32): Likewise.
23529 (vreinterpretq_s64_u64): Likewise.
23530 (vreinterpretq_s64_u8): Likewise.
23531 (vreinterpretq_s8_s16): Likewise.
23532 (vreinterpretq_s8_s32): Likewise.
23533 (vreinterpretq_s8_s64): Likewise.
23534 (vreinterpretq_s8_u16): Likewise.
23535 (vreinterpretq_s8_u32): Likewise.
23536 (vreinterpretq_s8_u64): Likewise.
23537 (vreinterpretq_s8_u8): Likewise.
23538 (vreinterpretq_u16_s16): Likewise.
23539 (vreinterpretq_u16_s32): Likewise.
23540 (vreinterpretq_u16_s64): Likewise.
23541 (vreinterpretq_u16_s8): Likewise.
23542 (vreinterpretq_u16_u32): Likewise.
23543 (vreinterpretq_u16_u64): Likewise.
23544 (vreinterpretq_u16_u8): Likewise.
23545 (vreinterpretq_u32_s16): Likewise.
23546 (vreinterpretq_u32_s32): Likewise.
23547 (vreinterpretq_u32_s64): Likewise.
23548 (vreinterpretq_u32_s8): Likewise.
23549 (vreinterpretq_u32_u16): Likewise.
23550 (vreinterpretq_u32_u64): Likewise.
23551 (vreinterpretq_u32_u8): Likewise.
23552 (vreinterpretq_u64_s16): Likewise.
23553 (vreinterpretq_u64_s32): Likewise.
23554 (vreinterpretq_u64_s64): Likewise.
23555 (vreinterpretq_u64_s8): Likewise.
23556 (vreinterpretq_u64_u16): Likewise.
23557 (vreinterpretq_u64_u32): Likewise.
23558 (vreinterpretq_u64_u8): Likewise.
23559 (vreinterpretq_u8_s16): Likewise.
23560 (vreinterpretq_u8_s32): Likewise.
23561 (vreinterpretq_u8_s64): Likewise.
23562 (vreinterpretq_u8_s8): Likewise.
23563 (vreinterpretq_u8_u16): Likewise.
23564 (vreinterpretq_u8_u32): Likewise.
23565 (vreinterpretq_u8_u64): Likewise.
23566 (vreinterpretq_s32_f16): Likewise.
23567 (vreinterpretq_s32_f32): Likewise.
23568 (vreinterpretq_u16_f16): Likewise.
23569 (vreinterpretq_u16_f32): Likewise.
23570 (vreinterpretq_u32_f16): Likewise.
23571 (vreinterpretq_u32_f32): Likewise.
23572 (vreinterpretq_u64_f16): Likewise.
23573 (vreinterpretq_u64_f32): Likewise.
23574 (vreinterpretq_u8_f16): Likewise.
23575 (vreinterpretq_u8_f32): Likewise.
23576 (vreinterpretq_f16_f32): Likewise.
23577 (vreinterpretq_f16_s16): Likewise.
23578 (vreinterpretq_f16_s32): Likewise.
23579 (vreinterpretq_f16_s64): Likewise.
23580 (vreinterpretq_f16_s8): Likewise.
23581 (vreinterpretq_f16_u16): Likewise.
23582 (vreinterpretq_f16_u32): Likewise.
23583 (vreinterpretq_f16_u64): Likewise.
23584 (vreinterpretq_f16_u8): Likewise.
23585 (vreinterpretq_f32_f16): Likewise.
23586 (vreinterpretq_f32_s16): Likewise.
23587 (vreinterpretq_f32_s32): Likewise.
23588 (vreinterpretq_f32_s64): Likewise.
23589 (vreinterpretq_f32_s8): Likewise.
23590 (vreinterpretq_f32_u16): Likewise.
23591 (vreinterpretq_f32_u32): Likewise.
23592 (vreinterpretq_f32_u64): Likewise.
23593 (vreinterpretq_f32_u8): Likewise.
23594 (vreinterpretq_s16_f16): Likewise.
23595 (vreinterpretq_s16_f32): Likewise.
23596 (vreinterpretq_s64_f16): Likewise.
23597 (vreinterpretq_s64_f32): Likewise.
23598 (vreinterpretq_s8_f16): Likewise.
23599 (vreinterpretq_s8_f32): Likewise.
23600 (__arm_vreinterpretq_f16): Likewise.
23601 (__arm_vreinterpretq_f32): Likewise.
23602 (__arm_vreinterpretq_s16): Likewise.
23603 (__arm_vreinterpretq_s32): Likewise.
23604 (__arm_vreinterpretq_s64): Likewise.
23605 (__arm_vreinterpretq_s8): Likewise.
23606 (__arm_vreinterpretq_u16): Likewise.
23607 (__arm_vreinterpretq_u32): Likewise.
23608 (__arm_vreinterpretq_u64): Likewise.
23609 (__arm_vreinterpretq_u8): Likewise.
23610 * config/arm/arm_mve_types.h (__arm_vreinterpretq_s16_s32): Remove.
23611 (__arm_vreinterpretq_s16_s64): Likewise.
23612 (__arm_vreinterpretq_s16_s8): Likewise.
23613 (__arm_vreinterpretq_s16_u16): Likewise.
23614 (__arm_vreinterpretq_s16_u32): Likewise.
23615 (__arm_vreinterpretq_s16_u64): Likewise.
23616 (__arm_vreinterpretq_s16_u8): Likewise.
23617 (__arm_vreinterpretq_s32_s16): Likewise.
23618 (__arm_vreinterpretq_s32_s64): Likewise.
23619 (__arm_vreinterpretq_s32_s8): Likewise.
23620 (__arm_vreinterpretq_s32_u16): Likewise.
23621 (__arm_vreinterpretq_s32_u32): Likewise.
23622 (__arm_vreinterpretq_s32_u64): Likewise.
23623 (__arm_vreinterpretq_s32_u8): Likewise.
23624 (__arm_vreinterpretq_s64_s16): Likewise.
23625 (__arm_vreinterpretq_s64_s32): Likewise.
23626 (__arm_vreinterpretq_s64_s8): Likewise.
23627 (__arm_vreinterpretq_s64_u16): Likewise.
23628 (__arm_vreinterpretq_s64_u32): Likewise.
23629 (__arm_vreinterpretq_s64_u64): Likewise.
23630 (__arm_vreinterpretq_s64_u8): Likewise.
23631 (__arm_vreinterpretq_s8_s16): Likewise.
23632 (__arm_vreinterpretq_s8_s32): Likewise.
23633 (__arm_vreinterpretq_s8_s64): Likewise.
23634 (__arm_vreinterpretq_s8_u16): Likewise.
23635 (__arm_vreinterpretq_s8_u32): Likewise.
23636 (__arm_vreinterpretq_s8_u64): Likewise.
23637 (__arm_vreinterpretq_s8_u8): Likewise.
23638 (__arm_vreinterpretq_u16_s16): Likewise.
23639 (__arm_vreinterpretq_u16_s32): Likewise.
23640 (__arm_vreinterpretq_u16_s64): Likewise.
23641 (__arm_vreinterpretq_u16_s8): Likewise.
23642 (__arm_vreinterpretq_u16_u32): Likewise.
23643 (__arm_vreinterpretq_u16_u64): Likewise.
23644 (__arm_vreinterpretq_u16_u8): Likewise.
23645 (__arm_vreinterpretq_u32_s16): Likewise.
23646 (__arm_vreinterpretq_u32_s32): Likewise.
23647 (__arm_vreinterpretq_u32_s64): Likewise.
23648 (__arm_vreinterpretq_u32_s8): Likewise.
23649 (__arm_vreinterpretq_u32_u16): Likewise.
23650 (__arm_vreinterpretq_u32_u64): Likewise.
23651 (__arm_vreinterpretq_u32_u8): Likewise.
23652 (__arm_vreinterpretq_u64_s16): Likewise.
23653 (__arm_vreinterpretq_u64_s32): Likewise.
23654 (__arm_vreinterpretq_u64_s64): Likewise.
23655 (__arm_vreinterpretq_u64_s8): Likewise.
23656 (__arm_vreinterpretq_u64_u16): Likewise.
23657 (__arm_vreinterpretq_u64_u32): Likewise.
23658 (__arm_vreinterpretq_u64_u8): Likewise.
23659 (__arm_vreinterpretq_u8_s16): Likewise.
23660 (__arm_vreinterpretq_u8_s32): Likewise.
23661 (__arm_vreinterpretq_u8_s64): Likewise.
23662 (__arm_vreinterpretq_u8_s8): Likewise.
23663 (__arm_vreinterpretq_u8_u16): Likewise.
23664 (__arm_vreinterpretq_u8_u32): Likewise.
23665 (__arm_vreinterpretq_u8_u64): Likewise.
23666 (__arm_vreinterpretq_s32_f16): Likewise.
23667 (__arm_vreinterpretq_s32_f32): Likewise.
23668 (__arm_vreinterpretq_s16_f16): Likewise.
23669 (__arm_vreinterpretq_s16_f32): Likewise.
23670 (__arm_vreinterpretq_s64_f16): Likewise.
23671 (__arm_vreinterpretq_s64_f32): Likewise.
23672 (__arm_vreinterpretq_s8_f16): Likewise.
23673 (__arm_vreinterpretq_s8_f32): Likewise.
23674 (__arm_vreinterpretq_u16_f16): Likewise.
23675 (__arm_vreinterpretq_u16_f32): Likewise.
23676 (__arm_vreinterpretq_u32_f16): Likewise.
23677 (__arm_vreinterpretq_u32_f32): Likewise.
23678 (__arm_vreinterpretq_u64_f16): Likewise.
23679 (__arm_vreinterpretq_u64_f32): Likewise.
23680 (__arm_vreinterpretq_u8_f16): Likewise.
23681 (__arm_vreinterpretq_u8_f32): Likewise.
23682 (__arm_vreinterpretq_f16_f32): Likewise.
23683 (__arm_vreinterpretq_f16_s16): Likewise.
23684 (__arm_vreinterpretq_f16_s32): Likewise.
23685 (__arm_vreinterpretq_f16_s64): Likewise.
23686 (__arm_vreinterpretq_f16_s8): Likewise.
23687 (__arm_vreinterpretq_f16_u16): Likewise.
23688 (__arm_vreinterpretq_f16_u32): Likewise.
23689 (__arm_vreinterpretq_f16_u64): Likewise.
23690 (__arm_vreinterpretq_f16_u8): Likewise.
23691 (__arm_vreinterpretq_f32_f16): Likewise.
23692 (__arm_vreinterpretq_f32_s16): Likewise.
23693 (__arm_vreinterpretq_f32_s32): Likewise.
23694 (__arm_vreinterpretq_f32_s64): Likewise.
23695 (__arm_vreinterpretq_f32_s8): Likewise.
23696 (__arm_vreinterpretq_f32_u16): Likewise.
23697 (__arm_vreinterpretq_f32_u32): Likewise.
23698 (__arm_vreinterpretq_f32_u64): Likewise.
23699 (__arm_vreinterpretq_f32_u8): Likewise.
23700 (__arm_vreinterpretq_s16): Likewise.
23701 (__arm_vreinterpretq_s32): Likewise.
23702 (__arm_vreinterpretq_s64): Likewise.
23703 (__arm_vreinterpretq_s8): Likewise.
23704 (__arm_vreinterpretq_u16): Likewise.
23705 (__arm_vreinterpretq_u32): Likewise.
23706 (__arm_vreinterpretq_u64): Likewise.
23707 (__arm_vreinterpretq_u8): Likewise.
23708 (__arm_vreinterpretq_f16): Likewise.
23709 (__arm_vreinterpretq_f32): Likewise.
23710 * config/arm/mve.md (@arm_mve_reinterpret<mode>): New pattern.
23711 * config/arm/unspecs.md: (REINTERPRET): New unspec.
23713 2023-05-03 Murray Steele <murray.steele@arm.com>
23714 Christophe Lyon <christophe.lyon@arm.com>
23715 Christophe Lyon <christophe.lyon@arm.com
23717 * config.gcc: Add arm-mve-builtins-base.o and
23718 arm-mve-builtins-shapes.o to extra_objs.
23719 * config/arm/arm-builtins.cc (arm_builtin_decl): Handle MVE builtin
23721 (arm_expand_builtin): Likewise
23722 (arm_check_builtin_call): Likewise
23723 (arm_describe_resolver): Likewise.
23724 * config/arm/arm-builtins.h (enum resolver_ident): Add
23726 * config/arm/arm-c.cc (arm_pragma_arm): Handle new pragma.
23727 (arm_resolve_overloaded_builtin): Handle MVE builtins.
23728 (arm_register_target_pragmas): Register arm_check_builtin_call.
23729 * config/arm/arm-mve-builtins.cc (class registered_function): New
23731 (struct registered_function_hasher): New struct.
23732 (pred_suffixes): New table.
23733 (mode_suffixes): New table.
23734 (type_suffix_info): New table.
23735 (TYPES_float16): New.
23736 (TYPES_all_float): New.
23737 (TYPES_integer_8): New.
23738 (TYPES_integer_8_16): New.
23739 (TYPES_integer_16_32): New.
23740 (TYPES_integer_32): New.
23741 (TYPES_signed_16_32): New.
23742 (TYPES_signed_32): New.
23743 (TYPES_all_signed): New.
23744 (TYPES_all_unsigned): New.
23745 (TYPES_all_integer): New.
23746 (TYPES_all_integer_with_64): New.
23747 (DEF_VECTOR_TYPE): New.
23748 (DEF_DOUBLE_TYPE): New.
23749 (DEF_MVE_TYPES_ARRAY): New.
23750 (all_integer): New.
23751 (all_integer_with_64): New.
23755 (all_unsigned): New.
23757 (integer_8_16): New.
23758 (integer_16_32): New.
23760 (signed_16_32): New.
23762 (register_vector_type): Use void_type_node for mve.fp-only types when
23763 mve.fp is not enabled.
23764 (register_builtin_tuple_types): Likewise.
23765 (handle_arm_mve_h): New function..
23766 (matches_type_p): Likewise..
23767 (report_out_of_range): Likewise.
23768 (report_not_enum): Likewise.
23769 (report_missing_float): Likewise.
23770 (report_non_ice): Likewise.
23771 (check_requires_float): Likewise.
23772 (function_instance::hash): Likewise
23773 (function_instance::call_properties): Likewise.
23774 (function_instance::reads_global_state_p): Likewise.
23775 (function_instance::modifies_global_state_p): Likewise.
23776 (function_instance::could_trap_p): Likewise.
23777 (function_instance::has_inactive_argument): Likewise.
23778 (registered_function_hasher::hash): Likewise.
23779 (registered_function_hasher::equal): Likewise.
23780 (function_builder::function_builder): Likewise.
23781 (function_builder::~function_builder): Likewise.
23782 (function_builder::append_name): Likewise.
23783 (function_builder::finish_name): Likewise.
23784 (function_builder::get_name): Likewise.
23785 (add_attribute): Likewise.
23786 (function_builder::get_attributes): Likewise.
23787 (function_builder::add_function): Likewise.
23788 (function_builder::add_unique_function): Likewise.
23789 (function_builder::add_overloaded_function): Likewise.
23790 (function_builder::add_overloaded_functions): Likewise.
23791 (function_builder::register_function_group): Likewise.
23792 (function_call_info::function_call_info): Likewise.
23793 (function_resolver::function_resolver): Likewise.
23794 (function_resolver::get_vector_type): Likewise.
23795 (function_resolver::get_scalar_type_name): Likewise.
23796 (function_resolver::get_argument_type): Likewise.
23797 (function_resolver::scalar_argument_p): Likewise.
23798 (function_resolver::report_no_such_form): Likewise.
23799 (function_resolver::lookup_form): Likewise.
23800 (function_resolver::resolve_to): Likewise.
23801 (function_resolver::infer_vector_or_tuple_type): Likewise.
23802 (function_resolver::infer_vector_type): Likewise.
23803 (function_resolver::require_vector_or_scalar_type): Likewise.
23804 (function_resolver::require_vector_type): Likewise.
23805 (function_resolver::require_matching_vector_type): Likewise.
23806 (function_resolver::require_derived_vector_type): Likewise.
23807 (function_resolver::require_derived_scalar_type): Likewise.
23808 (function_resolver::require_integer_immediate): Likewise.
23809 (function_resolver::require_scalar_type): Likewise.
23810 (function_resolver::check_num_arguments): Likewise.
23811 (function_resolver::check_gp_argument): Likewise.
23812 (function_resolver::finish_opt_n_resolution): Likewise.
23813 (function_resolver::resolve_unary): Likewise.
23814 (function_resolver::resolve_unary_n): Likewise.
23815 (function_resolver::resolve_uniform): Likewise.
23816 (function_resolver::resolve_uniform_opt_n): Likewise.
23817 (function_resolver::resolve): Likewise.
23818 (function_checker::function_checker): Likewise.
23819 (function_checker::argument_exists_p): Likewise.
23820 (function_checker::require_immediate): Likewise.
23821 (function_checker::require_immediate_enum): Likewise.
23822 (function_checker::require_immediate_range): Likewise.
23823 (function_checker::check): Likewise.
23824 (gimple_folder::gimple_folder): Likewise.
23825 (gimple_folder::fold): Likewise.
23826 (function_expander::function_expander): Likewise.
23827 (function_expander::direct_optab_handler): Likewise.
23828 (function_expander::get_fallback_value): Likewise.
23829 (function_expander::get_reg_target): Likewise.
23830 (function_expander::add_output_operand): Likewise.
23831 (function_expander::add_input_operand): Likewise.
23832 (function_expander::add_integer_operand): Likewise.
23833 (function_expander::generate_insn): Likewise.
23834 (function_expander::use_exact_insn): Likewise.
23835 (function_expander::use_unpred_insn): Likewise.
23836 (function_expander::use_pred_x_insn): Likewise.
23837 (function_expander::use_cond_insn): Likewise.
23838 (function_expander::map_to_rtx_codes): Likewise.
23839 (function_expander::expand): Likewise.
23840 (resolve_overloaded_builtin): Likewise.
23841 (check_builtin_call): Likewise.
23842 (gimple_fold_builtin): Likewise.
23843 (expand_builtin): Likewise.
23844 (gt_ggc_mx): Likewise.
23845 (gt_pch_nx): Likewise.
23846 (gt_pch_nx): Likewise.
23847 * config/arm/arm-mve-builtins.def(s8): Define new type suffix.
23858 (offset): New mode.
23859 * config/arm/arm-mve-builtins.h (MAX_TUPLE_SIZE): New constant.
23860 (CP_READ_FPCR): Likewise.
23861 (CP_RAISE_FP_EXCEPTIONS): Likewise.
23862 (CP_READ_MEMORY): Likewise.
23863 (CP_WRITE_MEMORY): Likewise.
23864 (enum units_index): New enum.
23865 (enum predication_index): New.
23866 (enum type_class_index): New.
23867 (enum mode_suffix_index): New enum.
23868 (enum type_suffix_index): New.
23869 (struct mode_suffix_info): New struct.
23870 (struct type_suffix_info): New.
23871 (struct function_group_info): Likewise.
23872 (class function_instance): Likewise.
23873 (class registered_function): Likewise.
23874 (class function_builder): Likewise.
23875 (class function_call_info): Likewise.
23876 (class function_resolver): Likewise.
23877 (class function_checker): Likewise.
23878 (class gimple_folder): Likewise.
23879 (class function_expander): Likewise.
23880 (get_mve_pred16_t): Likewise.
23881 (find_mode_suffix): New function.
23882 (class function_base): Likewise.
23883 (class function_shape): Likewise.
23884 (function_instance::operator==): New function.
23885 (function_instance::operator!=): Likewise.
23886 (function_instance::vectors_per_tuple): Likewise.
23887 (function_instance::mode_suffix): Likewise.
23888 (function_instance::type_suffix): Likewise.
23889 (function_instance::scalar_type): Likewise.
23890 (function_instance::vector_type): Likewise.
23891 (function_instance::tuple_type): Likewise.
23892 (function_instance::vector_mode): Likewise.
23893 (function_call_info::function_returns_void_p): Likewise.
23894 (function_base::call_properties): Likewise.
23895 * config/arm/arm-protos.h (enum arm_builtin_class): Add
23897 (handle_arm_mve_h): New.
23898 (resolve_overloaded_builtin): New.
23899 (check_builtin_call): New.
23900 (gimple_fold_builtin): New.
23901 (expand_builtin): New.
23902 * config/arm/arm.cc (TARGET_GIMPLE_FOLD_BUILTIN): Define as
23903 arm_gimple_fold_builtin.
23904 (arm_gimple_fold_builtin): New function.
23905 * config/arm/arm_mve.h: Use new arm_mve.h pragma.
23906 * config/arm/predicates.md (arm_any_register_operand): New predicate.
23907 * config/arm/t-arm: (arm-mve-builtins.o): Add includes.
23908 (arm-mve-builtins-shapes.o): New target.
23909 (arm-mve-builtins-base.o): New target.
23910 * config/arm/arm-mve-builtins-base.cc: New file.
23911 * config/arm/arm-mve-builtins-base.def: New file.
23912 * config/arm/arm-mve-builtins-base.h: New file.
23913 * config/arm/arm-mve-builtins-functions.h: New file.
23914 * config/arm/arm-mve-builtins-shapes.cc: New file.
23915 * config/arm/arm-mve-builtins-shapes.h: New file.
23917 2023-05-03 Murray Steele <murray.steele@arm.com>
23918 Christophe Lyon <christophe.lyon@arm.com>
23919 Christophe Lyon <christophe.lyon@arm.com>
23921 * config/arm/arm-builtins.cc (arm_general_add_builtin_function):
23923 (arm_init_builtin): Use arm_general_add_builtin_function instead
23924 of arm_add_builtin_function.
23925 (arm_init_acle_builtins): Likewise.
23926 (arm_init_mve_builtins): Likewise.
23927 (arm_init_crypto_builtins): Likewise.
23928 (arm_init_builtins): Likewise.
23929 (arm_general_builtin_decl): New function.
23930 (arm_builtin_decl): Defer to numberspace-specialized functions.
23931 (arm_expand_builtin_args): Rename into arm_general_expand_builtin_args.
23932 (arm_expand_builtin_1): Rename into arm_general_expand_builtin_1 and ...
23933 (arm_general_expand_builtin_1): ... specialize for general builtins.
23934 (arm_expand_acle_builtin): Use arm_general_expand_builtin
23935 instead of arm_expand_builtin.
23936 (arm_expand_mve_builtin): Likewise.
23937 (arm_expand_neon_builtin): Likewise.
23938 (arm_expand_vfp_builtin): Likewise.
23939 (arm_general_expand_builtin): New function.
23940 (arm_expand_builtin): Specialize for general builtins.
23941 (arm_general_check_builtin_call): New function.
23942 (arm_check_builtin_call): Specialize for general builtins.
23943 (arm_describe_resolver): Validate numberspace.
23944 (arm_cde_end_args): Likewise.
23945 * config/arm/arm-protos.h (enum arm_builtin_class): New enum.
23946 (ARM_BUILTIN_SHIFT, ARM_BUILTIN_CLASS): New constants.
23948 2023-05-03 Martin Liska <mliska@suse.cz>
23951 * config/riscv/sync.md: Add gcc_unreachable to a switch.
23953 2023-05-03 Richard Biener <rguenther@suse.de>
23955 * tree-ssa-loop-split.cc (split_at_bb_p): Avoid last_stmt.
23956 (patch_loop_exit): Likewise.
23957 (connect_loops): Likewise.
23958 (split_loop): Likewise.
23959 (control_dep_semi_invariant_p): Likewise.
23960 (do_split_loop_on_cond): Likewise.
23961 (split_loop_on_cond): Likewise.
23962 * tree-ssa-loop-unswitch.cc (find_unswitching_predicates_for_bb):
23964 (simplify_loop_version): Likewise.
23965 (evaluate_bbs): Likewise.
23966 (find_loop_guard): Likewise.
23967 (clean_up_after_unswitching): Likewise.
23968 * tree-ssa-math-opts.cc (maybe_optimize_guarding_check):
23970 (optimize_spaceship): Take a gcond * argument, avoid
23972 (math_opts_dom_walker::after_dom_children): Adjust call to
23973 optimize_spaceship.
23974 * tree-vrp.cc (maybe_set_nonzero_bits): Avoid last_stmt.
23975 * value-pointer-equiv.cc (pointer_equiv_analyzer::visit_edge):
23978 2023-05-03 Andreas Schwab <schwab@suse.de>
23980 * config/riscv/linux.h (LIB_SPEC): Don't redefine.
23982 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23984 * config/riscv/riscv-vector-builtins-bases.cc (fold_fault_load):
23986 (class vlseg): New class.
23987 (class vsseg): Ditto.
23988 (class vlsseg): Ditto.
23989 (class vssseg): Ditto.
23990 (class seg_indexed_load): Ditto.
23991 (class seg_indexed_store): Ditto.
23992 (class vlsegff): Ditto.
23994 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
23995 * config/riscv/riscv-vector-builtins-functions.def (vlseg):
24005 * config/riscv/riscv-vector-builtins-shapes.cc (struct
24006 seg_loadstore_def): Ditto.
24007 (struct seg_indexed_loadstore_def): Ditto.
24008 (struct seg_fault_load_def): Ditto.
24010 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
24011 * config/riscv/riscv-vector-builtins.cc
24012 (function_builder::append_nf): New function.
24013 * config/riscv/riscv-vector-builtins.def (vfloat32m1x2_t):
24014 Change ptr from double into float.
24015 (vfloat32m1x3_t): Ditto.
24016 (vfloat32m1x4_t): Ditto.
24017 (vfloat32m1x5_t): Ditto.
24018 (vfloat32m1x6_t): Ditto.
24019 (vfloat32m1x7_t): Ditto.
24020 (vfloat32m1x8_t): Ditto.
24021 (vfloat32m2x2_t): Ditto.
24022 (vfloat32m2x3_t): Ditto.
24023 (vfloat32m2x4_t): Ditto.
24024 (vfloat32m4x2_t): Ditto.
24025 * config/riscv/riscv-vector-builtins.h: Add segment intrinsics.
24026 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Adapt for
24028 * config/riscv/riscv.md: Add segment instructions.
24029 * config/riscv/vector-iterators.md: Support segment intrinsics.
24030 * config/riscv/vector.md (@pred_unit_strided_load<mode>): New
24032 (@pred_unit_strided_store<mode>): Ditto.
24033 (@pred_strided_load<mode>): Ditto.
24034 (@pred_strided_store<mode>): Ditto.
24035 (@pred_fault_load<mode>): Ditto.
24036 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
24037 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
24038 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
24039 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
24040 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
24041 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
24042 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
24043 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
24044 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
24045 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
24046 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
24047 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
24048 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
24049 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
24051 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24053 * config/riscv/genrvv-type-indexer.cc (valid_type): Adapt for
24054 tuple type support.
24056 (floattype): Ditto.
24058 * config/riscv/riscv-vector-builtins-bases.cc: Ditto.
24059 * config/riscv/riscv-vector-builtins-functions.def (vset): Add
24061 (vget): Add tuple type vget.
24062 * config/riscv/riscv-vector-builtins-types.def
24063 (DEF_RVV_TUPLE_OPS): New macro.
24064 (vint8mf8x2_t): Ditto.
24065 (vuint8mf8x2_t): Ditto.
24066 (vint8mf8x3_t): Ditto.
24067 (vuint8mf8x3_t): Ditto.
24068 (vint8mf8x4_t): Ditto.
24069 (vuint8mf8x4_t): Ditto.
24070 (vint8mf8x5_t): Ditto.
24071 (vuint8mf8x5_t): Ditto.
24072 (vint8mf8x6_t): Ditto.
24073 (vuint8mf8x6_t): Ditto.
24074 (vint8mf8x7_t): Ditto.
24075 (vuint8mf8x7_t): Ditto.
24076 (vint8mf8x8_t): Ditto.
24077 (vuint8mf8x8_t): Ditto.
24078 (vint8mf4x2_t): Ditto.
24079 (vuint8mf4x2_t): Ditto.
24080 (vint8mf4x3_t): Ditto.
24081 (vuint8mf4x3_t): Ditto.
24082 (vint8mf4x4_t): Ditto.
24083 (vuint8mf4x4_t): Ditto.
24084 (vint8mf4x5_t): Ditto.
24085 (vuint8mf4x5_t): Ditto.
24086 (vint8mf4x6_t): Ditto.
24087 (vuint8mf4x6_t): Ditto.
24088 (vint8mf4x7_t): Ditto.
24089 (vuint8mf4x7_t): Ditto.
24090 (vint8mf4x8_t): Ditto.
24091 (vuint8mf4x8_t): Ditto.
24092 (vint8mf2x2_t): Ditto.
24093 (vuint8mf2x2_t): Ditto.
24094 (vint8mf2x3_t): Ditto.
24095 (vuint8mf2x3_t): Ditto.
24096 (vint8mf2x4_t): Ditto.
24097 (vuint8mf2x4_t): Ditto.
24098 (vint8mf2x5_t): Ditto.
24099 (vuint8mf2x5_t): Ditto.
24100 (vint8mf2x6_t): Ditto.
24101 (vuint8mf2x6_t): Ditto.
24102 (vint8mf2x7_t): Ditto.
24103 (vuint8mf2x7_t): Ditto.
24104 (vint8mf2x8_t): Ditto.
24105 (vuint8mf2x8_t): Ditto.
24106 (vint8m1x2_t): Ditto.
24107 (vuint8m1x2_t): Ditto.
24108 (vint8m1x3_t): Ditto.
24109 (vuint8m1x3_t): Ditto.
24110 (vint8m1x4_t): Ditto.
24111 (vuint8m1x4_t): Ditto.
24112 (vint8m1x5_t): Ditto.
24113 (vuint8m1x5_t): Ditto.
24114 (vint8m1x6_t): Ditto.
24115 (vuint8m1x6_t): Ditto.
24116 (vint8m1x7_t): Ditto.
24117 (vuint8m1x7_t): Ditto.
24118 (vint8m1x8_t): Ditto.
24119 (vuint8m1x8_t): Ditto.
24120 (vint8m2x2_t): Ditto.
24121 (vuint8m2x2_t): Ditto.
24122 (vint8m2x3_t): Ditto.
24123 (vuint8m2x3_t): Ditto.
24124 (vint8m2x4_t): Ditto.
24125 (vuint8m2x4_t): Ditto.
24126 (vint8m4x2_t): Ditto.
24127 (vuint8m4x2_t): Ditto.
24128 (vint16mf4x2_t): Ditto.
24129 (vuint16mf4x2_t): Ditto.
24130 (vint16mf4x3_t): Ditto.
24131 (vuint16mf4x3_t): Ditto.
24132 (vint16mf4x4_t): Ditto.
24133 (vuint16mf4x4_t): Ditto.
24134 (vint16mf4x5_t): Ditto.
24135 (vuint16mf4x5_t): Ditto.
24136 (vint16mf4x6_t): Ditto.
24137 (vuint16mf4x6_t): Ditto.
24138 (vint16mf4x7_t): Ditto.
24139 (vuint16mf4x7_t): Ditto.
24140 (vint16mf4x8_t): Ditto.
24141 (vuint16mf4x8_t): Ditto.
24142 (vint16mf2x2_t): Ditto.
24143 (vuint16mf2x2_t): Ditto.
24144 (vint16mf2x3_t): Ditto.
24145 (vuint16mf2x3_t): Ditto.
24146 (vint16mf2x4_t): Ditto.
24147 (vuint16mf2x4_t): Ditto.
24148 (vint16mf2x5_t): Ditto.
24149 (vuint16mf2x5_t): Ditto.
24150 (vint16mf2x6_t): Ditto.
24151 (vuint16mf2x6_t): Ditto.
24152 (vint16mf2x7_t): Ditto.
24153 (vuint16mf2x7_t): Ditto.
24154 (vint16mf2x8_t): Ditto.
24155 (vuint16mf2x8_t): Ditto.
24156 (vint16m1x2_t): Ditto.
24157 (vuint16m1x2_t): Ditto.
24158 (vint16m1x3_t): Ditto.
24159 (vuint16m1x3_t): Ditto.
24160 (vint16m1x4_t): Ditto.
24161 (vuint16m1x4_t): Ditto.
24162 (vint16m1x5_t): Ditto.
24163 (vuint16m1x5_t): Ditto.
24164 (vint16m1x6_t): Ditto.
24165 (vuint16m1x6_t): Ditto.
24166 (vint16m1x7_t): Ditto.
24167 (vuint16m1x7_t): Ditto.
24168 (vint16m1x8_t): Ditto.
24169 (vuint16m1x8_t): Ditto.
24170 (vint16m2x2_t): Ditto.
24171 (vuint16m2x2_t): Ditto.
24172 (vint16m2x3_t): Ditto.
24173 (vuint16m2x3_t): Ditto.
24174 (vint16m2x4_t): Ditto.
24175 (vuint16m2x4_t): Ditto.
24176 (vint16m4x2_t): Ditto.
24177 (vuint16m4x2_t): Ditto.
24178 (vint32mf2x2_t): Ditto.
24179 (vuint32mf2x2_t): Ditto.
24180 (vint32mf2x3_t): Ditto.
24181 (vuint32mf2x3_t): Ditto.
24182 (vint32mf2x4_t): Ditto.
24183 (vuint32mf2x4_t): Ditto.
24184 (vint32mf2x5_t): Ditto.
24185 (vuint32mf2x5_t): Ditto.
24186 (vint32mf2x6_t): Ditto.
24187 (vuint32mf2x6_t): Ditto.
24188 (vint32mf2x7_t): Ditto.
24189 (vuint32mf2x7_t): Ditto.
24190 (vint32mf2x8_t): Ditto.
24191 (vuint32mf2x8_t): Ditto.
24192 (vint32m1x2_t): Ditto.
24193 (vuint32m1x2_t): Ditto.
24194 (vint32m1x3_t): Ditto.
24195 (vuint32m1x3_t): Ditto.
24196 (vint32m1x4_t): Ditto.
24197 (vuint32m1x4_t): Ditto.
24198 (vint32m1x5_t): Ditto.
24199 (vuint32m1x5_t): Ditto.
24200 (vint32m1x6_t): Ditto.
24201 (vuint32m1x6_t): Ditto.
24202 (vint32m1x7_t): Ditto.
24203 (vuint32m1x7_t): Ditto.
24204 (vint32m1x8_t): Ditto.
24205 (vuint32m1x8_t): Ditto.
24206 (vint32m2x2_t): Ditto.
24207 (vuint32m2x2_t): Ditto.
24208 (vint32m2x3_t): Ditto.
24209 (vuint32m2x3_t): Ditto.
24210 (vint32m2x4_t): Ditto.
24211 (vuint32m2x4_t): Ditto.
24212 (vint32m4x2_t): Ditto.
24213 (vuint32m4x2_t): Ditto.
24214 (vint64m1x2_t): Ditto.
24215 (vuint64m1x2_t): Ditto.
24216 (vint64m1x3_t): Ditto.
24217 (vuint64m1x3_t): Ditto.
24218 (vint64m1x4_t): Ditto.
24219 (vuint64m1x4_t): Ditto.
24220 (vint64m1x5_t): Ditto.
24221 (vuint64m1x5_t): Ditto.
24222 (vint64m1x6_t): Ditto.
24223 (vuint64m1x6_t): Ditto.
24224 (vint64m1x7_t): Ditto.
24225 (vuint64m1x7_t): Ditto.
24226 (vint64m1x8_t): Ditto.
24227 (vuint64m1x8_t): Ditto.
24228 (vint64m2x2_t): Ditto.
24229 (vuint64m2x2_t): Ditto.
24230 (vint64m2x3_t): Ditto.
24231 (vuint64m2x3_t): Ditto.
24232 (vint64m2x4_t): Ditto.
24233 (vuint64m2x4_t): Ditto.
24234 (vint64m4x2_t): Ditto.
24235 (vuint64m4x2_t): Ditto.
24236 (vfloat32mf2x2_t): Ditto.
24237 (vfloat32mf2x3_t): Ditto.
24238 (vfloat32mf2x4_t): Ditto.
24239 (vfloat32mf2x5_t): Ditto.
24240 (vfloat32mf2x6_t): Ditto.
24241 (vfloat32mf2x7_t): Ditto.
24242 (vfloat32mf2x8_t): Ditto.
24243 (vfloat32m1x2_t): Ditto.
24244 (vfloat32m1x3_t): Ditto.
24245 (vfloat32m1x4_t): Ditto.
24246 (vfloat32m1x5_t): Ditto.
24247 (vfloat32m1x6_t): Ditto.
24248 (vfloat32m1x7_t): Ditto.
24249 (vfloat32m1x8_t): Ditto.
24250 (vfloat32m2x2_t): Ditto.
24251 (vfloat32m2x3_t): Ditto.
24252 (vfloat32m2x4_t): Ditto.
24253 (vfloat32m4x2_t): Ditto.
24254 (vfloat64m1x2_t): Ditto.
24255 (vfloat64m1x3_t): Ditto.
24256 (vfloat64m1x4_t): Ditto.
24257 (vfloat64m1x5_t): Ditto.
24258 (vfloat64m1x6_t): Ditto.
24259 (vfloat64m1x7_t): Ditto.
24260 (vfloat64m1x8_t): Ditto.
24261 (vfloat64m2x2_t): Ditto.
24262 (vfloat64m2x3_t): Ditto.
24263 (vfloat64m2x4_t): Ditto.
24264 (vfloat64m4x2_t): Ditto.
24265 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_OPS):
24267 (DEF_RVV_TYPE_INDEX): Ditto.
24268 (rvv_arg_type_info::get_tuple_subpart_type): New function.
24269 (DEF_RVV_TUPLE_TYPE): New macro.
24270 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE_INDEX):
24271 Adapt for tuple vget/vset support.
24272 (vint8mf4_t): Ditto.
24273 (vuint8mf4_t): Ditto.
24274 (vint8mf2_t): Ditto.
24275 (vuint8mf2_t): Ditto.
24276 (vint8m1_t): Ditto.
24277 (vuint8m1_t): Ditto.
24278 (vint8m2_t): Ditto.
24279 (vuint8m2_t): Ditto.
24280 (vint8m4_t): Ditto.
24281 (vuint8m4_t): Ditto.
24282 (vint8m8_t): Ditto.
24283 (vuint8m8_t): Ditto.
24284 (vint16mf4_t): Ditto.
24285 (vuint16mf4_t): Ditto.
24286 (vint16mf2_t): Ditto.
24287 (vuint16mf2_t): Ditto.
24288 (vint16m1_t): Ditto.
24289 (vuint16m1_t): Ditto.
24290 (vint16m2_t): Ditto.
24291 (vuint16m2_t): Ditto.
24292 (vint16m4_t): Ditto.
24293 (vuint16m4_t): Ditto.
24294 (vint16m8_t): Ditto.
24295 (vuint16m8_t): Ditto.
24296 (vint32mf2_t): Ditto.
24297 (vuint32mf2_t): Ditto.
24298 (vint32m1_t): Ditto.
24299 (vuint32m1_t): Ditto.
24300 (vint32m2_t): Ditto.
24301 (vuint32m2_t): Ditto.
24302 (vint32m4_t): Ditto.
24303 (vuint32m4_t): Ditto.
24304 (vint32m8_t): Ditto.
24305 (vuint32m8_t): Ditto.
24306 (vint64m1_t): Ditto.
24307 (vuint64m1_t): Ditto.
24308 (vint64m2_t): Ditto.
24309 (vuint64m2_t): Ditto.
24310 (vint64m4_t): Ditto.
24311 (vuint64m4_t): Ditto.
24312 (vint64m8_t): Ditto.
24313 (vuint64m8_t): Ditto.
24314 (vfloat32mf2_t): Ditto.
24315 (vfloat32m1_t): Ditto.
24316 (vfloat32m2_t): Ditto.
24317 (vfloat32m4_t): Ditto.
24318 (vfloat32m8_t): Ditto.
24319 (vfloat64m1_t): Ditto.
24320 (vfloat64m2_t): Ditto.
24321 (vfloat64m4_t): Ditto.
24322 (vfloat64m8_t): Ditto.
24323 (tuple_subpart): Add tuple subpart base type.
24324 * config/riscv/riscv-vector-builtins.h (struct
24325 rvv_arg_type_info): Ditto.
24326 (tuple_type_field): New function.
24328 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24330 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
24331 (RVV_TUPLE_PARTIAL_MODES): Ditto.
24332 * config/riscv/riscv-protos.h (riscv_v_ext_tuple_mode_p): New
24335 (get_subpart_mode): Ditto.
24336 (get_tuple_mode): Ditto.
24337 (expand_tuple_move): Ditto.
24338 * config/riscv/riscv-v.cc (ENTRY): New macro.
24339 (TUPLE_ENTRY): Ditto.
24340 (get_nf): New function.
24341 (get_subpart_mode): Ditto.
24342 (get_tuple_mode): Ditto.
24343 (expand_tuple_move): Ditto.
24344 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_TYPE):
24346 (register_tuple_type): New function
24347 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TUPLE_TYPE):
24349 (vint8mf8x2_t): New macro.
24350 (vuint8mf8x2_t): Ditto.
24351 (vint8mf8x3_t): Ditto.
24352 (vuint8mf8x3_t): Ditto.
24353 (vint8mf8x4_t): Ditto.
24354 (vuint8mf8x4_t): Ditto.
24355 (vint8mf8x5_t): Ditto.
24356 (vuint8mf8x5_t): Ditto.
24357 (vint8mf8x6_t): Ditto.
24358 (vuint8mf8x6_t): Ditto.
24359 (vint8mf8x7_t): Ditto.
24360 (vuint8mf8x7_t): Ditto.
24361 (vint8mf8x8_t): Ditto.
24362 (vuint8mf8x8_t): Ditto.
24363 (vint8mf4x2_t): Ditto.
24364 (vuint8mf4x2_t): Ditto.
24365 (vint8mf4x3_t): Ditto.
24366 (vuint8mf4x3_t): Ditto.
24367 (vint8mf4x4_t): Ditto.
24368 (vuint8mf4x4_t): Ditto.
24369 (vint8mf4x5_t): Ditto.
24370 (vuint8mf4x5_t): Ditto.
24371 (vint8mf4x6_t): Ditto.
24372 (vuint8mf4x6_t): Ditto.
24373 (vint8mf4x7_t): Ditto.
24374 (vuint8mf4x7_t): Ditto.
24375 (vint8mf4x8_t): Ditto.
24376 (vuint8mf4x8_t): Ditto.
24377 (vint8mf2x2_t): Ditto.
24378 (vuint8mf2x2_t): Ditto.
24379 (vint8mf2x3_t): Ditto.
24380 (vuint8mf2x3_t): Ditto.
24381 (vint8mf2x4_t): Ditto.
24382 (vuint8mf2x4_t): Ditto.
24383 (vint8mf2x5_t): Ditto.
24384 (vuint8mf2x5_t): Ditto.
24385 (vint8mf2x6_t): Ditto.
24386 (vuint8mf2x6_t): Ditto.
24387 (vint8mf2x7_t): Ditto.
24388 (vuint8mf2x7_t): Ditto.
24389 (vint8mf2x8_t): Ditto.
24390 (vuint8mf2x8_t): Ditto.
24391 (vint8m1x2_t): Ditto.
24392 (vuint8m1x2_t): Ditto.
24393 (vint8m1x3_t): Ditto.
24394 (vuint8m1x3_t): Ditto.
24395 (vint8m1x4_t): Ditto.
24396 (vuint8m1x4_t): Ditto.
24397 (vint8m1x5_t): Ditto.
24398 (vuint8m1x5_t): Ditto.
24399 (vint8m1x6_t): Ditto.
24400 (vuint8m1x6_t): Ditto.
24401 (vint8m1x7_t): Ditto.
24402 (vuint8m1x7_t): Ditto.
24403 (vint8m1x8_t): Ditto.
24404 (vuint8m1x8_t): Ditto.
24405 (vint8m2x2_t): Ditto.
24406 (vuint8m2x2_t): Ditto.
24407 (vint8m2x3_t): Ditto.
24408 (vuint8m2x3_t): Ditto.
24409 (vint8m2x4_t): Ditto.
24410 (vuint8m2x4_t): Ditto.
24411 (vint8m4x2_t): Ditto.
24412 (vuint8m4x2_t): Ditto.
24413 (vint16mf4x2_t): Ditto.
24414 (vuint16mf4x2_t): Ditto.
24415 (vint16mf4x3_t): Ditto.
24416 (vuint16mf4x3_t): Ditto.
24417 (vint16mf4x4_t): Ditto.
24418 (vuint16mf4x4_t): Ditto.
24419 (vint16mf4x5_t): Ditto.
24420 (vuint16mf4x5_t): Ditto.
24421 (vint16mf4x6_t): Ditto.
24422 (vuint16mf4x6_t): Ditto.
24423 (vint16mf4x7_t): Ditto.
24424 (vuint16mf4x7_t): Ditto.
24425 (vint16mf4x8_t): Ditto.
24426 (vuint16mf4x8_t): Ditto.
24427 (vint16mf2x2_t): Ditto.
24428 (vuint16mf2x2_t): Ditto.
24429 (vint16mf2x3_t): Ditto.
24430 (vuint16mf2x3_t): Ditto.
24431 (vint16mf2x4_t): Ditto.
24432 (vuint16mf2x4_t): Ditto.
24433 (vint16mf2x5_t): Ditto.
24434 (vuint16mf2x5_t): Ditto.
24435 (vint16mf2x6_t): Ditto.
24436 (vuint16mf2x6_t): Ditto.
24437 (vint16mf2x7_t): Ditto.
24438 (vuint16mf2x7_t): Ditto.
24439 (vint16mf2x8_t): Ditto.
24440 (vuint16mf2x8_t): Ditto.
24441 (vint16m1x2_t): Ditto.
24442 (vuint16m1x2_t): Ditto.
24443 (vint16m1x3_t): Ditto.
24444 (vuint16m1x3_t): Ditto.
24445 (vint16m1x4_t): Ditto.
24446 (vuint16m1x4_t): Ditto.
24447 (vint16m1x5_t): Ditto.
24448 (vuint16m1x5_t): Ditto.
24449 (vint16m1x6_t): Ditto.
24450 (vuint16m1x6_t): Ditto.
24451 (vint16m1x7_t): Ditto.
24452 (vuint16m1x7_t): Ditto.
24453 (vint16m1x8_t): Ditto.
24454 (vuint16m1x8_t): Ditto.
24455 (vint16m2x2_t): Ditto.
24456 (vuint16m2x2_t): Ditto.
24457 (vint16m2x3_t): Ditto.
24458 (vuint16m2x3_t): Ditto.
24459 (vint16m2x4_t): Ditto.
24460 (vuint16m2x4_t): Ditto.
24461 (vint16m4x2_t): Ditto.
24462 (vuint16m4x2_t): Ditto.
24463 (vint32mf2x2_t): Ditto.
24464 (vuint32mf2x2_t): Ditto.
24465 (vint32mf2x3_t): Ditto.
24466 (vuint32mf2x3_t): Ditto.
24467 (vint32mf2x4_t): Ditto.
24468 (vuint32mf2x4_t): Ditto.
24469 (vint32mf2x5_t): Ditto.
24470 (vuint32mf2x5_t): Ditto.
24471 (vint32mf2x6_t): Ditto.
24472 (vuint32mf2x6_t): Ditto.
24473 (vint32mf2x7_t): Ditto.
24474 (vuint32mf2x7_t): Ditto.
24475 (vint32mf2x8_t): Ditto.
24476 (vuint32mf2x8_t): Ditto.
24477 (vint32m1x2_t): Ditto.
24478 (vuint32m1x2_t): Ditto.
24479 (vint32m1x3_t): Ditto.
24480 (vuint32m1x3_t): Ditto.
24481 (vint32m1x4_t): Ditto.
24482 (vuint32m1x4_t): Ditto.
24483 (vint32m1x5_t): Ditto.
24484 (vuint32m1x5_t): Ditto.
24485 (vint32m1x6_t): Ditto.
24486 (vuint32m1x6_t): Ditto.
24487 (vint32m1x7_t): Ditto.
24488 (vuint32m1x7_t): Ditto.
24489 (vint32m1x8_t): Ditto.
24490 (vuint32m1x8_t): Ditto.
24491 (vint32m2x2_t): Ditto.
24492 (vuint32m2x2_t): Ditto.
24493 (vint32m2x3_t): Ditto.
24494 (vuint32m2x3_t): Ditto.
24495 (vint32m2x4_t): Ditto.
24496 (vuint32m2x4_t): Ditto.
24497 (vint32m4x2_t): Ditto.
24498 (vuint32m4x2_t): Ditto.
24499 (vint64m1x2_t): Ditto.
24500 (vuint64m1x2_t): Ditto.
24501 (vint64m1x3_t): Ditto.
24502 (vuint64m1x3_t): Ditto.
24503 (vint64m1x4_t): Ditto.
24504 (vuint64m1x4_t): Ditto.
24505 (vint64m1x5_t): Ditto.
24506 (vuint64m1x5_t): Ditto.
24507 (vint64m1x6_t): Ditto.
24508 (vuint64m1x6_t): Ditto.
24509 (vint64m1x7_t): Ditto.
24510 (vuint64m1x7_t): Ditto.
24511 (vint64m1x8_t): Ditto.
24512 (vuint64m1x8_t): Ditto.
24513 (vint64m2x2_t): Ditto.
24514 (vuint64m2x2_t): Ditto.
24515 (vint64m2x3_t): Ditto.
24516 (vuint64m2x3_t): Ditto.
24517 (vint64m2x4_t): Ditto.
24518 (vuint64m2x4_t): Ditto.
24519 (vint64m4x2_t): Ditto.
24520 (vuint64m4x2_t): Ditto.
24521 (vfloat32mf2x2_t): Ditto.
24522 (vfloat32mf2x3_t): Ditto.
24523 (vfloat32mf2x4_t): Ditto.
24524 (vfloat32mf2x5_t): Ditto.
24525 (vfloat32mf2x6_t): Ditto.
24526 (vfloat32mf2x7_t): Ditto.
24527 (vfloat32mf2x8_t): Ditto.
24528 (vfloat32m1x2_t): Ditto.
24529 (vfloat32m1x3_t): Ditto.
24530 (vfloat32m1x4_t): Ditto.
24531 (vfloat32m1x5_t): Ditto.
24532 (vfloat32m1x6_t): Ditto.
24533 (vfloat32m1x7_t): Ditto.
24534 (vfloat32m1x8_t): Ditto.
24535 (vfloat32m2x2_t): Ditto.
24536 (vfloat32m2x3_t): Ditto.
24537 (vfloat32m2x4_t): Ditto.
24538 (vfloat32m4x2_t): Ditto.
24539 (vfloat64m1x2_t): Ditto.
24540 (vfloat64m1x3_t): Ditto.
24541 (vfloat64m1x4_t): Ditto.
24542 (vfloat64m1x5_t): Ditto.
24543 (vfloat64m1x6_t): Ditto.
24544 (vfloat64m1x7_t): Ditto.
24545 (vfloat64m1x8_t): Ditto.
24546 (vfloat64m2x2_t): Ditto.
24547 (vfloat64m2x3_t): Ditto.
24548 (vfloat64m2x4_t): Ditto.
24549 (vfloat64m4x2_t): Ditto.
24550 * config/riscv/riscv-vector-builtins.h (DEF_RVV_TUPLE_TYPE):
24552 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
24553 * config/riscv/riscv.cc (riscv_v_ext_tuple_mode_p): New
24555 (TUPLE_ENTRY): Ditto.
24556 (riscv_v_ext_mode_p): New function.
24557 (riscv_v_adjust_nunits): Add tuple mode adjustment.
24558 (riscv_classify_address): Ditto.
24559 (riscv_binary_cost): Ditto.
24560 (riscv_rtx_costs): Ditto.
24561 (riscv_secondary_memory_needed): Ditto.
24562 (riscv_hard_regno_nregs): Ditto.
24563 (riscv_hard_regno_mode_ok): Ditto.
24564 (riscv_vector_mode_supported_p): Ditto.
24565 (riscv_regmode_natural_size): Ditto.
24566 (riscv_array_mode): New function.
24567 (TARGET_ARRAY_MODE): New target hook.
24568 * config/riscv/riscv.md: Add tuple modes.
24569 * config/riscv/vector-iterators.md: Ditto.
24570 * config/riscv/vector.md (mov<mode>): Add tuple modes data
24572 (*mov<VT:mode>_<P:mode>): Ditto.
24574 2023-05-03 Richard Biener <rguenther@suse.de>
24576 * cse.cc (cse_insn): Track an equivalence to the destination
24577 separately and delay using src_related for it.
24579 2023-05-03 Richard Biener <rguenther@suse.de>
24581 * cse.cc (HASH): Turn into inline function and mix
24582 in another HASH_SHIFT bits.
24583 (SAFE_HASH): Likewise.
24585 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24588 * config/aarch64/aarch64-simd.md (aarch64_<sur>h<addsub><mode>): Rename to...
24589 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): ... This.
24591 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24594 * config/aarch64/aarch64-simd.md (add<mode>3): Rename to...
24595 (add<mode>3<vczle><vczbe>): ... This.
24596 (sub<mode>3): Rename to...
24597 (sub<mode>3<vczle><vczbe>): ... This.
24598 (mul<mode>3): Rename to...
24599 (mul<mode>3<vczle><vczbe>): ... This.
24600 (*div<mode>3): Rename to...
24601 (*div<mode>3<vczle><vczbe>): ... This.
24602 (neg<mode>2): Rename to...
24603 (neg<mode>2<vczle><vczbe>): ... This.
24604 (abs<mode>2): Rename to...
24605 (abs<mode>2<vczle><vczbe>): ... This.
24606 (<frint_pattern><mode>2): Rename to...
24607 (<frint_pattern><mode>2<vczle><vczbe>): ... This.
24608 (<fmaxmin><mode>3): Rename to...
24609 (<fmaxmin><mode>3<vczle><vczbe>): ... This.
24610 (*sqrt<mode>2): Rename to...
24611 (*sqrt<mode>2<vczle><vczbe>): ... This.
24613 2023-05-03 Kito Cheng <kito.cheng@sifive.com>
24615 * doc/md.texi (RISC-V): Add vr, vm, vd constarint.
24617 2023-05-03 Martin Liska <mliska@suse.cz>
24619 PR tree-optimization/109693
24620 * value-range-storage.cc (vrange_allocator::vrange_allocator):
24621 Remove unused field.
24622 * value-range-storage.h: Likewise.
24624 2023-05-02 Andrew Pinski <apinski@marvell.com>
24626 * tree-ssa-phiopt.cc (move_stmt): New function.
24627 (match_simplify_replacement): Use move_stmt instead
24628 of the inlined version.
24630 2023-05-02 Andrew Pinski <apinski@marvell.com>
24632 * match.pd (a != 0 ? CLRSB(a) : CST -> CLRSB(a)): New
24635 2023-05-02 Andrew Pinski <apinski@marvell.com>
24637 PR tree-optimization/109702
24638 * match.pd: Fix "a != 0 ? FUNC(a) : CST" patterns
24639 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
24641 2023-05-02 Andrew Pinski <apinski@marvell.com>
24644 * config/aarch64/aarch64.md (*cmov<mode>_insn_m1): New
24645 insn_and_split pattern.
24647 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
24649 * config/riscv/sync.md (atomic_load<mode>): Implement atomic
24652 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
24654 * config/riscv/sync.md (mem_thread_fence_1): Change fence
24655 depending on the given memory model.
24657 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
24659 * config/riscv/riscv-protos.h (riscv_union_memmodels): Expose
24660 riscv_union_memmodels function to sync.md.
24661 * config/riscv/riscv.cc (riscv_union_memmodels): Add function to
24662 get the union of two memmodels in sync.md.
24663 (riscv_print_operand): Add %I and %J flags that output the
24664 optimal LR/SC flag bits for a given memory model.
24665 * config/riscv/sync.md: Remove static .aqrl bits on LR op/.rl
24666 bits on SC op and replace with optimized %I, %J flags.
24668 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
24670 * config/riscv/riscv.cc
24671 (riscv_memmodel_needs_amo_release): Change function name.
24672 (riscv_print_operand): Remove unneeded %F case.
24673 * config/riscv/sync.md: Remove unneeded fences.
24675 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
24678 * config/riscv/sync.md (atomic_store<mode>): Use simple store
24679 instruction in combination with fence(s).
24681 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
24683 * config/riscv/riscv.cc (riscv_print_operand): Change behavior
24684 of %A to include release bits.
24686 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
24688 * config/riscv/sync.md (atomic_cas_value_strong<mode>): Change
24689 FENCE/LR.aq/SC.aq into sequentially consistent LR.aqrl/SC.rl
24692 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
24694 * config/riscv/sync.md: Change LR.aq/SC.rl pairs into
24695 sequentially consistent LR.aqrl/SC.rl pairs.
24697 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
24699 * config/riscv/riscv.cc: Remove MEMMODEL_SYNC_* cases and
24700 sanitize memmodel input with memmodel_base.
24702 2023-05-02 Yanzhang Wang <yanzhang.wang@intel.com>
24703 Pan Li <pan2.li@intel.com>
24706 * config/riscv/vector-iterators.md: Support VNx2HI and VNX4DI when MIN_VLEN >= 128.
24708 2023-05-02 Romain Naour <romain.naour@gmail.com>
24710 * config/riscv/genrvv-type-indexer.cc: Use log2 from the C header, without
24713 2023-05-02 Martin Liska <mliska@suse.cz>
24715 * doc/invoke.texi: Update documentation based on param.opt file.
24717 2023-05-02 Richard Biener <rguenther@suse.de>
24719 PR tree-optimization/109672
24720 * tree-vect-stmts.cc (vectorizable_operation): For plus,
24721 minus and negate always check the vector mode is word mode.
24723 2023-05-01 Andrew Pinski <apinski@marvell.com>
24725 * tree-ssa-phiopt.cc: Update comment about
24726 how the transformation are implemented.
24728 2023-05-01 Jeff Law <jlaw@ventanamicro>
24730 * config/stormy16/stormy16.cc (TARGET_LRA_P): Remove defintion.
24732 2023-05-01 Jeff Law <jlaw@ventanamicro>
24734 * config/cris/cris.cc (TARGET_LRA_P): Remove.
24735 * config/epiphany/epiphany.cc (TARGET_LRA_P): Remove.
24736 * config/iq2000/iq2000.cc (TARGET_LRA_P): Remove.
24737 * config/m32r/m32r.cc (TARGET_LRA_P): Remove.
24738 * config/microblaze/microblaze.cc (TARGET_LRA_P): Remove.
24739 * config/mmix/mmix.cc (TARGET_LRA_P): Remove.
24741 2023-05-01 Rasmus Villemoes <rasmus.villemoes@prevas.dk>
24743 * print-tree.h (PRINT_DECL_REMAP_DEBUG): New flag.
24744 * print-tree.cc (print_decl_identifier): Implement it.
24745 * toplev.cc (output_stack_usage_1): Use it.
24747 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
24749 * value-range.h (class int_range): Remove gt_ggc_mx and gt_pch_nx
24752 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
24754 * value-range.h (irange::set_nonzero): Inline.
24756 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
24758 * gimple-range-op.cc (cfn_ffs::fold_range): Use the correct
24760 * gimple-ssa-warn-alloca.cc (alloca_call_type): Use <2> for
24761 invalid_range, as it is an inverse range.
24762 * tree-vrp.cc (find_case_label_range): Avoid trees.
24763 * value-range.cc (irange::irange_set): Delete.
24764 (irange::irange_set_1bit_anti_range): Delete.
24765 (irange::irange_set_anti_range): Delete.
24766 (irange::set): Cleanup.
24767 * value-range.h (class irange): Remove irange_set,
24768 irange_set_anti_range, irange_set_1bit_anti_range.
24769 (irange::set_undefined): Remove set to m_type.
24771 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
24773 * range-op.cc (update_known_bitmask): Adjust for irange containing
24774 wide_ints internally.
24775 * tree-ssanames.cc (set_nonzero_bits): Same.
24776 * tree-ssanames.h (set_nonzero_bits): Same.
24777 * value-range-storage.cc (irange_storage::set_irange): Same.
24778 (irange_storage::get_irange): Same.
24779 * value-range.cc (irange::operator=): Same.
24780 (irange::irange_set): Same.
24781 (irange::irange_set_1bit_anti_range): Same.
24782 (irange::irange_set_anti_range): Same.
24783 (irange::set): Same.
24784 (irange::verify_range): Same.
24785 (irange::contains_p): Same.
24786 (irange::irange_single_pair_union): Same.
24787 (irange::union_): Same.
24788 (irange::irange_contains_p): Same.
24789 (irange::intersect): Same.
24790 (irange::invert): Same.
24791 (irange::set_range_from_nonzero_bits): Same.
24792 (irange::set_nonzero_bits): Same.
24793 (mask_to_wi): Same.
24794 (irange::intersect_nonzero_bits): Same.
24795 (irange::union_nonzero_bits): Same.
24798 (tree_range): Same.
24799 (range_tests_strict_enum): Same.
24800 (range_tests_misc): Same.
24801 (range_tests_nonzero_bits): Same.
24802 * value-range.h (irange::type): Same.
24803 (irange::varying_compatible_p): Same.
24804 (irange::irange): Same.
24805 (int_range::int_range): Same.
24806 (irange::set_undefined): Same.
24807 (irange::set_varying): Same.
24808 (irange::lower_bound): Same.
24809 (irange::upper_bound): Same.
24811 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
24813 * gimple-range-fold.cc (tree_lower_bound): Delete.
24814 (tree_upper_bound): Delete.
24815 (vrp_val_max): Delete.
24816 (vrp_val_min): Delete.
24817 (fold_using_range::range_of_ssa_name_with_loop_info): Call
24818 range_of_var_in_loop.
24819 * vr-values.cc (valid_value_p): Delete.
24820 (fix_overflow): Delete.
24821 (get_scev_info): New.
24822 (bounds_of_var_in_loop): Refactor into...
24823 (induction_variable_may_overflow_p): ...this,
24824 (range_from_loop_direction): ...and this,
24825 (range_of_var_in_loop): ...and this.
24826 * vr-values.h (bounds_of_var_in_loop): Delete.
24827 (range_of_var_in_loop): New.
24829 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
24831 * gimple-range-fold.cc (adjust_pointer_diff_expr): Rewrite with
24833 (vrp_val_max): New.
24834 (vrp_val_min): New.
24835 * gimple-range-op.cc (cfn_strlen::fold_range): Use irange_val_*.
24836 * range-op.cc (max_limit): Same.
24838 (plus_minus_ranges): Same.
24839 (operator_rshift::op1_range): Same.
24840 (operator_cast::inside_domain_p): Same.
24841 * value-range.cc (vrp_val_is_max): Delete.
24842 (vrp_val_is_min): Delete.
24843 (range_tests_misc): Use irange_val_*.
24844 * value-range.h (vrp_val_is_min): Delete.
24845 (vrp_val_is_max): Delete.
24846 (vrp_val_max): Delete.
24847 (irange_val_min): New.
24848 (vrp_val_min): Delete.
24849 (irange_val_max): New.
24850 * vr-values.cc (check_for_binary_op_overflow): Use irange_val_*.
24852 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
24854 * fold-const.cc (expr_not_equal_to): Convert to irange wide_int API.
24855 * gimple-fold.cc (size_must_be_zero_p): Same.
24856 * gimple-loop-versioning.cc
24857 (loop_versioning::prune_loop_conditions): Same.
24858 * gimple-range-edge.cc (gcond_edge_range): Same.
24859 (gimple_outgoing_range::calc_switch_ranges): Same.
24860 * gimple-range-fold.cc (adjust_imagpart_expr): Same.
24861 (adjust_realpart_expr): Same.
24862 (fold_using_range::range_of_address): Same.
24863 (fold_using_range::relation_fold_and_or): Same.
24864 * gimple-range-gori.cc (gori_compute::gori_compute): Same.
24865 (range_is_either_true_or_false): Same.
24866 * gimple-range-op.cc (cfn_toupper_tolower::get_letter_range): Same.
24867 (cfn_clz::fold_range): Same.
24868 (cfn_ctz::fold_range): Same.
24869 * gimple-range-tests.cc (class test_expr_eval): Same.
24870 * gimple-ssa-warn-alloca.cc (alloca_call_type): Same.
24871 * ipa-cp.cc (ipa_value_range_from_jfunc): Same.
24872 (propagate_vr_across_jump_function): Same.
24873 (decide_whether_version_node): Same.
24874 * ipa-prop.cc (ipa_get_value_range): Same.
24875 * ipa-prop.h (ipa_range_set_and_normalize): Same.
24876 * range-op.cc (get_shift_range): Same.
24877 (value_range_from_overflowed_bounds): Same.
24878 (value_range_with_overflow): Same.
24879 (create_possibly_reversed_range): Same.
24880 (equal_op1_op2_relation): Same.
24881 (not_equal_op1_op2_relation): Same.
24882 (lt_op1_op2_relation): Same.
24883 (le_op1_op2_relation): Same.
24884 (gt_op1_op2_relation): Same.
24885 (ge_op1_op2_relation): Same.
24886 (operator_mult::op1_range): Same.
24887 (operator_exact_divide::op1_range): Same.
24888 (operator_lshift::op1_range): Same.
24889 (operator_rshift::op1_range): Same.
24890 (operator_cast::op1_range): Same.
24891 (operator_logical_and::fold_range): Same.
24892 (set_nonzero_range_from_mask): Same.
24893 (operator_bitwise_or::op1_range): Same.
24894 (operator_bitwise_xor::op1_range): Same.
24895 (operator_addr_expr::fold_range): Same.
24896 (pointer_plus_operator::wi_fold): Same.
24897 (pointer_or_operator::op1_range): Same.
24904 (range_op_cast_tests): Same.
24905 (range_op_lshift_tests): Same.
24906 (range_op_rshift_tests): Same.
24907 (range_op_bitwise_and_tests): Same.
24908 (range_relational_tests): Same.
24909 * range.cc (range_zero): Same.
24910 (range_nonzero): Same.
24911 * range.h (range_true): Same.
24912 (range_false): Same.
24913 (range_true_and_false): Same.
24914 * tree-data-ref.cc (split_constant_offset_1): Same.
24915 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Same.
24916 * tree-ssa-loop-unswitch.cc (struct unswitch_predicate): Same.
24917 (find_unswitching_predicates_for_bb): Same.
24918 * tree-ssa-phiopt.cc (value_replacement): Same.
24919 * tree-ssa-threadbackward.cc
24920 (back_threader::find_taken_edge_cond): Same.
24921 * tree-ssanames.cc (ssa_name_has_boolean_range): Same.
24922 * tree-vrp.cc (find_case_label_range): Same.
24923 * value-query.cc (range_query::get_tree_range): Same.
24924 * value-range.cc (irange::set_nonnegative): Same.
24925 (frange::contains_p): Same.
24926 (frange::singleton_p): Same.
24927 (frange::internal_singleton_p): Same.
24928 (irange::irange_set): Same.
24929 (irange::irange_set_1bit_anti_range): Same.
24930 (irange::irange_set_anti_range): Same.
24931 (irange::set): Same.
24932 (irange::operator==): Same.
24933 (irange::singleton_p): Same.
24934 (irange::contains_p): Same.
24935 (irange::set_range_from_nonzero_bits): Same.
24936 (DEFINE_INT_RANGE_INSTANCE): Same.
24946 (range_uint128): New.
24947 (range_uchar): New.
24949 (build_range3): Convert to irange wide_int API.
24950 (range_tests_irange3): Same.
24951 (range_tests_int_range_max): Same.
24952 (range_tests_strict_enum): Same.
24953 (range_tests_misc): Same.
24954 (range_tests_nonzero_bits): Same.
24955 (range_tests_nan): Same.
24956 (range_tests_signed_zeros): Same.
24957 * value-range.h (Value_Range::Value_Range): Same.
24958 (irange::set): Same.
24959 (irange::nonzero_p): Same.
24960 (irange::contains_p): Same.
24961 (range_includes_zero_p): Same.
24962 (irange::set_nonzero): Same.
24963 (irange::set_zero): Same.
24964 (contains_zero_p): Same.
24965 (frange::contains_p): Same.
24967 (simplify_using_ranges::op_with_boolean_value_range_p): Same.
24968 (bounds_of_var_in_loop): Same.
24969 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
24971 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
24973 * value-range.cc (irange::irange_union): Rename to...
24974 (irange::union_): ...this.
24975 (irange::irange_intersect): Rename to...
24976 (irange::intersect): ...this.
24977 * value-range.h (irange::union_): Delete.
24978 (irange::intersect): Delete.
24980 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
24982 * vr-values.cc (bounds_of_var_in_loop): Convert to irange API.
24984 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
24986 * vr-values.cc (check_for_binary_op_overflow): Tidy up by using
24988 (compare_ranges): Delete.
24989 (compare_range_with_value): Delete.
24990 (bounds_of_var_in_loop): Tidy up by using ranger API.
24991 (simplify_using_ranges::fold_cond_with_ops): Cleanup and rename
24992 from vrp_evaluate_conditional_warnv_with_ops_using_ranges.
24993 (simplify_using_ranges::legacy_fold_cond_overflow): Remove
24994 strict_overflow_p and only_ranges.
24995 (simplify_using_ranges::legacy_fold_cond): Adjust call to
24996 legacy_fold_cond_overflow.
24997 (simplify_using_ranges::simplify_abs_using_ranges): Adjust for
24999 (range_fits_type_p): Rename value_range to irange.
25000 * vr-values.h (range_fits_type_p): Adjust prototype.
25002 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
25004 * value-range.cc (irange::irange_set_anti_range): Remove uses of
25005 tree_lower_bound and tree_upper_bound.
25006 (irange::verify_range): Same.
25007 (irange::operator==): Same.
25008 (irange::singleton_p): Same.
25009 * value-range.h (irange::tree_lower_bound): Delete.
25010 (irange::tree_upper_bound): Delete.
25011 (irange::lower_bound): Delete.
25012 (irange::upper_bound): Delete.
25013 (irange::zero_p): Remove uses of tree_lower_bound and
25016 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
25018 * tree-ssa-loop-niter.cc (refine_value_range_using_guard): Remove
25020 (determine_value_range): Same.
25021 (record_nonwrapping_iv): Same.
25022 (infer_loop_bounds_from_signedness): Same.
25023 (scev_var_range_cant_overflow): Same.
25024 * tree-vrp.cc (operand_less_p): Delete.
25025 * tree-vrp.h (operand_less_p): Delete.
25026 * value-range.cc (get_legacy_range): Remove uses of deprecated API.
25027 (irange::value_inside_range): Delete.
25028 * value-range.h (vrange::kind): Delete.
25029 (irange::num_pairs): Remove check of m_kind.
25030 (irange::min): Delete.
25031 (irange::max): Delete.
25033 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
25035 * gimple-fold.cc (maybe_fold_comparisons_from_match_pd): Adjust
25036 for vrange_storage.
25037 * gimple-range-cache.cc (sbr_vector::sbr_vector): Same.
25038 (sbr_vector::grow): Same.
25039 (sbr_vector::set_bb_range): Same.
25040 (sbr_vector::get_bb_range): Same.
25041 (sbr_sparse_bitmap::sbr_sparse_bitmap): Same.
25042 (sbr_sparse_bitmap::set_bb_range): Same.
25043 (sbr_sparse_bitmap::get_bb_range): Same.
25044 (block_range_cache::block_range_cache): Same.
25045 (ssa_global_cache::ssa_global_cache): Same.
25046 (ssa_global_cache::get_global_range): Same.
25047 (ssa_global_cache::set_global_range): Same.
25048 * gimple-range-cache.h: Same.
25049 * gimple-range-edge.cc
25050 (gimple_outgoing_range::gimple_outgoing_range): Same.
25051 (gimple_outgoing_range::switch_edge_range): Same.
25052 (gimple_outgoing_range::calc_switch_ranges): Same.
25053 * gimple-range-edge.h: Same.
25054 * gimple-range-infer.cc
25055 (infer_range_manager::infer_range_manager): Same.
25056 (infer_range_manager::get_nonzero): Same.
25057 (infer_range_manager::maybe_adjust_range): Same.
25058 (infer_range_manager::add_range): Same.
25059 * gimple-range-infer.h: Rename obstack_vrange_allocator to
25061 * tree-core.h (struct irange_storage_slot): Remove.
25062 (struct tree_ssa_name): Remove irange_info and frange_info. Make
25063 range_info a pointer to vrange_storage.
25064 * tree-ssanames.cc (range_info_fits_p): Adjust for vrange_storage.
25065 (range_info_alloc): Same.
25066 (range_info_free): Same.
25067 (range_info_get_range): Same.
25068 (range_info_set_range): Same.
25069 (get_nonzero_bits): Same.
25070 * value-query.cc (get_ssa_name_range_info): Same.
25071 * value-range-storage.cc (class vrange_internal_alloc): New.
25072 (class vrange_obstack_alloc): New.
25073 (class vrange_ggc_alloc): New.
25074 (vrange_allocator::vrange_allocator): New.
25075 (vrange_allocator::~vrange_allocator): New.
25076 (vrange_storage::alloc_slot): New.
25077 (vrange_allocator::alloc): New.
25078 (vrange_allocator::free): New.
25079 (vrange_allocator::clone): New.
25080 (vrange_allocator::clone_varying): New.
25081 (vrange_allocator::clone_undefined): New.
25082 (vrange_storage::alloc): New.
25083 (vrange_storage::set_vrange): Remove slot argument.
25084 (vrange_storage::get_vrange): Same.
25085 (vrange_storage::fits_p): Same.
25086 (vrange_storage::equal_p): New.
25087 (irange_storage::write_lengths_address): New.
25088 (irange_storage::lengths_address): New.
25089 (irange_storage_slot::alloc_slot): Remove.
25090 (irange_storage::alloc): New.
25091 (irange_storage_slot::irange_storage_slot): Remove.
25092 (irange_storage::irange_storage): New.
25093 (write_wide_int): New.
25094 (irange_storage_slot::set_irange): Remove.
25095 (irange_storage::set_irange): New.
25096 (read_wide_int): New.
25097 (irange_storage_slot::get_irange): Remove.
25098 (irange_storage::get_irange): New.
25099 (irange_storage_slot::size): Remove.
25100 (irange_storage::equal_p): New.
25101 (irange_storage_slot::num_wide_ints_needed): Remove.
25102 (irange_storage::size): New.
25103 (irange_storage_slot::fits_p): Remove.
25104 (irange_storage::fits_p): New.
25105 (irange_storage_slot::dump): Remove.
25106 (irange_storage::dump): New.
25107 (frange_storage_slot::alloc_slot): Remove.
25108 (frange_storage::alloc): New.
25109 (frange_storage_slot::set_frange): Remove.
25110 (frange_storage::set_frange): New.
25111 (frange_storage_slot::get_frange): Remove.
25112 (frange_storage::get_frange): New.
25113 (frange_storage_slot::fits_p): Remove.
25114 (frange_storage::equal_p): New.
25115 (frange_storage::fits_p): New.
25116 (ggc_vrange_allocator): New.
25117 (ggc_alloc_vrange_storage): New.
25118 * value-range-storage.h (class vrange_storage): Rewrite.
25119 (class irange_storage): Rewrite.
25120 (class frange_storage): Rewrite.
25121 (class obstack_vrange_allocator): Remove.
25122 (class ggc_vrange_allocator): Remove.
25123 (vrange_allocator::alloc_vrange): Remove.
25124 (vrange_allocator::alloc_irange): Remove.
25125 (vrange_allocator::alloc_frange): Remove.
25126 (ggc_alloc_vrange_storage): New.
25127 * value-range.h (class irange): Rename vrange_allocator to
25129 (class frange): Same.
25131 2023-04-30 Roger Sayle <roger@nextmovesoftware.com>
25133 * config/stormy16/stormy16.md (neghi2): Rewrite pattern using
25134 inc to avoid clobbering the carry flag.
25136 2023-04-30 Andrew Pinski <apinski@marvell.com>
25138 * match.pd: Add patterns for "a != 0 ? FUNC(a) : CST"
25139 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
25141 2023-04-30 Andrew Pinski <apinski@marvell.com>
25143 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
25144 Allow some builtin/internal function calls which
25145 are known not to trap/throw.
25146 (phiopt_worker::match_simplify_replacement):
25147 Use name instead of getting the lhs again.
25149 2023-04-30 Joakim Nohlgård <joakim@nohlgard.se>
25151 * configure: Regenerate.
25152 * configure.ac: Use ld -r in the check for HAVE_LD_RO_RW_SECTION_MIXING
25154 2023-04-29 Hans-Peter Nilsson <hp@axis.com>
25156 * reload1.cc (emit_insn_if_valid_for_reload_1): Rename from
25157 emit_insn_if_valid_for_reload.
25158 (emit_insn_if_valid_for_reload): Call new helper, and if a SET fails
25159 to be recognized, also try emitting a parallel that clobbers
25160 TARGET_FLAGS_REGNUM, as applicable.
25162 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
25164 * config/stormy16/stormy16.md (neghi2): Convert from a define_expand
25166 (*rotatehi_1): New define_insn for efficient 2 insn sequence.
25167 (*rotatehi_8, *rotaterthi_8): New define_insn to emit a swpb.
25169 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
25171 * config/stormy16/stormy16.md (any_lshift): New code iterator.
25172 (any_or_plus): Likewise.
25173 (any_rotate): Likewise.
25174 (*<any_lshift>_and_internal): New define_insn_and_split to
25175 recognize a logical shift followed by an AND, and split it
25176 again after reload.
25177 (*swpn): New define_insn matching xstormy16's swpn.
25178 (*swpn_zext): New define_insn recognizing swpn followed by
25179 zero_extendqihi2, i.e. with the high byte set to zero.
25180 (*swpn_sext): Likewise, for swpn followed by cbw.
25181 (*swpn_sext_2): Likewise, for an alternate RTL form.
25182 (*swpn_zext_ior): A pre-reload splitter so that an swpn+zext+ior
25183 sequence is split in the correct place to recognize the *swpn_zext
25184 followed by any_or_plus (ior, xor or plus) instruction.
25186 2023-04-29 Mikael Pettersson <mikpelinux@gmail.com>
25189 * config.gcc (vax-*-linux*): Add glibc-stdint.h.
25190 (lm32-*-uclinux*): Likewise.
25192 2023-04-29 Fei Gao <gaofei@eswincomputing.com>
25194 * config/riscv/riscv.cc (riscv_avoid_save_libcall): helper function
25195 for riscv_use_save_libcall.
25196 (riscv_use_save_libcall): call riscv_avoid_save_libcall.
25197 (riscv_compute_frame_info): restructure to decouple stack allocation
25198 for rv32e w/o save-restore.
25200 2023-04-28 Eugene Rozenfeld <erozen@microsoft.com>
25202 * doc/install.texi: Fix documentation typo
25204 2023-04-28 Matevos Mehrabyan <matevosmehrabyan@gmail.com>
25206 * config/riscv/iterators.md (only_div, paired_mod): New iterators.
25207 (u): Add div/udiv cases.
25208 * config/riscv/riscv-protos.h (riscv_use_divmod_expander): Prototype.
25209 * config/riscv/riscv.cc (struct riscv_tune_param): Add field for
25211 (rocket_tune_info, sifive_7_tune_info): Initialize new field.
25212 (thead_c906_tune_info): Likewise.
25213 (optimize_size_tune_info): Likewise.
25214 (riscv_use_divmod_expander): New function.
25215 * config/riscv/riscv.md (<u>divmod<mode>4): New expander.
25217 2023-04-28 Karen Sargsyan <karen1999411@gmail.com>
25219 * config/riscv/bitmanip.md: Added clmulr instruction.
25220 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
25221 * config/riscv/riscv.md: (UNSPEC_CLMULR): Add new unspec type.
25223 * config/riscv/riscv-cmo.def: Added built-in function for clmulr.
25224 * config/riscv/crypto.md: Move clmul[h] instructions to bitmanip.md.
25225 * config/riscv/riscv-scalar-crypto.def: Move clmul[h] built-in
25226 functions to riscv-cmo.def.
25227 * config/riscv/generic.md: Add clmul to list of instructions
25228 using the generic_imul reservation.
25230 2023-04-28 Jivan Hakobyan <jivanhakobyan9@gmail.com>
25232 * config/riscv/bitmanip.md: Added expanders for minu/maxu instructions
25234 2023-04-28 Andrew Pinski <apinski@marvell.com>
25236 PR tree-optimization/100958
25237 * tree-ssa-phiopt.cc (two_value_replacement): Remove.
25238 (pass_phiopt::execute): Don't call two_value_replacement.
25239 * match.pd (a !=/== CST1 ? CST2 : CST3): Add pattern to
25240 handle what two_value_replacement did.
25242 2023-04-28 Andrew Pinski <apinski@marvell.com>
25244 * match.pd: Add patterns for
25245 "(A CMP B) ? MIN/MAX<A, C> : MIN/MAX <B, C>".
25247 2023-04-28 Andrew Pinski <apinski@marvell.com>
25249 * match.pd: Factor out the deciding the min/max from
25250 the "(cond (cmp (convert1? x) c1) (convert2? x) c2)"
25252 * fold-const.cc (minmax_from_comparison): this new function.
25253 * fold-const.h (minmax_from_comparison): New prototype.
25255 2023-04-28 Roger Sayle <roger@nextmovesoftware.com>
25257 PR rtl-optimization/109476
25258 * lower-subreg.cc: Include explow.h for force_reg.
25259 (find_decomposable_shift_zext): Pass an additional SPEED_P argument.
25260 If decomposing a suitable LSHIFTRT and we're not splitting
25261 ZERO_EXTEND (based on the current SPEED_P), then use a ZERO_EXTEND
25262 instead of setting a high part SUBREG to zero, which helps combine.
25263 (decompose_multiword_subregs): Update call to resolve_shift_zext.
25265 2023-04-28 Richard Biener <rguenther@suse.de>
25267 * tree-vect-data-refs.cc (vect_analyze_data_refs): Always
25269 * tree-vect-stmts.cc (vect_model_store_cost): Pass in the
25270 gather-scatter info and cost emulated scatters accordingly.
25271 (get_load_store_type): Support emulated scatters.
25272 (vectorizable_store): Likewise. Emulate them by extracting
25273 scalar offsets and data, doing scalar stores.
25275 2023-04-28 Richard Biener <rguenther@suse.de>
25277 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
25278 Tame down element extracts and scalar loads for gather/scatter
25279 similar to elementwise strided accesses.
25281 2023-04-28 Pan Li <pan2.li@intel.com>
25282 kito-cheng <kito.cheng@sifive.com>
25284 * config/riscv/vector.md: Add new define split to perform
25285 the simplification.
25287 2023-04-28 Richard Biener <rguenther@suse.de>
25290 * ipa-param-manipulation.cc
25291 (ipa_param_body_adjustments::modify_expression): Allow
25292 conversion of a register to a non-register type. Elide
25293 conversions inside BIT_FIELD_REFs.
25295 2023-04-28 Richard Biener <rguenther@suse.de>
25297 PR tree-optimization/109644
25298 * tree-cfg.cc (verify_types_in_gimple_reference): Check
25299 register constraints on the outermost VIEW_CONVERT_EXPR
25300 only. Do not allow register or invariant bases on
25301 multi-level or possibly variable index handled components.
25303 2023-04-28 Richard Biener <rguenther@suse.de>
25305 * gimplify.cc (gimplify_compound_lval): When there's a
25306 non-register type produced by one of the handled component
25307 operations make sure we get a non-register base.
25309 2023-04-28 Richard Biener <rguenther@suse.de>
25311 PR tree-optimization/108752
25312 * tree-vect-generic.cc (build_replicated_const): Rename
25313 to build_replicated_int_cst and move to tree.{h,cc}.
25314 (do_plus_minus): Adjust.
25315 (do_negate): Likewise.
25316 * tree-vect-stmts.cc (vectorizable_operation): Emit emulated
25317 arithmetic vector operations in lowered form.
25318 * tree.h (build_replicated_int_cst): Declare.
25319 * tree.cc (build_replicated_int_cst): Moved from
25320 tree-vect-generic.cc build_replicated_const.
25322 2023-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25325 * config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): Rename to...
25326 (aarch64_rbit<mode><vczle><vczbe>): ... This.
25327 (neg<mode>2): Rename to...
25328 (neg<mode>2<vczle><vczbe>): ... This.
25329 (abs<mode>2): Rename to...
25330 (abs<mode>2<vczle><vczbe>): ... This.
25331 (aarch64_abs<mode>): Rename to...
25332 (aarch64_abs<mode><vczle><vczbe>): ... This.
25333 (one_cmpl<mode>2): Rename to...
25334 (one_cmpl<mode>2<vczle><vczbe>): ... This.
25335 (clrsb<mode>2): Rename to...
25336 (clrsb<mode>2<vczle><vczbe>): ... This.
25337 (clz<mode>2): Rename to...
25338 (clz<mode>2<vczle><vczbe>): ... This.
25339 (popcount<mode>2): Rename to...
25340 (popcount<mode>2<vczle><vczbe>): ... This.
25342 2023-04-28 Jakub Jelinek <jakub@redhat.com>
25344 * gimple-range-op.cc (class cfn_sqrt): New type.
25345 (op_cfn_sqrt): New variable.
25346 (gimple_range_op_handler::maybe_builtin_call): Handle
25347 CASE_CFN_SQRT{,_FN}.
25349 2023-04-28 Aldy Hernandez <aldyh@redhat.com>
25350 Jakub Jelinek <jakub@redhat.com>
25352 * value-range.h (frange_nextafter): Declare.
25353 * gimple-range-op.cc (class cfn_sincos): New.
25354 (op_cfn_sin, op_cfn_cos): New variables.
25355 (gimple_range_op_handler::maybe_builtin_call): Handle
25356 CASE_CFN_{SIN,COS}{,_FN}.
25358 2023-04-28 Jakub Jelinek <jakub@redhat.com>
25360 * target.def (libm_function_max_error): New target hook.
25361 * doc/tm.texi.in (TARGET_LIBM_FUNCTION_MAX_ERROR): Add.
25362 * doc/tm.texi: Regenerated.
25363 * targhooks.h (default_libm_function_max_error,
25364 glibc_linux_libm_function_max_error): Declare.
25365 * targhooks.cc: Include case-cfn-macros.h.
25366 (default_libm_function_max_error,
25367 glibc_linux_libm_function_max_error): New functions.
25368 * config/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
25369 * config/linux-protos.h (linux_libm_function_max_error): Declare.
25370 * config/linux.cc: Include target.h and targhooks.h.
25371 (linux_libm_function_max_error): New function.
25372 * config/arc/arc.cc: Include targhooks.h and case-cfn-macros.h.
25373 (arc_libm_function_max_error): New function.
25374 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
25375 * config/i386/i386.cc (ix86_libc_has_fast_function): Formatting fix.
25376 (ix86_libm_function_max_error): New function.
25377 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
25378 * config/rs6000/rs6000-protos.h
25379 (rs6000_linux_libm_function_max_error): Declare.
25380 * config/rs6000/rs6000-linux.cc: Include target.h, targhooks.h, tree.h
25381 and case-cfn-macros.h.
25382 (rs6000_linux_libm_function_max_error): New function.
25383 * config/rs6000/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
25384 * config/rs6000/linux64.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
25385 * config/or1k/or1k.cc: Include targhooks.h and case-cfn-macros.h.
25386 (or1k_libm_function_max_error): New function.
25387 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
25389 2023-04-28 Alexandre Oliva <oliva@adacore.com>
25391 * gimple-harden-conditionals.cc (insert_edge_check_and_trap):
25392 Move detach value calls...
25393 (pass_harden_conditional_branches::execute): ... here.
25394 (pass_harden_compares::execute): Detach values before
25397 2023-04-27 Andrew Stubbs <ams@codesourcery.com>
25399 * config/gcn/gcn-valu.md (cmul<conj_op><mode>3): Use gcn_gen_undef.
25400 (cml<addsub_as><mode>4): Likewise.
25401 (vec_addsub<mode>3): Likewise.
25402 (cadd<rot><mode>3): Likewise.
25403 (vec_fmaddsub<mode>4): Likewise.
25404 (vec_fmsubadd<mode>4): Likewise, and use sub for the odd lanes.
25406 2023-04-27 Andrew Pinski <apinski@marvell.com>
25408 * tree-ssa-phiopt.cc (phiopt_early_allow): Allow for
25409 up to 2 min/max expressions in the sequence/match code.
25411 2023-04-27 Andrew Pinski <apinski@marvell.com>
25413 * rtlanal.cc (may_trap_p_1): Treat SMIN/SMAX similar as
25415 * tree-eh.cc (operation_could_trap_helper_p): Treate
25416 MIN_EXPR/MAX_EXPR similar as other comparisons.
25418 2023-04-27 Andrew Pinski <apinski@marvell.com>
25420 * tree-ssa-phiopt.cc (cond_store_replacement): Remove
25422 (cond_if_else_store_replacement): Likewise.
25423 (get_non_trapping): Likewise.
25424 (store_elim_worker): Move into ...
25425 (pass_cselim::execute): This.
25427 2023-04-27 Andrew Pinski <apinski@marvell.com>
25429 * tree-ssa-phiopt.cc (two_value_replacement): Remove
25431 (match_simplify_replacement): Likewise.
25432 (factor_out_conditional_conversion): Likewise.
25433 (value_replacement): Likewise.
25434 (minmax_replacement): Likewise.
25435 (spaceship_replacement): Likewise.
25436 (cond_removal_in_builtin_zero_pattern): Likewise.
25437 (hoist_adjacent_loads): Likewise.
25438 (tree_ssa_phiopt_worker): Move into ...
25439 (pass_phiopt::execute): this.
25441 2023-04-27 Andrew Pinski <apinski@marvell.com>
25443 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove
25444 do_store_elim argument and split that part out to ...
25445 (store_elim_worker): This new function.
25446 (pass_cselim::execute): Call store_elim_worker.
25447 (pass_phiopt::execute): Update call to tree_ssa_phiopt_worker.
25449 2023-04-27 Jan Hubicka <jh@suse.cz>
25451 * cfgloopmanip.h (unloop_loops): Export.
25452 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Unloop loops
25453 that no longer loop.
25454 * tree-ssa-loop-ivcanon.cc (unloop_loops): Export; do not free
25455 vectors of loops to unloop.
25456 (canonicalize_induction_variables): Free vectors here.
25457 (tree_unroll_loops_completely): Free vectors here.
25459 2023-04-27 Richard Biener <rguenther@suse.de>
25461 PR tree-optimization/109170
25462 * gimple-range-op.cc (gimple_range_op_handler::maybe_builtin_call):
25463 Handle __builtin_expect and similar via cfn_pass_through_arg1
25464 and inspecting the calls fnspec.
25465 * builtins.cc (builtin_fnspec): Handle BUILT_IN_EXPECT
25466 and BUILT_IN_EXPECT_WITH_PROBABILITY.
25468 2023-04-27 Alexandre Oliva <oliva@adacore.com>
25470 * genmultilib: Use CONFIG_SHELL to run sub-scripts.
25472 2023-04-27 Aldy Hernandez <aldyh@redhat.com>
25474 PR tree-optimization/109639
25475 * ipa-cp.cc (ipa_value_range_from_jfunc): Normalize range.
25476 (propagate_vr_across_jump_function): Same.
25477 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
25478 * ipa-prop.h (ipa_range_set_and_normalize): New.
25479 * value-range.cc (irange::set): Assert min and max are INTEGER_CST.
25481 2023-04-27 Richard Biener <rguenther@suse.de>
25483 * match.pd (BIT_FIELD_REF CONSTRUCTOR@0 @1 @2): Do not
25484 create a CTOR operand in the result when simplifying GIMPLE.
25486 2023-04-27 Richard Biener <rguenther@suse.de>
25488 * gimplify.cc (gimplify_compound_lval): When the base
25489 gimplified to a register make sure to split up chains
25492 2023-04-27 Richard Biener <rguenther@suse.de>
25495 * ipa-param-manipulation.h
25496 (ipa_param_body_adjustments::modify_expression): Add extra_stmts
25498 * ipa-param-manipulation.cc
25499 (ipa_param_body_adjustments::modify_expression): Likewise.
25500 When we need a conversion and the replacement is a register
25501 split the conversion out.
25502 (ipa_param_body_adjustments::modify_assignment): Pass
25503 extra_stmts to RHS modify_expression.
25505 2023-04-27 Jonathan Wakely <jwakely@redhat.com>
25507 * doc/extend.texi (Zero Length): Describe example.
25509 2023-04-27 Richard Biener <rguenther@suse.de>
25511 PR tree-optimization/109594
25512 * tree-ssa.cc (non_rewritable_mem_ref_base): Constrain
25513 what we rewrite to a register based on the above.
25515 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
25517 * config/riscv/riscv.cc: Fix whitespace.
25518 * config/riscv/sync.md: Fix whitespace.
25520 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
25522 PR tree-optimization/108697
25523 * gimple-range-cache.cc (ssa_global_cache::clear_range): Do
25524 not clear the vector on an out of range query.
25525 (ssa_cache::dump): Use dump_range_query instead of get_range.
25526 (ssa_cache::dump_range_query): New.
25527 (ssa_lazy_cache::dump_range_query): New.
25528 (ssa_lazy_cache::set_range): New.
25529 * gimple-range-cache.h (ssa_cache::dump_range_query): New.
25530 (class ssa_lazy_cache): New.
25531 (ssa_lazy_cache::ssa_lazy_cache): New.
25532 (ssa_lazy_cache::~ssa_lazy_cache): New.
25533 (ssa_lazy_cache::get_range): New.
25534 (ssa_lazy_cache::clear_range): New.
25535 (ssa_lazy_cache::clear): New.
25536 (ssa_lazy_cache::dump): New.
25537 * gimple-range-path.cc (path_range_query::path_range_query): Do
25538 not allocate a ssa_cache object nor has_cache bitmap.
25539 (path_range_query::~path_range_query): Do not free objects.
25540 (path_range_query::clear_cache): Remove.
25541 (path_range_query::get_cache): Adjust.
25542 (path_range_query::set_cache): Remove.
25543 (path_range_query::dump): Don't call through a pointer.
25544 (path_range_query::internal_range_of_expr): Set cache directly.
25545 (path_range_query::reset_path): Clear cache directly.
25546 (path_range_query::ssa_range_in_phi): Fold with globals only.
25547 (path_range_query::compute_ranges_in_phis): Simply set range.
25548 (path_range_query::compute_ranges_in_block): Call cache directly.
25549 * gimple-range-path.h (class path_range_query): Replace bitmap
25550 and cache pointer with lazy cache object.
25551 * gimple-range.h (class assume_query): Use ssa_lazy_cache.
25553 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
25555 * gimple-range-cache.cc (ssa_cache::ssa_cache): Rename.
25556 (ssa_cache::~ssa_cache): Rename.
25557 (ssa_cache::has_range): New.
25558 (ssa_cache::get_range): Rename.
25559 (ssa_cache::set_range): Rename.
25560 (ssa_cache::clear_range): Rename.
25561 (ssa_cache::clear): Rename.
25562 (ssa_cache::dump): Rename and use get_range.
25563 (ranger_cache::get_global_range): Use get_range and set_range.
25564 (ranger_cache::range_of_def): Use get_range.
25565 * gimple-range-cache.h (class ssa_cache): Rename class and methods.
25566 (class ranger_cache): Use ssa_cache.
25567 * gimple-range-path.cc (path_range_query::path_range_query): Use
25569 (path_range_query::get_cache): Use get_range.
25570 (path_range_query::set_cache): Use set_range.
25571 * gimple-range-path.h (class path_range_query): Use ssa_cache.
25572 * gimple-range.cc (assume_query::assume_range_p): Use get_range.
25573 (assume_query::range_of_expr): Use get_range.
25574 (assume_query::assume_query): Use set_range.
25575 (assume_query::calculate_op): Use get_range and set_range.
25576 * gimple-range.h (class assume_query): Use ssa_cache.
25578 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
25580 * gimple-range-cache.cc (sbr_vector::sbr_vector): Add parameter
25581 and local to optionally zero memory.
25582 (br_vector::grow): Only zero memory if flag is set.
25583 (class sbr_lazy_vector): New.
25584 (sbr_lazy_vector::sbr_lazy_vector): New.
25585 (sbr_lazy_vector::set_bb_range): New.
25586 (sbr_lazy_vector::get_bb_range): New.
25587 (sbr_lazy_vector::bb_range_p): New.
25588 (block_range_cache::set_bb_range): Check flags and Use sbr_lazy_vector.
25589 * gimple-range-gori.cc (gori_map::calculate_gori): Use
25590 param_vrp_switch_limit.
25591 (gori_compute::gori_compute): Use param_vrp_switch_limit.
25592 * params.opt (vrp_sparse_threshold): Rename from evrp_sparse_threshold.
25593 (vrp_switch_limit): Rename from evrp_switch_limit.
25594 (vrp_vector_threshold): New.
25596 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
25598 * value-relation.cc (dom_oracle::query_relation): Check early for lack
25600 * value-relation.h (equiv_oracle::has_equiv_p): New.
25602 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
25604 PR tree-optimization/109417
25605 * gimple-range-gori.cc (range_def_chain::register_dependency):
25606 Save the ssa version number, not the pointer.
25607 (gori_compute::may_recompute_p): No need to check if a dependency
25608 is in the free list.
25609 * gimple-range-gori.h (class range_def_chain): Change ssa1 and ssa2
25610 fields to be unsigned int instead of trees.
25611 (ange_def_chain::depend1): Adjust.
25612 (ange_def_chain::depend2): Adjust.
25613 * gimple-range.h: Include "ssa.h" to inline ssa_name().
25615 2023-04-26 David Edelsohn <dje.gcc@gmail.com>
25617 * config/rs6000/aix72.h (TARGET_DEFAULT): Use ISA_2_6_MASKS_SERVER.
25618 * config/rs6000/aix73.h (TARGET_DEFAULT): Use ISA_2_7_MASKS_SERVER.
25619 (PROCESSOR_DEFAULT): Use PROCESSOR_POWER8.
25621 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
25624 * config/riscv/riscv-protos.h: Add helper function stubs.
25625 * config/riscv/riscv.cc: Add helper functions for subword masking.
25626 * config/riscv/riscv.opt: Add command-line flags -minline-atomics and
25627 -mno-inline-atomics.
25628 * config/riscv/sync.md: Add masking logic and inline asm for fetch_and_op,
25629 fetch_and_nand, CAS, and exchange ops.
25630 * doc/invoke.texi: Add blurb regarding new command-line flags
25631 -minline-atomics and -mno-inline-atomics.
25633 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25635 * config/aarch64/aarch64-simd.md (aarch64_rshrn2<mode>_insn_le):
25636 Reimplement using standard RTL codes instead of unspec.
25637 (aarch64_rshrn2<mode>_insn_be): Likewise.
25638 (aarch64_rshrn2<mode>): Adjust for the above.
25639 * config/aarch64/aarch64.md (UNSPEC_RSHRN): Delete.
25641 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25643 * config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le): Reimplement
25644 with standard RTL codes instead of an UNSPEC.
25645 (aarch64_rshrn<mode>_insn_be): Likewise.
25646 (aarch64_rshrn<mode>): Adjust for the above.
25647 * config/aarch64/predicates.md (aarch64_simd_rshrn_imm_vec): Define.
25649 2023-04-26 Pan Li <pan2.li@intel.com>
25650 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
25652 * config/riscv/riscv.cc (riscv_classify_address): Allow
25653 const0_rtx for the RVV load/store.
25655 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
25657 * range-op.cc (range_op_cast_tests): Remove legacy support.
25658 * value-range-storage.h (vrange_allocator::alloc_irange): Same.
25659 * value-range.cc (irange::operator=): Same.
25660 (get_legacy_range): Same.
25661 (irange::copy_legacy_to_multi_range): Delete.
25662 (irange::copy_to_legacy): Delete.
25663 (irange::irange_set_anti_range): Delete.
25664 (irange::set): Remove legacy support.
25665 (irange::verify_range): Same.
25666 (irange::legacy_lower_bound): Delete.
25667 (irange::legacy_upper_bound): Delete.
25668 (irange::legacy_equal_p): Delete.
25669 (irange::operator==): Remove legacy support.
25670 (irange::singleton_p): Same.
25671 (irange::value_inside_range): Same.
25672 (irange::contains_p): Same.
25673 (intersect_ranges): Delete.
25674 (irange::legacy_intersect): Delete.
25675 (union_ranges): Delete.
25676 (irange::legacy_union): Delete.
25677 (irange::legacy_verbose_union_): Delete.
25678 (irange::legacy_verbose_intersect): Delete.
25679 (irange::irange_union): Remove legacy support.
25680 (irange::irange_intersect): Same.
25681 (irange::intersect): Same.
25682 (irange::invert): Same.
25683 (ranges_from_anti_range): Delete.
25684 (gt_pch_nx): Adjust for legacy removal.
25686 (range_tests_legacy): Delete.
25687 (range_tests_misc): Adjust for legacy removal.
25688 (range_tests): Same.
25689 * value-range.h (class irange): Same.
25690 (irange::legacy_mode_p): Delete.
25691 (ranges_from_anti_range): Delete.
25692 (irange::nonzero_p): Adjust for legacy removal.
25693 (irange::lower_bound): Same.
25694 (irange::upper_bound): Same.
25695 (irange::union_): Same.
25696 (irange::intersect): Same.
25697 (irange::set_nonzero): Same.
25698 (irange::set_zero): Same.
25699 * vr-values.cc (simplify_using_ranges::legacy_fold_cond_overflow): Same.
25701 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
25703 * value-range.cc (irange::copy_legacy_to_multi_range): Rewrite use
25704 of range_has_numeric_bounds_p with irange API.
25705 (range_has_numeric_bounds_p): Delete.
25706 * value-range.h (range_has_numeric_bounds_p): Delete.
25708 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
25710 * tree-data-ref.cc (compute_distributive_range): Replace uses of
25711 range_int_cst_p with irange API.
25712 * tree-ssa-strlen.cc (get_range_strlen_dynamic): Same.
25713 * tree-vrp.h (range_int_cst_p): Delete.
25714 * vr-values.cc (check_for_binary_op_overflow): Replace usees of
25715 range_int_cst_p with irange API.
25716 (vr_set_zero_nonzero_bits): Same.
25717 (range_fits_type_p): Same.
25718 (simplify_using_ranges::simplify_casted_cond): Same.
25719 * tree-vrp.cc (range_int_cst_p): Remove.
25721 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
25723 * tree-ssa-strlen.cc (compare_nonzero_chars): Convert to wide_ints.
25725 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
25727 * builtins.cc (expand_builtin_strnlen): Rewrite deprecated irange
25728 API uses to new API.
25729 * gimple-predicate-analysis.cc (find_var_cmp_const): Same.
25730 * internal-fn.cc (get_min_precision): Same.
25732 * tree-affine.cc (expr_to_aff_combination): Same.
25733 * tree-data-ref.cc (dr_step_indicator): Same.
25734 * tree-dfa.cc (get_ref_base_and_extent): Same.
25735 * tree-scalar-evolution.cc (iv_can_overflow_p): Same.
25736 * tree-ssa-phiopt.cc (two_value_replacement): Same.
25737 * tree-ssa-pre.cc (insert_into_preds_of_block): Same.
25738 * tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Same.
25739 * tree-ssa-strlen.cc (compare_nonzero_chars): Same.
25740 * tree-switch-conversion.cc (bit_test_cluster::emit): Same.
25741 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Same.
25742 * tree.cc (get_range_pos_neg): Same.
25744 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
25746 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Use
25747 vrange::dump instead of ad-hoc dumper.
25748 * tree-ssa-strlen.cc (dump_strlen_info): Same.
25749 * value-range-pretty-print.cc (visit): Pass TDF_NOUID to
25752 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
25754 * range-op.cc (operator_cast::op1_range): Use
25755 create_possibly_reversed_range.
25756 (operator_bitwise_and::simple_op1_range_solver): Same.
25757 * value-range.cc (swap_out_of_order_endpoints): Delete.
25758 (irange::set): Remove call to swap_out_of_order_endpoints.
25760 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
25762 * builtins.cc (determine_block_size): Convert use of legacy API to
25764 * gimple-array-bounds.cc (check_out_of_bounds_and_warn): Same.
25765 (array_bounds_checker::check_array_ref): Same.
25766 * gimple-ssa-warn-restrict.cc
25767 (builtin_memref::extend_offset_range): Same.
25768 * ipa-cp.cc (ipcp_store_vr_results): Same.
25769 * ipa-fnsummary.cc (set_switch_stmt_execution_predicate): Same.
25770 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Same.
25771 (ipa_write_jump_function): Same.
25772 * pointer-query.cc (get_size_range): Same.
25773 * tree-data-ref.cc (split_constant_offset): Same.
25774 * tree-ssa-strlen.cc (get_range): Same.
25775 (maybe_diag_stxncpy_trunc): Same.
25776 (strlen_pass::get_len_or_size): Same.
25777 (strlen_pass::count_nonzero_bytes_addr): Same.
25778 * tree-vect-patterns.cc (vect_get_range_info): Same.
25779 * value-range.cc (irange::maybe_anti_range): Remove.
25780 (get_legacy_range): New.
25781 (irange::copy_to_legacy): Use get_legacy_range.
25782 (ranges_from_anti_range): Same.
25783 * value-range.h (class irange): Remove maybe_anti_range.
25784 (get_legacy_range): New.
25785 * vr-values.cc (check_for_binary_op_overflow): Convert use of
25786 legacy API to get_legacy_range.
25787 (compare_ranges): Same.
25788 (compare_range_with_value): Same.
25789 (bounds_of_var_in_loop): Same.
25790 (find_case_label_ranges): Same.
25791 (simplify_using_ranges::simplify_switch_using_ranges): Same.
25793 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
25795 * value-range-pretty-print.cc (vrange_printer::visit): Remove
25797 * value-range.cc (irange::constant_p): Remove.
25798 (irange::get_nonzero_bits_from_range): Remove constant_p use.
25799 * value-range.h (class irange): Remove constant_p.
25800 (irange::num_pairs): Remove constant_p use.
25802 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
25804 * value-range.cc (irange::copy_legacy_to_multi_range): Remove
25806 (irange::set): Same.
25807 (irange::legacy_lower_bound): Same.
25808 (irange::legacy_upper_bound): Same.
25809 (irange::contains_p): Same.
25810 (range_tests_legacy): Same.
25811 (irange::normalize_addresses): Remove.
25812 (irange::normalize_symbolics): Remove.
25813 (irange::symbolic_p): Remove.
25814 * value-range.h (class irange): Remove symbolic_p,
25815 normalize_symbolics, and normalize_addresses.
25816 * vr-values.cc (simplify_using_ranges::two_valued_val_range_p):
25817 Remove symbolics support.
25819 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
25821 * value-range.cc (irange::may_contain_p): Remove.
25822 * value-range.h (range_includes_zero_p): Rewrite may_contain_p
25823 usage with contains_p.
25824 * vr-values.cc (compare_range_with_value): Same.
25826 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
25828 * tree-vrp.cc (supported_types_p): Remove.
25829 (defined_ranges_p): Remove.
25830 (range_fold_binary_expr): Remove.
25831 (range_fold_unary_expr): Remove.
25832 * tree-vrp.h (range_fold_unary_expr): Remove.
25833 (range_fold_binary_expr): Remove.
25835 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
25837 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Convert to ranger API.
25838 (ipa_value_range_from_jfunc): Same.
25839 (propagate_vr_across_jump_function): Same.
25840 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
25841 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
25842 * vr-values.cc (bounds_of_var_in_loop): Same.
25844 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
25846 * gimple-array-bounds.cc (array_bounds_checker::get_value_range):
25847 Add irange argument.
25848 (check_out_of_bounds_and_warn): Remove check for vr.
25849 (array_bounds_checker::check_array_ref): Remove pointer qualifier
25850 for vr and adjust accordingly.
25851 * gimple-array-bounds.h (get_value_range): Add irange argument.
25852 * value-query.cc (class equiv_allocator): Delete.
25853 (range_query::get_value_range): Delete.
25854 (range_query::range_query): Remove allocator access.
25855 (range_query::~range_query): Same.
25856 * value-query.h (get_value_range): Delete.
25858 (simplify_using_ranges::op_with_boolean_value_range_p): Remove
25859 call to get_value_range.
25860 (check_for_binary_op_overflow): Same.
25861 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
25862 (simplify_using_ranges::simplify_abs_using_ranges): Same.
25863 (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
25864 (simplify_using_ranges::simplify_casted_cond): Same.
25865 (simplify_using_ranges::simplify_switch_using_ranges): Same.
25866 (simplify_using_ranges::two_valued_val_range_p): Same.
25868 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
25871 (simplify_using_ranges::vrp_evaluate_conditional_warnv_with_ops):
25873 (simplify_using_ranges::legacy_fold_cond_overflow): ...this.
25874 (simplify_using_ranges::vrp_visit_cond_stmt): Rename to...
25875 (simplify_using_ranges::legacy_fold_cond): ...this.
25876 (simplify_using_ranges::fold_cond): Rename
25877 vrp_evaluate_conditional_warnv_with_ops to
25878 legacy_fold_cond_overflow.
25879 * vr-values.h (class vr_values): Replace vrp_visit_cond_stmt and
25880 vrp_evaluate_conditional_warnv_with_ops with legacy_fold_cond and
25881 legacy_fold_cond_overflow respectively.
25883 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
25885 * vr-values.cc (get_vr_for_comparison): Remove.
25886 (compare_name_with_value): Same.
25887 (vrp_evaluate_conditional_warnv_with_ops): Remove calls to
25888 compare_name_with_value.
25889 * vr-values.h: Remove compare_name_with_value.
25890 Remove get_vr_for_comparison.
25892 2023-04-26 Roger Sayle <roger@nextmovesoftware.com>
25894 * config/stormy16/stormy16.md (bswaphi2): New define_insn.
25895 (bswapsi2): New define_insn.
25896 (swaphi): New define_insn to exchange two registers (swpw).
25897 (define_peephole2): Recognize exchange of registers as swaphi.
25899 2023-04-26 Richard Biener <rguenther@suse.de>
25901 * gimple-range-path.cc (path_range_query::compute_outgoing_relations):
25903 * ipa-pure-const.cc (pass_nothrow::execute): Likewise.
25904 * predict.cc (apply_return_prediction): Likewise.
25905 * sese.cc (set_ifsese_condition): Likewise. Simplify.
25906 * tree-cfg.cc (assert_unreachable_fallthru_edge_p): Avoid last_stmt.
25907 (make_edges_bb): Likewise.
25908 (make_cond_expr_edges): Likewise.
25909 (end_recording_case_labels): Likewise.
25910 (make_gimple_asm_edges): Likewise.
25911 (cleanup_dead_labels): Likewise.
25912 (group_case_labels): Likewise.
25913 (gimple_can_merge_blocks_p): Likewise.
25914 (gimple_merge_blocks): Likewise.
25915 (find_taken_edge): Likewise. Also handle empty fallthru blocks.
25916 (gimple_duplicate_sese_tail): Avoid last_stmt.
25917 (find_loop_dist_alias): Likewise.
25918 (gimple_block_ends_with_condjump_p): Likewise.
25919 (gimple_purge_dead_eh_edges): Likewise.
25920 (gimple_purge_dead_abnormal_call_edges): Likewise.
25921 (pass_warn_function_return::execute): Likewise.
25922 (execute_fixup_cfg): Likewise.
25923 * tree-eh.cc (redirect_eh_edge_1): Likewise.
25924 (pass_lower_resx::execute): Likewise.
25925 (pass_lower_eh_dispatch::execute): Likewise.
25926 (cleanup_empty_eh): Likewise.
25927 * tree-if-conv.cc (if_convertible_bb_p): Likewise.
25928 (predicate_bbs): Likewise.
25929 (ifcvt_split_critical_edges): Likewise.
25930 * tree-loop-distribution.cc (create_edge_for_control_dependence):
25932 (loop_distribution::transform_reduction_loop): Likewise.
25933 * tree-parloops.cc (transform_to_exit_first_loop_alt): Likewise.
25934 (try_transform_to_exit_first_loop_alt): Likewise.
25935 (transform_to_exit_first_loop): Likewise.
25936 (create_parallel_loop): Likewise.
25937 * tree-scalar-evolution.cc (get_loop_exit_condition): Likewise.
25938 * tree-ssa-dce.cc (mark_last_stmt_necessary): Likewise.
25939 (eliminate_unnecessary_stmts): Likewise.
25941 (dom_opt_dom_walker::set_global_ranges_from_unreachable_edges):
25943 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Likewise.
25944 (pass_tree_ifcombine::execute): Likewise.
25945 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Likewise.
25946 (should_duplicate_loop_header_p): Likewise.
25947 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Likewise.
25948 (tree_estimate_loop_size): Likewise.
25949 (try_unroll_loop_completely): Likewise.
25950 * tree-ssa-loop-ivopts.cc (tree_ssa_iv_optimize_loop): Likewise.
25951 * tree-ssa-loop-manip.cc (ip_normal_pos): Likewise.
25952 (canonicalize_loop_ivs): Likewise.
25953 * tree-ssa-loop-niter.cc (determine_value_range): Likewise.
25954 (bound_difference): Likewise.
25955 (number_of_iterations_popcount): Likewise.
25956 (number_of_iterations_cltz): Likewise.
25957 (number_of_iterations_cltz_complement): Likewise.
25958 (simplify_using_initial_conditions): Likewise.
25959 (number_of_iterations_exit_assumptions): Likewise.
25960 (loop_niter_by_eval): Likewise.
25961 (estimate_numbers_of_iterations): Likewise.
25963 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
25965 * config/riscv/vector.md: Refine vmadc/vmsbc RA constraint.
25967 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
25970 * config/rs6000/rs6000-builtins.def
25971 (__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt
25972 __builtin_vsx_scalar_cmp_exp_qp_lt,
25973 __builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw
25976 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
25979 * config/rs6000/altivec.md (sldoi_to_mov<mode>): Replace predicate
25980 easy_vector_constant with const_vector_each_byte_same, add
25981 handlings in preparation for !easy_vector_constant, and update
25982 VECTOR_UNIT_ALTIVEC_OR_VSX_P with VECTOR_MEM_ALTIVEC_OR_VSX_P.
25983 * config/rs6000/predicates.md (const_vector_each_byte_same): New
25986 2023-04-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25988 * config/riscv/vector.md (*pred_cmp<mode>_merge_tie_mask): New pattern.
25989 (*pred_ltge<mode>_merge_tie_mask): Ditto.
25990 (*pred_cmp<mode>_scalar_merge_tie_mask): Ditto.
25991 (*pred_eqne<mode>_scalar_merge_tie_mask): Ditto.
25992 (*pred_cmp<mode>_extended_scalar_merge_tie_mask): Ditto.
25993 (*pred_eqne<mode>_extended_scalar_merge_tie_mask): Ditto.
25994 (*pred_cmp<mode>_narrow_merge_tie_mask): Ditto.
25996 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
25998 * config/riscv/vector.md: Fix redundant vmv1r.v.
26000 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26002 * config/riscv/vector.md: Fix RA constraint.
26004 2023-04-26 Pan Li <pan2.li@intel.com>
26007 * tree-ssa-sccvn.cc (vn_reference_eq): add type vector subparts
26008 check for vn_reference equal.
26010 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26012 * config/riscv/riscv-opts.h (enum riscv_autovec_preference_enum): Add enum for
26013 auto-vectorization preference.
26014 (enum riscv_autovec_lmul_enum): Add enum for choosing LMUL of RVV
26015 auto-vectorization.
26016 * config/riscv/riscv.opt: Add compile option for RVV auto-vectorization.
26018 2023-04-26 Jivan Hakobyan <jivanhakobyan9@gmail.com>
26020 * config/riscv/bitmanip.md: Updated predicates of bclri<mode>_nottwobits
26021 and bclridisi_nottwobits patterns.
26022 * config/riscv/predicates.md: (not_uimm_extra_bit_or_nottwobits): Adjust
26023 predicate to avoid splitting arith constants.
26024 (const_nottwobits_not_arith_operand): New predicate.
26026 2023-04-25 Hans-Peter Nilsson <hp@axis.com>
26028 * recog.cc (peep2_attempt, peep2_update_life): Correct
26029 head-comment description of parameter match_len.
26031 2023-04-25 Vineet Gupta <vineetg@rivosinc.com>
26033 * config/riscv/riscv.md: riscv_move_integer() drop in_splitter arg.
26034 riscv_split_symbol() drop in_splitter arg.
26035 * config/riscv/riscv.cc: riscv_move_integer() drop in_splitter arg.
26036 riscv_split_symbol() drop in_splitter arg.
26037 riscv_force_temporary() drop in_splitter arg.
26038 * config/riscv/riscv-protos.h: riscv_move_integer() drop in_splitter arg.
26039 riscv_split_symbol() drop in_splitter arg.
26041 2023-04-25 Eric Botcazou <ebotcazou@adacore.com>
26043 * tree-ssa.cc (insert_debug_temp_for_var_def): Do not create
26044 superfluous debug temporaries for single GIMPLE assignments.
26046 2023-04-25 Richard Biener <rguenther@suse.de>
26048 PR tree-optimization/109609
26049 * attr-fnspec.h (arg_max_access_size_given_by_arg_p):
26051 * tree-ssa-alias.cc (check_fnspec): Correctly interpret
26052 the size given by arg_max_access_size_given_by_arg_p as
26053 maximum, not exact, size.
26055 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26058 * config/aarch64/aarch64-simd.md (orn<mode>3): Rename to...
26059 (orn<mode>3<vczle><vczbe>): ... This.
26060 (bic<mode>3): Rename to...
26061 (bic<mode>3<vczle><vczbe>): ... This.
26062 (<su><maxmin><mode>3): Rename to...
26063 (<su><maxmin><mode>3<vczle><vczbe>): ... This.
26065 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26067 * config/aarch64/aarch64-simd.md (<su_optab>div<mode>3): New define_expand.
26068 * config/aarch64/iterators.md (VQDIV): New mode iterator.
26069 (vnx2di): New mode attribute.
26071 2023-04-25 Richard Biener <rguenther@suse.de>
26073 PR rtl-optimization/109585
26074 * tree-ssa-alias.cc (aliasing_component_refs_p): Fix typo.
26076 2023-04-25 Jakub Jelinek <jakub@redhat.com>
26079 * config/rs6000/rs6000.cc (rs6000_is_valid_rotate_dot_mask): For
26080 !TARGET_64BIT, don't return true if UINTVAL (mask) << (63 - nb)
26081 is larger than signed int maximum.
26083 2023-04-25 Martin Liska <mliska@suse.cz>
26085 * doc/gcov.texi: Document the new "calls" field and document
26086 the API bump. Mention also "block_ids" for lines.
26087 * gcov.cc (output_intermediate_json_line): Output info about
26088 calls and extend branches as well.
26089 (generate_results): Bump version to 2.
26090 (output_line_details): Use block ID instead of a non-sensual
26093 2023-04-25 Roger Sayle <roger@nextmovesoftware.com>
26095 * config/stormy16/stormy16.md (zero_extendqihi2): Restore/fix
26096 length attribute for the first (memory operand) alternative.
26098 2023-04-25 Victor Do Nascimento <victor.donascimento@arm.com>
26100 * config/aarch64/aarch64-simd.md(aarch64_simd_stp<mode>): New.
26101 * config/aarch64/constraints.md: Make "Umn" relaxed memory
26103 * config/aarch64/iterators.md(ldpstp_vel_sz): New.
26105 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
26107 * value-range.cc (frange::set): Adjust constructor.
26108 * value-range.h (nan_state::nan_state): Replace default
26109 constructor with one taking an argument.
26111 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
26113 * ipa-cp.cc (ipa_range_contains_p): New.
26114 (decide_whether_version_node): Use it.
26116 2023-04-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
26118 * tree-ssa-forwprop.cc (is_combined_permutation_identity): Try to
26119 simplify two successive VEC_PERM_EXPRs with same VLA mask,
26120 where mask chooses elements in reverse order.
26122 2023-04-24 Andrew Pinski <apinski@marvell.com>
26124 * tree-ssa-phiopt.cc (match_simplify_replacement): Add new arguments
26125 and support diamond shaped basic block form.
26126 (tree_ssa_phiopt_worker): Update call to match_simplify_replacement
26128 2023-04-24 Andrew Pinski <apinski@marvell.com>
26130 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
26131 Instead of calling last_and_only_stmt, look for the last statement
26134 2023-04-24 Andrew Pinski <apinski@marvell.com>
26136 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
26138 (match_simplify_replacement): Call
26139 empty_bb_or_one_feeding_into_p instead of doing it inline.
26141 2023-04-24 Andrew Pinski <apinski@marvell.com>
26143 PR tree-optimization/68894
26144 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove the
26145 continue for the do_hoist_loads diamond case.
26147 2023-04-24 Andrew Pinski <apinski@marvell.com>
26149 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Rearrange
26150 code for better code readability.
26152 2023-04-24 Andrew Pinski <apinski@marvell.com>
26154 PR tree-optimization/109604
26155 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Move the
26156 diamond form check from ...
26157 (minmax_replacement): Here.
26159 2023-04-24 Patrick Palka <ppalka@redhat.com>
26161 * tree.cc (strip_array_types): Don't define here.
26162 (is_typedef_decl): Don't define here.
26163 (typedef_variant_p): Don't define here.
26164 * tree.h (strip_array_types): Define here.
26165 (is_typedef_decl): Define here.
26166 (typedef_variant_p): Define here.
26168 2023-04-24 Frederik Harwath <frederik@codesourcery.com>
26170 * doc/generic.texi (OpenMP): Add != to allowed
26171 conditions and state that vars can be unsigned.
26172 * tree.def (OMP_FOR): Likewise.
26174 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26176 * config/aarch64/aarch64-simd.md (mulv2di3): New expander.
26178 2023-04-24 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
26180 * doc/install.texi: Consistently use Solaris rather than Solaris 2.
26181 Remove explicit Solaris 11 references.
26183 (Options specification, --with-gnu-as): as and gas always differ
26185 Remove /usr/ccs/bin reference.
26186 (Installing GCC: Binaries, Solaris (SPARC, Intel)): Remove.
26187 (i?86-*-solaris2*): Merge assembler, linker recommendations ...
26188 (*-*-solaris2*): ... here.
26189 Update bundled GCC versions.
26190 Don't refer to pre-built binaries.
26191 Remove /bin/sh warning.
26192 Update assembler, linker recommendations.
26193 Document GNAT bootstrap compiler.
26194 (sparc-sun-solaris2*): Remove non-UltraSPARC reference.
26195 (sparc64-*-solaris2*): Move content...
26196 (sparcv9-*-solaris2*): ...here.
26197 Add GDC for 64-bit bootstrap compilers.
26199 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26202 * config/aarch64/aarch64-sve.md (<optab><mode>3): Handle TARGET_SVE2 MUL
26204 * config/aarch64/aarch64-sve2.md (*aarch64_mul_unpredicated_<mode>): New
26207 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26209 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): Rename to...
26210 (aarch64_<su>abal2<mode>_insn): ... This. Use RTL codes instead of unspec.
26211 (aarch64_<su>abal2<mode>): New define_expand.
26212 * config/aarch64/aarch64.cc (aarch64_abd_rtx_p): New function.
26213 (aarch64_rtx_costs): Handle ABD rtxes.
26214 * config/aarch64/aarch64.md (UNSPEC_SABAL2, UNSPEC_UABAL2): Delete.
26215 * config/aarch64/iterators.md (ABAL2): Delete.
26216 (sur): Remove handling of UNSPEC_UABAL2 and UNSPEC_SABAL2.
26218 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26220 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>): Rename to...
26221 (aarch64_<su>abal<mode>): ... This. Use RTL codes instead of unspec.
26222 (<sur>sadv16qi): Rename to...
26223 (<su>sadv16qi): ... This. Adjust for the above.
26224 * config/aarch64/aarch64-sve.md (<sur>sad<vsi2qi>): Rename to...
26225 (<su>sad<vsi2qi>): ... This. Adjust for the above.
26226 * config/aarch64/aarch64.md (UNSPEC_SABAL, UNSPEC_UABAL): Delete.
26227 * config/aarch64/iterators.md (ABAL): Delete.
26228 (sur): Remove handling of UNSPEC_SABAL and UNSPEC_UABAL.
26230 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26232 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>): Rename to...
26233 (aarch64_<su>abdl2<mode>_insn): ... This. Use RTL codes instead of unspec.
26234 (aarch64_<su>abdl2<mode>): New define_expand.
26235 * config/aarch64/aarch64.md (UNSPEC_SABDL2, UNSPEC_UABDL2): Delete.
26236 * config/aarch64/iterators.md (ABDL2): Delete.
26237 (sur): Remove handling of UNSPEC_SABDL2 and UNSPEC_UABDL2.
26239 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26241 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): Rename to...
26242 (aarch64_<su>abdl<mode>): ... This. Use standard RTL ops instead of
26244 * config/aarch64/aarch64.md (UNSPEC_SABDL, UNSPEC_UABDL): Delete.
26245 * config/aarch64/iterators.md (ABDL): Delete.
26246 (sur): Remove handling of UNSPEC_SABDL and UNSPEC_UABDL.
26248 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26250 * config/aarch64/aarch64-simd.md
26251 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): New pattern.
26253 2023-04-24 Richard Biener <rguenther@suse.de>
26255 * gimple-ssa-split-paths.cc (is_feasible_trace): Avoid
26257 * graphite-scop-detection.cc (single_pred_cond_non_loop_exit):
26259 * ipa-fnsummary.cc (set_cond_stmt_execution_predicate): Likewise.
26260 (set_switch_stmt_execution_predicate): Likewise.
26261 (phi_result_unknown_predicate): Likewise.
26262 * ipa-prop.cc (compute_complex_ancestor_jump_func): Likewise.
26263 (ipa_analyze_indirect_call_uses): Likewise.
26264 * predict.cc (predict_iv_comparison): Likewise.
26265 (predict_extra_loop_exits): Likewise.
26266 (predict_loops): Likewise.
26267 (tree_predict_by_opcode): Likewise.
26268 * gimple-predicate-analysis.cc (predicate::init_from_control_deps):
26270 * gimple-pretty-print.cc (dump_implicit_edges): Likewise.
26271 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Likewise.
26272 (replace_phi_edge_with_variable): Likewise.
26273 (two_value_replacement): Likewise.
26274 (value_replacement): Likewise.
26275 (minmax_replacement): Likewise.
26276 (spaceship_replacement): Likewise.
26277 (cond_removal_in_builtin_zero_pattern): Likewise.
26278 * tree-ssa-reassoc.cc (maybe_optimize_range_tests): Likewise.
26279 * tree-ssa-sccvn.cc (vn_phi_eq): Likewise.
26280 (vn_phi_lookup): Likewise.
26281 (vn_phi_insert): Likewise.
26282 * tree-ssa-structalias.cc (compute_points_to_sets): Likewise.
26283 * tree-ssa-threadbackward.cc (back_threader::maybe_thread_block):
26285 (back_threader_profitability::possibly_profitable_path_p):
26287 * tree-ssa-threadedge.cc (jump_threader::thread_outgoing_edges):
26289 * tree-switch-conversion.cc (pass_convert_switch::execute):
26291 (pass_lower_switch<O0>::execute): Likewise.
26292 * tree-tailcall.cc (tree_optimize_tail_calls_1): Likewise.
26293 * tree-vect-loop-manip.cc (vect_loop_versioning): Likewise.
26294 * tree-vect-slp.cc (vect_slp_function): Likewise.
26295 * tree-vect-stmts.cc (cfun_returns): Likewise.
26296 * tree-vectorizer.cc (vect_loop_vectorized_call): Likewise.
26297 (vect_loop_dist_alias_call): Likewise.
26299 2023-04-24 Richard Biener <rguenther@suse.de>
26301 * cfgcleanup.cc (outgoing_edges_match): Use FORWARDER_BLOCK_P.
26303 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26305 * config/riscv/riscv-vsetvl.cc
26306 (vector_infos_manager::all_avail_in_compatible_p): New function.
26307 (pass_vsetvl::refine_vsetvls): Optimize vsetvls.
26308 * config/riscv/riscv-vsetvl.h: New function.
26310 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26312 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function
26313 comment for cleanup_insns.
26315 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26317 * config/riscv/vector-iterators.md: New unspec to refine fault first load pattern.
26318 * config/riscv/vector.md: Refine fault first load pattern to erase avl from instructions
26319 with the fault first load property.
26321 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26323 * config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_): Rename to...
26324 (aarch64_float_truncate_lo_<mode><vczle><vczbe>): ... This.
26326 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26329 * config/aarch64/aarch64-simd.md (aarch64_addp<mode>): Rename to...
26330 (aarch64_addp<mode><vczle><vczbe>): ... This.
26332 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
26334 * config/stormy16/stormy16.cc (xstormy16_rtx_costs): Rewrite to
26335 provide reasonable values for common arithmetic operations and
26336 immediate operands (in several machine modes).
26338 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
26340 * config/stormy16/stormy16.cc (xstormy16_print_operand): Add %h
26341 format specifier to output high_part register name of SImode reg.
26342 * config/stormy16/stormy16.md (extendhisi2): New define_insn.
26343 (zero_extendqihi2): Fix lengths, consistent formatting and add
26344 "and Rx,#255" alternative, for documentation purposes.
26345 (zero_extendhisi2): New define_insn.
26347 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
26349 * config/stormy16/stormy16.cc (xstormy16_output_shift): Implement
26350 SImode shifts by two by performing a single bit SImode shift twice.
26352 2023-04-23 Aldy Hernandez <aldyh@redhat.com>
26354 PR tree-optimization/109593
26355 * value-range.cc (frange::operator==): Handle NANs.
26357 2023-04-23 liuhongt <hongtao.liu@intel.com>
26359 PR rtl-optimization/108707
26360 * ira-costs.cc (scan_one_insn): Use NO_REGS instead of
26361 GENERAL_REGS when preferred reg_class is not known.
26363 2023-04-22 Andrew Pinski <apinski@marvell.com>
26365 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
26366 Change the code around slightly to move diamond
26367 handling for do_store_elim/do_hoist_loads out of
26370 2023-04-22 Andrew Pinski <apinski@marvell.com>
26372 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
26373 Remove check on empty_block_p.
26375 2023-04-22 Jakub Jelinek <jakub@redhat.com>
26377 PR bootstrap/109589
26378 * system.h (class auto_mpz): Workaround PR62101 bug in GCC 4.8 and 4.9.
26379 * realmpfr.h (class auto_mpfr): Likewise.
26381 2023-04-22 Jakub Jelinek <jakub@redhat.com>
26383 PR tree-optimization/109583
26384 * match.pd (fneg/fadd simplify): Don't call related_vector_mode
26385 if vec_mode is not VECTOR_MODE_P.
26387 2023-04-22 Jan Hubicka <hubicka@ucw.cz>
26388 Ondrej Kubanek <kubanek0ondrej@gmail.com>
26390 * cfgloopmanip.h (adjust_loop_info_after_peeling): Declare.
26391 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix updating of
26392 loop profile and bounds after header duplication.
26393 * tree-ssa-loop-ivcanon.cc (adjust_loop_info_after_peeling):
26394 Break out from try_peel_loop; fix handling of 0 iterations.
26395 (try_peel_loop): Use adjust_loop_info_after_peeling.
26397 2023-04-21 Andrew MacLeod <amacleod@redhat.com>
26399 PR tree-optimization/109546
26400 * tree-vrp.cc (remove_unreachable::remove_and_update_globals): Do
26401 not fold conditions with ADDR_EXPR early.
26403 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26405 * config/aarch64/aarch64.md (aarch64_umax<mode>3_insn): Delete.
26406 (umax<mode>3): Emit raw UMAX RTL instead of going through gen_ function
26408 (<optab><mode>3): New define_expand for MAXMIN_NOUMAX codes.
26409 (*aarch64_<optab><mode>3_zero): Define.
26410 (*aarch64_<optab><mode>3_cssc): Likewise.
26411 * config/aarch64/iterators.md (maxminand): New code attribute.
26413 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26416 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Define.
26417 * config/aarch64/aarch64-protos.h (aarch64_output_load_tp):
26419 * config/aarch64/aarch64.cc (aarch64_tpidr_register): Declare.
26420 (aarch64_override_options_internal): Handle the above.
26421 (aarch64_output_load_tp): New function.
26422 * config/aarch64/aarch64.md (aarch64_load_tp_hard): Call
26423 aarch64_output_load_tp.
26424 * config/aarch64/aarch64.opt (aarch64_tp_reg): Define enum.
26425 (mtp=): New option.
26426 * doc/invoke.texi (AArch64 Options): Document -mtp=.
26428 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26431 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Define.
26432 (add_vec_concat_subst_be): Likewise.
26435 (add<mode>3): Rename to...
26436 (add<mode>3<vczle><vczbe>): ... This.
26437 (sub<mode>3): Rename to...
26438 (sub<mode>3<vczle><vczbe>): ... This.
26439 (mul<mode>3): Rename to...
26440 (mul<mode>3<vczle><vczbe>): ... This.
26441 (and<mode>3): Rename to...
26442 (and<mode>3<vczle><vczbe>): ... This.
26443 (ior<mode>3): Rename to...
26444 (ior<mode>3<vczle><vczbe>): ... This.
26445 (xor<mode>3): Rename to...
26446 (xor<mode>3<vczle><vczbe>): ... This.
26447 * config/aarch64/iterators.md (VDZ): Define.
26449 2023-04-21 Patrick Palka <ppalka@redhat.com>
26451 * tree.cc (walk_tree_1): Avoid repeatedly dereferencing tp
26454 2023-04-21 Jan Hubicka <jh@suse.cz>
26456 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix previous
26459 2023-04-21 Vineet Gupta <vineetg@rivosinc.com>
26461 * expmed.h (x_shift*_cost): convert to int [speed][mode][shift].
26462 (shift*_cost_ptr ()): Access x_shift*_cost array directly.
26464 2023-04-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
26466 * config/aarch64/aarch64.cc (aarch64_simd_dup_constant): Use
26467 force_reg instead of copy_to_mode_reg.
26468 (aarch64_expand_vector_init): Likewise.
26470 2023-04-21 Uroš Bizjak <ubizjak@gmail.com>
26472 * config/i386/i386.h (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P): Remove.
26473 (REG_OK_FOR_INDEX_NONSTRICT_P, REG_OK_FOR_BASE_NONSTRICT_P): Ditto.
26474 (REG_OK_FOR_INDEX_STRICT_P, REG_OK_FOR_BASE_STRICT_P): Ditto.
26475 (FIRST_INDEX_REG, LAST_INDEX_REG): New defines.
26476 (LEGACY_INDEX_REG_P, LEGACY_INDEX_REGNO_P): New macros.
26477 (INDEX_REG_P, INDEX_REGNO_P): Ditto.
26478 (REGNO_OK_FOR_INDEX_P): Use INDEX_REGNO_P predicates.
26479 (REGNO_OK_FOR_INDEX_NONSTRICT_P): New macro.
26480 (EG_OK_FOR_BASE_NONSTRICT_P): Ditto.
26481 * config/i386/predicates.md (index_register_operand):
26482 Use REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
26483 * config/i386/i386.cc (ix86_legitimate_address_p): Use
26484 REGNO_OK_FOR_BASE_P, REGNO_OK_FOR_BASE_NONSTRICT_P,
26485 REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
26487 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
26488 Ondrej Kubanek <kubanek0ondrej@gmail.com>
26490 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Update loop header and
26493 2023-04-21 Richard Biener <rguenther@suse.de>
26495 * is-a.h (safe_is_a): New.
26497 2023-04-21 Richard Biener <rguenther@suse.de>
26499 * gimple-iterator.h (gimple_stmt_iterator::operator*): Add.
26500 (gphi_iterator::operator*): Likewise.
26502 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
26503 Michal Jires <michal@jires.eu>
26505 * ipa-inline.cc (class inline_badness): New class.
26506 (edge_heap_t, edge_heap_node_t): Use inline_badness for badness instead
26508 (update_edge_key): Update.
26509 (lookup_recursive_calls): Likewise.
26510 (recursive_inlining): Likewise.
26511 (add_new_edges_to_heap): Likewise.
26512 (inline_small_functions): Likewise.
26514 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
26516 * ipa-devirt.cc (odr_types_equivalent_p): Cleanup warned checks.
26518 2023-04-21 Richard Biener <rguenther@suse.de>
26520 PR tree-optimization/109573
26521 * tree-vect-loop.cc (vectorizable_live_operation): Allow
26522 unhandled SSA copy as well. Demote assert to checking only.
26524 2023-04-21 Richard Biener <rguenther@suse.de>
26526 * df-core.cc (df_analyze): Compute RPO on the reverse graph
26527 for DF_BACKWARD problems.
26528 (loop_post_order_compute): Rename to ...
26529 (loop_rev_post_order_compute): ... this, compute a RPO.
26530 (loop_inverted_post_order_compute): Rename to ...
26531 (loop_inverted_rev_post_order_compute): ... this, compute a RPO.
26532 (df_analyze_loop): Use RPO on the forward graph for DF_FORWARD
26533 problems, RPO on the inverted graph for DF_BACKWARD.
26535 2023-04-21 Richard Biener <rguenther@suse.de>
26537 * cfganal.h (inverted_rev_post_order_compute): Rename
26539 (inverted_post_order_compute): ... this. Add struct function
26540 argument, change allocation to a C array.
26541 * cfganal.cc (inverted_rev_post_order_compute): Likewise.
26542 * lcm.cc (compute_antinout_edge): Adjust.
26543 * lra-lives.cc (lra_create_live_ranges_1): Likewise.
26544 * tree-ssa-dce.cc (remove_dead_stmt): Likewise.
26545 * tree-ssa-pre.cc (compute_antic): Likewise.
26547 2023-04-21 Richard Biener <rguenther@suse.de>
26549 * df.h (df_d::postorder_inverted): Change back to int *,
26551 * df-core.cc (rest_of_handle_df_finish): Adjust.
26552 (df_analyze_1): Likewise.
26553 (df_analyze): For DF_FORWARD problems use RPO on the forward
26555 (loop_inverted_post_order_compute): Adjust API.
26556 (df_analyze_loop): Adjust.
26557 (df_get_n_blocks): Likewise.
26558 (df_get_postorder): Likewise.
26560 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26563 * config/riscv/riscv-vsetvl.cc
26564 (vector_infos_manager::all_empty_predecessor_p): New function.
26565 (pass_vsetvl::backward_demand_fusion): Ditto.
26566 * config/riscv/riscv-vsetvl.h: Ditto.
26568 2023-04-21 Robin Dapp <rdapp@ventanamicro.com>
26571 * config/riscv/generic.md: Change standard names to insn names.
26573 2023-04-21 Richard Biener <rguenther@suse.de>
26575 * lcm.cc (compute_antinout_edge): Use RPO on the inverted graph.
26576 (compute_laterin): Use RPO.
26577 (compute_available): Likewise.
26579 2023-04-21 Peng Fan <fanpeng@loongson.cn>
26581 * config/loongarch/gnu-user.h (MUSL_DYNAMIC_LINKER): Redefine.
26583 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26586 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): New function.
26587 (vector_insn_info::skip_avl_compatible_p): Ditto.
26588 (vector_insn_info::merge): Remove default value.
26589 (pass_vsetvl::compute_local_backward_infos): Ditto.
26590 (pass_vsetvl::cleanup_insns): Add local vsetvl elimination.
26591 * config/riscv/riscv-vsetvl.h: Ditto.
26593 2023-04-20 Alejandro Colomar <alx.manpages@gmail.com>
26595 * doc/extend.texi (Common Function Attributes): Remove duplicate
26598 2023-04-20 Andrew MacLeod <amacleod@redhat.com>
26600 PR tree-optimization/109564
26601 * gimple-range-fold.cc (fold_using_range::range_of_phi): Do no ignore
26602 UNDEFINED range names when deciding if all PHI arguments are the same,
26604 2023-04-20 Jakub Jelinek <jakub@redhat.com>
26606 PR tree-optimization/109011
26607 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): Use
26608 .CTZ (X) = .POPCOUNT ((X - 1) & ~X) in preference to
26609 .CTZ (X) = PREC - .POPCOUNT (X | -X).
26611 2023-04-20 Vladimir N. Makarov <vmakarov@redhat.com>
26613 * lra-constraints.cc (match_reload): Exclude some hard regs for
26614 multi-reg inout reload pseudos used in asm in different mode.
26616 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
26618 * config/arm/arm.cc (thumb1_legitimate_address_p):
26619 Use VIRTUAL_REGISTER_P predicate.
26620 (arm_eliminable_register): Ditto.
26621 * config/avr/avr.md (push<mode>_1): Ditto.
26622 * config/bfin/predicates.md (register_no_elim_operand): Ditto.
26623 * config/h8300/predicates.md (register_no_sp_elim_operand): Ditto.
26624 * config/i386/predicates.md (register_no_elim_operand): Ditto.
26625 * config/iq2000/predicates.md (call_insn_operand): Ditto.
26626 * config/microblaze/microblaze.h (CALL_INSN_OP): Ditto.
26628 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
26631 * config/i386/predicates.md (extract_operator): New predicate.
26632 * config/i386/i386.md (any_extract): Remove code iterator.
26633 (*cmpqi_ext<mode>_1_mem_rex64): Use extract_operator predicate.
26634 (*cmpqi_ext<mode>_1): Ditto.
26635 (*cmpqi_ext<mode>_2): Ditto.
26636 (*cmpqi_ext<mode>_3_mem_rex64): Ditto.
26637 (*cmpqi_ext<mode>_3): Ditto.
26638 (*cmpqi_ext<mode>_4): Ditto.
26639 (*extzvqi_mem_rex64): Ditto.
26641 (*insvqi_2): Ditto.
26642 (*extendqi<SWI24:mode>_ext_1): Ditto.
26643 (*addqi_ext<mode>_0): Ditto.
26644 (*addqi_ext<mode>_1): Ditto.
26645 (*addqi_ext<mode>_2): Ditto.
26646 (*subqi_ext<mode>_0): Ditto.
26647 (*subqi_ext<mode>_2): Ditto.
26648 (*testqi_ext<mode>_1): Ditto.
26649 (*testqi_ext<mode>_2): Ditto.
26650 (*andqi_ext<mode>_0): Ditto.
26651 (*andqi_ext<mode>_1): Ditto.
26652 (*andqi_ext<mode>_1_cc): Ditto.
26653 (*andqi_ext<mode>_2): Ditto.
26654 (*<any_or:code>qi_ext<mode>_0): Ditto.
26655 (*<any_or:code>qi_ext<mode>_1): Ditto.
26656 (*<any_or:code>qi_ext<mode>_2): Ditto.
26657 (*xorqi_ext<mode>_1_cc): Ditto.
26658 (*negqi_ext<mode>_2): Ditto.
26659 (*ashlqi_ext<mode>_2): Ditto.
26660 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
26662 2023-04-20 Raphael Zinsly <rzinsly@ventanamicro.com>
26665 * config/riscv/bitmanip.md (clz, ctz, pcnt, min, max patterns): Use
26666 <bitmanip_insn> as the type to allow for fine grained control of
26667 scheduling these insns.
26668 * config/riscv/generic.md (generic_alu): Add bitmanip, clz, ctz, pcnt,
26670 * config/riscv/riscv.md (type attribute): Add types for clz, ctz,
26671 pcnt, signed and unsigned min/max.
26673 2023-04-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26674 kito-cheng <kito.cheng@sifive.com>
26676 * config/riscv/riscv.h (enum reg_class): Fix RVV register order.
26678 2023-04-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26679 kito-cheng <kito.cheng@sifive.com>
26682 * config/riscv/riscv-vsetvl.cc (count_regno_occurrences): New function.
26683 (pass_vsetvl::cleanup_insns): Fix bug.
26685 2023-04-20 Andrew Stubbs <ams@codesourcery.com>
26687 * config/gcn/gcn-valu.md (vnsi, VnSI): Add scalar modes.
26688 (ldexp<mode>3): Delete.
26689 (ldexp<mode>3<exec>): Change "B" to "A".
26691 2023-04-20 Jakub Jelinek <jakub@redhat.com>
26692 Jonathan Wakely <jwakely@redhat.com>
26694 * tree.h (built_in_function_equal_p): New helper function.
26695 (fndecl_built_in_p): Turn into variadic template to support
26696 1 or more built_in_function arguments.
26697 * builtins.cc (fold_builtin_expect): Use 3 argument fndecl_built_in_p.
26698 * gimplify.cc (goa_stabilize_expr): Likewise.
26699 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
26700 * ipa-fnsummary.cc (compute_fn_summary): Likewise.
26701 * omp-low.cc (setjmp_or_longjmp_p): Likewise.
26702 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
26703 cgraph_update_edges_for_call_stmt_node,
26704 cgraph_edge::verify_corresponds_to_fndecl,
26705 cgraph_node::verify_node): Likewise.
26706 * tree-stdarg.cc (optimize_va_list_gpr_fpr_size): Likewise.
26707 * gimple-ssa-warn-access.cc (matching_alloc_calls_p): Likewise.
26708 * ipa-prop.cc (try_make_edge_direct_virtual_call): Likewise.
26710 2023-04-20 Jakub Jelinek <jakub@redhat.com>
26712 PR tree-optimization/109011
26713 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): New function.
26714 (vect_recog_popcount_clz_ctz_ffs_pattern): Move vect_pattern_detected
26715 call later. Don't punt for IFN_CTZ or IFN_FFS if it doesn't have
26716 direct optab support, but has instead IFN_CLZ, IFN_POPCOUNT or
26717 for IFN_FFS IFN_CTZ support, use vect_recog_ctz_ffs_pattern for that
26719 (vect_vect_recog_func_ptrs): Add ctz_ffs entry.
26721 2023-04-20 Richard Biener <rguenther@suse.de>
26723 * df-core.cc (rest_of_handle_df_initialize): Remove
26724 computation of df->postorder, df->postorder_inverted and
26727 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
26729 * common/config/i386/i386-common.cc
26730 (OPTION_MASK_ISA2_AVX_UNSET): Add OPTION_MASK_ISA2_VAES_UNSET.
26731 (ix86_handle_option): Set AVX flag for VAES.
26732 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
26733 Add OPTION_MASK_ISA2_VAES_UNSET.
26734 (def_builtin): Share builtin between AES and VAES.
26735 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
26737 * config/i386/i386.md (aes): New isa attribute.
26738 * config/i386/sse.md (aesenc): Add pattern for VAES with xmm.
26739 (aesenclast): Ditto.
26741 (aesdeclast): Ditto.
26742 * config/i386/vaesintrin.h: Remove redundant avx target push.
26743 * config/i386/wmmintrin.h (_mm_aesdec_si128): Change to macro.
26744 (_mm_aesdeclast_si128): Ditto.
26745 (_mm_aesenc_si128): Ditto.
26746 (_mm_aesenclast_si128): Ditto.
26748 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
26750 * config/i386/avx2intrin.h
26751 (_MM_REDUCE_OPERATOR_BASIC_EPI16): New macro.
26752 (_MM_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
26753 (_MM256_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
26754 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
26755 (_MM_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
26756 (_MM_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
26757 (_MM256_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
26758 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
26759 (_mm_reduce_add_epi16): New instrinsics.
26760 (_mm_reduce_mul_epi16): Ditto.
26761 (_mm_reduce_and_epi16): Ditto.
26762 (_mm_reduce_or_epi16): Ditto.
26763 (_mm_reduce_max_epi16): Ditto.
26764 (_mm_reduce_max_epu16): Ditto.
26765 (_mm_reduce_min_epi16): Ditto.
26766 (_mm_reduce_min_epu16): Ditto.
26767 (_mm256_reduce_add_epi16): Ditto.
26768 (_mm256_reduce_mul_epi16): Ditto.
26769 (_mm256_reduce_and_epi16): Ditto.
26770 (_mm256_reduce_or_epi16): Ditto.
26771 (_mm256_reduce_max_epi16): Ditto.
26772 (_mm256_reduce_max_epu16): Ditto.
26773 (_mm256_reduce_min_epi16): Ditto.
26774 (_mm256_reduce_min_epu16): Ditto.
26775 (_mm_reduce_add_epi8): Ditto.
26776 (_mm_reduce_mul_epi8): Ditto.
26777 (_mm_reduce_and_epi8): Ditto.
26778 (_mm_reduce_or_epi8): Ditto.
26779 (_mm_reduce_max_epi8): Ditto.
26780 (_mm_reduce_max_epu8): Ditto.
26781 (_mm_reduce_min_epi8): Ditto.
26782 (_mm_reduce_min_epu8): Ditto.
26783 (_mm256_reduce_add_epi8): Ditto.
26784 (_mm256_reduce_mul_epi8): Ditto.
26785 (_mm256_reduce_and_epi8): Ditto.
26786 (_mm256_reduce_or_epi8): Ditto.
26787 (_mm256_reduce_max_epi8): Ditto.
26788 (_mm256_reduce_max_epu8): Ditto.
26789 (_mm256_reduce_min_epi8): Ditto.
26790 (_mm256_reduce_min_epu8): Ditto.
26791 * config/i386/avx512vlbwintrin.h:
26792 (_mm_mask_reduce_add_epi16): Ditto.
26793 (_mm_mask_reduce_mul_epi16): Ditto.
26794 (_mm_mask_reduce_and_epi16): Ditto.
26795 (_mm_mask_reduce_or_epi16): Ditto.
26796 (_mm_mask_reduce_max_epi16): Ditto.
26797 (_mm_mask_reduce_max_epu16): Ditto.
26798 (_mm_mask_reduce_min_epi16): Ditto.
26799 (_mm_mask_reduce_min_epu16): Ditto.
26800 (_mm256_mask_reduce_add_epi16): Ditto.
26801 (_mm256_mask_reduce_mul_epi16): Ditto.
26802 (_mm256_mask_reduce_and_epi16): Ditto.
26803 (_mm256_mask_reduce_or_epi16): Ditto.
26804 (_mm256_mask_reduce_max_epi16): Ditto.
26805 (_mm256_mask_reduce_max_epu16): Ditto.
26806 (_mm256_mask_reduce_min_epi16): Ditto.
26807 (_mm256_mask_reduce_min_epu16): Ditto.
26808 (_mm_mask_reduce_add_epi8): Ditto.
26809 (_mm_mask_reduce_mul_epi8): Ditto.
26810 (_mm_mask_reduce_and_epi8): Ditto.
26811 (_mm_mask_reduce_or_epi8): Ditto.
26812 (_mm_mask_reduce_max_epi8): Ditto.
26813 (_mm_mask_reduce_max_epu8): Ditto.
26814 (_mm_mask_reduce_min_epi8): Ditto.
26815 (_mm_mask_reduce_min_epu8): Ditto.
26816 (_mm256_mask_reduce_add_epi8): Ditto.
26817 (_mm256_mask_reduce_mul_epi8): Ditto.
26818 (_mm256_mask_reduce_and_epi8): Ditto.
26819 (_mm256_mask_reduce_or_epi8): Ditto.
26820 (_mm256_mask_reduce_max_epi8): Ditto.
26821 (_mm256_mask_reduce_max_epu8): Ditto.
26822 (_mm256_mask_reduce_min_epi8): Ditto.
26823 (_mm256_mask_reduce_min_epu8): Ditto.
26825 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
26827 * common/config/i386/i386-common.cc
26828 (OPTION_MASK_ISA_VPCLMULQDQ_SET):
26829 Add OPTION_MASK_ISA_PCLMUL_SET and OPTION_MASK_ISA_AVX_SET.
26830 (OPTION_MASK_ISA_AVX_UNSET):
26831 Add OPTION_MASK_ISA_VPCLMULQDQ_UNSET.
26832 (OPTION_MASK_ISA_PCLMUL_UNSET): Ditto.
26833 * config/i386/i386.md (vpclmulqdqvl): New.
26834 * config/i386/sse.md (pclmulqdq): Add evex encoding.
26835 * config/i386/vpclmulqdqintrin.h: Remove redudant avx target
26838 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
26840 * config/i386/avx512vlbwintrin.h
26841 (_mm_mask_blend_epi16): Remove __OPTIMIZE__ wrapper.
26842 (_mm_mask_blend_epi8): Ditto.
26843 (_mm256_mask_blend_epi16): Ditto.
26844 (_mm256_mask_blend_epi8): Ditto.
26845 * config/i386/avx512vlintrin.h
26846 (_mm256_mask_blend_pd): Ditto.
26847 (_mm256_mask_blend_ps): Ditto.
26848 (_mm256_mask_blend_epi64): Ditto.
26849 (_mm256_mask_blend_epi32): Ditto.
26850 (_mm_mask_blend_pd): Ditto.
26851 (_mm_mask_blend_ps): Ditto.
26852 (_mm_mask_blend_epi64): Ditto.
26853 (_mm_mask_blend_epi32): Ditto.
26854 * config/i386/sse.md (VF_AVX512BWHFBF16): Removed.
26855 (VF_AVX512HFBFVL): Move it before the first usage.
26856 (<avx512>_blendm<mode>): Change iterator from VF_AVX512BWHFBF16
26857 to VF_AVX512HFBFVL.
26859 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
26861 * common/config/i386/i386-common.cc
26862 (OPTION_MASK_ISA_AVX512VBMI2_SET): Change OPTION_MASK_ISA_AVX512F_SET
26863 to OPTION_MASK_ISA_AVX512BW_SET.
26864 (OPTION_MASK_ISA_AVX512F_UNSET):
26865 Remove OPTION_MASK_ISA_AVX512VBMI2_UNSET.
26866 (OPTION_MASK_ISA_AVX512BW_UNSET):
26867 Add OPTION_MASK_ISA_AVX512VBMI2_UNSET.
26868 * config/i386/avx512vbmi2intrin.h: Do not push avx512bw.
26869 * config/i386/avx512vbmi2vlintrin.h: Ditto.
26870 * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_AVX512BW.
26871 * config/i386/sse.md (VI12_AVX512VLBW): Removed.
26872 (VI12_VI48F_AVX512VLBW): Rename to VI12_VI48F_AVX512VL.
26873 (compress<mode>_mask): Change iterator from VI12_AVX512VLBW to
26875 (compressstore<mode>_mask): Ditto.
26876 (expand<mode>_mask): Ditto.
26877 (expand<mode>_maskz): Ditto.
26878 (*expand<mode>_mask): Change iterator from VI12_VI48F_AVX512VLBW to
26879 VI12_VI48F_AVX512VL.
26881 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
26883 * common/config/i386/i386-common.cc
26884 (OPTION_MASK_ISA_AVX512BITALG_SET):
26885 Change OPTION_MASK_ISA_AVX512F_SET
26886 to OPTION_MASK_ISA_AVX512BW_SET.
26887 (OPTION_MASK_ISA_AVX512F_UNSET):
26888 Remove OPTION_MASK_ISA_AVX512BITALG_SET.
26889 (OPTION_MASK_ISA_AVX512BW_UNSET):
26890 Add OPTION_MASK_ISA_AVX512BITALG_SET.
26891 * config/i386/avx512bitalgintrin.h: Do not push avx512bw.
26892 * config/i386/i386-builtin.def:
26893 Remove redundant OPTION_MASK_ISA_AVX512BW.
26894 * config/i386/sse.md (VI1_AVX512VLBW): Removed.
26895 (avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>):
26896 Change the iterator from VI1_AVX512VLBW to VI1_AVX512VL.
26898 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
26900 * config/i386/i386-expand.cc
26901 (ix86_check_builtin_isa_match): Correct wrong comments.
26902 Add a new macro SHARE_BUILTIN and refactor the current if
26905 2023-04-20 Mo, Zewei <zewei.mo@intel.com>
26907 * config/i386/cpuid.h: Open a new section for Extended Features
26908 Leaf (%eax == 7, %ecx == 0) and Extended Features Sub-leaf (%eax == 7,
26911 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
26913 * config/i386/sse.md: Modify insn vperm{i,f}
26916 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
26918 * config/xtensa/xtensa-opts.h: New header.
26919 * config/xtensa/xtensa.h (STRICT_ALIGNMENT): Redefine as
26920 xtensa_strict_align.
26921 * config/xtensa/xtensa.cc (xtensa_option_override): When
26922 -m[no-]strict-align is not specified in the command line set
26923 xtensa_strict_align to 0 if the hardware supports both unaligned
26924 loads and stores or to 1 otherwise.
26925 * config/xtensa/xtensa.opt (mstrict-align): New option.
26926 * doc/invoke.texi (Xtensa Options): Document -m[no-]strict-align.
26928 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
26930 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v4): New
26933 2023-04-19 Andrew Pinski <apinski@marvell.com>
26935 * config/i386/i386.md (*movsicc_noc_zext_1): New pattern.
26937 2023-04-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26939 * config/riscv/riscv-modes.def (FLOAT_MODE): Add chunk 128 support.
26940 (VECTOR_BOOL_MODE): Ditto.
26941 (ADJUST_NUNITS): Ditto.
26942 (ADJUST_ALIGNMENT): Ditto.
26943 (ADJUST_BYTESIZE): Ditto.
26944 (ADJUST_PRECISION): Ditto.
26945 (RVV_MODES): Ditto.
26946 (VECTOR_MODE_WITH_PREFIX): Ditto.
26947 * config/riscv/riscv-v.cc (ENTRY): Ditto.
26948 (get_vlmul): Ditto.
26949 (get_ratio): Ditto.
26950 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
26951 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
26952 (vbool64_t): Ditto.
26953 (vbool32_t): Ditto.
26954 (vbool16_t): Ditto.
26959 (vint8mf8_t): Ditto.
26960 (vuint8mf8_t): Ditto.
26961 (vint8mf4_t): Ditto.
26962 (vuint8mf4_t): Ditto.
26963 (vint8mf2_t): Ditto.
26964 (vuint8mf2_t): Ditto.
26965 (vint8m1_t): Ditto.
26966 (vuint8m1_t): Ditto.
26967 (vint8m2_t): Ditto.
26968 (vuint8m2_t): Ditto.
26969 (vint8m4_t): Ditto.
26970 (vuint8m4_t): Ditto.
26971 (vint8m8_t): Ditto.
26972 (vuint8m8_t): Ditto.
26973 (vint16mf4_t): Ditto.
26974 (vuint16mf4_t): Ditto.
26975 (vint16mf2_t): Ditto.
26976 (vuint16mf2_t): Ditto.
26977 (vint16m1_t): Ditto.
26978 (vuint16m1_t): Ditto.
26979 (vint16m2_t): Ditto.
26980 (vuint16m2_t): Ditto.
26981 (vint16m4_t): Ditto.
26982 (vuint16m4_t): Ditto.
26983 (vint16m8_t): Ditto.
26984 (vuint16m8_t): Ditto.
26985 (vint32mf2_t): Ditto.
26986 (vuint32mf2_t): Ditto.
26987 (vint32m1_t): Ditto.
26988 (vuint32m1_t): Ditto.
26989 (vint32m2_t): Ditto.
26990 (vuint32m2_t): Ditto.
26991 (vint32m4_t): Ditto.
26992 (vuint32m4_t): Ditto.
26993 (vint32m8_t): Ditto.
26994 (vuint32m8_t): Ditto.
26995 (vint64m1_t): Ditto.
26996 (vuint64m1_t): Ditto.
26997 (vint64m2_t): Ditto.
26998 (vuint64m2_t): Ditto.
26999 (vint64m4_t): Ditto.
27000 (vuint64m4_t): Ditto.
27001 (vint64m8_t): Ditto.
27002 (vuint64m8_t): Ditto.
27003 (vfloat32mf2_t): Ditto.
27004 (vfloat32m1_t): Ditto.
27005 (vfloat32m2_t): Ditto.
27006 (vfloat32m4_t): Ditto.
27007 (vfloat32m8_t): Ditto.
27008 (vfloat64m1_t): Ditto.
27009 (vfloat64m2_t): Ditto.
27010 (vfloat64m4_t): Ditto.
27011 (vfloat64m8_t): Ditto.
27012 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
27013 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Ditto.
27014 (riscv_convert_vector_bits): Ditto.
27015 * config/riscv/riscv.md:
27016 * config/riscv/vector-iterators.md:
27017 * config/riscv/vector.md
27018 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
27019 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
27020 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
27021 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
27022 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
27023 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
27024 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
27025 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
27026 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
27028 2023-04-19 Pan Li <pan2.li@intel.com>
27030 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
27031 Align IOR (A | (~A) -> -1) optimization MODE_CLASS condition to AND.
27033 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
27037 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64): New insn pattern.
27038 (*cmpqi_ext<mode>_1): Use nonimmediate_operand predicate
27039 for operand 0. Use any_extract code iterator.
27040 (*cmpqi_ext<mode>_1 peephole2): New peephole2 pattern.
27041 (*cmpqi_ext<mode>_2): Use any_extract code iterator.
27042 (*cmpqi_ext<mode>_3_mem_rex64): New insn pattern.
27043 (*cmpqi_ext<mode>_1): Use general_operand predicate
27044 for operand 1. Use any_extract code iterator.
27045 (*cmpqi_ext<mode>_3 peephole2): New peephole2 pattern.
27046 (*cmpqi_ext<mode>_4): Use any_extract code iterator.
27048 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27050 * config/aarch64/aarch64-simd.md (aarch64_saddw2<mode>): Delete.
27051 (aarch64_uaddw2<mode>): Delete.
27052 (aarch64_ssubw2<mode>): Delete.
27053 (aarch64_usubw2<mode>): Delete.
27054 (aarch64_<ANY_EXTEND:su><ADDSUB:optab>w2<mode>): New define_expand.
27056 2023-04-19 Richard Biener <rguenther@suse.de>
27058 * tree-ssa-structalias.cc (do_ds_constraint): Use
27059 solve_add_graph_edge.
27061 2023-04-19 Richard Biener <rguenther@suse.de>
27063 * tree-ssa-structalias.cc (solve_add_graph_edge): New function,
27065 (do_sd_constraint): ... here.
27067 2023-04-19 Richard Biener <rguenther@suse.de>
27069 * tree-cfg.cc (gimple_can_merge_blocks_p): Remove condition
27070 rejecting the merge when A contains only a non-local label.
27072 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
27074 * rtl.h (VIRTUAL_REGISTER_P): New predicate.
27075 (VIRTUAL_REGISTER_NUM_P): Ditto.
27076 (REGNO_PTR_FRAME_P): Use VIRTUAL_REGISTER_NUM_P predicate.
27077 * expr.cc (force_operand): Use VIRTUAL_REGISTER_P predicate.
27078 * function.cc (instantiate_decl_rtl): Ditto.
27079 * rtlanal.cc (rtx_addr_can_trap_p_1): Ditto.
27080 (nonzero_address_p): Ditto.
27081 (refers_to_regno_p): Use VIRTUAL_REGISTER_NUM_P predicate.
27083 2023-04-19 Aldy Hernandez <aldyh@redhat.com>
27085 * value-range.h (Value_Range::Value_Range): Avoid pointer sharing.
27087 2023-04-19 Richard Biener <rguenther@suse.de>
27089 * system.h (auto_mpz::operator->()): New.
27090 * realmpfr.h (auto_mpfr::operator->()): New.
27091 * builtins.cc (do_mpfr_lgamma_r): Use auto_mpfr.
27092 * real.cc (real_from_string): Likewise.
27093 (dconst_e_ptr): Likewise.
27094 (dconst_sqrt2_ptr): Likewise.
27095 * tree-ssa-loop-niter.cc (refine_value_range_using_guard):
27097 (bound_difference_of_offsetted_base): Likewise.
27098 (number_of_iterations_ne): Likewise.
27099 (number_of_iterations_lt_to_ne): Likewise.
27100 * ubsan.cc: Include realmpfr.h.
27101 (ubsan_instrument_float_cast): Use auto_mpfr.
27103 2023-04-19 Richard Biener <rguenther@suse.de>
27105 * tree-ssa-structalias.cc (solve_graph): Remove self-copy
27106 edges, remove edges from escaped after special-casing them.
27108 2023-04-19 Richard Biener <rguenther@suse.de>
27110 * tree-ssa-structalias.cc (do_sd_constraint): Fixup escape
27113 2023-04-19 Richard Biener <rguenther@suse.de>
27115 * tree-ssa-structalias.cc (do_sd_constraint): Do not write
27116 to the LHS varinfo solution member.
27118 2023-04-19 Richard Biener <rguenther@suse.de>
27120 * tree-ssa-structalias.cc (topo_visit): Look at the real
27121 destination of edges.
27123 2023-04-19 Richard Biener <rguenther@suse.de>
27125 PR tree-optimization/44794
27126 * tree-ssa-loop-manip.cc (tree_transform_and_unroll_loop):
27127 If an epilogue loop is required set its iteration upper bound.
27129 2023-04-19 Xi Ruoyao <xry111@xry111.site>
27132 * config/loongarch/loongarch-protos.h
27133 (loongarch_expand_block_move): Add a parameter as alignment RTX.
27134 * config/loongarch/loongarch.h:
27135 (LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER): Remove.
27136 (LARCH_MAX_MOVE_BYTES_STRAIGHT): Remove.
27137 (LARCH_MAX_MOVE_OPS_PER_LOOP_ITER): Define.
27138 (LARCH_MAX_MOVE_OPS_STRAIGHT): Define.
27139 (MOVE_RATIO): Use LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
27140 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
27141 * config/loongarch/loongarch.cc (loongarch_expand_block_move):
27142 Take the alignment from the parameter, but set it to
27143 UNITS_PER_WORD if !TARGET_STRICT_ALIGN. Limit the length of
27144 straight-line implementation with LARCH_MAX_MOVE_OPS_STRAIGHT
27145 instead of LARCH_MAX_MOVE_BYTES_STRAIGHT.
27146 (loongarch_block_move_straight): When there are left-over bytes,
27147 half the mode size instead of falling back to byte mode at once.
27148 (loongarch_block_move_loop): Limit the length of loop body with
27149 LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
27150 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
27151 * config/loongarch/loongarch.md (cpymemsi): Pass the alignment
27152 to loongarch_expand_block_move.
27154 2023-04-19 Xi Ruoyao <xry111@xry111.site>
27156 * config/loongarch/loongarch.cc
27157 (loongarch_setup_incoming_varargs): Don't save more GARs than
27158 cfun->va_list_gpr_size / UNITS_PER_WORD.
27160 2023-04-19 Richard Biener <rguenther@suse.de>
27162 * tree-ssa-loop-manip.cc (determine_exit_conditions): Fix
27163 no epilogue condition.
27165 2023-04-19 Richard Biener <rguenther@suse.de>
27167 * gimple.h (gimple_assign_load): Outline...
27168 * gimple.cc (gimple_assign_load): ... here. Avoid
27169 get_base_address and instead just strip the outermost
27170 handled component, treating a remaining handled component
27173 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27175 * config/aarch64/aarch64-simd-builtins.def (neg): Delete builtins
27177 * config/aarch64/arm_fp16.h (vnegh_f16): Reimplement using normal negation.
27179 2023-04-19 Jakub Jelinek <jakub@redhat.com>
27181 PR tree-optimization/109011
27182 * tree-vect-patterns.cc (vect_recog_popcount_pattern): Rename to ...
27183 (vect_recog_popcount_clz_ctz_ffs_pattern): ... this. Handle also
27184 CLZ, CTZ and FFS. Remove vargs variable, use
27185 gimple_build_call_internal rather than gimple_build_call_internal_vec.
27186 (vect_vect_recog_func_ptrs): Adjust popcount entry.
27188 2023-04-19 Jakub Jelinek <jakub@redhat.com>
27191 * dse.cc (replace_read): If read_reg is a SUBREG of a word mode
27192 REG, for WORD_REGISTER_OPERATIONS copy SUBREG_REG of it into
27193 a new REG rather than the SUBREG.
27195 2023-04-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
27197 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set_zero<mode>):
27200 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27203 * config/aarch64/aarch64.cc (aarch64_rtx_costs): Merge ASHIFT and
27204 ROTATE, ROTATERT, LSHIFTRT, ASHIFTRT cases. Handle subregs in op1.
27206 2023-04-19 Richard Biener <rguenther@suse.de>
27208 PR rtl-optimization/109237
27209 * cse.cc (insn_live_p): Remove NEXT_INSN walk, instead check
27210 TREE_VISITED on INSN_VAR_LOCATION_DECL.
27211 (delete_trivially_dead_insns): Maintain TREE_VISITED on
27212 active debug bind INSN_VAR_LOCATION_DECL.
27214 2023-04-19 Richard Biener <rguenther@suse.de>
27216 PR rtl-optimization/109237
27217 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
27219 2023-04-19 Christophe Lyon <christophe.lyon@arm.com>
27221 * doc/install.texi (enable-decimal-float): Add AArch64.
27223 2023-04-19 liuhongt <hongtao.liu@intel.com>
27225 PR rtl-optimization/109351
27226 * ira.cc (setup_class_subset_and_memory_move_costs): Check
27227 hard_regno_mode_ok before setting lowest memory move cost for
27228 the mode with different reg classes.
27230 2023-04-18 Jason Merrill <jason@redhat.com>
27232 * doc/invoke.texi: Remove stray @gol.
27234 2023-04-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
27236 * ifcvt.cc (cond_move_process_if_block): Consider the result of
27237 targetm.noce_conversion_profitable_p() when replacing the original
27238 sequence with the converted one.
27240 2023-04-18 Mark Harmstone <mark@harmstone.com>
27242 * common.opt (gcodeview): Add new option.
27243 * gcc.cc (driver_handle_option); Handle OPT_gcodeview.
27244 * opts.cc (command_handle_option): Similarly.
27245 * doc/invoke.texi: Add documentation for -gcodeview.
27247 2023-04-18 Andrew Pinski <apinski@marvell.com>
27249 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove declaration.
27250 (make_pass_phiopt): Make execute out of line.
27251 (tree_ssa_cs_elim): Move code into ...
27252 (pass_cselim::execute): here.
27254 2023-04-18 Sam James <sam@gentoo.org>
27256 * system.h: Drop unused INCLUDE_PTHREAD_H.
27258 2023-04-18 Kevin Lee <kevinl@rivosinc.com>
27260 * tree-vect-data-refs.cc (vect_grouped_store_supported): Add new
27263 2023-04-18 Sinan Lin <sinan.lin@linux.alibaba.com>
27265 * config/riscv/bitmanip.md (rotr<mode>3 expander): Enable for ZBKB.
27266 (bswapdi2, bswapsi2): Similarly.
27268 2023-04-18 Uros Bizjak <ubizjak@gmail.com>
27271 * config/i386/i386-builtin.def (__builtin_ia32_insertps128):
27272 Use CODE_FOR_sse4_1_insertps_v4sf.
27273 * config/i386/i386-expand.cc (expand_vec_perm_insertps): New.
27274 (expand_vec_perm_1): Call expand_vec_per_insertps.
27275 * config/i386/i386.md ("unspec"): Declare UNSPEC_INSERTPS here.
27276 * config/i386/mmx.md (mmxscalarmode): New mode attribute.
27277 (@sse4_1_insertps_<mode>): New insn pattern.
27278 * config/i386/sse.md (@sse4_1_insertps_<mode>): Macroize insn
27279 pattern from sse4_1_insertps using VI4F_128 mode iterator.
27281 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
27283 * value-range.cc (gt_ggc_mx): New.
27285 * value-range.h (class vrange): Add GTY marker.
27286 (class frange): Same.
27287 (gt_ggc_mx): Remove.
27288 (gt_pch_nx): Remove.
27290 2023-04-18 Victor L. Do Nascimento <victor.donascimento@arm.com>
27292 * lra-constraints.cc (constraint_unique): New.
27293 (process_address_1): Apply constraint_unique test.
27294 * recog.cc (constrain_operands): Allow relaxed memory
27297 2023-04-18 Kito Cheng <kito.cheng@sifive.com>
27299 * doc/extend.texi (Target Builtins): Add RISC-V Vector
27301 (RISC-V Vector Intrinsics): Document GCC implemented which
27302 version of RISC-V vector intrinsics and its reference.
27304 2023-04-18 Richard Biener <rguenther@suse.de>
27306 PR middle-end/108786
27307 * bitmap.h (bitmap_clear_first_set_bit): New.
27308 * bitmap.cc (bitmap_first_set_bit_worker): Rename from
27309 bitmap_first_set_bit and add optional clearing of the bit.
27310 (bitmap_first_set_bit): Wrap bitmap_first_set_bit_worker.
27311 (bitmap_clear_first_set_bit): Likewise.
27312 * df-core.cc (df_worklist_dataflow_doublequeue): Use
27313 bitmap_clear_first_set_bit.
27314 * graphite-scop-detection.cc (scop_detection::merge_sese):
27316 * sanopt.cc (sanitize_asan_mark_unpoison): Likewise.
27317 (sanitize_asan_mark_poison): Likewise.
27318 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Likewise.
27319 * tree-into-ssa.cc (rewrite_blocks): Likewise.
27320 * tree-ssa-dce.cc (simple_dce_from_worklist): Likewise.
27321 * tree-ssa-sccvn.cc (do_rpo_vn_1): Likewise.
27323 2023-04-18 Richard Biener <rguenther@suse.de>
27325 * tree-ssa-structalias.cc (dump_sa_stats): Split out from...
27326 (dump_sa_points_to_info): ... this function.
27327 (compute_points_to_sets): Guard large dumps with TDF_DETAILS,
27328 and call dump_sa_stats guarded with TDF_STATS.
27329 (ipa_pta_execute): Likewise.
27330 (compute_may_aliases): Guard dump_alias_info with
27331 TDF_DETAILS|TDF_ALIAS.
27333 2023-04-18 Andrew Pinski <apinski@marvell.com>
27335 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Dump
27336 the expression that is being tried when TDF_FOLDING
27338 (phiopt_worker::match_simplify_replacement): Dump
27339 the sequence which was created by gimple_simplify_phiopt
27340 when TDF_FOLDING is true.
27342 2023-04-18 Andrew Pinski <apinski@marvell.com>
27344 * tree-ssa-phiopt.cc (match_simplify_replacement):
27345 Simplify code that does the movement slightly.
27347 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27349 * config/aarch64/aarch64.md (@aarch64_rev16<mode>): Change to
27351 (rev16<mode>2): Rename to...
27352 (aarch64_rev16<mode>2_alt1): ... This.
27353 (rev16<mode>2_alt): Rename to...
27354 (*aarch64_rev16<mode>2_alt2): ... This.
27356 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
27358 * emit-rtl.cc (init_emit_once): Initialize dconstm0.
27359 * gimple-range-op.cc (class cfn_signbit): Remove dconstm0
27361 * range-op-float.cc (zero_range): Use dconstm0.
27362 (zero_to_inf_range): Same.
27363 * real.h (dconstm0): New.
27364 * value-range.cc (frange::flush_denormals_to_zero): Use dconstm0.
27365 (frange::set_zero): Do not declare dconstm0.
27367 2023-04-18 Richard Biener <rguenther@suse.de>
27369 * system.h (class auto_mpz): New,
27370 * realmpfr.h (class auto_mpfr): Likewise.
27371 * fold-const-call.cc (do_mpfr_arg1): Use auto_mpfr.
27372 (do_mpfr_arg2): Likewise.
27373 * tree-ssa-loop-niter.cc (bound_difference): Use auto_mpz;
27375 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27377 * config/aarch64/aarch64-builtins.cc (aarch64_init_simd_intrinsics): Take
27378 builtin flags from intrinsic data rather than hardcoded FLAG_AUTO_FP.
27380 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
27382 * value-range.cc (frange::operator==): Adjust for NAN.
27383 (range_tests_nan): Remove some NAN tests.
27385 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
27387 * inchash.cc (hash::add_real_value): New.
27388 * inchash.h (class hash): Add add_real_value.
27389 * value-range.cc (add_vrange): New.
27390 * value-range.h (inchash::add_vrange): New.
27392 2023-04-18 Richard Biener <rguenther@suse.de>
27394 PR tree-optimization/109539
27395 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
27396 Re-implement pointer relatedness for PHIs.
27398 2023-04-18 Andrew Stubbs <ams@codesourcery.com>
27400 * config/gcn/gcn-valu.md (SV_SFDF): New iterator.
27401 (SV_FP): New iterator.
27402 (scalar_mode, SCALAR_MODE): Add identity mappings for scalar modes.
27403 (recip<mode>2): Unify the two patterns using SV_FP.
27404 (div_scale<mode><exec_vcc>): New insn.
27405 (div_fmas<mode><exec>): New insn.
27406 (div_fixup<mode><exec>): New insn.
27407 (div<mode>3): Unify the two expanders and rewrite using hardfp.
27408 * config/gcn/gcn.cc (gcn_md_reorg): Support "vccwait" attribute.
27409 * config/gcn/gcn.md (unspec): Add UNSPEC_DIV_SCALE, UNSPEC_DIV_FMAS,
27410 and UNSPEC_DIV_FIXUP.
27411 (vccwait): New attribute.
27413 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27415 * config/aarch64/aarch64.cc (aarch64_validate_mcpu): Add hint to use -march
27416 if the argument matches that.
27418 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27420 * config/aarch64/atomics.md
27421 (*aarch64_atomic_load<ALLX:mode>_rcpc_zext):
27422 Use SD_HSDI for destination mode iterator.
27424 2023-04-18 Jin Ma <jinma@linux.alibaba.com>
27426 * common/config/riscv/riscv-common.cc (multi_letter_subset_rank): Swap the order
27427 of z-extensions and s-extensions.
27428 (riscv_subset_list::parse): Likewise.
27430 2023-04-18 Jakub Jelinek <jakub@redhat.com>
27432 PR tree-optimization/109240
27433 * match.pd (fneg/fadd): Rewrite such that it handles both plus as
27434 first vec_perm operand and minus as second using fneg/fadd and
27435 minus as first vec_perm operand and plus as second using fneg/fsub.
27437 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
27439 * data-streamer.cc (bp_pack_real_value): New.
27440 (bp_unpack_real_value): New.
27441 * data-streamer.h (bp_pack_real_value): New.
27442 (bp_unpack_real_value): New.
27443 * tree-streamer-in.cc (unpack_ts_real_cst_value_fields): Use
27444 bp_unpack_real_value.
27445 * tree-streamer-out.cc (pack_ts_real_cst_value_fields): Use
27446 bp_pack_real_value.
27448 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
27450 * wide-int.h (WIDE_INT_MAX_HWIS): New.
27451 (class fixed_wide_int_storage): Use it.
27452 (trailing_wide_ints <N>::set_precision): Use it.
27453 (trailing_wide_ints <N>::extra_size): Use it.
27455 2023-04-18 Xi Ruoyao <xry111@xry111.site>
27457 * config/loongarch/loongarch-protos.h
27458 (loongarch_addu16i_imm12_operand_p): New function prototype.
27459 (loongarch_split_plus_constant): Likewise.
27460 * config/loongarch/loongarch.cc
27461 (loongarch_addu16i_imm12_operand_p): New function.
27462 (loongarch_split_plus_constant): Likewise.
27463 * config/loongarch/loongarch.h (ADDU16I_OPERAND): New macro.
27464 (DUAL_IMM12_OPERAND): Likewise.
27465 (DUAL_ADDU16I_OPERAND): Likewise.
27466 * config/loongarch/constraints.md (La, Lb, Lc, Ld, Le): New
27468 * config/loongarch/predicates.md (const_dual_imm12_operand): New
27470 (const_addu16i_operand): Likewise.
27471 (const_addu16i_imm12_di_operand): Likewise.
27472 (const_addu16i_imm12_si_operand): Likewise.
27473 (plus_di_operand): Likewise.
27474 (plus_si_operand): Likewise.
27475 (plus_si_extend_operand): Likewise.
27476 * config/loongarch/loongarch.md (add<mode>3): Convert to
27477 define_insn_and_split. Use plus_<mode>_operand predicate
27478 instead of arith_operand. Add alternatives for La, Lb, Lc, Ld,
27479 and Le constraints.
27480 (*addsi3_extended): Convert to define_insn_and_split. Use
27481 plus_si_extend_operand instead of arith_operand. Add
27482 alternatives for La and Le alternatives.
27484 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
27486 * value-range.h (Value_Range::Value_Range): New.
27487 (Value_Range::contains_p): New.
27489 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
27491 * value-range.h (class vrange): Make m_discriminator const.
27492 (class irange): Make m_max_ranges const. Adjust constructors
27494 (class unsupported_range): Construct vrange appropriately.
27495 (class frange): Same.
27497 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
27499 * config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Remove the macro
27502 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
27504 * doc/extend.texi: Add section for LoongArch Base Built-in functions.
27506 2023-04-18 Fei Gao <gaofei@eswincomputing.com>
27508 * config/riscv/riscv.cc (riscv_first_stack_step): Make codes more
27510 (riscv_expand_epilogue): Likewise.
27512 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
27514 * config/riscv/riscv.cc (riscv_expand_prologue): Consider save-restore in
27516 (riscv_expand_epilogue): Consider save-restore in stack deallocation.
27518 2023-04-17 Andrew Pinski <apinski@marvell.com>
27520 * tree-ssa-phiopt.cc (gate_hoist_loads): Remove
27523 2023-04-17 Aldy Hernandez <aldyh@redhat.com>
27525 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Do not export
27528 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
27530 * config/riscv/riscv.cc (riscv_first_stack_step): Add a new function
27531 parameter remaining_size.
27532 (riscv_compute_frame_info): Adapt new riscv_first_stack_step interface.
27533 (riscv_expand_prologue): Likewise.
27534 (riscv_expand_epilogue): Likewise.
27536 2023-04-17 Feng Wang <wangfeng@eswincomputing.com>
27538 * config/riscv/bitmanip.md (rotrsi3_sext): Support generating
27539 roriw for constant counts.
27540 * rtl.h (reverse_rotate_by_imm_p): Add function declartion
27541 * simplify-rtx.cc (reverse_rotate_by_imm_p): New function.
27542 (simplify_context::simplify_binary_operation_1): Use it.
27543 * expmed.cc (expand_shift_1): Likewise.
27545 2023-04-17 Martin Jambor <mjambor@suse.cz>
27549 * cgraph.h (symtab_node::find_reference): Add parameter use_type.
27550 * ipa-prop.h (ipa_pass_through_data): New flag refdesc_decremented.
27551 (ipa_zap_jf_refdesc): New function.
27552 (ipa_get_jf_pass_through_refdesc_decremented): Likewise.
27553 (ipa_set_jf_pass_through_refdesc_decremented): Likewise.
27554 * ipa-cp.cc (ipcp_discover_new_direct_edges): Provide a value for
27555 the new parameter of find_reference.
27556 (adjust_references_in_caller): Likewise. Make sure the constant jump
27557 function is not used to decrement a refdec counter again. Only
27558 decrement refdesc counters when the pass_through jump function allows
27559 it. Added a detailed dump when decrementing refdesc counters.
27560 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Dump new flag.
27561 (ipa_set_jf_simple_pass_through): Initialize the new flag.
27562 (ipa_set_jf_unary_pass_through): Likewise.
27563 (ipa_set_jf_arith_pass_through): Likewise.
27564 (remove_described_reference): Provide a value for the new parameter of
27566 (update_jump_functions_after_inlining): Zap refdesc of new jfunc if
27567 the previous pass_through had a flag mandating that we do so.
27568 (propagate_controlled_uses): Likewise. Only decrement refdesc
27569 counters when the pass_through jump function allows it.
27570 (ipa_edge_args_sum_t::duplicate): Provide a value for the new
27571 parameter of find_reference.
27572 (ipa_write_jump_function): Assert the new flag does not have to be
27574 * symtab.cc (symtab_node::find_reference): Add parameter use_type, use
27577 2023-04-17 Philipp Tomsich <philipp.tomsich@vrull.eu>
27578 Di Zhao <di.zhao@amperecomputing.com>
27580 * config/aarch64/aarch64-tuning-flags.def (AARCH64_EXTRA_TUNING_OPTION):
27581 Add AARCH64_EXTRA_TUNE_NO_LDP_COMBINE.
27582 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp):
27583 Check for the above tuning option when processing loads.
27585 2023-04-17 Richard Biener <rguenther@suse.de>
27587 PR tree-optimization/109524
27588 * tree-vrp.cc (remove_unreachable::m_list): Change to a
27589 vector of pairs of block indices.
27590 (remove_unreachable::maybe_register_block): Adjust.
27591 (remove_unreachable::remove_and_update_globals): Likewise.
27592 Deal with removed blocks.
27594 2023-04-16 Jeff Law <jlaw@ventanamicro>
27597 * config/riscv/riscv.cc (riscv_expand_conditional_move): For
27598 TARGET_SFB_ALU, force the true arm into a register.
27600 2023-04-15 John David Anglin <danglin@gcc.gnu.org>
27603 * config/pa/pa-protos.h (pa_function_arg_size): Update prototype.
27604 * config/pa/pa.cc (pa_function_arg): Return NULL_RTX if argument
27606 (pa_arg_partial_bytes): Don't call pa_function_arg_size twice.
27607 (pa_function_arg_size): Change return type to int. Return zero
27608 for arguments larger than 1 GB. Update comments.
27610 2023-04-15 Jakub Jelinek <jakub@redhat.com>
27612 PR tree-optimization/109154
27613 * tree-if-conv.cc (predicate_scalar_phi): For complex PHIs, emit just
27614 args_len - 1 COND_EXPRs rather than args_len. Formatting fix.
27616 2023-04-15 Jason Merrill <jason@redhat.com>
27619 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
27620 Overhaul lhs_ref.ref analysis.
27622 2023-04-14 Richard Biener <rguenther@suse.de>
27624 PR tree-optimization/109502
27625 * tree-vect-stmts.cc (vectorizable_assignment): Fix
27626 check for conversion between mask and non-mask types.
27628 2023-04-14 Jeff Law <jlaw@ventanamicro.com>
27629 Jakub Jelinek <jakub@redhat.com>
27633 * combine.cc (simplify_and_const_int_1): Compute nonzero_bits in
27634 word_mode rather than mode if WORD_REGISTER_OPERATIONS and mode is
27635 smaller than word_mode.
27636 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1)
27637 <case AND>: Likewise.
27639 2023-04-14 Jakub Jelinek <jakub@redhat.com>
27641 * loop-iv.cc (iv_number_of_iterations): Use gen_int_mode instead
27644 2023-04-13 Andrew MacLeod <amacleod@redhat.com>
27646 PR tree-optimization/108139
27647 PR tree-optimization/109462
27648 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Remove
27649 equivalency check for PHI nodes.
27650 * gimple-range-fold.cc (fold_using_range::range_of_phi): Ensure def
27651 does not dominate single-arg equivalency edges.
27653 2023-04-13 Richard Sandiford <richard.sandiford@arm.com>
27656 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Do
27657 not trust TYPE_ALIGN for pointer types; use POINTER_SIZE instead.
27659 2023-04-13 Richard Biener <rguenther@suse.de>
27661 PR tree-optimization/109491
27662 * tree-ssa-sccvn.cc (expressions_equal_p): Restore the
27663 NULL operands test.
27665 2023-04-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27668 * config/riscv/riscv-vector-builtins-types.def (vint8mf8_t): Fix predicate.
27669 (vint16mf4_t): Ditto.
27670 (vint32mf2_t): Ditto.
27671 (vint64m1_t): Ditto.
27672 (vint64m2_t): Ditto.
27673 (vint64m4_t): Ditto.
27674 (vint64m8_t): Ditto.
27675 (vuint8mf8_t): Ditto.
27676 (vuint16mf4_t): Ditto.
27677 (vuint32mf2_t): Ditto.
27678 (vuint64m1_t): Ditto.
27679 (vuint64m2_t): Ditto.
27680 (vuint64m4_t): Ditto.
27681 (vuint64m8_t): Ditto.
27682 (vfloat32mf2_t): Ditto.
27683 (vbool64_t): Ditto.
27684 * config/riscv/riscv-vector-builtins.cc (register_builtin_type): Add comments.
27685 (register_vector_type): Ditto.
27686 (check_required_extensions): Fix condition.
27687 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ZVE64): Remove it.
27688 (RVV_REQUIRE_ELEN_64): New define.
27689 (RVV_REQUIRE_MIN_VLEN_64): Ditto.
27690 * config/riscv/riscv-vector-switch.def (TARGET_VECTOR_FP32): Remove it.
27691 (TARGET_VECTOR_FP64): Ditto.
27692 (ENTRY): Fix predicate.
27693 * config/riscv/vector-iterators.md: Fix predicate.
27695 2023-04-12 Jakub Jelinek <jakub@redhat.com>
27697 PR tree-optimization/109410
27698 * tree-ssa-reassoc.cc (build_and_add_sum): Split edge from entry
27699 block if first statement of the function is a call to returns_twice
27702 2023-04-12 Jakub Jelinek <jakub@redhat.com>
27705 * config/i386/i386.cc: Include rtl-error.h.
27706 (ix86_print_operand): For z modifier warning, use warning_for_asm
27707 if this_is_asm_operands. For Z modifier errors, use %c and code
27708 instead of hardcoded Z.
27710 2023-04-12 Costas Argyris <costas.argyris@gmail.com>
27712 * config/i386/x-mingw32-utf8: Remove extrataneous $@
27714 2023-04-12 Andrew MacLeod <amacleod@redhat.com>
27716 PR tree-optimization/109462
27717 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Don't
27718 check for equivalences if NAME is a phi node.
27720 2023-04-12 Richard Biener <rguenther@suse.de>
27722 PR tree-optimization/109473
27723 * tree-vect-loop.cc (vect_create_epilog_for_reduction):
27724 Convert scalar result to the computation type before performing
27725 the reduction adjustment.
27727 2023-04-12 Richard Biener <rguenther@suse.de>
27729 PR tree-optimization/109469
27730 * tree-vect-slp.cc (vect_slp_function): Skip region starts with
27731 a returns-twice call.
27733 2023-04-12 Richard Biener <rguenther@suse.de>
27735 PR tree-optimization/109434
27736 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Properly
27737 handle possibly throwing calls when processing the LHS
27738 and may-defs are not OK.
27740 2023-04-11 Lin Sinan <mynameisxiaou@gmail.com>
27742 * config/riscv/predicates.md (uimm_extra_bit_or_twobits): Adjust
27743 predicate to avoid splitting arith constants.
27745 2023-04-11 Yanzhang Wang <yanzhang.wang@intel.com>
27746 Pan Li <pan2.li@intel.com>
27747 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27748 Kito Cheng <kito.cheng@sifive.com>
27751 * config/riscv/riscv-protos.h (emit_hard_vlmax_vsetvl): New.
27752 * config/riscv/riscv-v.cc (emit_hard_vlmax_vsetvl): New.
27753 (emit_vlmax_vsetvl): Use emit_hard_vlmax_vsetvl.
27754 * config/riscv/riscv.cc (vector_zero_call_used_regs): New.
27755 (riscv_zero_call_used_regs): New.
27756 (TARGET_ZERO_CALL_USED_REGS): New.
27758 2023-04-11 Martin Liska <mliska@suse.cz>
27761 * opts.cc (finish_options): Drop also
27762 x_flag_var_tracking_assignments.
27764 2023-04-11 Andre Vieira <andre.simoesdiasvieira@arm.com>
27766 PR tree-optimization/108888
27767 * tree-if-conv.cc (predicate_statements): Fix gimple call check.
27769 2023-04-11 Haochen Gui <guihaoc@gcc.gnu.org>
27772 * config/rs6000/vsx.md (vsx_sign_extend_qi_<mode>): Rename to...
27773 (vsx_sign_extend_v16qi_<mode>): ... this.
27774 (vsx_sign_extend_hi_<mode>): Rename to...
27775 (vsx_sign_extend_v8hi_<mode>): ... this.
27776 (vsx_sign_extend_si_v2di): Rename to...
27777 (vsx_sign_extend_v4si_v2di): ... this.
27778 (vsignextend_qi_<mode>): Remove.
27779 (vsignextend_hi_<mode>): Remove.
27780 (vsignextend_si_v2di): Remove.
27781 (vsignextend_v2di_v1ti): Remove.
27782 (*xxspltib_<mode>_split): Replace gen_vsx_sign_extend_qi_v2di with
27783 gen_vsx_sign_extend_v16qi_v2di and gen_vsx_sign_extend_qi_v4si
27784 with gen_vsx_sign_extend_v16qi_v4si.
27785 * config/rs6000/rs6000.md (split for DI constant generation):
27786 Replace gen_vsx_sign_extend_qi_si with gen_vsx_sign_extend_v16qi_si.
27787 (split for HSDI constant generation): Replace gen_vsx_sign_extend_qi_di
27788 with gen_vsx_sign_extend_v16qi_di and gen_vsx_sign_extend_qi_si
27789 with gen_vsx_sign_extend_v16qi_si.
27790 * config/rs6000/rs6000-builtins.def (__builtin_altivec_vsignextsb2d):
27791 Set bif-pattern to vsx_sign_extend_v16qi_v2di.
27792 (__builtin_altivec_vsignextsb2w): Set bif-pattern to
27793 vsx_sign_extend_v16qi_v4si.
27794 (__builtin_altivec_visgnextsh2d): Set bif-pattern to
27795 vsx_sign_extend_v8hi_v2di.
27796 (__builtin_altivec_vsignextsh2w): Set bif-pattern to
27797 vsx_sign_extend_v8hi_v4si.
27798 (__builtin_altivec_vsignextsw2d): Set bif-pattern to
27799 vsx_sign_extend_si_v2di.
27800 (__builtin_altivec_vsignext): Set bif-pattern to
27801 vsx_sign_extend_v2di_v1ti.
27802 * config/rs6000/rs6000-builtin.cc (lxvrse_expand_builtin): Replace
27803 gen_vsx_sign_extend_qi_v2di with gen_vsx_sign_extend_v16qi_v2di,
27804 gen_vsx_sign_extend_hi_v2di with gen_vsx_sign_extend_v8hi_v2di and
27805 gen_vsx_sign_extend_si_v2di with gen_vsx_sign_extend_v4si_v2di.
27807 2023-04-10 Michael Meissner <meissner@linux.ibm.com>
27810 * config/rs6000/vsx.md (vsx_fmav4sf4): Do not generate vmaddfp.
27811 (vsx_nfmsv4sf4): Do not generate vnmsubfp.
27813 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
27815 * config/i386/i386.h (PTA_GRANITERAPIDS): Add PTA_AMX_COMPLEX.
27817 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
27819 * common/config/i386/cpuinfo.h (get_available_features):
27820 Detect AMX-COMPLEX.
27821 * common/config/i386/i386-common.cc
27822 (OPTION_MASK_ISA2_AMX_COMPLEX_SET,
27823 OPTION_MASK_ISA2_AMX_COMPLEX_UNSET): New.
27824 (ix86_handle_option): Handle -mamx-complex.
27825 * common/config/i386/i386-cpuinfo.h (enum processor_features):
27826 Add FEATURE_AMX_COMPLEX.
27827 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
27829 * config.gcc: Add amxcomplexintrin.h.
27830 * config/i386/cpuid.h (bit_AMX_COMPLEX): New.
27831 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
27833 * config/i386/i386-isa.def (AMX_COMPLEX): Add DEF_PTA(AMX_COMPLEX).
27834 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
27835 Handle amx-complex.
27836 * config/i386/i386.opt: Add option -mamx-complex.
27837 * config/i386/immintrin.h: Include amxcomplexintrin.h.
27838 * doc/extend.texi: Document amx-complex.
27839 * doc/invoke.texi: Document -mamx-complex.
27840 * doc/sourcebuild.texi: Document target amx-complex.
27841 * config/i386/amxcomplexintrin.h: New file.
27843 2023-04-08 Jakub Jelinek <jakub@redhat.com>
27845 PR tree-optimization/109392
27846 * tree-vect-generic.cc (tree_vec_extract): Handle failure
27847 of maybe_push_res_to_seq better.
27849 2023-04-08 Jakub Jelinek <jakub@redhat.com>
27851 * Makefile.in (CORETYPES_H): Depend on align.h, poly-int.h and
27853 (SYSTEM_H): Depend on $(HASHTAB_H).
27854 * config/riscv/t-riscv (build/genrvv-type-indexer.o): Remove unused
27855 dependency on $(RTL_BASE_H), remove redundant dependency on
27858 2023-04-06 Richard Earnshaw <rearnsha@arm.com>
27861 * config/arm/arm.cc (arm_effective_regno): New function.
27862 (mve_vector_mem_operand): Use it.
27864 2023-04-06 Andrew MacLeod <amacleod@redhat.com>
27866 PR tree-optimization/109417
27867 * gimple-range-gori.cc (gori_compute::may_recompute_p): Check if
27868 dependency is in SSA_NAME_FREE_LIST.
27870 2023-04-06 Andrew Pinski <apinski@marvell.com>
27872 PR tree-optimization/109427
27873 * params.opt (-param=vect-induction-float=):
27874 Fix option attribute typo for IntegerRange.
27876 2023-04-05 Jeff Law <jlaw@ventanamicro>
27879 * combine.cc (combine_instructions): Force re-recognition when
27880 after restoring the body of an insn to its original form.
27882 2023-04-05 Martin Jambor <mjambor@suse.cz>
27885 * ipa-sra.cc (zap_useless_ipcp_results): New function.
27886 (process_isra_node_results): Call it.
27888 2023-04-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27890 * config/riscv/vector.md: Fix incorrect operand order.
27892 2023-04-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27894 * config/riscv/riscv-vsetvl.cc
27895 (pass_vsetvl::compute_local_backward_infos): Update user vsetvl in local
27898 2023-04-05 Li Xu <xuli1@eswincomputing.com>
27900 * config/riscv/riscv-vector-builtins.def: Fix typo.
27901 * config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Ditto.
27902 * config/riscv/vector-iterators.md: Ditto.
27904 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
27906 * doc/md.texi (Including Patterns): Fix page break.
27908 2023-04-04 Jakub Jelinek <jakub@redhat.com>
27910 PR tree-optimization/109386
27911 * range-op-float.cc (foperator_lt::op1_range, foperator_lt::op2_range,
27912 foperator_le::op1_range, foperator_le::op2_range,
27913 foperator_gt::op1_range, foperator_gt::op2_range,
27914 foperator_ge::op1_range, foperator_ge::op2_range): Make r varying for
27915 BRS_FALSE case even if the other op is maybe_isnan, not just
27917 (foperator_unordered_lt::op1_range, foperator_unordered_lt::op2_range,
27918 foperator_unordered_le::op1_range, foperator_unordered_le::op2_range,
27919 foperator_unordered_gt::op1_range, foperator_unordered_gt::op2_range,
27920 foperator_unordered_ge::op1_range, foperator_unordered_ge::op2_range):
27921 Make r varying for BRS_TRUE case even if the other op is maybe_isnan,
27922 not just known_isnan.
27924 2023-04-04 Marek Polacek <polacek@redhat.com>
27926 PR sanitizer/109107
27927 * fold-const.cc (fold_binary_loc): Use TYPE_OVERFLOW_SANITIZED
27929 * match.pd: Use TYPE_OVERFLOW_SANITIZED.
27931 2023-04-04 Stam Markianos-Wright <stam.markianos-wright@arm.com>
27933 * config/arm/mve.md (mve_vcvtq_n_to_f_<supf><mode>): Swap operands.
27934 (mve_vcreateq_f<mode>): Swap operands.
27936 2023-04-04 Andrew Stubbs <ams@codesourcery.com>
27938 * config/gcn/gcn-valu.md (one_cmpl<mode>2<exec>): New.
27940 2023-04-04 Jakub Jelinek <jakub@redhat.com>
27943 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
27944 Reword diagnostics about zfinx conflict with f, formatting fixes.
27946 2023-04-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
27948 * config/sol2.h (LIB_SPEC): Don't link with -lpthread.
27950 2023-04-04 Richard Biener <rguenther@suse.de>
27952 PR tree-optimization/109304
27953 * tree-profile.cc (tree_profiling): Use symtab node
27954 availability to decide whether to skip adjusting calls.
27955 Do not adjust calls to internal functions.
27957 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
27960 * config/rs6000/rs6000.cc (rs6000_expand_vector_set_var_p9): Fix gen
27961 function for permutation control vector by considering big endianness.
27963 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
27966 * config/rs6000/altivec.md (*p9v_parity<mode>2): Rename to ...
27967 (rs6000_vprtyb<mode>2): ... this.
27968 * config/rs6000/rs6000-builtins.def (VPRTYBD): Replace parityv2di2 with
27969 rs6000_vprtybv2di2.
27970 (VPRTYBW): Replace parityv4si2 with rs6000_vprtybv4si2.
27971 (VPRTYBQ): Replace parityv1ti2 with rs6000_vprtybv1ti2.
27972 * config/rs6000/vector.md (parity<mode>2 with VEC_IP): Expand with
27973 popcountv16qi2 and the corresponding rs6000_vprtyb<mode>2.
27975 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
27976 Sandra Loosemore <sandra@codesourcery.com>
27978 * doc/md.texi (Insn Splitting): Tweak wording for readability.
27980 2023-04-03 Martin Jambor <mjambor@suse.cz>
27983 * ipa-prop.cc (determine_known_aggregate_parts): Check that the
27984 offset + size will be representable in unsigned int.
27986 2023-04-03 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
27988 * configure.ac (ZSTD_LIB): Move before zstd.h check.
27989 Unset gcc_cv_header_zstd_h without libzstd.
27990 * configure: Regenerate.
27992 2023-04-03 Martin Liska <mliska@suse.cz>
27994 * doc/invoke.texi: Document new param.
27996 2023-04-03 Cupertino Miranda <cupertino.miranda@oracle.com>
27998 * doc/sourcebuild.texi (const_volatile_readonly_section): Document
27999 new check_effective_target function.
28001 2023-04-03 Li Xu <xuli1@eswincomputing.com>
28003 * config/riscv/riscv-vector-builtins.def (vuint32m8_t): Fix typo.
28004 (vfloat32m8_t): Likewise
28006 2023-04-03 liuhongt <hongtao.liu@intel.com>
28008 * doc/md.texi: Document signbitm2.
28010 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28011 kito-cheng <kito.cheng@sifive.com>
28013 * config/riscv/vector.md: Fix RA constraint.
28015 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28017 * config/riscv/riscv-protos.h (gen_avl_for_scalar_move): New function.
28018 * config/riscv/riscv-v.cc (gen_avl_for_scalar_move): New function.
28019 * config/riscv/vector.md: Fix scalar move bug.
28021 2023-04-01 Jakub Jelinek <jakub@redhat.com>
28023 * range-op-float.cc (foperator_equal::fold_range): If at least
28024 one of the op ranges is not singleton and neither is NaN and all
28025 4 bounds are zero, return [1, 1].
28026 (foperator_not_equal::fold_range): In the same case return [0, 0].
28028 2023-04-01 Jakub Jelinek <jakub@redhat.com>
28030 * range-op-float.cc (foperator_equal::fold_range): Perform the
28031 non-singleton handling regardless of maybe_isnan (op1, op2).
28032 (foperator_not_equal::fold_range): Likewise.
28033 (foperator_lt::fold_range, foperator_le::fold_range,
28034 foperator_gt::fold_range, foperator_ge::fold_range): Perform the
28035 real_* comparison check which results in range_false (type)
28036 even if maybe_isnan (op1, op2). Simplify.
28037 (foperator_ltgt): New class.
28038 (fop_ltgt): New variable.
28039 (floating_op_table::floating_op_table): Handle LTGT_EXPR using
28042 2023-04-01 Jakub Jelinek <jakub@redhat.com>
28045 * builtins.cc (apply_args_size): If targetm.calls.get_raw_arg_mode
28046 returns VOIDmode, handle it like if the register isn't used for
28047 passing arguments at all.
28048 (apply_result_size): If targetm.calls.get_raw_result_mode returns
28049 VOIDmode, handle it like if the register isn't used for returning
28051 * target.def (get_raw_result_mode, get_raw_arg_mode): Document what it
28052 means to return VOIDmode.
28053 * doc/tm.texi: Regenerated.
28054 * config/aarch64/aarch64.cc (aarch64_function_value_regno_p): Return
28055 TARGET_SVE for P0_REGNUM.
28056 (aarch64_function_arg_regno_p): Also return true for p0-p3.
28057 (aarch64_get_reg_raw_mode): Return VOIDmode for PR_REGNUM_P regs.
28059 2023-03-31 Vladimir N. Makarov <vmakarov@redhat.com>
28061 * lra-constraints.cc: (combine_reload_insn): New function.
28063 2023-03-31 Jakub Jelinek <jakub@redhat.com>
28065 PR tree-optimization/91645
28066 * range-op-float.cc (foperator_unordered_lt::fold_range,
28067 foperator_unordered_le::fold_range,
28068 foperator_unordered_gt::fold_range,
28069 foperator_unordered_ge::fold_range,
28070 foperator_unordered_equal::fold_range): Call the ordered
28071 fold_range on ranges with cleared NaNs.
28072 * value-query.cc (range_query::get_tree_range): Handle also
28073 COMPARISON_CLASS_P trees.
28075 2023-03-31 Kito Cheng <kito.cheng@sifive.com>
28076 Andrew Pinski <pinskia@gmail.com>
28079 * config/riscv/t-riscv: Add missing dependencies.
28081 2023-03-31 liuhongt <hongtao.liu@intel.com>
28083 * config/i386/i386.cc (inline_memory_move_cost): Return 100
28084 for MASK_REGS when MODE_SIZE > 8.
28086 2023-03-31 liuhongt <hongtao.liu@intel.com>
28089 * config/i386/i386-builtin.def (BDESC): Adjust icode name from
28090 ufloat/ufix to floatuns/fixuns.
28091 * config/i386/i386-expand.cc
28092 (ix86_expand_vector_convert_uns_vsivsf): Adjust comments.
28093 * config/i386/sse.md
28094 (ufloat<sseintvecmodelower><mode>2<mask_name><round_name>):
28096 (<mask_codefor>floatuns<sseintvecmodelower><mode>2<mask_name><round_name>):.. this.
28097 (<mask_codefor><avx512>_ufix_notrunc<sf2simodelower><mode><mask_name><round_name>):
28099 (<mask_codefor><avx512>_fixuns_notrunc<sf2simodelower><mode><mask_name><round_name>):
28101 (<fixsuffix>fix_truncv16sfv16si2<mask_name><round_saeonly_name>):
28103 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):.. this.
28104 (ufloat<si2dfmodelower><mode>2<mask_name>): Renamed to ..
28105 (floatuns<si2dfmodelower><mode>2<mask_name>): .. this.
28106 (ufloatv2siv2df2<mask_name>): Renamed to ..
28107 (<mask_codefor>floatunsv2siv2df2<mask_name>): .. this.
28108 (ufix_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
28110 (fixuns_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
28112 (ufix_notruncv2dfv2si2): Renamed to ..
28113 (fixuns_notruncv2dfv2si2):.. this.
28114 (ufix_notruncv2dfv2si2_mask): Renamed to ..
28115 (fixuns_notruncv2dfv2si2_mask): .. this.
28116 (*ufix_notruncv2dfv2si2_mask_1): Renamed to ..
28117 (*fixuns_notruncv2dfv2si2_mask_1): .. this.
28118 (ufix_truncv2dfv2si2): Renamed to ..
28119 (*fixuns_truncv2dfv2si2): .. this.
28120 (ufix_truncv2dfv2si2_mask): Renamed to ..
28121 (fixuns_truncv2dfv2si2_mask): .. this.
28122 (*ufix_truncv2dfv2si2_mask_1): Renamed to ..
28123 (*fixuns_truncv2dfv2si2_mask_1): .. this.
28124 (ufix_truncv4dfv4si2<mask_name>): Renamed to ..
28125 (fixuns_truncv4dfv4si2<mask_name>): .. this.
28126 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
28128 (fixuns_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
28130 (ufix_trunc<mode><sseintvecmodelower>2<mask_name>): Renamed to ..
28131 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
28134 2023-03-30 Andrew MacLeod <amacleod@redhat.com>
28136 PR tree-optimization/109154
28137 * gimple-range-gori.cc (gori_compute::may_recompute_p): Add depth limit.
28138 * gimple-range-gori.h (may_recompute_p): Add depth param.
28139 * params.opt (ranger-recompute-depth): New param.
28141 2023-03-30 Jason Merrill <jason@redhat.com>
28145 * cgraph.h: Move reset() from cgraph_node to symtab_node.
28146 * cgraphunit.cc (symtab_node::reset): Adjust. Also call
28147 remove_from_same_comdat_group.
28149 2023-03-30 Richard Biener <rguenther@suse.de>
28151 PR tree-optimization/107561
28152 * gimple-ssa-warn-access.cc (get_size_range): Add flags
28153 argument and pass it on.
28154 (check_access): When querying for the size range pass
28155 SR_ALLOW_ZERO when the known destination size is zero.
28157 2023-03-30 Richard Biener <rguenther@suse.de>
28159 PR tree-optimization/109342
28160 * tree-ssa-sccvn.cc (vn_nary_op_get_predicated_value): New
28161 overload for edge. When that edge is a backedge use
28162 dominated_by_p directly.
28164 2023-03-30 liuhongt <hongtao.liu@intel.com>
28166 * config/i386/i386-expand.cc (expand_vec_perm_blend): Generate
28167 vpblendd instead of vpblendw for V4SI under avx2.
28169 2023-03-29 Hans-Peter Nilsson <hp@axis.com>
28171 * config/cris/cris.cc (cris_rtx_costs) [CONST_INT]: Return 0
28172 for many quick operands, for register-sized modes.
28174 2023-03-29 Jiawei <jiawei@iscas.ac.cn>
28176 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
28179 2023-03-29 Martin Liska <mliska@suse.cz>
28181 PR bootstrap/109310
28182 * configure.ac: Emit a warning for deprecated option
28183 --enable-link-mutex.
28184 * configure: Regenerate.
28186 2023-03-29 Richard Biener <rguenther@suse.de>
28188 PR tree-optimization/109331
28189 * tree-ssa-forwprop.cc (pass_forwprop::execute): When we
28190 discover a taken edge make sure to cleanup the CFG.
28192 2023-03-29 Richard Biener <rguenther@suse.de>
28194 PR tree-optimization/109327
28195 * tree-ssa-forwprop.cc (pass_forwprop::execute): Deal with
28196 already removed stmts when draining to_remove.
28198 2023-03-29 Richard Biener <rguenther@suse.de>
28201 * dwarf2out.cc (lookup_type_die): Reset TREE_ASM_WRITTEN
28202 so we can re-create the DIE for the type if required.
28204 2023-03-29 Jakub Jelinek <jakub@redhat.com>
28205 Richard Biener <rguenther@suse.de>
28207 PR tree-optimization/109301
28208 * tree-ssa-math-opts.cc (pass_data_cse_sincos): Change
28209 properties_provided from PROP_gimple_opt_math to 0.
28210 (pass_data_expand_powcabs): Change properties_provided from 0 to
28211 PROP_gimple_opt_math.
28213 2023-03-29 Richard Biener <rguenther@suse.de>
28215 PR tree-optimization/109154
28216 * tree-if-conv.cc (gen_phi_arg_condition): Handle single
28217 inverted condition specially by inverting at the caller.
28218 (gen_phi_arg_condition): Swap COND_EXPR arms if requested.
28220 2023-03-28 David Malcolm <dmalcolm@redhat.com>
28223 * diagnostic-show-locus.cc (column_range::column_range): Factor
28224 out assertion conditional into...
28225 (column_range::valid_p): ...this new function.
28226 (line_corrections::add_hint): Don't attempt to consolidate hints
28227 if it would lead to invalid column_range instances.
28229 2023-03-28 Kito Cheng <kito.cheng@sifive.com>
28232 * config/riscv/riscv-c.cc (riscv_ext_version_value): New.
28233 (riscv_cpu_cpp_builtins): Define __riscv_v_intrinsic and
28236 2023-03-28 Alexander Monakov <amonakov@ispras.ru>
28238 PR rtl-optimization/109187
28239 * haifa-sched.cc (autopref_rank_for_schedule): Avoid use of overflowing
28240 subtraction in three-way comparison.
28242 2023-03-28 Andrew MacLeod <amacleod@redhat.com>
28244 PR tree-optimization/109265
28245 PR tree-optimization/109274
28246 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
28247 not create a relation record is op1 and op2 are the same symbol.
28248 (gori_compute::compute_operand1_range): Pass op1 == op2 to the
28249 handler for this stmt, but create a new record only if this statement
28250 generates a relation based on the ranges.
28251 (gori_compute::compute_operand2_range): Ditto.
28252 * value-relation.h (value_relation::set_relation): Always create the
28253 record that is requested.
28255 2023-03-28 Richard Biener <rguenther@suse.de>
28257 PR tree-optimization/107087
28258 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
28259 executable regions to avoid useless work and to better
28260 propagate degenerate PHIs.
28262 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
28264 * config/i386/x-mingw32-utf8: update comments.
28266 2023-03-28 Richard Sandiford <richard.sandiford@arm.com>
28269 * config/aarch64/aarch64-protos.h (aarch64_vector_load_decl): Declare.
28270 * config/aarch64/aarch64.h (machine_function::vector_load_decls): New
28272 * config/aarch64/aarch64-builtins.cc (aarch64_record_vector_load_arg):
28274 (aarch64_general_gimple_fold_builtin): Delay folding of vld1 until
28275 after inlining. Record which decls are loaded from. Fix handling
28276 of vops for loads and stores.
28277 * config/aarch64/aarch64.cc (aarch64_vector_load_decl): New function.
28278 (aarch64_accesses_vector_load_decl_p): Likewise.
28279 (aarch64_vector_costs::m_stores_to_vector_load_decl): New member
28281 (aarch64_vector_costs::add_stmt_cost): If the function has a vld1
28282 that loads from a decl, treat vector stores to those decls as
28284 (aarch64_vector_costs::finish_cost): ...and in that case,
28285 if the vector code does nothing more than a store, give the
28286 prologue a zero cost as well.
28288 2023-03-28 Richard Biener <rguenther@suse.de>
28291 PR tree-optimization/108129
28292 * genmatch.cc (lower_for): For (match ...) delay
28293 substituting into the match operator if possible.
28294 (dt_operand::gen_gimple_expr): For user_id look at the
28295 first substitute for determining how to access operands.
28296 (dt_operand::gen_generic_expr): Likewise.
28297 (dt_node::gen_kids): Properly sort user_ids according
28298 to their substitutes.
28299 (dt_node::gen_kids_1): Code-generate user_id matching.
28301 2023-03-28 Jakub Jelinek <jakub@redhat.com>
28302 Jonathan Wakely <jwakely@redhat.com>
28304 * gcov-tool.cc (do_merge, do_merge_stream, do_rewrite, do_overlap):
28305 Use subcommand rather than sub-command in function comments.
28307 2023-03-28 Jakub Jelinek <jakub@redhat.com>
28309 PR tree-optimization/109154
28310 * value-range.h (frange::flush_denormals_to_zero): Make it public
28311 rather than private.
28312 * value-range.cc (frange::set): Don't call flush_denormals_to_zero
28314 * range-op-float.cc (range_operator_float::fold_range): Call
28315 flush_denormals_to_zero.
28317 2023-03-28 Jakub Jelinek <jakub@redhat.com>
28319 PR middle-end/106190
28320 * sanopt.cc (pass_sanopt::execute): Return TODO_cleanup_cfg if any
28321 of the IFN_{UB,HWA,A}SAN_* internal fns are lowered.
28323 2023-03-28 Jakub Jelinek <jakub@redhat.com>
28325 * range-op-float.cc (float_widen_lhs_range): Use pass get_nan_state
28326 as 4th argument to set to avoid clear_nan and union_ calls.
28328 2023-03-28 Jakub Jelinek <jakub@redhat.com>
28331 * config/i386/i386.cc (assign_386_stack_local): For DImode
28332 with SLOT_FLOATxFDI_387 and -m32 -mpreferred-stack-boundary=2 pass
28333 align 32 rather than 0 to assign_stack_local.
28335 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
28338 * config/sparc/sparc.cc (sparc_expand_vcond): Call signed_condition
28339 on operand #3 to get the final condition code. Use std::swap.
28340 * config/sparc/sparc.md (vcondv8qiv8qi): New VIS 4 expander.
28341 (fucmp<gcond:code>8<P:mode>_vis): Move around.
28342 (fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis): Likewise.
28343 (vcondu<GCM:mode><GCM:mode>): New VIS 4 expander.
28345 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
28347 * doc/gm2.texi: Add missing Next, Previous and Top fields to most
28348 top-level sections.
28350 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
28352 * config.host: Pull in i386/x-mingw32-utf8 Makefile
28353 fragment and reference utf8rc-mingw32.o explicitly
28355 * config/i386/sym-mingw32.cc: prevent name mangling of
28357 * config/i386/x-mingw32-utf8: Make utf8rc-mingw32.o
28358 depend on manifest file explicitly.
28360 2023-03-28 Richard Biener <rguenther@suse.de>
28363 2023-03-27 Richard Biener <rguenther@suse.de>
28365 PR rtl-optimization/109237
28366 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
28368 2023-03-28 Richard Biener <rguenther@suse.de>
28370 * common.opt (gdwarf): Remove Negative(gdwarf-).
28372 2023-03-28 Richard Biener <rguenther@suse.de>
28374 * common.opt (gdwarf): Add RejectNegative.
28375 (gdwarf-): Likewise.
28379 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
28381 * config/cris/constraints.md ("T"): Correct to
28382 define_memory_constraint.
28384 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
28386 * config/cris/cris.md (BW2): New mode-iterator.
28387 (lra_szext_decomposed, lra_szext_decomposed_indirect_with_offset): New
28390 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
28392 * config/cris/cris.md ("*add<mode>3_addi"): Improve to bail only
28393 for possible eliminable compares.
28395 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
28397 * config/cris/constraints.md ("R"): Remove unused constraint.
28399 2023-03-27 Jonathan Wakely <jwakely@redhat.com>
28401 PR gcov-profile/109297
28402 * gcov-tool.cc (merge_usage): Fix "subcomand" typo.
28403 (merge_stream_usage): Likewise.
28404 (overlap_usage): Likewise.
28406 2023-03-27 Christoph Müllner <christoph.muellner@vrull.eu>
28409 * config/riscv/thead.md: Add missing mode specifiers.
28411 2023-03-27 Philipp Tomsich <philipp.tomsich@vrull.eu>
28412 Jiangning Liu <jiangning.liu@amperecomputing.com>
28413 Manolis Tsamis <manolis.tsamis@vrull.eu>
28415 * config/aarch64/aarch64.cc: Update vector costs for ampere1.
28417 2023-03-27 Richard Biener <rguenther@suse.de>
28419 PR rtl-optimization/109237
28420 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
28422 2023-03-27 Richard Biener <rguenther@suse.de>
28425 * lto-wrapper.cc (run_gcc): Parse alternate debug options
28426 as well, they always enable debug.
28428 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
28431 * config/rs6000/emmintrin.h (_mm_bslli_si128): Move the implementation
28433 (_mm_slli_si128): ... here. Change to call _mm_bslli_si128 directly.
28435 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
28438 * config/rs6000/emmintrin.h (_mm_bslli_si128): Check __N is not less
28439 than zero when calling vec_sld.
28440 (_mm_bsrli_si128): Return __A if __N is zero, check __N is bigger than
28441 zero when calling vec_sld.
28442 (_mm_slli_si128): Return __A if _imm5 is zero, check _imm5 is bigger
28443 than zero when calling vec_sld.
28445 2023-03-27 Sandra Loosemore <sandra@codesourcery.com>
28447 * doc/generic.texi (OpenMP): Document OMP_SIMD, OMP_DISTRIBUTE,
28448 OMP_TASKLOOP, and OMP_LOOP with OMP_FOR. Document how collapsed
28449 loops are represented and which fields are vectors. Add
28450 documentation for OMP_FOR_PRE_BODY field. Document internal
28451 form of non-rectangular loops and OMP_FOR_NON_RECTANGULAR.
28452 * tree.def (OMP_FOR): Make documentation consistent with the
28453 Texinfo manual, to fill some gaps and correct errors.
28455 2023-03-26 Andreas Schwab <schwab@linux-m68k.org>
28458 * config/m68k/m68k.h (FINAL_PRESCAN_INSN): Define.
28459 * config/m68k/m68k.cc (m68k_final_prescan_insn): Define.
28460 (handle_move_double): Call it before handle_movsi.
28461 * config/m68k/m68k-protos.h: Declare it.
28463 2023-03-26 Jakub Jelinek <jakub@redhat.com>
28465 PR tree-optimization/109230
28466 * match.pd (fneg/fadd simplify): Verify also odd permutation indexes.
28468 2023-03-26 Jakub Jelinek <jakub@redhat.com>
28471 * predict.cc (compute_function_frequency): Don't call
28472 warn_function_cold if function already has cold attribute.
28474 2023-03-26 Gerald Pfeifer <gerald@pfeifer.com>
28476 * doc/install.texi: Remove anachronistic note
28477 related to languages built and separate source tarballs.
28479 2023-03-25 David Malcolm <dmalcolm@redhat.com>
28482 * diagnostic-format-sarif.cc (read_until_eof): Delete.
28483 (maybe_read_file): Delete.
28484 (sarif_builder::maybe_make_artifact_content_object): Use
28485 get_source_file_content rather than maybe_read_file.
28486 Reject it if it's not valid UTF-8.
28487 * input.cc (file_cache_slot::get_full_file_content): New.
28488 (get_source_file_content): New.
28489 (selftest::check_cpp_valid_utf8_p): New.
28490 (selftest::test_cpp_valid_utf8_p): New.
28491 (selftest::input_cc_tests): Call selftest::test_cpp_valid_utf8_p.
28492 * input.h (get_source_file_content): New prototype.
28494 2023-03-24 David Malcolm <dmalcolm@redhat.com>
28496 * doc/analyzer.texi (Debugging the Analyzer): Add notes on useful
28498 (Special Functions for Debugging the Analyzer): Convert to a
28499 table, and rewrite in places.
28500 (Other Debugging Techniques): Add notes on how to compare two
28501 different exploded graphs.
28503 2023-03-24 David Malcolm <dmalcolm@redhat.com>
28506 * json.cc: Update comments to indicate that we now preserve
28507 insertion order of keys within objects.
28508 (object::print): Traverse keys in insertion order.
28509 (object::set): Preserve insertion order of keys.
28510 (selftest::test_writing_objects): Add an additional key to verify
28511 that we preserve insertion order.
28512 * json.h (object::m_keys): New field.
28514 2023-03-24 Andrew MacLeod <amacleod@redhat.com>
28516 PR tree-optimization/109238
28517 * gimple-range-cache.cc (ranger_cache::resolve_dom): Ignore
28518 predecessors which this block dominates.
28520 2023-03-24 Richard Biener <rguenther@suse.de>
28522 PR tree-optimization/106912
28523 * tree-profile.cc (tree_profiling): Update stmts only when
28524 profiling or testing coverage. Make sure to update calls
28525 fntype, stripping 'const' there.
28527 2023-03-24 Jakub Jelinek <jakub@redhat.com>
28529 PR middle-end/109258
28530 * builtins.cc (inline_expand_builtin_bytecmp): Return NULL_RTX early
28531 if target == const0_rtx.
28533 2023-03-24 Alexandre Oliva <oliva@adacore.com>
28535 * doc/sourcebuild.texi (weak_undefined, posix_memalign):
28536 Document options and effective targets.
28538 2023-03-24 Costas Argyris <costas.argyris@gmail.com>
28540 * config/i386/x-mingw32-utf8: Make HOST_EXTRA_OBJS_SYMBOL
28543 2023-03-23 Pat Haugen <pthaugen@linux.ibm.com>
28545 * config/rs6000/rs6000.md (*mod<mode>3, umod<mode>3): Add
28546 non-earlyclobber alternative.
28548 2023-03-23 Andrew Pinski <apinski@marvell.com>
28551 * fold-const.cc (maybe_lvalue_p): Treat COMPOUND_LITERAL_EXPR
28554 2023-03-23 Richard Biener <rguenther@suse.de>
28556 PR tree-optimization/107569
28557 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt):
28558 Do not push SSA names with zero uses as available leader.
28559 (process_bb): Likewise.
28561 2023-03-23 Richard Biener <rguenther@suse.de>
28563 PR tree-optimization/109262
28564 * tree-ssa-forwprop.cc (pass_forwprop::execute): When
28565 combining a piecewise complex load avoid touching loads
28566 that throw internally. Use fun, not cfun throughout.
28568 2023-03-23 Jakub Jelinek <jakub@redhat.com>
28570 * value-range.cc (irange::irange_union, irange::intersect): Fix
28571 comment spelling bugs.
28572 * gimple-range-trace.cc (range_tracer::do_header): Likewise.
28573 * gimple-range-trace.h: Likewise.
28574 * gimple-range-edge.cc: Likewise.
28575 (gimple_outgoing_range_stmt_p,
28576 gimple_outgoing_range::switch_edge_range,
28577 gimple_outgoing_range::edge_range_p): Likewise.
28578 * gimple-range.cc (gimple_ranger::prefill_stmt_dependencies,
28579 gimple_ranger::fold_stmt, gimple_ranger::register_transitive_infer,
28580 assume_query::assume_query, assume_query::calculate_phi): Likewise.
28581 * gimple-range-edge.h: Likewise.
28582 * value-range.h (Value_Range::set, Value_Range::lower_bound,
28583 Value_Range::upper_bound, frange::set_undefined): Likewise.
28584 * gimple-range-gori.h (range_def_chain::depend, gori_map::m_outgoing,
28585 gori_compute): Likewise.
28586 * gimple-range-fold.h (fold_using_range): Likewise.
28587 * gimple-range-path.cc (path_range_query::compute_ranges_in_phis):
28589 * gimple-range-gori.cc (range_def_chain::in_chain_p,
28590 range_def_chain::dump, gori_map::calculate_gori,
28591 gori_compute::compute_operand_range_switch,
28592 gori_compute::logical_combine, gori_compute::refine_using_relation,
28593 gori_compute::compute_operand1_range, gori_compute::may_recompute_p):
28595 * gimple-range.h: Likewise.
28596 (enable_ranger): Likewise.
28597 * range-op.h (empty_range_varying): Likewise.
28598 * value-query.h (value_query): Likewise.
28599 * gimple-range-cache.cc (block_range_cache::set_bb_range,
28600 block_range_cache::dump, ssa_global_cache::clear_global_range,
28601 temporal_cache::temporal_value, temporal_cache::current_p,
28602 ranger_cache::range_of_def, ranger_cache::propagate_updated_value,
28603 ranger_cache::range_from_dom, ranger_cache::register_inferred_value):
28605 * gimple-range-fold.cc (fur_edge::get_phi_operand,
28606 fur_stmt::get_operand, gimple_range_adjustment,
28607 fold_using_range::range_of_phi,
28608 fold_using_range::relation_fold_and_or): Likewise.
28609 * value-range-storage.h (irange_storage_slot::MAX_INTS): Likewise.
28610 * value-query.cc (range_query::value_of_expr,
28611 range_query::value_on_edge, range_query::query_relation): Likewise.
28612 * tree-vrp.cc (remove_unreachable::remove_and_update_globals,
28613 intersect_range_with_nonzero_bits): Likewise.
28614 * gimple-range-infer.cc (gimple_infer_range::check_assume_func,
28615 exit_range): Likewise.
28616 * value-relation.h: Likewise.
28617 (equiv_oracle, relation_trio::relation_trio, value_relation,
28618 value_relation::value_relation, pe_min): Likewise.
28619 * range-op-float.cc (range_operator_float::rv_fold,
28620 frange_arithmetic, foperator_unordered_equal::op1_range,
28621 foperator_div::rv_fold): Likewise.
28622 * gimple-range-op.cc (cfn_clz::fold_range): Likewise.
28623 * value-relation.cc (equiv_oracle::query_relation,
28624 equiv_oracle::register_equiv, equiv_oracle::add_equiv_to_block,
28625 value_relation::apply_transitive, relation_chain_head::find_relation,
28626 dom_oracle::query_relation, dom_oracle::find_relation_block,
28627 dom_oracle::find_relation_dom, path_oracle::register_equiv): Likewise.
28628 * range-op.cc (range_operator::wi_fold_in_parts_equiv,
28629 create_possibly_reversed_range, adjust_op1_for_overflow,
28630 operator_mult::wi_fold, operator_exact_divide::op1_range,
28631 operator_cast::lhs_op1_relation, operator_cast::fold_pair,
28632 operator_cast::fold_range, operator_abs::wi_fold, range_op_cast_tests,
28633 range_op_lshift_tests): Likewise.
28635 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
28637 * config/gcn/gcn.cc (gcn_class_max_nregs): Handle vectors in SGPRs.
28638 (move_callee_saved_registers): Detect the bug condition early.
28640 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
28642 * config/gcn/gcn-protos.h (gcn_stepped_zero_int_parallel_p): New.
28643 * config/gcn/gcn-valu.md (V_1REG_ALT): New.
28645 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): New.
28646 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): New.
28647 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Use new patterns.
28648 * config/gcn/gcn.cc (gcn_stepped_zero_int_parallel_p): New.
28649 * config/gcn/predicates.md (ascending_zero_int_parallel): New.
28651 2023-03-23 Jakub Jelinek <jakub@redhat.com>
28653 PR tree-optimization/109176
28654 * tree-vect-generic.cc (expand_vector_condition): If a has
28655 vector boolean type and is a comparison, also check if both
28656 the comparison and VEC_COND_EXPR could be successfully expanded
28659 2023-03-23 Pan Li <pan2.li@intel.com>
28660 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28664 * config/riscv/riscv-modes.def (ADJUST_BYTESIZE): Adjust size
28665 for vector mask modes.
28666 * config/riscv/riscv.cc (riscv_v_adjust_bytesize): New.
28667 * config/riscv/riscv.h (riscv_v_adjust_bytesize): New.
28669 2023-03-23 Songhe Zhu <zhusonghe@eswincomputing.com>
28671 * config/riscv/multilib-generator: Adjusting the loop of 'alt' in 'alts'.
28673 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28676 * config/riscv/riscv-protos.h (emit_vlmax_vsetvl): Define as global.
28677 (emit_vlmax_op): Ditto.
28678 * config/riscv/riscv-v.cc (get_sew): New function.
28679 (emit_vlmax_vsetvl): Adapt function.
28680 (emit_pred_op): Ditto.
28681 (emit_vlmax_op): Ditto.
28682 (emit_nonvlmax_op): Ditto.
28683 (legitimize_move): Fix LRA ICE.
28684 (gen_no_side_effects_vsetvl_rtx): Adapt function.
28685 * config/riscv/vector.md (@mov<V_FRACT:mode><P:mode>_lra): New pattern.
28686 (@mov<VB:mode><P:mode>_lra): Ditto.
28687 (*mov<V_FRACT:mode><P:mode>_lra): Ditto.
28688 (*mov<VB:mode><P:mode>_lra): Ditto.
28690 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28693 * config/riscv/riscv-vector-builtins-bases.cc (class vlenb): Add
28694 __riscv_vlenb support.
28696 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
28697 * config/riscv/riscv-vector-builtins-functions.def (vlenb): Ditto.
28698 * config/riscv/riscv-vector-builtins-shapes.cc (struct vlenb_def): Ditto.
28700 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
28701 * config/riscv/riscv-vector-builtins.cc: Ditto.
28703 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28704 kito-cheng <kito.cheng@sifive.com>
28706 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bugs.
28707 (pass_vsetvl::compute_local_backward_infos): Fix bugs.
28708 (pass_vsetvl::need_vsetvl): Fix bugs.
28709 (pass_vsetvl::backward_demand_fusion): Fix bugs.
28710 (pass_vsetvl::demand_fusion): Fix bugs.
28711 (eliminate_insn): Fix bugs.
28712 (insert_vsetvl): Ditto.
28713 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
28714 * config/riscv/riscv-vsetvl.h (enum vsetvl_type): Ditto.
28715 * config/riscv/vector.md: Ditto.
28717 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28718 kito-cheng <kito.cheng@sifive.com>
28720 * config/riscv/riscv-vector-builtins-bases.cc: Fix ternary bug.
28721 * config/riscv/vector-iterators.md (nmsac): Ditto.
28727 * config/riscv/vector.md (@pred_mul_<optab><mode>): Ditto.
28728 (@pred_mul_plus<mode>): Ditto.
28729 (*pred_madd<mode>): Ditto.
28730 (*pred_macc<mode>): Ditto.
28731 (*pred_mul_plus<mode>): Ditto.
28732 (@pred_mul_plus<mode>_scalar): Ditto.
28733 (*pred_madd<mode>_scalar): Ditto.
28734 (*pred_macc<mode>_scalar): Ditto.
28735 (*pred_mul_plus<mode>_scalar): Ditto.
28736 (*pred_madd<mode>_extended_scalar): Ditto.
28737 (*pred_macc<mode>_extended_scalar): Ditto.
28738 (*pred_mul_plus<mode>_extended_scalar): Ditto.
28739 (@pred_minus_mul<mode>): Ditto.
28740 (*pred_<madd_nmsub><mode>): Ditto.
28741 (*pred_nmsub<mode>): Ditto.
28742 (*pred_<macc_nmsac><mode>): Ditto.
28743 (*pred_nmsac<mode>): Ditto.
28744 (*pred_mul_<optab><mode>): Ditto.
28745 (*pred_minus_mul<mode>): Ditto.
28746 (@pred_mul_<optab><mode>_scalar): Ditto.
28747 (@pred_minus_mul<mode>_scalar): Ditto.
28748 (*pred_<madd_nmsub><mode>_scalar): Ditto.
28749 (*pred_nmsub<mode>_scalar): Ditto.
28750 (*pred_<macc_nmsac><mode>_scalar): Ditto.
28751 (*pred_nmsac<mode>_scalar): Ditto.
28752 (*pred_mul_<optab><mode>_scalar): Ditto.
28753 (*pred_minus_mul<mode>_scalar): Ditto.
28754 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
28755 (*pred_nmsub<mode>_extended_scalar): Ditto.
28756 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
28757 (*pred_nmsac<mode>_extended_scalar): Ditto.
28758 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
28759 (*pred_minus_mul<mode>_extended_scalar): Ditto.
28760 (*pred_<madd_msub><mode>): Ditto.
28761 (*pred_<macc_msac><mode>): Ditto.
28762 (*pred_<madd_msub><mode>_scalar): Ditto.
28763 (*pred_<macc_msac><mode>_scalar): Ditto.
28764 (@pred_neg_mul_<optab><mode>): Ditto.
28765 (@pred_mul_neg_<optab><mode>): Ditto.
28766 (*pred_<nmadd_msub><mode>): Ditto.
28767 (*pred_<nmsub_nmadd><mode>): Ditto.
28768 (*pred_<nmacc_msac><mode>): Ditto.
28769 (*pred_<nmsac_nmacc><mode>): Ditto.
28770 (*pred_neg_mul_<optab><mode>): Ditto.
28771 (*pred_mul_neg_<optab><mode>): Ditto.
28772 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
28773 (@pred_mul_neg_<optab><mode>_scalar): Ditto.
28774 (*pred_<nmadd_msub><mode>_scalar): Ditto.
28775 (*pred_<nmsub_nmadd><mode>_scalar): Ditto.
28776 (*pred_<nmacc_msac><mode>_scalar): Ditto.
28777 (*pred_<nmsac_nmacc><mode>_scalar): Ditto.
28778 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
28779 (*pred_mul_neg_<optab><mode>_scalar): Ditto.
28780 (@pred_widen_neg_mul_<optab><mode>): Ditto.
28781 (@pred_widen_mul_neg_<optab><mode>): Ditto.
28782 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
28783 (@pred_widen_mul_neg_<optab><mode>_scalar): Ditto.
28785 2023-03-23 liuhongt <hongtao.liu@intel.com>
28787 * builtins.cc (builtin_memset_read_str): Replace
28788 targetm.gen_memset_scratch_rtx with gen_reg_rtx.
28789 (builtin_memset_gen_str): Ditto.
28790 * config/i386/i386-expand.cc
28791 (ix86_convert_const_wide_int_to_broadcast): Replace
28792 ix86_gen_scratch_sse_rtx with gen_reg_rtx.
28793 (ix86_expand_vector_move): Ditto.
28794 * config/i386/i386-protos.h (ix86_gen_scratch_sse_rtx):
28796 * config/i386/i386.cc (ix86_gen_scratch_sse_rtx): Removed.
28797 (TARGET_GEN_MEMSET_SCRATCH_RTX): Removed.
28798 * doc/tm.texi: Remove TARGET_GEN_MEMSET_SCRATCH_RTX.
28799 * doc/tm.texi.in: Ditto.
28800 * target.def: Ditto.
28802 2023-03-22 Vladimir N. Makarov <vmakarov@redhat.com>
28804 * lra.cc (lra): Do not repeat inheritance and live range splitting
28805 when asm error is found.
28807 2023-03-22 Andrew Jenner <andrew@codesourcery.com>
28809 * config/gcn/gcn-protos.h (gcn_expand_dpp_swap_pairs_insn)
28810 (gcn_expand_dpp_distribute_even_insn)
28811 (gcn_expand_dpp_distribute_odd_insn): Declare.
28812 * config/gcn/gcn-valu.md (@dpp_swap_pairs<mode>)
28813 (@dpp_distribute_even<mode>, @dpp_distribute_odd<mode>)
28814 (cmul<conj_op><mode>3, cml<addsub_as><mode>4, vec_addsub<mode>3)
28815 (cadd<rot><mode>3, vec_fmaddsub<mode>4, vec_fmsubadd<mode>4)
28816 (fms<mode>4<exec>, fms<mode>4_negop2<exec>, fms<mode>4)
28817 (fms<mode>4_negop2): New patterns.
28818 * config/gcn/gcn.cc (gcn_expand_dpp_swap_pairs_insn)
28819 (gcn_expand_dpp_distribute_even_insn)
28820 (gcn_expand_dpp_distribute_odd_insn): New functions.
28821 * config/gcn/gcn.md: Add entries to unspec enum.
28823 2023-03-22 Aldy Hernandez <aldyh@redhat.com>
28825 PR tree-optimization/109008
28826 * value-range.cc (frange::set): Add nan_state argument.
28827 * value-range.h (class nan_state): New.
28828 (frange::get_nan_state): New.
28830 2023-03-22 Martin Liska <mliska@suse.cz>
28832 * configure: Regenerate.
28834 2023-03-21 Joseph Myers <joseph@codesourcery.com>
28836 * stor-layout.cc (finalize_type_size): Copy TYPE_TYPELESS_STORAGE
28839 2023-03-21 Andrew MacLeod <amacleod@redhat.com>
28841 PR tree-optimization/109192
28842 * gimple-range-gori.cc (gori_compute::compute_operand_range):
28843 Terminate gori calculations if a relation is not relevant.
28844 * value-relation.h (value_relation::set_relation): Allow
28845 equality between op1 and op2 if they are the same.
28847 2023-03-21 Richard Biener <rguenther@suse.de>
28849 PR tree-optimization/109219
28850 * tree-vect-loop.cc (vectorizable_reduction): Check
28851 slp_node, not STMT_SLP_TYPE.
28852 * tree-vect-stmts.cc (vectorizable_condition): Likewise.
28853 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1):
28854 Remove assertion on STMT_SLP_TYPE.
28856 2023-03-21 Jakub Jelinek <jakub@redhat.com>
28858 PR tree-optimization/109215
28859 * tree.h (enum special_array_member): Adjust comments for int_0
28861 * tree.cc (component_ref_sam_type): Clear zero_elts if memtype
28862 has zero sized element type and the array has variable number of
28863 elements or constant one or more elements.
28864 (component_ref_size): Adjust comments, formatting fix.
28866 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
28868 * configure.ac: Add check for the Texinfo 6.8
28869 CONTENTS_OUTPUT_LOCATION customization variable and set it if
28871 * configure: Regenerate.
28872 * Makefile.in (MAKEINFO_TOC_INLINE_FLAG): New variable. Set by
28873 configure.ac to -c CONTENTS_OUTPUT_LOCATION=inline if
28874 CONTENTS_OUTPUT_LOCATION support is detected, empty otherwise.
28875 ($(build_htmldir)/%/index.html): Pass MAKEINFO_TOC_INLINE_FLAG.
28877 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
28879 * doc/extend.texi: Associate use_hazard_barrier_return index
28880 entry with its attribute.
28881 * doc/invoke.texi: Associate -fcanon-prefix-map index entry with
28884 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
28886 * doc/implement-c.texi: Remove usage of @gol.
28887 * doc/invoke.texi: Ditto.
28888 * doc/sourcebuild.texi: Ditto.
28889 * doc/include/gcc-common.texi: Remove @gol. In new Makeinfo and
28890 texinfo.tex versions, the bug it was working around appears to
28893 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
28895 * doc/include/texinfo.tex: Update to 2023-01-17.19.
28897 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
28899 * doc/include/gcc-common.texi: Add @defbuiltin{,x} and
28900 @enddefbuiltin for defining built-in functions.
28901 * doc/extend.texi: Apply @defbuiltin{,x} to many, but not all,
28902 places where it should be used.
28904 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
28906 * doc/extend.texi (Formatted Output Function Checking): New
28907 subsection for grouping together printf et al.
28908 (Exception handling) Fix missing @ sign before copyright
28909 header, which lead to the copyright line leaking into
28910 '(gcc)Exception handling'.
28911 * doc/gcc.texi: Set document language to en_US.
28912 (@copying): Wrap front cover texts in quotations, move in manual
28915 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
28917 * doc/gcc.texi: Add the Indices appendix, to make texinfo
28918 generate nice indices overview page.
28920 2023-03-21 Richard Biener <rguenther@suse.de>
28922 PR tree-optimization/109170
28923 * gimple-range-op.cc (cfn_pass_through_arg1): New.
28924 (gimple_range_op_handler::maybe_builtin_call): Handle
28925 __builtin_expect via cfn_pass_through_arg1.
28927 2023-03-20 Michael Meissner <meissner@linux.ibm.com>
28930 * config/rs6000/rs6000.cc (create_complex_muldiv): Delete.
28931 (init_float128_ieee): Delete code to switch complex multiply and divide
28933 (complex_multiply_builtin_code): New helper function.
28934 (complex_divide_builtin_code): Likewise.
28935 (rs6000_mangle_decl_assembler_name): Add support for mangling the name
28936 of complex 128-bit multiply and divide built-in functions.
28938 2023-03-20 Peter Bergner <bergner@linux.ibm.com>
28941 * config/rs6000/rs6000-builtin.cc (stv_expand_builtin): Use tmode.
28943 2023-03-19 Jonny Grant <jg@jguk.org>
28945 * doc/extend.texi (Common Function Attributes) <nonnull>:
28948 2023-03-18 Peter Bergner <bergner@linux.ibm.com>
28950 PR rtl-optimization/109179
28951 * lra-constraints.cc (combine_reload_insn): Enforce TO is not a debug
28952 insn or note. Move the tests earlier to guard lra_get_insn_recog_data.
28954 2023-03-17 Jakub Jelinek <jakub@redhat.com>
28957 * function.h (push_struct_function): Add ABSTRACT_P argument defaulted
28959 * function.cc (push_struct_function): Add ABSTRACT_P argument, pass it
28960 to allocate_struct_function instead of false.
28961 * tree-inline.cc (initialize_cfun): Don't copy DECL_ARGUMENTS
28962 nor DECL_RESULT here. Pass true as ABSTRACT_P to
28963 push_struct_function. Call targetm.target_option.relayout_function
28965 (tree_function_versioning): Formatting fix.
28967 2023-03-17 Vladimir N. Makarov <vmakarov@redhat.com>
28969 * lra-constraints.cc: Include hooks.h.
28970 (combine_reload_insn): New function.
28971 (lra_constraints): Call it.
28973 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28974 kito-cheng <kito.cheng@sifive.com>
28976 * config/riscv/riscv-v.cc (legitimize_move): Allow undef value
28977 as legitimate value.
28978 * config/riscv/riscv-vector-builtins.cc
28979 (function_expander::use_ternop_insn): Fix bugs of ternary intrinsic.
28980 (function_expander::use_widen_ternop_insn): Ditto.
28981 * config/riscv/vector.md (@vundefined<mode>): New pattern.
28982 (pred_mul_<optab><mode>_undef_merge): Remove.
28983 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
28984 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
28985 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
28986 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
28988 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28991 * config/riscv/riscv.md: Fix subreg bug.
28993 2023-03-17 Jakub Jelinek <jakub@redhat.com>
28995 PR middle-end/108685
28996 * omp-expand.cc (expand_omp_for_ordered_loops): Add L0_BB argument,
28997 use its loop_father rather than BODY_BB's loop_father.
28998 (expand_omp_for_generic): Adjust expand_omp_for_ordered_loops caller.
28999 If broken_loop with ordered > collapse and at least one of those
29000 extra loops aren't guaranteed to have at least one iteration, change
29001 l0_bb's loop_father to entry_bb's loop_father. Set cont_bb's
29002 loop_father to l0_bb's loop_father rather than l1_bb's.
29004 2023-03-17 Jakub Jelinek <jakub@redhat.com>
29007 * gdbhooks.py (TreePrinter.to_string): Wrap
29008 gdb.parse_and_eval('tree_code_type') in a try block, parse
29009 and eval 'tree_code_type_tmpl<0>::tree_code_type' instead if it
29010 raises exception. Update comments for the recent tree_code_type
29013 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
29015 * doc/extend.texi (BPF Built-in Functions): Fix numerous markup
29016 issues. Add more line breaks to example so it doesn't overflow
29019 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
29021 * doc/extend.texi (Common Function Attributes) <access>: Fix bad
29022 line breaks in examples.
29023 <malloc>: Fix bad line breaks in running text, also copy-edit
29025 (Extended Asm) <Generic Operand Modifiers>: Fix @multitable width.
29026 * doc/invoke.texi (Option Summary) <Developer Options>: Fix misplaced
29028 (C++ Dialect Options) <-fcontracts>: Add line break in example.
29029 <-Wctad-maybe-unsupported>: Likewise.
29030 <-Winvalid-constexpr>: Likewise.
29031 (Warning Options) <-Wdangling-pointer>: Likewise.
29032 <-Winterference-size>: Likewise.
29033 <-Wvla-parameter>: Likewise.
29034 (Static Analyzer Options): Fix bad line breaks in running text,
29035 plus add some missing markup.
29036 (Optimize Options) <openacc-privatization>: Fix more bad line
29037 breaks in running text.
29039 2023-03-16 Uros Bizjak <ubizjak@gmail.com>
29041 * config/i386/i386-expand.cc (expand_vec_perm_pblendv):
29042 Handle 8-byte modes only with TARGET_MMX_WITH_SSE.
29043 (expand_vec_perm_2perm_pblendv): Ditto.
29045 2023-03-16 Martin Liska <mliska@suse.cz>
29047 PR middle-end/106133
29048 * gcc.cc (driver_handle_option): Use x_main_input_basename
29049 if x_dump_base_name is null.
29050 * opts.cc (common_handle_option): Likewise.
29052 2023-03-16 Richard Biener <rguenther@suse.de>
29054 PR tree-optimization/109123
29055 * gimple-ssa-warn-access.cc (pass_waccess::warn_invalid_pointer):
29056 Do not emit -Wuse-after-free late.
29057 (pass_waccess::check_call): Always check call pointer uses.
29059 2023-03-16 Richard Biener <rguenther@suse.de>
29061 PR tree-optimization/109141
29062 * tree-dfa.h (renumber_gimple_stmt_uids_in_block): New.
29063 * tree-dfa.cc (renumber_gimple_stmt_uids_in_block): Split
29065 (renumber_gimple_stmt_uids): ... here and
29066 (renumber_gimple_stmt_uids_in_blocks): ... here.
29067 * gimple-ssa-warn-access.cc (pass_waccess::use_after_inval_p):
29068 Use renumber_gimple_stmt_uids_in_block to also assign UIDs
29070 (pass_waccess::check_pointer_uses): Process all PHIs.
29072 2023-03-15 David Malcolm <dmalcolm@redhat.com>
29075 * diagnostic-format-sarif.cc (class sarif_invocation): New.
29076 (class sarif_ice_notification): New.
29077 (sarif_builder::m_invocation_obj): New field.
29078 (sarif_invocation::add_notification_for_ice): New.
29079 (sarif_invocation::prepare_to_flush): New.
29080 (sarif_ice_notification::sarif_ice_notification): New.
29081 (sarif_builder::sarif_builder): Add m_invocation_obj.
29082 (sarif_builder::end_diagnostic): Special-case DK_ICE and
29084 (sarif_builder::flush_to_file): Call prepare_to_flush on
29085 m_invocation_obj. Pass the latter to make_top_level_object.
29086 (sarif_builder::make_result_object): Move creation of "locations"
29088 (sarif_builder::make_locations_arr): ...this new function.
29089 (sarif_builder::make_top_level_object): Add "invocation_obj" param
29090 and pass it to make_run_object.
29091 (sarif_builder::make_run_object): Add "invocation_obj" param and
29093 (sarif_ice_handler): New callback.
29094 (diagnostic_output_format_init_sarif): Wire up sarif_ice_handler.
29095 * diagnostic.cc (diagnostic_initialize): Initialize new field
29097 (diagnostic_action_after_output): If it is set, make one attempt
29098 to call ice_handler_cb.
29099 * diagnostic.h (diagnostic_context::ice_handler_cb): New field.
29101 2023-03-15 Uros Bizjak <ubizjak@gmail.com>
29103 * config/i386/i386-expand.cc (expand_vec_perm_blend):
29104 Handle 8-byte modes only with TARGET_MMX_WITH_SSE. Handle V2SFmode
29105 and fix V2HImode handling.
29106 (expand_vec_perm_1): Try to emit BLEND instruction
29107 before MOVSS/MOVSD.
29108 * config/i386/mmx.md (*mmx_blendps): New insn pattern.
29110 2023-03-15 Tobias Burnus <tobias@codesourcery.com>
29112 * omp-low.cc (omp_runtime_api_call): Add omp_in_explicit_task.
29114 2023-03-15 Richard Biener <rguenther@suse.de>
29116 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
29117 Do not diagnose clobbers.
29119 2023-03-15 Richard Biener <rguenther@suse.de>
29121 PR tree-optimization/109139
29122 * tree-ssa-live.cc (remove_unused_locals): Look at the
29123 base address for unused decls on the LHS of .DEFERRED_INIT.
29125 2023-03-15 Xi Ruoyao <xry111@xry111.site>
29128 * builtins.cc (inline_string_cmp): Force the character
29129 difference into "result" pseudo-register, instead of reassign
29130 the pseudo-register.
29132 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
29134 * config.gcc: Add thead.o to RISC-V extra_objs.
29135 * config/riscv/peephole.md: Add mempair peephole passes.
29136 * config/riscv/riscv-protos.h (riscv_split_64bit_move_p): New
29138 (th_mempair_operands_p): Likewise.
29139 (th_mempair_order_operands): Likewise.
29140 (th_mempair_prepare_save_restore_operands): Likewise.
29141 (th_mempair_save_restore_regs): Likewise.
29142 (th_mempair_output_move): Likewise.
29143 * config/riscv/riscv.cc (riscv_save_reg): Move code.
29144 (riscv_restore_reg): Move code.
29145 (riscv_for_each_saved_reg): Add code to emit mempair insns.
29146 * config/riscv/t-riscv: Add thead.cc.
29147 * config/riscv/thead.md (*th_mempair_load_<GPR:mode>2):
29149 (*th_mempair_store_<GPR:mode>2): Likewise.
29150 (*th_mempair_load_extendsidi2): Likewise.
29151 (*th_mempair_load_zero_extendsidi2): Likewise.
29152 * config/riscv/thead.cc: New file.
29154 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
29156 * config/riscv/constraints.md (TARGET_XTHEADFMV ? FP_REGS : NO_REGS)
29157 New constraint "th_f_fmv".
29158 (TARGET_XTHEADFMV ? GR_REGS : NO_REGS): New constraint
29160 * config/riscv/riscv.cc (riscv_split_doubleword_move):
29161 Add split code for XTheadFmv.
29162 (riscv_secondary_memory_needed): XTheadFmv does not need
29164 * config/riscv/riscv.md: Add new UNSPEC_XTHEADFMV and
29165 UNSPEC_XTHEADFMV_HW. Add support for XTheadFmv to
29166 movdf_hardfloat_rv32.
29167 * config/riscv/thead.md (th_fmv_hw_w_x): New INSN.
29168 (th_fmv_x_w): New INSN.
29169 (th_fmv_x_hw): New INSN.
29171 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
29173 * config/riscv/riscv.md (maddhisi4): New expand.
29174 (msubhisi4): New expand.
29175 * config/riscv/thead.md (*th_mula<mode>): New pattern.
29176 (*th_mulawsi): New pattern.
29177 (*th_mulawsi2): New pattern.
29178 (*th_maddhisi4): New pattern.
29179 (*th_sextw_maddhisi4): New pattern.
29180 (*th_muls<mode>): New pattern.
29181 (*th_mulswsi): New pattern.
29182 (*th_mulswsi2): New pattern.
29183 (*th_msubhisi4): New pattern.
29184 (*th_sextw_msubhisi4): New pattern.
29186 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
29188 * config/riscv/iterators.md (TARGET_64BIT): Add GPR2 iterator.
29189 * config/riscv/riscv-protos.h (riscv_expand_conditional_move):
29191 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for
29193 (riscv_expand_conditional_move): New function.
29194 (riscv_expand_conditional_move_onesided): New function.
29195 * config/riscv/riscv.md: Add support for XTheadCondMov.
29196 * config/riscv/thead.md (*th_cond_mov<GPR:mode><GPR2:mode>): Add
29197 support for XTheadCondMov.
29198 (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Likewise.
29200 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
29202 * config/riscv/bitmanip.md (clzdi2): New expand.
29203 (clzsi2): New expand.
29204 (ctz<mode>2): New expand.
29205 (popcount<mode>2): New expand.
29206 (<bitmanip_optab>si2): Rename INSN.
29207 (*<bitmanip_optab>si2): Hide INSN name.
29208 (<bitmanip_optab>di2): Rename INSN.
29209 (*<bitmanip_optab>di2): Hide INSN name.
29210 (rotrsi3): Remove INSN.
29211 (rotr<mode>3): Add expand.
29212 (*rotrsi3): New INSN.
29213 (rotrdi3): Rename INSN.
29214 (*rotrdi3): Hide INSN name.
29215 (rotrsi3_sext): Rename INSN.
29216 (*rotrsi3_sext): Hide INSN name.
29217 (bswap<mode>2): Remove INSN.
29218 (bswapdi2): Add expand.
29219 (bswapsi2): Add expand.
29220 (*bswap<mode>2): Hide INSN name.
29221 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for sign
29223 * config/riscv/riscv.md (extv<mode>): New expand.
29224 (extzv<mode>): New expand.
29225 * config/riscv/thead.md (*th_srri<mode>3): New INSN.
29226 (*th_ext<mode>): New INSN.
29227 (*th_extu<mode>): New INSN.
29228 (*th_clz<mode>2): New INSN.
29229 (*th_rev<mode>2): New INSN.
29231 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
29233 * config/riscv/riscv.cc (riscv_rtx_costs): Add xthead:tst cost.
29234 * config/riscv/thead.md (*th_tst<mode>3): New INSN.
29236 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
29238 * config/riscv/riscv.md: Include thead.md
29239 * config/riscv/thead.md: New file.
29241 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
29243 * config/riscv/riscv-cores.def (RISCV_CORE): Add "thead-c906".
29245 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
29247 * common/config/riscv/riscv-common.cc: Add xthead* extensions.
29248 * config/riscv/riscv-opts.h (MASK_XTHEADBA): New.
29249 (MASK_XTHEADBB): New.
29250 (MASK_XTHEADBS): New.
29251 (MASK_XTHEADCMO): New.
29252 (MASK_XTHEADCONDMOV): New.
29253 (MASK_XTHEADFMEMIDX): New.
29254 (MASK_XTHEADFMV): New.
29255 (MASK_XTHEADINT): New.
29256 (MASK_XTHEADMAC): New.
29257 (MASK_XTHEADMEMIDX): New.
29258 (MASK_XTHEADMEMPAIR): New.
29259 (MASK_XTHEADSYNC): New.
29260 (TARGET_XTHEADBA): New.
29261 (TARGET_XTHEADBB): New.
29262 (TARGET_XTHEADBS): New.
29263 (TARGET_XTHEADCMO): New.
29264 (TARGET_XTHEADCONDMOV): New.
29265 (TARGET_XTHEADFMEMIDX): New.
29266 (TARGET_XTHEADFMV): New.
29267 (TARGET_XTHEADINT): New.
29268 (TARGET_XTHEADMAC): New.
29269 (TARGET_XTHEADMEMIDX): New.
29270 (TARGET_XTHEADMEMPAIR): new.
29271 (TARGET_XTHEADSYNC): New.
29272 * config/riscv/riscv.opt: Add riscv_xthead_subext.
29274 2023-03-15 Hu, Lin1 <lin1.hu@intel.com>
29277 * config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi,
29278 __builtin_ia32_vaesdeclast_v16qi,__builtin_ia32_vaesenc_v16qi,
29279 __builtin_ia32_vaesenclast_v16qi): Require OPTION_MASK_ISA_AVX512VL.
29281 2023-03-14 Jakub Jelinek <jakub@redhat.com>
29284 * config/i386/i386-expand.cc (split_double_concat): Fix splitting
29285 when lo is equal to dhi and hi is a MEM which uses dlo register.
29287 2023-03-14 Martin Jambor <mjambor@suse.cz>
29290 * ipa-cp.cc (update_profiling_info): Drop counts of orig_node to
29291 global0 instead of zeroing when it does not have as many counts as
29294 2023-03-14 Martin Jambor <mjambor@suse.cz>
29297 * ipa-cp.cc (update_specialized_profile): Drop orig_node_count to
29298 ipa count, remove assert, lenient_count_portion_handling, dump
29299 also orig_node_count.
29301 2023-03-14 Uros Bizjak <ubizjak@gmail.com>
29303 * config/i386/i386-expand.cc (expand_vec_perm_movs):
29304 Handle V2SImode for TARGET_MMX_WITH_SSE.
29305 * config/i386/mmx.md (*mmx_movss_<mode>): Rename from *mmx_movss
29306 using V2FI mode iterator to handle both V2SI and V2SF modes.
29308 2023-03-14 Sam James <sam@gentoo.org>
29310 * config/riscv/genrvv-type-indexer.cc: Avoid calloc() poisoning on musl by
29311 including <sstream> earlier.
29312 * system.h: Add INCLUDE_SSTREAM.
29314 2023-03-14 Richard Biener <rguenther@suse.de>
29316 * tree-ssa-live.cc (remove_unused_locals): Do not treat
29317 the .DEFERRED_INIT of a variable as use, instead remove
29318 that if it is the only use.
29320 2023-03-14 Eric Botcazou <ebotcazou@adacore.com>
29322 PR rtl-optimization/107762
29323 * expr.cc (emit_group_store): Revert latest change.
29325 2023-03-14 Andre Vieira <andre.simoesdiasvieira@arm.com>
29327 PR tree-optimization/109005
29328 * tree-if-conv.cc (get_bitfield_rep): Replace BLKmode check with
29329 aggregate type check.
29331 2023-03-14 Jakub Jelinek <jakub@redhat.com>
29333 PR tree-optimization/109115
29334 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Don't use
29335 r.upper_bound () on r.undefined_p () range.
29337 2023-03-14 Jan Hubicka <hubicka@ucw.cz>
29339 PR tree-optimization/106896
29340 * profile-count.cc (profile_count::to_sreal_scale): Synchronize
29341 implementatoin with probability_in; avoid some asserts.
29343 2023-03-13 Max Filippov <jcmvbkbc@gmail.com>
29345 * config/xtensa/linux.h (TARGET_ASM_FILE_END): New macro.
29347 2023-03-13 Sean Bright <sean@seanbright.com>
29349 * doc/invoke.texi (Warning Options): Remove errant 'See'
29352 2023-03-13 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
29354 * config/xtensa/xtensa.h (REG_OK_STRICT, REG_OK_FOR_INDEX_P,
29355 REG_OK_FOR_BASE_P): Remove.
29357 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29359 * config/riscv/vector-iterators.md (=vd,vr): Fine tune.
29360 (=vd,vd,vr,vr): Ditto.
29361 * config/riscv/vector.md: Ditto.
29363 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29365 * config/riscv/riscv-vector-builtins.cc
29366 (function_expander::use_compare_insn): Add operand predicate check.
29368 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29370 * config/riscv/vector.md: Fine tune RA constraints.
29372 2023-03-13 Tobias Burnus <tobias@codesourcery.com>
29374 * config/gcn/mkoffload.cc (main): Pass -save-temps on for the
29375 hsaco assemble/link.
29377 2023-03-13 Richard Biener <rguenther@suse.de>
29379 PR tree-optimization/109046
29380 * tree-ssa-forwprop.cc (pass_forwprop::execute): Combine
29381 piecewise complex loads.
29383 2023-03-12 Jakub Jelinek <jakub@redhat.com>
29385 * config/aarch64/aarch64.h (aarch64_bf16_type_node): Remove.
29386 (aarch64_bf16_ptr_type_node): Adjust comment.
29387 * config/aarch64/aarch64.cc (aarch64_gimplify_va_arg_expr): Use
29388 bfloat16_type_node rather than aarch64_bf16_type_node.
29389 (aarch64_libgcc_floating_mode_supported_p,
29390 aarch64_scalar_mode_supported_p): Also support BFmode.
29391 (aarch64_invalid_conversion, aarch64_invalid_unary_op): Remove.
29392 (aarch64_invalid_binary_op): Remove BFmode related rejections.
29393 (TARGET_INVALID_CONVERSION, TARGET_INVALID_UNARY_OP): Don't redefine.
29394 * config/aarch64/aarch64-builtins.cc (aarch64_bf16_type_node): Remove.
29395 (aarch64_int_or_fp_type): Use bfloat16_type_node rather than
29396 aarch64_bf16_type_node.
29397 (aarch64_init_simd_builtin_types): Likewise.
29398 (aarch64_init_bf16_types): Likewise. Don't create bfloat16_type_node,
29399 which is created in tree.cc already.
29400 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): Likewise.
29402 2023-03-12 Roger Sayle <roger@nextmovesoftware.com>
29404 PR middle-end/109031
29405 * tree-chrec.cc (chrec_apply): When folding "{a, +, a} (x-1)",
29406 ensure that the type of x is as wide or wider than the type of a.
29408 2023-03-12 Tamar Christina <tamar.christina@arm.com>
29411 * config/aarch64/aarch64-simd.md (@aarch64_bitmask_udiv<mode>3): Remove.
29412 (*bitmask_shift_plus<mode>): New.
29413 * config/aarch64/aarch64-sve2.md (*bitmask_shift_plus<mode>): New.
29414 (@aarch64_bitmask_udiv<mode>3): Remove.
29415 * config/aarch64/aarch64.cc
29416 (aarch64_vectorize_can_special_div_by_constant,
29417 TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Removed.
29418 (TARGET_VECTORIZE_PREFERRED_DIV_AS_SHIFTS_OVER_MULT,
29419 aarch64_vectorize_preferred_div_as_shifts_over_mult): New.
29421 2023-03-12 Tamar Christina <tamar.christina@arm.com>
29424 * target.def (preferred_div_as_shifts_over_mult): New.
29425 * doc/tm.texi.in: Document it.
29426 * doc/tm.texi: Regenerate.
29427 * targhooks.cc (default_preferred_div_as_shifts_over_mult): New.
29428 * targhooks.h (default_preferred_div_as_shifts_over_mult): New.
29429 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Use it.
29431 2023-03-12 Tamar Christina <tamar.christina@arm.com>
29432 Richard Sandiford <richard.sandiford@arm.com>
29435 * tree-ssa-math-opts.cc (convert_mult_to_fma): Inhibit FMA in case not
29438 2023-03-12 Tamar Christina <tamar.christina@arm.com>
29439 Andrew MacLeod <amacleod@redhat.com>
29442 * gimple-range-op.h (gimple_range_op_handler): Add maybe_non_standard.
29443 * gimple-range-op.cc (gimple_range_op_handler::gimple_range_op_handler):
29445 (gimple_range_op_handler::maybe_non_standard): New.
29446 * range-op.cc (class operator_widen_plus_signed,
29447 operator_widen_plus_signed::wi_fold, class operator_widen_plus_unsigned,
29448 operator_widen_plus_unsigned::wi_fold, class operator_widen_mult_signed,
29449 operator_widen_mult_signed::wi_fold, class operator_widen_mult_unsigned,
29450 operator_widen_mult_unsigned::wi_fold,
29451 ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
29452 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New.
29453 * range-op.h (ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
29454 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New
29456 2023-03-12 Tamar Christina <tamar.christina@arm.com>
29459 * doc/tm.texi (TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Remove.
29460 * doc/tm.texi.in: Likewise.
29461 * explow.cc (round_push, align_dynamic_address): Revert previous patch.
29462 * expmed.cc (expand_divmod): Likewise.
29463 * expmed.h (expand_divmod): Likewise.
29464 * expr.cc (force_operand, expand_expr_divmod): Likewise.
29465 * optabs.cc (expand_doubleword_mod, expand_doubleword_divmod): Likewise.
29466 * target.def (can_special_div_by_const): Remove.
29467 * target.h: Remove tree-core.h include
29468 * targhooks.cc (default_can_special_div_by_const): Remove.
29469 * targhooks.h (default_can_special_div_by_const): Remove.
29470 * tree-vect-generic.cc (expand_vector_operation): Remove hook.
29471 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Remove hook.
29472 * tree-vect-stmts.cc (vectorizable_operation): Remove hook.
29474 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
29476 * doc/install.texi2html: Fix issue number typo in comment.
29478 2023-03-12 Gaius Mulley <gaiusmod2@gmail.com>
29480 * doc/gm2.texi (Elementary data types): Equivalence BOOLEAN with
29483 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
29485 * doc/invoke.texi (Optimize Options): Add markup to
29486 description of asan-kernel-mem-intrinsic-prefix, and clarify
29489 2023-03-11 Gerald Pfeifer <gerald@pfeifer.com>
29491 * doc/extend.texi (Named Address Spaces): Drop a redundant link
29494 2023-03-11 Jeff Law <jlaw@ventanamicro>
29497 * doc/extend.texi: Clarify Attribute Syntax a bit.
29499 2023-03-11 Sandra Loosemore <sandra@codesourcery.com>
29501 * doc/install.texi (Prerequisites): Suggest using newer versions
29503 (Final install): Clean up and modernize discussion of how to
29504 build or obtain the GCC manuals.
29505 * doc/install.texi2html: Update comment to point to the PR instead
29506 of "makeinfo 4.7 brokenness" (it's not specific to that version).
29508 2023-03-10 Jakub Jelinek <jakub@redhat.com>
29511 * optabs.cc (expand_fix): For conversions from BFmode to integral,
29512 use shifts to convert it to SFmode first and then convert SFmode
29515 2023-03-10 Andrew Pinski <apinski@marvell.com>
29517 * config/aarch64/aarch64.md: Add a new define_split
29520 2023-03-10 Richard Biener <rguenther@suse.de>
29522 * tree-ssa-structalias.cc (solve_graph): Immediately
29523 iterate self-cycles.
29525 2023-03-10 Jakub Jelinek <jakub@redhat.com>
29527 PR tree-optimization/109008
29528 * range-op-float.cc (float_widen_lhs_range): If not
29529 -frounding-math and not IBM double double format, extend lhs
29530 range just by 0.5ulp rather than 1ulp in each direction.
29532 2023-03-10 Jakub Jelinek <jakub@redhat.com>
29535 * config.gcc (x86_64-*-cygwin*): Don't add i386/t-cygwin-w64 into
29537 * config/i386/t-cygwin-w64: Remove.
29539 2023-03-10 Jakub Jelinek <jakub@redhat.com>
29542 * tree-core.h (tree_code_type, tree_code_length): For C++11 or
29543 C++14, don't declare as extern const arrays.
29544 (tree_code_type_tmpl, tree_code_length_tmpl): New types with
29545 static constexpr member arrays for C++11 or C++14.
29546 * tree.h (TREE_CODE_CLASS): For C++11 or C++14 use
29547 tree_code_type_tmpl <0>::tree_code_type instead of tree_code_type.
29548 (TREE_CODE_LENGTH): For C++11 or C++14 use
29549 tree_code_length_tmpl <0>::tree_code_length instead of
29551 * tree.cc (tree_code_type, tree_code_length): Remove.
29553 2023-03-10 Jakub Jelinek <jakub@redhat.com>
29556 * common.opt (fcanon-prefix-map): New option.
29557 * opts.cc: Include file-prefix-map.h.
29558 (flag_canon_prefix_map): New variable.
29559 (common_handle_option): Handle OPT_fcanon_prefix_map.
29560 (gen_command_line_string): Ignore OPT_fcanon_prefix_map.
29561 * file-prefix-map.h (flag_canon_prefix_map): Declare.
29562 * file-prefix-map.cc (struct file_prefix_map): Add canonicalize
29564 (add_prefix_map): Initialize canonicalize member from
29565 flag_canon_prefix_map, and if true canonicalize it using lrealpath.
29566 (remap_filename): Revert 2022-11-01 and 2022-11-07 changes,
29567 use lrealpath result only for map->canonicalize map entries.
29568 * lto-opts.cc (lto_write_options): Ignore OPT_fcanon_prefix_map.
29569 * opts-global.cc (handle_common_deferred_options): Clear
29570 flag_canon_prefix_map at the start and handle OPT_fcanon_prefix_map.
29571 * doc/invoke.texi (-fcanon-prefix-map): Document.
29572 (-ffile-prefix-map, -fdebug-prefix-map, -fprofile-prefix-map): Add
29573 see also for -fcanon-prefix-map.
29574 * doc/cppopts.texi (-fmacro-prefix-map): Likewise.
29576 2023-03-10 Jakub Jelinek <jakub@redhat.com>
29579 * cgraphunit.cc (check_global_declaration): Don't warn for unused
29580 variables which have OPT_Wunused_variable warning suppressed.
29582 2023-03-10 Jakub Jelinek <jakub@redhat.com>
29584 PR tree-optimization/109008
29585 * range-op-float.cc (float_widen_lhs_range): If lb is
29586 minimum representable finite number or ub is maximum
29587 representable finite number, instead of widening it to
29588 -inf or inf widen it to negative or positive 0x0.8p+(EMAX+1).
29589 Temporarily clear flag_finite_math_only when canonicalizing
29592 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29594 * config/riscv/riscv-builtins.cc (riscv_gimple_fold_builtin): New function.
29595 * config/riscv/riscv-protos.h (riscv_gimple_fold_builtin): Ditto.
29596 (gimple_fold_builtin): Ditto.
29597 * config/riscv/riscv-vector-builtins-bases.cc (class read_vl): New class.
29598 (class vleff): Ditto.
29600 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
29601 * config/riscv/riscv-vector-builtins-functions.def (read_vl): Ditto.
29603 * config/riscv/riscv-vector-builtins-shapes.cc (struct read_vl_def): Ditto.
29604 (struct fault_load_def): Ditto.
29606 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
29607 * config/riscv/riscv-vector-builtins.cc
29608 (rvv_arg_type_info::get_tree_type): Add size_ptr.
29609 (gimple_folder::gimple_folder): New class.
29610 (gimple_folder::fold): Ditto.
29611 (gimple_fold_builtin): New function.
29612 (get_read_vl_instance): Ditto.
29613 (get_read_vl_decl): Ditto.
29614 * config/riscv/riscv-vector-builtins.def (size_ptr): Add size_ptr.
29615 * config/riscv/riscv-vector-builtins.h (class gimple_folder): New class.
29616 (get_read_vl_instance): New function.
29617 (get_read_vl_decl): Ditto.
29618 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Ditto.
29619 (read_vl_insn_p): Ditto.
29620 (available_occurrence_p): Ditto.
29621 (backward_propagate_worthwhile_p): Ditto.
29622 (gen_vsetvl_pat): Adapt for vleff support.
29623 (get_forward_read_vl_insn): New function.
29624 (get_backward_fault_first_load_insn): Ditto.
29625 (source_equal_p): Adapt for vleff support.
29626 (first_ratio_invalid_for_second_sew_p): Remove.
29627 (first_ratio_invalid_for_second_lmul_p): Ditto.
29628 (first_lmul_less_than_second_lmul_p): Ditto.
29629 (first_ratio_less_than_second_ratio_p): Ditto.
29630 (support_relaxed_compatible_p): New function.
29631 (vector_insn_info::operator>): Remove.
29632 (vector_insn_info::operator>=): Refine.
29633 (vector_insn_info::parse_insn): Adapt for vleff support.
29634 (vector_insn_info::compatible_p): Ditto.
29635 (vector_insn_info::update_fault_first_load_avl): New function.
29636 (pass_vsetvl::transfer_after): Adapt for vleff support.
29637 (pass_vsetvl::demand_fusion): Ditto.
29638 (pass_vsetvl::cleanup_insns): Ditto.
29639 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Remove
29640 redundant condtions.
29641 * config/riscv/riscv-vsetvl.h (struct demands_cond): New function.
29642 * config/riscv/riscv.cc (TARGET_GIMPLE_FOLD_BUILTIN): New target hook.
29643 * config/riscv/riscv.md: Adapt for vleff support.
29644 * config/riscv/t-riscv: Ditto.
29645 * config/riscv/vector-iterators.md: New iterator.
29646 * config/riscv/vector.md (read_vlsi): New pattern.
29647 (read_vldi_zero_extend): Ditto.
29648 (@pred_fault_load<mode>): Ditto.
29650 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29652 * config/riscv/riscv-vector-builtins.cc
29653 (function_expander::use_ternop_insn): Use maybe_gen_insn instead.
29654 (function_expander::use_widen_ternop_insn): Ditto.
29655 * optabs.cc (maybe_gen_insn): Extend nops handling.
29657 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29659 * config/riscv/riscv-vector-builtins-bases.cc: Split indexed load
29660 patterns according to RVV ISA.
29661 * config/riscv/vector-iterators.md: New iterators.
29662 * config/riscv/vector.md
29663 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Remove.
29664 (@pred_indexed_<order>load<mode>_same_eew): New pattern.
29665 (@pred_indexed_<order>load<mode>_x2_greater_eew): Ditto.
29666 (@pred_indexed_<order>load<mode>_x4_greater_eew): Ditto.
29667 (@pred_indexed_<order>load<mode>_x8_greater_eew): Ditto.
29668 (@pred_indexed_<order>load<mode>_x2_smaller_eew): Ditto.
29669 (@pred_indexed_<order>load<mode>_x4_smaller_eew): Ditto.
29670 (@pred_indexed_<order>load<mode>_x8_smaller_eew): Ditto.
29671 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Remove.
29672 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
29673 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
29674 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
29675 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
29676 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
29678 2023-03-10 Michael Collison <collison@rivosinc.com>
29680 * tree-vect-loop-manip.cc (vect_do_peeling): Use
29681 result of constant_lower_bound instead of vf for the lower
29682 bound of the epilog loop trip count.
29684 2023-03-09 Tamar Christina <tamar.christina@arm.com>
29686 * passes.cc (emergency_dump_function): Finish graph generation.
29688 2023-03-09 Tamar Christina <tamar.christina@arm.com>
29690 * config/aarch64/aarch64.md (tbranch_<code><mode>3): Restrict to SHORT
29691 and bottom bit only.
29693 2023-03-09 Andrew Pinski <apinski@marvell.com>
29695 PR tree-optimization/108980
29696 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
29697 Reorgnize the call to warning for not strict flexible arrays
29698 to be before the check of warned.
29700 2023-03-09 Jason Merrill <jason@redhat.com>
29702 * doc/extend.texi: Comment out __is_deducible docs.
29704 2023-03-09 Jason Merrill <jason@redhat.com>
29707 * doc/extend.texi (Type Traits):: Document __is_deducible.
29709 2023-03-09 Costas Argyris <costas.argyris@gmail.com>
29712 * config.host: add object for x86_64-*-mingw*.
29713 * config/i386/sym-mingw32.cc: dummy file to attach
29715 * config/i386/utf8-mingw32.rc: windres resource file.
29716 * config/i386/winnt-utf8.manifest: XML manifest to
29718 * config/i386/x-mingw32: reference to x-mingw32-utf8.
29719 * config/i386/x-mingw32-utf8: Makefile fragment to
29720 embed UTF-8 manifest.
29722 2023-03-09 Vladimir N. Makarov <vmakarov@redhat.com>
29724 * lra-constraints.cc (process_alt_operands): Use operand modes for
29725 clobbered regs instead of the biggest access mode.
29727 2023-03-09 Richard Biener <rguenther@suse.de>
29729 PR middle-end/108995
29730 * fold-const.cc (extract_muldiv_1): Avoid folding
29731 (CST * b) / CST2 when sanitizing overflow and we rely on
29732 overflow being undefined.
29734 2023-03-09 Jakub Jelinek <jakub@redhat.com>
29735 Richard Biener <rguenther@suse.de>
29737 PR tree-optimization/109008
29738 * range-op-float.cc (float_widen_lhs_range): New function.
29739 (foperator_plus::op1_range, foperator_minus::op1_range,
29740 foperator_minus::op2_range, foperator_mult::op1_range,
29741 foperator_div::op1_range, foperator_div::op2_range): Use it.
29743 2023-03-07 Jonathan Grant <jg@jguk.org>
29746 * doc/invoke.texi (Instrumentation Options): Clarify
29747 LeakSanitizer behavior.
29749 2023-03-07 Benson Muite <benson_muite@emailplus.org>
29751 * doc/install.texi (Prerequisites): Add link to gmplib.org.
29753 2023-03-07 Pan Li <pan2.li@intel.com>
29754 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29758 * config/riscv/riscv-modes.def (ADJUST_PRECISION): Adjust VNx*BI
29760 * config/riscv/riscv.cc (riscv_v_adjust_precision): New.
29761 * config/riscv/riscv.h (riscv_v_adjust_precision): New.
29762 * genmodes.cc (adj_precision): New.
29763 (ADJUST_PRECISION): New.
29764 (emit_mode_adjustments): Handle ADJUST_PRECISION.
29766 2023-03-07 Hans-Peter Nilsson <hp@axis.com>
29768 * doc/sourcebuild.texi: Document check_effective_target_tail_call.
29770 2023-03-06 Paul-Antoine Arras <pa@codesourcery.com>
29772 * config/gcn/gcn-valu.md (<expander><mode>3_exec): Add patterns for
29773 {s|u}{max|min} in QI, HI and DI modes.
29774 (<expander><mode>3): Add pattern for {s|u}{max|min} in DI mode.
29775 (cond_<fexpander><mode>): Add pattern for cond_f{max|min}.
29776 (cond_<expander><mode>): Add pattern for cond_{s|u}{max|min}.
29777 * config/gcn/gcn.cc (gcn_spill_class): Allow the exec register to be
29780 2023-03-06 Richard Biener <rguenther@suse.de>
29782 PR tree-optimization/109025
29783 * tree-vect-loop.cc (vect_is_simple_reduction): Verify
29784 the inner LC PHI use is the inner loop PHI latch definition
29785 before classifying an outer PHI as double reduction.
29787 2023-03-06 Jan Hubicka <hubicka@ucw.cz>
29790 * config/i386/x86-tune.def (X86_TUNE_USE_SCATTER_2PARTS): Enable for
29792 (X86_TUNE_USE_SCATTER_4PARTS): Likewise.
29793 (X86_TUNE_USE_SCATTER): Likewise.
29795 2023-03-06 Xi Ruoyao <xry111@xry111.site>
29798 * config/loongarch/loongarch.h (FP_RETURN): Use
29799 TARGET_*_FLOAT_ABI instead of TARGET_*_FLOAT.
29800 (UNITS_PER_FP_ARG): Likewise.
29802 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29804 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bug.
29805 (pass_vsetvl::backward_demand_fusion): Ditto.
29807 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
29808 SiYu Wu <siyu@isrc.iscas.ac.cn>
29810 * config/riscv/crypto.md (riscv_sm3p0_<mode>): Add ZKSED's and ZKSH's
29812 (riscv_sm3p1_<mode>): New.
29813 (riscv_sm4ed_<mode>): New.
29814 (riscv_sm4ks_<mode>): New.
29815 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKSED's and ZKSH's AVAIL.
29816 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): Add ZKSED's and
29817 ZKSH's built-in functions.
29819 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
29820 SiYu Wu <siyu@isrc.iscas.ac.cn>
29822 * config/riscv/crypto.md (riscv_sha256sig0_<mode>): Add ZKNH's instructions.
29823 (riscv_sha256sig1_<mode>): New.
29824 (riscv_sha256sum0_<mode>): New.
29825 (riscv_sha256sum1_<mode>): New.
29826 (riscv_sha512sig0h): New.
29827 (riscv_sha512sig0l): New.
29828 (riscv_sha512sig1h): New.
29829 (riscv_sha512sig1l): New.
29830 (riscv_sha512sum0r): New.
29831 (riscv_sha512sum1r): New.
29832 (riscv_sha512sig0): New.
29833 (riscv_sha512sig1): New.
29834 (riscv_sha512sum0): New.
29835 (riscv_sha512sum1): New.
29836 * config/riscv/riscv-builtins.cc (AVAIL): And ZKNH's AVAIL.
29837 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): And ZKNH's
29838 built-in functions.
29839 (DIRECT_BUILTIN): Add new.
29841 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
29842 SiYu Wu <siyu@isrc.iscas.ac.cn>
29844 * config/riscv/constraints.md (D03): Add constants of bs and rnum.
29846 * config/riscv/crypto.md (riscv_aes32dsi): Add ZKND's and ZKNE's instructions.
29847 (riscv_aes32dsmi): New.
29848 (riscv_aes64ds): New.
29849 (riscv_aes64dsm): New.
29850 (riscv_aes64im): New.
29851 (riscv_aes64ks1i): New.
29852 (riscv_aes64ks2): New.
29853 (riscv_aes32esi): New.
29854 (riscv_aes32esmi): New.
29855 (riscv_aes64es): New.
29856 (riscv_aes64esm): New.
29857 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKND's and ZKNE's AVAIL.
29858 * config/riscv/riscv-scalar-crypto.def (DIRECT_BUILTIN): Add ZKND's and
29859 ZKNE's built-in functions.
29861 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
29862 SiYu Wu <siyu@isrc.iscas.ac.cn>
29864 * config/riscv/bitmanip.md: Add ZBKB's instructions.
29865 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
29866 * config/riscv/riscv.md: Add new type for crypto instructions.
29867 * config/riscv/crypto.md: Add Scalar Cryptography extension's machine
29869 * config/riscv/riscv-scalar-crypto.def: Add Scalar Cryptography
29870 extension's built-in function file.
29872 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
29873 SiYu Wu <siyu@isrc.iscas.ac.cn>
29875 * config/riscv/riscv-builtins.cc (RISCV_FTYPE_NAME2): New.
29876 (RISCV_FTYPE_NAME3): New.
29877 (RISCV_ATYPE_QI): New.
29878 (RISCV_ATYPE_HI): New.
29879 (RISCV_FTYPE_ATYPES2): New.
29880 (RISCV_FTYPE_ATYPES3): New.
29881 * config/riscv/riscv-ftypes.def (2): New.
29884 2023-03-05 Vineet Gupta <vineetg@rivosinc.com>
29886 * config/riscv/riscv.cc (riscv_rtx_costs): Fixed IN_RANGE() to
29889 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29890 kito-cheng <kito.cheng@sifive.com>
29892 * config/riscv/predicates.md (vector_any_register_operand): New predicate.
29893 * config/riscv/riscv-c.cc (riscv_check_builtin_call): New function.
29894 (riscv_register_pragmas): Add builtin function check call.
29895 * config/riscv/riscv-protos.h (RVV_VUNDEF): Adapt macro.
29896 (check_builtin_call): New function.
29897 * config/riscv/riscv-vector-builtins-bases.cc (class vundefined): New class.
29898 (class vreinterpret): Ditto.
29899 (class vlmul_ext): Ditto.
29900 (class vlmul_trunc): Ditto.
29901 (class vset): Ditto.
29902 (class vget): Ditto.
29904 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
29905 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Change name.
29921 (vundefined): Add new intrinsic.
29922 (vreinterpret): Ditto.
29923 (vlmul_ext): Ditto.
29924 (vlmul_trunc): Ditto.
29927 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def): New class.
29928 (struct narrow_alu_def): Ditto.
29929 (struct reduc_alu_def): Ditto.
29930 (struct vundefined_def): Ditto.
29931 (struct misc_def): Ditto.
29932 (struct vset_def): Ditto.
29933 (struct vget_def): Ditto.
29935 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
29936 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EEW8_INTERPRET_OPS): New def.
29937 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
29938 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
29939 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
29940 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
29941 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
29942 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
29943 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
29944 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
29945 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
29946 (DEF_RVV_LMUL1_OPS): Ditto.
29947 (DEF_RVV_LMUL2_OPS): Ditto.
29948 (DEF_RVV_LMUL4_OPS): Ditto.
29949 (vint16mf4_t): Ditto.
29950 (vint16mf2_t): Ditto.
29951 (vint16m1_t): Ditto.
29952 (vint16m2_t): Ditto.
29953 (vint16m4_t): Ditto.
29954 (vint16m8_t): Ditto.
29955 (vint32mf2_t): Ditto.
29956 (vint32m1_t): Ditto.
29957 (vint32m2_t): Ditto.
29958 (vint32m4_t): Ditto.
29959 (vint32m8_t): Ditto.
29960 (vint64m1_t): Ditto.
29961 (vint64m2_t): Ditto.
29962 (vint64m4_t): Ditto.
29963 (vint64m8_t): Ditto.
29964 (vuint16mf4_t): Ditto.
29965 (vuint16mf2_t): Ditto.
29966 (vuint16m1_t): Ditto.
29967 (vuint16m2_t): Ditto.
29968 (vuint16m4_t): Ditto.
29969 (vuint16m8_t): Ditto.
29970 (vuint32mf2_t): Ditto.
29971 (vuint32m1_t): Ditto.
29972 (vuint32m2_t): Ditto.
29973 (vuint32m4_t): Ditto.
29974 (vuint32m8_t): Ditto.
29975 (vuint64m1_t): Ditto.
29976 (vuint64m2_t): Ditto.
29977 (vuint64m4_t): Ditto.
29978 (vuint64m8_t): Ditto.
29979 (vint8mf4_t): Ditto.
29980 (vint8mf2_t): Ditto.
29981 (vint8m1_t): Ditto.
29982 (vint8m2_t): Ditto.
29983 (vint8m4_t): Ditto.
29984 (vint8m8_t): Ditto.
29985 (vuint8mf4_t): Ditto.
29986 (vuint8mf2_t): Ditto.
29987 (vuint8m1_t): Ditto.
29988 (vuint8m2_t): Ditto.
29989 (vuint8m4_t): Ditto.
29990 (vuint8m8_t): Ditto.
29991 (vint8mf8_t): Ditto.
29992 (vuint8mf8_t): Ditto.
29993 (vfloat32mf2_t): Ditto.
29994 (vfloat32m1_t): Ditto.
29995 (vfloat32m2_t): Ditto.
29996 (vfloat32m4_t): Ditto.
29997 (vfloat64m1_t): Ditto.
29998 (vfloat64m2_t): Ditto.
29999 (vfloat64m4_t): Ditto.
30000 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
30001 (DEF_RVV_EEW8_INTERPRET_OPS): Ditto.
30002 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
30003 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
30004 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
30005 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
30006 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
30007 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
30008 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
30009 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
30010 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
30011 (DEF_RVV_LMUL1_OPS): Ditto.
30012 (DEF_RVV_LMUL2_OPS): Ditto.
30013 (DEF_RVV_LMUL4_OPS): Ditto.
30014 (DEF_RVV_TYPE_INDEX): Ditto.
30015 (required_extensions_p): Adapt for new intrinsic support/
30016 (get_required_extensions): New function.
30017 (check_required_extensions): Ditto.
30018 (unsigned_base_type_p): Remove.
30019 (rvv_arg_type_info::get_scalar_ptr_type): New function.
30020 (get_mode_for_bitsize): Remove.
30021 (rvv_arg_type_info::get_scalar_const_ptr_type): New function.
30022 (rvv_arg_type_info::get_base_vector_type): Ditto.
30023 (rvv_arg_type_info::get_function_type_index): Ditto.
30024 (DEF_RVV_BASE_TYPE): New def.
30025 (function_builder::apply_predication): New class.
30026 (function_expander::mask_mode): Ditto.
30027 (function_checker::function_checker): Ditto.
30028 (function_checker::report_non_ice): Ditto.
30029 (function_checker::report_out_of_range): Ditto.
30030 (function_checker::require_immediate): Ditto.
30031 (function_checker::require_immediate_range): Ditto.
30032 (function_checker::check): Ditto.
30033 (check_builtin_call): Ditto.
30034 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): New def.
30035 (DEF_RVV_BASE_TYPE): Ditto.
30036 (DEF_RVV_TYPE_INDEX): Ditto.
30037 (vbool64_t): Ditto.
30038 (vbool32_t): Ditto.
30039 (vbool16_t): Ditto.
30044 (vuint8mf8_t): Ditto.
30045 (vuint8mf4_t): Ditto.
30046 (vuint8mf2_t): Ditto.
30047 (vuint8m1_t): Ditto.
30048 (vuint8m2_t): Ditto.
30049 (vint8m4_t): Ditto.
30050 (vuint8m4_t): Ditto.
30051 (vint8m8_t): Ditto.
30052 (vuint8m8_t): Ditto.
30053 (vint16mf4_t): Ditto.
30054 (vuint16mf2_t): Ditto.
30055 (vuint16m1_t): Ditto.
30056 (vuint16m2_t): Ditto.
30057 (vuint16m4_t): Ditto.
30058 (vuint16m8_t): Ditto.
30059 (vint32mf2_t): Ditto.
30060 (vuint32m1_t): Ditto.
30061 (vuint32m2_t): Ditto.
30062 (vuint32m4_t): Ditto.
30063 (vuint32m8_t): Ditto.
30064 (vuint64m1_t): Ditto.
30065 (vuint64m2_t): Ditto.
30066 (vuint64m4_t): Ditto.
30067 (vuint64m8_t): Ditto.
30068 (vfloat32mf2_t): Ditto.
30069 (vfloat32m1_t): Ditto.
30070 (vfloat32m2_t): Ditto.
30071 (vfloat32m4_t): Ditto.
30072 (vfloat32m8_t): Ditto.
30073 (vfloat64m1_t): Ditto.
30074 (vfloat64m4_t): Ditto.
30075 (vector): Move it def.
30078 (signed_vector): Ditto.
30079 (unsigned_vector): Ditto.
30080 (unsigned_scalar): Ditto.
30081 (vector_ptr): Ditto.
30082 (scalar_ptr): Ditto.
30083 (scalar_const_ptr): Ditto.
30087 (unsigned_long): Ditto.
30089 (eew8_index): Ditto.
30090 (eew16_index): Ditto.
30091 (eew32_index): Ditto.
30092 (eew64_index): Ditto.
30093 (shift_vector): Ditto.
30094 (double_trunc_vector): Ditto.
30095 (quad_trunc_vector): Ditto.
30096 (oct_trunc_vector): Ditto.
30097 (double_trunc_scalar): Ditto.
30098 (double_trunc_signed_vector): Ditto.
30099 (double_trunc_unsigned_vector): Ditto.
30100 (double_trunc_unsigned_scalar): Ditto.
30101 (double_trunc_float_vector): Ditto.
30102 (float_vector): Ditto.
30103 (lmul1_vector): Ditto.
30104 (widen_lmul1_vector): Ditto.
30105 (eew8_interpret): Ditto.
30106 (eew16_interpret): Ditto.
30107 (eew32_interpret): Ditto.
30108 (eew64_interpret): Ditto.
30109 (vlmul_ext_x2): Ditto.
30110 (vlmul_ext_x4): Ditto.
30111 (vlmul_ext_x8): Ditto.
30112 (vlmul_ext_x16): Ditto.
30113 (vlmul_ext_x32): Ditto.
30114 (vlmul_ext_x64): Ditto.
30115 * config/riscv/riscv-vector-builtins.h (DEF_RVV_BASE_TYPE): New def.
30116 (struct function_type_info): New function.
30117 (struct rvv_arg_type_info): Ditto.
30118 (class function_checker): New class.
30119 (rvv_arg_type_info::get_scalar_type): New function.
30120 (rvv_arg_type_info::get_vector_type): Ditto.
30121 (function_expander::ret_mode): New function.
30122 (function_checker::arg_mode): Ditto.
30123 (function_checker::ret_mode): Ditto.
30124 * config/riscv/t-riscv: Add generator.
30125 * config/riscv/vector-iterators.md: New iterators.
30126 * config/riscv/vector.md (vundefined<mode>): New pattern.
30127 (@vundefined<mode>): Ditto.
30128 (@vreinterpret<mode>): Ditto.
30129 (@vlmul_extx2<mode>): Ditto.
30130 (@vlmul_extx4<mode>): Ditto.
30131 (@vlmul_extx8<mode>): Ditto.
30132 (@vlmul_extx16<mode>): Ditto.
30133 (@vlmul_extx32<mode>): Ditto.
30134 (@vlmul_extx64<mode>): Ditto.
30135 (*vlmul_extx2<mode>): Ditto.
30136 (*vlmul_extx4<mode>): Ditto.
30137 (*vlmul_extx8<mode>): Ditto.
30138 (*vlmul_extx16<mode>): Ditto.
30139 (*vlmul_extx32<mode>): Ditto.
30140 (*vlmul_extx64<mode>): Ditto.
30141 * config/riscv/genrvv-type-indexer.cc: New file.
30143 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30145 * config/riscv/riscv-protos.h (enum vlen_enum): New enum.
30146 (slide1_sew64_helper): New function.
30147 * config/riscv/riscv-v.cc (compute_vlmax): Ditto.
30148 (get_unknown_min_value): Ditto.
30149 (force_vector_length_operand): Ditto.
30150 (gen_no_side_effects_vsetvl_rtx): Ditto.
30151 (get_vl_x2_rtx): Ditto.
30152 (slide1_sew64_helper): Ditto.
30153 * config/riscv/riscv-vector-builtins-bases.cc (class slideop): New class.
30154 (class vrgather): Ditto.
30155 (class vrgatherei16): Ditto.
30156 (class vcompress): Ditto.
30158 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
30159 * config/riscv/riscv-vector-builtins-functions.def (vslideup): Ditto.
30160 (vslidedown): Ditto.
30161 (vslide1up): Ditto.
30162 (vslide1down): Ditto.
30163 (vfslide1up): Ditto.
30164 (vfslide1down): Ditto.
30166 (vrgatherei16): Ditto.
30167 (vcompress): Ditto.
30168 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EI16_OPS): New macro.
30169 (vint8mf8_t): Ditto.
30170 (vint8mf4_t): Ditto.
30171 (vint8mf2_t): Ditto.
30172 (vint8m1_t): Ditto.
30173 (vint8m2_t): Ditto.
30174 (vint8m4_t): Ditto.
30175 (vint16mf4_t): Ditto.
30176 (vint16mf2_t): Ditto.
30177 (vint16m1_t): Ditto.
30178 (vint16m2_t): Ditto.
30179 (vint16m4_t): Ditto.
30180 (vint16m8_t): Ditto.
30181 (vint32mf2_t): Ditto.
30182 (vint32m1_t): Ditto.
30183 (vint32m2_t): Ditto.
30184 (vint32m4_t): Ditto.
30185 (vint32m8_t): Ditto.
30186 (vint64m1_t): Ditto.
30187 (vint64m2_t): Ditto.
30188 (vint64m4_t): Ditto.
30189 (vint64m8_t): Ditto.
30190 (vuint8mf8_t): Ditto.
30191 (vuint8mf4_t): Ditto.
30192 (vuint8mf2_t): Ditto.
30193 (vuint8m1_t): Ditto.
30194 (vuint8m2_t): Ditto.
30195 (vuint8m4_t): Ditto.
30196 (vuint16mf4_t): Ditto.
30197 (vuint16mf2_t): Ditto.
30198 (vuint16m1_t): Ditto.
30199 (vuint16m2_t): Ditto.
30200 (vuint16m4_t): Ditto.
30201 (vuint16m8_t): Ditto.
30202 (vuint32mf2_t): Ditto.
30203 (vuint32m1_t): Ditto.
30204 (vuint32m2_t): Ditto.
30205 (vuint32m4_t): Ditto.
30206 (vuint32m8_t): Ditto.
30207 (vuint64m1_t): Ditto.
30208 (vuint64m2_t): Ditto.
30209 (vuint64m4_t): Ditto.
30210 (vuint64m8_t): Ditto.
30211 (vfloat32mf2_t): Ditto.
30212 (vfloat32m1_t): Ditto.
30213 (vfloat32m2_t): Ditto.
30214 (vfloat32m4_t): Ditto.
30215 (vfloat32m8_t): Ditto.
30216 (vfloat64m1_t): Ditto.
30217 (vfloat64m2_t): Ditto.
30218 (vfloat64m4_t): Ditto.
30219 (vfloat64m8_t): Ditto.
30220 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_EI16_OPS): Ditto.
30221 * config/riscv/riscv.md: Adjust RVV instruction types.
30222 * config/riscv/vector-iterators.md (down): New iterator.
30223 (=vd,vr): New attribute.
30224 (UNSPEC_VSLIDE1UP): New unspec.
30225 * config/riscv/vector.md (@pred_slide<ud><mode>): New pattern.
30226 (*pred_slide<ud><mode>): Ditto.
30227 (*pred_slide<ud><mode>_extended): Ditto.
30228 (@pred_gather<mode>): Ditto.
30229 (@pred_gather<mode>_scalar): Ditto.
30230 (@pred_gatherei16<mode>): Ditto.
30231 (@pred_compress<mode>): Ditto.
30233 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30235 * config/riscv/riscv-vector-builtins.cc: Remove void_type_node.
30237 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30239 * config/riscv/constraints.md (Wb1): New constraint.
30240 * config/riscv/predicates.md
30241 (vector_least_significant_set_mask_operand): New predicate.
30242 (vector_broadcast_mask_operand): Ditto.
30243 * config/riscv/riscv-protos.h (enum vlmul_type): Adjust.
30244 (gen_scalar_move_mask): New function.
30245 * config/riscv/riscv-v.cc (gen_scalar_move_mask): Ditto.
30246 * config/riscv/riscv-vector-builtins-bases.cc (class vmv): New class.
30247 (class vmv_s): Ditto.
30249 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
30250 * config/riscv/riscv-vector-builtins-functions.def (vmv_x): Ditto.
30254 * config/riscv/riscv-vector-builtins-shapes.cc (struct scalar_move_def): Ditto.
30256 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
30257 * config/riscv/riscv-vector-builtins.cc (function_expander::mask_mode): Ditto.
30258 (function_expander::use_exact_insn): New function.
30259 (function_expander::use_contiguous_load_insn): New function.
30260 (function_expander::use_contiguous_store_insn): New function.
30261 (function_expander::use_ternop_insn): New function.
30262 (function_expander::use_widen_ternop_insn): New function.
30263 (function_expander::use_scalar_move_insn): New function.
30264 * config/riscv/riscv-vector-builtins.def (s): New operand suffix.
30265 * config/riscv/riscv-vector-builtins.h
30266 (function_expander::add_scalar_move_mask_operand): New class.
30267 * config/riscv/riscv-vsetvl.cc (ignore_vlmul_insn_p): New function.
30268 (scalar_move_insn_p): Ditto.
30269 (has_vsetvl_killed_avl_p): Ditto.
30270 (anticipatable_occurrence_p): Ditto.
30271 (insert_vsetvl): Ditto.
30272 (get_vl_vtype_info): Ditto.
30273 (calculate_sew): Ditto.
30274 (calculate_vlmul): Ditto.
30275 (incompatible_avl_p): Ditto.
30276 (different_sew_p): Ditto.
30277 (different_lmul_p): Ditto.
30278 (different_ratio_p): Ditto.
30279 (different_tail_policy_p): Ditto.
30280 (different_mask_policy_p): Ditto.
30281 (possible_zero_avl_p): Ditto.
30282 (first_ratio_invalid_for_second_sew_p): Ditto.
30283 (first_ratio_invalid_for_second_lmul_p): Ditto.
30284 (second_ratio_invalid_for_first_sew_p): Ditto.
30285 (second_ratio_invalid_for_first_lmul_p): Ditto.
30286 (second_sew_less_than_first_sew_p): Ditto.
30287 (first_sew_less_than_second_sew_p): Ditto.
30288 (compare_lmul): Ditto.
30289 (second_lmul_less_than_first_lmul_p): Ditto.
30290 (first_lmul_less_than_second_lmul_p): Ditto.
30291 (first_ratio_less_than_second_ratio_p): Ditto.
30292 (second_ratio_less_than_first_ratio_p): Ditto.
30293 (DEF_INCOMPATIBLE_COND): Ditto.
30294 (greatest_sew): Ditto.
30295 (first_sew): Ditto.
30296 (second_sew): Ditto.
30297 (first_vlmul): Ditto.
30298 (second_vlmul): Ditto.
30299 (first_ratio): Ditto.
30300 (second_ratio): Ditto.
30301 (vlmul_for_first_sew_second_ratio): Ditto.
30302 (ratio_for_second_sew_first_vlmul): Ditto.
30303 (DEF_SEW_LMUL_FUSE_RULE): Ditto.
30304 (always_unavailable): Ditto.
30305 (avl_unavailable_p): Ditto.
30306 (sew_unavailable_p): Ditto.
30307 (lmul_unavailable_p): Ditto.
30308 (ge_sew_unavailable_p): Ditto.
30309 (ge_sew_lmul_unavailable_p): Ditto.
30310 (ge_sew_ratio_unavailable_p): Ditto.
30311 (DEF_UNAVAILABLE_COND): Ditto.
30312 (same_sew_lmul_demand_p): Ditto.
30313 (propagate_avl_across_demands_p): Ditto.
30314 (reg_available_p): Ditto.
30315 (avl_info::has_non_zero_avl): Ditto.
30316 (vl_vtype_info::has_non_zero_avl): Ditto.
30317 (vector_insn_info::operator>=): Refactor.
30318 (vector_insn_info::parse_insn): Adjust for scalar move.
30319 (vector_insn_info::demand_vl_vtype): Remove.
30320 (vector_insn_info::compatible_p): New function.
30321 (vector_insn_info::compatible_avl_p): Ditto.
30322 (vector_insn_info::compatible_vtype_p): Ditto.
30323 (vector_insn_info::available_p): Ditto.
30324 (vector_insn_info::merge): Ditto.
30325 (vector_insn_info::fuse_avl): Ditto.
30326 (vector_insn_info::fuse_sew_lmul): Ditto.
30327 (vector_insn_info::fuse_tail_policy): Ditto.
30328 (vector_insn_info::fuse_mask_policy): Ditto.
30329 (vector_insn_info::dump): Ditto.
30330 (vector_infos_manager::release): Ditto.
30331 (pass_vsetvl::compute_local_backward_infos): Adjust for scalar move support.
30332 (pass_vsetvl::get_backward_fusion_type): Adjust for scalar move support.
30333 (pass_vsetvl::hard_empty_block_p): Ditto.
30334 (pass_vsetvl::backward_demand_fusion): Ditto.
30335 (pass_vsetvl::forward_demand_fusion): Ditto.
30336 (pass_vsetvl::refine_vsetvls): Ditto.
30337 (pass_vsetvl::cleanup_vsetvls): Ditto.
30338 (pass_vsetvl::commit_vsetvls): Ditto.
30339 (pass_vsetvl::propagate_avl): Ditto.
30340 * config/riscv/riscv-vsetvl.h (enum demand_status): New class.
30341 (struct demands_pair): Ditto.
30342 (struct demands_cond): Ditto.
30343 (struct demands_fuse_rule): Ditto.
30344 * config/riscv/vector-iterators.md: New iterator.
30345 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
30346 (*pred_broadcast<mode>): Ditto.
30347 (*pred_broadcast<mode>_extended_scalar): Ditto.
30348 (@pred_extract_first<mode>): Ditto.
30349 (*pred_extract_first<mode>): Ditto.
30350 (@pred_extract_first_trunc<mode>): Ditto.
30351 * config/riscv/riscv-vsetvl.def: New file.
30353 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
30355 * config/riscv/bitmanip.md: allow 0 constant in max/min
30358 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
30360 * config/riscv/bitmanip.md: Fix wrong index in the check.
30362 2023-03-04 Jakub Jelinek <jakub@redhat.com>
30364 PR middle-end/109006
30365 * vec.cc (test_auto_alias): Adjust comment for removal of
30367 * read-rtl-function.cc (function_reader::parse_block): Likewise.
30368 * gdbhooks.py: Likewise.
30370 2023-03-04 Jakub Jelinek <jakub@redhat.com>
30372 PR testsuite/108973
30373 * selftest-diagnostic.cc
30374 (test_diagnostic_context::test_diagnostic_context): Set
30375 caret_max_width to 80.
30377 2023-03-03 Alexandre Oliva <oliva@adacore.com>
30379 * gimple-ssa-warn-access.cc
30380 (pass_waccess::check_dangling_stores): Skip non-stores.
30382 2023-03-03 Alexandre Oliva <oliva@adacore.com>
30384 * config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank after tab
30385 after vmsr and vmrs, and lower the case of P0.
30387 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
30389 PR middle-end/109006
30390 * gdbhooks.py (VecPrinter): Handle vec<T> as well as vec<T>*.
30392 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
30394 PR middle-end/109006
30395 * gdbhooks.py (VecPrinter): Adjust for new vec layout.
30397 2023-03-03 Jakub Jelinek <jakub@redhat.com>
30400 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
30401 Return immediately if OPT_Wnonnull or OPT_Wstringop_overflow_ is
30402 suppressed on stmt. For [static %E] warning, print access_nelts
30403 rather than access_size. Fix up comment wording.
30405 2023-03-03 Robin Dapp <rdapp@linux.ibm.com>
30407 * config/s390/driver-native.cc (s390_host_detect_local_cpu): Use
30408 arch14 instead of z16.
30410 2023-03-03 Anthony Green <green@moxielogic.com>
30412 * config/moxie/moxie.cc (TARGET_LRA_P): Remove.
30414 2023-03-03 Anthony Green <green@moxielogic.com>
30416 * config/moxie/constraints.md (A, B, W): Change
30417 define_constraint to define_memory_constraint.
30419 2023-03-03 Xi Ruoyao <xry111@xry111.site>
30421 * toplev.cc (process_options): Fix the spelling of
30422 "-fstack-clash-protection".
30424 2023-03-03 Richard Biener <rguenther@suse.de>
30426 PR tree-optimization/109002
30427 * tree-ssa-pre.cc (compute_partial_antic_aux): Properly
30428 PHI-translate ANTIC_IN.
30430 2023-03-03 Jakub Jelinek <jakub@redhat.com>
30432 PR tree-optimization/108988
30433 * gimple-fold.cc (gimple_fold_builtin_fputs): Fold len to
30434 size_type_node before passing it as argument to fwrite. Formatting
30437 2023-03-03 Richard Biener <rguenther@suse.de>
30440 * config/i386/i386.opt (--param x86-stv-max-visits): New param.
30441 * doc/invoke.texi (--param x86-stv-max-visits): Document it.
30442 * config/i386/i386-features.h (scalar_chain::max_visits): New.
30443 (scalar_chain::build): Add bitmap parameter, return boolean.
30444 (scalar_chain::add_insn): Likewise.
30445 (scalar_chain::analyze_register_chain): Likewise.
30446 * config/i386/i386-features.cc (scalar_chain::scalar_chain):
30447 Initialize max_visits.
30448 (scalar_chain::analyze_register_chain): When we exhaust
30449 max_visits, abort. Also abort when running into any
30451 (scalar_chain::add_insn): Propagate abort.
30452 (scalar_chain::build): Likewise. When aborting amend
30453 the set of disallowed insn with the insns set.
30454 (convert_scalars_to_vector): Adjust. Do not convert aborted
30457 2023-03-03 Richard Biener <rguenther@suse.de>
30460 * dwarf2out.cc (dwarf2out_late_global_decl): Do not
30461 generate a DIE for a function scope static.
30463 2023-03-03 Alexandre Oliva <oliva@adacore.com>
30465 * config/vx-common.h (WINT_TYPE): Alias to "wchar_t".
30467 2023-03-02 Jakub Jelinek <jakub@redhat.com>
30470 * target.h (emit_support_tinfos_callback): New typedef.
30471 * targhooks.h (default_emit_support_tinfos): Declare.
30472 * targhooks.cc (default_emit_support_tinfos): New function.
30473 * target.def (emit_support_tinfos): New target hook.
30474 * doc/tm.texi.in (emit_support_tinfos): Document it.
30475 * doc/tm.texi: Regenerated.
30476 * config/i386/i386.cc (ix86_emit_support_tinfos): New function.
30477 (TARGET_EMIT_SUPPORT_TINFOS): Redefine.
30479 2023-03-02 Vladimir N. Makarov <vmakarov@redhat.com>
30481 * ira-costs.cc: Include print-rtl.h.
30482 (record_reg_classes, scan_one_insn): Add code to print debug info.
30483 (record_operand_costs): Find and use smaller cost for hard reg
30486 2023-03-02 Kwok Cheung Yeung <kcy@codesourcery.com>
30487 Paul-Antoine Arras <pa@codesourcery.com>
30489 * builtins.cc (mathfn_built_in_explicit): New.
30490 * config/gcn/gcn.cc: Include case-cfn-macros.h.
30491 (mathfn_built_in_explicit): Add prototype.
30492 (gcn_vectorize_builtin_vectorized_function): New.
30493 (gcn_libc_has_function): New.
30494 (TARGET_LIBC_HAS_FUNCTION): Define.
30495 (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Define.
30497 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
30499 PR tree-optimization/108979
30500 * tree-vect-stmts.cc (vectorizable_operation): Don't mask
30501 operations on invariants.
30503 2023-03-02 Robin Dapp <rdapp@linux.ibm.com>
30505 * config/s390/predicates.md (vll_bias_operand): Add -1 bias.
30506 * config/s390/s390.cc (s390_option_override_internal): Make
30507 partial vector usage the default from z13 on.
30508 * config/s390/vector.md (len_load_v16qi): Add.
30509 (len_store_v16qi): Add.
30511 2023-03-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
30513 * simplify-rtx.cc (simplify_context::simplify_subreg): Use byte instead
30514 of constant 0 offset.
30516 2023-03-02 Robert Suchanek <robert.suchanek@imgtec.com>
30518 * config/mips/mips.cc (mips_set_text_contents_type): Use HOST_WIDE_INT
30520 * config/mips/mips-protos.h (mips_set_text_contents_type): Likewise.
30522 2023-03-02 Junxian Zhu <zhujunxian@oss.cipunited.com>
30524 * config.gcc: add -with-{no-}msa build option.
30525 * config/mips/mips.h: Likewise.
30526 * doc/install.texi: Likewise.
30528 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
30530 PR tree-optimization/108603
30531 * explow.cc (convert_memory_address_addr_space_1): Only wrap
30532 the result of a recursive call in a CONST if no instructions
30535 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
30537 PR tree-optimization/108430
30538 * tree-vect-stmts.cc (vectorizable_condition): Fix handling
30539 of inverted condition.
30541 2023-03-02 Jakub Jelinek <jakub@redhat.com>
30544 * fold-const.cc (native_interpret_expr) <case REAL_CST>: Before memcmp
30545 comparison copy the bytes from ptr to a temporary buffer and clearing
30546 padding bits in there.
30548 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
30550 PR middle-end/108545
30551 * gimplify.cc (struct tree_operand_hash_no_se): New.
30552 (omp_index_mapping_groups_1, omp_index_mapping_groups,
30553 omp_reindex_mapping_groups, omp_mapped_by_containing_struct,
30554 omp_tsort_mapping_groups_1, omp_tsort_mapping_groups,
30555 oacc_resolve_clause_dependencies, omp_build_struct_sibling_lists,
30556 gimplify_scan_omp_clauses): Use tree_operand_hash_no_se instead
30557 of tree_operand_hash.
30559 2023-03-01 LIU Hao <lh_mouse@126.com>
30562 * config/i386/host-mingw32.cc (mingw32_gt_pch_get_address):
30563 Remove the size limit `pch_VA_max_size`
30565 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
30567 PR middle-end/108546
30568 * omp-low.cc (lower_omp_target): Remove optional handling
30569 on the receiver side, i.e. inside target (data), for
30572 2023-03-01 Jakub Jelinek <jakub@redhat.com>
30575 * cfgexpand.cc (expand_debug_expr): Handle WIDEN_{PLUS,MINUS}_EXPR
30576 and VEC_WIDEN_{PLUS,MINUS}_{HI,LO}_EXPR.
30578 2023-03-01 Richard Biener <rguenther@suse.de>
30580 PR tree-optimization/108970
30581 * tree-vect-loop-manip.cc (slpeel_can_duplicate_loop_p):
30582 Check we can copy the BBs.
30583 (slpeel_tree_duplicate_loop_to_edge_cfg): Avoid redundant
30585 (vect_do_peeling): Streamline error handling.
30587 2023-03-01 Richard Biener <rguenther@suse.de>
30589 PR tree-optimization/108950
30590 * tree-vect-patterns.cc (vect_recog_widen_sum_pattern):
30591 Check oprnd0 is defined in the loop.
30592 * tree-vect-loop.cc (vectorizable_reduction): Record all
30593 operands vector types, compute that of invariants and
30594 properly update their SLP nodes.
30596 2023-03-01 Kewen Lin <linkw@linux.ibm.com>
30599 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Allow
30600 implicit powerpc64 setting to be unset if 64 bit is enabled implicitly.
30602 2023-02-28 Qing Zhao <qing.zhao@oracle.com>
30604 PR middle-end/107411
30605 PR middle-end/107411
30606 * gimplify.cc (gimple_add_init_for_auto_var): Use sprintf to replace
30608 * tree-ssa-uninit.cc (warn_uninit): Handle the case when the
30609 LHS varaible of a .DEFERRED_INIT call doesn't have a DECL_NAME.
30611 2023-02-28 Jakub Jelinek <jakub@redhat.com>
30613 PR sanitizer/108894
30614 * ubsan.cc (ubsan_expand_bounds_ifn): Emit index >= bound
30615 comparison rather than index > bound.
30616 * gimple-fold.cc (gimple_fold_call): Use tree_int_cst_lt
30617 rather than tree_int_cst_le for IFN_UBSAN_BOUND comparison.
30618 * doc/invoke.texi (-fsanitize=bounds): Document that whether
30619 flexible array member-like arrays are instrumented or not depends
30620 on -fstrict-flex-arrays* options of strict_flex_array attributes.
30621 (-fsanitize=bounds-strict): Document that flexible array members
30622 are not instrumented.
30624 2023-02-27 Uroš Bizjak <ubizjak@gmail.com>
30628 * config/i386/i386.md (fmodxf3): Enable for flag_finite_math_only only.
30629 (fmod<mode>3): Ditto.
30630 (fpremxf4_i387): Ditto.
30631 (reminderxf3): Ditto.
30632 (reminder<mode>3): Ditto.
30633 (fprem1xf4_i387): Ditto.
30635 2023-02-27 Roger Sayle <roger@nextmovesoftware.com>
30637 * simplify-rtx.cc (simplify_unary_operation_1) <case FFS>: Avoid
30638 generating FFS with mismatched operand and result modes, by using
30639 an explicit SIGN_EXTEND/ZERO_EXTEND.
30640 <case POPCOUNT>: Likewise, for POPCOUNT of ZERO_EXTEND.
30641 <case PARITY>: Likewise, for PARITY of {ZERO,SIGN}_EXTEND.
30643 2023-02-27 Patrick Palka <ppalka@redhat.com>
30645 * hash-table.h (gt_pch_nx(hash_table<D>)): Remove static.
30646 * lra-int.h (lra_change_class): Likewise.
30647 * recog.h (which_op_alt): Likewise.
30648 * sel-sched-ir.h (sel_bb_empty_or_nop_p): Declare inline
30651 2023-02-27 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
30653 * config/xtensa/xtensa-protos.h (xtensa_match_CLAMPS_imms_p):
30655 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
30657 * config/xtensa/xtensa.h (TARGET_CLAMPS): New macro definition.
30658 * config/xtensa/xtensa.md (*xtensa_clamps): New insn pattern.
30660 2023-02-27 Max Filippov <jcmvbkbc@gmail.com>
30662 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v2)
30663 (xtensa_get_config_v3): New functions.
30665 2023-02-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30667 * config/aarch64/aarch64-simd.md (aarch64_abs<mode>): Fix typo in comment.
30669 2023-02-27 Lulu Cheng <chenglulu@loongson.cn>
30671 * config/host-linux.cc (TRY_EMPTY_VM_SPACE): Modify the value of
30672 the macro to 0x1000000000.
30674 2023-02-25 Gaius Mulley <gaiusmod2@gmail.com>
30677 * doc/gm2.texi (-fm2-pathname): New option documented.
30678 (-fm2-pathnameI): New option documented.
30679 (-fm2-prefix=): New option documented.
30680 (-fruntime-modules=): Update default module list.
30682 2023-02-25 Max Filippov <jcmvbkbc@gmail.com>
30685 * config/xtensa/xtensa-protos.h
30686 (xtensa_prepare_expand_call): Rename to xtensa_expand_call.
30687 * config/xtensa/xtensa.cc (xtensa_prepare_expand_call): Rename
30688 to xtensa_expand_call.
30689 (xtensa_expand_call): Emit the call and add a clobber expression
30690 for the static chain to it in case of windowed ABI.
30691 * config/xtensa/xtensa.md (call, call_value, sibcall)
30692 (sibcall_value): Call xtensa_expand_call and complete expansion
30693 right after that call.
30695 2023-02-24 Richard Biener <rguenther@suse.de>
30697 * vec.h (vec<T, A, vl_embed>::m_vecdata): Remove.
30698 (vec<T, A, vl_embed>::m_vecpfx): Align as T to avoid
30699 changing alignment of vec<T, A, vl_embed> and simplifying
30701 (vec<T, A, vl_embed>::address): Compute as this + 1.
30702 (vec<T, A, vl_embed>::embedded_size): Use sizeof the
30703 vector instead of the offset of the m_vecdata member.
30704 (auto_vec<T, N>::m_data): Turn storage into
30705 uninitialized unsigned char.
30706 (auto_vec<T, N>::auto_vec): Allow allocation of one
30707 stack member. Initialize m_vec in a special way to
30708 avoid later stringop overflow diagnostics.
30709 * vec.cc (test_auto_alias): New.
30710 (vec_cc_tests): Call it.
30712 2023-02-24 Richard Biener <rguenther@suse.de>
30714 * vec.h (vec<T, A, vl_embed>::lower_bound): Adjust to
30715 take a const reference to the object, use address to
30717 (vec<T, A, vl_embed>::contains): Use address to access data.
30718 (vec<T, A, vl_embed>::operator[]): Use address instead of
30719 m_vecdata to access data.
30720 (vec<T, A, vl_embed>::iterate): Likewise.
30721 (vec<T, A, vl_embed>::copy): Likewise.
30722 (vec<T, A, vl_embed>::quick_push): Likewise.
30723 (vec<T, A, vl_embed>::pop): Likewise.
30724 (vec<T, A, vl_embed>::quick_insert): Likewise.
30725 (vec<T, A, vl_embed>::ordered_remove): Likewise.
30726 (vec<T, A, vl_embed>::unordered_remove): Likewise.
30727 (vec<T, A, vl_embed>::block_remove): Likewise.
30728 (vec<T, A, vl_heap>::address): Likewise.
30730 2023-02-24 Martin Liska <mliska@suse.cz>
30732 PR sanitizer/108834
30733 * asan.cc (asan_add_global): Use proper TU name for normal
30734 global variables (and aux_base_name for the artificial one).
30736 2023-02-24 Jakub Jelinek <jakub@redhat.com>
30738 * config/i386/i386-builtin.def: Update description of BDESC
30739 and BDESC_FIRST in file comment to include mask2.
30741 2023-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30743 * config/aarch64/aarch64-cores.def (FLAGS): Update comment.
30745 2023-02-24 Jakub Jelinek <jakub@redhat.com>
30747 PR middle-end/108854
30748 * cgraphclones.cc (duplicate_thunk_for_node): If no parameter
30749 changes are needed, copy at least DECL_ARGUMENTS PARM_DECL
30750 nodes and adjust their DECL_CONTEXT.
30752 2023-02-24 Jakub Jelinek <jakub@redhat.com>
30755 * config/i386/i386-builtin.def (__builtin_ia32_cvtne2ps2bf16_v16bf,
30756 __builtin_ia32_cvtne2ps2bf16_v16bf_mask,
30757 __builtin_ia32_cvtne2ps2bf16_v16bf_maskz,
30758 __builtin_ia32_cvtne2ps2bf16_v8bf,
30759 __builtin_ia32_cvtne2ps2bf16_v8bf_mask,
30760 __builtin_ia32_cvtne2ps2bf16_v8bf_maskz,
30761 __builtin_ia32_cvtneps2bf16_v8sf_mask,
30762 __builtin_ia32_cvtneps2bf16_v8sf_maskz,
30763 __builtin_ia32_cvtneps2bf16_v4sf_mask,
30764 __builtin_ia32_cvtneps2bf16_v4sf_maskz,
30765 __builtin_ia32_dpbf16ps_v8sf, __builtin_ia32_dpbf16ps_v8sf_mask,
30766 __builtin_ia32_dpbf16ps_v8sf_maskz, __builtin_ia32_dpbf16ps_v4sf,
30767 __builtin_ia32_dpbf16ps_v4sf_mask,
30768 __builtin_ia32_dpbf16ps_v4sf_maskz): Require also
30769 OPTION_MASK_ISA_AVX512VL.
30771 2023-02-24 Sebastian Huber <sebastian.huber@embedded-brains.de>
30773 * config/riscv/t-rtems: Keep only -mcmodel=medany 64-bit multilibs.
30774 Add non-compact 32-bit multilibs.
30776 2023-02-24 Junxian Zhu <zhujunxian@oss.cipunited.com>
30778 * config/mips/mips.md (*clo<mode>2): New pattern.
30780 2023-02-24 Prachi Godbole <prachi.godbole@imgtec.com>
30782 * config/mips/mips.h (machine_function): New variable
30783 use_hazard_barrier_return_p.
30784 * config/mips/mips.md (UNSPEC_JRHB): New unspec.
30785 (mips_hb_return_internal): New insn pattern.
30786 * config/mips/mips.cc (mips_attribute_table): Add attribute
30787 use_hazard_barrier_return.
30788 (mips_use_hazard_barrier_return_p): New static function.
30789 (mips_function_attr_inlinable_p): Likewise.
30790 (mips_compute_frame_info): Set use_hazard_barrier_return_p.
30791 Emit error for unsupported architecture choice.
30792 (mips_function_ok_for_sibcall, mips_can_use_return_insn):
30793 Return false for use_hazard_barrier_return.
30794 (mips_expand_epilogue): Emit hazard barrier return.
30795 * doc/extend.texi: Document use_hazard_barrier_return.
30797 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
30799 * config/xtensa/xtensa-dynconfig.cc (config.h, system.h)
30800 (coretypes.h, diagnostic.h, intl.h): Use "..." instead of <...>
30801 for the gcc-internal headers.
30803 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
30805 * config/xtensa/t-xtensa (xtensa-dynconfig.o): Use $(COMPILE)
30806 and $(POSTCOMPILE) instead of manual dependency listing.
30807 * config/xtensa/xtensa-dynconfig.c: Rename to ...
30808 * config/xtensa/xtensa-dynconfig.cc: ... this.
30810 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
30812 * doc/cfg.texi: Reorder index entries around @items.
30813 * doc/cpp.texi: Ditto.
30814 * doc/cppenv.texi: Ditto.
30815 * doc/cppopts.texi: Ditto.
30816 * doc/generic.texi: Ditto.
30817 * doc/install.texi: Ditto.
30818 * doc/extend.texi: Ditto.
30819 * doc/invoke.texi: Ditto.
30820 * doc/md.texi: Ditto.
30821 * doc/rtl.texi: Ditto.
30822 * doc/tm.texi.in: Ditto.
30823 * doc/trouble.texi: Ditto.
30824 * doc/tm.texi: Regenerate.
30826 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
30828 * config/xtensa/xtensa.md: New peephole2 pattern that eliminates
30829 the occurrence of general-purpose register used only once and for
30830 transferring intermediate value.
30832 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
30834 * config/xtensa/xtensa.cc (machine_function): Add new member
30835 'eliminated_callee_saved_bmp'.
30836 (xtensa_can_eliminate_callee_saved_reg_p): New function to
30837 determine whether the register can be eliminated or not.
30838 (xtensa_expand_prologue): Add invoking the above function and
30839 elimination the use of callee-saved register by using its stack
30840 slot through the stack pointer (or the frame pointer if needed)
30842 (xtensa_expand_prologue): Modify to not emit register restoration
30843 insn from its stack slot if the register is already eliminated.
30845 2023-02-23 Jakub Jelinek <jakub@redhat.com>
30847 PR translation/108890
30848 * config/xtensa/xtensa-dynconfig.c (xtensa_load_config): Drop _()s
30849 around fatal_error format strings.
30851 2023-02-23 Richard Biener <rguenther@suse.de>
30853 * tree-ssa-structalias.cc (handle_lhs_call): Do not
30854 re-create rhsc, only truncate it.
30856 2023-02-23 Jakub Jelinek <jakub@redhat.com>
30858 PR middle-end/106258
30859 * ipa-prop.cc (try_make_edge_direct_virtual_call): Handle
30860 BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
30862 2023-02-23 Richard Biener <rguenther@suse.de>
30864 * tree-if-conv.cc (tree_if_conversion): Properly manage
30865 memory of refs and the contained data references.
30867 2023-02-23 Richard Biener <rguenther@suse.de>
30869 PR tree-optimization/108888
30870 * tree-if-conv.cc (if_convertible_stmt_p): Set PLF_2 on
30871 calls to predicate.
30872 (predicate_statements): Only predicate calls with PLF_2.
30874 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
30876 * config/xtensa/xtensa.md
30877 (zero_cost_loop_start, zero_cost_loop_end, loop_end):
30878 Add missing "SI:" to PLUS RTXes.
30880 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
30883 * config/xtensa/xtensa.cc (xtensa_expand_epilogue):
30884 Emit (use (reg:SI A0_REG)) at the end in the sibling call
30885 (i.e. the same place as (return) in the normal call).
30887 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
30890 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
30893 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
30895 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
30896 (sibcall_value, sibcall_value_internal): Add 'use' expression
30899 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
30901 * doc/cppdiropts.texi: Reorder @opindex commands to precede
30902 @items they relate to.
30903 * doc/cppopts.texi: Ditto.
30904 * doc/cppwarnopts.texi: Ditto.
30905 * doc/invoke.texi: Ditto.
30906 * doc/lto.texi: Ditto.
30908 2023-02-22 Andrew Stubbs <ams@codesourcery.com>
30910 * internal-fn.cc (expand_MASK_CALL): New.
30911 * internal-fn.def (MASK_CALL): New.
30912 * internal-fn.h (expand_MASK_CALL): New prototype.
30913 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Set vector_type
30914 for mask arguments also.
30915 * tree-if-conv.cc: Include cgraph.h.
30916 (if_convertible_stmt_p): Do if conversions for calls to SIMD calls.
30917 (predicate_statements): Convert functions to IFN_MASK_CALL.
30918 * tree-vect-loop.cc (vect_get_datarefs_in_loop): Recognise
30919 IFN_MASK_CALL as a SIMD function call.
30920 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
30921 IFN_MASK_CALL as an inbranch SIMD function call.
30922 Generate the mask vector arguments.
30924 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30926 * config/riscv/riscv-vector-builtins-bases.cc (class reducop): New class.
30927 (class widen_reducop): Ditto.
30928 (class freducop): Ditto.
30929 (class widen_freducop): Ditto.
30931 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
30932 * config/riscv/riscv-vector-builtins-functions.def (vredsum): Add reduction support.
30941 (vwredsumu): Ditto.
30942 (vfredusum): Ditto.
30943 (vfredosum): Ditto.
30946 (vfwredosum): Ditto.
30947 (vfwredusum): Ditto.
30948 * config/riscv/riscv-vector-builtins-shapes.cc (struct reduc_alu_def): Ditto.
30950 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
30951 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WI_OPS): New macro.
30952 (DEF_RVV_WU_OPS): Ditto.
30953 (DEF_RVV_WF_OPS): Ditto.
30954 (vint8mf8_t): Ditto.
30955 (vint8mf4_t): Ditto.
30956 (vint8mf2_t): Ditto.
30957 (vint8m1_t): Ditto.
30958 (vint8m2_t): Ditto.
30959 (vint8m4_t): Ditto.
30960 (vint8m8_t): Ditto.
30961 (vint16mf4_t): Ditto.
30962 (vint16mf2_t): Ditto.
30963 (vint16m1_t): Ditto.
30964 (vint16m2_t): Ditto.
30965 (vint16m4_t): Ditto.
30966 (vint16m8_t): Ditto.
30967 (vint32mf2_t): Ditto.
30968 (vint32m1_t): Ditto.
30969 (vint32m2_t): Ditto.
30970 (vint32m4_t): Ditto.
30971 (vint32m8_t): Ditto.
30972 (vuint8mf8_t): Ditto.
30973 (vuint8mf4_t): Ditto.
30974 (vuint8mf2_t): Ditto.
30975 (vuint8m1_t): Ditto.
30976 (vuint8m2_t): Ditto.
30977 (vuint8m4_t): Ditto.
30978 (vuint8m8_t): Ditto.
30979 (vuint16mf4_t): Ditto.
30980 (vuint16mf2_t): Ditto.
30981 (vuint16m1_t): Ditto.
30982 (vuint16m2_t): Ditto.
30983 (vuint16m4_t): Ditto.
30984 (vuint16m8_t): Ditto.
30985 (vuint32mf2_t): Ditto.
30986 (vuint32m1_t): Ditto.
30987 (vuint32m2_t): Ditto.
30988 (vuint32m4_t): Ditto.
30989 (vuint32m8_t): Ditto.
30990 (vfloat32mf2_t): Ditto.
30991 (vfloat32m1_t): Ditto.
30992 (vfloat32m2_t): Ditto.
30993 (vfloat32m4_t): Ditto.
30994 (vfloat32m8_t): Ditto.
30995 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WI_OPS): Ditto.
30996 (DEF_RVV_WU_OPS): Ditto.
30997 (DEF_RVV_WF_OPS): Ditto.
30998 (required_extensions_p): Add reduction support.
30999 (rvv_arg_type_info::get_base_vector_type): Ditto.
31000 (rvv_arg_type_info::get_tree_type): Ditto.
31001 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
31002 * config/riscv/riscv.md: Ditto.
31003 * config/riscv/vector-iterators.md (minu): Ditto.
31004 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): New patern.
31005 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
31006 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Ditto.
31007 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>):Ditto.
31008 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
31009 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
31010 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
31012 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31014 * config/riscv/iterators.md: New iterator.
31015 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New class.
31016 (enum ternop_type): New enum.
31017 (class vmacc): New class.
31018 (class imac): Ditto.
31019 (class vnmsac): Ditto.
31020 (enum widen_ternop_type): New enum.
31021 (class vmadd): Ditto.
31022 (class vnmsub): Ditto.
31023 (class iwmac): Ditto.
31024 (class vwmacc): Ditto.
31025 (class vwmaccu): Ditto.
31026 (class vwmaccsu): Ditto.
31027 (class vwmaccus): Ditto.
31028 (class reverse_binop): Ditto.
31029 (class vfmacc): Ditto.
31030 (class vfnmsac): Ditto.
31031 (class vfmadd): Ditto.
31032 (class vfnmsub): Ditto.
31033 (class vfnmacc): Ditto.
31034 (class vfmsac): Ditto.
31035 (class vfnmadd): Ditto.
31036 (class vfmsub): Ditto.
31037 (class vfwmacc): Ditto.
31038 (class vfwnmacc): Ditto.
31039 (class vfwmsac): Ditto.
31040 (class vfwnmsac): Ditto.
31041 (class float_misc): Ditto.
31042 (class fcmp): Ditto.
31043 (class vfclass): Ditto.
31044 (class vfcvt_x): Ditto.
31045 (class vfcvt_rtz_x): Ditto.
31046 (class vfcvt_f): Ditto.
31047 (class vfwcvt_x): Ditto.
31048 (class vfwcvt_rtz_x): Ditto.
31049 (class vfwcvt_f): Ditto.
31050 (class vfncvt_x): Ditto.
31051 (class vfncvt_rtz_x): Ditto.
31052 (class vfncvt_f): Ditto.
31053 (class vfncvt_rod_f): Ditto.
31055 * config/riscv/riscv-vector-builtins-bases.h:
31056 * config/riscv/riscv-vector-builtins-functions.def (vzext): Ditto.
31100 (vfcvt_rtz_x): Ditto.
31101 (vfcvt_rtz_xu): Ditto.
31104 (vfwcvt_xu): Ditto.
31105 (vfwcvt_rtz_x): Ditto.
31106 (vfwcvt_rtz_xu): Ditto.
31109 (vfncvt_xu): Ditto.
31110 (vfncvt_rtz_x): Ditto.
31111 (vfncvt_rtz_xu): Ditto.
31113 (vfncvt_rod_f): Ditto.
31114 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
31115 (struct move_def): Ditto.
31116 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTF_OPS): New macro.
31117 (DEF_RVV_CONVERT_I_OPS): Ditto.
31118 (DEF_RVV_CONVERT_U_OPS): Ditto.
31119 (DEF_RVV_WCONVERT_I_OPS): Ditto.
31120 (DEF_RVV_WCONVERT_U_OPS): Ditto.
31121 (DEF_RVV_WCONVERT_F_OPS): Ditto.
31122 (vfloat64m1_t): Ditto.
31123 (vfloat64m2_t): Ditto.
31124 (vfloat64m4_t): Ditto.
31125 (vfloat64m8_t): Ditto.
31126 (vint32mf2_t): Ditto.
31127 (vint32m1_t): Ditto.
31128 (vint32m2_t): Ditto.
31129 (vint32m4_t): Ditto.
31130 (vint32m8_t): Ditto.
31131 (vint64m1_t): Ditto.
31132 (vint64m2_t): Ditto.
31133 (vint64m4_t): Ditto.
31134 (vint64m8_t): Ditto.
31135 (vuint32mf2_t): Ditto.
31136 (vuint32m1_t): Ditto.
31137 (vuint32m2_t): Ditto.
31138 (vuint32m4_t): Ditto.
31139 (vuint32m8_t): Ditto.
31140 (vuint64m1_t): Ditto.
31141 (vuint64m2_t): Ditto.
31142 (vuint64m4_t): Ditto.
31143 (vuint64m8_t): Ditto.
31144 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CONVERT_I_OPS): Ditto.
31145 (DEF_RVV_CONVERT_U_OPS): Ditto.
31146 (DEF_RVV_WCONVERT_I_OPS): Ditto.
31147 (DEF_RVV_WCONVERT_U_OPS): Ditto.
31148 (DEF_RVV_WCONVERT_F_OPS): Ditto.
31149 (DEF_RVV_F_OPS): Ditto.
31150 (DEF_RVV_WEXTF_OPS): Ditto.
31151 (required_extensions_p): Adjust for floating-point support.
31152 (check_required_extensions): Ditto.
31153 (unsigned_base_type_p): Ditto.
31154 (get_mode_for_bitsize): Ditto.
31155 (rvv_arg_type_info::get_base_vector_type): Ditto.
31156 (rvv_arg_type_info::get_tree_type): Ditto.
31157 * config/riscv/riscv-vector-builtins.def (v_f): New define.
31160 (xu_v): New define.
31162 (xu_w): New define.
31163 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): New enum.
31164 (function_expander::arg_mode): New function.
31165 * config/riscv/vector-iterators.md (sof): New iterator.
31171 (fixuns_trunc): Ditto.
31173 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
31174 (@pred_<optab><mode>): Ditto.
31175 (@pred_<optab><mode>_scalar): Ditto.
31176 (@pred_<optab><mode>_reverse_scalar): Ditto.
31177 (@pred_<copysign><mode>): Ditto.
31178 (@pred_<copysign><mode>_scalar): Ditto.
31179 (@pred_mul_<optab><mode>): Ditto.
31180 (pred_mul_<optab><mode>_undef_merge): Ditto.
31181 (*pred_<madd_nmsub><mode>): Ditto.
31182 (*pred_<macc_nmsac><mode>): Ditto.
31183 (*pred_mul_<optab><mode>): Ditto.
31184 (@pred_mul_<optab><mode>_scalar): Ditto.
31185 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
31186 (*pred_<madd_nmsub><mode>_scalar): Ditto.
31187 (*pred_<macc_nmsac><mode>_scalar): Ditto.
31188 (*pred_mul_<optab><mode>_scalar): Ditto.
31189 (@pred_neg_mul_<optab><mode>): Ditto.
31190 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
31191 (*pred_<nmadd_msub><mode>): Ditto.
31192 (*pred_<nmacc_msac><mode>): Ditto.
31193 (*pred_neg_mul_<optab><mode>): Ditto.
31194 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
31195 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
31196 (*pred_<nmadd_msub><mode>_scalar): Ditto.
31197 (*pred_<nmacc_msac><mode>_scalar): Ditto.
31198 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
31199 (@pred_<misc_op><mode>): Ditto.
31200 (@pred_class<mode>): Ditto.
31201 (@pred_dual_widen_<optab><mode>): Ditto.
31202 (@pred_dual_widen_<optab><mode>_scalar): Ditto.
31203 (@pred_single_widen_<plus_minus:optab><mode>): Ditto.
31204 (@pred_single_widen_<plus_minus:optab><mode>_scalar): Ditto.
31205 (@pred_widen_mul_<optab><mode>): Ditto.
31206 (@pred_widen_mul_<optab><mode>_scalar): Ditto.
31207 (@pred_widen_neg_mul_<optab><mode>): Ditto.
31208 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
31209 (@pred_cmp<mode>): Ditto.
31210 (*pred_cmp<mode>): Ditto.
31211 (*pred_cmp<mode>_narrow): Ditto.
31212 (@pred_cmp<mode>_scalar): Ditto.
31213 (*pred_cmp<mode>_scalar): Ditto.
31214 (*pred_cmp<mode>_scalar_narrow): Ditto.
31215 (@pred_eqne<mode>_scalar): Ditto.
31216 (*pred_eqne<mode>_scalar): Ditto.
31217 (*pred_eqne<mode>_scalar_narrow): Ditto.
31218 (@pred_merge<mode>_scalar): Ditto.
31219 (@pred_fcvt_x<v_su>_f<mode>): Ditto.
31220 (@pred_<fix_cvt><mode>): Ditto.
31221 (@pred_<float_cvt><mode>): Ditto.
31222 (@pred_widen_fcvt_x<v_su>_f<mode>): Ditto.
31223 (@pred_widen_<fix_cvt><mode>): Ditto.
31224 (@pred_widen_<float_cvt><mode>): Ditto.
31225 (@pred_extend<mode>): Ditto.
31226 (@pred_narrow_fcvt_x<v_su>_f<mode>): Ditto.
31227 (@pred_narrow_<fix_cvt><mode>): Ditto.
31228 (@pred_narrow_<float_cvt><mode>): Ditto.
31229 (@pred_trunc<mode>): Ditto.
31230 (@pred_rod_trunc<mode>): Ditto.
31232 2023-02-22 Jakub Jelinek <jakub@redhat.com>
31234 PR middle-end/106258
31235 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
31236 cgraph_update_edges_for_call_stmt_node, cgraph_node::verify_node):
31237 Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
31238 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
31240 2023-02-22 Thomas Schwinge <thomas@codesourcery.com>
31242 * common.opt (-Wcomplain-wrong-lang): New.
31243 * doc/invoke.texi (-Wno-complain-wrong-lang): Document it.
31244 * opts-common.cc (prune_options): Handle it.
31245 * opts-global.cc (complain_wrong_lang): Use it.
31247 2023-02-21 David Malcolm <dmalcolm@redhat.com>
31250 * doc/invoke.texi: Document -fno-analyzer-suppress-followups.
31252 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
31255 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
31257 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
31258 (sibcall_value, sibcall_value_internal): Add 'use' expression
31261 2023-02-21 Richard Biener <rguenther@suse.de>
31263 PR tree-optimization/108691
31264 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Remove
31265 assert about calls_setjmp not becoming true when it was false.
31267 2023-02-21 Richard Biener <rguenther@suse.de>
31269 PR tree-optimization/108793
31270 * tree-ssa-loop-niter.cc (number_of_iterations_until_wrap):
31271 Use convert operands to niter_type when computing num.
31273 2023-02-21 Richard Biener <rguenther@suse.de>
31276 2023-02-13 Richard Biener <rguenther@suse.de>
31278 PR tree-optimization/108691
31279 * tree-cfg.cc (notice_special_calls): When the CFG is built
31280 honor gimple_call_ctrl_altering_p.
31281 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
31282 temporarily if the call is not control-altering.
31283 * calls.cc (emit_call_1): Do not add REG_SETJMP if
31284 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
31286 2023-02-21 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
31288 * config/xtensa/xtensa.cc (xtensa_call_save_reg): Change to return
31289 true if register A0 (return address register) when -Og is specified.
31291 2023-02-20 Uroš Bizjak <ubizjak@gmail.com>
31293 * config/i386/predicates.md
31294 (general_x64constmem_operand): New predicate.
31295 * config/i386/i386.md (*cmpqi_ext<mode>_1):
31296 Use nonimm_x64constmem_operand.
31297 (*cmpqi_ext<mode>_3): Use general_x64constmem_operand.
31298 (*addqi_ext<mode>_1): Ditto.
31299 (*testqi_ext<mode>_1): Ditto.
31300 (*andqi_ext<mode>_1): Ditto.
31301 (*andqi_ext<mode>_1_cc): Ditto.
31302 (*<any_or:code>qi_ext<mode>_1): Ditto.
31303 (*xorqi_ext<mode>_1_cc): Ditto.
31305 2023-02-20 Jakub Jelinek <jakub2redhat.com>
31308 * config/rs6000/rs6000.md (umaddditi4): Swap gen_maddlddi4 with
31309 gen_umadddi4_highpart{,_le}.
31311 2023-02-20 Kito Cheng <kito.cheng@sifive.com>
31313 * config/riscv/riscv.md (prefetch): Use r instead of p for the
31315 (riscv_prefetchi_<mode>): Ditto.
31317 2023-02-20 Richard Biener <rguenther@suse.de>
31319 PR tree-optimization/108816
31320 * tree-vect-loop-manip.cc (vect_loop_versioning): Adjust
31321 versioning condition split prerequesite, assert required
31324 2023-02-20 Richard Biener <rguenther@suse.de>
31326 PR tree-optimization/108825
31327 * tree-ssa-loop-manip.cc (verify_loop_closed_ssa): For
31328 loop-local verfication only verify there's no pending SSA
31331 2023-02-20 Richard Biener <rguenther@suse.de>
31333 PR tree-optimization/108819
31334 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): Check
31335 we have an SSA name as iv_2 as expected.
31337 2023-02-18 Jakub Jelinek <jakub@redhat.com>
31339 PR tree-optimization/108819
31340 * tree-ssa-reassoc.cc (update_ops): Fold new stmt in place.
31342 2023-02-18 Jakub Jelinek <jakub@redhat.com>
31345 * config/i386/i386-protos.h (ix86_replace_reg_with_reg): Declare.
31346 * config/i386/i386-expand.cc (ix86_replace_reg_with_reg): New
31348 * config/i386/i386.md: Replace replace_rtx calls in all peephole2s
31349 with ix86_replace_reg_with_reg.
31351 2023-02-18 Gerald Pfeifer <gerald@pfeifer.com>
31353 * doc/invoke.texi (AVR Options): Update link to AVR-LibC.
31355 2023-02-18 Xi Ruoyao <xry111@xry111.site>
31357 * config.gcc (triplet_abi): Set its value based on $with_abi,
31358 instead of $target.
31359 (la_canonical_triplet): Set it after $triplet_abi is set
31361 * config/loongarch/t-linux (MULTILIB_OSDIRNAMES): Make the
31362 multiarch tuple for lp64d "loongarch64-linux-gnu" (without
31365 2023-02-18 Andrew Pinski <apinski@marvell.com>
31367 * match.pd: Remove #if GIMPLE around the
31370 2023-02-18 Andrew Pinski <apinski@marvell.com>
31372 * value-query.h (get_range_query): Return the global ranges
31373 for a nullptr func.
31375 2023-02-17 Siddhesh Poyarekar <siddhesh@gotplt.org>
31377 * doc/invoke.texi (@item -Wall): Fix typo in
31380 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
31383 * config/i386/predicates.md
31384 (nonimm_x64constmem_operand): New predicate.
31385 * config/i386/i386.md (*addqi_ext<mode>_0): New insn pattern.
31386 (*subqi_ext<mode>_0): Ditto.
31387 (*andqi_ext<mode>_0): Ditto.
31388 (*<any_or:code>qi_ext<mode>_0): Ditto.
31390 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
31393 * simplify-rtx.cc (simplify_context::simplify_subreg): Use
31394 int_outermode instead of GET_MODE (tem) to prevent
31395 VOIDmode from entering simplify_gen_subreg.
31397 2023-02-17 Richard Biener <rguenther@suse.de>
31399 PR tree-optimization/108821
31400 * tree-ssa-loop-im.cc (sm_seq_valid_bb): We can also not
31401 move volatile accesses.
31403 2023-02-17 Richard Biener <rguenther@suse.de>
31405 * tree-ssa.cc (ssa_undefined_value_p): Assert we are not
31406 called on virtual operands.
31407 * tree-ssa-sccvn.cc (vn_phi_lookup): Guard
31408 ssa_undefined_value_p calls.
31409 (vn_phi_insert): Likewise.
31410 (set_ssa_val_to): Likewise.
31411 (visit_phi): Avoid extra work with equivalences for
31412 virtual operand PHIs.
31414 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31416 * config/riscv/riscv-vector-builtins-bases.cc (class mask_logic): New
31418 (class mask_nlogic): Ditto.
31419 (class mask_notlogic): Ditto.
31420 (class vmmv): Ditto.
31421 (class vmclr): Ditto.
31422 (class vmset): Ditto.
31423 (class vmnot): Ditto.
31424 (class vcpop): Ditto.
31425 (class vfirst): Ditto.
31426 (class mask_misc): Ditto.
31427 (class viota): Ditto.
31428 (class vid): Ditto.
31430 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
31431 * config/riscv/riscv-vector-builtins-functions.def (vmand): Ditto.
31450 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
31451 (struct mask_alu_def): Ditto.
31453 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
31454 * config/riscv/riscv-vector-builtins.cc: Ditto.
31455 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns): Fix bug
31456 for dest it scalar RVV intrinsics.
31457 * config/riscv/vector-iterators.md (sof): New iterator.
31458 * config/riscv/vector.md (@pred_<optab>n<mode>): New pattern.
31459 (@pred_<optab>not<mode>): New pattern.
31460 (@pred_popcount<VB:mode><P:mode>): New pattern.
31461 (@pred_ffs<VB:mode><P:mode>): New pattern.
31462 (@pred_<misc_op><mode>): New pattern.
31463 (@pred_iota<mode>): New pattern.
31464 (@pred_series<mode>): New pattern.
31466 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31468 * config/riscv/riscv-vector-builtins-functions.def (vadc): Rename.
31472 * config/riscv/riscv-vector-builtins.cc: Ditto.
31474 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31475 kito-cheng <kito.cheng@sifive.com>
31477 * config/riscv/riscv-protos.h (sew64_scalar_helper): New function.
31478 * config/riscv/riscv-v.cc (has_vi_variant_p): Adjust.
31479 (sew64_scalar_helper): New function.
31480 * config/riscv/vector.md: Normalization.
31482 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31484 * config/riscv/riscv-vector-builtins-functions.def (vsetvlmax): Rearrange.
31546 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31548 * config/riscv/vector.md (@pred_<optab><mode>): Rearrange.
31549 (@pred_<optab><mode>_scalar): Ditto.
31550 (*pred_<optab><mode>_scalar): Ditto.
31551 (*pred_<optab><mode>_extended_scalar): Ditto.
31553 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31555 * config/riscv/riscv-protos.h (riscv_run_selftests): Remove 'extern'.
31556 (init_builtins): Ditto.
31557 (mangle_builtin_type): Ditto.
31558 (verify_type_context): Ditto.
31559 (handle_pragma_vector): Ditto.
31560 (builtin_decl): Ditto.
31561 (expand_builtin): Ditto.
31562 (const_vec_all_same_in_range_p): Ditto.
31563 (legitimize_move): Ditto.
31564 (emit_vlmax_op): Ditto.
31565 (emit_nonvlmax_op): Ditto.
31566 (get_vlmul): Ditto.
31567 (get_ratio): Ditto.
31570 (get_avl_type): Ditto.
31571 (calculate_ratio): Ditto.
31572 (enum vlmul_type): Ditto.
31574 (neg_simm5_p): Ditto.
31575 (has_vi_variant_p): Ditto.
31577 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31579 * config/riscv/riscv-protos.h (simm32_p): Remove.
31580 * config/riscv/riscv-v.cc (simm32_p): Ditto.
31581 * config/riscv/vector.md: Use immediate_operand
31582 instead of riscv_vector::simm32_p.
31584 2023-02-16 Gerald Pfeifer <gerald@pfeifer.com>
31586 * doc/invoke.texi (Optimize Options): Reword the explanation
31587 getting minimal, maximal and default values of a parameter.
31589 2023-02-16 Patrick Palka <ppalka@redhat.com>
31591 * addresses.h: Mechanically drop 'static' from 'static inline'
31592 functions via s/^static inline/inline/g.
31593 * asan.h: Likewise.
31594 * attribs.h: Likewise.
31595 * basic-block.h: Likewise.
31596 * bitmap.h: Likewise.
31597 * cfghooks.h: Likewise.
31598 * cfgloop.h: Likewise.
31599 * cgraph.h: Likewise.
31600 * cselib.h: Likewise.
31601 * data-streamer.h: Likewise.
31602 * debug.h: Likewise.
31604 * diagnostic.h: Likewise.
31605 * dominance.h: Likewise.
31606 * dumpfile.h: Likewise.
31607 * emit-rtl.h: Likewise.
31608 * except.h: Likewise.
31609 * expmed.h: Likewise.
31610 * expr.h: Likewise.
31611 * fixed-value.h: Likewise.
31612 * gengtype.h: Likewise.
31613 * gimple-expr.h: Likewise.
31614 * gimple-iterator.h: Likewise.
31615 * gimple-predict.h: Likewise.
31616 * gimple-range-fold.h: Likewise.
31617 * gimple-ssa.h: Likewise.
31618 * gimple.h: Likewise.
31619 * graphite.h: Likewise.
31620 * hard-reg-set.h: Likewise.
31621 * hash-map.h: Likewise.
31622 * hash-set.h: Likewise.
31623 * hash-table.h: Likewise.
31624 * hwint.h: Likewise.
31625 * input.h: Likewise.
31626 * insn-addr.h: Likewise.
31627 * internal-fn.h: Likewise.
31628 * ipa-fnsummary.h: Likewise.
31629 * ipa-icf-gimple.h: Likewise.
31630 * ipa-inline.h: Likewise.
31631 * ipa-modref.h: Likewise.
31632 * ipa-prop.h: Likewise.
31633 * ira-int.h: Likewise.
31635 * lra-int.h: Likewise.
31637 * lto-streamer.h: Likewise.
31638 * memmodel.h: Likewise.
31639 * omp-general.h: Likewise.
31640 * optabs-query.h: Likewise.
31641 * optabs.h: Likewise.
31642 * plugin.h: Likewise.
31643 * pretty-print.h: Likewise.
31644 * range.h: Likewise.
31645 * read-md.h: Likewise.
31646 * recog.h: Likewise.
31647 * regs.h: Likewise.
31648 * rtl-iter.h: Likewise.
31650 * sbitmap.h: Likewise.
31651 * sched-int.h: Likewise.
31652 * sel-sched-ir.h: Likewise.
31653 * sese.h: Likewise.
31654 * sparseset.h: Likewise.
31655 * ssa-iterators.h: Likewise.
31656 * system.h: Likewise.
31657 * target-globals.h: Likewise.
31658 * target.h: Likewise.
31659 * timevar.h: Likewise.
31660 * tree-chrec.h: Likewise.
31661 * tree-data-ref.h: Likewise.
31662 * tree-iterator.h: Likewise.
31663 * tree-outof-ssa.h: Likewise.
31664 * tree-phinodes.h: Likewise.
31665 * tree-scalar-evolution.h: Likewise.
31666 * tree-sra.h: Likewise.
31667 * tree-ssa-alias.h: Likewise.
31668 * tree-ssa-live.h: Likewise.
31669 * tree-ssa-loop-manip.h: Likewise.
31670 * tree-ssa-loop.h: Likewise.
31671 * tree-ssa-operands.h: Likewise.
31672 * tree-ssa-propagate.h: Likewise.
31673 * tree-ssa-sccvn.h: Likewise.
31674 * tree-ssa.h: Likewise.
31675 * tree-ssanames.h: Likewise.
31676 * tree-streamer.h: Likewise.
31677 * tree-switch-conversion.h: Likewise.
31678 * tree-vectorizer.h: Likewise.
31679 * tree.h: Likewise.
31680 * wide-int.h: Likewise.
31682 2023-02-16 Jakub Jelinek <jakub@redhat.com>
31684 PR tree-optimization/108657
31685 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): If lhs of stmt
31686 exists and is not a SSA_NAME, call ao_ref_init even if the stmt
31687 is a call to internal or builtin function.
31689 2023-02-16 Jonathan Wakely <jwakely@redhat.com>
31691 * doc/invoke.texi (C++ Dialect Options): Suggest adding a
31692 using-declaration to unhide functions.
31694 2023-02-16 Jakub Jelinek <jakub@redhat.com>
31696 PR tree-optimization/108783
31697 * tree-ssa-reassoc.cc (eliminate_redundant_comparison): If lcode
31698 is equal to TREE_CODE (t), op1 to newop1 and op2 to newop2, set
31699 t to curr->op. Otherwise, punt if either newop1 or newop2 are
31700 SSA_NAME_OCCURS_IN_ABNORMAL_PHI SSA_NAMEs.
31702 2023-02-16 Richard Biener <rguenther@suse.de>
31704 PR tree-optimization/108791
31705 * tree-ssa-forwprop.cc (optimize_vector_load): Build
31706 the ADDR_EXPR of a TARGET_MEM_REF using a more meaningful
31709 2023-02-15 Eric Botcazou <ebotcazou@adacore.com>
31712 * config/i386/i386.cc (ix86_compute_frame_layout): Disable the
31713 effects of -fstack-clash-protection for TARGET_STACK_PROBE.
31714 (ix86_expand_prologue): Likewise.
31716 2023-02-15 Jan-Benedict Glaw <jbglaw@lug-owl.de>
31718 * config/bpf/bpf.cc (bpf_option_override): Fix doubled space.
31720 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
31722 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use
31723 int248_register_operand predicate in zero_extract sub-RTX.
31724 (*cmpqi_ext<mode>_2): Ditto.
31725 (*cmpqi_ext<mode>_3): Ditto.
31726 (*cmpqi_ext<mode>_4): Ditto.
31727 (*extzvqi_mem_rex64): Ditto.
31729 (*insvqi_1_mem_rex64): Ditto.
31730 (@insv<mode>_1): Ditto.
31731 (*insvqi_1): Ditto.
31732 (*insvqi_2): Ditto.
31733 (*insvqi_3): Ditto.
31734 (*extendqi<SWI24:mode>_ext_1): Ditto.
31735 (*addqi_ext<mode>_1): Ditto.
31736 (*addqi_ext<mode>_2): Ditto.
31737 (*subqi_ext<mode>_2): Ditto.
31738 (*testqi_ext<mode>_1): Ditto.
31739 (*testqi_ext<mode>_2): Ditto.
31740 (*andqi_ext<mode>_1): Ditto.
31741 (*andqi_ext<mode>_1_cc): Ditto.
31742 (*andqi_ext<mode>_2): Ditto.
31743 (*<any_or:code>qi_ext<mode>_1): Ditto.
31744 (*<any_or:code>qi_ext<mode>_2): Ditto.
31745 (*xorqi_ext<mode>_1_cc): Ditto.
31746 (*negqi_ext<mode>_2): Ditto.
31747 (*ashlqi_ext<mode>_2): Ditto.
31748 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
31750 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
31752 * config/i386/predicates.md (int248_register_operand):
31753 Rename from extr_register_operand.
31754 * config/i386/i386.md (*extv<mode>): Update for renamed predicate.
31755 (*extzx<mode>): Ditto.
31756 (*ashl<dwi>3_doubleword_mask): Use int248_register_operand predicate.
31757 (*ashl<mode>3_mask): Ditto.
31758 (*<any_shiftrt:insn><mode>3_mask): Ditto.
31759 (*<any_shiftrt:insn><dwi>3_doubleword_mask): Ditto.
31760 (*<any_rotate:insn><mode>3_mask): Ditto.
31761 (*<btsc><mode>_mask): Ditto.
31762 (*btr<mode>_mask): Ditto.
31763 (*jcc_bt<mode>_mask_1): Ditto.
31765 2023-02-15 Richard Biener <rguenther@suse.de>
31767 PR middle-end/26854
31768 * df-core.cc (df_worklist_propagate_forward): Put later
31769 blocks on worklist and only earlier blocks on pending.
31770 (df_worklist_propagate_backward): Likewise.
31771 (df_worklist_dataflow_doublequeue): Change the iteration
31772 to process new blocks in the same iteration if that
31773 maintains the iteration order.
31775 2023-02-15 Marek Polacek <polacek@redhat.com>
31777 PR middle-end/106080
31778 * gimple-ssa-warn-access.cc (is_auto_decl): Remove. Use auto_var_p
31781 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31783 * config/riscv/predicates.md: Refine codes.
31784 * config/riscv/riscv-protos.h (RVV_VUNDEF): New macro.
31785 * config/riscv/riscv-v.cc: Refine codes.
31786 * config/riscv/riscv-vector-builtins-bases.cc (enum ternop_type): New
31788 (class imac): New class.
31789 (enum widen_ternop_type): New enum.
31790 (class iwmac): New class.
31792 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
31793 * config/riscv/riscv-vector-builtins-functions.def (vmacc): Ditto.
31801 * config/riscv/riscv-vector-builtins.cc
31802 (function_builder::apply_predication): Adjust for multiply-add support.
31803 (function_expander::add_vundef_operand): Refine codes.
31804 (function_expander::use_ternop_insn): New function.
31805 (function_expander::use_widen_ternop_insn): Ditto.
31806 * config/riscv/riscv-vector-builtins.h: New function.
31807 * config/riscv/vector.md (@pred_mul_<optab><mode>): New pattern.
31808 (pred_mul_<optab><mode>_undef_merge): Ditto.
31809 (*pred_<madd_nmsub><mode>): Ditto.
31810 (*pred_<macc_nmsac><mode>): Ditto.
31811 (*pred_mul_<optab><mode>): Ditto.
31812 (@pred_mul_<optab><mode>_scalar): Ditto.
31813 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
31814 (*pred_<madd_nmsub><mode>_scalar): Ditto.
31815 (*pred_<macc_nmsac><mode>_scalar): Ditto.
31816 (*pred_mul_<optab><mode>_scalar): Ditto.
31817 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
31818 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
31819 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
31820 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
31821 (@pred_widen_mul_plus<su><mode>): Ditto.
31822 (@pred_widen_mul_plus<su><mode>_scalar): Ditto.
31823 (@pred_widen_mul_plussu<mode>): Ditto.
31824 (@pred_widen_mul_plussu<mode>_scalar): Ditto.
31825 (@pred_widen_mul_plusus<mode>_scalar): Ditto.
31827 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31829 * config/riscv/predicates.md (vector_mask_operand): Refine the codes.
31830 (vector_all_trues_mask_operand): New predicate.
31831 (vector_undef_operand): New predicate.
31832 (ltge_operator): New predicate.
31833 (comparison_except_ltge_operator): New predicate.
31834 (comparison_except_eqge_operator): New predicate.
31835 (ge_operator): New predicate.
31836 * config/riscv/riscv-v.cc (has_vi_variant_p): Add compare support.
31837 * config/riscv/riscv-vector-builtins-bases.cc (class icmp): New class.
31839 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
31840 * config/riscv/riscv-vector-builtins-functions.def (vmseq): Ditto.
31850 * config/riscv/riscv-vector-builtins-shapes.cc
31851 (struct return_mask_def): Adjust for compare support.
31852 * config/riscv/riscv-vector-builtins.cc
31853 (function_expander::use_compare_insn): New function.
31854 * config/riscv/riscv-vector-builtins.h
31855 (function_expander::add_integer_operand): Ditto.
31856 * config/riscv/riscv.cc (riscv_print_operand): Add compare support.
31857 * config/riscv/riscv.md: Add vector min/max attributes.
31858 * config/riscv/vector-iterators.md (xnor): New iterator.
31859 * config/riscv/vector.md (@pred_cmp<mode>): New pattern.
31860 (*pred_cmp<mode>): Ditto.
31861 (*pred_cmp<mode>_narrow): Ditto.
31862 (@pred_ltge<mode>): Ditto.
31863 (*pred_ltge<mode>): Ditto.
31864 (*pred_ltge<mode>_narrow): Ditto.
31865 (@pred_cmp<mode>_scalar): Ditto.
31866 (*pred_cmp<mode>_scalar): Ditto.
31867 (*pred_cmp<mode>_scalar_narrow): Ditto.
31868 (@pred_eqne<mode>_scalar): Ditto.
31869 (*pred_eqne<mode>_scalar): Ditto.
31870 (*pred_eqne<mode>_scalar_narrow): Ditto.
31871 (*pred_cmp<mode>_extended_scalar): Ditto.
31872 (*pred_cmp<mode>_extended_scalar_narrow): Ditto.
31873 (*pred_eqne<mode>_extended_scalar): Ditto.
31874 (*pred_eqne<mode>_extended_scalar_narrow): Ditto.
31875 (@pred_ge<mode>_scalar): Ditto.
31876 (@pred_<optab><mode>): Ditto.
31877 (@pred_n<optab><mode>): Ditto.
31878 (@pred_<optab>n<mode>): Ditto.
31879 (@pred_not<mode>): Ditto.
31881 2023-02-15 Martin Jambor <mjambor@suse.cz>
31884 * ipa-sra.cc (push_param_adjustments_for_index): Do not omit
31885 creation of non-scalar replacements even if IPA-CP knows their
31888 2023-02-15 Jakub Jelinek <jakub@redhat.com>
31892 * config/rs6000/rs6000.md (<u>maddditi4): Change into umaddditi4 only
31893 expander, change operand 3 to be TImode, emit maddlddi4 and
31894 umadddi4_highpart{,_le} with its low half and finally add the high
31895 half to the result.
31897 2023-02-15 Martin Liska <mliska@suse.cz>
31899 * doc/invoke.texi: Document --param=asan-kernel-mem-intrinsic-prefix.
31901 2023-02-15 Richard Biener <rguenther@suse.de>
31903 * sanopt.cc (sanitize_asan_mark_unpoison): Use bitmap
31904 for with_poison and alias worklist to it.
31905 (sanitize_asan_mark_poison): Likewise.
31907 2023-02-15 Richard Biener <rguenther@suse.de>
31910 * config/i386/i386-features.cc (scalar_chain::add_to_queue):
31911 Combine bitmap test and set.
31912 (scalar_chain::add_insn): Likewise.
31913 (scalar_chain::analyze_register_chain): Remove redundant
31914 attempt to add to queue and instead strengthen assert.
31915 Sink common attempts to mark the def dual-mode.
31916 (scalar_chain::add_to_queue): Remove redundant insn bitmap
31919 2023-02-15 Richard Biener <rguenther@suse.de>
31922 * config/i386/i386-features.cc (convert_scalars_to_vector):
31923 Switch candidates bitmaps to tree view before building the chains.
31925 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
31927 * reload1.cc (gen_reload): Correct rtx parameter for fatal_insn
31928 "failure trying to reload" call.
31930 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
31932 * gdbinit.in (phrs): New command.
31933 * sel-sched-dump.cc (debug_hard_reg_set): Remove debug-function.
31934 * ira-color.cc (debug_hard_reg_set): New, calling print_hard_reg_set.
31936 2023-02-14 David Faust <david.faust@oracle.com>
31939 * config/bpf/constraints.md (q): New memory constraint.
31940 * config/bpf/bpf.md (zero_extendhidi2): Use it here.
31941 (zero_extendqidi2): Likewise.
31942 (zero_extendsidi2): Likewise.
31943 (*mov<MM:mode>): Likewise.
31945 2023-02-14 Andrew Pinski <apinski@marvell.com>
31947 PR tree-optimization/108355
31948 PR tree-optimization/96921
31949 * match.pd: Add pattern for "1 - bool_val".
31951 2023-02-14 Richard Biener <rguenther@suse.de>
31953 * tree-ssa-sccvn.cc (vn_phi_compute_hash): Key skipping
31954 basic block index hashing on the availability of ->cclhs.
31955 (vn_phi_eq): Avoid re-doing sanity checks for CSE but
31956 rely on ->cclhs availability.
31957 (vn_phi_lookup): Set ->cclhs only when we are eventually
31958 going to CSE the PHI.
31959 (vn_phi_insert): Likewise.
31961 2023-02-14 Eric Botcazou <ebotcazou@adacore.com>
31963 * gimplify.cc (gimplify_save_expr): Add missing guard.
31965 2023-02-14 Richard Biener <rguenther@suse.de>
31967 PR tree-optimization/108782
31968 * tree-vect-loop.cc (vect_phi_first_order_recurrence_p):
31969 Make sure we're not vectorizing an inner loop.
31971 2023-02-14 Jakub Jelinek <jakub@redhat.com>
31973 PR sanitizer/108777
31974 * params.opt (-param=asan-kernel-mem-intrinsic-prefix=): New param.
31975 * asan.h (asan_memfn_rtl): Declare.
31976 * asan.cc (asan_memfn_rtls): New variable.
31977 (asan_memfn_rtl): New function.
31978 * builtins.cc (expand_builtin): If
31979 param_asan_kernel_mem_intrinsic_prefix and function is
31980 kernel-{,hw}address sanitized, emit calls to
31981 __{,hw}asan_{memcpy,memmove,memset} rather than
31982 {memcpy,memmove,memset}. Use sanitize_flags_p (SANITIZE_ADDRESS)
31983 instead of flag_sanitize & SANITIZE_ADDRESS to check if
31984 asan_intercepted_p functions shouldn't be expanded inline.
31986 2023-02-14 Richard Sandiford <richard.sandiford@arm.com>
31988 PR tree-optimization/96373
31989 * tree-vect-stmts.cc (vectorizable_operation): Predicate trapping
31990 operations on the loop mask. Reject partial vectors if this isn't
31993 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
31995 PR rtl-optimization/108681
31996 * lra-spills.cc (lra_final_code_change): Extend subreg replacement
31997 code to handle bare uses and clobbers.
31999 2023-02-13 Vladimir N. Makarov <vmakarov@redhat.com>
32001 * ira.cc (ira_update_equiv_info_by_shuffle_insn): Clear equiv
32002 caller_save_p flag when clearing defined_p flag.
32003 (setup_reg_equiv): Ditto.
32004 * lra-constraints.cc (lra_constraints): Ditto.
32006 2023-02-13 Uroš Bizjak <ubizjak@gmail.com>
32009 * config/i386/predicates.md (extr_register_operand):
32010 New special predicate.
32011 * config/i386/i386.md (*extv<mode>): Use extr_register_operand
32012 as operand 1 predicate.
32013 (*exzv<mode>): Ditto.
32014 (*extendqi<SWI24:mode>_ext_1): New insn pattern.
32016 2023-02-13 Richard Biener <rguenther@suse.de>
32018 PR tree-optimization/28614
32019 * tree-ssa-sccvn.cc (can_track_predicate_on_edge): Avoid
32020 walking all edges in most cases.
32021 (vn_nary_op_insert_pieces_predicated): Avoid repeated
32022 calls to can_track_predicate_on_edge unless checking is
32024 (process_bb): Instead call it once here for each edge
32025 we register possibly multiple predicates on.
32027 2023-02-13 Richard Biener <rguenther@suse.de>
32029 PR tree-optimization/108691
32030 * tree-cfg.cc (notice_special_calls): When the CFG is built
32031 honor gimple_call_ctrl_altering_p.
32032 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
32033 temporarily if the call is not control-altering.
32034 * calls.cc (emit_call_1): Do not add REG_SETJMP if
32035 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
32037 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
32040 * config/s390/s390.cc (s390_bb_fallthru_entry_likely): Remove.
32041 (struct s390_sched_state): Initialise to zero.
32042 (s390_sched_variable_issue): For better debuggability also emit
32044 (s390_sched_init): Unconditionally reset scheduler state.
32046 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
32048 * ifcvt.h (noce_if_info::cond_inverted): New field.
32049 * ifcvt.cc (cond_move_convert_if_block): Swap the then and else
32050 values when cond_inverted is true.
32051 (noce_find_if_block): Allow the condition to be inverted when
32052 handling conditional moves.
32054 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
32056 * config/s390/predicates.md (execute_operation): Use
32057 constrain_operands instead of extract_constrain_insn in order to
32058 determine wheter there exists a valid alternative.
32060 2023-02-13 Claudiu Zissulescu <claziss@gmail.com>
32062 * common/config/arc/arc-common.cc (arc_option_optimization_table):
32063 Remove millicode from list.
32065 2023-02-13 Martin Liska <mliska@suse.cz>
32067 * doc/invoke.texi: Document ira-simple-lra-insn-threshold.
32069 2023-02-13 Richard Biener <rguenther@suse.de>
32071 PR tree-optimization/106722
32072 * tree-ssa-dce.cc (mark_last_stmt_necessary): Return
32073 whether we marked a stmt.
32074 (mark_control_dependent_edges_necessary): When
32075 mark_last_stmt_necessary didn't mark any stmt make sure
32076 to mark its control dependent edges.
32077 (propagate_necessity): Likewise.
32079 2023-02-13 Kito Cheng <kito.cheng@sifive.com>
32081 * config/riscv/riscv.h (RISCV_DWARF_VLENB): New.
32082 (DWARF_FRAME_REGISTERS): New.
32083 (DWARF_REG_TO_UNWIND_COLUMN): New.
32085 2023-02-12 Gerald Pfeifer <gerald@pfeifer.com>
32087 * doc/sourcebuild.texi: Remove (broken) direct reference to
32088 "The GNU configure and build system".
32090 2023-02-12 Jin Ma <jinma@linux.alibaba.com>
32092 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Change
32093 gen_add3_insn to gen_rtx_SET.
32094 (riscv_adjust_libcall_cfi_epilogue): Likewise.
32096 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32098 * config/riscv/riscv-vector-builtins-bases.cc (class sat_op): New class.
32099 (class vnclip): Ditto.
32101 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32102 * config/riscv/riscv-vector-builtins-functions.def (vaadd): Ditto.
32111 * config/riscv/vector-iterators.md (su): Add instruction.
32114 * config/riscv/vector.md (@pred_<sat_op><mode>): New pattern.
32115 (@pred_<sat_op><mode>_scalar): Ditto.
32116 (*pred_<sat_op><mode>_scalar): Ditto.
32117 (*pred_<sat_op><mode>_extended_scalar): Ditto.
32118 (@pred_narrow_clip<v_su><mode>): Ditto.
32119 (@pred_narrow_clip<v_su><mode>_scalar): Ditto.
32121 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32123 * config/riscv/constraints.md (Wbr): Remove unused constraint.
32124 * config/riscv/predicates.md: Fix move operand predicate.
32125 * config/riscv/riscv-vector-builtins-bases.cc (class vnshift): New class.
32126 (class vncvt_x): Ditto.
32127 (class vmerge): Ditto.
32128 (class vmv_v): Ditto.
32130 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32131 * config/riscv/riscv-vector-builtins-functions.def (vsra): Ditto.
32138 * config/riscv/riscv-vector-builtins-shapes.cc (struct narrow_alu_def): Ditto.
32139 (struct move_def): Ditto.
32141 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
32142 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): New variable.
32143 (DEF_RVV_WEXTU_OPS): Ditto
32144 * config/riscv/riscv-vector-builtins.def (x_x_w): Fix type for suffix.
32149 * config/riscv/riscv.cc (riscv_print_operand): Refine ASM printting rule.
32150 * config/riscv/vector-iterators.md (nmsac):New iterator.
32151 (nmsub): New iterator.
32152 * config/riscv/vector.md (@pred_merge<mode>): New pattern.
32153 (@pred_merge<mode>_scalar): New pattern.
32154 (*pred_merge<mode>_scalar): New pattern.
32155 (*pred_merge<mode>_extended_scalar): New pattern.
32156 (@pred_narrow_<optab><mode>): New pattern.
32157 (@pred_narrow_<optab><mode>_scalar): New pattern.
32158 (@pred_trunc<mode>): New pattern.
32160 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32162 * config/riscv/riscv-vector-builtins-bases.cc (class vmadc): New class.
32163 (class vmsbc): Ditto.
32164 (BASE): Define new class.
32165 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32166 * config/riscv/riscv-vector-builtins-functions.def (vmadc): New define.
32168 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def):
32171 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
32172 * config/riscv/riscv-vector-builtins.cc
32173 (function_expander::use_exact_insn): Adjust for new support
32174 * config/riscv/riscv-vector-builtins.h
32175 (function_base::has_merge_operand_p): New function.
32176 * config/riscv/vector-iterators.md: New iterator.
32177 * config/riscv/vector.md (@pred_madc<mode>): New pattern.
32178 (@pred_msbc<mode>): Ditto.
32179 (@pred_madc<mode>_scalar): Ditto.
32180 (@pred_msbc<mode>_scalar): Ditto.
32181 (*pred_madc<mode>_scalar): Ditto.
32182 (*pred_madc<mode>_extended_scalar): Ditto.
32183 (*pred_msbc<mode>_scalar): Ditto.
32184 (*pred_msbc<mode>_extended_scalar): Ditto.
32185 (@pred_madc<mode>_overflow): Ditto.
32186 (@pred_msbc<mode>_overflow): Ditto.
32187 (@pred_madc<mode>_overflow_scalar): Ditto.
32188 (@pred_msbc<mode>_overflow_scalar): Ditto.
32189 (*pred_madc<mode>_overflow_scalar): Ditto.
32190 (*pred_madc<mode>_overflow_extended_scalar): Ditto.
32191 (*pred_msbc<mode>_overflow_scalar): Ditto.
32192 (*pred_msbc<mode>_overflow_extended_scalar): Ditto.
32194 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32196 * config/riscv/riscv-protos.h (simm5_p): Add vadc/vsbc support.
32197 * config/riscv/riscv-v.cc (simm32_p): Ditto.
32198 * config/riscv/riscv-vector-builtins-bases.cc (class vadc): New class.
32199 (class vsbc): Ditto.
32201 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32202 * config/riscv/riscv-vector-builtins-functions.def (vadc): Ditto.
32204 * config/riscv/riscv-vector-builtins-shapes.cc
32205 (struct no_mask_policy_def): Ditto.
32207 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
32208 * config/riscv/riscv-vector-builtins.cc
32209 (rvv_arg_type_info::get_base_vector_type): Add vadc/vsbc support.
32210 (rvv_arg_type_info::get_tree_type): Ditto.
32211 (function_expander::use_exact_insn): Ditto.
32212 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
32213 (function_base::use_mask_predication_p): New function.
32214 * config/riscv/vector-iterators.md: New iterator.
32215 * config/riscv/vector.md (@pred_adc<mode>): New pattern.
32216 (@pred_sbc<mode>): Ditto.
32217 (@pred_adc<mode>_scalar): Ditto.
32218 (@pred_sbc<mode>_scalar): Ditto.
32219 (*pred_adc<mode>_scalar): Ditto.
32220 (*pred_adc<mode>_extended_scalar): Ditto.
32221 (*pred_sbc<mode>_scalar): Ditto.
32222 (*pred_sbc<mode>_extended_scalar): Ditto.
32224 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32226 * config/riscv/vector.md: use "zero" reg.
32228 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32230 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New
32232 (class vwmulsu): Ditto.
32233 (class vwcvt): Ditto.
32234 (BASE): Add integer widening support.
32235 * config/riscv/riscv-vector-builtins-bases.h: Ditto
32236 * config/riscv/riscv-vector-builtins-functions.def (vwadd): New class.
32237 (vwsub): New class.
32238 (vwmul): New class.
32239 (vwmulu): New class.
32240 (vwmulsu): New class.
32241 (vwaddu): New class.
32242 (vwsubu): New class.
32243 (vwcvt_x): New class.
32244 (vwcvtu_x): New class.
32245 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): New
32247 (struct widen_alu_def): New class.
32248 (SHAPE): New class.
32249 * config/riscv/riscv-vector-builtins-shapes.h: New class.
32250 * config/riscv/riscv-vector-builtins.cc
32251 (rvv_arg_type_info::get_base_vector_type): Add integer widening support.
32252 (rvv_arg_type_info::get_tree_type): Ditto.
32253 * config/riscv/riscv-vector-builtins.def (x_x_v): Change into "x_v"
32255 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add integer
32257 * config/riscv/riscv-vsetvl.cc (change_insn): Fix reg_equal use bug.
32258 * config/riscv/riscv.h (X0_REGNUM): New constant.
32259 * config/riscv/vector-iterators.md: New iterators.
32260 * config/riscv/vector.md
32261 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>): New
32263 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>_scalar):
32265 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Ditto.
32266 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>_scalar):
32268 (@pred_widen_mulsu<mode>): Ditto.
32269 (@pred_widen_mulsu<mode>_scalar): Ditto.
32270 (@pred_<optab><mode>): Ditto.
32272 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32273 kito-cheng <kito.cheng@sifive.com>
32275 * common/config/riscv/riscv-common.cc: Add flag for 'V' extension.
32276 * config/riscv/riscv-vector-builtins-bases.cc (class vmulh): New class.
32278 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32279 * config/riscv/riscv-vector-builtins-functions.def (vmulh): Add vmulh
32283 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_FULL_V_I_OPS):
32285 (DEF_RVV_FULL_V_U_OPS): Ditto.
32286 (vint8mf8_t): Ditto.
32287 (vint8mf4_t): Ditto.
32288 (vint8mf2_t): Ditto.
32289 (vint8m1_t): Ditto.
32290 (vint8m2_t): Ditto.
32291 (vint8m4_t): Ditto.
32292 (vint8m8_t): Ditto.
32293 (vint16mf4_t): Ditto.
32294 (vint16mf2_t): Ditto.
32295 (vint16m1_t): Ditto.
32296 (vint16m2_t): Ditto.
32297 (vint16m4_t): Ditto.
32298 (vint16m8_t): Ditto.
32299 (vint32mf2_t): Ditto.
32300 (vint32m1_t): Ditto.
32301 (vint32m2_t): Ditto.
32302 (vint32m4_t): Ditto.
32303 (vint32m8_t): Ditto.
32304 (vint64m1_t): Ditto.
32305 (vint64m2_t): Ditto.
32306 (vint64m4_t): Ditto.
32307 (vint64m8_t): Ditto.
32308 (vuint8mf8_t): Ditto.
32309 (vuint8mf4_t): Ditto.
32310 (vuint8mf2_t): Ditto.
32311 (vuint8m1_t): Ditto.
32312 (vuint8m2_t): Ditto.
32313 (vuint8m4_t): Ditto.
32314 (vuint8m8_t): Ditto.
32315 (vuint16mf4_t): Ditto.
32316 (vuint16mf2_t): Ditto.
32317 (vuint16m1_t): Ditto.
32318 (vuint16m2_t): Ditto.
32319 (vuint16m4_t): Ditto.
32320 (vuint16m8_t): Ditto.
32321 (vuint32mf2_t): Ditto.
32322 (vuint32m1_t): Ditto.
32323 (vuint32m2_t): Ditto.
32324 (vuint32m4_t): Ditto.
32325 (vuint32m8_t): Ditto.
32326 (vuint64m1_t): Ditto.
32327 (vuint64m2_t): Ditto.
32328 (vuint64m4_t): Ditto.
32329 (vuint64m8_t): Ditto.
32330 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FULL_V_I_OPS): Ditto.
32331 (DEF_RVV_FULL_V_U_OPS): Ditto.
32332 (check_required_extensions): Add vmulh support.
32333 (rvv_arg_type_info::get_tree_type): Ditto.
32334 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_FULL_V): Ditto.
32335 (enum rvv_base_type): Ditto.
32336 * config/riscv/riscv.opt: Add 'V' extension flag.
32337 * config/riscv/vector-iterators.md (su): New iterator.
32338 * config/riscv/vector.md (@pred_mulh<v_su><mode>): New pattern.
32339 (@pred_mulh<v_su><mode>_scalar): Ditto.
32340 (*pred_mulh<v_su><mode>_scalar): Ditto.
32341 (*pred_mulh<v_su><mode>_extended_scalar): Ditto.
32343 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32345 * config/riscv/iterators.md: Add sign_extend/zero_extend.
32346 * config/riscv/riscv-vector-builtins-bases.cc (class ext): New class.
32348 * config/riscv/riscv-vector-builtins-bases.h: Add vsext/vzext support.
32349 * config/riscv/riscv-vector-builtins-functions.def (vsext): New macro
32352 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Adjust
32353 for vsext/vzext support.
32354 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTI_OPS): New
32356 (DEF_RVV_QEXTI_OPS): Ditto.
32357 (DEF_RVV_OEXTI_OPS): Ditto.
32358 (DEF_RVV_WEXTU_OPS): Ditto.
32359 (DEF_RVV_QEXTU_OPS): Ditto.
32360 (DEF_RVV_OEXTU_OPS): Ditto.
32361 (vint16mf4_t): Ditto.
32362 (vint16mf2_t): Ditto.
32363 (vint16m1_t): Ditto.
32364 (vint16m2_t): Ditto.
32365 (vint16m4_t): Ditto.
32366 (vint16m8_t): Ditto.
32367 (vint32mf2_t): Ditto.
32368 (vint32m1_t): Ditto.
32369 (vint32m2_t): Ditto.
32370 (vint32m4_t): Ditto.
32371 (vint32m8_t): Ditto.
32372 (vint64m1_t): Ditto.
32373 (vint64m2_t): Ditto.
32374 (vint64m4_t): Ditto.
32375 (vint64m8_t): Ditto.
32376 (vuint16mf4_t): Ditto.
32377 (vuint16mf2_t): Ditto.
32378 (vuint16m1_t): Ditto.
32379 (vuint16m2_t): Ditto.
32380 (vuint16m4_t): Ditto.
32381 (vuint16m8_t): Ditto.
32382 (vuint32mf2_t): Ditto.
32383 (vuint32m1_t): Ditto.
32384 (vuint32m2_t): Ditto.
32385 (vuint32m4_t): Ditto.
32386 (vuint32m8_t): Ditto.
32387 (vuint64m1_t): Ditto.
32388 (vuint64m2_t): Ditto.
32389 (vuint64m4_t): Ditto.
32390 (vuint64m8_t): Ditto.
32391 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): Ditto.
32392 (DEF_RVV_QEXTI_OPS): Ditto.
32393 (DEF_RVV_OEXTI_OPS): Ditto.
32394 (DEF_RVV_WEXTU_OPS): Ditto.
32395 (DEF_RVV_QEXTU_OPS): Ditto.
32396 (DEF_RVV_OEXTU_OPS): Ditto.
32397 (rvv_arg_type_info::get_base_vector_type): Add sign_exted/zero_extend
32399 (rvv_arg_type_info::get_tree_type): Ditto.
32400 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
32401 * config/riscv/vector-iterators.md (z): New attribute.
32402 * config/riscv/vector.md (@pred_<optab><mode>_vf2): New pattern.
32403 (@pred_<optab><mode>_vf4): Ditto.
32404 (@pred_<optab><mode>_vf8): Ditto.
32406 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32408 * config/riscv/iterators.md: Add saturating Addition && Subtraction.
32409 * config/riscv/riscv-v.cc (has_vi_variant_p): Ditto.
32410 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Ditto.
32411 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32412 * config/riscv/riscv-vector-builtins-functions.def (vsadd): New def.
32416 * config/riscv/vector-iterators.md (sll.vi): Adjust for Saturating
32421 * config/riscv/vector.md (@pred_<optab><mode>): New pattern.
32422 (@pred_<optab><mode>_scalar): New pattern.
32423 (*pred_<optab><mode>_scalar): New pattern.
32424 (*pred_<optab><mode>_extended_scalar): New pattern.
32426 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32428 * config/riscv/iterators.md: Add neg and not.
32429 * config/riscv/riscv-vector-builtins-bases.cc (class unop): New class.
32431 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32432 * config/riscv/riscv-vector-builtins-functions.def (vadd): Rename binop
32453 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): Ditto.
32454 (struct alu_def): Ditto.
32456 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
32457 * config/riscv/riscv-vector-builtins.cc: Support unary C/C/++.
32458 * config/riscv/vector-iterators.md: New iterator.
32459 * config/riscv/vector.md (@pred_<optab><mode>): New pattern
32461 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32463 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_probabilities): Skip exit block.
32465 2023-02-11 Jakub Jelinek <jakub@redhat.com>
32468 * ipa-cp.cc (ipa_agg_value_from_jfunc): Return NULL_TREE also if
32469 item->offset bit position is too large to be representable as
32470 unsigned int byte position.
32472 2023-02-11 Gerald Pfeifer <gerald@pfeifer.com>
32474 * doc/extend.texi (Other Builtins): Adjust link to WG14 N965.
32476 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
32478 * ira.cc (update_equiv_regs): Set up ira_reg_equiv for
32479 valid_combine only when ira_use_lra_p is true.
32481 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
32483 * params.opt (ira-simple-lra-insn-threshold): Add new param.
32484 * ira.cc (ira): Use the param to switch on simple LRA.
32486 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
32488 PR tree-optimization/108687
32489 * gimple-range-cache.cc (ranger_cache::range_on_edge): Revert
32490 back to RFD_NONE mode for calculations.
32491 (ranger_cache::propagate_cache): Call the internal edge range API
32492 with RFD_READ_ONLY instead of changing the external routine.
32494 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
32496 PR tree-optimization/108520
32497 * gimple-range-infer.cc (check_assume_func): Invoke
32498 gimple_range_global directly instead using global_range_query.
32499 * value-query.cc (get_range_global): Add function context and
32500 avoid calling nonnull_arg_p if not cfun.
32501 (gimple_range_global): Add function context pointer.
32502 * value-query.h (imple_range_global): Add function context.
32504 2023-02-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32506 * config/riscv/constraints.md (Wdm): Adjust constraint.
32507 (Wbr): New constraint.
32508 * config/riscv/predicates.md (reg_or_int_operand): New predicate.
32509 * config/riscv/riscv-protos.h (emit_pred_op): Remove function.
32510 (emit_vlmax_op): New function.
32511 (emit_nonvlmax_op): Ditto.
32513 (neg_simm5_p): Ditto.
32514 (has_vi_variant_p): Ditto.
32515 * config/riscv/riscv-v.cc (emit_pred_op): Adjust function.
32516 (emit_vlmax_op): New function.
32517 (emit_nonvlmax_op): Ditto.
32518 (expand_const_vector): Adjust function.
32519 (legitimize_move): Ditto.
32520 (simm32_p): New function.
32522 (neg_simm5_p): Ditto.
32523 (has_vi_variant_p): Ditto.
32524 * config/riscv/riscv-vector-builtins-bases.cc (class vrsub): New class.
32526 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32527 * config/riscv/riscv-vector-builtins-functions.def (vmin): Remove
32530 (vminu): Remove signed cases.
32532 (vdiv): Remove unsigned cases.
32534 (vdivu): Remove signed cases.
32538 (vrsub): New class.
32543 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_U_OPS): New macro.
32544 * config/riscv/riscv.h: change VL/VTYPE as fixed reg.
32545 * config/riscv/vector-iterators.md: New iterators.
32546 * config/riscv/vector.md (@pred_broadcast<mode>): Adjust pattern for vx
32548 (@pred_<optab><mode>_scalar): New pattern.
32549 (@pred_sub<mode>_reverse_scalar): Ditto.
32550 (*pred_<optab><mode>_scalar): Ditto.
32551 (*pred_<optab><mode>_extended_scalar): Ditto.
32552 (*pred_sub<mode>_reverse_scalar): Ditto.
32553 (*pred_sub<mode>_extended_reverse_scalar): Ditto.
32555 2023-02-10 Richard Biener <rguenther@suse.de>
32557 PR tree-optimization/108724
32558 * tree-vect-stmts.cc (vectorizable_operation): Avoid
32559 using word_mode vectors when vector lowering will
32560 decompose them to elementwise operations.
32562 2023-02-10 Jakub Jelinek <jakub@redhat.com>
32565 2023-02-09 Martin Liska <mliska@suse.cz>
32568 * doc/extend.texi: Document that the function
32569 does not work correctly for old VIA processors.
32571 2023-02-10 Andrew Pinski <apinski@marvell.com>
32572 Andrew Macleod <amacleod@redhat.com>
32574 PR tree-optimization/108684
32575 * tree-ssa-dce.cc (simple_dce_from_worklist):
32576 Check all ssa names and not just non-vdef ones
32577 before accepting the inline-asm.
32578 Call unlink_stmt_vdef on the statement before
32581 2023-02-09 Vladimir N. Makarov <vmakarov@redhat.com>
32583 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
32584 * ira.cc (validate_equiv_mem): Check memref address variance.
32585 (no_equiv): Clear caller_save_p flag.
32586 (update_equiv_regs): Define caller save equivalence for
32588 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
32589 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
32590 call_save_p. Use caller save equivalence depending on the arg.
32591 (split_reg): Adjust the call.
32593 2023-02-09 Jakub Jelinek <jakub@redhat.com>
32596 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Formatting fixes.
32597 (cpu_indicator_init): Call get_available_features for all CPUs with
32598 max_level >= 1, rather than just Intel, AMD or Zhaoxin. Formatting
32601 2023-02-09 Jakub Jelinek <jakub@redhat.com>
32603 PR tree-optimization/108688
32604 * match.pd (bit_field_ref [bit_insert]): Simplify BIT_FIELD_REF
32605 of BIT_INSERT_EXPR extracting exactly all inserted bits even
32606 when without mode precision. Formatting fixes.
32608 2023-02-09 Andrew Pinski <apinski@marvell.com>
32610 PR tree-optimization/108688
32611 * match.pd (bit_field_ref [bit_insert]): Avoid generating
32612 BIT_FIELD_REFs of non-mode-precision integral operands.
32614 2023-02-09 Martin Liska <mliska@suse.cz>
32617 * doc/extend.texi: Document that the function
32618 does not work correctly for old VIA processors.
32620 2023-02-09 Andreas Schwab <schwab@suse.de>
32622 * lto-wrapper.cc (merge_and_complain): Handle
32623 -funwind-tables and -fasynchronous-unwind-tables.
32624 (append_compiler_options): Likewise.
32626 2023-02-09 Richard Biener <rguenther@suse.de>
32628 PR tree-optimization/26854
32629 * tree-into-ssa.cc (update_ssa): Turn blocks_to_update to tree
32630 view around insert_updated_phi_nodes_for.
32631 * tree-ssa-alias.cc (maybe_skip_until): Allocate visited bitmap
32633 (walk_aliased_vdefs_1): Likewise.
32635 2023-02-08 Gerald Pfeifer <gerald@pfeifer.com>
32637 * doc/include/gpl_v3.texi: Change fsf.org to www.fsf.org.
32639 2023-02-08 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
32642 * config.gcc (tm_mlib_file): Define new variable.
32644 2023-02-08 Jakub Jelinek <jakub@redhat.com>
32646 PR tree-optimization/108692
32647 * tree-vect-patterns.cc (vect_widened_op_tree): If rhs_code is
32648 widened_code which is different from code, don't call
32649 vect_look_through_possible_promotion but instead just check op is
32650 SSA_NAME with integral type for which vect_is_simple_use is true
32651 and call set_op on this_unprom.
32653 2023-02-08 Andrea Corallo <andrea.corallo@arm.com>
32655 * config/aarch64/aarch64-protos.h (aarch_ra_sign_key): Remove
32657 * config/aarch64/aarch64.cc (aarch_ra_sign_key): Remove
32659 * config/aarch64/aarch64.opt (aarch64_ra_sign_key): Rename
32660 to 'aarch_ra_sign_key'.
32661 * config/arm/aarch-common.cc (aarch_ra_sign_key): Remove
32663 * config/arm/arm-protos.h (aarch_ra_sign_key): Likewise.
32664 * config/arm/arm.cc (enum aarch_key_type): Remove definition.
32665 * config/arm/arm.opt: Define.
32667 2023-02-08 Richard Sandiford <richard.sandiford@arm.com>
32669 PR tree-optimization/108316
32670 * tree-vect-stmts.cc (get_load_store_type): When using
32671 internal functions for gather/scatter, make sure that the type
32672 of the offset argument is consistent with the offset vector type.
32674 2023-02-08 Vladimir N. Makarov <vmakarov@redhat.com>
32677 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
32679 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
32680 * ira.cc (validate_equiv_mem): Check memref address variance.
32681 (update_equiv_regs): Define caller save equivalence for
32683 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
32684 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
32685 call_save_p. Use caller save equivalence depending on the arg.
32686 (split_reg): Adjust the call.
32688 2023-02-08 Jakub Jelinek <jakub@redhat.com>
32690 * tree.def (SAD_EXPR): Remove outdated comment about missing
32693 2023-02-07 Marek Polacek <polacek@redhat.com>
32695 * doc/invoke.texi: Update -fchar8_t documentation.
32697 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
32699 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
32700 * ira.cc (validate_equiv_mem): Check memref address variance.
32701 (update_equiv_regs): Define caller save equivalence for
32703 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
32704 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
32705 call_save_p. Use caller save equivalence depending on the arg.
32706 (split_reg): Adjust the call.
32708 2023-02-07 Richard Biener <rguenther@suse.de>
32710 PR tree-optimization/26854
32711 * gimple-fold.cc (has_use_on_stmt): Look at stmt operands
32712 instead of immediate uses.
32714 2023-02-07 Jakub Jelinek <jakub@redhat.com>
32716 PR tree-optimization/106923
32717 * ipa-split.cc (execute_split_functions): Don't split returns_twice
32720 2023-02-07 Jakub Jelinek <jakub@redhat.com>
32722 PR tree-optimization/106433
32723 * cgraph.cc (set_const_flag_1): Recurse on simd clones too.
32724 (cgraph_node::set_pure_flag): Call set_pure_flag_1 on simd clones too.
32726 2023-02-07 Jan Hubicka <jh@suse.cz>
32728 * config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Turn off
32731 2023-02-06 Andrew Stubbs <ams@codesourcery.com>
32733 * config/gcn/mkoffload.cc (gcn_stack_size): New global variable.
32734 (process_asm): Create a constructor for GCN_STACK_SIZE.
32735 (main): Parse the -mstack-size option.
32737 2023-02-06 Alex Coplan <alex.coplan@arm.com>
32740 * config/aarch64/aarch64-simd.md (aarch64_bfmlal<bt>_lane<q>v4sf):
32741 Use correct constraint for operand 3.
32743 2023-02-06 Martin Jambor <mjambor@suse.cz>
32745 * ipa-sra.cc (adjust_parameter_descriptions): Fix a typo in a dump.
32747 2023-02-06 Xi Ruoyao <xry111@xry111.site>
32749 * config/loongarch/loongarch.md (bytepick_w_ashift_amount):
32750 New define_int_iterator.
32751 (bytepick_d_ashift_amount): Likewise.
32752 (bytepick_imm): New define_int_attr.
32753 (bytepick_w_lshiftrt_amount): Likewise.
32754 (bytepick_d_lshiftrt_amount): Likewise.
32755 (bytepick_w_<bytepick_imm>): New define_insn template.
32756 (bytepick_w_<bytepick_imm>_extend): Likewise.
32757 (bytepick_d_<bytepick_imm>): Likewise.
32758 (bytepick_w): Remove unused define_insn.
32759 (bytepick_d): Likewise.
32760 (UNSPEC_BYTEPICK_W): Remove unused unspec.
32761 (UNSPEC_BYTEPICK_D): Likewise.
32762 * config/loongarch/predicates.md (const_0_to_3_operand):
32763 Remove unused define_predicate.
32764 (const_0_to_7_operand): Likewise.
32766 2023-02-06 Jakub Jelinek <jakub@redhat.com>
32768 PR tree-optimization/108655
32769 * ubsan.cc (sanitize_unreachable_fn): For -funreachable-traps
32770 or -fsanitize=unreachable -fsanitize-trap=unreachable return
32771 BUILT_IN_UNREACHABLE_TRAP decl rather than BUILT_IN_TRAP.
32773 2023-02-05 Gerald Pfeifer <gerald@pfeifer.com>
32775 * doc/install.texi (Specific): Remove PW32.
32777 2023-02-03 Jakub Jelinek <jakub@redhat.com>
32779 PR tree-optimization/108647
32780 * range-op.cc (operator_equal::op1_range,
32781 operator_not_equal::op1_range): Don't test op2 bound
32782 equality if op2.undefined_p (), instead set_varying.
32783 (operator_lt::op1_range, operator_le::op1_range,
32784 operator_gt::op1_range, operator_ge::op1_range): Return false if
32785 op2.undefined_p ().
32786 (operator_lt::op2_range, operator_le::op2_range,
32787 operator_gt::op2_range, operator_ge::op2_range): Return false if
32788 op1.undefined_p ().
32790 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
32792 PR tree-optimization/108639
32793 * value-range.cc (irange::legacy_equal_p): Compare nonzero bits as
32795 (irange::operator==): Same.
32797 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
32799 PR tree-optimization/108647
32800 * range-op-float.cc (foperator_lt::op1_range): Handle undefined ranges.
32801 (foperator_lt::op2_range): Same.
32802 (foperator_le::op1_range): Same.
32803 (foperator_le::op2_range): Same.
32804 (foperator_gt::op1_range): Same.
32805 (foperator_gt::op2_range): Same.
32806 (foperator_ge::op1_range): Same.
32807 (foperator_ge::op2_range): Same.
32808 (foperator_unordered_lt::op1_range): Same.
32809 (foperator_unordered_lt::op2_range): Same.
32810 (foperator_unordered_le::op1_range): Same.
32811 (foperator_unordered_le::op2_range): Same.
32812 (foperator_unordered_gt::op1_range): Same.
32813 (foperator_unordered_gt::op2_range): Same.
32814 (foperator_unordered_ge::op1_range): Same.
32815 (foperator_unordered_ge::op2_range): Same.
32817 2023-02-03 Andrew MacLeod <amacleod@redhat.com>
32819 PR tree-optimization/107570
32820 * tree-vrp.cc (remove_and_update_globals): Reset SCEV.
32822 2023-02-03 Gaius Mulley <gaiusmod2@gmail.com>
32824 * doc/gm2.texi (Internals): Remove from menu.
32825 (Using): Comment out ifnohtml conditional.
32826 (Documentation): Use gcc url.
32827 (License): Node simplified.
32828 (Copying): New node. Include gpl_v3_without_node.
32829 (Contributing): Node simplified.
32830 (Internals): Commented out.
32831 (Libraries): Node simplified.
32834 (Functions): Ditto.
32836 2023-02-03 Christophe Lyon <christophe.lyon@arm.com>
32838 * config/arm/mve.md (mve_vabavq_p_<supf><mode>): Add length
32840 (mve_vqshluq_m_n_s<mode>): Likewise.
32841 (mve_vshlq_m_<supf><mode>): Likewise.
32842 (mve_vsriq_m_n_<supf><mode>): Likewise.
32843 (mve_vsubq_m_<supf><mode>): Likewise.
32845 2023-02-03 Martin Jambor <mjambor@suse.cz>
32848 * ipa-sra.cc (push_param_adjustments_for_index): Remove a size check
32849 when comparing to an IPA-CP value.
32850 (dump_list_of_param_indices): New function.
32851 (adjust_parameter_descriptions): Check for mismatching IPA-CP values.
32852 Dump removed candidates using dump_list_of_param_indices.
32853 * ipa-param-manipulation.cc
32854 (ipa_param_body_adjustments::modify_expression): Add assert checking
32855 sizes of a VIEW_CONVERT_EXPR will match.
32856 (ipa_param_body_adjustments::modify_assignment): Likewise.
32858 2023-02-03 Monk Chiang <monk.chiang@sifive.com>
32860 * config/riscv/riscv.h: Remove VL_REGS, VTYPE_REGS class.
32861 * config/riscv/riscv.cc: Ditto.
32863 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32865 * config/riscv/vector-iterators.md (sll.vi): Fix constraint bug.
32869 * config/riscv/vector.md: Ditto.
32871 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32873 * config/riscv/predicates.md (pmode_reg_or_uimm5_operand): New predicate.
32874 * config/riscv/riscv-vector-builtins-bases.cc: New class.
32875 * config/riscv/riscv-vector-builtins-functions.def (vsll): Ditto.
32878 * config/riscv/riscv-vector-builtins.cc: Ditto.
32879 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
32881 2023-02-02 Iain Sandoe <iain@sandoe.co.uk>
32883 * toplev.cc (toplev::main): Only print the version information header
32884 from toplevel main().
32886 2023-02-02 Paul-Antoine Arras <pa@codesourcery.com>
32888 * config/gcn/gcn-valu.md (cond_<expander><mode>): Add
32889 cond_{ashl|ashr|lshr}
32891 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
32893 PR rtl-optimization/108086
32894 * rtl-ssa/insns.h (insn_info): Make m_num_defs a full unsigned int.
32895 Adjust size-related commentary accordingly.
32897 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
32899 PR rtl-optimization/108508
32900 * rtl-ssa/accesses.cc (function_info::split_clobber_group): When
32901 the splay tree search gives the first clobber in the second group,
32902 make sure that the root of the first clobber group is updated
32903 correctly. Enter the new clobber group into the definition splay
32906 2023-02-02 Jin Ma <jinma@linux.alibaba.com>
32908 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
32909 Fix finding best match score.
32911 2023-02-02 Jakub Jelinek <jakub@redhat.com>
32914 PR rtl-optimization/108463
32916 * cselib.cc (cselib_current_insn): Move declaration earlier.
32917 (cselib_hasher::equal): For debug only locs, temporarily override
32918 cselib_current_insn to their l->setting_insn for the
32919 rtx_equal_for_cselib_1 call, so that unsuccessful comparisons don't
32920 promote some debug locs.
32921 * sched-deps.cc (sched_analyze_2) <case MEM>: For MEMs in DEBUG_INSNs
32922 when using cselib call cselib_lookup_from_insn on the address but
32923 don't substitute it.
32925 2023-02-02 Richard Biener <rguenther@suse.de>
32927 PR middle-end/108625
32928 * genmatch.cc (expr::gen_transform): Also disallow resimplification
32929 from pushing to lseq with force_leaf.
32930 (dt_simplify::gen_1): Likewise.
32932 2023-02-02 Andrew Stubbs <ams@codesourcery.com>
32934 * config/gcn/gcn-run.cc: Include libgomp-gcn.h.
32935 (struct kernargs): Replace the common content with kernargs_abi.
32936 (struct heap): Delete.
32937 (main): Read GCN_STACK_SIZE envvar.
32938 Allocate space for the device stacks.
32939 Write the new kernargs fields.
32940 * config/gcn/gcn.cc (gcn_option_override): Remove stack_size_opt.
32941 (default_requested_args): Remove PRIVATE_SEGMENT_BUFFER_ARG and
32942 PRIVATE_SEGMENT_WAVE_OFFSET_ARG.
32943 (gcn_addr_space_convert): Mask the QUEUE_PTR_ARG content.
32944 (gcn_expand_prologue): Move the TARGET_PACKED_WORK_ITEMS to the top.
32945 Set up the stacks from the values in the kernargs, not private.
32946 (gcn_expand_builtin_1): Match the stack configuration in the prologue.
32947 (gcn_hsa_declare_function_name): Turn off the private segment.
32948 (gcn_conditional_register_usage): Ensure QUEUE_PTR is fixed.
32949 * config/gcn/gcn.h (FIXED_REGISTERS): Fix the QUEUE_PTR register.
32950 * config/gcn/gcn.opt (mstack-size): Change the description.
32952 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
32955 * config/arm/arm.h (VALID_MVE_PRED_MODE): Add V2QI.
32956 * config/arm/arm.cc (thumb2_legitimate_address_p): Use HImode for
32957 addressing MVE predicate modes.
32958 (mve_bool_vec_to_const): Change to represent correct MVE predicate
32960 (arm_hard_regno_mode_ok): Use VALID_MVE_PRED_MODE instead of checking
32962 (arm_vector_mode_supported_p): Likewise.
32963 (arm_mode_to_pred_mode): Add V2QI.
32964 * config/arm/arm-builtins.cc (UNOP_PRED_UNONE_QUALIFIERS): New
32966 (UNOP_PRED_PRED_QUALIFIERS): New qualifier
32967 (BINOP_PRED_UNONE_PRED_QUALIFIERS): New qualifier.
32968 (v2qi_UP): New macro.
32969 (v4bi_UP): New macro.
32970 (v8bi_UP): New macro.
32971 (v16bi_UP): New macro.
32972 (arm_expand_builtin_args): Make it able to expand the new predicate
32974 * config/arm/arm-modes.def (V2QI): New mode.
32975 * config/arm/arm-simd-builtin-types.def (Pred1x16_t, Pred2x8_t
32976 Pred4x4_t): Remove unused predicate builtin types.
32977 * config/arm/arm_mve.h (__arm_vctp16q, __arm_vctp32q, __arm_vctp64q,
32978 __arm_vctp8q, __arm_vpnot, __arm_vctp8q_m, __arm_vctp64q_m,
32979 __arm_vctp32q_m, __arm_vctp16q_m): Use predicate modes.
32980 * config/arm/arm_mve_builtins.def (vctp16q, vctp32q, vctp64q, vctp8q,
32981 vpnot, vctp8q_m, vctp16q_m, vctp32q_m, vctp64q_m): Likewise.
32982 * config/arm/constraints.md (DB): Check for VALID_MVE_PRED_MODE instead
32983 of MODE_VECTOR_BOOL.
32984 * config/arm/iterators.md (MVE_7, MVE_7_HI): Add V2QI
32985 (MVE_VPRED): Likewise.
32986 (MVE_vpred): Add V2QI and map upper case predicate modes to lower case.
32987 (MVE_vctp): New mode attribute.
32991 * config/arm/mve.md (mve_vctp<mode1>qhi): Rename this...
32992 (mve_vctp<MVE_vctp>q<MVE_vpred>): ... to this. And use new mode
32994 (mve_vpnothi): Rename this...
32995 (mve_vpnotv16bi): ... to this.
32996 (mve_vctp<mode1>q_mhi): Rename this...
32997 (mve_vctp<MVE_vctp>q_m<MVE_vpred>):... to this.
32998 (mve_vldrdq_gather_base_z_<supf>v2di,
32999 mve_vldrdq_gather_offset_z_<supf>v2di,
33000 mve_vldrdq_gather_shifted_offset_z_<supf>v2di,
33001 mve_vstrdq_scatter_base_p_<supf>v2di,
33002 mve_vstrdq_scatter_offset_p_<supf>v2di,
33003 mve_vstrdq_scatter_offset_p_<supf>v2di_insn,
33004 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di,
33005 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn,
33006 mve_vstrdq_scatter_base_wb_p_<supf>v2di,
33007 mve_vldrdq_gather_base_wb_z_<supf>v2di,
33008 mve_vldrdq_gather_base_nowb_z_<supf>v2di,
33009 mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Use V2QI insead of HI for
33011 * config/arm/unspecs.md (VCTP8Q, VCTP16Q, VCTP32Q, VCTP64Q): Replace
33013 (VCTP): ... with this.
33014 (VCTP8Q_M, VCTP16Q_M, VCTP32Q_M, VCTP64Q_M): Replace these...
33015 (VCTP_M): ... with this.
33016 * config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Use
33017 VALID_MVE_PRED_MODE instead of checking for MODE_VECTOR_BOOL class.
33019 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
33022 * config/arm/arm.cc (arm_hard_regno_mode_ok): Use new MACRO.
33023 (arm_modes_tieable_p): Make MVE predicate modes tieable.
33024 * config/arm/arm.h (VALID_MVE_PRED_MODE): New define.
33025 * simplify-rtx.cc (simplify_context::simplify_subreg): Teach
33026 simplify_subreg to simplify subregs where the outermode is not scalar.
33028 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
33031 * config/arm/arm-builtins.cc (arm_simd_builtin_type): Rewrite to use
33032 new qualifiers parameter and use unsigned short type for MVE predicate.
33033 (arm_init_builtin): Call arm_simd_builtin_type with qualifiers
33035 (arm_init_crypto_builtins): Likewise.
33037 2023-02-02 Jakub Jelinek <jakub@redhat.com>
33040 * builtins.def (BUILT_IN_UNREACHABLE_TRAP): New builtin.
33041 * internal-fn.def (TRAP): Remove.
33042 * internal-fn.cc (expand_TRAP): Remove.
33043 * tree.cc (build_common_builtin_nodes): Define
33044 BUILT_IN_UNREACHABLE_TRAP if not yet defined.
33045 (builtin_decl_unreachable): Use BUILT_IN_UNREACHABLE_TRAP
33046 instead of BUILT_IN_TRAP.
33047 * gimple.cc (gimple_build_builtin_unreachable): Remove
33048 emitting internal function for BUILT_IN_TRAP.
33049 * asan.cc (maybe_instrument_call): Handle BUILT_IN_UNREACHABLE_TRAP.
33050 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Handle
33051 BUILT_IN_UNREACHABLE_TRAP instead of BUILT_IN_TRAP.
33052 * ipa-devirt.cc (possible_polymorphic_call_target_p): Handle
33053 BUILT_IN_UNREACHABLE_TRAP.
33054 * builtins.cc (expand_builtin, is_inexpensive_builtin): Likewise.
33055 * tree-cfg.cc (verify_gimple_call,
33056 pass_warn_function_return::execute): Likewise.
33057 * attribs.cc (decl_attributes): Don't report exclusions on
33058 BUILT_IN_UNREACHABLE_TRAP either.
33060 2023-02-02 liuhongt <hongtao.liu@intel.com>
33062 PR tree-optimization/108601
33063 * tree-vectorizer.h (vect_can_peel_nonlinear_iv_p): Removed.
33064 * tree-vect-loop.cc
33065 (vectorizable_nonlinear_induction): Remove
33066 vect_can_peel_nonlinear_iv_p.
33067 (vect_can_peel_nonlinear_iv_p): Don't peel
33068 nonlinear iv(mult or shift) for epilog when vf is not
33069 constant and moved the defination to ..
33070 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
33073 2023-02-02 Jakub Jelinek <jakub@redhat.com>
33075 PR middle-end/108435
33076 * tree-nested.cc (convert_nonlocal_omp_clauses)
33077 <case OMP_CLAUSE_LASTPRIVATE>: If info->new_local_var_chain and *seq
33078 is not a GIMPLE_BIND, wrap the sequence into a new GIMPLE_BIND
33079 before calling declare_vars.
33080 (convert_nonlocal_omp_clauses) <case OMP_CLAUSE_LINEAR>: Merge
33081 with the OMP_CLAUSE_LASTPRIVATE handling except for whether
33082 seq is initialized to &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (clause)
33083 or &OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause).
33085 2023-02-01 Tamar Christina <tamar.christina@arm.com>
33087 * common/config/aarch64/aarch64-common.cc
33088 (struct aarch64_option_extension): Add native_detect and document struct
33090 (all_extensions): Set new field native_detect.
33091 * config/aarch64/aarch64.cc (struct aarch64_option_extension): Delete
33094 2023-02-01 Martin Liska <mliska@suse.cz>
33096 * ipa-devirt.cc (odr_types_equivalent_p): Respect *warned
33099 2023-02-01 Andrew MacLeod <amacleod@redhat.com>
33101 PR tree-optimization/108356
33102 * gimple-range-cache.cc (ranger_cache::range_on_edge): Always
33103 do a search of the DOM tree for a range.
33105 2023-02-01 Martin Liska <mliska@suse.cz>
33108 * cgraphunit.cc (walk_polymorphic_call_targets): Insert
33109 ony non-null values.
33110 * ipa.cc (walk_polymorphic_call_targets): Likewise.
33112 2023-02-01 Martin Liska <mliska@suse.cz>
33115 * gcc.cc (LINK_COMPRESS_DEBUG_SPEC): Report error only for
33118 2023-02-01 Jakub Jelinek <jakub@redhat.com>
33121 * ree.cc (combine_reaching_defs): Don't return false for paradoxical
33122 subregs in DEBUG_INSNs.
33124 2023-02-01 Richard Sandiford <richard.sandiford@arm.com>
33126 * compare-elim.cc (find_flags_uses_in_insn): Guard use of SET_SRC.
33128 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
33130 * config/s390/s390.cc (s390_restore_gpr_p): New function.
33131 (s390_preserve_gpr_arg_in_range_p): New function.
33132 (s390_preserve_gpr_arg_p): New function.
33133 (s390_preserve_fpr_arg_p): New function.
33134 (s390_register_info_stdarg_fpr): Rename to ...
33135 (s390_register_info_arg_fpr): ... this. Add -mpreserve-args handling.
33136 (s390_register_info_stdarg_gpr): Rename to ...
33137 (s390_register_info_arg_gpr): ... this. Add -mpreserve-args handling.
33138 (s390_register_info): Use the renamed functions above.
33139 (s390_optimize_register_info): Likewise.
33140 (save_fpr): Generate CFI for -mpreserve-args.
33141 (save_gprs): Generate CFI for -mpreserve-args. Drop return value.
33142 (s390_emit_prologue): Adjust to changed calling convention of save_gprs.
33143 (s390_optimize_prologue): Likewise.
33144 * config/s390/s390.opt: New option -mpreserve-args
33146 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
33148 * config/s390/s390.cc (save_gprs): Use gen_frame_mem.
33149 (restore_gprs): Likewise.
33150 (s390_emit_stack_tie): Make the stack_tie to be dependent on the
33151 frame pointer if a frame-pointer is used.
33152 (s390_emit_prologue): Emit stack_tie when frame-pointer is needed.
33153 * config/s390/s390.md (stack_tie): Add a register operand and
33155 (@stack_tie<mode>): ... this.
33157 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
33159 * dwarf2cfi.cc (dwarf2out_frame_debug_cfa_restore): Add
33160 EMIT_CFI parameter.
33161 (dwarf2out_frame_debug): Add case for REG_CFA_NORESTORE.
33162 * reg-notes.def (REG_CFA_NOTE): New reg note definition.
33164 2023-02-01 Richard Biener <rguenther@suse.de>
33166 PR middle-end/108500
33167 * dominance.cc (assign_dfs_numbers): Replace recursive DFS
33168 with tree traversal algorithm.
33170 2023-02-01 Jason Merrill <jason@redhat.com>
33172 * doc/invoke.texi: Document -Wno-changes-meaning.
33174 2023-02-01 David Malcolm <dmalcolm@redhat.com>
33176 * doc/invoke.texi (Static Analyzer Options): Add notes about
33177 limitations of -fanalyzer.
33179 2023-01-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33181 * config/riscv/constraints.md (vj): New.
33183 * config/riscv/iterators.md: Add more opcode.
33184 * config/riscv/predicates.md (vector_arith_operand): New.
33185 (vector_neg_arith_operand): New.
33186 (vector_shift_operand): New.
33187 * config/riscv/riscv-vector-builtins-bases.cc (class binop): New.
33188 * config/riscv/riscv-vector-builtins-bases.h: (vadd): New.
33205 * config/riscv/riscv-vector-builtins-functions.def (vadd): New.
33222 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): New.
33223 * config/riscv/riscv-vector-builtins-shapes.h (binop): New.
33224 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New.
33225 (DEF_RVV_U_OPS): New.
33226 (rvv_arg_type_info::get_base_vector_type): Handle
33227 RVV_BASE_shift_vector.
33228 (rvv_arg_type_info::get_tree_type): Ditto.
33229 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add
33230 RVV_BASE_shift_vector.
33231 * config/riscv/riscv.cc (riscv_print_operand): Handle 'V'.
33232 * config/riscv/vector-iterators.md: Handle more opcode.
33233 * config/riscv/vector.md (@pred_<optab><mode>): New.
33235 2023-01-31 Philipp Tomsich <philipp.tomsich@vrull.eu>
33238 * config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Check
33241 2023-01-31 Richard Sandiford <richard.sandiford@arm.com>
33243 PR tree-optimization/108608
33244 * tree-vect-loop.cc (vect_transform_reduction): Handle single
33245 def-use cycles that involve function calls rather than tree codes.
33247 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
33249 PR tree-optimization/108385
33250 * gimple-range-gori.cc (gori_compute::compute_operand_range):
33251 Allow VARYING computations to continue if there is a relation.
33252 * range-op.cc (pointer_plus_operator::op2_range): New.
33254 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
33256 PR tree-optimization/108359
33257 * range-op.cc (range_operator::wi_fold_in_parts_equiv): New.
33258 (range_operator::fold_range): If op1 is equivalent to op2 then
33259 invoke new fold_in_parts_equiv to operate on sub-components.
33260 * range-op.h (wi_fold_in_parts_equiv): New prototype.
33262 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
33264 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
33265 not abort calculations if there is a valid relation available.
33266 (gori_compute::refine_using_relation): Pass correct relation trio.
33267 (gori_compute::compute_operand1_range): Create trio and use it.
33268 (gori_compute::compute_operand2_range): Ditto.
33269 * range-op.cc (operator_plus::op1_range): Use correct trio member.
33270 (operator_minus::op1_range): Use correct trio member.
33271 * value-relation.cc (value_relation::create_trio): New.
33272 * value-relation.h (value_relation::create_trio): New prototype.
33274 2023-01-31 Jakub Jelinek <jakub@redhat.com>
33277 * config/i386/i386-expand.cc
33278 (ix86_convert_const_wide_int_to_broadcast): Return nullptr if
33279 CONST_WIDE_INT_NUNITS (op) times HOST_BITS_PER_WIDE_INT isn't
33280 equal to bitsize of mode.
33282 2023-01-31 Jakub Jelinek <jakub@redhat.com>
33284 PR rtl-optimization/108596
33285 * bb-reorder.cc (fix_up_fall_thru_edges): Handle the case where cur_bb
33286 ends with asm goto and has a crossing fallthrough edge to the same bb
33287 that contains at least one of its labels by restoring EDGE_CROSSING
33288 flag even on possible edge from cur_bb to new_bb successor.
33290 2023-01-31 Jakub Jelinek <jakub@redhat.com>
33293 * config/i386/avx512erintrin.h (_mm512_exp2a23_round_pd,
33294 _mm512_exp2a23_round_ps, _mm512_rcp28_round_pd, _mm512_rcp28_round_ps,
33295 _mm512_rsqrt28_round_pd, _mm512_rsqrt28_round_ps): Use
33296 _mm512_undefined_pd () or _mm512_undefined_ps () instead of using
33297 uninitialized automatic variable __W.
33299 2023-01-31 Gerald Pfeifer <gerald@pfeifer.com>
33301 * doc/include/fdl.texi: Change fsf.org to www.fsf.org.
33303 2023-01-30 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33305 * config/riscv/riscv-protos.h (get_vector_mode): New function.
33306 * config/riscv/riscv-v.cc (get_vector_mode): Ditto.
33307 * config/riscv/riscv-vector-builtins-bases.cc (enum lst_type): New enum.
33308 (class loadstore): Adjust for indexed loads/stores support.
33310 * config/riscv/riscv-vector-builtins-bases.h: New function declare.
33311 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Ditto.
33327 * config/riscv/riscv-vector-builtins-shapes.cc
33328 (struct indexed_loadstore_def): New class.
33330 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
33331 * config/riscv/riscv-vector-builtins.cc (required_extensions_p): Adjust
33332 for indexed loads/stores support.
33333 (check_required_extensions): Ditto.
33334 (rvv_arg_type_info::get_base_vector_type): New function.
33335 (rvv_arg_type_info::get_tree_type): Ditto.
33336 (function_builder::add_unique_function): Adjust for indexed loads/stores
33338 (function_expander::use_exact_insn): New function.
33339 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Adjust for
33340 indexed loads/stores support.
33341 (struct rvv_arg_type_info): Ditto.
33342 (function_expander::index_mode): New function.
33343 (function_base::apply_tail_policy_p): Ditto.
33344 (function_base::apply_mask_policy_p): Ditto.
33345 * config/riscv/vector-iterators.md (unspec): New unspec.
33346 * config/riscv/vector.md (unspec): Ditto.
33347 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New
33349 (@pred_indexed_<order>store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
33350 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
33351 (@pred_indexed_<order>store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
33352 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
33353 (@pred_indexed_<order>store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
33354 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
33355 (@pred_indexed_<order>store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
33356 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
33357 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
33358 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
33359 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
33360 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
33361 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
33363 2023-01-30 Flavio Cruz <flaviocruz@gmail.com>
33365 * config.gcc: Recognize x86_64-*-gnu* targets and include
33367 * config/i386/gnu64.h: Define configuration for new target
33368 including ld.so location.
33370 2023-01-30 Philipp Tomsich <philipp.tomsich@vrull.eu>
33372 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update
33373 ampere1a to include SM4.
33375 2023-01-30 Andrew Pinski <apinski@marvell.com>
33377 PR tree-optimization/108582
33378 * tree-ssa-phiopt.cc (match_simplify_replacement): Add check
33379 for middlebb to have no phi nodes.
33381 2023-01-30 Richard Biener <rguenther@suse.de>
33383 PR tree-optimization/108574
33384 * tree-ssa-sccvn.cc (visit_phi): Instead of swapping
33385 sameval and def, ignore the equivalence if there's the
33386 danger of oscillating between two values.
33388 2023-01-30 Andreas Schwab <schwab@suse.de>
33390 * common/config/riscv/riscv-common.cc
33391 (riscv_option_optimization_table)
33392 [TARGET_DEFAULT_ASYNC_UNWIND_TABLES]: Enable
33393 -fasynchronous-unwind-tables and -funwind-tables.
33394 * config.gcc (riscv*-*-linux*): Define
33395 TARGET_DEFAULT_ASYNC_UNWIND_TABLES.
33397 2023-01-30 YunQiang Su <yunqiang.su@cipunited.com>
33399 * Makefile.in (CROSS_SYSTEM_HEADER_DIR): set according the
33400 value of includedir.
33402 2023-01-30 Richard Biener <rguenther@suse.de>
33405 * cgraph.cc (possibly_call_in_translation_unit_p): Relax
33408 2023-01-30 liuhongt <hongtao.liu@intel.com>
33410 * config/i386/i386.opt: Change AVX512FP16 to AVX512-FP16.
33411 * doc/invoke.texi: Ditto.
33413 2023-01-29 Jan Hubicka <hubicka@ucw.cz>
33415 * ipa-utils.cc: Include calls.h, cfgloop.h and cfganal.h
33416 (stmt_may_terminate_function_p): If assuming return or EH
33417 volatile asm is safe.
33418 (find_always_executed_bbs): Fix handling of terminating BBS and
33419 infinite loops; add debug output.
33420 * tree-ssa-alias.cc (stmt_kills_ref_p): Fix debug output
33422 2023-01-28 Philipp Tomsich <philipp.tomsich@vrull.eu>
33424 * config/aarch64/aarch64.cc (aarch64_uxt_size): fix an
33425 off-by-one in checking the permissible shift-amount.
33427 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
33429 * doc/extend.texi (Named Address Spaces): Update link to the
33432 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
33434 * doc/standards.texi (Standards): Fix markup.
33436 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
33438 * doc/standards.texi (Standards): Update link to Objective-C book.
33440 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
33442 * doc/invoke.texi (Instrumentation Options): Update reference to
33445 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
33447 * doc/standards.texi: Update Go1 link.
33449 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33451 * config/riscv/predicates.md (pmode_reg_or_0_operand): New predicate.
33452 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore):
33455 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33456 * config/riscv/riscv-vector-builtins-functions.def (vlse): New class.
33458 * config/riscv/riscv-vector-builtins.cc
33459 (function_expander::use_contiguous_load_insn): Support vlse/vsse.
33460 * config/riscv/vector.md (@pred_strided_load<mode>): New md pattern.
33461 (@pred_strided_store<mode>): Ditto.
33463 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33465 * config/riscv/vector.md (tail_policy_op_idx): Remove.
33466 (mask_policy_op_idx): Remove.
33467 (avl_type_op_idx): Remove.
33469 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
33471 PR tree-optimization/96373
33472 * tree.h (sign_mask_for): Declare.
33473 * tree.cc (sign_mask_for): New function.
33474 (signed_or_unsigned_type_for): For vector types, try to use the
33475 related_int_vector_mode.
33476 * genmatch.cc (commutative_op): Handle conditional internal functions.
33477 * match.pd: Fold an IFN_COND_MUL+copysign into an IFN_COND_XOR+and.
33479 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
33481 * tree-vectorizer.cc (vector_costs::compare_inside_loop_cost):
33482 Use the likely minimum VF when bounding the denominators to
33483 the estimated number of iterations.
33485 2023-01-27 Richard Biener <rguenther@suse.de>
33488 * doc/invoke.texi (-shared): Clarify effect on -ffast-math
33489 and -Ofast FP environment side-effects.
33491 2023-01-27 Richard Biener <rguenther@suse.de>
33494 * config/mips/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
33495 Don't add crtfastmath.o for -shared.
33497 2023-01-27 Richard Biener <rguenther@suse.de>
33500 * config/ia64/linux.h (ENDFILE_SPEC): Don't add crtfastmath.o
33503 2023-01-27 Richard Biener <rguenther@suse.de>
33506 * config/alpha/linux.h (ENDFILE_SPEC): Don't add
33507 crtfastmath.o for -shared.
33509 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
33511 PR tree-optimization/108306
33512 * range-op.cc (operator_lshift::fold_range): Return [0, 0] not
33513 varying for shifts that are always out of void range.
33514 (operator_rshift::fold_range): Return [0, 0] not
33515 varying for shifts that are always out of void range.
33517 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
33519 PR tree-optimization/108447
33520 * gimple-range-fold.cc (old_using_range::relation_fold_and_or):
33521 Do not attempt to fold HONOR_NAN types.
33523 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33525 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def):
33526 Remove _m suffix for "vop_m" C++ overloaded API name.
33528 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33530 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add vlm/vsm support.
33531 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33532 * config/riscv/riscv-vector-builtins-functions.def (vlm): New define.
33534 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def): Add vlm/vsm support.
33535 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_B_OPS): Ditto.
33536 (vbool64_t): Ditto.
33537 (vbool32_t): Ditto.
33538 (vbool16_t): Ditto.
33543 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_B_OPS): Ditto.
33544 (rvv_arg_type_info::get_tree_type): Ditto.
33545 (function_expander::use_contiguous_load_insn): Ditto.
33546 * config/riscv/vector.md (@pred_store<mode>): Ditto.
33548 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33550 * config/riscv/riscv-vsetvl.cc (vsetvl_insn_p): Add condition to avoid ICE.
33551 (vsetvl_discard_result_insn_p): New function.
33552 (reg_killed_by_bb_p): rename to find_reg_killed_by.
33553 (find_reg_killed_by): New name.
33554 (get_vl): allow it to be called by more functions.
33555 (has_vsetvl_killed_avl_p): Add condition.
33556 (get_avl): allow it to be called by more functions.
33557 (insn_should_be_added_p): New function.
33558 (get_all_nonphi_defs): Refine function.
33559 (get_all_sets): Ditto.
33560 (get_same_bb_set): New function.
33561 (any_insn_in_bb_p): Ditto.
33562 (any_set_in_bb_p): Ditto.
33563 (get_vl_vtype_info): Add VLMAX forward optimization.
33564 (source_equal_p): Fix issues.
33565 (extract_single_source): Refine.
33566 (avl_info::multiple_source_equal_p): New function.
33567 (avl_info::operator==): Adjust for final version.
33568 (vl_vtype_info::operator==): Ditto.
33569 (vl_vtype_info::same_avl_p): Ditto.
33570 (vector_insn_info::parse_insn): Ditto.
33571 (vector_insn_info::available_p): New function.
33572 (vector_insn_info::merge): Adjust for final version.
33573 (vector_insn_info::dump): Add hard_empty.
33574 (pass_vsetvl::hard_empty_block_p): New function.
33575 (pass_vsetvl::backward_demand_fusion): Adjust for final version.
33576 (pass_vsetvl::forward_demand_fusion): Ditto.
33577 (pass_vsetvl::demand_fusion): Ditto.
33578 (pass_vsetvl::cleanup_illegal_dirty_blocks): New function.
33579 (pass_vsetvl::compute_local_properties): Adjust for final version.
33580 (pass_vsetvl::can_refine_vsetvl_p): Ditto.
33581 (pass_vsetvl::refine_vsetvls): Ditto.
33582 (pass_vsetvl::commit_vsetvls): Ditto.
33583 (pass_vsetvl::propagate_avl): New function.
33584 (pass_vsetvl::lazy_vsetvl): Adjust for new version.
33585 * config/riscv/riscv-vsetvl.h (enum def_type): New enum.
33587 2023-01-27 Jakub Jelinek <jakub@redhat.com>
33590 * doc/extend.texi: Fix up return type of __builtin_va_arg_pack_len
33591 from size_t to int.
33593 2023-01-27 Jakub Jelinek <jakub@redhat.com>
33596 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Allow
33597 redirection of calls to __builtin_trap in addition to redirection
33598 to __builtin_unreachable.
33600 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33602 * config/riscv/riscv-vsetvl.cc (before_p): Fix bug.
33604 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33606 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function args.
33607 (emit_vsetvl_insn): Ditto.
33609 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33611 * config/riscv/vector.md: Fix constraints.
33613 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33615 * config/riscv/vector-iterators.md: Add TARGET_MIN_VLEN > 32 predicates.
33617 2023-01-27 Patrick Palka <ppalka@redhat.com>
33618 Jakub Jelinek <jakub@redhat.com>
33620 * tree-core.h (tree_code_type, tree_code_length): For
33621 C++17 and later, add inline keyword, otherwise don't define
33622 the arrays, but declare extern arrays.
33623 * tree.cc (tree_code_type, tree_code_length): Define these
33624 arrays for C++14 and older.
33626 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33628 * config/riscv/riscv-vsetvl.h: Change it into public.
33630 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33632 * config/riscv/riscv-passes.def (INSERT_PASS_BEFORE): Reorder VSETVL
33635 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33637 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::execute): Always call split_all_insns.
33639 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33641 * config/riscv/vector.md: Fix incorrect attributes.
33643 2023-01-27 Richard Biener <rguenther@suse.de>
33646 * config/loongarch/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
33647 Don't add crtfastmath.o for -shared.
33649 2023-01-27 Alexandre Oliva <oliva@gnu.org>
33651 * doc/options.texi (option, RejectNegative): Mention that
33652 -g-started options are also implicitly negatable.
33654 2023-01-26 Kito Cheng <kito.cheng@sifive.com>
33656 * config/riscv/riscv-vector-builtins.cc (register_builtin_types):
33657 Use get_typenode_from_name to get fixed-width integer type
33659 * config/riscv/riscv-vector-builtins.def: Update define with
33660 fixed-width integer type nodes.
33662 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33664 * config/riscv/riscv-vsetvl.cc (same_bb_and_before_p): Remove it.
33665 (real_insn_and_same_bb_p): New function.
33666 (same_bb_and_after_or_equal_p): Remove it.
33667 (before_p): New function.
33668 (reg_killed_by_bb_p): Ditto.
33669 (has_vsetvl_killed_avl_p): Ditto.
33670 (get_vl): Move location so that we can call it.
33671 (anticipatable_occurrence_p): Fix issue of AVL=REG support.
33672 (available_occurrence_p): Ditto.
33673 (dominate_probability_p): Remove it.
33674 (can_backward_propagate_p): Remove it.
33675 (get_all_nonphi_defs): New function.
33676 (get_all_predecessors): Ditto.
33677 (any_insn_in_bb_p): Ditto.
33678 (insert_vsetvl): Adjust AVL REG.
33679 (source_equal_p): New function.
33680 (extract_single_source): Ditto.
33681 (avl_info::single_source_equal_p): Ditto.
33682 (avl_info::operator==): Adjust for AVL=REG.
33683 (vl_vtype_info::same_avl_p): Ditto.
33684 (vector_insn_info::set_demand_info): Remove it.
33685 (vector_insn_info::compatible_p): Adjust for AVL=REG.
33686 (vector_insn_info::compatible_avl_p): New function.
33687 (vector_insn_info::merge): Adjust AVL=REG.
33688 (vector_insn_info::dump): Ditto.
33689 (pass_vsetvl::merge_successors): Remove it.
33690 (enum fusion_type): New enum.
33691 (pass_vsetvl::get_backward_fusion_type): New function.
33692 (pass_vsetvl::backward_demand_fusion): Adjust for AVL=REG.
33693 (pass_vsetvl::forward_demand_fusion): Ditto.
33694 (pass_vsetvl::demand_fusion): Ditto.
33695 (pass_vsetvl::prune_expressions): Ditto.
33696 (pass_vsetvl::compute_local_properties): Ditto.
33697 (pass_vsetvl::cleanup_vsetvls): Ditto.
33698 (pass_vsetvl::commit_vsetvls): Ditto.
33699 (pass_vsetvl::init): Ditto.
33700 * config/riscv/riscv-vsetvl.h (enum fusion_type): New enum.
33701 (enum merge_type): New enum.
33703 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33705 * config/riscv/riscv-vsetvl.cc
33706 (vector_infos_manager::vector_infos_manager): Add probability.
33707 (vector_infos_manager::dump): Ditto.
33708 (pass_vsetvl::compute_probabilities): Ditto.
33709 * config/riscv/riscv-vsetvl.h (struct vector_block_info): Ditto.
33711 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33713 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Remove dirty_pat.
33714 (vector_insn_info::merge): Ditto.
33715 (vector_insn_info::dump): Ditto.
33716 (pass_vsetvl::merge_successors): Ditto.
33717 (pass_vsetvl::backward_demand_fusion): Ditto.
33718 (pass_vsetvl::forward_demand_fusion): Ditto.
33719 (pass_vsetvl::commit_vsetvls): Ditto.
33720 * config/riscv/riscv-vsetvl.h: Ditto.
33722 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33724 * config/riscv/riscv-vsetvl.cc (add_label_notes): Rename insn to
33727 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33729 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion): Refine codes.
33731 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33733 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::forward_demand_fusion):
33734 Add pre-check for redundant flow.
33736 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33738 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::create_bitmap_vectors): New function.
33739 (vector_infos_manager::free_bitmap_vectors): Ditto.
33740 (pass_vsetvl::pre_vsetvl): Adjust codes.
33741 * config/riscv/riscv-vsetvl.h: New function declaration.
33743 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33745 * config/riscv/riscv-vsetvl.cc (can_backward_propagate_p): Fix for null iter_bb.
33746 (vector_insn_info::set_demand_info): New function.
33747 (pass_vsetvl::emit_local_forward_vsetvls): Adjust for refinement of Phase 3.
33748 (pass_vsetvl::merge_successors): Ditto.
33749 (pass_vsetvl::compute_global_backward_infos): Ditto.
33750 (pass_vsetvl::backward_demand_fusion): Ditto.
33751 (pass_vsetvl::forward_demand_fusion): Ditto.
33752 (pass_vsetvl::demand_fusion): New function.
33753 (pass_vsetvl::lazy_vsetvl): Adjust for refinement of phase 3.
33754 * config/riscv/riscv-vsetvl.h: New function declaration.
33756 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33758 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator>=): Fix available condition.
33760 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33762 * config/riscv/riscv-vsetvl.cc (change_vsetvl_insn): New function.
33763 (pass_vsetvl::compute_global_backward_infos): Simplify codes.
33765 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33767 * config/riscv/riscv-vsetvl.cc (loop_basic_block_p): Adjust function.
33768 (backward_propagate_worthwhile_p): Fix non-worthwhile.
33770 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33772 * config/riscv/riscv-vsetvl.cc (change_insn): Adjust in_group in validate_change.
33774 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33776 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::all_same_avl_p): New function.
33777 (pass_vsetvl::can_refine_vsetvl_p): Add AVL check.
33778 (pass_vsetvl::commit_vsetvls): Ditto.
33779 * config/riscv/riscv-vsetvl.h: New function declaration.
33781 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33783 * config/riscv/vector.md:
33785 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33787 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore): use
33788 pred_store for vse.
33789 * config/riscv/riscv-vector-builtins.cc
33790 (function_expander::add_mem_operand): Refine function.
33791 (function_expander::use_contiguous_load_insn): Adjust new
33793 (function_expander::use_contiguous_store_insn): Ditto.
33794 * config/riscv/riscv-vector-builtins.h: Refine function.
33795 * config/riscv/vector.md (@pred_store<mode>): New pattern.
33797 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33799 * config/riscv/riscv-vector-builtins.cc: Change to scalar pointer.
33801 2023-01-26 Marek Polacek <polacek@redhat.com>
33803 PR middle-end/108543
33804 * opts.cc (parse_sanitizer_options): Don't always clear SANITIZE_ADDRESS
33805 if it was previously set.
33807 2023-01-26 Jakub Jelinek <jakub@redhat.com>
33809 PR tree-optimization/108540
33810 * range-op-float.cc (foperator_equal::fold_range): If both op1 and op2
33811 are singletons, use range_true even if op1 != op2
33812 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
33813 even if intersection of the ranges is empty and one has
33814 zero low bound and another zero high bound, use range_true_and_false
33815 rather than range_false.
33816 (foperator_not_equal::fold_range): If both op1 and op2
33817 are singletons, use range_false even if op1 != op2
33818 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
33819 even if intersection of the ranges is empty and one has
33820 zero low bound and another zero high bound, use range_true_and_false
33821 rather than range_true.
33823 2023-01-26 Jakub Jelinek <jakub@redhat.com>
33825 * value-relation.cc (kind_string): Add const.
33826 (rr_negate_table, rr_swap_table, rr_intersect_table,
33827 rr_union_table, rr_transitive_table): Add static const, change
33828 element type from relation_kind to unsigned char.
33829 (relation_negate, relation_swap, relation_intersect, relation_union,
33830 relation_transitive): Cast rr_*_table element to relation_kind.
33831 (relation_to_code): Add static const.
33832 (relation_tests): Assert VREL_LAST is smaller than UCHAR_MAX.
33834 2023-01-26 Richard Biener <rguenther@suse.de>
33836 PR tree-optimization/108547
33837 * gimple-predicate-analysis.cc (value_sat_pred_p):
33840 2023-01-26 Siddhesh Poyarekar <siddhesh@gotplt.org>
33842 PR tree-optimization/108522
33843 * tree-object-size.cc (compute_object_offset): Make EXPR
33844 argument non-const. Call component_ref_field_offset.
33846 2023-01-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33848 * config/aarch64/aarch64-option-extensions.def (cssc): Specify
33849 FEATURE_STRING field.
33851 2023-01-26 Gerald Pfeifer <gerald@pfeifer.com>
33853 * doc/sourcebuild.texi: Refer to projects as GCC and GDB.
33855 2023-01-25 Iain Sandoe <iain@sandoe.co.uk>
33859 * gcc.cc: Provide default specs for Modula-2 so that when the
33860 language is not built-in better diagnostics are emitted for
33861 attempts to use .mod or .m2i file extensions.
33863 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
33865 * config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing.
33867 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
33869 * config/arm/mve.md (mve_vqabsq_s<mode>): Fix spacing.
33871 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
33873 * config/arm/mve.md (mve_vnegq_f<mode>, mve_vnegq_s<mode>):
33876 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
33878 * config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing.
33880 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
33882 * config/arm/mve.md (mve_vclsq_s<mode>): Fix spacing.
33884 2023-01-25 Richard Biener <rguenther@suse.de>
33886 PR tree-optimization/108523
33887 * tree-ssa-sccvn.cc (visit_phi): Avoid using the exclusive
33888 backedge value for the result when using predication to
33891 2023-01-25 Richard Biener <rguenther@suse.de>
33893 * doc/lto.texi (Command line options): Reword and update reference
33894 to removed lto_read_all_file_options.
33896 2023-01-25 Richard Sandiford <richard.sandiford@arm.com>
33898 * config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC
33901 2023-01-25 Gerald Pfeifer <gerald@pfeifer.com>
33903 * doc/contrib.texi: Add Jose E. Marchesi.
33905 2023-01-25 Jakub Jelinek <jakub@redhat.com>
33907 PR tree-optimization/108498
33908 * gimple-ssa-store-merging.cc (class store_operand_info):
33909 End coment with full stop rather than comma.
33910 (split_group): Likewise.
33911 (merged_store_group::apply_stores): Clear string_concatenation if
33912 start or end aren't on a byte boundary.
33914 2023-01-25 Siddhesh Poyarekar <siddhesh@gotplt.org>
33915 Jakub Jelinek <jakub@redhat.com>
33917 PR tree-optimization/108522
33918 * tree-object-size.cc (compute_object_offset): Use
33919 TREE_OPERAND(ref, 2) for COMPONENT_REF when available.
33921 2023-01-24 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
33923 * config/xtensa/xtensa.md:
33924 Fix exit from loops detecting references before overwriting in the
33927 2023-01-24 Vladimir N. Makarov <vmakarov@redhat.com>
33929 * lra-constraints.cc (get_hard_regno): Remove final_p arg. Always
33930 do elimination but only for hard register.
33931 (operands_match_p, uses_hard_regs_p, process_alt_operands): Adjust
33932 calls of get_hard_regno.
33934 2023-01-24 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
33936 * config/s390/s390-d.cc (s390_d_target_versions): Fix detection
33939 2023-01-24 Andre Vieira <andre.simoesdiasvieira@arm.com>
33942 * config/arm/mve.md (mve_vstrbq_p_<supf><mode>, mve_vstrhq_p_fv8hf,
33943 mve_vstrhq_p_<supf><mode>, mve_vstrwq_p_<supf>v4si): Add memory operand
33946 2023-01-24 Xianmiao Qu <cooper.qu@linux.alibaba.com>
33948 * config.gcc(csky-*-linux*): Define CSKY_ENABLE_MULTILIB
33949 and only include 'csky/t-csky-linux' when enable multilib.
33950 * config/csky/csky-linux-elf.h(SYSROOT_SUFFIX_SPEC): Don't
33951 define it when disable multilib.
33953 2023-01-24 Richard Biener <rguenther@suse.de>
33955 PR tree-optimization/108500
33956 * dominance.h (calculate_dominance_info): Add parameter
33957 to indicate fast-query compute, defaulted to true.
33958 * dominance.cc (calculate_dominance_info): Honor
33959 fast-query compute parameter.
33960 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Do
33961 not compute the dominator fast-query DFS numbers.
33963 2023-01-24 Eric Biggers <ebiggers@google.com>
33966 * optc-save-gen.awk: Fix copy-and-paste error.
33968 2023-01-24 Jakub Jelinek <jakub@redhat.com>
33971 * cgraphbuild.cc: Include gimplify.h.
33972 (record_reference): Replace VAR_DECLs with DECL_HAS_VALUE_EXPR_P with
33973 their corresponding DECL_VALUE_EXPR expressions after unsharing.
33975 2023-01-24 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
33978 * config.gcc (tm_file): Move the variable out of loop.
33980 2023-01-24 Lulu Cheng <chenglulu@loongson.cn>
33981 Yang Yujie <yangyujie@loongson.cn>
33984 * config/loongarch/loongarch.cc (loongarch_classify_address):
33985 Add precessint for CONST_INT.
33986 (loongarch_print_operand_reloc): Operand modifier 'c' is supported.
33987 (loongarch_print_operand): Increase the processing of '%c'.
33988 * doc/extend.texi: Adds documents for LoongArch operand modifiers.
33989 And port the public operand modifiers information to this document.
33991 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
33993 * doc/invoke.texi (-mbranch-protection): Update documentation.
33995 2023-01-23 Richard Biener <rguenther@suse.de>
33998 * config/sparc/freebsd.h (ENDFILE_SPEC): Don't add crtfastmath.o
34000 * config/sparc/linux.h (ENDFILE_SPEC): Likewise.
34001 * config/sparc/linux64.h (ENDFILE_SPEC): Likewise.
34002 * config/sparc/sp-elf.h (ENDFILE_SPEC): Likewise.
34003 * config/sparc/sp64-elf.h (ENDFILE_SPEC): Likewise.
34005 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
34007 * config/arm/aout.h (ra_auth_code): Add entry in enum.
34008 * config/arm/arm.cc (emit_multi_reg_push): Add RA_AUTH_CODE register
34009 to dwarf frame expression.
34010 (arm_emit_multi_reg_pop): Restore RA_AUTH_CODE register.
34011 (arm_expand_prologue): Update frame related information and reg notes
34012 for pac/pacbit insn.
34013 (arm_regno_class): Check for pac pseudo reigster.
34014 (arm_dbx_register_number): Assign ra_auth_code register number in dwarf.
34015 (arm_init_machine_status): Set pacspval_needed to zero.
34016 (arm_debugger_regno): Check for PAC register.
34017 (arm_unwind_emit_sequence): Print .save directive with ra_auth_code
34019 (arm_unwind_emit_set): Add entry for IP_REGNUM in switch case.
34020 (arm_unwind_emit): Update REG_CFA_REGISTER case._
34021 * config/arm/arm.h (FIRST_PSEUDO_REGISTER): Modify.
34022 (DWARF_PAC_REGNUM): Define.
34023 (IS_PAC_REGNUM): Likewise.
34024 (enum reg_class): Add PAC_REG entry.
34025 (machine_function): Add pacbti_needed state to structure.
34026 * config/arm/arm.md (RA_AUTH_CODE): Define.
34028 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
34030 * config.gcc ($tm_file): Update variable.
34031 * config/arm/arm-mlib.h: Create new header file.
34032 * config/arm/t-rmprofile (MULTI_ARCH_DIRS_RM): Rename mbranch-protection
34033 multilib arch directory.
34034 (MULTILIB_REUSE): Add multilib reuse rules.
34035 (MULTILIB_MATCHES): Add multilib match rules.
34037 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
34039 * config/arm/arm-cpus.in (cortex-m85): Define new CPU.
34040 * config/arm/arm-tables.opt: Regenerate.
34041 * config/arm/arm-tune.md: Likewise.
34042 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m85.
34043 * (-mfix-cmse-cve-2021-35465): Likewise.
34045 2023-01-23 Richard Biener <rguenther@suse.de>
34047 PR tree-optimization/108482
34048 * tree-vect-generic.cc (expand_vector_operations): Fold remaining
34049 .LOOP_DIST_ALIAS calls.
34051 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
34053 * config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object.
34054 * config/arm/arm-protos.h: Update.
34055 * config/arm/aarch-common-protos.h: Declare
34056 'aarch_bti_arch_check'.
34057 * config/arm/arm.cc (aarch_bti_enabled) Update.
34058 (aarch_bti_j_insn_p, aarch_pac_insn_p, aarch_gen_bti_c)
34059 (aarch_gen_bti_j, aarch_bti_arch_check): New functions.
34060 * config/arm/arm.md (bti_nop): New insn.
34061 * config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'.
34062 (aarch-bti-insert.o): New target.
34063 * config/arm/unspecs.md (VUNSPEC_BTI_NOP): New unspec.
34064 * config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Verify arch
34066 (gate): Make use of 'aarch_bti_arch_check'.
34067 * config/arm/arm-passes.def: New file.
34068 * config/aarch64/aarch64.cc (aarch_bti_arch_check): New function.
34070 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
34072 * config.gcc (aarch64*-*-*): Rename 'aarch64-bti-insert.o' into
34073 'aarch-bti-insert.o'.
34074 * config/aarch64/aarch64-protos.h: Remove 'aarch64_bti_enabled'
34076 * config/aarch64/aarch64.cc (aarch_bti_enabled): Rename.
34077 (aarch_bti_j_insn_p, aarch_pac_insn_p): New functions.
34078 (aarch64_output_mi_thunk)
34079 (aarch64_print_patchable_function_entry)
34080 (aarch64_file_end_indicate_exec_stack): Update renamed function
34081 calls to renamed functions.
34082 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
34083 * config/aarch64/t-aarch64 (aarch-bti-insert.o): Update
34085 * config/aarch64/aarch64-bti-insert.cc: Delete.
34086 * config/arm/aarch-bti-insert.cc: New file including and
34087 generalizing code from aarch64-bti-insert.cc.
34088 * config/arm/aarch-common-protos.h: Update.
34090 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
34092 * config/arm/arm.h (arm_arch8m_main): Declare it.
34093 * config/arm/arm-protos.h (arm_current_function_pac_enabled_p):
34095 * config/arm/arm.cc (arm_arch8m_main): Define it.
34096 (arm_option_reconfigure_globals): Set arm_arch8m_main.
34097 (arm_compute_frame_layout, arm_expand_prologue)
34098 (thumb2_expand_return, arm_expand_epilogue)
34099 (arm_conditional_register_usage): Update for pac codegen.
34100 (arm_current_function_pac_enabled_p): New function.
34101 (aarch_bti_enabled) New function.
34102 (use_return_insn): Return zero when pac is enabled.
34103 * config/arm/arm.md (pac_ip_lr_sp, pacbti_ip_lr_sp, aut_ip_lr_sp):
34105 * config/arm/unspecs.md (UNSPEC_PAC_NOP)
34106 (VUNSPEC_PACBTI_NOP, VUNSPEC_AUT_NOP): Add unspecs.
34108 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
34110 * config/arm/t-rmprofile: Add multilib rules for march +pacbti and
34111 mbranch-protection.
34113 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
34114 Tejas Belagod <tbelagod@arm.com>
34116 * config/arm/arm.cc (arm_file_start): Emit EABI attributes for
34117 Tag_PAC_extension, Tag_BTI_extension, TAG_BTI_use, TAG_PACRET_use.
34119 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
34120 Tejas Belagod <tbelagod@arm.com>
34121 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
34123 * ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce
34124 new pseudo register class _UVRSC_PAC.
34126 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
34127 Tejas Belagod <tbelagod@arm.com>
34129 * config/arm/arm-c.cc (arm_cpu_builtins): Define
34130 __ARM_FEATURE_BTI_DEFAULT, __ARM_FEATURE_PAC_DEFAULT,
34131 __ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI.
34133 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
34134 Tejas Belagod <tbelagod@arm.com>
34136 * doc/sourcebuild.texi: Document arm_pacbti_hw.
34138 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
34139 Tejas Belagod <tbelagod@arm.com>
34140 Richard Earnshaw <Richard.Earnshaw@arm.com>
34142 * config/arm/arm.cc (arm_configure_build_target): Parse and validate
34143 -mbranch-protection option and initialize appropriate data structures.
34144 * config/arm/arm.opt (-mbranch-protection): New option.
34145 * doc/invoke.texi (Arm Options): Document it.
34147 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
34148 Tejas Belagod <tbelagod@arm.com>
34150 * config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
34151 * config/arm/arm-cpus.in (pacbti): New feature.
34152 * doc/invoke.texi (Arm Options): Document it.
34154 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
34155 Tejas Belagod <tbelagod@arm.com>
34157 * common/config/aarch64/aarch64-common.cc: Include aarch-common.h.
34158 (all_architectures): Fix comment.
34159 (aarch64_parse_extension): Rename return type, enum value names.
34160 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Rename
34161 factored out aarch_ra_sign_scope and aarch_ra_sign_key variables.
34162 Also rename corresponding enum values.
34163 * config/aarch64/aarch64-opts.h (aarch64_function_type): Factor
34164 out aarch64_function_type and move it to common code as
34165 aarch_function_type in aarch-common.h.
34166 * config/aarch64/aarch64-protos.h: Include common types header,
34167 move out types aarch64_parse_opt_result and aarch64_key_type to
34169 * config/aarch64/aarch64.cc: Move mbranch-protection parsing types
34170 and functions out into aarch-common.h and aarch-common.cc. Fix up
34171 all the name changes resulting from the move.
34172 * config/aarch64/aarch64.md: Fix up aarch64_ra_sign_key type name change
34174 * config/aarch64/aarch64.opt: Include aarch-common.h to import
34175 type move. Fix up name changes from factoring out common code and
34177 * config/arm/aarch-common-protos.h: Export factored out routines to both
34179 * config/arm/aarch-common.cc: Include newly factored out types.
34180 Move all mbranch-protection code and data structures from
34182 * config/arm/aarch-common.h: New header that declares types shared
34183 between aarch32 and aarch64 backends.
34184 * config/arm/arm-protos.h: Declare types and variables that are
34185 made common to aarch64 and aarch32 backends - aarch_ra_sign_key,
34186 aarch_ra_sign_scope and aarch_enable_bti.
34187 * config/arm/arm.opt (config/arm/aarch-common.h): Include header.
34188 (aarch_ra_sign_scope, aarch_enable_bti): Declare variable.
34189 * config/arm/arm.cc: Add missing includes.
34191 2023-01-23 Tobias Burnus <tobias@codesourcery.com>
34193 * doc/install.texi (amdgcn, nvptx): Require newlib 4.3.0.
34195 2023-01-23 Richard Biener <rguenther@suse.de>
34197 PR tree-optimization/108449
34198 * cgraphunit.cc (check_global_declaration): Do not turn
34199 undefined statics into externs.
34201 2023-01-22 Dimitar Dimitrov <dimitar@dinux.eu>
34203 * config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Fix value for QI
34204 and HI input modes.
34205 * config/pru/pru.md (clz): Fix generated code for QI and HI
34208 2023-01-22 Cupertino Miranda <cupertino.miranda@oracle.com>
34210 * config/v850/v850.cc (v850_select_section): Put const volatile
34211 objects into read-only sections.
34213 2023-01-20 Tejas Belagod <tejas.belagod@arm.com>
34215 * config/aarch64/arm_neon.h (vmull_p64, vmull_high_p64, vaeseq_u8,
34216 vaesdq_u8, vaesmcq_u8, vaesimcq_u8): Gate under "nothing+aes".
34217 (vsha1*_u32, vsha256*_u32): Gate under "nothing+sha2".
34219 2023-01-20 Jakub Jelinek <jakub@redhat.com>
34221 PR tree-optimization/108457
34222 * tree-ssa-loop-niter.cc (build_cltz_expr): Use
34223 SCALAR_INT_TYPE_MODE (utype) directly as C[LT]Z_DEFINED_VALUE_AT_ZERO
34224 argument instead of a temporary. Formatting fixes.
34226 2023-01-19 Jakub Jelinek <jakub@redhat.com>
34228 PR tree-optimization/108447
34229 * value-relation.cc (rr_union_table): Fix VREL_UNDEFINED row order.
34230 (relation_tests): Add self-tests for relation_{intersect,union}
34232 * selftest.h (relation_tests): Declare.
34233 * function-tests.cc (test_ranges): Call it.
34235 2023-01-19 H.J. Lu <hjl.tools@gmail.com>
34238 * config/i386/i386-expand.cc (ix86_expand_builtin): Check
34239 invalid third argument to __builtin_ia32_prefetch.
34241 2023-01-19 Jakub Jelinek <jakub@redhat.com>
34243 PR middle-end/108459
34244 * omp-expand.cc (expand_omp_for_init_counts): Use fold_build1 rather
34245 than fold_unary for NEGATE_EXPR.
34247 2023-01-19 Christophe Lyon <christophe.lyon@arm.com>
34250 * config/aarch64/aarch64.cc (aarch64_layout_arg): Improve
34251 comment. Move assert about alignment a bit later.
34253 2023-01-19 Jakub Jelinek <jakub@redhat.com>
34255 PR tree-optimization/108440
34256 * tree-ssa-forwprop.cc: Include gimple-range.h.
34257 (simplify_rotate): For the forms with T2 wider than T and shift counts of
34258 Y and B - Y add & (B - 1) masking for the rotate count if Y could be equal
34259 to B. For the forms with T2 wider than T and shift counts of
34260 Y and (-Y) & (B - 1), don't punt if range could be [B, B2], but only if
34261 range doesn't guarantee Y < B or Y = N * B. If range doesn't guarantee
34262 Y < B, also add & (B - 1) masking for the rotate count. Use lazily created
34263 pass specific ranger instead of get_global_range_query.
34264 (pass_forwprop::execute): Disable that ranger at the end of pass if it has
34267 2023-01-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
34269 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Use
34270 exact_log2 (INTVAL (operands[2])) >= 0 as condition for gating
34272 (aarch64_simd_vec_copy_lane<mode>): Likewise.
34273 (aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
34275 2023-01-19 Alexandre Oliva <oliva@adacore.com>
34278 * sched-deps.cc (sched_analyze_2): Skip cselib address lookup
34279 within debug insns.
34281 2023-01-18 Martin Jambor <mjambor@suse.cz>
34284 * cgraph.cc (cgraph_node::remove): Check whether nodes up the
34285 lcone_of chain also do not need the body.
34287 2023-01-18 Richard Biener <rguenther@suse.de>
34290 2022-12-16 Richard Biener <rguenther@suse.de>
34292 PR middle-end/108086
34293 * tree-inline.cc (remap_ssa_name): Do not unshare the
34294 result from the decl_map.
34296 2023-01-18 Murray Steele <murray.steele@arm.com>
34299 * config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic
34301 (__arm_vst1q_p_s8): Likewise.
34302 (__arm_vld1q_z_u8): Likewise.
34303 (__arm_vld1q_z_s8): Likewise.
34304 (__arm_vst1q_p_u16): Likewise.
34305 (__arm_vst1q_p_s16): Likewise.
34306 (__arm_vld1q_z_u16): Likewise.
34307 (__arm_vld1q_z_s16): Likewise.
34308 (__arm_vst1q_p_u32): Likewise.
34309 (__arm_vst1q_p_s32): Likewise.
34310 (__arm_vld1q_z_u32): Likewise.
34311 (__arm_vld1q_z_s32): Likewise.
34312 (__arm_vld1q_z_f16): Likewise.
34313 (__arm_vst1q_p_f16): Likewise.
34314 (__arm_vld1q_z_f32): Likewise.
34315 (__arm_vst1q_p_f32): Likewise.
34317 2023-01-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
34319 * config/xtensa/xtensa.md (xorsi3_internal):
34320 Rename from the original of "xorsi3".
34321 (xorsi3): New expansion pattern that emits addition rather than
34322 bitwise-XOR when the second source is a constant of -2147483648
34325 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
34326 Andrew Pinski <apinski@marvell.com>
34329 * config/rs6000/rs6000-overload.def (VEC_VSUBCUQ): Fix typo
34330 vec_vsubcuqP with vec_vsubcuq.
34332 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
34335 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
34336 support for invalid uses of MMA opaque type in function arguments.
34338 2023-01-18 liuhongt <hongtao.liu@intel.com>
34341 * config/i386/cygwin.h (ENDFILE_SPEC): Link crtfastmath.o
34342 whenever -mdaz-ftz is specified. Don't link crtfastmath.o when
34343 -share or -mno-daz-ftz is specified.
34344 * config/i386/darwin.h (ENDFILE_SPEC): Ditto.
34345 * config/i386/mingw32.h (ENDFILE_SPEC): Ditto.
34347 2023-01-17 Jose E. Marchesi <jose.marchesi@oracle.com>
34349 * config/bpf/bpf.cc (bpf_option_override): Disable
34352 2023-01-17 Jakub Jelinek <jakub@redhat.com>
34354 PR tree-optimization/106523
34355 * tree-ssa-forwprop.cc (simplify_rotate): For the
34356 patterns with (-Y) & (B - 1) in one operand's shift
34357 count and Y in another, if T2 has wider precision than T,
34358 punt if Y could have a value in [B, B2 - 1] range.
34360 2023-01-16 H.J. Lu <hjl.tools@gmail.com>
34363 * config/i386/i386.cc (x86_output_mi_thunk): Disable
34364 -mforce-indirect-call for PIC in 32-bit mode.
34366 2023-01-16 Jan Hubicka <hubicka@ucw.cz>
34369 * ipa-modref.cc (modref_access_analysis::analyze): Use
34370 find_always_executed_bbs.
34371 * ipa-sra.cc (process_scan_results): Likewise.
34372 * ipa-utils.cc (stmt_may_terminate_function_p): New function.
34373 (find_always_executed_bbs): New function.
34374 * ipa-utils.h (stmt_may_terminate_function_p): Declare.
34375 (find_always_executed_bbs): Declare.
34377 2023-01-16 Jan Hubicka <jh@suse.cz>
34379 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Guard scatter
34380 by TARGET_USE_SCATTER.
34381 * config/i386/i386.h (TARGET_USE_SCATTER_2PARTS,
34382 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New macros.
34383 * config/i386/x86-tune.def (TARGET_USE_SCATTER_2PARTS,
34384 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New tunes.
34385 (X86_TUNE_AVOID_256FMA_CHAINS, X86_TUNE_AVOID_512FMA_CHAINS): Disable
34386 for znver4. (X86_TUNE_USE_GATHER): Disable for zen4.
34388 2023-01-16 Richard Biener <rguenther@suse.de>
34391 * config/sol2.h (ENDFILE_SPEC): Don't add crtfastmath.o for -shared.
34393 2023-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
34397 * config/arm/arm_mve.h (__ARM_mve_coerce2): Split types.
34398 (__ARM_mve_coerce3): Likewise.
34400 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
34402 * tree-ssa-loop-niter.cc (build_popcount_expr): Add IFN support.
34404 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
34406 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): New.
34407 (number_of_iterations_bitcount): Add call to the above.
34408 (number_of_iterations_exit_assumptions): Add EQ_EXPR case for
34409 c[lt]z idiom recognition.
34411 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
34413 * doc/sourcebuild.texi: Add missing target attributes.
34415 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
34417 PR tree-optimization/94793
34418 * tree-scalar-evolution.cc (expression_expensive_p): Add checks
34420 * tree-ssa-loop-niter.cc (build_cltz_expr): New.
34421 (number_of_iterations_cltz_complement): New.
34422 (number_of_iterations_bitcount): Add call to the above.
34424 2023-01-16 Jonathan Wakely <jwakely@redhat.com>
34426 * doc/extend.texi (Common Function Attributes): Fix grammar.
34428 2023-01-16 Jakub Jelinek <jakub@redhat.com>
34431 * config/riscv/riscv-vsetvl.h: Add space in between Copyright and (C).
34432 * config/riscv/riscv-vsetvl.cc: Likewise.
34434 2023-01-16 Jakub Jelinek <jakub@redhat.com>
34437 * config/i386/xmmintrin.h (_mm_undefined_ps): Temporarily
34438 disable -Winit-self using pragma GCC diagnostic ignored.
34439 * config/i386/emmintrin.h (_mm_undefined_pd, _mm_undefined_si128):
34441 * config/i386/avxintrin.h (_mm256_undefined_pd, _mm256_undefined_ps,
34442 _mm256_undefined_si256): Likewise.
34443 * config/i386/avx512fintrin.h (_mm512_undefined_pd,
34444 _mm512_undefined_ps, _mm512_undefined_epi32): Likewise.
34445 * config/i386/avx512fp16intrin.h (_mm_undefined_ph,
34446 _mm256_undefined_ph, _mm512_undefined_ph): Likewise.
34448 2023-01-16 Kewen Lin <linkw@linux.ibm.com>
34451 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
34452 support for invalid uses in inline asm, factor out the checking and
34453 erroring to lambda function check_and_error_invalid_use.
34455 2023-01-15 Aldy Hernandez <aldyh@redhat.com>
34457 PR tree-optimization/107608
34458 * range-op-float.cc (range_operator_float::fold_range): Avoid
34459 folding into INF when flag_trapping_math.
34460 * value-range.h (frange::known_isinf): Return false for possible NANs.
34462 2023-01-15 Xianmiao Qu <cooper.qu@linux.alibaba.com>
34464 * config.gcc (csky-*-*): Support --with-float=softfp.
34466 2023-01-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
34468 * config/xtensa/xtensa-protos.h (order_regs_for_local_alloc):
34469 Rename to xtensa_adjust_reg_alloc_order.
34470 * config/xtensa/xtensa.cc (xtensa_adjust_reg_alloc_order):
34471 Ditto. And also remove code to reorder register numbers for
34472 leaf functions, rename the tables, and adjust the allocation
34473 order for the call0 ABI to use register A0 more.
34474 (xtensa_leaf_regs): Remove.
34475 * config/xtensa/xtensa.h (REG_ALLOC_ORDER): Cosmetics.
34476 (order_regs_for_local_alloc): Rename as the above.
34477 (LEAF_REGISTERS, LEAF_REG_REMAP, leaf_function): Remove.
34479 2023-01-14 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
34481 * config/aarch64/aarch64-sve.md (aarch64_vec_duplicate_vq<mode>_le):
34482 Change to define_insn_and_split to fold ldr+dup to ld1rq.
34483 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): New.
34485 2023-01-14 Alexandre Oliva <oliva@adacore.com>
34487 * hash-table.h (is_deleted): Precheck !is_empty.
34488 (mark_deleted): Postcheck !is_empty.
34489 (copy constructor): Test is_empty before is_deleted.
34491 2023-01-14 Alexandre Oliva <oliva@adacore.com>
34494 * config/arm/arm.md (movmisaligndi): Prefer aligned SImode
34497 2023-01-13 Eric Botcazou <ebotcazou@adacore.com>
34499 PR rtl-optimization/108274
34500 * function.cc (thread_prologue_and_epilogue_insns): Also update the
34501 DF information for calls in a few more cases.
34503 2023-01-13 John David Anglin <danglin@gcc.gnu.org>
34505 * config/pa/pa-linux.h (TARGET_SYNC_LIBCALL): Delete define.
34506 * config/pa/pa.cc (pa_init_libfuncs): Use MAX_SYNC_LIBFUNC_SIZE
34508 * config/pa/pa.h (TARGET_SYNC_LIBCALLS): Use flag_sync_libcalls.
34509 (MAX_SYNC_LIBFUNC_SIZE): Define.
34510 (TARGET_CPU_CPP_BUILTINS): Define __SOFTFP__ when soft float is
34512 * config/pa/pa.md (atomic_storeqi): Emit __atomic_exchange_1
34513 libcall when sync libcalls are disabled.
34514 (atomic_storehi, atomic_storesi, atomic_storedi): Likewise.
34515 (atomic_loaddi): Emit __atomic_load_8 libcall when sync libcalls
34516 are disabled on 32-bit target.
34517 * config/pa/pa.opt (matomic-libcalls): New option.
34518 * doc/invoke.texi (HPPA Options): Update.
34520 2023-01-13 Alexander Monakov <amonakov@ispras.ru>
34522 PR rtl-optimization/108117
34523 PR rtl-optimization/108132
34524 * sched-deps.cc (deps_analyze_insn): Do not schedule across
34525 calls before reload.
34527 2023-01-13 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
34529 * common/config/arm/arm-common.cc (arm_canon_arch_option_1): Ignore cde
34530 options for -mlibarch.
34531 * config/arm/arm-cpus.in (begin cpu cortex-m55): Add cde options.
34532 * doc/invoke.texi (CDE): Document options for Cortex-M55 CPU.
34534 2023-01-13 Qing Zhao <qing.zhao@oracle.com>
34536 * attribs.cc (strict_flex_array_level_of): Move this function to ...
34537 * attribs.h (strict_flex_array_level_of): Remove the declaration.
34538 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
34539 replace the referece to strict_flex_array_level_of with
34540 DECL_NOT_FLEXARRAY.
34541 * tree.cc (component_ref_size): Likewise.
34543 2023-01-13 Richard Biener <rguenther@suse.de>
34546 * config/arm/linux-eabi.h (ENDFILE_SPEC): Don't add
34547 crtfastmath.o for -shared.
34548 * config/arm/unknown-elf.h (STARTFILE_SPEC): Likewise.
34550 2023-01-13 Richard Biener <rguenther@suse.de>
34553 * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Don't add
34554 crtfastmath.o for -shared.
34555 * config/aarch64/aarch64-freebsd.h (GNU_USER_TARGET_MATHFILE_SPEC):
34557 * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATHFILE_SPEC):
34560 2023-01-13 Richard Sandiford <richard.sandiford@arm.com>
34562 * config/aarch64/aarch64.cc (aarch64_dwarf_frame_reg_mode): New
34564 (TARGET_DWARF_FRAME_REG_MODE): Define.
34566 2023-01-13 Richard Biener <rguenther@suse.de>
34569 * config/aarch64/aarch64.cc (aarch64_gimple_fold_builtin): Don't
34570 update EH info on the fly.
34572 2023-01-13 Richard Biener <rguenther@suse.de>
34574 PR tree-optimization/108387
34575 * tree-ssa-sccvn.cc (visit_nary_op): Check for SSA_NAME
34576 value before inserting expression into the tables.
34578 2023-01-12 Andrew Pinski <apinski@marvell.com>
34579 Roger Sayle <roger@nextmovesoftware.com>
34581 PR tree-optimization/92342
34582 * match.pd ((m1 CMP m2) * d -> (m1 CMP m2) ? d : 0):
34583 Use tcc_comparison and :c for the multiply.
34584 (b & -(a CMP c) -> (a CMP c)?b:0): New pattern.
34586 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
34587 Richard Sandiford <richard.sandiford@arm.com>
34590 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment):
34591 Check DECL_PACKED for bitfield.
34592 (aarch64_layout_arg): Warn when parameter passing ABI changes.
34593 (aarch64_function_arg_boundary): Do not warn here.
34594 (aarch64_gimplify_va_arg_expr): Warn when parameter passing ABI
34597 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
34598 Richard Sandiford <richard.sandiford@arm.com>
34600 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Fix
34602 (aarch64_layout_arg): Factorize warning conditions.
34603 (aarch64_function_arg_boundary): Fix typo.
34604 * function.cc (currently_expanding_function_start): New variable.
34605 (expand_function_start): Handle
34606 currently_expanding_function_start.
34607 * function.h (currently_expanding_function_start): Declare.
34609 2023-01-12 Richard Biener <rguenther@suse.de>
34611 PR tree-optimization/99412
34612 * tree-ssa-reassoc.cc (is_phi_for_stmt): Remove.
34613 (swap_ops_for_binary_stmt): Remove reduction handling.
34614 (rewrite_expr_tree_parallel): Adjust.
34615 (reassociate_bb): Likewise.
34616 * tree-parloops.cc (build_new_reduction): Handle MINUS_EXPR.
34618 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
34620 * config/xtensa/xtensa.md (ctzsi2, ffssi2):
34621 Rearrange the emitting codes.
34623 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
34625 * config/xtensa/xtensa.md (*btrue):
34626 Correct value of the attribute "length" that depends on
34627 TARGET_DENSITY and operands, and add '?' character to the register
34628 constraint of the compared operand.
34630 2023-01-12 Alexandre Oliva <oliva@adacore.com>
34632 * hash-table.h (expand): Check elements and deleted counts.
34633 (verify): Likewise.
34635 2023-01-11 Roger Sayle <roger@nextmovesoftware.com>
34637 PR tree-optimization/71343
34638 * tree-ssa-sccvn.cc (visit_nary_op) <case LSHIFT_EXPR>: Make
34639 the value number of the expression X << C the same as the value
34640 number for the multiplication X * (1<<C).
34642 2023-01-11 David Faust <david.faust@oracle.com>
34645 * config/bpf/bpf.cc (bpf_print_operand): Correct handling for
34646 floating point modes.
34648 2023-01-11 Eric Botcazou <ebotcazou@adacore.com>
34650 PR tree-optimization/108199
34651 * tree-sra.cc (sra_modify_expr): Deal with reverse storage order
34652 for bit-field references.
34654 2023-01-11 Kewen Lin <linkw@linux.ibm.com>
34656 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Make
34657 OPTION_MASK_P10_FUSION implicit setting honour Power10 tuning setting.
34658 * config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Remove
34659 OPTION_MASK_P10_FUSION.
34661 2023-01-11 Richard Biener <rguenther@suse.de>
34663 PR tree-optimization/107767
34664 * tree-cfgcleanup.cc (phi_alternatives_equal): Export.
34665 * tree-cfgcleanup.h (phi_alternatives_equal): Declare.
34666 * tree-switch-conversion.cc (switch_conversion::collect):
34667 Count unique non-default targets accounting for later
34668 merging opportunities.
34670 2023-01-11 Martin Liska <mliska@suse.cz>
34672 PR middle-end/107976
34673 * params.opt: Limit JT params.
34674 * stmt.cc (emit_case_dispatch_table): Use auto_vec.
34676 2023-01-11 Richard Biener <rguenther@suse.de>
34678 PR tree-optimization/108352
34679 * tree-ssa-threadbackward.cc
34680 (back_threader_profitability::profitable_path_p): Adjust
34681 heuristic that allows non-multi-way branch threads creating
34683 * doc/invoke.texi (--param fsm-scale-path-blocks): Remove.
34684 (--param fsm-scale-path-stmts): Adjust.
34685 * params.opt (--param=fsm-scale-path-blocks=): Remove.
34686 (-param=fsm-scale-path-stmts=): Adjust description.
34688 2023-01-11 Richard Biener <rguenther@suse.de>
34690 PR tree-optimization/108353
34691 * tree-ssa-propagate.cc (cfg_blocks_back, ssa_edge_worklist_back):
34693 (add_ssa_edge): Simplify.
34694 (add_control_edge): Likewise.
34695 (ssa_prop_init): Likewise.
34696 (ssa_prop_fini): Likewise.
34697 (ssa_propagation_engine::ssa_propagate): Likewise.
34699 2023-01-11 Andreas Krebbel <krebbel@linux.ibm.com>
34701 * config/s390/s390.md (*not<mode>): New pattern.
34703 2023-01-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
34705 * config/xtensa/xtensa.cc (xtensa_insn_cost):
34706 Let insn cost for size be obtained by applying COSTS_N_INSNS()
34707 to instruction length and then dividing by 3.
34709 2023-01-10 Richard Biener <rguenther@suse.de>
34711 PR tree-optimization/106293
34712 * tree-ssa-dse.cc (dse_classify_store): Use a worklist to
34713 process degenerate PHI defs.
34715 2023-01-10 Roger Sayle <roger@nextmovesoftware.com>
34717 PR rtl-optimization/106421
34718 * cprop.cc (bypass_block): Check that DEST is local to this
34719 function (non-NULL) before calling find_edge.
34721 2023-01-10 Martin Jambor <mjambor@suse.cz>
34724 * ipa-param-manipulation.h (ipa_param_body_adjustments): New members
34725 sort_replacements, lookup_first_base_replacement and
34726 m_sorted_replacements_p.
34727 * ipa-param-manipulation.cc: Define INCLUDE_ALGORITHM.
34728 (ipa_param_body_adjustments::register_replacement): Set
34729 m_sorted_replacements_p to false.
34730 (compare_param_body_replacement): New function.
34731 (ipa_param_body_adjustments::sort_replacements): Likewise.
34732 (ipa_param_body_adjustments::common_initialization): Call
34734 (ipa_param_body_adjustments::ipa_param_body_adjustments): Initialize
34735 m_sorted_replacements_p.
34736 (ipa_param_body_adjustments::lookup_replacement_1): Rework to use
34738 (ipa_param_body_adjustments::lookup_first_base_replacement): New
34740 (ipa_param_body_adjustments::modify_call_stmt): Use
34741 lookup_first_base_replacement.
34742 * omp-simd-clone.cc (ipa_simd_modify_function_body): Call
34743 adjustments->sort_replacements.
34745 2023-01-10 Richard Biener <rguenther@suse.de>
34747 PR tree-optimization/108314
34748 * tree-vect-stmts.cc (vectorizable_condition): Do not
34749 perform BIT_NOT_EXPR optimization for EXTRACT_LAST_REDUCTION.
34751 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
34753 * config/csky/csky-linux-elf.h (SYSROOT_SUFFIX_SPEC): New.
34755 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
34757 * config/csky/csky.h (MULTILIB_DEFAULTS): Fix float abi option.
34759 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
34761 * config/csky/csky.cc (csky_cpu_cpp_builtins): Add builtin
34762 defines for soft float abi.
34764 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
34766 * config/csky/csky.md (smart_bseti): Change condition to CSKY_ISA_FEATURE (E1).
34767 (smart_bclri): Likewise.
34768 (fast_bseti): Change condition to CSKY_ISA_FEATURE (E2).
34769 (fast_bclri): Likewise.
34770 (fast_cmpnesi_i): Likewise.
34771 (*fast_cmpltsi_i): Likewise.
34772 (*fast_cmpgeusi_i): Likewise.
34774 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
34776 * config/csky/csky_insn_fpuv3.md (l<frm_pattern><fixsuop><mode>si2): Test
34777 flag_fp_int_builtin_inexact || !flag_trapping_math.
34778 (<frm_pattern><mode>2): Likewise.
34780 2023-01-10 Andreas Krebbel <krebbel@linux.ibm.com>
34782 * config/s390/s390.cc (s390_register_info): Check call_used_regs
34783 instead of hard-coding the register numbers for call saved
34785 (s390_optimize_register_info): Likewise.
34787 2023-01-09 Eric Botcazou <ebotcazou@adacore.com>
34789 * doc/gm2.texi (Overview): Fix @node markers.
34790 (Using): Likewise. Remove subsections that were moved to Overview
34791 from the menu and move others around.
34793 2023-01-09 Richard Biener <rguenther@suse.de>
34795 PR middle-end/108209
34796 * genmatch.cc (commutative_op): Fix return value for
34797 user-id with non-commutative first replacement.
34799 2023-01-09 Jakub Jelinek <jakub@redhat.com>
34802 * calls.cc (expand_call): For calls with
34803 TYPE_NO_NAMED_ARGS_STDARG_P (funtype) use zero for n_named_args.
34806 2023-01-09 Richard Biener <rguenther@suse.de>
34808 PR middle-end/69482
34809 * cfgexpand.cc (discover_nonconstant_array_refs_r): Volatile
34810 qualified accesses also force objects to memory.
34812 2023-01-09 Martin Liska <mliska@suse.cz>
34815 * lto-cgraph.cc (compute_ltrans_boundary): Do not insert
34816 NULL (deleleted value) to a hash_set.
34818 2023-01-08 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
34820 * config/xtensa/xtensa.md (*splice_bits):
34821 New insn_and_split pattern.
34823 2023-01-07 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
34825 * config/xtensa/xtensa.cc
34826 (xtensa_split_imm_two_addends, xtensa_emit_add_imm):
34827 New helper functions.
34828 (xtensa_set_return_address, xtensa_output_mi_thunk):
34829 Change to use the helper function.
34830 (xtensa_emit_adjust_stack_ptr): Ditto.
34831 And also change to try reusing the content of scratch register
34832 A9 if the register is not modified in the function body.
34834 2023-01-07 LIU Hao <lh_mouse@126.com>
34836 PR middle-end/108300
34837 * config/xtensa/xtensa-dynconfig.c: Define `WIN32_LEAN_AND_MEAN`
34838 before <windows.h>.
34839 * diagnostic-color.cc: Likewise.
34840 * plugin.cc: Likewise.
34841 * prefix.cc: Likewise.
34843 2023-01-06 Joseph Myers <joseph@codesourcery.com>
34845 * doc/extend.texi (__builtin_tgmath): Do not restate standard rule
34846 for handling real integer types.
34848 2023-01-06 Tamar Christina <tamar.christina@arm.com>
34851 2022-12-12 Tamar Christina <tamar.christina@arm.com>
34853 * config/aarch64/aarch64-simd.md (*aarch64_simd_movv2hf): New.
34854 (mov<mode>, movmisalign<mode>, aarch64_dup_lane<mode>,
34855 aarch64_store_lane0<mode>, aarch64_simd_vec_set<mode>,
34856 @aarch64_simd_vec_copy_lane<mode>, vec_set<mode>,
34857 reduc_<optab>_scal_<mode>, reduc_<fmaxmin>_scal_<mode>,
34858 aarch64_reduc_<optab>_internal<mode>, aarch64_get_lane<mode>,
34859 vec_init<mode><Vel>, vec_extract<mode><Vel>): Support V2HF.
34860 (aarch64_simd_dupv2hf): New.
34861 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode):
34863 * config/aarch64/iterators.md (VHSDF_P): New.
34864 (V2F, VMOVE, nunits, Vtype, Vmtype, Vetype, stype, VEL,
34865 Vel, q, vp): Add V2HF.
34866 * config/arm/types.md (neon_fp_reduc_add_h): New.
34868 2023-01-06 Martin Liska <mliska@suse.cz>
34870 PR middle-end/107966
34871 * doc/options.texi: Fix Var documentation in internal manual.
34873 2023-01-05 Roger Sayle <roger@nextmovesoftware.com>
34876 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
34878 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
34879 RTL expansion to allow condition (mask) to be shared/reused,
34880 by avoiding overwriting pseudos and adding REG_EQUAL notes.
34882 2023-01-05 Iain Sandoe <iain@sandoe.co.uk>
34884 * common.opt: Add -static-libgm2.
34885 * config/darwin.h (LINK_SPEC): Handle static-libgm2.
34886 * doc/gm2.texi: Document static-libgm2.
34887 * gcc.cc (driver_handle_option): Allow static-libgm2.
34889 2023-01-05 Tejas Joshi <TejasSanjay.Joshi@amd.com>
34891 * common/config/i386/i386-common.cc (processor_alias_table):
34892 Use CPU_ZNVER4 for znver4.
34893 * config/i386/i386.md: Add znver4.md.
34894 * config/i386/znver4.md: New.
34896 2023-01-04 Jakub Jelinek <jakub@redhat.com>
34898 PR tree-optimization/108253
34899 * tree-vrp.cc (maybe_set_nonzero_bits): Handle var with pointer
34902 2023-01-04 Jakub Jelinek <jakub@redhat.com>
34904 PR middle-end/108237
34905 * generic-match-head.cc: Include tree-pass.h.
34906 (canonicalize_math_p, optimize_vectors_before_lowering_p): Define
34907 to false if cfun and cfun->curr_properties has PROP_gimple_opt_math
34908 resp. PROP_gimple_lvec property set.
34910 2023-01-04 Jakub Jelinek <jakub@redhat.com>
34912 PR sanitizer/108256
34913 * convert.cc (do_narrow): Punt for MULT_EXPR if original
34914 type doesn't wrap around and -fsanitize=signed-integer-overflow
34916 * fold-const.cc (fold_unary_loc) <CASE_CONVERT>: Likewise.
34918 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
34920 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Emeraldrapids.
34921 * common/config/i386/i386-common.cc: Add Emeraldrapids.
34923 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
34925 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove case 0xb5
34928 2023-01-03 Sandra Loosemore <sandra@codesourcery.com>
34930 * cgraph.h (struct cgraph_node): Add gc_candidate bit, modify
34931 default constructor to initialize it.
34932 * cgraphunit.cc (expand_all_functions): Save gc_candidate functions
34933 for last and iterate to handle recursive calls. Delete leftover
34934 candidates at the end.
34935 * omp-simd-clone.cc (simd_clone_create): Set gc_candidate bit
34937 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Clear
34938 gc_candidate bit when a clone is used.
34940 2023-01-03 Florian Weimer <fweimer@redhat.com>
34943 2023-01-02 Florian Weimer <fweimer@redhat.com>
34945 * dwarf2cfi.cc (init_return_column_size): Remove.
34946 (init_one_dwarf_reg_size): Adjust.
34947 (generate_dwarf_reg_sizes): New function. Extracted
34948 from expand_builtin_init_dwarf_reg_sizes.
34949 (expand_builtin_init_dwarf_reg_sizes): Call
34950 generate_dwarf_reg_sizes.
34951 * target.def (init_dwarf_reg_sizes_extra): Adjust
34953 * config/msp430/msp430.cc
34954 (msp430_init_dwarf_reg_sizes_extra): Adjust.
34955 * config/rs6000/rs6000.cc
34956 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
34957 * doc/tm.texi: Update.
34959 2023-01-03 Florian Weimer <fweimer@redhat.com>
34962 2023-01-02 Florian Weimer <fweimer@redhat.com>
34964 * debug.h (dwarf_reg_sizes_constant): Declare.
34965 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
34967 2023-01-03 Siddhesh Poyarekar <siddhesh@gotplt.org>
34969 PR tree-optimization/105043
34970 * doc/extend.texi (Object Size Checking): Split out into two
34971 subsections and mention _FORTIFY_SOURCE.
34973 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
34975 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
34976 RTL expansion to allow condition (mask) to be shared/reused,
34977 by avoiding overwriting pseudos and adding REG_EQUAL notes.
34979 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
34982 * config/i386/i386-features.cc
34983 (general_scalar_chain::compute_convert_gain) <case PLUS>: Consider
34984 the gain/cost of converting a MEM operand.
34986 2023-01-03 Jakub Jelinek <jakub@redhat.com>
34988 PR middle-end/108264
34989 * expr.cc (store_expr): For stores into SUBREG_PROMOTED_* targets
34990 from source which doesn't have scalar integral mode first convert
34993 2023-01-03 Jakub Jelinek <jakub@redhat.com>
34995 PR rtl-optimization/108263
34996 * cfgrtl.cc (fixup_reorder_chain): Avoid trying to redirect
34999 2023-01-02 Alexander Monakov <amonakov@ispras.ru>
35002 * config/i386/lujiazui.md (lujiazui_div): New automaton.
35003 (lua_div): New unit.
35004 (lua_idiv_qi): Correct unit in the reservation.
35005 (lua_idiv_qi_load): Ditto.
35006 (lua_idiv_hi): Ditto.
35007 (lua_idiv_hi_load): Ditto.
35008 (lua_idiv_si): Ditto.
35009 (lua_idiv_si_load): Ditto.
35010 (lua_idiv_di): Ditto.
35011 (lua_idiv_di_load): Ditto.
35012 (lua_fdiv_SF): Ditto.
35013 (lua_fdiv_SF_load): Ditto.
35014 (lua_fdiv_DF): Ditto.
35015 (lua_fdiv_DF_load): Ditto.
35016 (lua_fdiv_XF): Ditto.
35017 (lua_fdiv_XF_load): Ditto.
35018 (lua_ssediv_SF): Ditto.
35019 (lua_ssediv_load_SF): Ditto.
35020 (lua_ssediv_V4SF): Ditto.
35021 (lua_ssediv_load_V4SF): Ditto.
35022 (lua_ssediv_V8SF): Ditto.
35023 (lua_ssediv_load_V8SF): Ditto.
35024 (lua_ssediv_SD): Ditto.
35025 (lua_ssediv_load_SD): Ditto.
35026 (lua_ssediv_V2DF): Ditto.
35027 (lua_ssediv_load_V2DF): Ditto.
35028 (lua_ssediv_V4DF): Ditto.
35029 (lua_ssediv_load_V4DF): Ditto.
35031 2023-01-02 Florian Weimer <fweimer@redhat.com>
35033 * debug.h (dwarf_reg_sizes_constant): Declare.
35034 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
35036 2023-01-02 Florian Weimer <fweimer@redhat.com>
35038 * dwarf2cfi.cc (init_return_column_size): Remove.
35039 (init_one_dwarf_reg_size): Adjust.
35040 (generate_dwarf_reg_sizes): New function. Extracted
35041 from expand_builtin_init_dwarf_reg_sizes.
35042 (expand_builtin_init_dwarf_reg_sizes): Call
35043 generate_dwarf_reg_sizes.
35044 * target.def (init_dwarf_reg_sizes_extra): Adjust
35046 * config/msp430/msp430.cc
35047 (msp430_init_dwarf_reg_sizes_extra): Adjust.
35048 * config/rs6000/rs6000.cc
35049 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
35050 * doc/tm.texi: Update.
35052 2023-01-02 Jakub Jelinek <jakub@redhat.com>
35054 * gcc.cc (process_command): Update copyright notice dates.
35055 * gcov-dump.cc (print_version): Ditto.
35056 * gcov.cc (print_version): Ditto.
35057 * gcov-tool.cc (print_version): Ditto.
35058 * gengtype.cc (create_file): Ditto.
35059 * doc/cpp.texi: Bump @copying's copyright year.
35060 * doc/cppinternals.texi: Ditto.
35061 * doc/gcc.texi: Ditto.
35062 * doc/gccint.texi: Ditto.
35063 * doc/gcov.texi: Ditto.
35064 * doc/install.texi: Ditto.
35065 * doc/invoke.texi: Ditto.
35067 2023-01-01 Roger Sayle <roger@nextmovesoftware.com>
35068 Uroš Bizjak <ubizjak@gmail.com>
35070 * config/i386/i386.md (extendditi2): New define_insn.
35071 (define_split): Use DWIH mode iterator to treat new extendditi2
35072 identically to existing extendsidi2_1.
35073 (define_peephole2): Likewise.
35074 (define_peephole2): Likewise.
35075 (define_Split): Likewise.
35078 Copyright (C) 2023 Free Software Foundation, Inc.
35080 Copying and distribution of this file, with or without modification,
35081 are permitted in any medium without royalty provided the copyright
35082 notice and this notice are preserved.