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1 /* Definitions of target machine for GNU compiler,
2 for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
3 Copyright (C) 1998-2017 Free Software Foundation, Inc.
4 Contributed by Denis Chertykov (chertykov@gmail.com)
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
12
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 typedef struct
23 {
24 /* Id of the address space as used in c_register_addr_space */
25 unsigned char id;
26
27 /* Flavour of memory: 0 = RAM, 1 = Flash */
28 int memory_class;
29
30 /* Width of pointer (in bytes) */
31 int pointer_size;
32
33 /* Name of the address space as visible to the user */
34 const char *name;
35
36 /* Segment (i.e. 64k memory chunk) number. */
37 int segment;
38
39 /* Section prefix, e.g. ".progmem1.data" */
40 const char *section_name;
41 } avr_addrspace_t;
42
43 extern const avr_addrspace_t avr_addrspace[];
44
45 /* Known address spaces */
46
47 enum
48 {
49 ADDR_SPACE_RAM, /* ADDR_SPACE_GENERIC */
50 ADDR_SPACE_FLASH,
51 ADDR_SPACE_FLASH1,
52 ADDR_SPACE_FLASH2,
53 ADDR_SPACE_FLASH3,
54 ADDR_SPACE_FLASH4,
55 ADDR_SPACE_FLASH5,
56 ADDR_SPACE_MEMX,
57 /* Sentinel */
58 ADDR_SPACE_COUNT
59 };
60
61 #define TARGET_CPU_CPP_BUILTINS() avr_cpu_cpp_builtins (pfile)
62
63 #define AVR_SHORT_CALLS (TARGET_SHORT_CALLS \
64 && avr_arch == &avr_arch_types[ARCH_AVRXMEGA3])
65 #define AVR_HAVE_JMP_CALL (avr_arch->have_jmp_call && ! AVR_SHORT_CALLS)
66 #define AVR_HAVE_MUL (avr_arch->have_mul)
67 #define AVR_HAVE_MOVW (avr_arch->have_movw_lpmx)
68 #define AVR_HAVE_LPM (!AVR_TINY)
69 #define AVR_HAVE_LPMX (avr_arch->have_movw_lpmx)
70 #define AVR_HAVE_ELPM (avr_arch->have_elpm)
71 #define AVR_HAVE_ELPMX (avr_arch->have_elpmx)
72 #define AVR_HAVE_RAMPD (avr_arch->have_rampd)
73 #define AVR_HAVE_RAMPX (avr_arch->have_rampd)
74 #define AVR_HAVE_RAMPY (avr_arch->have_rampd)
75 #define AVR_HAVE_RAMPZ (avr_arch->have_elpm \
76 || avr_arch->have_rampd)
77 #define AVR_HAVE_EIJMP_EICALL (avr_arch->have_eijmp_eicall)
78
79 /* Handling of 8-bit SP versus 16-bit SP is as follows:
80
81 FIXME: DRIVER_SELF_SPECS has changed.
82 -msp8 is used internally to select the right multilib for targets with
83 8-bit SP. -msp8 is set automatically by DRIVER_SELF_SPECS for devices
84 with 8-bit SP or by multilib generation machinery. If a frame pointer is
85 needed and SP is only 8 bits wide, SP is zero-extended to get FP.
86
87 TARGET_TINY_STACK is triggered by -mtiny-stack which is a user option.
88 This option has no effect on multilib selection. It serves to save some
89 bytes on 16-bit SP devices by only changing SP_L and leaving SP_H alone.
90
91 These two properties are reflected by built-in macros __AVR_SP8__ resp.
92 __AVR_HAVE_8BIT_SP__ and __AVR_HAVE_16BIT_SP__. During multilib generation
93 there is always __AVR_SP8__ == __AVR_HAVE_8BIT_SP__. */
94
95 #define AVR_HAVE_8BIT_SP \
96 (TARGET_TINY_STACK || avr_sp8)
97
98 #define AVR_HAVE_SPH (!avr_sp8)
99
100 #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
101 #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
102
103 #define AVR_XMEGA (avr_arch->xmega_p)
104 #define AVR_TINY (avr_arch->tiny_p)
105
106 #define BITS_BIG_ENDIAN 0
107 #define BYTES_BIG_ENDIAN 0
108 #define WORDS_BIG_ENDIAN 0
109
110 #ifdef IN_LIBGCC2
111 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits). */
112 #define UNITS_PER_WORD 4
113 #else
114 /* Width of a word, in units (bytes). */
115 #define UNITS_PER_WORD 1
116 #endif
117
118 #define POINTER_SIZE 16
119
120
121 /* Maximum sized of reasonable data type
122 DImode or Dfmode ... */
123 #define MAX_FIXED_MODE_SIZE 32
124
125 #define PARM_BOUNDARY 8
126
127 #define FUNCTION_BOUNDARY 8
128
129 #define EMPTY_FIELD_BOUNDARY 8
130
131 /* No data type wants to be aligned rounder than this. */
132 #define BIGGEST_ALIGNMENT 8
133
134 #define TARGET_VTABLE_ENTRY_ALIGN 8
135
136 #define STRICT_ALIGNMENT 0
137
138 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16)
139 #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16)
140 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
141 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
142 #define FLOAT_TYPE_SIZE 32
143 #define DOUBLE_TYPE_SIZE 32
144 #define LONG_DOUBLE_TYPE_SIZE 32
145 #define LONG_LONG_ACCUM_TYPE_SIZE 64
146
147 #define DEFAULT_SIGNED_CHAR 1
148
149 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int")
150 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int")
151
152 #define WCHAR_TYPE_SIZE 16
153
154 #define FIRST_PSEUDO_REGISTER 36
155
156 #define FIXED_REGISTERS {\
157 1,1,/* r0 r1 */\
158 0,0,/* r2 r3 */\
159 0,0,/* r4 r5 */\
160 0,0,/* r6 r7 */\
161 0,0,/* r8 r9 */\
162 0,0,/* r10 r11 */\
163 0,0,/* r12 r13 */\
164 0,0,/* r14 r15 */\
165 0,0,/* r16 r17 */\
166 0,0,/* r18 r19 */\
167 0,0,/* r20 r21 */\
168 0,0,/* r22 r23 */\
169 0,0,/* r24 r25 */\
170 0,0,/* r26 r27 */\
171 0,0,/* r28 r29 */\
172 0,0,/* r30 r31 */\
173 1,1,/* STACK */\
174 1,1 /* arg pointer */ }
175
176 #define CALL_USED_REGISTERS { \
177 1,1,/* r0 r1 */ \
178 0,0,/* r2 r3 */ \
179 0,0,/* r4 r5 */ \
180 0,0,/* r6 r7 */ \
181 0,0,/* r8 r9 */ \
182 0,0,/* r10 r11 */ \
183 0,0,/* r12 r13 */ \
184 0,0,/* r14 r15 */ \
185 0,0,/* r16 r17 */ \
186 1,1,/* r18 r19 */ \
187 1,1,/* r20 r21 */ \
188 1,1,/* r22 r23 */ \
189 1,1,/* r24 r25 */ \
190 1,1,/* r26 r27 */ \
191 0,0,/* r28 r29 */ \
192 1,1,/* r30 r31 */ \
193 1,1,/* STACK */ \
194 1,1 /* arg pointer */ }
195
196 #define REG_ALLOC_ORDER { \
197 24,25, \
198 18,19, \
199 20,21, \
200 22,23, \
201 30,31, \
202 26,27, \
203 28,29, \
204 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2, \
205 0,1, \
206 32,33,34,35 \
207 }
208
209 #define ADJUST_REG_ALLOC_ORDER avr_adjust_reg_alloc_order()
210
211
212 enum reg_class {
213 NO_REGS,
214 R0_REG, /* r0 */
215 POINTER_X_REGS, /* r26 - r27 */
216 POINTER_Y_REGS, /* r28 - r29 */
217 POINTER_Z_REGS, /* r30 - r31 */
218 STACK_REG, /* STACK */
219 BASE_POINTER_REGS, /* r28 - r31 */
220 POINTER_REGS, /* r26 - r31 */
221 ADDW_REGS, /* r24 - r31 */
222 SIMPLE_LD_REGS, /* r16 - r23 */
223 LD_REGS, /* r16 - r31 */
224 NO_LD_REGS, /* r0 - r15 */
225 GENERAL_REGS, /* r0 - r31 */
226 ALL_REGS, LIM_REG_CLASSES
227 };
228
229
230 #define N_REG_CLASSES (int)LIM_REG_CLASSES
231
232 #define REG_CLASS_NAMES { \
233 "NO_REGS", \
234 "R0_REG", /* r0 */ \
235 "POINTER_X_REGS", /* r26 - r27 */ \
236 "POINTER_Y_REGS", /* r28 - r29 */ \
237 "POINTER_Z_REGS", /* r30 - r31 */ \
238 "STACK_REG", /* STACK */ \
239 "BASE_POINTER_REGS", /* r28 - r31 */ \
240 "POINTER_REGS", /* r26 - r31 */ \
241 "ADDW_REGS", /* r24 - r31 */ \
242 "SIMPLE_LD_REGS", /* r16 - r23 */ \
243 "LD_REGS", /* r16 - r31 */ \
244 "NO_LD_REGS", /* r0 - r15 */ \
245 "GENERAL_REGS", /* r0 - r31 */ \
246 "ALL_REGS" }
247
248 #define REG_CLASS_CONTENTS { \
249 {0x00000000,0x00000000}, /* NO_REGS */ \
250 {0x00000001,0x00000000}, /* R0_REG */ \
251 {3u << REG_X,0x00000000}, /* POINTER_X_REGS, r26 - r27 */ \
252 {3u << REG_Y,0x00000000}, /* POINTER_Y_REGS, r28 - r29 */ \
253 {3u << REG_Z,0x00000000}, /* POINTER_Z_REGS, r30 - r31 */ \
254 {0x00000000,0x00000003}, /* STACK_REG, STACK */ \
255 {(3u << REG_Y) | (3u << REG_Z), \
256 0x00000000}, /* BASE_POINTER_REGS, r28 - r31 */ \
257 {(3u << REG_X) | (3u << REG_Y) | (3u << REG_Z), \
258 0x00000000}, /* POINTER_REGS, r26 - r31 */ \
259 {(3u << REG_X) | (3u << REG_Y) | (3u << REG_Z) | (3u << REG_W), \
260 0x00000000}, /* ADDW_REGS, r24 - r31 */ \
261 {0x00ff0000,0x00000000}, /* SIMPLE_LD_REGS r16 - r23 */ \
262 {(3u << REG_X)|(3u << REG_Y)|(3u << REG_Z)|(3u << REG_W)|(0xffu << 16),\
263 0x00000000}, /* LD_REGS, r16 - r31 */ \
264 {0x0000ffff,0x00000000}, /* NO_LD_REGS r0 - r15 */ \
265 {0xffffffff,0x00000000}, /* GENERAL_REGS, r0 - r31 */ \
266 {0xffffffff,0x00000003} /* ALL_REGS */ \
267 }
268
269 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
270
271 #define MODE_CODE_BASE_REG_CLASS(mode, as, outer_code, index_code) \
272 avr_mode_code_base_reg_class (mode, as, outer_code, index_code)
273
274 #define INDEX_REG_CLASS NO_REGS
275
276 #define REGNO_MODE_CODE_OK_FOR_BASE_P(num, mode, as, outer_code, index_code) \
277 avr_regno_mode_code_ok_for_base_p (num, mode, as, outer_code, index_code)
278
279 #define REGNO_OK_FOR_INDEX_P(NUM) 0
280
281 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
282
283 #define STACK_PUSH_CODE POST_DEC
284
285 #define STACK_GROWS_DOWNWARD 1
286
287 #define STARTING_FRAME_OFFSET avr_starting_frame_offset()
288
289 #define STACK_POINTER_OFFSET 1
290
291 #define FIRST_PARM_OFFSET(FUNDECL) 0
292
293 #define STACK_BOUNDARY 8
294
295 #define STACK_POINTER_REGNUM 32
296
297 #define FRAME_POINTER_REGNUM REG_Y
298
299 #define ARG_POINTER_REGNUM 34
300
301 #define STATIC_CHAIN_REGNUM ((AVR_TINY) ? 18 :2)
302
303 #define ELIMINABLE_REGS { \
304 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
305 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }, \
306 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
307 { FRAME_POINTER_REGNUM + 1, STACK_POINTER_REGNUM + 1 } }
308
309 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
310 OFFSET = avr_initial_elimination_offset (FROM, TO)
311
312 #define RETURN_ADDR_RTX(count, tem) avr_return_addr_rtx (count, tem)
313
314 /* Don't use Push rounding. expr.c: emit_single_push_insn is broken
315 for POST_DEC targets (PR27386). */
316 /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/
317
318 typedef struct avr_args
319 {
320 /* # Registers available for passing */
321 int nregs;
322
323 /* Next available register number */
324 int regno;
325 } CUMULATIVE_ARGS;
326
327 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
328 avr_init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL)
329
330 #define FUNCTION_ARG_REGNO_P(r) avr_function_arg_regno_p(r)
331
332 #define DEFAULT_PCC_STRUCT_RETURN 0
333
334 #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO)
335
336 #define HAVE_POST_INCREMENT 1
337 #define HAVE_PRE_DECREMENT 1
338
339 #define MAX_REGS_PER_ADDRESS 1
340
341 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \
342 do { \
343 rtx new_x = avr_legitimize_reload_address (&(X), MODE, OPNUM, TYPE, \
344 ADDR_TYPE (TYPE), \
345 IND_L, make_memloc); \
346 if (new_x) \
347 { \
348 X = new_x; \
349 goto WIN; \
350 } \
351 } while (0)
352
353 /* We increase branch costs after reload in order to keep basic-block
354 reordering from introducing out-of-line jumps and to prefer fall-through
355 edges instead. The default branch costs are 0, mainly because otherwise
356 do_store_flag might come up with bloated code. */
357 #define BRANCH_COST(speed_p, predictable_p) \
358 (avr_branch_cost + (reload_completed ? 4 : 0))
359
360 #define SLOW_BYTE_ACCESS 0
361
362 #define NO_FUNCTION_CSE 1
363
364 #define REGISTER_TARGET_PRAGMAS() \
365 do { \
366 avr_register_target_pragmas(); \
367 } while (0)
368
369 #define TEXT_SECTION_ASM_OP "\t.text"
370
371 #define DATA_SECTION_ASM_OP "\t.data"
372
373 #define BSS_SECTION_ASM_OP "\t.section .bss"
374
375 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
376 There are no shared libraries on this target, and these sections are
377 placed in the read-only program memory, so they are not writable. */
378
379 #undef CTORS_SECTION_ASM_OP
380 #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits"
381
382 #undef DTORS_SECTION_ASM_OP
383 #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits"
384
385 #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor
386
387 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor
388
389 #define SUPPORTS_INIT_PRIORITY 0
390
391 /* We pretend jump tables are in text section because otherwise,
392 final.c will switch to .rodata before jump tables and thereby
393 triggers __do_copy_data. As we implement ASM_OUTPUT_ADDR_VEC,
394 we still have full control over the jump tables themselves. */
395 #define JUMP_TABLES_IN_TEXT_SECTION 1
396
397 #define ASM_COMMENT_START " ; "
398
399 #define ASM_APP_ON "/* #APP */\n"
400
401 #define ASM_APP_OFF "/* #NOAPP */\n"
402
403 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$'))
404
405 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN) \
406 avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, false)
407
408 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
409 avr_asm_asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN, \
410 asm_output_aligned_bss)
411
412 #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN) \
413 avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, true)
414
415 /* Globalizing directive for a label. */
416 #define GLOBAL_ASM_OP ".global\t"
417
418 #define SUPPORTS_WEAK 1
419
420 #define HAS_INIT_SECTION 1
421
422 #define REGISTER_NAMES { \
423 "r0","r1","r2","r3","r4","r5","r6","r7", \
424 "r8","r9","r10","r11","r12","r13","r14","r15", \
425 "r16","r17","r18","r19","r20","r21","r22","r23", \
426 "r24","r25","r26","r27","r28","r29","r30","r31", \
427 "__SP_L__","__SP_H__","argL","argH"}
428
429 #define FINAL_PRESCAN_INSN(insn, operand, nop) \
430 avr_final_prescan_insn (insn, operand,nop)
431
432 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \
433 { \
434 gcc_assert (REGNO < 32); \
435 fprintf (STREAM, "\tpush\tr%d", REGNO); \
436 }
437
438 #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \
439 { \
440 gcc_assert (REGNO < 32); \
441 fprintf (STREAM, "\tpop\tr%d", REGNO); \
442 }
443
444 #define ASM_OUTPUT_ADDR_VEC(TLABEL, TDATA) \
445 avr_output_addr_vec (TLABEL, TDATA)
446
447 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
448 do { \
449 if ((POWER) > 0) \
450 fprintf (STREAM, "\t.p2align\t%d\n", POWER); \
451 } while (0)
452
453 #define CASE_VECTOR_MODE HImode
454
455 #undef WORD_REGISTER_OPERATIONS
456
457 /* Can move only a single byte from memory to reg in a
458 single instruction. */
459
460 #define MOVE_MAX 1
461
462 /* Allow upto two bytes moves to occur using by_pieces
463 infrastructure */
464
465 #define MOVE_MAX_PIECES 2
466
467 /* Set MOVE_RATIO to 3 to allow memory moves upto 4 bytes to happen
468 by pieces when optimizing for speed, like it did when MOVE_MAX_PIECES
469 was 4. When optimizing for size, allow memory moves upto 2 bytes.
470 Also see avr_use_by_pieces_infrastructure_p. */
471
472 #define MOVE_RATIO(speed) ((speed) ? 3 : 2)
473
474 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
475
476 #define Pmode HImode
477
478 #define FUNCTION_MODE HImode
479
480 #define DOLLARS_IN_IDENTIFIERS 0
481
482 #define TRAMPOLINE_SIZE 4
483
484 /* Store in cc_status the expressions
485 that the condition codes will describe
486 after execution of an instruction whose pattern is EXP.
487 Do not alter them if the instruction would not alter the cc's. */
488
489 #define NOTICE_UPDATE_CC(EXP, INSN) avr_notice_update_cc (EXP, INSN)
490
491 /* The add insns don't set overflow in a usable way. */
492 #define CC_OVERFLOW_UNUSABLE 01000
493 /* The mov,and,or,xor insns don't set carry. That's ok though as the
494 Z bit is all we need when doing unsigned comparisons on the result of
495 these insns (since they're always with 0). However, conditions.h has
496 CC_NO_OVERFLOW defined for this purpose. Rename it to something more
497 understandable. */
498 #define CC_NO_CARRY CC_NO_OVERFLOW
499
500
501 /* Output assembler code to FILE to increment profiler label # LABELNO
502 for profiling a function entry. */
503
504 #define FUNCTION_PROFILER(FILE, LABELNO) \
505 fprintf (FILE, "/* profiler %d */", (LABELNO))
506
507 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
508 (LENGTH = avr_adjust_insn_length (INSN, LENGTH))
509
510 extern const char *avr_devicespecs_file (int, const char**);
511
512 #define EXTRA_SPEC_FUNCTIONS \
513 { "device-specs-file", avr_devicespecs_file },
514
515 /* Driver self specs has lmited functionality w.r.t. '%s' for dynamic specs.
516 Apply '%s' to a static string to inflate the file (directory) name which
517 is used to diagnose problems with reading the specs file. */
518
519 #undef DRIVER_SELF_SPECS
520 #define DRIVER_SELF_SPECS \
521 " %:device-specs-file(device-specs%s %{mmcu=*:%*})"
522
523 /* No libstdc++ for now. Empty string doesn't work. */
524 #define LIBSTDCXX "gcc"
525
526 /* This is the default without any -mmcu=* option. */
527 #define MULTILIB_DEFAULTS { "mmcu=" AVR_MMCU_DEFAULT }
528
529 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \
530 TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO)
531
532 #define CR_TAB "\n\t"
533
534 #define DWARF2_ADDR_SIZE 4
535
536 #define INCOMING_RETURN_ADDR_RTX avr_incoming_return_addr_rtx ()
537 #define INCOMING_FRAME_SP_OFFSET (AVR_3_BYTE_PC ? 3 : 2)
538
539 /* The caller's stack pointer value immediately before the call
540 is one byte below the first argument. */
541 #define ARG_POINTER_CFA_OFFSET(FNDECL) -1
542
543 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
544 avr_hard_regno_rename_ok (OLD_REG, NEW_REG)
545
546 /* A C structure for machine-specific, per-function data.
547 This is added to the cfun structure. */
548 struct GTY(()) machine_function
549 {
550 /* 'true' - if current function is a naked function. */
551 int is_naked;
552
553 /* 'true' - if current function is an interrupt function
554 as specified by the "interrupt" attribute. */
555 int is_interrupt;
556
557 /* 'true' - if current function is a signal function
558 as specified by the "signal" attribute. */
559 int is_signal;
560
561 /* 'true' - if current function is a 'task' function
562 as specified by the "OS_task" attribute. */
563 int is_OS_task;
564
565 /* 'true' - if current function is a 'main' function
566 as specified by the "OS_main" attribute. */
567 int is_OS_main;
568
569 /* Current function stack size. */
570 int stack_usage;
571
572 /* 'true' if a callee might be tail called */
573 int sibcall_fails;
574
575 /* 'true' if the above is_foo predicates are sanity-checked to avoid
576 multiple diagnose for the same function. */
577 int attributes_checked_p;
578
579 /* 'true' - if current function shall not use '__gcc_isr' pseudo
580 instructions as specified by the "no_gccisr" attribute. */
581 int is_no_gccisr;
582
583 /* Used for `__gcc_isr' pseudo instruction handling of
584 non-naked ISR prologue / epilogue(s). */
585 struct
586 {
587 /* 'true' if this function actually uses "*gasisr" insns. */
588 int yes;
589 /* 'true' if this function is allowed to use "*gasisr" insns. */
590 int maybe;
591 /* The register numer as printed by the Done chunk. */
592 int regno;
593 } gasisr;
594
595 /* 'true' if this function references .L__stack_usage like with
596 __builtin_return_address. */
597 int use_L__stack_usage;
598 };
599
600 /* AVR does not round pushes, but the existence of this macro is
601 required in order for pushes to be generated. */
602 #define PUSH_ROUNDING(X) (X)
603
604 /* Define prototype here to avoid build warning. Some files using
605 ACCUMULATE_OUTGOING_ARGS (directly or indirectly) include
606 tm.h but not tm_p.h. */
607 extern int avr_accumulate_outgoing_args (void);
608 #define ACCUMULATE_OUTGOING_ARGS avr_accumulate_outgoing_args()
609
610 #define INIT_EXPANDERS avr_init_expanders()
611
612 /* Flags used for io and address attributes. */
613 #define SYMBOL_FLAG_IO_LOW (SYMBOL_FLAG_MACH_DEP << 4)
614 #define SYMBOL_FLAG_IO (SYMBOL_FLAG_MACH_DEP << 5)
615 #define SYMBOL_FLAG_ADDRESS (SYMBOL_FLAG_MACH_DEP << 6)