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git.ipfire.org Git - thirdparty/gcc.git/blob - gcc/config/i860/i860.h
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1 /* Definitions of target machine for GNU compiler, for Intel 860.
2 Copyright (C) 1989, 91, 93, 95, 96, 1997 Free Software Foundation, Inc.
3 Hacked substantially by Ron Guilmette (rfg@monkeys.com) to cater to
4 the whims of the System V Release 4 assembler.
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
24 /* Note that some other tm.h files include this one and then override
25 many of the definitions that relate to assembler syntax. */
28 /* Names to predefine in the preprocessor for this target machine. */
30 #define CPP_PREDEFINES "-Di860 -Dunix -Asystem(unix) -Asystem(svr4) -Acpu(i860) -Amachine(i860)"
32 /* Print subsidiary information on the compiler version in use. */
33 #define TARGET_VERSION fprintf (stderr, " (i860)");
35 /* Run-time compilation parameters selecting different hardware subsets
38 On the i860, we have one: TARGET_XP. This option allows gcc to generate
39 additional instructions available only on the newer i860 XP (but not on
43 extern int target_flags
;
45 /* Nonzero if we should generate code to use the fpu. */
46 #define TARGET_XP (target_flags & 1)
48 /* Macro to define tables used to set the flags.
49 This is a list in braces of pairs in braces,
50 each pair being { "NAME", VALUE }
51 where VALUE is the bits to set or minus the bits to clear.
52 An empty string NAME is used to identify the default VALUE. */
54 #define TARGET_SWITCHES \
55 { {"xp", 1, "Generate code which uses the FPU"}, \
56 {"noxp", -1, "Do not generate code which uses the FPU"}, \
57 {"xr", -1, "Do not generate code which uses the FPU"}, \
58 { "", TARGET_DEFAULT, NULL}}
60 #define TARGET_DEFAULT 0
62 /* target machine storage layout */
64 /* Define this if most significant bit is lowest numbered
65 in instructions that operate on numbered bit-fields.
66 This is a moot question on the i860 due to the lack of bit-field insns. */
67 #define BITS_BIG_ENDIAN 0
69 /* Define this if most significant byte of a word is the lowest numbered. */
70 /* That is not true on i860 in the mode we will use. */
71 #define BYTES_BIG_ENDIAN 0
73 /* Define this if most significant word of a multiword number is the lowest
75 /* For the i860 this goes with BYTES_BIG_ENDIAN. */
76 /* NOTE: GCC probably cannot support a big-endian i860
77 because GCC fundamentally assumes that the order of words
78 in memory as the same as the order in registers.
79 That's not true for the big-endian i860.
80 The big-endian i860 isn't important enough to
81 justify the trouble of changing this assumption. */
82 #define WORDS_BIG_ENDIAN 0
84 /* number of bits in an addressable storage unit */
85 #define BITS_PER_UNIT 8
87 /* Width in bits of a "word", which is the contents of a machine register.
88 Note that this is not necessarily the width of data type `int';
89 if using 16-bit ints on a 68000, this would still be 32.
90 But on a machine with 16-bit registers, this would be 16. */
91 #define BITS_PER_WORD 32
93 /* Width of a word, in units (bytes). */
94 #define UNITS_PER_WORD 4
96 /* Width in bits of a pointer.
97 See also the macro `Pmode' defined below. */
98 #define POINTER_SIZE 32
100 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
101 #define PARM_BOUNDARY 32
103 /* Boundary (in *bits*) on which stack pointer should be aligned. */
104 #define STACK_BOUNDARY 128
106 /* Allocation boundary (in *bits*) for the code of a function. */
107 #define FUNCTION_BOUNDARY 64
109 /* Alignment of field after `int : 0' in a structure. */
110 #define EMPTY_FIELD_BOUNDARY 32
112 /* Every structure's size must be a multiple of this. */
113 #define STRUCTURE_SIZE_BOUNDARY 8
115 /* Minimum size in bits of the largest boundary to which any
116 and all fundamental data types supported by the hardware
117 might need to be aligned. No data type wants to be aligned
118 rounder than this. The i860 supports 128-bit (long double)
119 floating point quantities, and the System V Release 4 i860
120 ABI requires these to be aligned to 16-byte (128-bit)
122 #define BIGGEST_ALIGNMENT 128
124 /* Set this nonzero if move instructions will actually fail to work
125 when given unaligned data. */
126 #define STRICT_ALIGNMENT 1
128 /* If bit field type is int, dont let it cross an int,
129 and give entire struct the alignment of an int. */
130 #define PCC_BITFIELD_TYPE_MATTERS 1
132 /* Standard register usage. */
134 /* Number of actual hardware registers.
135 The hardware registers are assigned numbers for the compiler
136 from 0 to just below FIRST_PSEUDO_REGISTER.
137 All registers that the compiler knows about must be given numbers,
138 even those that are not normally considered general registers.
140 i860 has 32 fullword registers and 32 floating point registers. */
142 #define FIRST_PSEUDO_REGISTER 64
144 /* 1 for registers that have pervasive standard uses
145 and are not available for the register allocator.
146 On the i860, this includes the always-0 registers
147 and fp, sp, arg pointer, and the return address.
148 Also r31, used for special purposes for constant addresses. */
149 #define FIXED_REGISTERS \
150 {1, 1, 1, 1, 0, 0, 0, 0, \
151 0, 0, 0, 0, 0, 0, 0, 0, \
152 0, 0, 0, 0, 0, 0, 0, 0, \
153 0, 0, 0, 0, 0, 0, 0, 1, \
154 1, 1, 0, 0, 0, 0, 0, 0, \
155 0, 0, 0, 0, 0, 0, 0, 0, \
156 0, 0, 0, 0, 0, 0, 0, 0, \
157 0, 0, 0, 0, 0, 0, 0, 0}
159 /* 1 for registers not available across function calls.
160 These must include the FIXED_REGISTERS and also any
161 registers that can be used without being saved.
162 On the i860, these are r0-r3, r16-r31, f0, f1, and f16-f31. */
163 #define CALL_USED_REGISTERS \
164 {1, 1, 1, 1, 0, 0, 0, 0, \
165 0, 0, 0, 0, 0, 0, 0, 0, \
166 1, 1, 1, 1, 1, 1, 1, 1, \
167 1, 1, 1, 1, 1, 1, 1, 1, \
168 1, 1, 0, 0, 0, 0, 0, 0, \
169 1, 1, 1, 1, 1, 1, 1, 1, \
170 1, 1, 1, 1, 1, 1, 1, 1, \
171 1, 1, 1, 1, 1, 1, 1, 1}
173 /* Try to get a non-preserved register before trying to get one we will
174 have to preserve. Try to get an FP register only *after* trying to
175 get a general register, because it is relatively expensive to move
176 into or out of an FP register. */
178 #define REG_ALLOC_ORDER \
179 {31, 30, 29, 28, 27, 26, 25, 24, \
180 23, 22, 21, 20, 19, 18, 17, 16, \
181 15, 14, 13, 12, 11, 10, 9, 8, \
182 7, 6, 5, 4, 3, 2, 1, 0, \
183 63, 62, 61, 60, 59, 58, 57, 56, \
184 55, 54, 53, 52, 51, 50, 49, 48, \
185 47, 46, 45, 44, 43, 42, 41, 40, \
186 39, 38, 37, 36, 35, 34, 33, 32}
188 /* Return number of consecutive hard regs needed starting at reg REGNO
189 to hold something of mode MODE.
190 This is ordinarily the length in words of a value of mode MODE
191 but can be less for certain modes in special long registers.
193 On the i860, all registers hold 32 bits worth. */
194 #define HARD_REGNO_NREGS(REGNO, MODE) \
195 (((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
197 #define REGNO_MODE_ALIGNED(REGNO, MODE) \
198 (((REGNO) % ((GET_MODE_UNIT_SIZE (MODE) + 3) / 4)) == 0)
200 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
202 On the i860, we allow anything to go into any registers, but we require
203 any sort of value going into the FP registers to be properly aligned
204 (based on its size) within the FP register set.
206 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
208 || (MODE) == VOIDmode || (MODE) == BLKmode \
209 || REGNO_MODE_ALIGNED (REGNO, MODE))
211 /* Value is 1 if it is a good idea to tie two pseudo registers
212 when one has mode MODE1 and one has mode MODE2.
213 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
214 for any hard reg, then this must be 0 for correct output. */
215 /* I think that is not always true; alignment restrictions for doubles
216 should not prevent tying them with singles. So try allowing that.
217 On the other hand, don't let fixed and floating be tied;
218 this restriction is not necessary, but may make better code. */
219 #define MODES_TIEABLE_P(MODE1, MODE2) \
220 ((GET_MODE_CLASS (MODE1) == MODE_FLOAT \
221 || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
222 == (GET_MODE_CLASS (MODE2) == MODE_FLOAT \
223 || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
225 /* Specify the registers used for certain standard purposes.
226 The values of these macros are register numbers. */
228 /* i860 pc isn't overloaded on a register that the compiler knows about. */
229 /* #define PC_REGNUM */
231 /* Register to use for pushing function arguments. */
232 #define STACK_POINTER_REGNUM 2
234 /* Base register for access to local variables of the function. */
235 #define FRAME_POINTER_REGNUM 3
237 /* Value should be nonzero if functions must have frame pointers.
238 Zero means the frame pointer need not be set up (and parms
239 may be accessed via the stack pointer) in functions that seem suitable.
240 This is computed in `reload', in reload1.c. */
241 #define FRAME_POINTER_REQUIRED 1
243 /* Base register for access to arguments of the function. */
244 #define ARG_POINTER_REGNUM 28
246 /* Register in which static-chain is passed to a function. */
247 #define STATIC_CHAIN_REGNUM 29
249 /* Register in which address to store a structure value
250 is passed to a function. */
251 #define STRUCT_VALUE_REGNUM 16
253 /* Register to use when a source of a floating-point zero is needed. */
256 /* Define the classes of registers for register constraints in the
257 machine description. Also define ranges of constants.
259 One of the classes must always be named ALL_REGS and include all hard regs.
260 If there is more than one class, another class must be named NO_REGS
261 and contain no registers.
263 The name GENERAL_REGS must be the name of a class (or an alias for
264 another name such as ALL_REGS). This is the class of registers
265 that is allowed by "g" or "r" in a register constraint.
266 Also, registers outside this class are allocated only when
267 instructions express preferences for them.
269 The classes must be numbered in nondecreasing order; that is,
270 a larger-numbered class must never be contained completely
271 in a smaller-numbered class.
273 For any two classes, it is very desirable that there be another
274 class that represents their union. */
276 /* The i860 has two kinds of registers, hence four classes. */
278 enum reg_class
{ NO_REGS
, GENERAL_REGS
, FP_REGS
, ALL_REGS
, LIM_REG_CLASSES
};
280 #define N_REG_CLASSES (int) LIM_REG_CLASSES
282 /* Give names of register classes as strings for dump file. */
284 #define REG_CLASS_NAMES \
285 {"NO_REGS", "GENERAL_REGS", "FP_REGS", "ALL_REGS" }
287 /* Define which registers fit in which classes.
288 This is an initializer for a vector of HARD_REG_SET
289 of length N_REG_CLASSES. */
291 #define REG_CLASS_CONTENTS \
292 {{0, 0}, {0xffffffff, 0}, \
293 {0, 0xffffffff}, {0xffffffff, 0xffffffff}}
295 /* The same information, inverted:
296 Return the class number of the smallest class containing
297 reg number REGNO. This could be a conditional expression
298 or could index an array. */
300 #define REGNO_REG_CLASS(REGNO) \
301 ((REGNO) >= 32 ? FP_REGS : GENERAL_REGS)
303 /* The class value for index registers, and the one for base regs. */
304 #define INDEX_REG_CLASS GENERAL_REGS
305 #define BASE_REG_CLASS GENERAL_REGS
307 /* Get reg_class from a letter such as appears in the machine description. */
309 #define REG_CLASS_FROM_LETTER(C) \
310 ((C) == 'f' ? FP_REGS : NO_REGS)
312 /* The letters I, J, K, L and M in a register constraint string
313 can be used to stand for particular ranges of immediate operands.
314 This macro defines what the ranges are.
315 C is the letter, and VALUE is a constant value.
316 Return 1 if VALUE is in the range specified by C.
318 For the i860, `I' is used for the range of constants
319 an add/subtract insn can actually contain.
320 But not including -0x8000, since we need
321 to negate the constant sometimes.
322 `J' is used for the range which is just zero (since that is R0).
323 `K' is used for the range allowed in bte.
324 `L' is used for the range allowed in logical insns. */
326 #define SMALL_INT(X) ((unsigned) (INTVAL (X) + 0x7fff) < 0xffff)
328 #define LOGIC_INT(X) ((unsigned) INTVAL (X) < 0x10000)
330 #define SMALL_INTVAL(X) ((unsigned) ((X) + 0x7fff) < 0xffff)
332 #define LOGIC_INTVAL(X) ((unsigned) (X) < 0x10000)
334 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
335 ((C) == 'I' ? ((unsigned) (VALUE) + 0x7fff) < 0xffff \
336 : (C) == 'J' ? (VALUE) == 0 \
337 : (C) == 'K' ? (unsigned) (VALUE) < 0x20 \
338 : (C) == 'L' ? (unsigned) (VALUE) < 0x10000 \
341 /* Return non-zero if the given VALUE is acceptable for the
342 constraint letter C. For the i860, constraint letter 'G'
343 permits only a floating-point zero value. */
344 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
345 ((C) == 'G' && CONST_DOUBLE_LOW ((VALUE)) == 0 \
346 && CONST_DOUBLE_HIGH ((VALUE)) == 0)
348 /* Given an rtx X being reloaded into a reg required to be
349 in class CLASS, return the class of reg to actually use.
350 In general this is just CLASS; but on some machines
351 in some cases it is preferable to use a more restrictive class.
353 If we are trying to put an integer constant into some register, prefer an
354 integer register to an FP register. If we are trying to put a
355 non-zero floating-point constant into some register, use an integer
356 register if the constant is SFmode and GENERAL_REGS is one of our options.
357 Otherwise, put the constant into memory.
359 When reloading something smaller than a word, use a general reg
360 rather than an FP reg. */
362 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
363 ((CLASS) == ALL_REGS && GET_CODE (X) == CONST_INT ? GENERAL_REGS \
364 : ((GET_MODE (X) == HImode || GET_MODE (X) == QImode) \
365 && (CLASS) == ALL_REGS) \
367 : (GET_CODE (X) == CONST_DOUBLE \
368 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
369 && ! CONST_DOUBLE_OK_FOR_LETTER_P (X, 'G')) \
370 ? ((CLASS) == ALL_REGS && GET_MODE (X) == SFmode ? GENERAL_REGS \
371 : (CLASS) == GENERAL_REGS && GET_MODE (X) == SFmode ? (CLASS) \
375 /* Return the register class of a scratch register needed to copy IN into
376 a register in CLASS in MODE. If it can be done directly, NO_REGS is
379 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,IN) \
380 ((CLASS) == FP_REGS && CONSTANT_P (IN) ? GENERAL_REGS : NO_REGS)
382 /* Return the maximum number of consecutive registers
383 needed to represent mode MODE in a register of class CLASS. */
384 /* On the i860, this is the size of MODE in words. */
385 #define CLASS_MAX_NREGS(CLASS, MODE) \
386 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
388 /* Stack layout; function entry, exit and calling. */
390 /* Define this if pushing a word on the stack
391 makes the stack pointer a smaller address. */
392 #define STACK_GROWS_DOWNWARD
394 /* Define this if the nominal address of the stack frame
395 is at the high-address end of the local variables;
396 that is, each additional local variable allocated
397 goes at a more negative offset in the frame. */
398 #define FRAME_GROWS_DOWNWARD
400 /* Offset within stack frame to start allocating local variables at.
401 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
402 first local allocated. Otherwise, it is the offset to the BEGINNING
403 of the first local allocated. */
404 #define STARTING_FRAME_OFFSET 0
406 /* If we generate an insn to push BYTES bytes,
407 this says how many the stack pointer really advances by.
408 On the i860, don't define this because there are no push insns. */
409 /* #define PUSH_ROUNDING(BYTES) */
411 /* Offset of first parameter from the argument pointer register value. */
412 #define FIRST_PARM_OFFSET(FNDECL) 0
414 /* Value is the number of bytes of arguments automatically
415 popped when returning from a subroutine call.
416 FUNDECL is the declaration node of the function (as a tree),
417 FUNTYPE is the data type of the function (as a tree),
418 or for a library call it is an identifier node for the subroutine name.
419 SIZE is the number of bytes of arguments passed on the stack. */
421 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
423 /* Define how to find the value returned by a function.
424 VALTYPE is the data type of the value (as a tree).
425 If the precise function being called is known, FUNC is its FUNCTION_DECL;
426 otherwise, FUNC is 0. */
428 /* On the i860, the value register depends on the mode. */
430 #define FUNCTION_VALUE(VALTYPE, FUNC) \
431 gen_rtx (REG, TYPE_MODE (VALTYPE), \
432 (GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_FLOAT \
435 /* Define how to find the value returned by a library function
436 assuming the value has mode MODE. */
438 #define LIBCALL_VALUE(MODE) \
439 gen_rtx (REG, MODE, \
440 (GET_MODE_CLASS ((MODE)) == MODE_FLOAT \
443 /* 1 if N is a possible register number for a function value
444 as seen by the caller. */
446 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 40 || (N) == 16)
448 /* 1 if N is a possible register number for function argument passing.
449 On the i860, these are r16-r27 and f8-f15. */
451 #define FUNCTION_ARG_REGNO_P(N) \
452 (((N) < 28 && (N) > 15) || ((N) < 48 && (N) >= 40))
454 /* Define a data type for recording info about an argument list
455 during the scan of that argument list. This data type should
456 hold all necessary information about the function itself
457 and about the args processed so far, enough to enable macros
458 such as FUNCTION_ARG to determine where the next arg should go.
460 On the i860, we must count separately the number of general registers used
461 and the number of float registers used. */
463 struct cumulative_args
{ int ints
, floats
; };
464 #define CUMULATIVE_ARGS struct cumulative_args
466 /* Initialize a variable CUM of type CUMULATIVE_ARGS
467 for a call to a function whose data type is FNTYPE.
468 For a library call, FNTYPE is 0.
470 On the i860, the general-reg offset normally starts at 0,
471 but starts at 4 bytes
472 when the function gets a structure-value-address as an
473 invisible first argument. */
475 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
476 ((CUM).ints = ((FNTYPE) != 0 && aggregate_value_p (TREE_TYPE ((FNTYPE))) \
480 /* Machine-specific subroutines of the following macros. */
481 #define CEILING(X,Y) (((X) + (Y) - 1) / (Y))
482 #define ROUNDUP(X,Y) (CEILING ((X), (Y)) * (Y))
484 /* Update the data in CUM to advance over an argument
485 of mode MODE and data type TYPE.
486 (TYPE is null for libcalls where that information may not be available.)
487 Floats, and doubleword ints, are returned in f regs;
488 other ints, in r regs.
489 Aggregates, even short ones, are passed in memory. */
491 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
492 ((TYPE) != 0 && (TREE_CODE ((TYPE)) == RECORD_TYPE \
493 || TREE_CODE ((TYPE)) == UNION_TYPE) \
495 : GET_MODE_CLASS ((MODE)) == MODE_FLOAT || (MODE) == DImode \
496 ? ((CUM).floats = (ROUNDUP ((CUM).floats, GET_MODE_SIZE ((MODE))) \
497 + ROUNDUP (GET_MODE_SIZE (MODE), 4))) \
498 : GET_MODE_CLASS ((MODE)) == MODE_INT \
499 ? ((CUM).ints = (ROUNDUP ((CUM).ints, GET_MODE_SIZE ((MODE))) \
500 + ROUNDUP (GET_MODE_SIZE (MODE), 4))) \
503 /* Determine where to put an argument to a function.
504 Value is zero to push the argument on the stack,
505 or a hard register in which to store the argument.
507 MODE is the argument's machine mode.
508 TYPE is the data type of the argument (as a tree).
509 This is null for libcalls where that information may
511 CUM is a variable of type CUMULATIVE_ARGS which gives info about
512 the preceding args and about the function being called.
513 NAMED is nonzero if this argument is a named parameter
514 (otherwise it is an extra parameter matching an ellipsis). */
516 /* On the i860, the first 12 words of integer arguments go in r16-r27,
517 and the first 8 words of floating arguments go in f8-f15.
518 DImode values are treated as floats. */
520 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
521 ((TYPE) != 0 && (TREE_CODE ((TYPE)) == RECORD_TYPE \
522 || TREE_CODE ((TYPE)) == UNION_TYPE) \
524 : GET_MODE_CLASS ((MODE)) == MODE_FLOAT || (MODE) == DImode \
525 ? (ROUNDUP ((CUM).floats, GET_MODE_SIZE ((MODE))) < 32 \
526 ? gen_rtx (REG, (MODE), \
527 40+(ROUNDUP ((CUM).floats, \
528 GET_MODE_SIZE ((MODE))) \
531 : GET_MODE_CLASS ((MODE)) == MODE_INT \
532 ? (ROUNDUP ((CUM).ints, GET_MODE_SIZE ((MODE))) < 48 \
533 ? gen_rtx (REG, (MODE), \
534 16+(ROUNDUP ((CUM).ints, \
535 GET_MODE_SIZE ((MODE))) \
540 /* For an arg passed partly in registers and partly in memory,
541 this is the number of registers used.
542 For args passed entirely in registers or entirely in memory, zero. */
544 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
546 /* If defined, a C expression that gives the alignment boundary, in
547 bits, of an argument with the specified mode and type. If it is
548 not defined, `PARM_BOUNDARY' is used for all arguments. */
550 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
552 ? ((TYPE_ALIGN(TYPE) <= PARM_BOUNDARY) \
554 : TYPE_ALIGN(TYPE)) \
555 : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
557 : GET_MODE_ALIGNMENT(MODE)))
559 /* This macro generates the assembly code for function entry.
561 FILE is a stdio stream to output the code to.
562 SIZE is an int: how many units of temporary storage to allocate.
565 #define FUNCTION_PROLOGUE(FILE, SIZE) function_prologue ((FILE), (SIZE))
567 /* Output a no-op just before the beginning of the function,
568 to ensure that there does not appear to be a delayed branch there.
569 Such a thing would confuse interrupt recovery. */
570 #define ASM_OUTPUT_FUNCTION_PREFIX(FILE,NAME) \
571 fprintf (FILE, "\tnop\n")
573 /* Output assembler code to FILE to increment profiler label # LABELNO
574 for profiling a function entry. */
576 #define FUNCTION_PROFILER(FILE, LABELNO) \
579 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
580 the stack pointer does not matter. The value is tested only in
581 functions that have frame pointers.
582 No definition is equivalent to always zero. */
584 #define EXIT_IGNORE_STACK 1
586 /* This macro generates the assembly code for function exit.
588 FILE is a stdio stream to output the code to.
589 SIZE is an int: how many units of temporary storage to allocate.
591 The function epilogue should not depend on the current stack pointer!
592 It should use the frame pointer only. This is mandatory because
593 of alloca; we also take advantage of it to omit stack adjustments
597 #define FUNCTION_EPILOGUE(FILE, SIZE) function_epilogue ((FILE), (SIZE))
599 /* Generate necessary RTL for __builtin_saveregs(). */
600 #define EXPAND_BUILTIN_SAVEREGS() \
603 /* Define the `__builtin_va_list' type for the ABI. */
604 #define BUILD_VA_LIST_TYPE(VALIST) \
605 (VALIST) = i860_build_va_list ()
607 /* Implement `va_start' for varargs and stdarg. */
608 #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
609 i860_va_start (stdarg, valist, nextarg)
611 /* Implement `va_arg'. */
612 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
613 i860_va_arg (valist, type)
615 /* Store in the variable DEPTH the initial difference between the
616 frame pointer reg contents and the stack pointer reg contents,
617 as of the start of the function body. This depends on the layout
618 of the fixed parts of the stack frame and on how registers are saved.
620 On the i860, FRAME_POINTER_REQUIRED is always 1, so the definition of this
621 macro doesn't matter. But it must be defined. */
623 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \
624 do { (DEPTH) = 0; } while (0)
626 /* Output assembler code for a block containing the constant parts
627 of a trampoline, leaving space for the variable parts. */
629 /* On the i860, the trampoline contains five instructions:
630 orh #TOP_OF_FUNCTION,r0,r31
631 or #BOTTOM_OF_FUNCTION,r31,r31
632 orh #TOP_OF_STATIC,r0,r29
634 or #BOTTOM_OF_STATIC,r29,r29 */
635 #define TRAMPOLINE_TEMPLATE(FILE) \
637 ASM_OUTPUT_INT (FILE, GEN_INT (0xec1f0000)); \
638 ASM_OUTPUT_INT (FILE, GEN_INT (0xe7ff0000)); \
639 ASM_OUTPUT_INT (FILE, GEN_INT (0xec1d0000)); \
640 ASM_OUTPUT_INT (FILE, GEN_INT (0x4000f800)); \
641 ASM_OUTPUT_INT (FILE, GEN_INT (0xe7bd0000)); \
644 /* Length in units of the trampoline for entering a nested function. */
646 #define TRAMPOLINE_SIZE 20
648 /* Emit RTL insns to initialize the variable parts of a trampoline.
649 FNADDR is an RTX for the address of the function's pure code.
650 CXT is an RTX for the static chain value for the function.
652 Store hi function at +0, low function at +4,
653 hi static at +8, low static at +16 */
655 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
657 rtx cxt = force_reg (Pmode, CXT); \
658 rtx fn = force_reg (Pmode, FNADDR); \
659 rtx hi_cxt = expand_shift (RSHIFT_EXPR, SImode, cxt, \
660 size_int (16), 0, 0); \
661 rtx hi_fn = expand_shift (RSHIFT_EXPR, SImode, fn, \
662 size_int (16), 0, 0); \
663 emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 16)), \
664 gen_lowpart (HImode, cxt)); \
665 emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 4)), \
666 gen_lowpart (HImode, fn)); \
667 emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 8)), \
668 gen_lowpart (HImode, hi_cxt)); \
669 emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 0)), \
670 gen_lowpart (HImode, hi_fn)); \
673 /* Addressing modes, and classification of registers for them. */
675 /* #define HAVE_POST_INCREMENT 0 */
676 /* #define HAVE_POST_DECREMENT 0 */
678 /* #define HAVE_PRE_DECREMENT 0 */
679 /* #define HAVE_PRE_INCREMENT 0 */
681 /* Macros to check register numbers against specific register classes. */
683 /* These assume that REGNO is a hard or pseudo reg number.
684 They give nonzero only if REGNO is a hard reg of the suitable class
685 or a pseudo reg currently allocated to a suitable hard reg.
686 Since they use reg_renumber, they are safe only once reg_renumber
687 has been allocated, which happens in local-alloc.c. */
689 #define REGNO_OK_FOR_INDEX_P(REGNO) \
690 ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
691 #define REGNO_OK_FOR_BASE_P(REGNO) \
692 ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
693 #define REGNO_OK_FOR_FP_P(REGNO) \
694 (((REGNO) ^ 0x20) < 32 || (unsigned) (reg_renumber[REGNO] ^ 0x20) < 32)
696 /* Now macros that check whether X is a register and also,
697 strictly, whether it is in a specified class.
699 These macros are specific to the i860, and may be used only
700 in code for printing assembler insns and in conditions for
701 define_optimization. */
703 /* 1 if X is an fp register. */
705 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
707 /* Maximum number of registers that can appear in a valid memory address. */
709 #define MAX_REGS_PER_ADDRESS 2
711 /* Recognize any constant value that is a valid address. */
713 #define CONSTANT_ADDRESS_P(X) \
714 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
715 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
716 || GET_CODE (X) == HIGH)
718 /* Nonzero if the constant value X is a legitimate general operand.
719 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
721 On the Sparc, this is anything but a CONST_DOUBLE.
722 Let's try permitting CONST_DOUBLEs and see what happens. */
724 #define LEGITIMATE_CONSTANT_P(X) 1
726 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
727 and check its validity for a certain class.
728 We have two alternate definitions for each of them.
729 The usual definition accepts all pseudo regs; the other rejects
730 them unless they have been allocated suitable hard regs.
731 The symbol REG_OK_STRICT causes the latter definition to be used.
733 Most source files want to accept pseudo regs in the hope that
734 they will get allocated to the class that the insn wants them to be in.
735 Source files for reload pass need to be strict.
736 After reload, it makes no difference, since pseudo regs have
737 been eliminated by then. */
739 #ifndef REG_OK_STRICT
741 /* Nonzero if X is a hard reg that can be used as an index
742 or if it is a pseudo reg. */
743 #define REG_OK_FOR_INDEX_P(X) (((unsigned) REGNO (X)) - 32 >= 14)
744 /* Nonzero if X is a hard reg that can be used as a base reg
745 or if it is a pseudo reg. */
746 #define REG_OK_FOR_BASE_P(X) (((unsigned) REGNO (X)) - 32 >= 14)
750 /* Nonzero if X is a hard reg that can be used as an index. */
751 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
752 /* Nonzero if X is a hard reg that can be used as a base reg. */
753 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
757 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
758 that is a valid memory address for an instruction.
759 The MODE argument is the machine mode for the MEM expression
760 that wants to use this address.
762 On the i860, the actual addresses must be REG+REG or REG+SMALLINT.
763 But we can treat a SYMBOL_REF as legitimate if it is part of this
764 function's constant-pool, because such addresses can actually
765 be output as REG+SMALLINT.
767 The displacement in an address must be a multiple of the alignment.
769 Try making SYMBOL_REF (and other things which are CONSTANT_ADDRESS_P)
770 a legitimate address, regardless. Because the only insns which can use
771 memory are load or store insns, the added hair in the machine description
772 is not that bad. It should also speed up the compiler by halving the number
773 of insns it must manage for each (MEM (SYMBOL_REF ...)) involved. */
775 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
776 { if (GET_CODE (X) == REG) \
777 { if (REG_OK_FOR_BASE_P (X)) goto ADDR; } \
778 else if (GET_CODE (X) == PLUS) \
780 if (GET_CODE (XEXP (X, 0)) == REG \
781 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
783 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
784 && INTVAL (XEXP (X, 1)) >= -0x8000 \
785 && INTVAL (XEXP (X, 1)) < 0x8000 \
786 && (INTVAL (XEXP (X, 1)) & (GET_MODE_SIZE (MODE) - 1)) == 0) \
789 else if (GET_CODE (XEXP (X, 1)) == REG \
790 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
792 if (GET_CODE (XEXP (X, 0)) == CONST_INT \
793 && INTVAL (XEXP (X, 0)) >= -0x8000 \
794 && INTVAL (XEXP (X, 0)) < 0x8000 \
795 && (INTVAL (XEXP (X, 0)) & (GET_MODE_SIZE (MODE) - 1)) == 0) \
799 else if (CONSTANT_ADDRESS_P (X)) \
803 /* Try machine-dependent ways of modifying an illegitimate address
804 to be legitimate. If we find one, return the new, valid address.
805 This macro is used in only one place: `memory_address' in explow.c.
807 OLDX is the address as it was before break_out_memory_refs was called.
808 In some cases it is useful to look at this to decide what needs to be done.
810 MODE and WIN are passed so that this macro can use
811 GO_IF_LEGITIMATE_ADDRESS.
813 It is always safe for this macro to do nothing. It exists to recognize
814 opportunities to optimize the output. */
816 /* On the i860, change COMPLICATED + CONSTANT to REG+CONSTANT.
817 Also change a symbolic constant to a REG,
818 though that may not be necessary. */
820 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
821 { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
822 (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
823 force_operand (XEXP (X, 0), 0)); \
824 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
825 (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
826 force_operand (XEXP (X, 1), 0)); \
827 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == PLUS) \
828 (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
829 force_operand (XEXP (X, 0), 0)); \
830 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == PLUS) \
831 (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
832 force_operand (XEXP (X, 1), 0)); \
833 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) != REG \
834 && GET_CODE (XEXP (X, 0)) != CONST_INT) \
835 (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
836 copy_to_mode_reg (SImode, XEXP (X, 0))); \
837 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) != REG \
838 && GET_CODE (XEXP (X, 1)) != CONST_INT) \
839 (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
840 copy_to_mode_reg (SImode, XEXP (X, 1))); \
841 if (GET_CODE (x) == SYMBOL_REF) \
842 (X) = copy_to_reg (X); \
843 if (GET_CODE (x) == CONST) \
844 (X) = copy_to_reg (X); \
845 if (memory_address_p (MODE, X)) \
848 /* Go to LABEL if ADDR (a legitimate address expression)
849 has an effect that depends on the machine mode it is used for.
850 On the i860 this is never true.
851 There are some addresses that are invalid in wide modes
852 but valid for narrower modes, but they shouldn't affect
853 the places that use this macro. */
855 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
857 /* Specify the machine mode that this machine uses
858 for the index in the tablejump instruction. */
859 #define CASE_VECTOR_MODE SImode
861 /* Define as C expression which evaluates to nonzero if the tablejump
862 instruction expects the table to contain offsets from the address of the
864 Do not define this if the table should contain absolute addresses. */
865 /* #define CASE_VECTOR_PC_RELATIVE 1 */
867 /* Specify the tree operation to be used to convert reals to integers. */
868 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
870 /* This is the kind of divide that is easiest to do in the general case. */
871 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
873 /* Must pass floats to libgcc functions as doubles. */
874 #define LIBGCC_NEEDS_DOUBLE 1
876 #define DIVSI3_LIBCALL "*.div"
877 #define UDIVSI3_LIBCALL "*.udiv"
878 #define REMSI3_LIBCALL "*.rem"
879 #define UREMSI3_LIBCALL "*.urem"
881 /* Define this as 1 if `char' should by default be signed; else as 0. */
882 #define DEFAULT_SIGNED_CHAR 1
884 /* Max number of bytes we can move from memory to memory
885 in one reasonably fast instruction. */
888 /* Nonzero if access to memory by bytes is slow and undesirable. */
889 #define SLOW_BYTE_ACCESS 0
891 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
892 is done just by pretending it is already truncated. */
893 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
895 /* Value is 1 if it generates better code to perform an unsigned comparison
896 on the given literal integer value in the given mode when we are only
897 looking for an equal/non-equal result. */
898 /* For the i860, if the immediate value has its high-order 27 bits zero,
899 then we want to engineer an unsigned comparison for EQ/NE because
900 such values can fit in the 5-bit immediate field of a bte or btne
901 instruction (which gets zero extended before comparing). For all
902 other immediate values on the i860, we will use signed compares
903 because that avoids the need for doing explicit xor's to zero_extend
904 the non-constant operand in cases where it was (mem:QI ...) or a
905 (mem:HI ...) which always gets automatically sign-extended by the
906 hardware upon loading. */
908 #define LITERAL_COMPARE_BETTER_UNSIGNED(intval, mode) \
909 (((unsigned) (intval) & 0x1f) == (unsigned) (intval))
911 /* Specify the machine mode that pointers have.
912 After generation of rtl, the compiler makes no further distinction
913 between pointers and any other objects of this machine mode. */
916 /* A function address in a call instruction
917 is a byte address (for indexing purposes)
918 so give the MEM rtx a byte's mode. */
919 #define FUNCTION_MODE SImode
921 /* Define this if addresses of constant functions
922 shouldn't be put through pseudo regs where they can be cse'd.
923 Desirable on machines where ordinary constants are expensive
924 but a CALL with constant address is cheap. */
925 #define NO_FUNCTION_CSE
927 /* Compute the cost of computing a constant rtl expression RTX
928 whose rtx-code is CODE. The body of this macro is a portion
929 of a switch statement. If the code is computed here,
930 return it with a return statement. Otherwise, break from the switch. */
932 #define CONST_COSTS(RTX,CODE, OUTER_CODE) \
934 if (INTVAL (RTX) == 0) \
936 if (INTVAL (RTX) < 0x2000 && INTVAL (RTX) >= -0x2000) return 1; \
944 /* Specify the cost of a branch insn; roughly the number of extra insns that
945 should be added to avoid a branch.
947 Set this to 3 on the i860 since branches may often take three cycles. */
949 #define BRANCH_COST 3
951 /* Tell final.c how to eliminate redundant test instructions. */
953 /* Here we define machine-dependent flags and fields in cc_status
954 (see `conditions.h'). */
956 /* This holds the value sourcing h%r31. We keep this info
957 around so that mem/mem ops, such as increment and decrement,
958 etc, can be performed reasonably. */
959 #define CC_STATUS_MDEP rtx
961 #define CC_STATUS_MDEP_INIT (cc_status.mdep = 0)
963 #define CC_NEGATED 01000
965 /* We use this macro in those places in the i860.md file where we would
966 normally just do a CC_STATUS_INIT (for other machines). This macro
967 differs from CC_STATUS_INIT in that it doesn't mess with the special
968 bits or fields which describe what is currently in the special r31
969 scratch register, but it does clear out everything that actually
970 relates to the condition code bit of the i860. */
972 #define CC_STATUS_PARTIAL_INIT \
973 (cc_status.flags &= (CC_KNOW_HI_R31 | CC_HI_R31_ADJ), \
974 cc_status.value1 = 0, \
975 cc_status.value2 = 0)
977 /* Nonzero if we know the value of h%r31. */
978 #define CC_KNOW_HI_R31 0100000
980 /* Nonzero if h%r31 is actually ha%something, rather than h%something. */
981 #define CC_HI_R31_ADJ 0200000
983 /* Store in cc_status the expressions
984 that the condition codes will describe
985 after execution of an instruction whose pattern is EXP.
986 Do not alter them if the instruction would not alter the cc's. */
988 /* On the i860, only compare insns set a useful condition code. */
990 #define NOTICE_UPDATE_CC(EXP, INSN) \
991 { cc_status.flags &= (CC_KNOW_HI_R31 | CC_HI_R31_ADJ); \
992 cc_status.value1 = 0; cc_status.value2 = 0; }
994 /* Control the assembler format that we output. */
996 /* Assembler pseudos to introduce constants of various size. */
998 #define ASM_BYTE_OP "\t.byte"
999 #define ASM_SHORT "\t.short"
1000 #define ASM_LONG "\t.long"
1001 #define ASM_DOUBLE "\t.double"
1003 /* Output at beginning of assembler file. */
1004 /* The .file command should always begin the output. */
1006 #define ASM_FILE_START(FILE)
1008 #define ASM_FILE_START(FILE) \
1009 do { output_file_directive ((FILE), main_input_filename); \
1010 if (optimize) ASM_FILE_START_1 (FILE); \
1014 #define ASM_FILE_START_1(FILE)
1016 /* Output to assembler file text saying following lines
1017 may contain character constants, extra white space, comments, etc. */
1019 #define ASM_APP_ON ""
1021 /* Output to assembler file text saying following lines
1022 no longer contain unusual constructs. */
1024 #define ASM_APP_OFF ""
1026 /* Output before read-only data. */
1028 #define TEXT_SECTION_ASM_OP ".text"
1030 /* Output before writable data. */
1032 #define DATA_SECTION_ASM_OP ".data"
1034 /* How to refer to registers in assembler output.
1035 This sequence is indexed by compiler's hard-register-number (see above). */
1037 #define REGISTER_NAMES \
1038 {"r0", "r1", "sp", "fp", "r4", "r5", "r6", "r7", "r8", "r9", \
1039 "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", \
1040 "r20", "r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", \
1042 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9", \
1043 "f10", "f11", "f12", "f13", "f14", "f15", "f16", "f17", "f18", "f19", \
1044 "f20", "f21", "f22", "f23", "f24", "f25", "f26", "f27", "f28", "f29", \
1047 /* How to renumber registers for dbx and gdb. */
1049 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1051 /* This is how to output the definition of a user-level label named NAME,
1052 such as the label on a static function or variable NAME. */
1054 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1055 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1057 /* This is how to output a command to make the user-level label named NAME
1058 defined for reference from other files. */
1060 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1061 do { fputs (".globl ", FILE); \
1062 assemble_name (FILE, NAME); \
1063 fputs ("\n", FILE); \
1066 /* The prefix to add to user-visible assembler symbols.
1068 This definition is overridden in i860v4.h because under System V
1069 Release 4, user-level symbols are *not* prefixed with underscores in
1070 the generated assembly code. */
1072 #define USER_LABEL_PREFIX "_"
1074 /* This is how to output an internal numbered label where
1075 PREFIX is the class of label and NUM is the number within the class. */
1077 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1078 fprintf (FILE, ".%s%d:\n", PREFIX, NUM)
1080 /* This is how to output an internal numbered label which
1081 labels a jump table. */
1083 #undef ASM_OUTPUT_CASE_LABEL
1084 #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, JUMPTABLE) \
1085 do { ASM_OUTPUT_ALIGN ((FILE), 2); \
1086 ASM_OUTPUT_INTERNAL_LABEL ((FILE), PREFIX, NUM); \
1089 /* Output at the end of a jump table. */
1091 #define ASM_OUTPUT_CASE_END(FILE,NUM,INSN) \
1092 fprintf (FILE, ".text\n")
1094 /* This is how to store into the string LABEL
1095 the symbol_ref name of an internal numbered label where
1096 PREFIX is the class of label and NUM is the number within the class.
1097 This is suitable for output with `assemble_name'. */
1099 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1100 sprintf (LABEL, "*.%s%d", PREFIX, NUM)
1102 /* This is how to output an assembler line defining a `double' constant. */
1104 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1105 fprintf (FILE, "\t.double %.20e\n", (VALUE))
1107 /* This is how to output an assembler line defining a `float' constant. */
1109 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1110 fprintf (FILE, "\t.float %.12e\n", (VALUE))
1112 /* This is how to output an assembler line defining an `int' constant. */
1114 #define ASM_OUTPUT_INT(FILE,VALUE) \
1115 ( fprintf (FILE, "\t.long "), \
1116 output_addr_const (FILE, (VALUE)), \
1117 fprintf (FILE, "\n"))
1119 /* Likewise for `char' and `short' constants. */
1121 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1122 ( fprintf (FILE, "\t.short "), \
1123 output_addr_const (FILE, (VALUE)), \
1124 fprintf (FILE, "\n"))
1126 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1127 ( fprintf (FILE, "\t.byte "), \
1128 output_addr_const (FILE, (VALUE)), \
1129 fprintf (FILE, "\n"))
1131 /* This is how to output an assembler line for a numeric constant byte. */
1133 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1134 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1136 /* This is how to output code to push a register on the stack.
1137 It need not be very fast code. */
1139 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1140 fprintf (FILE, "\taddu -16,%ssp,%ssp\n\t%sst.l %s%s,0(%ssp)\n", \
1141 i860_reg_prefix, i860_reg_prefix, \
1142 ((REGNO) < 32 ? "" : "f"), \
1143 i860_reg_prefix, reg_names[REGNO], \
1146 /* This is how to output an insn to pop a register from the stack.
1147 It need not be very fast code. */
1149 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1150 fprintf (FILE, "\t%sld.l 0(%ssp),%s%s\n\taddu 16,%ssp,%ssp\n", \
1151 ((REGNO) < 32 ? "" : "f"), \
1153 i860_reg_prefix, reg_names[REGNO], \
1154 i860_reg_prefix, i860_reg_prefix)
1156 /* This is how to output an element of a case-vector that is absolute. */
1158 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1159 fprintf (FILE, "\t.long .L%d\n", VALUE)
1161 /* This is how to output an element of a case-vector that is relative.
1162 (The i860 does not use such vectors,
1163 but we must define this macro anyway.) */
1165 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1166 fprintf (FILE, "\t.word .L%d-.L%d\n", VALUE, REL)
1168 /* This is how to output an assembler line
1169 that says to advance the location counter
1170 to a multiple of 2**LOG bytes. */
1172 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1174 fprintf (FILE, "\t.align %d\n", 1 << (LOG))
1176 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1177 fprintf (FILE, "\t.blkb %u\n", (SIZE))
1179 /* This says how to output an assembler line
1180 to define a global common symbol. */
1182 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1183 ( fputs (".comm ", (FILE)), \
1184 assemble_name ((FILE), (NAME)), \
1185 fprintf ((FILE), ",%u\n", (ROUNDED)))
1187 /* This says how to output an assembler line
1188 to define a local common symbol. */
1190 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1191 ( fputs (".lcomm ", (FILE)), \
1192 assemble_name ((FILE), (NAME)), \
1193 fprintf ((FILE), ",%u\n", (ROUNDED)))
1195 /* Store in OUTPUT a string (made with alloca) containing
1196 an assembler-name for a local static variable named NAME.
1197 LABELNO is an integer which is different for each call. */
1199 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1200 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1201 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1203 /* Define the parentheses used to group arithmetic operations
1204 in assembler code. */
1206 #define ASM_OPEN_PAREN "("
1207 #define ASM_CLOSE_PAREN ")"
1209 /* Define results of standard character escape sequences. */
1210 #define TARGET_BELL 007
1211 #define TARGET_BS 010
1212 #define TARGET_TAB 011
1213 #define TARGET_NEWLINE 012
1214 #define TARGET_VT 013
1215 #define TARGET_FF 014
1216 #define TARGET_CR 015
1218 /* Print operand X (an rtx) in assembler syntax to file FILE.
1219 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1220 For `%' followed by punctuation, CODE is the punctuation and X is null.
1222 In the following comments, the term "constant address" is used frequently.
1223 For an exact definition of what constitutes a "constant address" see the
1224 output_addr_const routine in final.c
1226 On the i860, the following target-specific special codes are recognized:
1228 `r' The operand can be anything, but if it is an immediate zero
1229 value (either integer or floating point) then it will be
1230 represented as `r0' or as `f0' (respectively).
1232 `m' The operand is a memory ref (to a constant address) but print
1233 its address as a constant.
1235 `L' The operand is a numeric constant, a constant address, or
1236 a memory ref to a constant address. Print the correct
1237 notation to yield the low part of the given value or
1238 address or the low part of the address of the referred
1241 `H' The operand is a numeric constant, a constant address, or
1242 a memory ref to a constant address. Print the correct
1243 notation to yield the high part of the given value or
1244 address or the high part of the address of the referred
1247 `h' The operand is a numeric constant, a constant address, or
1248 a memory ref to a constant address. Either print the
1249 correct notation to yield the plain high part of the
1250 given value or address (or the plain high part of the
1251 address of the memory object) or else print the correct
1252 notation to yield the "adjusted" high part of the given
1253 address (or of the address of the referred to memory object).
1255 The choice of what to print depends upon whether the address
1256 in question is relocatable or not. If it is relocatable,
1257 print the notation to get the adjusted high part. Otherwise
1258 just print the notation to get the plain high part. Note
1259 that "adjusted" high parts are generally used *only* when
1260 the next following instruction uses the low part of the
1261 address as an offset, as in `offset(reg)'.
1263 `R' The operand is a floating-pointer register. Print the
1264 name of the next following (32-bit) floating-point register.
1265 (This is used when moving a value into just the most
1266 significant part of a floating-point register pair.)
1268 `?' (takes no operand) Substitute the value of i860_reg_prefix
1269 at this point. The value of i860_reg_prefix is typically
1270 a null string for most i860 targets, but for System V
1271 Release 4 the i860 assembler syntax requires that all
1272 names of registers be prefixed with a percent-sign, so
1273 for SVR4, the value of i860_reg_prefix is initialized to
1277 extern char *i860_reg_prefix
;
1278 extern unsigned long sfmode_constant_to_ulong ();
1280 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '?')
1282 /* The following macro definition is overridden in i860v4.h
1283 because the svr4 i860 assembler required a different syntax
1284 for getting parts of constant/relocatable values. */
1286 #define PRINT_OPERAND_PART(FILE, X, PART_CODE) \
1287 do { fprintf (FILE, "%s%%", PART_CODE); \
1288 output_address (X); \
1291 #define OPERAND_LOW_PART "l"
1292 #define OPERAND_HIGH_PART "h"
1293 /* NOTE: All documentation available for the i860 sez that you must
1294 use "ha" to get the relocated high part of a relocatable, but
1295 reality sez different. */
1296 #define OPERAND_HIGH_ADJ_PART "ha"
1298 #define PRINT_OPERAND(FILE, X, CODE) \
1299 { if ((CODE) == '?') \
1300 fprintf (FILE, "%s", i860_reg_prefix); \
1301 else if (CODE == 'R') \
1302 fprintf (FILE, "%s%s", i860_reg_prefix, reg_names[REGNO (X) + 1]); \
1303 else if (GET_CODE (X) == REG) \
1304 fprintf (FILE, "%s%s", i860_reg_prefix, reg_names[REGNO (X)]); \
1305 else if ((CODE) == 'm') \
1306 output_address (XEXP (X, 0)); \
1307 else if ((CODE) == 'L') \
1309 if (GET_CODE (X) == MEM) \
1310 PRINT_OPERAND_PART (FILE, XEXP (X, 0), OPERAND_LOW_PART); \
1312 PRINT_OPERAND_PART (FILE, X, OPERAND_LOW_PART); \
1314 else if ((CODE) == 'H') \
1316 if (GET_CODE (X) == MEM) \
1317 PRINT_OPERAND_PART (FILE, XEXP (X, 0), OPERAND_HIGH_PART); \
1319 PRINT_OPERAND_PART (FILE, X, OPERAND_HIGH_PART); \
1321 else if ((CODE) == 'h') \
1323 if (GET_CODE (X) == MEM) \
1324 PRINT_OPERAND_PART (FILE, XEXP (X, 0), OPERAND_HIGH_ADJ_PART); \
1326 PRINT_OPERAND_PART (FILE, X, OPERAND_HIGH_ADJ_PART); \
1328 else if (GET_CODE (X) == MEM) \
1329 output_address (XEXP (X, 0)); \
1330 else if ((CODE) == 'r' && (X) == const0_rtx) \
1331 fprintf (FILE, "%sr0", i860_reg_prefix); \
1332 else if ((CODE) == 'r' && (X) == CONST0_RTX (GET_MODE (X))) \
1333 fprintf (FILE, "%sf0", i860_reg_prefix); \
1334 else if (GET_CODE (X) == CONST_DOUBLE) \
1335 fprintf (FILE, "0x%x", sfmode_constant_to_ulong (X)); \
1337 output_addr_const (FILE, X); }
1339 /* Print a memory address as an operand to reference that memory location. */
1341 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1342 { register rtx base, index = 0; \
1344 register rtx addr = ADDR; \
1345 if (GET_CODE (addr) == REG) \
1347 fprintf (FILE, "0(%s%s)", \
1348 i860_reg_prefix, reg_names[REGNO (addr)]); \
1350 else if (GET_CODE (addr) == CONST_DOUBLE \
1351 && GET_MODE (addr) == SFmode) \
1352 fprintf (FILE, "0x%x", sfmode_constant_to_ulong (addr)); \
1353 else if (GET_CODE (addr) == PLUS) \
1355 if ((GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1356 && (GET_CODE (XEXP (addr, 1)) == REG)) \
1357 fprintf (FILE, "%d(%s%s)", INTVAL (XEXP (addr, 0)), \
1358 i860_reg_prefix, reg_names[REGNO (XEXP (addr, 1))]);\
1359 else if ((GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1360 && (GET_CODE (XEXP (addr, 0)) == REG)) \
1361 fprintf (FILE, "%d(%s%s)", INTVAL (XEXP (addr, 1)), \
1362 i860_reg_prefix, reg_names[REGNO (XEXP (addr, 0))]);\
1363 else if ((GET_CODE (XEXP (addr, 0)) == REG) \
1364 && (GET_CODE (XEXP (addr, 1)) == REG)) \
1365 fprintf (FILE, "%s%s(%s%s)", \
1366 i860_reg_prefix, reg_names[REGNO (XEXP (addr, 0))], \
1367 i860_reg_prefix, reg_names[REGNO (XEXP (addr, 1))]);\
1369 output_addr_const (FILE, addr); \
1373 output_addr_const (FILE, addr); \
1377 /* The following #defines are used when compiling the routines in
1378 libgcc1.c. Since the i860 calling conventions require single
1379 precision floats to be passed in the floating-point registers
1380 (rather than in the general registers) we have to build the
1381 libgcc1.c routines in such a way that they know the actual types
1382 of their formal arguments and the actual types of their return
1383 values. Otherwise, gcc will generate calls to the libgcc1.c
1384 routines, passing arguments in the floating-point registers,
1385 but the libgcc1.c routines will expect their arguments on the
1386 stack (where the i860 calling conventions require structs &
1387 unions to be passed). */
1389 #define FLOAT_VALUE_TYPE float
1390 #define INTIFY(FLOATVAL) (FLOATVAL)
1391 #define FLOATIFY(INTVAL) (INTVAL)
1392 #define FLOAT_ARG_TYPE float
1395 /* Optionally define this if you have added predicates to
1396 `MACHINE.c'. This macro is called within an initializer of an
1397 array of structures. The first field in the structure is the
1398 name of a predicate and the second field is an array of rtl
1399 codes. For each predicate, list all rtl codes that can be in
1400 expressions matched by the predicate. The list should have a
1401 trailing comma. Here is an example of two entries in the list
1402 for a typical RISC machine:
1404 #define PREDICATE_CODES \
1405 {"gen_reg_rtx_operand", {SUBREG, REG}}, \
1406 {"reg_or_short_cint_operand", {SUBREG, REG, CONST_INT}},
1408 Defining this macro does not affect the generated code (however,
1409 incorrect definitions that omit an rtl code that may be matched
1410 by the predicate can cause the compiler to malfunction).
1411 Instead, it allows the table built by `genrecog' to be more
1412 compact and efficient, thus speeding up the compiler. The most
1413 important predicates to include in the list specified by this
1414 macro are thoses used in the most insn patterns. */
1416 #define PREDICATE_CODES \
1417 {"reg_or_0_operand", {REG, SUBREG, CONST_INT}}, \
1418 {"arith_operand", {REG, SUBREG, CONST_INT}}, \
1419 {"logic_operand", {REG, SUBREG, CONST_INT}}, \
1420 {"shift_operand", {REG, SUBREG, CONST_INT}}, \
1421 {"compare_operand", {REG, SUBREG, CONST_INT}}, \
1422 {"arith_const_operand", {CONST_INT}}, \
1423 {"logic_const_operand", {CONST_INT}}, \
1424 {"bte_operand", {REG, SUBREG, CONST_INT}}, \
1425 {"indexed_operand", {MEM}}, \
1426 {"load_operand", {MEM}}, \
1427 {"small_int", {CONST_INT}}, \
1428 {"logic_int", {CONST_INT}}, \
1429 {"call_insn_operand", {MEM}},
1431 /* Define the information needed to generate branch insns. This is stored
1432 from the compare operation. Note that we can't use "rtx" here since it
1433 hasn't been defined! */
1435 extern struct rtx_def
*i860_compare_op0
, *i860_compare_op1
;
1437 /* Declare things which are defined in i860.c but called from
1440 extern unsigned long sfmode_constant_to_ulong ();
1441 extern char *output_load ();
1442 extern char *output_store ();
1443 extern char *output_move_double ();
1444 extern char *output_fp_move_double ();
1445 extern char *output_block_move ();
1446 extern char *output_delay_insn ();
1448 extern char *output_delayed_branch ();
1450 extern void output_load_address ();