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1 /* Definitions of target machine for GNU compiler for
2 Motorola m88100 in an 88open OCS/BCS environment.
3 Copyright (C) 1988, 92-97, 1998 Free Software Foundation, Inc.
4 Contributed by Michael Tiemann (tiemann@cygnus.com).
5 Currently maintained by (gcc@dg-rtp.dg.com)
6
7 This file is part of GNU CC.
8
9 GNU CC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
12 any later version.
13
14 GNU CC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GNU CC; see the file COPYING. If not, write to
21 the Free Software Foundation, 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
23
24 /* The m88100 port of GNU CC adheres to the various standards from 88open.
25 These documents are available by writing:
26
27 88open Consortium Ltd.
28 100 Homeland Court, Suite 800
29 San Jose, CA 95112
30 (408) 436-6600
31
32 In brief, the current standards are:
33
34 Binary Compatibility Standard, Release 1.1A, May 1991
35 This provides for portability of application-level software at the
36 executable level for AT&T System V Release 3.2.
37
38 Object Compatibility Standard, Release 1.1A, May 1991
39 This provides for portability of application-level software at the
40 object file and library level for C, Fortran, and Cobol, and again,
41 largely for SVR3.
42
43 Under development are standards for AT&T System V Release 4, based on the
44 [generic] System V Application Binary Interface from AT&T. These include:
45
46 System V Application Binary Interface, Motorola 88000 Processor Supplement
47 Another document from AT&T for SVR4 specific to the m88100.
48 Available from Prentice Hall.
49
50 System V Application Binary Interface, Motorola 88000 Processor Supplement,
51 Release 1.1, Draft H, May 6, 1991
52 A proposed update to the AT&T document from 88open.
53
54 System V ABI Implementation Guide for the M88000 Processor,
55 Release 1.0, January 1991
56 A companion ABI document from 88open. */
57
58 /* Other *.h files in config/m88k include this one and override certain items.
59 Currently these are sysv3.h, sysv4.h, dgux.h, dolph.h, tekXD88.h, and luna.h.
60 Additionally, sysv4.h and dgux.h include svr4.h first. All other
61 m88k targets except luna.h are based on svr3.h. */
62
63 /* Choose SVR3 as the default. */
64 #if !defined(DBX_DEBUGGING_INFO) && !defined(DWARF_DEBUGGING_INFO)
65 #include "svr3.h"
66 #endif
67 \f
68 /* External types used. */
69
70 /* What instructions are needed to manufacture an integer constant. */
71 enum m88k_instruction {
72 m88k_zero,
73 m88k_or,
74 m88k_subu,
75 m88k_or_lo16,
76 m88k_or_lo8,
77 m88k_set,
78 m88k_oru_hi16,
79 m88k_oru_or
80 };
81
82 /* Which processor to schedule for. The elements of the enumeration
83 must match exactly the cpu attribute in the m88k.md machine description. */
84
85 enum processor_type {
86 PROCESSOR_M88100,
87 PROCESSOR_M88110,
88 PROCESSOR_M88000,
89 };
90
91 /* Recast the cpu class to be the cpu attribute. */
92 #define m88k_cpu_attr ((enum attr_cpu)m88k_cpu)
93
94 /* External variables/functions defined in m88k.c. */
95
96 extern char *m88k_pound_sign;
97 extern char *m88k_short_data;
98 extern char *m88k_version;
99 extern char m88k_volatile_code;
100
101 extern unsigned m88k_gp_threshold;
102 extern int m88k_prologue_done;
103 extern int m88k_function_number;
104 extern int m88k_fp_offset;
105 extern int m88k_stack_size;
106 extern int m88k_case_index;
107
108 extern struct rtx_def *m88k_compare_reg;
109 extern struct rtx_def *m88k_compare_op0;
110 extern struct rtx_def *m88k_compare_op1;
111
112 extern enum processor_type m88k_cpu;
113
114 extern int null_prologue ();
115 extern int integer_ok_for_set ();
116 extern int m88k_debugger_offset ();
117
118
119 extern void emit_bcnd ();
120 extern void expand_block_move ();
121 extern void m88k_layout_frame ();
122 extern void m88k_expand_prologue ();
123 extern void m88k_begin_prologue ();
124 extern void m88k_end_prologue ();
125 extern void m88k_expand_epilogue ();
126 extern void m88k_begin_epilogue ();
127 extern void m88k_end_epilogue ();
128 extern void output_function_profiler ();
129 extern void output_function_block_profiler ();
130 extern void output_block_profiler ();
131 extern void output_file_start ();
132 extern void output_ascii ();
133 extern void output_label ();
134 extern void print_operand ();
135 extern void print_operand_address ();
136
137 extern char *output_load_const_int ();
138 extern char *output_load_const_float ();
139 extern char *output_load_const_double ();
140 extern char *output_load_const_dimode ();
141 extern char *output_and ();
142 extern char *output_ior ();
143 extern char *output_xor ();
144 extern char *output_call ();
145
146 extern struct rtx_def *emit_test ();
147 extern struct rtx_def *legitimize_address ();
148 extern struct rtx_def *legitimize_operand ();
149 extern struct rtx_def *m88k_function_arg ();
150 extern struct rtx_def *m88k_builtin_saveregs ();
151
152 extern enum m88k_instruction classify_integer ();
153
154 /* external variables defined elsewhere in the compiler */
155
156 extern int target_flags; /* -m compiler switches */
157 extern int frame_pointer_needed; /* current function has a FP */
158 extern int flag_delayed_branch; /* -fdelayed-branch */
159 extern int flag_pic; /* -fpic */
160 extern char * reg_names[];
161
162 /* Specify the default monitors. The meaning of these values can
163 be obtained by doing "grep MONITOR_GCC *m88k*". Generally, the
164 values downward from 0x8000 are tests that will soon go away.
165 values upward from 0x1 are generally useful tests that will remain. */
166
167 #ifndef MONITOR_GCC
168 #define MONITOR_GCC 0
169 #endif
170 \f
171 /*** Controlling the Compilation Driver, `gcc' ***/
172 /* Show we can debug even without a frame pointer. */
173 #define CAN_DEBUG_WITHOUT_FP
174
175 /* If -m88100 is in effect, add -D__m88100__; similarly for -m88110.
176 Here, the CPU_DEFAULT is assumed to be -m88100. */
177 #undef CPP_SPEC
178 #define CPP_SPEC "%{!m88000:%{!m88100:%{m88110:-D__m88110__}}} \
179 %{!m88000:%{!m88110:-D__m88100__}}"
180
181 /* LIB_SPEC, LINK_SPEC, and STARTFILE_SPEC defined in svr3.h.
182 ASM_SPEC, ASM_FINAL_SPEC, LIB_SPEC, LINK_SPEC, and STARTFILE_SPEC redefined
183 in svr4.h.
184 CPP_SPEC, ASM_SPEC, ASM_FINAL_SPEC, LIB_SPEC, LINK_SPEC, and
185 STARTFILE_SPEC redefined in dgux.h. */
186 \f
187 /*** Run-time Target Specification ***/
188
189 /* Names to predefine in the preprocessor for this target machine.
190 Redefined in sysv3.h, sysv4.h, dgux.h, and luna.h. */
191 #define CPP_PREDEFINES "-Dm88000 -Dm88k -Dunix -D__CLASSIFY_TYPE__=2"
192
193 #define TARGET_VERSION fprintf (stderr, " (%s)", VERSION_INFO1)
194
195 #ifndef VERSION_INFO1
196 #define VERSION_INFO1 "m88k"
197 #endif
198
199 /* Run-time compilation parameters selecting different hardware subsets. */
200
201 /* Macro to define tables used to set the flags.
202 This is a list in braces of pairs in braces,
203 each pair being { "NAME", VALUE }
204 where VALUE is the bits to set or minus the bits to clear.
205 An empty string NAME is used to identify the default VALUE. */
206
207 #define MASK_88100 0x00000001 /* Target m88100 */
208 #define MASK_88110 0x00000002 /* Target m88110 */
209 #define MASK_88000 (MASK_88100 | MASK_88110)
210
211 #define MASK_OCS_DEBUG_INFO 0x00000004 /* Emit .tdesc info */
212 #define MASK_OCS_FRAME_POSITION 0x00000008 /* Debug frame = CFA, not r30 */
213 #define MASK_SVR4 0x00000010 /* Target is AT&T System V.4 */
214 #define MASK_SVR3 0x00000020 /* Target is AT&T System V.3 */
215 #define MASK_NO_UNDERSCORES 0x00000040 /* Don't emit a leading `_' */
216 #define MASK_BIG_PIC 0x00000080 /* PIC with large got-rel's -fPIC */
217 #define MASK_TRAP_LARGE_SHIFT 0x00000100 /* Trap if shift not <= 31 */
218 #define MASK_HANDLE_LARGE_SHIFT 0x00000200 /* Handle shift count >= 32 */
219 #define MASK_CHECK_ZERO_DIV 0x00000400 /* Check for int div. by 0 */
220 #define MASK_USE_DIV 0x00000800 /* No signed div. checks */
221 #define MASK_IDENTIFY_REVISION 0x00001000 /* Emit ident, with GCC rev */
222 #define MASK_WARN_PASS_STRUCT 0x00002000 /* Warn about passed structs */
223 #define MASK_OPTIMIZE_ARG_AREA 0x00004000 /* Save stack space */
224 #define MASK_NO_SERIALIZE_VOLATILE 0x00008000 /* Serialize volatile refs */
225 #define MASK_EITHER_LARGE_SHIFT (MASK_TRAP_LARGE_SHIFT | \
226 MASK_HANDLE_LARGE_SHIFT)
227 #define MASK_OMIT_LEAF_FRAME_POINTER 0x00020000 /* omit leaf frame pointers */
228
229
230 #define TARGET_88100 ((target_flags & MASK_88000) == MASK_88100)
231 #define TARGET_88110 ((target_flags & MASK_88000) == MASK_88110)
232 #define TARGET_88000 ((target_flags & MASK_88000) == MASK_88000)
233
234 #define TARGET_OCS_DEBUG_INFO (target_flags & MASK_OCS_DEBUG_INFO)
235 #define TARGET_OCS_FRAME_POSITION (target_flags & MASK_OCS_FRAME_POSITION)
236 #define TARGET_SVR4 (target_flags & MASK_SVR4)
237 #define TARGET_SVR3 (target_flags & MASK_SVR3)
238 #define TARGET_NO_UNDERSCORES (target_flags & MASK_NO_UNDERSCORES)
239 #define TARGET_BIG_PIC (target_flags & MASK_BIG_PIC)
240 #define TARGET_TRAP_LARGE_SHIFT (target_flags & MASK_TRAP_LARGE_SHIFT)
241 #define TARGET_HANDLE_LARGE_SHIFT (target_flags & MASK_HANDLE_LARGE_SHIFT)
242 #define TARGET_CHECK_ZERO_DIV (target_flags & MASK_CHECK_ZERO_DIV)
243 #define TARGET_USE_DIV (target_flags & MASK_USE_DIV)
244 #define TARGET_IDENTIFY_REVISION (target_flags & MASK_IDENTIFY_REVISION)
245 #define TARGET_WARN_PASS_STRUCT (target_flags & MASK_WARN_PASS_STRUCT)
246 #define TARGET_OPTIMIZE_ARG_AREA (target_flags & MASK_OPTIMIZE_ARG_AREA)
247 #define TARGET_SERIALIZE_VOLATILE (!(target_flags & MASK_NO_SERIALIZE_VOLATILE))
248
249 #define TARGET_EITHER_LARGE_SHIFT (target_flags & MASK_EITHER_LARGE_SHIFT)
250 #define TARGET_OMIT_LEAF_FRAME_POINTER (target_flags & MASK_OMIT_LEAF_FRAME_POINTER)
251
252 /* Redefined in sysv3.h, sysv4.h, and dgux.h. */
253 #define TARGET_DEFAULT (MASK_CHECK_ZERO_DIV)
254 #define CPU_DEFAULT MASK_88100
255
256 #define TARGET_SWITCHES \
257 { \
258 { "88110", MASK_88110 }, \
259 { "88100", MASK_88100 }, \
260 { "88000", MASK_88000 }, \
261 { "ocs-debug-info", MASK_OCS_DEBUG_INFO }, \
262 { "no-ocs-debug-info", -MASK_OCS_DEBUG_INFO }, \
263 { "ocs-frame-position", MASK_OCS_FRAME_POSITION }, \
264 { "no-ocs-frame-position", -MASK_OCS_FRAME_POSITION }, \
265 { "svr4", MASK_SVR4 }, \
266 { "svr3", -MASK_SVR4 }, \
267 { "no-underscores", MASK_NO_UNDERSCORES }, \
268 { "big-pic", MASK_BIG_PIC }, \
269 { "trap-large-shift", MASK_TRAP_LARGE_SHIFT }, \
270 { "handle-large-shift", MASK_HANDLE_LARGE_SHIFT }, \
271 { "check-zero-division", MASK_CHECK_ZERO_DIV }, \
272 { "no-check-zero-division", -MASK_CHECK_ZERO_DIV }, \
273 { "use-div-instruction", MASK_USE_DIV }, \
274 { "identify-revision", MASK_IDENTIFY_REVISION }, \
275 { "warn-passed-structs", MASK_WARN_PASS_STRUCT }, \
276 { "optimize-arg-area", MASK_OPTIMIZE_ARG_AREA }, \
277 { "no-optimize-arg-area", -MASK_OPTIMIZE_ARG_AREA }, \
278 { "no-serialize-volatile", MASK_NO_SERIALIZE_VOLATILE }, \
279 { "serialize-volatile", -MASK_NO_SERIALIZE_VOLATILE }, \
280 { "omit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER }, \
281 { "no-omit-leaf-frame-pointer", -MASK_OMIT_LEAF_FRAME_POINTER }, \
282 SUBTARGET_SWITCHES \
283 /* Default switches */ \
284 { "", TARGET_DEFAULT }, \
285 }
286
287 /* Redefined in dgux.h. */
288 #define SUBTARGET_SWITCHES
289
290 /* Macro to define table for command options with values. */
291
292 #define TARGET_OPTIONS { { "short-data-", &m88k_short_data }, \
293 { "version-", &m88k_version } }
294
295 /* Do any checking or such that is needed after processing the -m switches. */
296
297 #define OVERRIDE_OPTIONS \
298 do { \
299 register int i; \
300 \
301 if ((target_flags & MASK_88000) == 0) \
302 target_flags |= CPU_DEFAULT; \
303 \
304 if (TARGET_88110) \
305 { \
306 target_flags |= MASK_USE_DIV; \
307 target_flags &= ~MASK_CHECK_ZERO_DIV; \
308 } \
309 \
310 m88k_cpu = (TARGET_88000 ? PROCESSOR_M88000 \
311 : (TARGET_88100 ? PROCESSOR_M88100 : PROCESSOR_M88110)); \
312 \
313 if (TARGET_BIG_PIC) \
314 flag_pic = 2; \
315 \
316 if ((target_flags & MASK_EITHER_LARGE_SHIFT) == MASK_EITHER_LARGE_SHIFT) \
317 error ("-mtrap-large-shift and -mhandle-large-shift are incompatible");\
318 \
319 if (TARGET_SVR4) \
320 { \
321 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \
322 reg_names[i]--; \
323 m88k_pound_sign = "#"; \
324 } \
325 else \
326 { \
327 target_flags |= MASK_SVR3; \
328 target_flags &= ~MASK_SVR4; \
329 } \
330 \
331 if (m88k_short_data) \
332 { \
333 char *p = m88k_short_data; \
334 while (*p) \
335 if (*p >= '0' && *p <= '9') \
336 p++; \
337 else \
338 { \
339 error ("Invalid option `-mshort-data-%s'", m88k_short_data); \
340 break; \
341 } \
342 m88k_gp_threshold = atoi (m88k_short_data); \
343 if (m88k_gp_threshold > 0x7fffffff) \
344 error ("-mshort-data-%s is too large ", m88k_short_data); \
345 if (flag_pic) \
346 error ("-mshort-data-%s and PIC are incompatible", m88k_short_data); \
347 } \
348 if (TARGET_OMIT_LEAF_FRAME_POINTER) /* keep nonleaf frame pointers */ \
349 flag_omit_frame_pointer = 1; \
350 } while (0)
351 \f
352 /*** Storage Layout ***/
353
354 /* Sizes in bits of the various types. */
355 #define CHAR_TYPE_SIZE 8
356 #define SHORT_TYPE_SIZE 16
357 #define INT_TYPE_SIZE 32
358 #define LONG_TYPE_SIZE 32
359 #define LONG_LONG_TYPE_SIZE 64
360 #define FLOAT_TYPE_SIZE 32
361 #define DOUBLE_TYPE_SIZE 64
362 #define LONG_DOUBLE_TYPE_SIZE 64
363
364 /* Define this if most significant bit is lowest numbered
365 in instructions that operate on numbered bit-fields.
366 Somewhat arbitrary. It matches the bit field patterns. */
367 #define BITS_BIG_ENDIAN 1
368
369 /* Define this if most significant byte of a word is the lowest numbered.
370 That is true on the m88000. */
371 #define BYTES_BIG_ENDIAN 1
372
373 /* Define this if most significant word of a multiword number is the lowest
374 numbered.
375 For the m88000 we can decide arbitrarily since there are no machine
376 instructions for them. */
377 #define WORDS_BIG_ENDIAN 1
378
379 /* Number of bits in an addressable storage unit */
380 #define BITS_PER_UNIT 8
381
382 /* Width in bits of a "word", which is the contents of a machine register.
383 Note that this is not necessarily the width of data type `int';
384 if using 16-bit ints on a 68000, this would still be 32.
385 But on a machine with 16-bit registers, this would be 16. */
386 #define BITS_PER_WORD 32
387
388 /* Width of a word, in units (bytes). */
389 #define UNITS_PER_WORD 4
390
391 /* Width in bits of a pointer.
392 See also the macro `Pmode' defined below. */
393 #define POINTER_SIZE 32
394
395 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
396 #define PARM_BOUNDARY 32
397
398 /* Largest alignment for stack parameters (if greater than PARM_BOUNDARY). */
399 #define MAX_PARM_BOUNDARY 64
400
401 /* Boundary (in *bits*) on which stack pointer should be aligned. */
402 #define STACK_BOUNDARY 128
403
404 /* Allocation boundary (in *bits*) for the code of a function. On the
405 m88100, it is desirable to align to a cache line. However, SVR3 targets
406 only provided 8 byte alignment. The m88110 cache is small, so align
407 to an 8 byte boundary. Pack code tightly when compiling crtstuff.c. */
408 #define FUNCTION_BOUNDARY (flag_inhibit_size_directive ? 32 : \
409 (TARGET_88100 && TARGET_SVR4 ? 128 : 64))
410
411 /* No data type wants to be aligned rounder than this. */
412 #define BIGGEST_ALIGNMENT 64
413
414 /* The best alignment to use in cases where we have a choice. */
415 #define FASTEST_ALIGNMENT (TARGET_88100 ? 32 : 64)
416
417 /* Make strings 4/8 byte aligned so strcpy from constants will be faster. */
418 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
419 ((TREE_CODE (EXP) == STRING_CST \
420 && (ALIGN) < FASTEST_ALIGNMENT) \
421 ? FASTEST_ALIGNMENT : (ALIGN))
422
423 /* Make arrays of chars 4/8 byte aligned for the same reasons. */
424 #define DATA_ALIGNMENT(TYPE, ALIGN) \
425 (TREE_CODE (TYPE) == ARRAY_TYPE \
426 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
427 && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))
428
429 /* Alignment of field after `int : 0' in a structure.
430 Ignored with PCC_BITFIELD_TYPE_MATTERS. */
431 /* #define EMPTY_FIELD_BOUNDARY 8 */
432
433 /* Every structure's size must be a multiple of this. */
434 #define STRUCTURE_SIZE_BOUNDARY 8
435
436 /* Set this nonzero if move instructions will actually fail to work
437 when given unaligned data. */
438 #define STRICT_ALIGNMENT 1
439
440 /* A bitfield declared as `int' forces `int' alignment for the struct. */
441 #define PCC_BITFIELD_TYPE_MATTERS 1
442
443 /* Maximum size (in bits) to use for the largest integral type that
444 replaces a BLKmode type. */
445 /* #define MAX_FIXED_MODE_SIZE 0 */
446
447 /* Check a `double' value for validity for a particular machine mode.
448 This is defined to avoid crashes outputting certain constants.
449 Since we output the number in hex, the assembler won't choke on it. */
450 /* #define CHECK_FLOAT_VALUE(MODE,VALUE) */
451
452 /* A code distinguishing the floating point format of the target machine. */
453 /* #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT */
454 \f
455 /*** Register Usage ***/
456
457 /* Number of actual hardware registers.
458 The hardware registers are assigned numbers for the compiler
459 from 0 to just below FIRST_PSEUDO_REGISTER.
460 All registers that the compiler knows about must be given numbers,
461 even those that are not normally considered general registers.
462
463 The m88100 has a General Register File (GRF) of 32 32-bit registers.
464 The m88110 adds an Extended Register File (XRF) of 32 80-bit registers. */
465 #define FIRST_PSEUDO_REGISTER 64
466 #define FIRST_EXTENDED_REGISTER 32
467
468 /* General notes on extended registers, their use and misuse.
469
470 Possible good uses:
471
472 spill area instead of memory.
473 -waste if only used once
474
475 floating point calculations
476 -probably a waste unless we have run out of general purpose registers
477
478 freeing up general purpose registers
479 -e.g. may be able to have more loop invariants if floating
480 point is moved into extended registers.
481
482
483 I've noticed wasteful moves into and out of extended registers; e.g. a load
484 into x21, then inside a loop a move into r24, then r24 used as input to
485 an fadd. Why not just load into r24 to begin with? Maybe the new cse.c
486 will address this. This wastes a move, but the load,store and move could
487 have been saved had extended registers been used throughout.
488 E.g. in the code following code, if z and xz are placed in extended
489 registers, there is no need to save preserve registers.
490
491 long c=1,d=1,e=1,f=1,g=1,h=1,i=1,j=1,k;
492
493 double z=0,xz=4.5;
494
495 foo(a,b)
496 long a,b;
497 {
498 while (a < b)
499 {
500 k = b + c + d + e + f + g + h + a + i + j++;
501 z += xz;
502 a++;
503 }
504 printf("k= %d; z=%f;\n", k, z);
505 }
506
507 I've found that it is possible to change the constraints (putting * before
508 the 'r' constraints int the fadd.ddd instruction) and get the entire
509 addition and store to go into extended registers. However, this also
510 forces simple addition and return of floating point arguments to a
511 function into extended registers. Not the correct solution.
512
513 Found the following note in local-alloc.c which may explain why I can't
514 get both registers to be in extended registers since two are allocated in
515 local-alloc and one in global-alloc. Doesn't explain (I don't believe)
516 why an extended register is used instead of just using the preserve
517 register.
518
519 from local-alloc.c:
520 We have provision to exempt registers, even when they are contained
521 within the block, that can be tied to others that are not contained in it.
522 This is so that global_alloc could process them both and tie them then.
523 But this is currently disabled since tying in global_alloc is not
524 yet implemented.
525
526 The explanation of why the preserved register is not used is as follows,
527 I believe. The registers are being allocated in order. Tying is not
528 done so efficiently, so when it comes time to do the first allocation,
529 there are no registers left to use without spilling except extended
530 registers. Then when the next pseudo register needs a hard reg, there
531 are still no registers to be had for free, but this one must be a GRF
532 reg instead of an extended reg, so a preserve register is spilled. Thus
533 the move from extended to GRF is necessitated. I do not believe this can
534 be 'fixed' through the files in config/m88k.
535
536 gcc seems to sometimes make worse use of register allocation -- not counting
537 moves -- whenever extended registers are present. For example in the
538 whetstone, the simple for loop (slightly modified)
539 for(i = 1; i <= n1; i++)
540 {
541 x1 = (x1 + x2 + x3 - x4) * t;
542 x2 = (x1 + x2 - x3 + x4) * t;
543 x3 = (x1 - x2 + x3 + x4) * t;
544 x4 = (x1 + x2 + x3 + x4) * t;
545 }
546 in general loads the high bits of the addresses of x2-x4 and i into registers
547 outside the loop. Whenever extended registers are used, it loads all of
548 these inside the loop. My conjecture is that since the 88110 has so many
549 registers, and gcc makes no distinction at this point -- just that they are
550 not fixed, that in loop.c it believes it can expect a number of registers
551 to be available. Then it allocates 'too many' in local-alloc which causes
552 problems later. 'Too many' are allocated because a large portion of the
553 registers are extended registers and cannot be used for certain purposes
554 ( e.g. hold the address of a variable). When this loop is compiled on its
555 own, the problem does not occur. I don't know the solution yet, though it
556 is probably in the base sources. Possibly a different way to calculate
557 "threshold". */
558
559 /* 1 for registers that have pervasive standard uses and are not available
560 for the register allocator. Registers r14-r25 and x22-x29 are expected
561 to be preserved across function calls.
562
563 On the 88000, the standard uses of the General Register File (GRF) are:
564 Reg 0 = Pseudo argument pointer (hardware fixed to 0).
565 Reg 1 = Subroutine return pointer (hardware).
566 Reg 2-9 = Parameter registers (OCS).
567 Reg 10 = OCS reserved temporary.
568 Reg 11 = Static link if needed [OCS reserved temporary].
569 Reg 12 = Address of structure return (OCS).
570 Reg 13 = OCS reserved temporary.
571 Reg 14-25 = Preserved register set.
572 Reg 26-29 = Reserved by OCS and ABI.
573 Reg 30 = Frame pointer (Common use).
574 Reg 31 = Stack pointer.
575
576 The following follows the current 88open UCS specification for the
577 Extended Register File (XRF):
578 Reg 32 = x0 Always equal to zero
579 Reg 33-53 = x1-x21 Temporary registers (Caller Save)
580 Reg 54-61 = x22-x29 Preserver registers (Callee Save)
581 Reg 62-63 = x30-x31 Reserved for future ABI use.
582
583 Note: The current 88110 extended register mapping is subject to change.
584 The bias towards caller-save registers is based on the
585 presumption that memory traffic can potentially be reduced by
586 allowing the "caller" to save only that part of the register
587 which is actually being used. (i.e. don't do a st.x if a st.d
588 is sufficient). Also, in scientific code (a.k.a. Fortran), the
589 large number of variables defined in common blocks may require
590 that almost all registers be saved across calls anyway. */
591
592 #define FIXED_REGISTERS \
593 {1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
594 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
595 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
596 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1}
597
598 /* 1 for registers not available across function calls.
599 These must include the FIXED_REGISTERS and also any
600 registers that can be used without being saved.
601 The latter must include the registers where values are returned
602 and the register where structure-value addresses are passed.
603 Aside from that, you can include as many other registers as you like. */
604
605 #define CALL_USED_REGISTERS \
606 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \
607 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
608 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
609 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1}
610
611 /* Macro to conditionally modify fixed_regs/call_used_regs. */
612 #define CONDITIONAL_REGISTER_USAGE \
613 { \
614 if (! TARGET_88110) \
615 { \
616 register int i; \
617 for (i = FIRST_EXTENDED_REGISTER; i < FIRST_PSEUDO_REGISTER; i++) \
618 { \
619 fixed_regs[i] = 1; \
620 call_used_regs[i] = 1; \
621 } \
622 } \
623 if (flag_pic) \
624 { \
625 /* Current hack to deal with -fpic -O2 problems. */ \
626 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
627 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
628 global_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
629 } \
630 }
631
632 /* These interfaces that don't apply to the m88000. */
633 /* OVERLAPPING_REGNO_P(REGNO) 0 */
634 /* INSN_CLOBBERS_REGNO_P(INSN, REGNO) 0 */
635
636 /* True if register is an extended register. */
637 #define XRF_REGNO_P(N) ((N) < FIRST_PSEUDO_REGISTER && (N) >= FIRST_EXTENDED_REGISTER)
638
639 /* Return number of consecutive hard regs needed starting at reg REGNO
640 to hold something of mode MODE.
641 This is ordinarily the length in words of a value of mode MODE
642 but can be less for certain modes in special long registers.
643
644 On the m88000, GRF registers hold 32-bits and XRF registers hold 80-bits.
645 An XRF register can hold any mode, but two GRF registers are required
646 for larger modes. */
647 #define HARD_REGNO_NREGS(REGNO, MODE) \
648 (XRF_REGNO_P (REGNO) \
649 ? 1 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
650
651 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
652
653 For double integers, we never put the value into an odd register so that
654 the operators don't run into the situation where the high part of one of
655 the inputs is the low part of the result register. (It's ok if the output
656 registers are the same as the input registers.) The XRF registers can
657 hold all modes, but only DF and SF modes can be manipulated in these
658 registers. The compiler should be allowed to use these as a fast spill
659 area. */
660 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
661 (XRF_REGNO_P(REGNO) \
662 ? (TARGET_88110 && GET_MODE_CLASS (MODE) == MODE_FLOAT) \
663 : (((MODE) != DImode && (MODE) != DFmode && (MODE) != DCmode) \
664 || ((REGNO) & 1) == 0))
665
666 /* Value is 1 if it is a good idea to tie two pseudo registers
667 when one has mode MODE1 and one has mode MODE2.
668 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
669 for any hard reg, then this must be 0 for correct output. */
670 #define MODES_TIEABLE_P(MODE1, MODE2) \
671 (((MODE1) == DFmode || (MODE1) == DCmode || (MODE1) == DImode \
672 || (TARGET_88110 && GET_MODE_CLASS (MODE1) == MODE_FLOAT)) \
673 == ((MODE2) == DFmode || (MODE2) == DCmode || (MODE2) == DImode \
674 || (TARGET_88110 && GET_MODE_CLASS (MODE2) == MODE_FLOAT)))
675
676 /* Specify the registers used for certain standard purposes.
677 The values of these macros are register numbers. */
678
679 /* the m88000 pc isn't overloaded on a register that the compiler knows about. */
680 /* #define PC_REGNUM */
681
682 /* Register to use for pushing function arguments. */
683 #define STACK_POINTER_REGNUM 31
684
685 /* Base register for access to local variables of the function. */
686 #define FRAME_POINTER_REGNUM 30
687
688 /* Base register for access to arguments of the function. */
689 #define ARG_POINTER_REGNUM 0
690
691 /* Register used in cases where a temporary is known to be safe to use. */
692 #define TEMP_REGNUM 10
693
694 /* Register in which static-chain is passed to a function. */
695 #define STATIC_CHAIN_REGNUM 11
696
697 /* Register in which address to store a structure value
698 is passed to a function. */
699 #define STRUCT_VALUE_REGNUM 12
700
701 /* Register to hold the addressing base for position independent
702 code access to data items. */
703 #define PIC_OFFSET_TABLE_REGNUM 25
704
705 /* Order in which registers are preferred (most to least). Use temp
706 registers, then param registers top down. Preserve registers are
707 top down to maximize use of double memory ops for register save.
708 The 88open reserved registers (r26-r29 and x30-x31) may commonly be used
709 in most environments with the -fcall-used- or -fcall-saved- options. */
710 #define REG_ALLOC_ORDER \
711 { \
712 13, 12, 11, 10, 29, 28, 27, 26, \
713 62, 63, 9, 8, 7, 6, 5, 4, \
714 3, 2, 1, 53, 52, 51, 50, 49, \
715 48, 47, 46, 45, 44, 43, 42, 41, \
716 40, 39, 38, 37, 36, 35, 34, 33, \
717 25, 24, 23, 22, 21, 20, 19, 18, \
718 17, 16, 15, 14, 61, 60, 59, 58, \
719 57, 56, 55, 54, 30, 31, 0, 32}
720
721 /* Order for leaf functions. */
722 #define REG_LEAF_ALLOC_ORDER \
723 { \
724 9, 8, 7, 6, 13, 12, 11, 10, \
725 29, 28, 27, 26, 62, 63, 5, 4, \
726 3, 2, 0, 53, 52, 51, 50, 49, \
727 48, 47, 46, 45, 44, 43, 42, 41, \
728 40, 39, 38, 37, 36, 35, 34, 33, \
729 25, 24, 23, 22, 21, 20, 19, 18, \
730 17, 16, 15, 14, 61, 60, 59, 58, \
731 57, 56, 55, 54, 30, 31, 1, 32}
732
733 /* Switch between the leaf and non-leaf orderings. The purpose is to avoid
734 write-over scoreboard delays between caller and callee. */
735 #define ORDER_REGS_FOR_LOCAL_ALLOC \
736 { \
737 static int leaf[] = REG_LEAF_ALLOC_ORDER; \
738 static int nonleaf[] = REG_ALLOC_ORDER; \
739 \
740 bcopy (regs_ever_live[1] ? nonleaf : leaf, reg_alloc_order, \
741 FIRST_PSEUDO_REGISTER * sizeof (int)); \
742 }
743 \f
744 /*** Register Classes ***/
745
746 /* Define the classes of registers for register constraints in the
747 machine description. Also define ranges of constants.
748
749 One of the classes must always be named ALL_REGS and include all hard regs.
750 If there is more than one class, another class must be named NO_REGS
751 and contain no registers.
752
753 The name GENERAL_REGS must be the name of a class (or an alias for
754 another name such as ALL_REGS). This is the class of registers
755 that is allowed by "g" or "r" in a register constraint.
756 Also, registers outside this class are allocated only when
757 instructions express preferences for them.
758
759 The classes must be numbered in nondecreasing order; that is,
760 a larger-numbered class must never be contained completely
761 in a smaller-numbered class.
762
763 For any two classes, it is very desirable that there be another
764 class that represents their union. */
765
766 /* The m88000 hardware has two kinds of registers. In addition, we denote
767 the arg pointer as a separate class. */
768
769 enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS,
770 XGRF_REGS, ALL_REGS, LIM_REG_CLASSES };
771
772 #define N_REG_CLASSES (int) LIM_REG_CLASSES
773
774 /* Give names of register classes as strings for dump file. */
775 #define REG_CLASS_NAMES {"NO_REGS", "AP_REG", "XRF_REGS", "GENERAL_REGS", \
776 "AGRF_REGS", "XGRF_REGS", "ALL_REGS" }
777
778 /* Define which registers fit in which classes.
779 This is an initializer for a vector of HARD_REG_SET
780 of length N_REG_CLASSES. */
781 #define REG_CLASS_CONTENTS {{0x00000000, 0x00000000}, \
782 {0x00000001, 0x00000000}, \
783 {0x00000000, 0xffffffff}, \
784 {0xfffffffe, 0x00000000}, \
785 {0xffffffff, 0x00000000}, \
786 {0xfffffffe, 0xffffffff}, \
787 {0xffffffff, 0xffffffff}}
788
789 /* The same information, inverted:
790 Return the class number of the smallest class containing
791 reg number REGNO. This could be a conditional expression
792 or could index an array. */
793 #define REGNO_REG_CLASS(REGNO) \
794 ((REGNO) ? ((REGNO < 32) ? GENERAL_REGS : XRF_REGS) : AP_REG)
795
796 /* The class value for index registers, and the one for base regs. */
797 #define BASE_REG_CLASS AGRF_REGS
798 #define INDEX_REG_CLASS GENERAL_REGS
799
800 /* Get reg_class from a letter such as appears in the machine description.
801 For the 88000, the following class/letter is defined for the XRF:
802 x - Extended register file */
803 #define REG_CLASS_FROM_LETTER(C) \
804 (((C) == 'x') ? XRF_REGS : NO_REGS)
805
806 /* Macros to check register numbers against specific register classes.
807 These assume that REGNO is a hard or pseudo reg number.
808 They give nonzero only if REGNO is a hard reg of the suitable class
809 or a pseudo reg currently allocated to a suitable hard reg.
810 Since they use reg_renumber, they are safe only once reg_renumber
811 has been allocated, which happens in local-alloc.c. */
812 #define REGNO_OK_FOR_BASE_P(REGNO) \
813 ((REGNO) < FIRST_EXTENDED_REGISTER \
814 || (unsigned) reg_renumber[REGNO] < FIRST_EXTENDED_REGISTER)
815 #define REGNO_OK_FOR_INDEX_P(REGNO) \
816 (((REGNO) && (REGNO) < FIRST_EXTENDED_REGISTER) \
817 || (unsigned) reg_renumber[REGNO] < FIRST_EXTENDED_REGISTER)
818
819 /* Given an rtx X being reloaded into a reg required to be
820 in class CLASS, return the class of reg to actually use.
821 In general this is just CLASS; but on some machines
822 in some cases it is preferable to use a more restrictive class.
823 Double constants should be in a register iff they can be made cheaply. */
824 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
825 (CONSTANT_P(X) && (CLASS == XRF_REGS) ? NO_REGS : (CLASS))
826
827 /* Return the register class of a scratch register needed to load IN
828 into a register of class CLASS in MODE. On the m88k, when PIC, we
829 need a temporary when loading some addresses into a register. */
830 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \
831 ((flag_pic \
832 && GET_CODE (IN) == CONST \
833 && GET_CODE (XEXP (IN, 0)) == PLUS \
834 && GET_CODE (XEXP (XEXP (IN, 0), 0)) == CONST_INT \
835 && ! SMALL_INT (XEXP (XEXP (IN, 0), 1))) ? GENERAL_REGS : NO_REGS)
836
837 /* Return the maximum number of consecutive registers
838 needed to represent mode MODE in a register of class CLASS. */
839 #define CLASS_MAX_NREGS(CLASS, MODE) \
840 ((((CLASS) == XRF_REGS) ? 1 \
841 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
842
843 /* Letters in the range `I' through `P' in a register constraint string can
844 be used to stand for particular ranges of immediate operands. The C
845 expression is true iff C is a known letter and VALUE is appropriate for
846 that letter.
847
848 For the m88000, the following constants are used:
849 `I' requires a non-negative 16-bit value.
850 `J' requires a non-positive 16-bit value.
851 `K' requires a non-negative value < 32.
852 `L' requires a constant with only the upper 16-bits set.
853 `M' requires constant values that can be formed with `set'.
854 `N' requires a negative value.
855 `O' requires zero.
856 `P' requires a non-negative value. */
857
858 /* Quick tests for certain values. */
859 #define SMALL_INT(X) (SMALL_INTVAL (INTVAL (X)))
860 #define SMALL_INTVAL(I) ((unsigned) (I) < 0x10000)
861 #define ADD_INT(X) (ADD_INTVAL (INTVAL (X)))
862 #define ADD_INTVAL(I) ((unsigned) (I) + 0xffff < 0x1ffff)
863 #define POWER_OF_2(I) ((I) && POWER_OF_2_or_0(I))
864 #define POWER_OF_2_or_0(I) (((I) & ((unsigned)(I) - 1)) == 0)
865
866 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
867 ((C) == 'I' ? SMALL_INTVAL (VALUE) \
868 : (C) == 'J' ? SMALL_INTVAL (-(VALUE)) \
869 : (C) == 'K' ? (unsigned)(VALUE) < 32 \
870 : (C) == 'L' ? ((VALUE) & 0xffff) == 0 \
871 : (C) == 'M' ? integer_ok_for_set (VALUE) \
872 : (C) == 'N' ? (VALUE) < 0 \
873 : (C) == 'O' ? (VALUE) == 0 \
874 : (C) == 'P' ? (VALUE) >= 0 \
875 : 0)
876
877 /* Similar, but for floating constants, and defining letters G and H.
878 Here VALUE is the CONST_DOUBLE rtx itself. For the m88000, the
879 constraints are: `G' requires zero, and `H' requires one or two. */
880 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
881 ((C) == 'G' ? (CONST_DOUBLE_HIGH (VALUE) == 0 \
882 && CONST_DOUBLE_LOW (VALUE) == 0) \
883 : 0)
884
885 /* Letters in the range `Q' through `U' in a register constraint string
886 may be defined in a machine-dependent fashion to stand for arbitrary
887 operand types.
888
889 For the m88k, `Q' handles addresses in a call context. */
890
891 #define EXTRA_CONSTRAINT(OP, C) \
892 ((C) == 'Q' ? symbolic_address_p (OP) : 0)
893 \f
894 /*** Describing Stack Layout ***/
895
896 /* Define this if pushing a word on the stack moves the stack pointer
897 to a smaller address. */
898 #define STACK_GROWS_DOWNWARD
899
900 /* Define this if the addresses of local variable slots are at negative
901 offsets from the frame pointer. */
902 /* #define FRAME_GROWS_DOWNWARD */
903
904 /* Offset from the frame pointer to the first local variable slot to be
905 allocated. For the m88k, the debugger wants the return address (r1)
906 stored at location r30+4, and the previous frame pointer stored at
907 location r30. */
908 #define STARTING_FRAME_OFFSET 8
909
910 /* If we generate an insn to push BYTES bytes, this says how many the
911 stack pointer really advances by. The m88k has no push instruction. */
912 /* #define PUSH_ROUNDING(BYTES) */
913
914 /* If defined, the maximum amount of space required for outgoing arguments
915 will be computed and placed into the variable
916 `current_function_outgoing_args_size'. No space will be pushed
917 onto the stack for each call; instead, the function prologue should
918 increase the stack frame size by this amount. */
919 #define ACCUMULATE_OUTGOING_ARGS
920
921 /* Offset from the stack pointer register to the first location at which
922 outgoing arguments are placed. Use the default value zero. */
923 /* #define STACK_POINTER_OFFSET 0 */
924
925 /* Offset of first parameter from the argument pointer register value.
926 Using an argument pointer, this is 0 for the m88k. GCC knows
927 how to eliminate the argument pointer references if necessary. */
928 #define FIRST_PARM_OFFSET(FNDECL) 0
929
930 /* Define this if functions should assume that stack space has been
931 allocated for arguments even when their values are passed in
932 registers.
933
934 The value of this macro is the size, in bytes, of the area reserved for
935 arguments passed in registers.
936
937 This space can either be allocated by the caller or be a part of the
938 machine-dependent stack frame: `OUTGOING_REG_PARM_STACK_SPACE'
939 says which. */
940 #define REG_PARM_STACK_SPACE(FNDECL) 32
941
942 /* Define this macro if REG_PARM_STACK_SPACE is defined but stack
943 parameters don't skip the area specified by REG_PARM_STACK_SPACE.
944 Normally, when a parameter is not passed in registers, it is placed on
945 the stack beyond the REG_PARM_STACK_SPACE area. Defining this macro
946 suppresses this behavior and causes the parameter to be passed on the
947 stack in its natural location. */
948 #define STACK_PARMS_IN_REG_PARM_AREA
949
950 /* Define this if it is the responsibility of the caller to allocate the
951 area reserved for arguments passed in registers. If
952 `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect of this
953 macro is to determine whether the space is included in
954 `current_function_outgoing_args_size'. */
955 /* #define OUTGOING_REG_PARM_STACK_SPACE */
956
957 /* Offset from the stack pointer register to an item dynamically allocated
958 on the stack, e.g., by `alloca'.
959
960 The default value for this macro is `STACK_POINTER_OFFSET' plus the
961 length of the outgoing arguments. The default is correct for most
962 machines. See `function.c' for details. */
963 /* #define STACK_DYNAMIC_OFFSET(FUNDECL) ... */
964
965 /* Value is the number of bytes of arguments automatically
966 popped when returning from a subroutine call.
967 FUNDECL is the declaration node of the function (as a tree),
968 FUNTYPE is the data type of the function (as a tree),
969 or for a library call it is an identifier node for the subroutine name.
970 SIZE is the number of bytes of arguments passed on the stack. */
971 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
972
973 /* Define how to find the value returned by a function.
974 VALTYPE is the data type of the value (as a tree).
975 If the precise function being called is known, FUNC is its FUNCTION_DECL;
976 otherwise, FUNC is 0. */
977 #define FUNCTION_VALUE(VALTYPE, FUNC) \
978 gen_rtx (REG, \
979 TYPE_MODE (VALTYPE) == BLKmode ? SImode : TYPE_MODE (VALTYPE), \
980 2)
981
982 /* Define this if it differs from FUNCTION_VALUE. */
983 /* #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) ... */
984
985 /* Disable the promotion of some structures and unions to registers. */
986 #define RETURN_IN_MEMORY(TYPE) \
987 (TYPE_MODE (TYPE) == BLKmode \
988 || ((TREE_CODE (TYPE) == RECORD_TYPE || TREE_CODE(TYPE) == UNION_TYPE) \
989 && !(TYPE_MODE (TYPE) == SImode \
990 || (TYPE_MODE (TYPE) == BLKmode \
991 && TYPE_ALIGN (TYPE) == BITS_PER_WORD \
992 && int_size_in_bytes (TYPE) == UNITS_PER_WORD))))
993
994 /* Don't default to pcc-struct-return, because we have already specified
995 exactly how to return structures in the RETURN_IN_MEMORY macro. */
996 #define DEFAULT_PCC_STRUCT_RETURN 0
997
998 /* Define how to find the value returned by a library function
999 assuming the value has mode MODE. */
1000 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 2)
1001
1002 /* True if N is a possible register number for a function value
1003 as seen by the caller. */
1004 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2)
1005
1006 /* Determine whether a function argument is passed in a register, and
1007 which register. See m88k.c. */
1008 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1009 m88k_function_arg (CUM, MODE, TYPE, NAMED)
1010
1011 /* Define this if it differs from FUNCTION_ARG. */
1012 /* #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) ... */
1013
1014 /* A C expression for the number of words, at the beginning of an
1015 argument, must be put in registers. The value must be zero for
1016 arguments that are passed entirely in registers or that are entirely
1017 pushed on the stack. */
1018 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) (0)
1019
1020 /* A C expression that indicates when an argument must be passed by
1021 reference. If nonzero for an argument, a copy of that argument is
1022 made in memory and a pointer to the argument is passed instead of the
1023 argument itself. The pointer is passed in whatever way is appropriate
1024 for passing a pointer to that type. */
1025 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) (0)
1026
1027 /* A C type for declaring a variable that is used as the first argument
1028 of `FUNCTION_ARG' and other related values. It suffices to count
1029 the number of words of argument so far. */
1030 #define CUMULATIVE_ARGS int
1031
1032 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to a
1033 function whose data type is FNTYPE. For a library call, FNTYPE is 0. */
1034 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) ((CUM) = 0)
1035
1036 /* A C statement (sans semicolon) to update the summarizer variable
1037 CUM to advance past an argument in the argument list. The values
1038 MODE, TYPE and NAMED describe that argument. Once this is done,
1039 the variable CUM is suitable for analyzing the *following* argument
1040 with `FUNCTION_ARG', etc. (TYPE is null for libcalls where that
1041 information may not be available.) */
1042 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1043 do { \
1044 enum machine_mode __mode = (TYPE) ? TYPE_MODE (TYPE) : (MODE); \
1045 if ((CUM & 1) \
1046 && (__mode == DImode || __mode == DFmode \
1047 || ((TYPE) && TYPE_ALIGN (TYPE) > BITS_PER_WORD))) \
1048 CUM++; \
1049 CUM += (((__mode != BLKmode) \
1050 ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE)) \
1051 + 3) / 4; \
1052 } while (0)
1053
1054 /* True if N is a possible register number for function argument passing.
1055 On the m88000, these are registers 2 through 9. */
1056 #define FUNCTION_ARG_REGNO_P(N) ((N) <= 9 && (N) >= 2)
1057
1058 /* A C expression which determines whether, and in which direction,
1059 to pad out an argument with extra space. The value should be of
1060 type `enum direction': either `upward' to pad above the argument,
1061 `downward' to pad below, or `none' to inhibit padding.
1062
1063 This macro does not control the *amount* of padding; that is always
1064 just enough to reach the next multiple of `FUNCTION_ARG_BOUNDARY'. */
1065 #define FUNCTION_ARG_PADDING(MODE, TYPE) \
1066 ((MODE) == BLKmode \
1067 || ((TYPE) && (TREE_CODE (TYPE) == RECORD_TYPE \
1068 || TREE_CODE (TYPE) == UNION_TYPE)) \
1069 ? upward : GET_MODE_BITSIZE (MODE) < PARM_BOUNDARY ? downward : none)
1070
1071 /* If defined, a C expression that gives the alignment boundary, in bits,
1072 of an argument with the specified mode and type. If it is not defined,
1073 `PARM_BOUNDARY' is used for all arguments. */
1074 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1075 (((TYPE) ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) <= PARM_BOUNDARY \
1076 ? PARM_BOUNDARY : 2 * PARM_BOUNDARY)
1077
1078 /* Generate necessary RTL for __builtin_saveregs().
1079 ARGLIST is the argument list; see expr.c. */
1080 #define EXPAND_BUILTIN_SAVEREGS() m88k_builtin_saveregs ()
1081
1082 /* Define the `__builtin_va_list' type for the ABI. */
1083 #define BUILD_VA_LIST_TYPE(VALIST) \
1084 (VALIST) = m88k_build_va_list ()
1085 extern union tree_node *m88k_build_va_list ();
1086
1087 /* Implement `va_start' for varargs and stdarg. */
1088 #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
1089 m88k_va_start (stdarg, valist, nextarg)
1090 extern void m88k_va_start ();
1091
1092 /* Implement `va_arg'. */
1093 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
1094 m88k_va_arg (valist, type)
1095 extern struct rtx_def *m88k_va_arg ();
1096
1097 /* Generate the assembly code for function entry. */
1098 #define FUNCTION_PROLOGUE(FILE, SIZE) m88k_begin_prologue(FILE, SIZE)
1099
1100 /* Perform special actions at the point where the prologue ends. */
1101 #define FUNCTION_END_PROLOGUE(FILE) m88k_end_prologue(FILE)
1102
1103 /* Output assembler code to FILE to increment profiler label # LABELNO
1104 for profiling a function entry. Redefined in sysv3.h, sysv4.h and
1105 dgux.h. */
1106 #define FUNCTION_PROFILER(FILE, LABELNO) \
1107 output_function_profiler (FILE, LABELNO, "mcount", 1)
1108
1109 /* Maximum length in instructions of the code output by FUNCTION_PROFILER. */
1110 #define FUNCTION_PROFILER_LENGTH (5+3+1+5)
1111
1112 /* Output assembler code to FILE to initialize basic-block profiling for
1113 the current module. LABELNO is unique to each instance. */
1114 #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
1115 output_function_block_profiler (FILE, LABELNO)
1116
1117 /* Maximum length in instructions of the code output by
1118 FUNCTION_BLOCK_PROFILER. */
1119 #define FUNCTION_BLOCK_PROFILER_LENGTH (3+5+2+5)
1120
1121 /* Output assembler code to FILE to increment the count associated with
1122 the basic block number BLOCKNO. */
1123 #define BLOCK_PROFILER(FILE, BLOCKNO) output_block_profiler (FILE, BLOCKNO)
1124
1125 /* Maximum length in instructions of the code output by BLOCK_PROFILER. */
1126 #define BLOCK_PROFILER_LENGTH 4
1127
1128 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1129 the stack pointer does not matter. The value is tested only in
1130 functions that have frame pointers.
1131 No definition is equivalent to always zero. */
1132 #define EXIT_IGNORE_STACK (1)
1133
1134 /* Generate the assembly code for function exit. */
1135 #define FUNCTION_EPILOGUE(FILE, SIZE) m88k_end_epilogue(FILE, SIZE)
1136
1137 /* Perform special actions at the point where the epilogue begins. */
1138 #define FUNCTION_BEGIN_EPILOGUE(FILE) m88k_begin_epilogue(FILE)
1139
1140 /* Value should be nonzero if functions must have frame pointers.
1141 Zero means the frame pointer need not be set up (and parms
1142 may be accessed via the stack pointer) in functions that seem suitable.
1143 This is computed in `reload', in reload1.c. */
1144 #define FRAME_POINTER_REQUIRED \
1145 (current_function_varargs \
1146 || (TARGET_OMIT_LEAF_FRAME_POINTER && !leaf_function_p ()) \
1147 || (write_symbols != NO_DEBUG && !TARGET_OCS_FRAME_POSITION))
1148
1149 /* Definitions for register eliminations.
1150
1151 We have two registers that can be eliminated on the m88k. First, the
1152 frame pointer register can often be eliminated in favor of the stack
1153 pointer register. Secondly, the argument pointer register can always be
1154 eliminated; it is replaced with either the stack or frame pointer. */
1155
1156 /* This is an array of structures. Each structure initializes one pair
1157 of eliminable registers. The "from" register number is given first,
1158 followed by "to". Eliminations of the same "from" register are listed
1159 in order of preference. */
1160 #define ELIMINABLE_REGS \
1161 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1162 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1163 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1164
1165 /* Given FROM and TO register numbers, say whether this elimination
1166 is allowed. */
1167 #define CAN_ELIMINATE(FROM, TO) \
1168 (!((FROM) == FRAME_POINTER_REGNUM && FRAME_POINTER_REQUIRED))
1169
1170 /* Define the offset between two registers, one to be eliminated, and the other
1171 its replacement, at the start of a routine. */
1172 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1173 { m88k_layout_frame (); \
1174 if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1175 (OFFSET) = m88k_fp_offset; \
1176 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1177 (OFFSET) = m88k_stack_size - m88k_fp_offset; \
1178 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1179 (OFFSET) = m88k_stack_size; \
1180 else \
1181 abort (); \
1182 }
1183 \f
1184 /*** Trampolines for Nested Functions ***/
1185
1186 /* Output assembler code for a block containing the constant parts
1187 of a trampoline, leaving space for the variable parts.
1188
1189 This block is placed on the stack and filled in. It is aligned
1190 0 mod 128 and those portions that are executed are constant.
1191 This should work for instruction caches that have cache lines up
1192 to the aligned amount (128 is arbitrary), provided no other code
1193 producer is attempting to play the same game. This of course is
1194 in violation of any number of 88open standards. */
1195
1196 #define TRAMPOLINE_TEMPLATE(FILE) \
1197 { \
1198 char buf[256]; \
1199 static int labelno = 0; \
1200 labelno++; \
1201 ASM_GENERATE_INTERNAL_LABEL (buf, "LTRMP", labelno); \
1202 /* Save the return address (r1) in the static chain reg (r11). */ \
1203 fprintf (FILE, "\tor\t %s,%s,0\n", reg_names[11], reg_names[1]); \
1204 /* Locate this block; transfer to the next instruction. */ \
1205 fprintf (FILE, "\tbsr\t %s\n", &buf[1]); \
1206 ASM_OUTPUT_INTERNAL_LABEL (FILE, "LTRMP", labelno); \
1207 /* Save r10; use it as the relative pointer; restore r1. */ \
1208 fprintf (FILE, "\tst\t %s,%s,24\n", reg_names[10], reg_names[1]); \
1209 fprintf (FILE, "\tor\t %s,%s,0\n", reg_names[10], reg_names[1]); \
1210 fprintf (FILE, "\tor\t %s,%s,0\n", reg_names[1], reg_names[11]); \
1211 /* Load the function's address and go there. */ \
1212 fprintf (FILE, "\tld\t %s,%s,32\n", reg_names[11], reg_names[10]); \
1213 fprintf (FILE, "\tjmp.n\t %s\n", reg_names[11]); \
1214 /* Restore r10 and load the static chain register. */ \
1215 fprintf (FILE, "\tld.d\t %s,%s,24\n", reg_names[10], reg_names[10]); \
1216 /* Storage: r10 save area, static chain, function address. */ \
1217 ASM_OUTPUT_INT (FILE, const0_rtx); \
1218 ASM_OUTPUT_INT (FILE, const0_rtx); \
1219 ASM_OUTPUT_INT (FILE, const0_rtx); \
1220 }
1221
1222 /* Length in units of the trampoline for entering a nested function.
1223 This is really two components. The first 32 bytes are fixed and
1224 must be copied; the last 12 bytes are just storage that's filled
1225 in later. So for allocation purposes, it's 32+12 bytes, but for
1226 initialization purposes, it's 32 bytes. */
1227
1228 #define TRAMPOLINE_SIZE (32+12)
1229
1230 /* Alignment required for a trampoline. 128 is used to find the
1231 beginning of a line in the instruction cache and to allow for
1232 instruction cache lines of up to 128 bytes. */
1233
1234 #define TRAMPOLINE_ALIGNMENT 128
1235
1236 /* Emit RTL insns to initialize the variable parts of a trampoline.
1237 FNADDR is an RTX for the address of the function's pure code.
1238 CXT is an RTX for the static chain value for the function. */
1239
1240 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1241 { \
1242 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 40)), FNADDR); \
1243 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 36)), CXT); \
1244 }
1245
1246 /*** Library Subroutine Names ***/
1247
1248 /* Define this macro if GNU CC should generate calls to the System V
1249 (and ANSI C) library functions `memcpy' and `memset' rather than
1250 the BSD functions `bcopy' and `bzero'. */
1251 #define TARGET_MEM_FUNCTIONS
1252 \f
1253 /*** Addressing Modes ***/
1254
1255 #define EXTRA_CC_MODES CC(CCEVENmode, "CCEVEN")
1256
1257 #define SELECT_CC_MODE(OP,X,Y) CCmode
1258
1259 /* #define HAVE_POST_INCREMENT 0 */
1260 /* #define HAVE_POST_DECREMENT 0 */
1261
1262 /* #define HAVE_PRE_DECREMENT 0 */
1263 /* #define HAVE_PRE_INCREMENT 0 */
1264
1265 /* Recognize any constant value that is a valid address.
1266 When PIC, we do not accept an address that would require a scratch reg
1267 to load into a register. */
1268
1269 #define CONSTANT_ADDRESS_P(X) \
1270 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1271 || GET_CODE (X) == CONST_INT || GET_CODE (X) == HIGH \
1272 || (GET_CODE (X) == CONST \
1273 && ! (flag_pic && pic_address_needs_scratch (X))))
1274
1275
1276 /* Maximum number of registers that can appear in a valid memory address. */
1277 #define MAX_REGS_PER_ADDRESS 2
1278
1279 /* The condition for memory shift insns. */
1280 #define SCALED_ADDRESS_P(ADDR) \
1281 (GET_CODE (ADDR) == PLUS \
1282 && (GET_CODE (XEXP (ADDR, 0)) == MULT \
1283 || GET_CODE (XEXP (ADDR, 1)) == MULT))
1284
1285 /* Can the reference to X be made short? */
1286 #define SHORT_ADDRESS_P(X,TEMP) \
1287 ((TEMP) = (GET_CODE (X) == CONST ? get_related_value (X) : X), \
1288 ((TEMP) && GET_CODE (TEMP) == SYMBOL_REF && SYMBOL_REF_FLAG (TEMP)))
1289
1290 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1291 that is a valid memory address for an instruction.
1292 The MODE argument is the machine mode for the MEM expression
1293 that wants to use this address.
1294
1295 On the m88000, a legitimate address has the form REG, REG+REG,
1296 REG+SMALLINT, REG+(REG*modesize) (REG[REG]), or SMALLINT.
1297
1298 The register elimination process should deal with the argument
1299 pointer and frame pointer changing to REG+SMALLINT. */
1300
1301 #define LEGITIMATE_INDEX_P(X, MODE) \
1302 ((GET_CODE (X) == CONST_INT \
1303 && SMALL_INT (X)) \
1304 || (REG_P (X) \
1305 && REG_OK_FOR_INDEX_P (X)) \
1306 || (GET_CODE (X) == MULT \
1307 && REG_P (XEXP (X, 0)) \
1308 && REG_OK_FOR_INDEX_P (XEXP (X, 0)) \
1309 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1310 && INTVAL (XEXP (X, 1)) == GET_MODE_SIZE (MODE)))
1311
1312 #define RTX_OK_FOR_BASE_P(X) \
1313 ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1314 || (GET_CODE (X) == SUBREG \
1315 && GET_CODE (SUBREG_REG (X)) == REG \
1316 && REG_OK_FOR_BASE_P (SUBREG_REG (X))))
1317
1318 #define RTX_OK_FOR_INDEX_P(X) \
1319 ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \
1320 || (GET_CODE (X) == SUBREG \
1321 && GET_CODE (SUBREG_REG (X)) == REG \
1322 && REG_OK_FOR_INDEX_P (SUBREG_REG (X))))
1323
1324 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1325 { \
1326 register rtx _x; \
1327 if (REG_P (X)) \
1328 { \
1329 if (REG_OK_FOR_BASE_P (X)) \
1330 goto ADDR; \
1331 } \
1332 else if (GET_CODE (X) == PLUS) \
1333 { \
1334 register rtx _x0 = XEXP (X, 0); \
1335 register rtx _x1 = XEXP (X, 1); \
1336 if ((flag_pic \
1337 && _x0 == pic_offset_table_rtx \
1338 && (flag_pic == 2 \
1339 ? RTX_OK_FOR_BASE_P (_x1) \
1340 : (GET_CODE (_x1) == SYMBOL_REF \
1341 || GET_CODE (_x1) == LABEL_REF))) \
1342 || (REG_P (_x0) \
1343 && (REG_OK_FOR_BASE_P (_x0) \
1344 && LEGITIMATE_INDEX_P (_x1, MODE))) \
1345 || (REG_P (_x1) \
1346 && (REG_OK_FOR_BASE_P (_x1) \
1347 && LEGITIMATE_INDEX_P (_x0, MODE)))) \
1348 goto ADDR; \
1349 } \
1350 else if (GET_CODE (X) == LO_SUM) \
1351 { \
1352 register rtx _x0 = XEXP (X, 0); \
1353 register rtx _x1 = XEXP (X, 1); \
1354 if (((REG_P (_x0) \
1355 && REG_OK_FOR_BASE_P (_x0)) \
1356 || (GET_CODE (_x0) == SUBREG \
1357 && REG_P (SUBREG_REG (_x0)) \
1358 && REG_OK_FOR_BASE_P (SUBREG_REG (_x0)))) \
1359 && CONSTANT_P (_x1)) \
1360 goto ADDR; \
1361 } \
1362 else if (GET_CODE (X) == CONST_INT \
1363 && SMALL_INT (X)) \
1364 goto ADDR; \
1365 else if (SHORT_ADDRESS_P (X, _x)) \
1366 goto ADDR; \
1367 }
1368
1369 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1370 and check its validity for a certain class.
1371 We have two alternate definitions for each of them.
1372 The usual definition accepts all pseudo regs; the other rejects
1373 them unless they have been allocated suitable hard regs.
1374 The symbol REG_OK_STRICT causes the latter definition to be used.
1375
1376 Most source files want to accept pseudo regs in the hope that
1377 they will get allocated to the class that the insn wants them to be in.
1378 Source files for reload pass need to be strict.
1379 After reload, it makes no difference, since pseudo regs have
1380 been eliminated by then. */
1381
1382 #ifndef REG_OK_STRICT
1383
1384 /* Nonzero if X is a hard reg that can be used as an index
1385 or if it is a pseudo reg. Not the argument pointer. */
1386 #define REG_OK_FOR_INDEX_P(X) \
1387 (!XRF_REGNO_P(REGNO (X)))
1388 /* Nonzero if X is a hard reg that can be used as a base reg
1389 or if it is a pseudo reg. */
1390 #define REG_OK_FOR_BASE_P(X) (REG_OK_FOR_INDEX_P (X))
1391
1392 #else
1393
1394 /* Nonzero if X is a hard reg that can be used as an index. */
1395 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1396 /* Nonzero if X is a hard reg that can be used as a base reg. */
1397 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1398
1399 #endif
1400
1401 /* Try machine-dependent ways of modifying an illegitimate address
1402 to be legitimate. If we find one, return the new, valid address.
1403 This macro is used in only one place: `memory_address' in explow.c.
1404
1405 OLDX is the address as it was before break_out_memory_refs was called.
1406 In some cases it is useful to look at this to decide what needs to be done.
1407
1408 MODE and WIN are passed so that this macro can use
1409 GO_IF_LEGITIMATE_ADDRESS.
1410
1411 It is always safe for this macro to do nothing. It exists to recognize
1412 opportunities to optimize the output. */
1413
1414 /* On the m88000, change REG+N into REG+REG, and REG+(X*Y) into REG+REG. */
1415
1416 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1417 { \
1418 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1419 (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
1420 copy_to_mode_reg (SImode, XEXP (X, 1))); \
1421 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
1422 (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
1423 copy_to_mode_reg (SImode, XEXP (X, 0))); \
1424 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
1425 (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
1426 force_operand (XEXP (X, 0), 0)); \
1427 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
1428 (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
1429 force_operand (XEXP (X, 1), 0)); \
1430 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == PLUS) \
1431 (X) = gen_rtx (PLUS, Pmode, force_operand (XEXP (X, 0), NULL_RTX),\
1432 XEXP (X, 1)); \
1433 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == PLUS) \
1434 (X) = gen_rtx (PLUS, Pmode, XEXP (X, 0), \
1435 force_operand (XEXP (X, 1), NULL_RTX)); \
1436 if (GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == CONST \
1437 || GET_CODE (X) == LABEL_REF) \
1438 (X) = legitimize_address (flag_pic, X, 0, 0); \
1439 if (memory_address_p (MODE, X)) \
1440 goto WIN; }
1441
1442 /* Go to LABEL if ADDR (a legitimate address expression)
1443 has an effect that depends on the machine mode it is used for.
1444 On the m88000 this is never true. */
1445
1446 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
1447
1448 /* Nonzero if the constant value X is a legitimate general operand.
1449 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1450 #define LEGITIMATE_CONSTANT_P(X) (1)
1451
1452 /* Define this, so that when PIC, reload won't try to reload invalid
1453 addresses which require two reload registers. */
1454
1455 #define LEGITIMATE_PIC_OPERAND_P(X) (! pic_address_needs_scratch (X))
1456
1457 \f
1458 /*** Condition Code Information ***/
1459
1460 /* C code for a data type which is used for declaring the `mdep'
1461 component of `cc_status'. It defaults to `int'. */
1462 /* #define CC_STATUS_MDEP int */
1463
1464 /* A C expression to initialize the `mdep' field to "empty". */
1465 /* #define CC_STATUS_MDEP_INIT (cc_status.mdep = 0) */
1466
1467 /* Macro to zap the normal portions of CC_STATUS, but leave the
1468 machine dependent parts (ie, literal synthesis) alone. */
1469 /* #define CC_STATUS_INIT_NO_MDEP \
1470 (cc_status.flags = 0, cc_status.value1 = 0, cc_status.value2 = 0) */
1471
1472 /* When using a register to hold the condition codes, the cc_status
1473 mechanism cannot be used. */
1474 #define NOTICE_UPDATE_CC(EXP, INSN) (0)
1475 \f
1476 /*** Miscellaneous Parameters ***/
1477
1478 /* Define the codes that are matched by predicates in m88k.c. */
1479 #define PREDICATE_CODES \
1480 {"move_operand", {SUBREG, REG, CONST_INT, LO_SUM, MEM}}, \
1481 {"call_address_operand", {SUBREG, REG, SYMBOL_REF, LABEL_REF, CONST}}, \
1482 {"arith_operand", {SUBREG, REG, CONST_INT}}, \
1483 {"arith5_operand", {SUBREG, REG, CONST_INT}}, \
1484 {"arith32_operand", {SUBREG, REG, CONST_INT}}, \
1485 {"arith64_operand", {SUBREG, REG, CONST_INT}}, \
1486 {"int5_operand", {CONST_INT}}, \
1487 {"int32_operand", {CONST_INT}}, \
1488 {"add_operand", {SUBREG, REG, CONST_INT}}, \
1489 {"reg_or_bbx_mask_operand", {SUBREG, REG, CONST_INT}}, \
1490 {"real_or_0_operand", {SUBREG, REG, CONST_DOUBLE}}, \
1491 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
1492 {"relop", {EQ, NE, LT, LE, GE, GT, LTU, LEU, GEU, GTU}}, \
1493 {"even_relop", {EQ, LT, GT, LTU, GTU}}, \
1494 {"odd_relop", { NE, LE, GE, LEU, GEU}}, \
1495 {"partial_ccmode_register_operand", { SUBREG, REG}}, \
1496 {"relop_no_unsigned", {EQ, NE, LT, LE, GE, GT}}, \
1497 {"equality_op", {EQ, NE}}, \
1498 {"pc_or_label_ref", {PC, LABEL_REF}},
1499
1500 /* The case table contains either words or branch instructions. This says
1501 which. We always claim that the vector is PC-relative. It is position
1502 independent when -fpic is used. */
1503 #define CASE_VECTOR_INSNS (TARGET_88100 || flag_pic)
1504
1505 /* An alias for a machine mode name. This is the machine mode that
1506 elements of a jump-table should have. */
1507 #define CASE_VECTOR_MODE SImode
1508
1509 /* Define as C expression which evaluates to nonzero if the tablejump
1510 instruction expects the table to contain offsets from the address of the
1511 table.
1512 Do not define this if the table should contain absolute addresses. */
1513 #define CASE_VECTOR_PC_RELATIVE 1
1514
1515 /* Define this if control falls through a `case' insn when the index
1516 value is out of range. This means the specified default-label is
1517 actually ignored by the `case' insn proper. */
1518 /* #define CASE_DROPS_THROUGH */
1519
1520 /* Define this to be the smallest number of different values for which it
1521 is best to use a jump-table instead of a tree of conditional branches.
1522 The default is 4 for machines with a casesi instruction and 5 otherwise.
1523 The best 88110 number is around 7, though the exact number isn't yet
1524 known. A third alternative for the 88110 is to use a binary tree of
1525 bb1 instructions on bits 2/1/0 if the range is dense. This may not
1526 win very much though. */
1527 #define CASE_VALUES_THRESHOLD (TARGET_88100 ? 4 : 7)
1528
1529 /* Specify the tree operation to be used to convert reals to integers. */
1530 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1531
1532 /* This is the kind of divide that is easiest to do in the general case. */
1533 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1534
1535 /* Define this as 1 if `char' should by default be signed; else as 0. */
1536 #define DEFAULT_SIGNED_CHAR 1
1537
1538 /* The 88open ABI says size_t is unsigned int. */
1539 #define SIZE_TYPE "unsigned int"
1540
1541 /* Allow and ignore #sccs directives */
1542 #define SCCS_DIRECTIVE
1543
1544 /* Handle #pragma pack and sometimes #pragma weak. */
1545 #define HANDLE_SYSV_PRAGMA
1546
1547 /* Tell when to handle #pragma weak. This is only done for V.4. */
1548 #define SUPPORTS_WEAK TARGET_SVR4
1549 #define SUPPORTS_ONE_ONLY TARGET_SVR4
1550
1551 /* Max number of bytes we can move from memory to memory
1552 in one reasonably fast instruction. */
1553 #define MOVE_MAX 8
1554
1555 /* Define if normal loads of shorter-than-word items from memory clears
1556 the rest of the bigs in the register. */
1557 #define BYTE_LOADS_ZERO_EXTEND
1558
1559 /* Zero if access to memory by bytes is faster. */
1560 #define SLOW_BYTE_ACCESS 1
1561
1562 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1563 is done just by pretending it is already truncated. */
1564 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1565
1566 /* Define this if addresses of constant functions
1567 shouldn't be put through pseudo regs where they can be cse'd.
1568 Desirable on machines where ordinary constants are expensive
1569 but a CALL with constant address is cheap. */
1570 #define NO_FUNCTION_CSE
1571
1572 /* Define this macro if an argument declared as `char' or
1573 `short' in a prototype should actually be passed as an
1574 `int'. In addition to avoiding errors in certain cases of
1575 mismatch, it also makes for better code on certain machines. */
1576 #define PROMOTE_PROTOTYPES 1
1577
1578 /* Define this macro if a float function always returns float
1579 (even in traditional mode). Redefined in luna.h. */
1580 #define TRADITIONAL_RETURN_FLOAT
1581
1582 /* We assume that the store-condition-codes instructions store 0 for false
1583 and some other value for true. This is the value stored for true. */
1584 #define STORE_FLAG_VALUE -1
1585
1586 /* Specify the machine mode that pointers have.
1587 After generation of rtl, the compiler makes no further distinction
1588 between pointers and any other objects of this machine mode. */
1589 #define Pmode SImode
1590
1591 /* A function address in a call instruction
1592 is a word address (for indexing purposes)
1593 so give the MEM rtx word mode. */
1594 #define FUNCTION_MODE SImode
1595
1596 /* A barrier will be aligned so account for the possible expansion.
1597 A volatile load may be preceded by a serializing instruction.
1598 Account for profiling code output at NOTE_INSN_PROLOGUE_END.
1599 Account for block profiling code at basic block boundaries. */
1600 #define ADJUST_INSN_LENGTH(RTX, LENGTH) \
1601 if (GET_CODE (RTX) == BARRIER \
1602 || (TARGET_SERIALIZE_VOLATILE \
1603 && GET_CODE (RTX) == INSN \
1604 && GET_CODE (PATTERN (RTX)) == SET \
1605 && ((GET_CODE (SET_SRC (PATTERN (RTX))) == MEM \
1606 && MEM_VOLATILE_P (SET_SRC (PATTERN (RTX))))))) \
1607 LENGTH += 1; \
1608 else if (GET_CODE (RTX) == NOTE \
1609 && NOTE_LINE_NUMBER (RTX) == NOTE_INSN_PROLOGUE_END) \
1610 { \
1611 if (profile_block_flag) \
1612 LENGTH += FUNCTION_BLOCK_PROFILER_LENGTH; \
1613 if (profile_flag) \
1614 LENGTH += (FUNCTION_PROFILER_LENGTH + REG_PUSH_LENGTH \
1615 + REG_POP_LENGTH); \
1616 } \
1617 else if (profile_block_flag \
1618 && (GET_CODE (RTX) == CODE_LABEL \
1619 || GET_CODE (RTX) == JUMP_INSN \
1620 || (GET_CODE (RTX) == INSN \
1621 && GET_CODE (PATTERN (RTX)) == SEQUENCE \
1622 && GET_CODE (XVECEXP (PATTERN (RTX), 0, 0)) == JUMP_INSN)))\
1623 LENGTH += BLOCK_PROFILER_LENGTH;
1624
1625 /* Track the state of the last volatile memory reference. Clear the
1626 state with CC_STATUS_INIT for now. */
1627 #define CC_STATUS_INIT m88k_volatile_code = '\0'
1628
1629 /* Compute the cost of computing a constant rtl expression RTX
1630 whose rtx-code is CODE. The body of this macro is a portion
1631 of a switch statement. If the code is computed here,
1632 return it with a return statement. Otherwise, break from the switch.
1633
1634 We assume that any 16 bit integer can easily be recreated, so we
1635 indicate 0 cost, in an attempt to get GCC not to optimize things
1636 like comparison against a constant.
1637
1638 The cost of CONST_DOUBLE is zero (if it can be placed in an insn, it
1639 is as good as a register; since it can't be placed in any insn, it
1640 won't do anything in cse, but it will cause expand_binop to pass the
1641 constant to the define_expands). */
1642 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1643 case CONST_INT: \
1644 if (SMALL_INT (RTX)) \
1645 return 0; \
1646 else if (SMALL_INTVAL (- INTVAL (RTX))) \
1647 return 2; \
1648 else if (classify_integer (SImode, INTVAL (RTX)) != m88k_oru_or) \
1649 return 4; \
1650 return 7; \
1651 case HIGH: \
1652 return 2; \
1653 case CONST: \
1654 case LABEL_REF: \
1655 case SYMBOL_REF: \
1656 if (flag_pic) \
1657 return (flag_pic == 2) ? 11 : 8; \
1658 return 5; \
1659 case CONST_DOUBLE: \
1660 return 0;
1661
1662 /* Provide the costs of an addressing mode that contains ADDR.
1663 If ADDR is not a valid address, its cost is irrelevant.
1664 REG+REG is made slightly more expensive because it might keep
1665 a register live for longer than we might like. */
1666 #define ADDRESS_COST(ADDR) \
1667 (GET_CODE (ADDR) == REG ? 1 : \
1668 GET_CODE (ADDR) == LO_SUM ? 1 : \
1669 GET_CODE (ADDR) == HIGH ? 2 : \
1670 GET_CODE (ADDR) == MULT ? 1 : \
1671 GET_CODE (ADDR) != PLUS ? 4 : \
1672 (REG_P (XEXP (ADDR, 0)) && REG_P (XEXP (ADDR, 1))) ? 2 : 1)
1673
1674 /* Provide the costs of a rtl expression. This is in the body of a
1675 switch on CODE. */
1676 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1677 case MEM: \
1678 return COSTS_N_INSNS (2); \
1679 case MULT: \
1680 return COSTS_N_INSNS (3); \
1681 case DIV: \
1682 case UDIV: \
1683 case MOD: \
1684 case UMOD: \
1685 return COSTS_N_INSNS (38);
1686
1687 /* A C expressions returning the cost of moving data of MODE from a register
1688 to or from memory. This is more costly than between registers. */
1689 #define MEMORY_MOVE_COST(MODE,CLASS,IN) 4
1690
1691 /* Provide the cost of a branch. Exact meaning under development. */
1692 #define BRANCH_COST (TARGET_88100 ? 1 : 2)
1693
1694 /* A C statement (sans semicolon) to update the integer variable COST
1695 based on the relationship between INSN that is dependent on
1696 DEP_INSN through the dependence LINK. The default is to make no
1697 adjustment to COST. On the m88k, ignore the cost of anti- and
1698 output-dependencies. On the m88100, a store can issue two cycles
1699 before the value (not the address) has finished computing. */
1700 #define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \
1701 do { \
1702 if (REG_NOTE_KIND (LINK) != 0) \
1703 (COST) = 0; /* Anti or output dependence. */ \
1704 else if (! TARGET_88100 \
1705 && recog_memoized (INSN) >= 0 \
1706 && get_attr_type (INSN) == TYPE_STORE \
1707 && SET_SRC (PATTERN (INSN)) == SET_DEST (PATTERN (DEP_INSN))) \
1708 (COST) -= 4; /* 88110 store reservation station. */ \
1709 } while (0)
1710
1711 /* Do not break .stabs pseudos into continuations. */
1712 #define DBX_CONTIN_LENGTH 0
1713 \f
1714 /*** Output of Assembler Code ***/
1715
1716 /* Control the assembler format that we output. */
1717
1718 /* A C string constant describing how to begin a comment in the target
1719 assembler language. The compiler assumes that the comment will end at
1720 the end of the line. */
1721 #define ASM_COMMENT_START ";"
1722
1723 /* Allow pseudo-ops to be overridden. Override these in svr[34].h. */
1724 #undef INT_ASM_OP
1725 #undef ASCII_DATA_ASM_OP
1726 #undef CONST_SECTION_ASM_OP
1727 #undef CTORS_SECTION_ASM_OP
1728 #undef DTORS_SECTION_ASM_OP
1729 #undef ASM_OUTPUT_SECTION_NAME
1730 #undef INIT_SECTION_ASM_OP
1731 #undef FINI_SECTION_ASM_OP
1732 #undef TYPE_ASM_OP
1733 #undef SIZE_ASM_OP
1734 #undef SET_ASM_OP
1735 #undef SKIP_ASM_OP
1736 #undef COMMON_ASM_OP
1737 #undef ALIGN_ASM_OP
1738 #undef IDENT_ASM_OP
1739
1740 /* These are used in varasm.c as well. */
1741 #define TEXT_SECTION_ASM_OP "text"
1742 #define DATA_SECTION_ASM_OP "data"
1743
1744 /* Other sections. */
1745 #define CONST_SECTION_ASM_OP (TARGET_SVR4 \
1746 ? "section\t .rodata,\"a\"" \
1747 : "section\t .rodata,\"x\"")
1748 #define TDESC_SECTION_ASM_OP (TARGET_SVR4 \
1749 ? "section\t .tdesc,\"a\"" \
1750 : "section\t .tdesc,\"x\"")
1751
1752 /* These must be constant strings for crtstuff.c. */
1753 #define CTORS_SECTION_ASM_OP "section\t .ctors,\"d\""
1754 #define DTORS_SECTION_ASM_OP "section\t .dtors,\"d\""
1755 #define INIT_SECTION_ASM_OP "section\t .init,\"x\""
1756 #define FINI_SECTION_ASM_OP "section\t .fini,\"x\""
1757
1758 /* These are pretty much common to all assemblers. */
1759 #define IDENT_ASM_OP "ident"
1760 #define FILE_ASM_OP "file"
1761 #define SECTION_ASM_OP "section"
1762 #define SET_ASM_OP "def"
1763 #define GLOBAL_ASM_OP "global"
1764 #define ALIGN_ASM_OP "align"
1765 #define SKIP_ASM_OP "zero"
1766 #define COMMON_ASM_OP "comm"
1767 #define BSS_ASM_OP "bss"
1768 #define FLOAT_ASM_OP "float"
1769 #define DOUBLE_ASM_OP "double"
1770 #define INT_ASM_OP "word"
1771 #define ASM_LONG INT_ASM_OP
1772 #define SHORT_ASM_OP "half"
1773 #define CHAR_ASM_OP "byte"
1774 #define ASCII_DATA_ASM_OP "string"
1775
1776 /* These are particular to the global pool optimization. */
1777 #define SBSS_ASM_OP "sbss"
1778 #define SCOMM_ASM_OP "scomm"
1779 #define SDATA_SECTION_ASM_OP "sdata"
1780
1781 /* These are specific to PIC. */
1782 #define TYPE_ASM_OP "type"
1783 #define SIZE_ASM_OP "size"
1784 #ifndef AS_BUG_POUND_TYPE /* Faulty assemblers require @ rather than #. */
1785 #undef TYPE_OPERAND_FMT
1786 #define TYPE_OPERAND_FMT "#%s"
1787 #endif
1788
1789 /* This is how we tell the assembler that a symbol is weak. */
1790
1791 #undef ASM_WEAKEN_LABEL
1792 #define ASM_WEAKEN_LABEL(FILE,NAME) \
1793 do { fputs ("\tweak\t", FILE); assemble_name (FILE, NAME); \
1794 fputc ('\n', FILE); } while (0)
1795
1796 /* These are specific to version 03.00 assembler syntax. */
1797 #define INTERNAL_ASM_OP "local"
1798 #define VERSION_ASM_OP "version"
1799 #define UNALIGNED_SHORT_ASM_OP "uahalf"
1800 #define UNALIGNED_INT_ASM_OP "uaword"
1801 #define PUSHSECTION_ASM_OP "section"
1802 #define POPSECTION_ASM_OP "previous"
1803
1804 /* These are specific to the version 04.00 assembler syntax. */
1805 #define REQUIRES_88110_ASM_OP "requires_88110"
1806
1807 /* Output any initial stuff to the assembly file. Always put out
1808 a file directive, even if not debugging.
1809
1810 Immediately after putting out the file, put out a "sem.<value>"
1811 declaration. This should be harmless on other systems, and
1812 is used in DG/UX by the debuggers to supplement COFF. The
1813 fields in the integer value are as follows:
1814
1815 Bits Value Meaning
1816 ---- ----- -------
1817 0-1 0 No information about stack locations
1818 1 Auto/param locations are based on r30
1819 2 Auto/param locations are based on CFA
1820
1821 3-2 0 No information on dimension order
1822 1 Array dims in sym table matches source language
1823 2 Array dims in sym table is in reverse order
1824
1825 5-4 0 No information about the case of global names
1826 1 Global names appear in the symbol table as in the source
1827 2 Global names have been converted to lower case
1828 3 Global names have been converted to upper case. */
1829
1830 #ifdef SDB_DEBUGGING_INFO
1831 #define ASM_COFFSEM(FILE) \
1832 if (write_symbols == SDB_DEBUG) \
1833 { \
1834 fprintf (FILE, "\nsem.%x:\t\t; %s\n", \
1835 (((TARGET_OCS_FRAME_POSITION) ? 2 : 1) << 0) + (1 << 2) + (1 << 4),\
1836 (TARGET_OCS_FRAME_POSITION) \
1837 ? "frame is CFA, normal array dims, case unchanged" \
1838 : "frame is r30, normal array dims, case unchanged"); \
1839 }
1840 #else
1841 #define ASM_COFFSEM(FILE)
1842 #endif
1843
1844 /* Output the first line of the assembly file. Redefined in dgux.h. */
1845
1846 #define ASM_FIRST_LINE(FILE) \
1847 do { \
1848 if (TARGET_SVR4) \
1849 { \
1850 if (TARGET_88110) \
1851 fprintf (FILE, "\t%s\t \"%s\"\n", VERSION_ASM_OP, "04.00"); \
1852 else \
1853 fprintf (FILE, "\t%s\t \"%s\"\n", VERSION_ASM_OP, "03.00"); \
1854 } \
1855 } while (0)
1856
1857 /* Override svr[34].h. */
1858 #undef ASM_FILE_START
1859 #define ASM_FILE_START(FILE) \
1860 output_file_start (FILE, f_options, sizeof f_options / sizeof f_options[0], \
1861 W_options, sizeof W_options / sizeof W_options[0])
1862
1863 #undef ASM_FILE_END
1864
1865 #define ASM_OUTPUT_SOURCE_FILENAME(FILE, NAME) \
1866 fprintf (FILE, "\t%s\t \"%s\"\n", FILE_ASM_OP, NAME)
1867
1868 #ifdef SDB_DEBUGGING_INFO
1869 #undef ASM_OUTPUT_SOURCE_LINE
1870 #define ASM_OUTPUT_SOURCE_LINE(FILE, LINE) \
1871 if (m88k_prologue_done) \
1872 fprintf (FILE, "\n\tln\t %d\t\t\t\t; Real source line %d\n",\
1873 LINE - sdb_begin_function_line, LINE)
1874 #endif
1875
1876 /* Code to handle #ident directives. Override svr[34].h definition. */
1877 #undef ASM_OUTPUT_IDENT
1878 #ifdef DBX_DEBUGGING_INFO
1879 #define ASM_OUTPUT_IDENT(FILE, NAME)
1880 #else
1881 #define ASM_OUTPUT_IDENT(FILE, NAME) \
1882 output_ascii (FILE, IDENT_ASM_OP, 4000, NAME, strlen (NAME));
1883 #endif
1884
1885 /* Output to assembler file text saying following lines
1886 may contain character constants, extra white space, comments, etc. */
1887 #define ASM_APP_ON ""
1888
1889 /* Output to assembler file text saying following lines
1890 no longer contain unusual constructs. */
1891 #define ASM_APP_OFF ""
1892
1893 /* Format the assembly opcode so that the arguments are all aligned.
1894 The maximum instruction size is 8 characters (fxxx.xxx), so a tab and a
1895 space will do to align the output. Abandon the output if a `%' is
1896 encountered. */
1897 #define ASM_OUTPUT_OPCODE(STREAM, PTR) \
1898 { \
1899 int ch; \
1900 char *orig_ptr; \
1901 \
1902 for (orig_ptr = (PTR); \
1903 (ch = *(PTR)) && ch != ' ' && ch != '\t' && ch != '\n' && ch != '%'; \
1904 (PTR)++) \
1905 putc (ch, STREAM); \
1906 \
1907 if (ch == ' ' && orig_ptr != (PTR) && (PTR) - orig_ptr < 8) \
1908 putc ('\t', STREAM); \
1909 }
1910
1911 /* How to refer to registers in assembler output.
1912 This sequence is indexed by compiler's hard-register-number.
1913 Updated by OVERRIDE_OPTIONS to include the # for version 03.00 syntax. */
1914
1915 #define REGISTER_NAMES \
1916 {"#r0"+1, "#r1"+1, "#r2"+1, "#r3"+1, "#r4"+1, "#r5"+1, "#r6"+1, "#r7"+1, \
1917 "#r8"+1, "#r9"+1, "#r10"+1,"#r11"+1,"#r12"+1,"#r13"+1,"#r14"+1,"#r15"+1,\
1918 "#r16"+1,"#r17"+1,"#r18"+1,"#r19"+1,"#r20"+1,"#r21"+1,"#r22"+1,"#r23"+1,\
1919 "#r24"+1,"#r25"+1,"#r26"+1,"#r27"+1,"#r28"+1,"#r29"+1,"#r30"+1,"#r31"+1,\
1920 "#x0"+1, "#x1"+1, "#x2"+1, "#x3"+1, "#x4"+1, "#x5"+1, "#x6"+1, "#x7"+1, \
1921 "#x8"+1, "#x9"+1, "#x10"+1,"#x11"+1,"#x12"+1,"#x13"+1,"#x14"+1,"#x15"+1,\
1922 "#x16"+1,"#x17"+1,"#x18"+1,"#x19"+1,"#x20"+1,"#x21"+1,"#x22"+1,"#x23"+1,\
1923 "#x24"+1,"#x25"+1,"#x26"+1,"#x27"+1,"#x28"+1,"#x29"+1,"#x30"+1,"#x31"+1}
1924
1925 /* Define additional names for use in asm clobbers and asm declarations.
1926
1927 We define the fake Condition Code register as an alias for reg 0 (which
1928 is our `condition code' register), so that condition codes can easily
1929 be clobbered by an asm. The carry bit in the PSR is now used. */
1930
1931 #define ADDITIONAL_REGISTER_NAMES {"psr", 0, "cc", 0}
1932
1933 /* How to renumber registers for dbx and gdb. */
1934 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1935
1936 /* Tell when to declare ASM names. Override svr4.h to provide this hook. */
1937 #undef DECLARE_ASM_NAME
1938 #define DECLARE_ASM_NAME TARGET_SVR4
1939
1940 /* Write the extra assembler code needed to declare a function properly. */
1941 #undef ASM_DECLARE_FUNCTION_NAME
1942 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1943 do { \
1944 if (DECLARE_ASM_NAME) \
1945 { \
1946 fprintf (FILE, "\t%s\t ", TYPE_ASM_OP); \
1947 assemble_name (FILE, NAME); \
1948 putc (',', FILE); \
1949 fprintf (FILE, TYPE_OPERAND_FMT, "function"); \
1950 putc ('\n', FILE); \
1951 } \
1952 ASM_OUTPUT_LABEL(FILE, NAME); \
1953 } while (0)
1954
1955 /* Write the extra assembler code needed to declare an object properly. */
1956 #undef ASM_DECLARE_OBJECT_NAME
1957 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
1958 do { \
1959 if (DECLARE_ASM_NAME) \
1960 { \
1961 fprintf (FILE, "\t%s\t ", TYPE_ASM_OP); \
1962 assemble_name (FILE, NAME); \
1963 putc (',', FILE); \
1964 fprintf (FILE, TYPE_OPERAND_FMT, "object"); \
1965 putc ('\n', FILE); \
1966 size_directive_output = 0; \
1967 if (!flag_inhibit_size_directive && DECL_SIZE (DECL)) \
1968 { \
1969 size_directive_output = 1; \
1970 fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \
1971 assemble_name (FILE, NAME); \
1972 fprintf (FILE, ",%d\n", int_size_in_bytes (TREE_TYPE (DECL))); \
1973 } \
1974 } \
1975 ASM_OUTPUT_LABEL(FILE, NAME); \
1976 } while (0)
1977
1978 /* Output the size directive for a decl in rest_of_decl_compilation
1979 in the case where we did not do so before the initializer.
1980 Once we find the error_mark_node, we know that the value of
1981 size_directive_output was set
1982 by ASM_DECLARE_OBJECT_NAME when it was run for the same decl. */
1983
1984 #undef ASM_FINISH_DECLARE_OBJECT
1985 #define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \
1986 do { \
1987 char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \
1988 if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \
1989 && DECLARE_ASM_NAME \
1990 && ! AT_END && TOP_LEVEL \
1991 && DECL_INITIAL (DECL) == error_mark_node \
1992 && !size_directive_output) \
1993 { \
1994 size_directive_output = 1; \
1995 fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \
1996 assemble_name (FILE, name); \
1997 fprintf (FILE, ",%d\n", int_size_in_bytes (TREE_TYPE (DECL))); \
1998 } \
1999 } while (0)
2000
2001 /* This is how to declare the size of a function. */
2002 #undef ASM_DECLARE_FUNCTION_SIZE
2003 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
2004 do { \
2005 if (DECLARE_ASM_NAME) \
2006 { \
2007 if (!flag_inhibit_size_directive) \
2008 { \
2009 char label[256]; \
2010 static int labelno = 0; \
2011 labelno++; \
2012 ASM_GENERATE_INTERNAL_LABEL (label, "Lfe", labelno); \
2013 ASM_OUTPUT_INTERNAL_LABEL (FILE, "Lfe", labelno); \
2014 fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \
2015 assemble_name (FILE, (FNAME)); \
2016 fprintf (FILE, ",%s-", &label[1]); \
2017 assemble_name (FILE, (FNAME)); \
2018 putc ('\n', FILE); \
2019 } \
2020 } \
2021 } while (0)
2022
2023 /* This is how to output the definition of a user-level label named NAME,
2024 such as the label on a static function or variable NAME. */
2025 #define ASM_OUTPUT_LABEL(FILE,NAME) \
2026 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
2027
2028 /* This is how to output a command to make the user-level label named NAME
2029 defined for reference from other files. */
2030 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
2031 do { \
2032 fprintf (FILE, "\t%s\t ", GLOBAL_ASM_OP); \
2033 assemble_name (FILE, NAME); \
2034 putc ('\n', FILE); \
2035 } while (0)
2036
2037 /* The prefix to add to user-visible assembler symbols.
2038 Override svr[34].h. */
2039 #undef USER_LABEL_PREFIX
2040 #define USER_LABEL_PREFIX "_"
2041
2042 /* This is how to output a reference to a user-level label named NAME.
2043 Override svr[34].h. */
2044 #undef ASM_OUTPUT_LABELREF
2045 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
2046 { \
2047 if (!TARGET_NO_UNDERSCORES && !TARGET_SVR4) \
2048 fputc ('_', FILE); \
2049 fputs (NAME, FILE); \
2050 }
2051
2052 /* This is how to output an internal numbered label where
2053 PREFIX is the class of label and NUM is the number within the class.
2054 For V.4, labels use `.' rather than `@'. */
2055
2056 #undef ASM_OUTPUT_INTERNAL_LABEL
2057 #ifdef AS_BUG_DOT_LABELS /* The assembler requires a declaration of local. */
2058 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
2059 fprintf (FILE, TARGET_SVR4 ? ".%s%d:\n\t%s\t .%s%d\n" : "@%s%d:\n", \
2060 PREFIX, NUM, INTERNAL_ASM_OP, PREFIX, NUM)
2061 #else
2062 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
2063 fprintf (FILE, TARGET_SVR4 ? ".%s%d:\n" : "@%s%d:\n", PREFIX, NUM)
2064 #endif /* AS_BUG_DOT_LABELS */
2065
2066 /* This is how to store into the string LABEL
2067 the symbol_ref name of an internal numbered label where
2068 PREFIX is the class of label and NUM is the number within the class.
2069 This is suitable for output with `assemble_name'. This must agree
2070 with ASM_OUTPUT_INTERNAL_LABEL above, except for being prefixed
2071 with an `*'. */
2072
2073 #undef ASM_GENERATE_INTERNAL_LABEL
2074 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
2075 sprintf (LABEL, TARGET_SVR4 ? "*.%s%d" : "*@%s%d", PREFIX, NUM)
2076
2077 /* Internal macro to get a single precision floating point value into
2078 an int, so we can print its value in hex. */
2079 #define FLOAT_TO_INT_INTERNAL( FVALUE, IVALUE ) \
2080 { union { \
2081 REAL_VALUE_TYPE d; \
2082 struct { \
2083 unsigned sign : 1; \
2084 unsigned exponent1 : 1; \
2085 unsigned exponent2 : 3; \
2086 unsigned exponent3 : 7; \
2087 unsigned mantissa1 : 20; \
2088 unsigned mantissa2 : 3; \
2089 unsigned mantissa3 : 29; \
2090 } s; \
2091 } _u; \
2092 \
2093 union { \
2094 int i; \
2095 struct { \
2096 unsigned sign : 1; \
2097 unsigned exponent1 : 1; \
2098 unsigned exponent3 : 7; \
2099 unsigned mantissa1 : 20; \
2100 unsigned mantissa2 : 3; \
2101 } s; \
2102 } _u2; \
2103 \
2104 _u.d = REAL_VALUE_TRUNCATE (SFmode, FVALUE); \
2105 _u2.s.sign = _u.s.sign; \
2106 _u2.s.exponent1 = _u.s.exponent1; \
2107 _u2.s.exponent3 = _u.s.exponent3; \
2108 _u2.s.mantissa1 = _u.s.mantissa1; \
2109 _u2.s.mantissa2 = _u.s.mantissa2; \
2110 IVALUE = _u2.i; \
2111 }
2112
2113 /* This is how to output an assembler line defining a `double' constant.
2114 Use "word" pseudos to avoid printing NaNs, infinity, etc. */
2115 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
2116 do { \
2117 union { REAL_VALUE_TYPE d; long l[2]; } x; \
2118 x.d = (VALUE); \
2119 fprintf (FILE, "\t%s\t 0x%.8x, 0x%.8x\n", INT_ASM_OP, \
2120 x.l[0], x.l[1]); \
2121 } while (0)
2122
2123 /* This is how to output an assembler line defining a `float' constant. */
2124 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
2125 do { \
2126 int i; \
2127 FLOAT_TO_INT_INTERNAL (VALUE, i); \
2128 fprintf (FILE, "\t%s\t 0x%.8x\n", INT_ASM_OP, i); \
2129 } while (0)
2130
2131 /* Likewise for `int', `short', and `char' constants. */
2132 #define ASM_OUTPUT_INT(FILE,VALUE) \
2133 ( fprintf (FILE, "\t%s\t ", INT_ASM_OP), \
2134 output_addr_const (FILE, (VALUE)), \
2135 fprintf (FILE, "\n"))
2136
2137 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2138 ( fprintf (FILE, "\t%s\t ", SHORT_ASM_OP), \
2139 output_addr_const (FILE, (VALUE)), \
2140 fprintf (FILE, "\n"))
2141
2142 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
2143 ( fprintf (FILE, "\t%s\t ", CHAR_ASM_OP), \
2144 output_addr_const (FILE, (VALUE)), \
2145 fprintf (FILE, "\n"))
2146
2147 /* This is how to output an assembler line for a numeric constant byte. */
2148 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
2149 fprintf (FILE, "\t%s\t 0x%x\n", CHAR_ASM_OP, (VALUE))
2150
2151 /* The single-byte pseudo-op is the default. Override svr[34].h. */
2152 #undef ASM_BYTE_OP
2153 #define ASM_BYTE_OP "byte"
2154 #undef ASM_OUTPUT_ASCII
2155 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
2156 output_ascii (FILE, ASCII_DATA_ASM_OP, 48, P, SIZE)
2157
2158 /* Override svr4.h. Change to the readonly data section for a table of
2159 addresses. final_scan_insn changes back to the text section. */
2160 #undef ASM_OUTPUT_CASE_LABEL
2161 #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
2162 do { \
2163 if (! CASE_VECTOR_INSNS) \
2164 { \
2165 readonly_data_section (); \
2166 ASM_OUTPUT_ALIGN (FILE, 2); \
2167 } \
2168 ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); \
2169 } while (0)
2170
2171 /* Epilogue for case labels. This jump instruction is called by casesi
2172 to transfer to the appropriate branch instruction within the table.
2173 The label `@L<n>e' is coined to mark the end of the table. */
2174 #define ASM_OUTPUT_CASE_END(FILE, NUM, TABLE) \
2175 do { \
2176 if (CASE_VECTOR_INSNS) \
2177 { \
2178 char label[256]; \
2179 ASM_GENERATE_INTERNAL_LABEL (label, "L", NUM); \
2180 fprintf (FILE, "%se:\n", &label[1]); \
2181 if (! flag_delayed_branch) \
2182 fprintf (FILE, "\tlda\t %s,%s[%s]\n", reg_names[1], \
2183 reg_names[1], reg_names[m88k_case_index]); \
2184 fprintf (FILE, "\tjmp\t %s\n", reg_names[1]); \
2185 } \
2186 } while (0)
2187
2188 /* This is how to output an element of a case-vector that is absolute. */
2189 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
2190 do { \
2191 char buffer[256]; \
2192 ASM_GENERATE_INTERNAL_LABEL (buffer, "L", VALUE); \
2193 fprintf (FILE, CASE_VECTOR_INSNS ? "\tbr\t %s\n" : "\tword\t %s\n", \
2194 &buffer[1]); \
2195 } while (0)
2196
2197 /* This is how to output an element of a case-vector that is relative. */
2198 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
2199 ASM_OUTPUT_ADDR_VEC_ELT (FILE, VALUE)
2200
2201 /* This is how to output an assembler line
2202 that says to advance the location counter
2203 to a multiple of 2**LOG bytes. */
2204 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
2205 if ((LOG) != 0) \
2206 fprintf (FILE, "\t%s\t %d\n", ALIGN_ASM_OP, 1<<(LOG))
2207
2208 /* On the m88100, align the text address to half a cache boundary when it
2209 can only be reached by jumping. Pack code tightly when compiling
2210 crtstuff.c. */
2211 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) \
2212 (TARGET_88100 && !flag_inhibit_size_directive ? 3 : 2)
2213
2214 /* Override svr[34].h. */
2215 #undef ASM_OUTPUT_SKIP
2216 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
2217 fprintf (FILE, "\t%s\t %u\n", SKIP_ASM_OP, (SIZE))
2218
2219 /* Override svr4.h. */
2220 #undef ASM_OUTPUT_EXTERNAL_LIBCALL
2221
2222 /* This says how to output an assembler line to define a global common
2223 symbol. Size can be zero for the unusual case of a `struct { int : 0; }'.
2224 Override svr[34].h. */
2225 #undef ASM_OUTPUT_COMMON
2226 #undef ASM_OUTPUT_ALIGNED_COMMON
2227 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
2228 ( fprintf ((FILE), "\t%s\t ", \
2229 ((SIZE) ? (SIZE) : 1) <= m88k_gp_threshold ? SCOMM_ASM_OP : COMMON_ASM_OP), \
2230 assemble_name ((FILE), (NAME)), \
2231 fprintf ((FILE), ",%u\n", (SIZE) ? (SIZE) : 1))
2232
2233 /* This says how to output an assembler line to define a local common
2234 symbol. Override svr[34].h. */
2235 #undef ASM_OUTPUT_LOCAL
2236 #undef ASM_OUTPUT_ALIGNED_LOCAL
2237 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
2238 ( fprintf ((FILE), "\t%s\t ", \
2239 ((SIZE) ? (SIZE) : 1) <= m88k_gp_threshold ? SBSS_ASM_OP : BSS_ASM_OP), \
2240 assemble_name ((FILE), (NAME)), \
2241 fprintf ((FILE), ",%u,%d\n", (SIZE) ? (SIZE) : 1, (SIZE) <= 4 ? 4 : 8))
2242
2243 /* Store in OUTPUT a string (made with alloca) containing
2244 an assembler-name for a local static variable named NAME.
2245 LABELNO is an integer which is different for each call. */
2246 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2247 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
2248 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
2249
2250 /* This is how to output an insn to push a register on the stack.
2251 It need not be very fast code. */
2252 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
2253 fprintf (FILE, "\tsubu\t %s,%s,%d\n\tst\t %s,%s,0\n", \
2254 reg_names[STACK_POINTER_REGNUM], \
2255 reg_names[STACK_POINTER_REGNUM], \
2256 (STACK_BOUNDARY / BITS_PER_UNIT), \
2257 reg_names[REGNO], \
2258 reg_names[STACK_POINTER_REGNUM])
2259
2260 /* Length in instructions of the code output by ASM_OUTPUT_REG_PUSH. */
2261 #define REG_PUSH_LENGTH 2
2262
2263 /* This is how to output an insn to pop a register from the stack. */
2264 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
2265 fprintf (FILE, "\tld\t %s,%s,0\n\taddu\t %s,%s,%d\n", \
2266 reg_names[REGNO], \
2267 reg_names[STACK_POINTER_REGNUM], \
2268 reg_names[STACK_POINTER_REGNUM], \
2269 reg_names[STACK_POINTER_REGNUM], \
2270 (STACK_BOUNDARY / BITS_PER_UNIT))
2271
2272 /* Length in instructions of the code output by ASM_OUTPUT_REG_POP. */
2273 #define REG_POP_LENGTH 2
2274
2275 /* Define the parentheses used to group arithmetic operations
2276 in assembler code. */
2277 #define ASM_OPEN_PAREN "("
2278 #define ASM_CLOSE_PAREN ")"
2279
2280 /* Define results of standard character escape sequences. */
2281 #define TARGET_BELL 007
2282 #define TARGET_BS 010
2283 #define TARGET_TAB 011
2284 #define TARGET_NEWLINE 012
2285 #define TARGET_VT 013
2286 #define TARGET_FF 014
2287 #define TARGET_CR 015
2288 \f
2289 /* Macros to deal with OCS debug information */
2290
2291 #define OCS_START_PREFIX "Ltb"
2292 #define OCS_END_PREFIX "Lte"
2293
2294 #define PUT_OCS_FUNCTION_START(FILE) \
2295 { ASM_OUTPUT_INTERNAL_LABEL (FILE, OCS_START_PREFIX, m88k_function_number); }
2296
2297 #define PUT_OCS_FUNCTION_END(FILE) \
2298 { ASM_OUTPUT_INTERNAL_LABEL (FILE, OCS_END_PREFIX, m88k_function_number); }
2299
2300 /* Macros for debug information */
2301 #define DEBUGGER_AUTO_OFFSET(X) \
2302 (m88k_debugger_offset (X, 0) \
2303 + (TARGET_OCS_FRAME_POSITION ? 0 : m88k_stack_size - m88k_fp_offset))
2304
2305 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
2306 (m88k_debugger_offset (X, OFFSET) \
2307 + (TARGET_OCS_FRAME_POSITION ? 0 : m88k_stack_size - m88k_fp_offset))
2308
2309 /* Macros to deal with SDB debug information */
2310 #ifdef SDB_DEBUGGING_INFO
2311
2312 /* Output structure tag names even when it causes a forward reference. */
2313 #define SDB_ALLOW_FORWARD_REFERENCES
2314
2315 /* Print out extra debug information in the assembler file */
2316 #define PUT_SDB_SCL(a) \
2317 do { \
2318 register int s = (a); \
2319 register char *scl; \
2320 switch (s) \
2321 { \
2322 case C_EFCN: scl = "end of function"; break; \
2323 case C_NULL: scl = "NULL storage class"; break; \
2324 case C_AUTO: scl = "automatic"; break; \
2325 case C_EXT: scl = "external"; break; \
2326 case C_STAT: scl = "static"; break; \
2327 case C_REG: scl = "register"; break; \
2328 case C_EXTDEF: scl = "external definition"; break; \
2329 case C_LABEL: scl = "label"; break; \
2330 case C_ULABEL: scl = "undefined label"; break; \
2331 case C_MOS: scl = "structure member"; break; \
2332 case C_ARG: scl = "argument"; break; \
2333 case C_STRTAG: scl = "structure tag"; break; \
2334 case C_MOU: scl = "union member"; break; \
2335 case C_UNTAG: scl = "union tag"; break; \
2336 case C_TPDEF: scl = "typedef"; break; \
2337 case C_USTATIC: scl = "uninitialized static"; break; \
2338 case C_ENTAG: scl = "enumeration tag"; break; \
2339 case C_MOE: scl = "member of enumeration"; break; \
2340 case C_REGPARM: scl = "register parameter"; break; \
2341 case C_FIELD: scl = "bit field"; break; \
2342 case C_BLOCK: scl = "block start/end"; break; \
2343 case C_FCN: scl = "function start/end"; break; \
2344 case C_EOS: scl = "end of structure"; break; \
2345 case C_FILE: scl = "filename"; break; \
2346 case C_LINE: scl = "line"; break; \
2347 case C_ALIAS: scl = "duplicated tag"; break; \
2348 case C_HIDDEN: scl = "hidden"; break; \
2349 default: scl = "unknown"; break; \
2350 } \
2351 \
2352 fprintf(asm_out_file, "\tscl\t %d\t\t\t\t; %s\n", s, scl); \
2353 } while (0)
2354
2355 #define PUT_SDB_TYPE(a) \
2356 do { \
2357 register int t = (a); \
2358 static char buffer[100]; \
2359 register char *p = buffer, *q; \
2360 register int typ = t; \
2361 register int i,d; \
2362 \
2363 for (i = 0; i <= 5; i++) \
2364 { \
2365 switch ((typ >> ((i*N_TSHIFT) + N_BTSHFT)) & 03) \
2366 { \
2367 case DT_PTR: \
2368 strcpy (p, "ptr to "); \
2369 p += sizeof("ptr to"); \
2370 break; \
2371 \
2372 case DT_ARY: \
2373 strcpy (p, "array of "); \
2374 p += sizeof("array of"); \
2375 break; \
2376 \
2377 case DT_FCN: \
2378 strcpy (p, "func ret "); \
2379 p += sizeof("func ret"); \
2380 break; \
2381 } \
2382 } \
2383 \
2384 switch (typ & N_BTMASK) \
2385 { \
2386 case T_NULL: q = "<no type>"; break; \
2387 case T_CHAR: q = "char"; break; \
2388 case T_SHORT: q = "short"; break; \
2389 case T_INT: q = "int"; break; \
2390 case T_LONG: q = "long"; break; \
2391 case T_FLOAT: q = "float"; break; \
2392 case T_DOUBLE: q = "double"; break; \
2393 case T_STRUCT: q = "struct"; break; \
2394 case T_UNION: q = "union"; break; \
2395 case T_ENUM: q = "enum"; break; \
2396 case T_MOE: q = "enum member"; break; \
2397 case T_UCHAR: q = "unsigned char"; break; \
2398 case T_USHORT: q = "unsigned short"; break; \
2399 case T_UINT: q = "unsigned int"; break; \
2400 case T_ULONG: q = "unsigned long"; break; \
2401 default: q = "void"; break; \
2402 } \
2403 \
2404 strcpy (p, q); \
2405 fprintf(asm_out_file, "\ttype\t %d\t\t\t\t; %s\n", \
2406 t, buffer); \
2407 } while (0)
2408
2409 #define PUT_SDB_INT_VAL(a) \
2410 fprintf (asm_out_file, "\tval\t %d\n", (a))
2411
2412 #define PUT_SDB_VAL(a) \
2413 ( fprintf (asm_out_file, "\tval\t "), \
2414 output_addr_const (asm_out_file, (a)), \
2415 fputc ('\n', asm_out_file))
2416
2417 #define PUT_SDB_DEF(a) \
2418 do { fprintf (asm_out_file, "\tsdef\t "); \
2419 ASM_OUTPUT_LABELREF (asm_out_file, a); \
2420 fputc ('\n', asm_out_file); \
2421 } while (0)
2422
2423 #define PUT_SDB_PLAIN_DEF(a) \
2424 fprintf(asm_out_file,"\tsdef\t .%s\n", a)
2425
2426 /* Simply and endef now. */
2427 #define PUT_SDB_ENDEF \
2428 fputs("\tendef\n\n", asm_out_file)
2429
2430 #define PUT_SDB_SIZE(a) \
2431 fprintf (asm_out_file, "\tsize\t %d\n", (a))
2432
2433 /* Max dimensions to store for debug information (limited by COFF). */
2434 #define SDB_MAX_DIM 6
2435
2436 /* New method for dim operations. */
2437 #define PUT_SDB_START_DIM \
2438 fputs("\tdim\t ", asm_out_file)
2439
2440 /* How to end the DIM sequence. */
2441 #define PUT_SDB_LAST_DIM(a) \
2442 fprintf(asm_out_file, "%d\n", a)
2443
2444 #define PUT_SDB_TAG(a) \
2445 do { \
2446 fprintf (asm_out_file, "\ttag\t "); \
2447 ASM_OUTPUT_LABELREF (asm_out_file, a); \
2448 fputc ('\n', asm_out_file); \
2449 } while( 0 )
2450
2451 #define PUT_SDB_BLOCK_OR_FUNCTION(NAME, SCL, LINE) \
2452 do { \
2453 fprintf (asm_out_file, "\n\tsdef\t %s\n\tval\t .\n", \
2454 NAME); \
2455 PUT_SDB_SCL( SCL ); \
2456 fprintf (asm_out_file, "\tline\t %d\n\tendef\n\n", \
2457 (LINE)); \
2458 } while (0)
2459
2460 #define PUT_SDB_BLOCK_START(LINE) \
2461 PUT_SDB_BLOCK_OR_FUNCTION (".bb", C_BLOCK, (LINE))
2462
2463 #define PUT_SDB_BLOCK_END(LINE) \
2464 PUT_SDB_BLOCK_OR_FUNCTION (".eb", C_BLOCK, (LINE))
2465
2466 #define PUT_SDB_FUNCTION_START(LINE) \
2467 do { \
2468 fprintf (asm_out_file, "\tln\t 1\n"); \
2469 PUT_SDB_BLOCK_OR_FUNCTION (".bf", C_FCN, (LINE)); \
2470 } while (0)
2471
2472 #define PUT_SDB_FUNCTION_END(LINE) \
2473 do { \
2474 PUT_SDB_BLOCK_OR_FUNCTION (".ef", C_FCN, (LINE)); \
2475 } while (0)
2476
2477 #define PUT_SDB_EPILOGUE_END(NAME) \
2478 do { \
2479 text_section (); \
2480 fprintf (asm_out_file, "\n\tsdef\t "); \
2481 ASM_OUTPUT_LABELREF(asm_out_file, (NAME)); \
2482 fputc('\n', asm_out_file); \
2483 PUT_SDB_SCL( C_EFCN ); \
2484 fprintf (asm_out_file, "\tendef\n\n"); \
2485 } while (0)
2486
2487 #define SDB_GENERATE_FAKE(BUFFER, NUMBER) \
2488 sprintf ((BUFFER), ".%dfake", (NUMBER));
2489
2490 #endif /* SDB_DEBUGGING_INFO */
2491 \f
2492 /* Support const and tdesc sections. Generally, a const section will
2493 be distinct from the text section whenever we do V.4-like things
2494 and so follows DECLARE_ASM_NAME. Note that strings go in text
2495 rather than const. Override svr[34].h. */
2496
2497 #undef USE_CONST_SECTION
2498 #undef EXTRA_SECTIONS
2499
2500 #define USE_CONST_SECTION DECLARE_ASM_NAME
2501
2502 #if defined(USING_SVR4_H)
2503
2504 #define EXTRA_SECTIONS in_const, in_tdesc, in_sdata, in_ctors, in_dtors
2505 #define INIT_SECTION_FUNCTION
2506 #define FINI_SECTION_FUNCTION
2507
2508 #else
2509 #if defined(USING_SVR3_H)
2510
2511 #define EXTRA_SECTIONS in_const, in_tdesc, in_sdata, in_ctors, in_dtors, \
2512 in_init, in_fini
2513
2514 #else /* luna or other not based on svr[34].h. */
2515
2516 #undef INIT_SECTION_ASM_OP
2517 #define EXTRA_SECTIONS in_const, in_tdesc, in_sdata
2518 #define CONST_SECTION_FUNCTION \
2519 void \
2520 const_section () \
2521 { \
2522 text_section(); \
2523 }
2524 #define CTORS_SECTION_FUNCTION
2525 #define DTORS_SECTION_FUNCTION
2526 #define INIT_SECTION_FUNCTION
2527 #define FINI_SECTION_FUNCTION
2528
2529 #endif /* USING_SVR3_H */
2530 #endif /* USING_SVR4_H */
2531
2532 #undef EXTRA_SECTION_FUNCTIONS
2533 #define EXTRA_SECTION_FUNCTIONS \
2534 CONST_SECTION_FUNCTION \
2535 \
2536 void \
2537 tdesc_section () \
2538 { \
2539 if (in_section != in_tdesc) \
2540 { \
2541 fprintf (asm_out_file, "%s\n", TDESC_SECTION_ASM_OP); \
2542 in_section = in_tdesc; \
2543 } \
2544 } \
2545 \
2546 void \
2547 sdata_section () \
2548 { \
2549 if (in_section != in_sdata) \
2550 { \
2551 fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \
2552 in_section = in_sdata; \
2553 } \
2554 } \
2555 \
2556 CTORS_SECTION_FUNCTION \
2557 DTORS_SECTION_FUNCTION \
2558 INIT_SECTION_FUNCTION \
2559 FINI_SECTION_FUNCTION
2560
2561 /* A C statement or statements to switch to the appropriate
2562 section for output of DECL. DECL is either a `VAR_DECL' node
2563 or a constant of some sort. RELOC indicates whether forming
2564 the initial value of DECL requires link-time relocations.
2565
2566 For strings, the section is selected before the segment info is encoded. */
2567 #undef SELECT_SECTION
2568 #define SELECT_SECTION(DECL,RELOC) \
2569 { \
2570 if (TREE_CODE (DECL) == STRING_CST) \
2571 { \
2572 if (! flag_writable_strings) \
2573 const_section (); \
2574 else if ( TREE_STRING_LENGTH (DECL) <= m88k_gp_threshold) \
2575 sdata_section (); \
2576 else \
2577 data_section (); \
2578 } \
2579 else if (TREE_CODE (DECL) == VAR_DECL) \
2580 { \
2581 if (SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0))) \
2582 sdata_section (); \
2583 else if ((flag_pic && RELOC) \
2584 || !TREE_READONLY (DECL) || TREE_SIDE_EFFECTS (DECL) \
2585 || !DECL_INITIAL (DECL) \
2586 || (DECL_INITIAL (DECL) != error_mark_node \
2587 && !TREE_CONSTANT (DECL_INITIAL (DECL)))) \
2588 data_section (); \
2589 else \
2590 const_section (); \
2591 } \
2592 else \
2593 const_section (); \
2594 }
2595
2596 /* Jump tables consist of branch instructions and should be output in
2597 the text section. When we use a table of addresses, we explicitly
2598 change to the readonly data section. */
2599 #define JUMP_TABLES_IN_TEXT_SECTION 1
2600
2601 /* Define this macro if references to a symbol must be treated differently
2602 depending on something about the variable or function named by the
2603 symbol (such as what section it is in).
2604
2605 The macro definition, if any, is executed immediately after the rtl for
2606 DECL has been created and stored in `DECL_RTL (DECL)'. The value of the
2607 rtl will be a `mem' whose address is a `symbol_ref'.
2608
2609 For the m88k, determine if the item should go in the global pool. */
2610 #define ENCODE_SECTION_INFO(DECL) \
2611 do { \
2612 if (m88k_gp_threshold > 0) \
2613 if (TREE_CODE (DECL) == VAR_DECL) \
2614 { \
2615 if (!TREE_READONLY (DECL) || TREE_SIDE_EFFECTS (DECL)) \
2616 { \
2617 int size = int_size_in_bytes (TREE_TYPE (DECL)); \
2618 \
2619 if (size > 0 && size <= m88k_gp_threshold) \
2620 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \
2621 } \
2622 } \
2623 else if (TREE_CODE (DECL) == STRING_CST \
2624 && flag_writable_strings \
2625 && TREE_STRING_LENGTH (DECL) <= m88k_gp_threshold) \
2626 SYMBOL_REF_FLAG (XEXP (TREE_CST_RTL (DECL), 0)) = 1; \
2627 } while (0)
2628 \f
2629 /* Print operand X (an rtx) in assembler syntax to file FILE.
2630 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2631 For `%' followed by punctuation, CODE is the punctuation and X is null. */
2632 #define PRINT_OPERAND_PUNCT_VALID_P(c) \
2633 ((c) == '#' || (c) == '.' || (c) == '!' || (c) == '*' || (c) == ';')
2634
2635 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
2636
2637 /* Print a memory address as an operand to reference that memory location. */
2638 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
2639
2640 /* This says not to strength reduce the addr calculations within loops
2641 (otherwise it does not take advantage of m88k scaled loads and stores */
2642
2643 #define DONT_REDUCE_ADDR