gcc/config/microblaze/microblaze.h

   1 /* Definitions of target machine for GNU compiler for Xilinx MicroBlaze.
   2    Copyright (C) 2009-2013 Free Software Foundation, Inc.
   3
   4    Contributed by Michael Eager <eager@eagercon.com>.
   5
   6    This file is part of GCC.
   7
   8    GCC is free software; you can redistribute it and/or modify it
   9    under the terms of the GNU General Public License as published
  10    by the Free Software Foundation; either version 3, or (at your
  11    option) any later version.
  12
  13    GCC is distributed in the hope that it will be useful, but WITHOUT
  14    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  16    License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with GCC; see the file COPYING3.  If not see
  20    <http://www.gnu.org/licenses/>.  */
  21
  22 /* Standard GCC variables that we reference.  */
  23
  24 /* MicroBlaze external variables defined in microblaze.c.  */
  25
  26 /* Which pipeline to schedule for.  */
  27 enum pipeline_type
  28 {
  29   MICROBLAZE_PIPE_3 = 0,
  30   MICROBLAZE_PIPE_5 = 1
  31 };
  32
  33 #define MICROBLAZE_MASK_NO_UNSAFE_DELAY         0x00000001
  34
  35 /* print_operand punctuation chars */
  36 extern char microblaze_print_operand_punct[];
  37
  38 /* # bytes of data/sdata cutoff */
  39 extern int microblaze_section_threshold;
  40
  41 /* Map register # to debug register # */
  42 extern int microblaze_dbx_regno[];
  43
  44 extern int microblaze_no_unsafe_delay;
  45 extern int microblaze_has_clz;
  46 extern enum pipeline_type microblaze_pipe;
  47
  48 #define OBJECT_FORMAT_ELF
  49
  50 #if TARGET_BIG_ENDIAN_DEFAULT
  51 #define TARGET_ENDIAN_DEFAULT    0
  52 #define TARGET_ENDIAN_OPTION     "mbig-endian"
  53 #else
  54 #define TARGET_ENDIAN_DEFAULT    MASK_LITTLE_ENDIAN
  55 #define TARGET_ENDIAN_OPTION     "mlittle-endian"
  56 #endif
  57
  58 /* Default target_flags if no switches are specified  */
  59 #define TARGET_DEFAULT      (MASK_SOFT_MUL | MASK_SOFT_DIV | MASK_SOFT_FLOAT \
  60                              | TARGET_ENDIAN_DEFAULT)
  61
  62 /* Do we have CLZ?  */
  63 #define TARGET_HAS_CLZ      (TARGET_PATTERN_COMPARE && microblaze_has_clz)
  64
  65 /* The default is to support PIC.  */
  66 #define TARGET_SUPPORTS_PIC 1
  67
  68 /* What is the default setting for -mcpu= . We set it to v4.00.a even though
  69    we are actually ahead. This is safest version that has generate code
  70    compatible for the original ISA */
  71 #define MICROBLAZE_DEFAULT_CPU      "v4.00.a"
  72
  73 /* Macros to decide whether certain features are available or not,
  74    depending on the instruction set architecture level.  */
  75
  76 #define DRIVER_SELF_SPECS                               \
  77         "%{mxl-soft-mul:%<mno-xl-soft-mul}",            \
  78         "%{mno-xl-barrel-shift:%<mxl-barrel-shift}",    \
  79         "%{mno-xl-pattern-compare:%<mxl-pattern-compare}", \
  80         "%{mxl-soft-div:%<mno-xl-soft-div}",            \
  81         "%{mxl-reorder:%<mno-xl-reorder}",              \
  82         "%{msoft-float:%<mhard-float}"
  83
  84 /* Tell collect what flags to pass to nm.  */
  85 #ifndef NM_FLAGS
  86 #define NM_FLAGS "-Bn"
  87 #endif
  88
  89 /* Names to predefine in the preprocessor for this target machine.  */
  90 #define TARGET_CPU_CPP_BUILTINS() microblaze_cpp_define (pfile)
  91
  92 /* Assembler specs.  */
  93
  94 #define TARGET_ASM_SPEC ""
  95
  96 #define ASM_SPEC "\
  97 %(target_asm_spec) \
  98 %{mbig-endian:-EB} \
  99 %{mlittle-endian:-EL}"
 100
 101 /* Extra switches sometimes passed to the linker.  */
 102 /* -xl-mode-xmdstub translated to -Zxl-mode-xmdstub -- deprecated.  */
 103
 104 #define LINK_SPEC "%{shared:-shared} -N -relax \
 105   %{mbig-endian:-EB --oformat=elf32-microblaze} \
 106   %{mlittle-endian:-EL --oformat=elf32-microblazeel} \
 107   %{Zxl-mode-xmdstub:-defsym _TEXT_START_ADDR=0x800} \
 108   %{mxl-mode-xmdstub:-defsym _TEXT_START_ADDR=0x800} \
 109   %{mxl-gp-opt:%{G*}} %{!mxl-gp-opt: -G 0} \
 110   %{!T*: -dT xilinx.ld%s}"
 111
 112 /* Specs for the compiler proper  */
 113
 114 #ifndef CC1_SPEC
 115 #define CC1_SPEC " \
 116 %{G*} \
 117 %(subtarget_cc1_spec) \
 118 %{mxl-multiply-high:-mcpu=v6.00.a} \
 119 "
 120 #endif
 121
 122 #define EXTRA_SPECS                                                     \
 123   { "target_asm_spec", TARGET_ASM_SPEC },                               \
 124   SUBTARGET_EXTRA_SPECS
 125
 126 /* Local compiler-generated symbols must have a prefix that the assembler
 127    understands.   */
 128
 129 #ifndef LOCAL_LABEL_PREFIX
 130 #define LOCAL_LABEL_PREFIX      "$"
 131 #endif
 132
 133 /* fixed registers.  */
 134 #define MB_ABI_BASE_REGNUM                   0
 135 #define MB_ABI_STACK_POINTER_REGNUM          1
 136 #define MB_ABI_GPRO_REGNUM                   2
 137 #define MB_ABI_GPRW_REGNUM                  13
 138 #define MB_ABI_INTR_RETURN_ADDR_REGNUM      14
 139 #define MB_ABI_SUB_RETURN_ADDR_REGNUM       15
 140 #define MB_ABI_DEBUG_RETURN_ADDR_REGNUM     16
 141 #define MB_ABI_EXCEPTION_RETURN_ADDR_REGNUM 17
 142 #define MB_ABI_ASM_TEMP_REGNUM              18
 143 /* This is our temp register.  */
 144 #define MB_ABI_FRAME_POINTER_REGNUM         19
 145 #define MB_ABI_PIC_ADDR_REGNUM              20
 146 #define MB_ABI_PIC_FUNC_REGNUM              21
 147 /* Volatile registers.  */
 148 #define MB_ABI_INT_RETURN_VAL_REGNUM         3
 149 #define MB_ABI_INT_RETURN_VAL2_REGNUM        4
 150 #define MB_ABI_FIRST_ARG_REGNUM              5
 151 #define MB_ABI_LAST_ARG_REGNUM              10
 152 #define MB_ABI_MAX_ARG_REGS                 (MB_ABI_LAST_ARG_REGNUM     \
 153                                              - MB_ABI_FIRST_ARG_REGNUM + 1)
 154 #define MB_ABI_STATIC_CHAIN_REGNUM           3
 155 #define MB_ABI_TEMP1_REGNUM                 11
 156 #define MB_ABI_TEMP2_REGNUM                 12
 157 #define MB_ABI_MSR_SAVE_REG                 11
 158 /* Volatile register used to save MSR in interrupt handlers.  */
 159
 160
 161 /* Debug stuff.  */
 162
 163 /* How to renumber registers for dbx and gdb.  */
 164 #define DBX_REGISTER_NUMBER(REGNO) microblaze_dbx_regno[(REGNO)]
 165
 166 /* Generate DWARF exception handling info.  */
 167 #define DWARF2_UNWIND_INFO 1
 168
 169 /* Don't generate .loc operations.  */
 170 #define DWARF2_ASM_LINE_DEBUG_INFO 0
 171
 172 /* The DWARF 2 CFA column which tracks the return address.  */
 173 #define DWARF_FRAME_RETURN_COLUMN \
 174         (GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM)
 175
 176 /* Initial state of return address on entry to func = R15.
 177    Actually, the RA is at R15+8, but gcc doesn't know how
 178    to generate this.
 179    NOTE:  GDB has a workaround and expects this incorrect value.
 180    If this is fixed, a corresponding fix to GDB is needed.  */
 181 #define INCOMING_RETURN_ADDR_RTX                        \
 182   gen_rtx_REG (VOIDmode, GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM)
 183
 184 /* Use DWARF 2 debugging information by default.  */
 185 #define DWARF2_DEBUGGING_INFO
 186 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
 187
 188 /* Target machine storage layout */
 189
 190 #define BITS_BIG_ENDIAN 0
 191 #define BYTES_BIG_ENDIAN (TARGET_LITTLE_ENDIAN == 0)
 192 #define WORDS_BIG_ENDIAN (BYTES_BIG_ENDIAN)
 193 #define BITS_PER_UNIT           8
 194 #define BITS_PER_WORD           32
 195 #define UNITS_PER_WORD          4
 196 #define MIN_UNITS_PER_WORD      4
 197 #define INT_TYPE_SIZE           32
 198 #define SHORT_TYPE_SIZE         16
 199 #define LONG_TYPE_SIZE          32
 200 #define LONG_LONG_TYPE_SIZE     64
 201 #define FLOAT_TYPE_SIZE         32
 202 #define DOUBLE_TYPE_SIZE        64
 203 #define LONG_DOUBLE_TYPE_SIZE   64
 204 #define POINTER_SIZE            32
 205 #define PARM_BOUNDARY           32
 206 #define FUNCTION_BOUNDARY       32
 207 #define EMPTY_FIELD_BOUNDARY    32
 208 #define STRUCTURE_SIZE_BOUNDARY 8
 209 #define BIGGEST_ALIGNMENT       32
 210 #define STRICT_ALIGNMENT        1
 211 #define PCC_BITFIELD_TYPE_MATTERS 1
 212
 213 #define CONSTANT_ALIGNMENT(EXP, ALIGN)                                  \
 214   ((TREE_CODE (EXP) == STRING_CST  || TREE_CODE (EXP) == CONSTRUCTOR)   \
 215    && (ALIGN) < BITS_PER_WORD                                           \
 216         ? BITS_PER_WORD                                                 \
 217         : (ALIGN))
 218
 219 #define DATA_ALIGNMENT(TYPE, ALIGN)                                     \
 220   ((((ALIGN) < BITS_PER_WORD)                                           \
 221     && (TREE_CODE (TYPE) == ARRAY_TYPE                                  \
 222         || TREE_CODE (TYPE) == UNION_TYPE                               \
 223         || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
 224
 225 #define LOCAL_ALIGNMENT(TYPE, ALIGN)                                    \
 226     (((TREE_CODE (TYPE) == ARRAY_TYPE                                   \
 227        && TYPE_MODE (TREE_TYPE (TYPE)) == QImode)                       \
 228      && (ALIGN) < BITS_PER_WORD) ? BITS_PER_WORD : (ALIGN))
 229
 230 #define WORD_REGISTER_OPERATIONS
 231
 232 #define LOAD_EXTEND_OP(MODE)  ZERO_EXTEND
 233
 234 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)     \
 235   if (GET_MODE_CLASS (MODE) == MODE_INT         \
 236       && GET_MODE_SIZE (MODE) < 4)              \
 237     (MODE) = SImode;
 238
 239 /* Standard register usage.  */
 240
 241 /* On the MicroBlaze, we have 32 integer registers */
 242
 243 #define FIRST_PSEUDO_REGISTER 36
 244
 245 #define FIXED_REGISTERS                                                 \
 246 {                                                                       \
 247   1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1,                       \
 248   1, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,                       \
 249   1, 1, 1, 1                                                            \
 250 }
 251
 252 #define CALL_USED_REGISTERS                                             \
 253 {                                                                       \
 254   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,                       \
 255   1, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,                       \
 256   1, 1, 1, 1                                                            \
 257 }
 258
 259 #define GP_REG_FIRST    0
 260 #define GP_REG_LAST     31
 261 #define GP_REG_NUM      (GP_REG_LAST - GP_REG_FIRST + 1)
 262 #define GP_DBX_FIRST    0
 263
 264 #define ST_REG          32
 265 #define AP_REG_NUM      33
 266 #define RAP_REG_NUM     34
 267 #define FRP_REG_NUM     35
 268
 269 #define GP_REG_P(REGNO) ((unsigned) ((REGNO) - GP_REG_FIRST) < GP_REG_NUM)
 270 #define ST_REG_P(REGNO) ((REGNO) == ST_REG)
 271
 272 #define HARD_REGNO_NREGS(REGNO, MODE)                                   \
 273         ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 274
 275 /* Value is 1 if hard register REGNO can hold a value of machine-mode
 276    MODE.  In 32 bit mode, require that DImode and DFmode be in even
 277    registers.  For DImode, this makes some of the insns easier to
 278    write, since you don't have to worry about a DImode value in
 279    registers 3 & 4, producing a result in 4 & 5.
 280
 281    To make the code simpler HARD_REGNO_MODE_OK now just references an
 282    array built in override_options.  Because machmodes.h is not yet
 283    included before this file is processed, the MODE bound can't be
 284    expressed here.  */
 285 extern char microblaze_hard_regno_mode_ok[][FIRST_PSEUDO_REGISTER];
 286 #define HARD_REGNO_MODE_OK(REGNO, MODE)                                 \
 287             microblaze_hard_regno_mode_ok[ (int)(MODE) ][ (REGNO)]
 288
 289 #define MODES_TIEABLE_P(MODE1, MODE2)                                   \
 290   ((GET_MODE_CLASS (MODE1) == MODE_FLOAT ||                             \
 291     GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT)                       \
 292    == (GET_MODE_CLASS (MODE2) == MODE_FLOAT ||                          \
 293        GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
 294
 295 #define STACK_POINTER_REGNUM   (GP_REG_FIRST + MB_ABI_STACK_POINTER_REGNUM)
 296
 297 #define STACK_POINTER_OFFSET   FIRST_PARM_OFFSET(FNDECL)
 298
 299 /* Base register for access to local variables of the function.  We
 300    pretend that the frame pointer is
 301    MB_ABI_INTR_RETURN_ADDR_REGNUM, and then eliminate it
 302    to HARD_FRAME_POINTER_REGNUM.  We can get away with this because
 303    rMB_ABI_INTR_RETUREN_ADDR_REGNUM is a fixed
 304    register(return address for interrupt), and will not be used for
 305    anything else.  */
 306
 307 #define FRAME_POINTER_REGNUM            FRP_REG_NUM
 308 #define HARD_FRAME_POINTER_REGNUM       \
 309         (GP_REG_FIRST + MB_ABI_FRAME_POINTER_REGNUM)
 310 #define ARG_POINTER_REGNUM              AP_REG_NUM
 311 #define RETURN_ADDRESS_POINTER_REGNUM   RAP_REG_NUM
 312 #define STATIC_CHAIN_REGNUM             \
 313         (GP_REG_FIRST + MB_ABI_STATIC_CHAIN_REGNUM)
 314
 315 /* registers used in prologue/epilogue code when the stack frame
 316    is larger than 32K bytes.  These registers must come from the
 317    scratch register set, and not used for passing and returning
 318    arguments and any other information used in the calling sequence
 319    (such as pic).  */
 320
 321 #define MICROBLAZE_TEMP1_REGNUM         \
 322         (GP_REG_FIRST + MB_ABI_TEMP1_REGNUM)
 323
 324 #define MICROBLAZE_TEMP2_REGNUM         \
 325         (GP_REG_FIRST + MB_ABI_TEMP2_REGNUM)
 326
 327 #define NO_FUNCTION_CSE                 1
 328
 329 #define PIC_OFFSET_TABLE_REGNUM         \
 330         (flag_pic ? (GP_REG_FIRST + MB_ABI_PIC_ADDR_REGNUM) : \
 331         INVALID_REGNUM)
 332
 333 enum reg_class
 334 {
 335   NO_REGS,                      /* no registers in set.  */
 336   GR_REGS,                      /* integer registers.  */
 337   ST_REGS,                      /* status register.  */
 338   ALL_REGS,                     /* all registers.  */
 339   LIM_REG_CLASSES               /* max value + 1.  */
 340 };
 341
 342 #define N_REG_CLASSES           (int) LIM_REG_CLASSES
 343
 344 #define GENERAL_REGS            GR_REGS
 345
 346 #define REG_CLASS_NAMES                                                 \
 347 {                                                                       \
 348   "NO_REGS",                                                            \
 349   "GR_REGS",                                                            \
 350   "ST_REGS",                                                            \
 351   "ALL_REGS"                                                            \
 352 }
 353
 354 #define REG_CLASS_CONTENTS                                              \
 355 {                                                                       \
 356   { 0x00000000, 0x00000000 },           /* no registers.  */            \
 357   { 0xffffffff, 0x00000000 },           /* integer registers.  */       \
 358   { 0x00000000, 0x00000001 },           /* status registers.  */        \
 359   { 0xffffffff, 0x0000000f }            /* all registers.  */           \
 360 }
 361
 362 extern enum reg_class microblaze_regno_to_class[];
 363
 364 #define REGNO_REG_CLASS(REGNO)          microblaze_regno_to_class[ (REGNO) ]
 365
 366 #define BASE_REG_CLASS                  GR_REGS
 367
 368 #define INDEX_REG_CLASS                 GR_REGS
 369
 370 #define GR_REG_CLASS_P(CLASS)           ((CLASS) == GR_REGS)
 371
 372 /* REGISTER AND CONSTANT CLASSES */
 373
 374 #define SMALL_INT(X) ((unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
 375 #define LARGE_INT(X) \
 376   (INTVAL (X) > 0 && UINTVAL (X) >= 0x80000000 && UINTVAL (X) <= 0xffffffff)
 377 #define PLT_ADDR_P(X) (GET_CODE (X) == UNSPEC && XINT (X,1) == UNSPEC_PLT)
 378 /* Test for a valid operand for a call instruction.
 379    Don't allow the arg pointer register or virtual regs
 380    since they may change into reg + const, which the patterns
 381    can't handle yet.  */
 382 #define CALL_INSN_OP(X) (CONSTANT_ADDRESS_P (X) \
 383                          || (GET_CODE (X) == REG && X != arg_pointer_rtx\
 384                              && ! (REGNO (X) >= FIRST_PSEUDO_REGISTER   \
 385                              && REGNO (X) <= LAST_VIRTUAL_REGISTER)))
 386
 387 /* True if VALUE is a signed 16-bit number.  */
 388 #define SMALL_OPERAND(VALUE)                                            \
 389   ((unsigned HOST_WIDE_INT) (VALUE) + 0x8000 < 0x10000)
 390
 391 /* Constant which cannot be loaded in one instruction.  */
 392 #define LARGE_OPERAND(VALUE)                                            \
 393   ((((VALUE) & ~0x0000ffff) != 0)                                       \
 394    && (((VALUE) & ~0x0000ffff) != ~0x0000ffff)                          \
 395    && (((VALUE) & 0x0000ffff) != 0                                      \
 396        || (((VALUE) & ~2147483647) != 0                                 \
 397            && ((VALUE) & ~2147483647) != ~2147483647)))
 398
 399 #define PREFERRED_RELOAD_CLASS(X,CLASS)                                 \
 400   ((CLASS) != ALL_REGS                                                  \
 401    ? (CLASS)                                                    \
 402    : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT                      \
 403        || GET_MODE_CLASS (GET_MODE (X)) == MODE_COMPLEX_FLOAT)          \
 404       ? (GR_REGS)                       \
 405       : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_INT                     \
 406           || GET_MODE (X) == VOIDmode)                                  \
 407          ? (GR_REGS) : (CLASS))))
 408
 409 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE)                   \
 410   (GET_MODE_CLASS (MODE) == MODE_INT)
 411
 412 /* Stack layout; function entry, exit and calling.  */
 413
 414 #define STACK_GROWS_DOWNWARD
 415
 416 /* Changed the starting frame offset to including the new link stuff */
 417 #define STARTING_FRAME_OFFSET                                           \
 418    (crtl->outgoing_args_size + FIRST_PARM_OFFSET(FNDECL))
 419
 420 /* The return address for the current frame is in r31 if this is a leaf
 421    function.  Otherwise, it is on the stack.  It is at a variable offset
 422    from sp/fp/ap, so we define a fake hard register rap which is a
 423    poiner to the return address on the stack.  This always gets eliminated
 424    during reload to be either the frame pointer or the stack pointer plus
 425    an offset.  */
 426
 427 #define RETURN_ADDR_RTX(count, frame)                   \
 428   microblaze_return_addr(count,frame)
 429
 430 extern struct microblaze_frame_info current_frame_info;
 431
 432 #define ELIMINABLE_REGS                                                 \
 433 {{ ARG_POINTER_REGNUM,   STACK_POINTER_REGNUM},                         \
 434  { ARG_POINTER_REGNUM,   GP_REG_FIRST + MB_ABI_FRAME_POINTER_REGNUM},   \
 435  { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM},                \
 436  { RETURN_ADDRESS_POINTER_REGNUM,                                       \
 437    GP_REG_FIRST + MB_ABI_FRAME_POINTER_REGNUM},                         \
 438  { RETURN_ADDRESS_POINTER_REGNUM,                                       \
 439    GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM},                       \
 440  { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},                         \
 441  { FRAME_POINTER_REGNUM, GP_REG_FIRST + MB_ABI_FRAME_POINTER_REGNUM}}
 442
 443 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)                     \
 444         (OFFSET) = microblaze_initial_elimination_offset ((FROM), (TO))
 445
 446 #define ACCUMULATE_OUTGOING_ARGS        1
 447
 448 #define FIRST_PARM_OFFSET(FNDECL)               (UNITS_PER_WORD)
 449
 450 #define ARG_POINTER_CFA_OFFSET(FNDECL)          0
 451
 452 #define REG_PARM_STACK_SPACE(FNDECL)            (MAX_ARGS_IN_REGISTERS * UNITS_PER_WORD)
 453
 454 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE)   1
 455
 456 #define STACK_BOUNDARY                          32
 457
 458 #define NUM_OF_ARGS                             6
 459
 460 #define GP_RETURN                               (GP_REG_FIRST + MB_ABI_INT_RETURN_VAL_REGNUM)
 461
 462 #define GP_ARG_FIRST                            (GP_REG_FIRST + MB_ABI_FIRST_ARG_REGNUM)
 463 #define GP_ARG_LAST                             (GP_REG_FIRST + MB_ABI_LAST_ARG_REGNUM)
 464
 465 #define MAX_ARGS_IN_REGISTERS                   MB_ABI_MAX_ARG_REGS
 466
 467 #define LIBCALL_VALUE(MODE)                                             \
 468   gen_rtx_REG (                                                         \
 469            ((GET_MODE_CLASS (MODE) != MODE_INT                          \
 470              || GET_MODE_SIZE (MODE) >= 4)                              \
 471             ? (MODE)                                                    \
 472             : SImode), GP_RETURN)
 473
 474 /* 1 if N is a possible register number for a function value.
 475    On the MicroBlaze, R2 R3 are the only register thus used.
 476    Currently, R2 are only implemented  here (C has no complex type)  */
 477
 478 #define FUNCTION_VALUE_REGNO_P(N)               ((N) == GP_RETURN)
 479
 480 #define FUNCTION_ARG_REGNO_P(N)                 (((N) >= GP_ARG_FIRST && (N) <= GP_ARG_LAST))
 481
 482 typedef struct microblaze_args
 483 {
 484   int gp_reg_found;             /* whether a gp register was found yet */
 485   int arg_number;               /* argument number */
 486   int arg_words;                /* # total words the arguments take */
 487   int fp_arg_words;             /* # words for FP args */
 488   int last_arg_fp;              /* nonzero if last arg was FP (EABI only) */
 489   int fp_code;                  /* Mode of FP arguments */
 490   int num_adjusts;              /* number of adjustments made */
 491   /* Adjustments made to args pass in regs.  */
 492   /* ??? The size is doubled to work around a bug in the code that sets the
 493      adjustments in function_arg.  */
 494   rtx adjust[MAX_ARGS_IN_REGISTERS * 2];
 495 } CUMULATIVE_ARGS;
 496
 497 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,FNDECL,N_NAMED_ARGS)    \
 498   init_cumulative_args (&CUM, FNTYPE, LIBNAME)
 499
 500 #define NO_PROFILE_COUNTERS                     1
 501
 502 #define FUNCTION_PROFILER(FILE, LABELNO) { \
 503   {                                        \
 504     fprintf (FILE, "\tbrki\tr16,_mcount\n");           \
 505   }                                                    \
 506  }
 507
 508 #define EXIT_IGNORE_STACK                       1
 509
 510 /* 4 insns + 2 words of data.  */
 511 #define TRAMPOLINE_SIZE                         (6 * 4)
 512
 513 #define TRAMPOLINE_ALIGNMENT                    32
 514
 515 #define REGNO_OK_FOR_BASE_P(regno)              microblaze_regno_ok_for_base_p ((regno), 1)
 516
 517 #define REGNO_OK_FOR_INDEX_P(regno)             microblaze_regno_ok_for_base_p ((regno), 1)
 518
 519 #ifndef REG_OK_STRICT
 520 #define REG_STRICT_FLAG                         0
 521 #else
 522 #define REG_STRICT_FLAG                         1
 523 #endif
 524
 525 #define REG_OK_FOR_BASE_P(X)    \
 526   microblaze_regno_ok_for_base_p (REGNO (X), REG_STRICT_FLAG)
 527
 528 #define REG_OK_FOR_INDEX_P(X)   \
 529   microblaze_regno_ok_for_base_p (REGNO (X), REG_STRICT_FLAG)
 530
 531 #define MAX_REGS_PER_ADDRESS 2
 532
 533
 534 /* Identify valid constant addresses.  Exclude if PIC addr which
 535    needs scratch register.  */
 536 #define CONSTANT_ADDRESS_P(X)                                           \
 537   (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF              \
 538     || GET_CODE (X) == CONST_INT                                        \
 539     || (GET_CODE (X) == CONST                                           \
 540         && ! (flag_pic && pic_address_needs_scratch (X))))
 541
 542 /* Define this, so that when PIC, reload won't try to reload invalid
 543    addresses which require two reload registers.  */
 544 #define LEGITIMATE_PIC_OPERAND_P(X)  microblaze_legitimate_pic_operand (X)
 545
 546 #define CASE_VECTOR_MODE                        (SImode)
 547
 548 #ifndef DEFAULT_SIGNED_CHAR
 549 #define DEFAULT_SIGNED_CHAR                     1
 550 #endif
 551
 552 #define MOVE_MAX                                4
 553 #define MAX_MOVE_MAX                            8
 554
 555 #define SLOW_BYTE_ACCESS                        1
 556
 557 /* sCOND operations return 1.  */
 558 #define STORE_FLAG_VALUE                        1
 559
 560 #define SHIFT_COUNT_TRUNCATED                   1
 561
 562 /* This results in inefficient code for 64 bit to 32 conversions.
 563    Something needs to be done about this.  Perhaps not use any 32 bit
 564    instructions?  Perhaps use PROMOTE_MODE?  */
 565 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC)  1
 566
 567 #define Pmode SImode
 568
 569 #define FUNCTION_MODE   SImode
 570
 571 /* Mode should always be SImode */
 572 #define REGISTER_MOVE_COST(MODE, FROM, TO)                      \
 573   ( GR_REG_CLASS_P (FROM) && GR_REG_CLASS_P (TO) ? 2            \
 574    : (FROM) == ST_REGS && GR_REG_CLASS_P (TO) ? 4               \
 575    : 12)
 576
 577 #define MEMORY_MOVE_COST(MODE,CLASS,TO_P) \
 578   (4 + memory_move_secondary_cost ((MODE), (CLASS), (TO_P)))
 579
 580 #define BRANCH_COST(speed_p, predictable_p)     2
 581
 582 /* Control the assembler format that we output.  */
 583 #define ASM_APP_ON " #APP\n"
 584 #define ASM_APP_OFF " #NO_APP\n"
 585
 586 #define REGISTER_NAMES {                                                \
 587   "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",         \
 588   "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",        \
 589   "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",        \
 590   "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",        \
 591   "rmsr", "$ap",  "$rap", "$frp" }
 592
 593 #define ADDITIONAL_REGISTER_NAMES                                       \
 594 {                                                                       \
 595   { "r0",        0 + GP_REG_FIRST },                                    \
 596   { "r1",        1 + GP_REG_FIRST },                                    \
 597   { "r2",        2 + GP_REG_FIRST },                                    \
 598   { "r3",        3 + GP_REG_FIRST },                                    \
 599   { "r4",        4 + GP_REG_FIRST },                                    \
 600   { "r5",        5 + GP_REG_FIRST },                                    \
 601   { "r6",        6 + GP_REG_FIRST },                                    \
 602   { "r7",        7 + GP_REG_FIRST },                                    \
 603   { "r8",        8 + GP_REG_FIRST },                                    \
 604   { "r9",        9 + GP_REG_FIRST },                                    \
 605   { "r10",      10 + GP_REG_FIRST },                                    \
 606   { "r11",      11 + GP_REG_FIRST },                                    \
 607   { "r12",      12 + GP_REG_FIRST },                                    \
 608   { "r13",      13 + GP_REG_FIRST },                                    \
 609   { "r14",      14 + GP_REG_FIRST },                                    \
 610   { "r15",      15 + GP_REG_FIRST },                                    \
 611   { "r16",      16 + GP_REG_FIRST },                                    \
 612   { "r17",      17 + GP_REG_FIRST },                                    \
 613   { "r18",      18 + GP_REG_FIRST },                                    \
 614   { "r19",      19 + GP_REG_FIRST },                                    \
 615   { "r20",      20 + GP_REG_FIRST },                                    \
 616   { "r21",      21 + GP_REG_FIRST },                                    \
 617   { "r22",      22 + GP_REG_FIRST },                                    \
 618   { "r23",      23 + GP_REG_FIRST },                                    \
 619   { "r24",      24 + GP_REG_FIRST },                                    \
 620   { "r25",      25 + GP_REG_FIRST },                                    \
 621   { "r26",      26 + GP_REG_FIRST },                                    \
 622   { "r27",      27 + GP_REG_FIRST },                                    \
 623   { "r28",      28 + GP_REG_FIRST },                                    \
 624   { "r29",      29 + GP_REG_FIRST },                                    \
 625   { "r30",      30 + GP_REG_FIRST },                                    \
 626   { "r31",      31 + GP_REG_FIRST },                                    \
 627   { "rmsr",     ST_REG}                                                 \
 628 }
 629
 630 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
 631
 632 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) microblaze_print_operand_punct[CODE]
 633
 634 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
 635
 636 /* ASM_OUTPUT_ALIGNED_COMMON and ASM_OUTPUT_ALIGNED_LOCAL
 637
 638    Unfortunately, we still need to set the section explicitly. Somehow,
 639    our binutils assign .comm and .lcomm variables to the "current" section
 640    in the assembly file, rather than where they implicitly belong. We need to
 641    remove this explicit setting in GCC when binutils can understand sections
 642    better.  */
 643 #undef  ASM_OUTPUT_ALIGNED_COMMON
 644 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN)              \
 645 do {                                                                    \
 646   if ((SIZE) > 0 && (SIZE) <= INT_MAX                                   \
 647       && (int) (SIZE) <= microblaze_section_threshold                   \
 648       && TARGET_XLGPOPT)                                                \
 649     {                                                                   \
 650       switch_to_section (sbss_section);                                 \
 651     }                                                                   \
 652   else                                                                  \
 653     {                                                                   \
 654       switch_to_section (bss_section);                                  \
 655     }                                                                   \
 656   fprintf (FILE, "%s", COMMON_ASM_OP);                                  \
 657   assemble_name ((FILE), (NAME));                                       \
 658   fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",%u\n",              \
 659            (SIZE), (ALIGN) / BITS_PER_UNIT);                            \
 660   ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object");                     \
 661 } while (0)
 662
 663 #undef ASM_OUTPUT_ALIGNED_LOCAL
 664 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN)               \
 665 do {                                                                    \
 666   if ((SIZE) > 0 && (SIZE) <= INT_MAX                                   \
 667       && (int) (SIZE) <= microblaze_section_threshold                   \
 668       && TARGET_XLGPOPT)                                                \
 669     {                                                                   \
 670       switch_to_section (sbss_section);                                 \
 671     }                                                                   \
 672   else                                                                  \
 673     {                                                                   \
 674       switch_to_section (bss_section);                                  \
 675     }                                                                   \
 676   fprintf (FILE, "%s", LCOMMON_ASM_OP);                                 \
 677   assemble_name ((FILE), (NAME));                                       \
 678   fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",%u\n",              \
 679            (SIZE), (ALIGN) / BITS_PER_UNIT);                            \
 680   ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object");                     \
 681 } while (0)
 682
 683 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN)           \
 684 do {                                                                    \
 685   ASM_OUTPUT_ALIGNED_LOCAL (FILE, NAME, SIZE, ALIGN);                   \
 686 } while (0)
 687
 688 #define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL)                     \
 689 {                                                                       \
 690 }
 691
 692 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM)                   \
 693   sprintf ((LABEL), "*%s%s%ld", (LOCAL_LABEL_PREFIX), (PREFIX), (long)(NUM))
 694
 695 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)                          \
 696   fprintf (STREAM, "\t%s\t%sL%d\n",                                     \
 697            ".gpword",                                                   \
 698            LOCAL_LABEL_PREFIX, VALUE)
 699
 700 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL)              \
 701 do {                                                                    \
 702   if (flag_pic == 2)                                               \
 703     fprintf (STREAM, "\t%s\t%sL%d@GOTOFF\n",                            \
 704              ".gpword",                                                 \
 705              LOCAL_LABEL_PREFIX, VALUE);                                \
 706   else                                                                  \
 707     fprintf (STREAM, "\t%s\t%sL%d\n",                                   \
 708              ".gpword",                                                 \
 709              LOCAL_LABEL_PREFIX, VALUE);                                \
 710 } while (0)
 711
 712 #define ASM_OUTPUT_ALIGN(STREAM,LOG)                                    \
 713   fprintf (STREAM, "\t.align\t%d\n", (LOG))
 714
 715 #define ASM_OUTPUT_SKIP(STREAM,SIZE)                                    \
 716   fprintf (STREAM, "\t.space\t%lu\n", (SIZE))
 717
 718 #define ASCII_DATA_ASM_OP               "\t.ascii\t"
 719 #define STRING_ASM_OP                   "\t.asciz\t"
 720
 721 #undef TARGET_ASM_OUTPUT_IDENT
 722 #define TARGET_ASM_OUTPUT_IDENT microblaze_asm_output_ident
 723
 724 /* Default to -G 8 */
 725 #ifndef MICROBLAZE_DEFAULT_GVALUE
 726 #define MICROBLAZE_DEFAULT_GVALUE 8
 727 #endif
 728
 729 /* Given a decl node or constant node, choose the section to output it in
 730    and select that section.  */
 731
 732 /* Store in OUTPUT a string (made with alloca) containing
 733    an assembler-name for a local static variable named NAME.
 734    LABELNO is an integer which is different for each call.  */
 735 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO)                  \
 736 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10),                    \
 737   sprintf ((OUTPUT), "%s.%lu", (NAME), (unsigned long)(LABELNO)))
 738
 739 /* How to start an assembler comment.
 740    The leading space is important (the microblaze assembler requires it).  */
 741 #ifndef ASM_COMMENT_START
 742 #define ASM_COMMENT_START               " #"
 743 #endif
 744
 745 #define BSS_VAR         1
 746 #define SBSS_VAR        2
 747 #define DATA_VAR        4
 748 #define SDATA_VAR       5
 749 #define RODATA_VAR      6
 750 #define SDATA2_VAR      7
 751
 752 /* These definitions are used in with the shift_type flag in the rtl.  */
 753 #define SHIFT_CONST     1
 754 #define SHIFT_REG       2
 755 #define USE_ADDK        3
 756
 757 /* Handle interrupt attribute.  */
 758 extern int interrupt_handler;
 759 extern int save_volatiles;
 760
 761 #define INTERRUPT_HANDLER_NAME "_interrupt_handler"
 762
 763 /* The following #defines are used in the headers files. Always retain these.  */
 764
 765 /* Added for declaring size at the end of the function.  */
 766 #undef ASM_DECLARE_FUNCTION_SIZE
 767 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL)                    \
 768   do {                                                                  \
 769     if (!flag_inhibit_size_directive)                                   \
 770       {                                                                 \
 771         char label[256];                                                \
 772         static int labelno;                                             \
 773         labelno++;                                                      \
 774         ASM_GENERATE_INTERNAL_LABEL (label, "Lfe", labelno);            \
 775         (*targetm.asm_out.internal_label) (FILE, "Lfe", labelno);       \
 776         fprintf (FILE, "%s", SIZE_ASM_OP);                              \
 777         assemble_name (FILE, (FNAME));                                  \
 778         fprintf (FILE, ",");                                            \
 779         assemble_name (FILE, label);                                    \
 780         fprintf (FILE, "-");                                            \
 781         assemble_name (FILE, (FNAME));                                  \
 782         putc ('\n', FILE);                                              \
 783       }                                                                 \
 784   } while (0)
 785
 786 #define GLOBAL_ASM_OP                   "\t.globl\t"
 787 #define TYPE_ASM_OP                     "\t.type\t"
 788 #define SIZE_ASM_OP                     "\t.size\t"
 789 #define COMMON_ASM_OP                   "\t.comm\t"
 790 #define LCOMMON_ASM_OP                  "\t.lcomm\t"
 791
 792 #define MAX_OFILE_ALIGNMENT             (32768*8)
 793
 794 #define TYPE_OPERAND_FMT                "@%s"
 795
 796 /* Write the extra assembler code needed to declare an object properly.  */
 797 #undef ASM_DECLARE_OBJECT_NAME
 798 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL)                       \
 799   do {                                                                  \
 800     fprintf (FILE, "%s", TYPE_ASM_OP);                                  \
 801     assemble_name (FILE, NAME);                                         \
 802     putc (',', FILE);                                                   \
 803     fprintf (FILE, TYPE_OPERAND_FMT, "object");                         \
 804     putc ('\n', FILE);                                                  \
 805     size_directive_output = 0;                                          \
 806     if (!flag_inhibit_size_directive && DECL_SIZE (DECL))               \
 807       {                                                                 \
 808         size_directive_output = 1;                                      \
 809         fprintf (FILE, "%s", SIZE_ASM_OP);                              \
 810         assemble_name (FILE, NAME);                                     \
 811         fprintf (FILE, "," HOST_WIDE_INT_PRINT_DEC "\n",                \
 812         int_size_in_bytes (TREE_TYPE (DECL)));                          \
 813       }                                                                 \
 814     microblaze_declare_object (FILE, NAME, "", ":\n", 0);                       \
 815   } while (0)
 816
 817 #undef ASM_FINISH_DECLARE_OBJECT
 818 #define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END)         \
 819 do {                                                                     \
 820      const char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0);             \
 821      if (!flag_inhibit_size_directive && DECL_SIZE (DECL)                \
 822          && ! AT_END && TOP_LEVEL                                        \
 823          && DECL_INITIAL (DECL) == error_mark_node                       \
 824          && !size_directive_output)                                      \
 825        {                                                                 \
 826          size_directive_output = 1;                                      \
 827          fprintf (FILE, "%s", SIZE_ASM_OP);                              \
 828          assemble_name (FILE, name);                                     \
 829          fprintf (FILE, "," HOST_WIDE_INT_PRINT_DEC "\n",                \
 830                   int_size_in_bytes (TREE_TYPE (DECL)));                 \
 831        }                                                                 \
 832    } while (0)
 833
 834 #define ASM_OUTPUT_DEF(FILE,LABEL1,LABEL2)                            \
 835  do { fputc ( '\t', FILE);                                            \
 836       assemble_name (FILE, LABEL1);                                   \
 837       fputs ( " = ", FILE);                                           \
 838       assemble_name (FILE, LABEL2);                                   \
 839       fputc ( '\n', FILE);                                            \
 840  } while (0)
 841
 842 #define ASM_WEAKEN_LABEL(FILE,NAME)                                     \
 843  do { fputs ("\t.weakext\t", FILE);                                     \
 844       assemble_name (FILE, NAME);                                       \
 845       fputc ('\n', FILE);                                               \
 846     } while (0)
 847
 848 #define MAKE_DECL_ONE_ONLY(DECL)        (DECL_WEAK (DECL) = 1)
 849 #undef UNIQUE_SECTION_P
 850 #define UNIQUE_SECTION_P(DECL)          (DECL_ONE_ONLY (DECL))
 851
 852 #undef TARGET_ASM_NAMED_SECTION
 853 #define TARGET_ASM_NAMED_SECTION        default_elf_asm_named_section
 854
 855 /* Define the strings to put out for each section in the object file.
 856
 857    Note: For ctors/dtors, we want to give these sections the SHF_WRITE
 858    attribute to allow shared libraries to patch/resolve addresses into
 859    these locations.  On Microblaze, there is no concept of shared libraries
 860    yet, so this is for future use.  */
 861 #define TEXT_SECTION_ASM_OP     "\t.text"
 862 #define DATA_SECTION_ASM_OP     "\t.data"
 863 #define READONLY_DATA_SECTION_ASM_OP    \
 864                                 "\t.rodata"
 865 #define BSS_SECTION_ASM_OP      "\t.bss"
 866 #define CTORS_SECTION_ASM_OP    "\t.section\t.ctors,\"aw\""
 867 #define DTORS_SECTION_ASM_OP    "\t.section\t.dtors,\"aw\""
 868 #define INIT_SECTION_ASM_OP     "\t.section\t.init,\"ax\""
 869 #define FINI_SECTION_ASM_OP     "\t.section\t.fini,\"ax\""
 870
 871 #define SDATA_SECTION_ASM_OP    "\t.sdata"      /* Small RW initialized data   */
 872 #define SDATA2_SECTION_ASM_OP   "\t.sdata2"     /* Small RO initialized data   */
 873 #define SBSS_SECTION_ASM_OP     "\t.sbss"       /* Small RW uninitialized data */
 874 #define SBSS2_SECTION_ASM_OP    "\t.sbss2"      /* Small RO uninitialized data */
 875
 876 /* We do this to save a few 10s of code space that would be taken up
 877    by the call_FUNC () wrappers, used by the generic CRT_CALL_STATIC_FUNCTION
 878    definition in crtstuff.c.  */
 879 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC)      \
 880     asm ( SECTION_OP "\n"                               \
 881           "\tbrlid   r15, " #FUNC "\n\t nop\n"         \
 882           TEXT_SECTION_ASM_OP);
 883
 884 /* We need to group -lm as well, since some Newlib math functions
 885    reference __errno!  */
 886 #undef LIB_SPEC
 887 #define LIB_SPEC \
 888 "%{!nostdlib: \
 889 %{pg:-start-group -lxilprofile -lgloss -lxil -lc -lm -end-group } \
 890 %{!pg:-start-group -lgloss -lxil -lc -lm -end-group }} "
 891
 892 #undef  ENDFILE_SPEC
 893 #define ENDFILE_SPEC "crtend.o%s crtn.o%s"
 894
 895 #define STARTFILE_EXECUTABLE_SPEC   "crt0.o%s crti.o%s crtbegin.o%s"
 896 #define STARTFILE_XMDSTUB_SPEC      "crt1.o%s crti.o%s crtbegin.o%s"
 897 #define STARTFILE_BOOTSTRAP_SPEC    "crt2.o%s crti.o%s crtbegin.o%s"
 898 #define STARTFILE_NOVECTORS_SPEC    "crt3.o%s crti.o%s crtbegin.o%s"
 899 #define STARTFILE_CRTINIT_SPEC      "%{!pg: %{!mno-clearbss: crtinit.o%s} \
 900 %{mno-clearbss: sim-crtinit.o%s}} \
 901 %{pg: %{!mno-clearbss: pgcrtinit.o%s} %{mno-clearbss: sim-pgcrtinit.o%s}}"
 902
 903 #define STARTFILE_DEFAULT_SPEC      STARTFILE_EXECUTABLE_SPEC
 904
 905 #undef SUBTARGET_EXTRA_SPECS
 906 #define SUBTARGET_EXTRA_SPECS                                           \
 907   { "startfile_executable",     STARTFILE_EXECUTABLE_SPEC },            \
 908   { "startfile_xmdstub",        STARTFILE_XMDSTUB_SPEC },               \
 909   { "startfile_bootstrap",      STARTFILE_BOOTSTRAP_SPEC },             \
 910   { "startfile_novectors",      STARTFILE_NOVECTORS_SPEC },             \
 911   { "startfile_crtinit",        STARTFILE_CRTINIT_SPEC },               \
 912   { "startfile_default",        STARTFILE_DEFAULT_SPEC },
 913
 914 #undef  STARTFILE_SPEC
 915 #define STARTFILE_SPEC  "\
 916 %{Zxl-mode-executable   : %(startfile_executable)  ; \
 917   mxl-mode-executable   : %(startfile_executable)  ; \
 918   Zxl-mode-xmdstub      : %(startfile_xmdstub)     ; \
 919   mxl-mode-xmdstub      : %(startfile_xmdstub)     ; \
 920   Zxl-mode-bootstrap    : %(startfile_bootstrap)   ; \
 921   mxl-mode-bootstrap    : %(startfile_bootstrap)   ; \
 922   Zxl-mode-novectors    : %(startfile_novectors)   ; \
 923   mxl-mode-novectors    : %(startfile_novectors)   ; \
 924   Zxl-mode-xilkernel    : %(startfile_xilkernel)   ; \
 925   mxl-mode-xilkernel    : %(startfile_xilkernel)   ; \
 926                         : %(startfile_default)       \
 927 } \
 928 %(startfile_crtinit)"