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1 /* Definitions of target machine for GNU compiler. Matsushita MN10300 series
2 Copyright (C) 1996, 1997 Free Software Foundation, Inc.
3 Contributed by Jeff Law (law@cygnus.com).
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
31 /* Names to predefine in the preprocessor for this target machine. */
33 #define CPP_PREDEFINES "-D__mn10300__ -D__MN10300__"
35 /* Run-time compilation parameters selecting different hardware subsets. */
37 extern int target_flags
;
39 /* Global registers known to hold the value zero. */
40 extern struct rtx_def
*zero_dreg
;
41 extern struct rtx_def
*zero_areg
;
43 /* Macros used in the machine description to test the flags. */
45 /* Macro to define tables used to set the flags.
46 This is a list in braces of pairs in braces,
47 each pair being { "NAME", VALUE }
48 where VALUE is the bits to set or minus the bits to clear.
49 An empty string NAME is used to identify the default VALUE. */
51 /* Generate code to work around mul/mulq bugs on the mn10300. */
52 #define TARGET_MULT_BUG (target_flags & 0x1)
53 #define TARGET_SWITCHES \
54 {{ "mult-bug", 0x1}, \
55 { "no-mult-bug", -0x1}, \
56 { "", TARGET_DEFAULT}}
58 #ifndef TARGET_DEFAULT
59 #define TARGET_DEFAULT 0x1
62 /* Print subsidiary information on the compiler version in use. */
64 #define TARGET_VERSION fprintf (stderr, " (MN10300)");
67 /* Target machine storage layout */
69 /* Define this if most significant bit is lowest numbered
70 in instructions that operate on numbered bit-fields.
71 This is not true on the Matsushita MN1003. */
72 #define BITS_BIG_ENDIAN 0
74 /* Define this if most significant byte of a word is the lowest numbered. */
75 /* This is not true on the Matsushita MN10300. */
76 #define BYTES_BIG_ENDIAN 0
78 /* Define this if most significant word of a multiword number is lowest
80 This is not true on the Matsushita MN10300. */
81 #define WORDS_BIG_ENDIAN 0
83 /* Number of bits in an addressable storage unit */
84 #define BITS_PER_UNIT 8
86 /* Width in bits of a "word", which is the contents of a machine register.
87 Note that this is not necessarily the width of data type `int';
88 if using 16-bit ints on a 68000, this would still be 32.
89 But on a machine with 16-bit registers, this would be 16. */
90 #define BITS_PER_WORD 32
92 /* Width of a word, in units (bytes). */
93 #define UNITS_PER_WORD 4
95 /* Width in bits of a pointer.
96 See also the macro `Pmode' defined below. */
97 #define POINTER_SIZE 32
99 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
100 #define PARM_BOUNDARY 32
102 /* The stack goes in 32 bit lumps. */
103 #define STACK_BOUNDARY 32
105 /* Allocation boundary (in *bits*) for the code of a function.
106 8 is the minimum boundary; it's unclear if bigger alignments
107 would improve performance. */
108 #define FUNCTION_BOUNDARY 8
110 /* No data type wants to be aligned rounder than this. */
111 #define BIGGEST_ALIGNMENT 32
113 /* Alignment of field after `int : 0' in a structure. */
114 #define EMPTY_FIELD_BOUNDARY 32
116 /* Define this if move instructions will actually fail to work
117 when given unaligned data. */
118 #define STRICT_ALIGNMENT 1
120 /* Define this as 1 if `char' should by default be signed; else as 0. */
121 #define DEFAULT_SIGNED_CHAR 0
123 /* Define results of standard character escape sequences. */
124 #define TARGET_BELL 007
125 #define TARGET_BS 010
126 #define TARGET_TAB 011
127 #define TARGET_NEWLINE 012
128 #define TARGET_VT 013
129 #define TARGET_FF 014
130 #define TARGET_CR 015
132 /* Standard register usage. */
134 /* Number of actual hardware registers.
135 The hardware registers are assigned numbers for the compiler
136 from 0 to just below FIRST_PSEUDO_REGISTER.
138 All registers that the compiler knows about must be given numbers,
139 even those that are not normally considered general registers. */
141 #define FIRST_PSEUDO_REGISTER 10
143 /* 1 for registers that have pervasive standard uses
144 and are not available for the register allocator. */
146 #define FIXED_REGISTERS \
147 { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1}
149 /* 1 for registers not available across function calls.
150 These must include the FIXED_REGISTERS and also any
151 registers that can be used without being saved.
152 The latter must include the registers where values are returned
153 and the register where structure-value addresses are passed.
154 Aside from that, you can include as many other registers as you
157 #define CALL_USED_REGISTERS \
158 { 1, 1, 0, 0, 1, 1, 0, 0, 1, 1}
160 #define REG_ALLOC_ORDER \
161 { 0, 1, 4, 5, 2, 3, 6, 7, 8, 9}
163 /* Return number of consecutive hard regs needed starting at reg REGNO
164 to hold something of mode MODE.
166 This is ordinarily the length in words of a value of mode MODE
167 but can be less for certain modes in special long registers. */
169 #define HARD_REGNO_NREGS(REGNO, MODE) \
170 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
172 /* Value is 1 if hard register REGNO can hold a value of machine-mode
175 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
176 (REGNO_REG_CLASS (REGNO) == DATA_REGS \
177 ? ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) <= 4 \
178 : ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) == 4)
180 /* Value is 1 if it is a good idea to tie two pseudo registers
181 when one has mode MODE1 and one has mode MODE2.
182 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
183 for any hard reg, then this must be 0 for correct output. */
184 #define MODES_TIEABLE_P(MODE1, MODE2) \
185 (MODE1 == MODE2 || GET_MODE_SIZE (MODE1) <= 4 && GET_MODE_SIZE (MODE2) <= 4)
187 /* 4 data, and effectively 3 address registers is small as far as I'm
189 #define SMALL_REGISTER_CLASSES 1
191 /* Define the classes of registers for register constraints in the
192 machine description. Also define ranges of constants.
194 One of the classes must always be named ALL_REGS and include all hard regs.
195 If there is more than one class, another class must be named NO_REGS
196 and contain no registers.
198 The name GENERAL_REGS must be the name of a class (or an alias for
199 another name such as ALL_REGS). This is the class of registers
200 that is allowed by "g" or "r" in a register constraint.
201 Also, registers outside this class are allocated only when
202 instructions express preferences for them.
204 The classes must be numbered in nondecreasing order; that is,
205 a larger-numbered class must never be contained completely
206 in a smaller-numbered class.
208 For any two classes, it is very desirable that there be another
209 class that represents their union. */
212 NO_REGS
, DATA_REGS
, ADDRESS_REGS
, SP_REGS
, DATA_OR_ADDRESS_REGS
, SP_OR_ADDRESS_REGS
, GENERAL_REGS
, ALL_REGS
, LIM_REG_CLASSES
215 #define N_REG_CLASSES (int) LIM_REG_CLASSES
217 /* Give names of register classes as strings for dump file. */
219 #define REG_CLASS_NAMES \
220 { "NO_REGS", "DATA_REGS", "ADDRESS_REGS", \
221 "SP_REGS", "DATA_OR_ADDRESS_REGS", "SP_OR_ADDRESS_REGS", \
222 "GENERAL_REGS", "ALL_REGS", "LIM_REGS" }
224 /* Define which registers fit in which classes.
225 This is an initializer for a vector of HARD_REG_SET
226 of length N_REG_CLASSES. */
228 #define REG_CLASS_CONTENTS \
230 0x00f, /* DATA_REGS */ \
231 0x1f0, /* ADDRESS_REGS */ \
232 0x200, /* SP_REGS */ \
233 0x1ff, /* DATA_OR_ADDRESS_REGS */\
234 0x1f0, /* SP_OR_ADDRESS_REGS */\
235 0x1ff, /* GENERAL_REGS */ \
236 0x3ff, /* ALL_REGS */ \
239 /* The same information, inverted:
240 Return the class number of the smallest class containing
241 reg number REGNO. This could be a conditional expression
242 or could index an array. */
244 #define REGNO_REG_CLASS(REGNO) \
245 ((REGNO) < 4 ? DATA_REGS : \
246 (REGNO) < 9 ? ADDRESS_REGS : \
247 (REGNO) == 9 ? SP_REGS: 0)
249 /* The class value for index registers, and the one for base regs. */
251 #define INDEX_REG_CLASS DATA_REGS
252 #define BASE_REG_CLASS SP_OR_ADDRESS_REGS
254 /* Get reg_class from a letter such as appears in the machine description. */
256 #define REG_CLASS_FROM_LETTER(C) \
257 ((C) == 'd' ? DATA_REGS : \
258 (C) == 'a' ? ADDRESS_REGS : \
259 (C) == 'x' ? SP_REGS : NO_REGS)
261 /* Macros to check register numbers against specific register classes. */
263 /* These assume that REGNO is a hard or pseudo reg number.
264 They give nonzero only if REGNO is a hard reg of the suitable class
265 or a pseudo reg currently allocated to a suitable hard reg.
266 Since they use reg_renumber, they are safe only once reg_renumber
267 has been allocated, which happens in local-alloc.c. */
269 #define REGNO_OK_FOR_BASE_P(regno) \
270 (((regno) > 3 && regno < FIRST_PSEUDO_REGISTER) \
271 || (reg_renumber[regno] > 3 && reg_renumber[regno] < FIRST_PSEUDO_REGISTER))
273 #define REGNO_OK_FOR_INDEX_P(regno) \
274 (((regno) >= 0 && regno < 4) \
275 || (reg_renumber[regno] >= 0 && reg_renumber[regno] < 4))
278 /* Given an rtx X being reloaded into a reg required to be
279 in class CLASS, return the class of reg to actually use.
280 In general this is just CLASS; but on some machines
281 in some cases it is preferable to use a more restrictive class. */
283 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
284 (X == stack_pointer_rtx && CLASS != SP_REGS ? ADDRESS_REGS : CLASS)
286 #define PREFERRED_OUTPUT_RELOAD_CLASS(X,CLASS) \
287 (X == stack_pointer_rtx && CLASS != SP_REGS ? ADDRESS_REGS : CLASS)
289 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
290 ((MODE == QImode || MODE == HImode) ? DATA_REGS : CLASS)
292 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
293 secondary_reload_class(CLASS,MODE,IN)
295 /* Return the maximum number of consecutive registers
296 needed to represent mode MODE in a register of class CLASS. */
298 #define CLASS_MAX_NREGS(CLASS, MODE) \
299 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
301 /* The letters I, J, K, L, M, N, O, P in a register constraint string
302 can be used to stand for particular ranges of immediate operands.
303 This macro defines what the ranges are.
304 C is the letter, and VALUE is a constant value.
305 Return 1 if VALUE is in the range specified by C. */
307 #define INT_8_BITS(VALUE) ((unsigned) (VALUE) + 0x80 < 0x100)
308 #define INT_16_BITS(VALUE) ((unsigned) (VALUE) + 0x8000 < 0x10000)
310 #define CONST_OK_FOR_I(VALUE) ((VALUE) == 0)
311 #define CONST_OK_FOR_J(VALUE) ((VALUE) == 1)
312 #define CONST_OK_FOR_K(VALUE) ((VALUE) == 2)
313 #define CONST_OK_FOR_L(VALUE) ((VALUE) == 4)
314 #define CONST_OK_FOR_M(VALUE) ((VALUE) == 3)
315 #define CONST_OK_FOR_N(VALUE) ((VALUE) == 255 || (VALUE) == 65535)
317 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
318 ((C) == 'I' ? CONST_OK_FOR_I (VALUE) : \
319 (C) == 'J' ? CONST_OK_FOR_J (VALUE) : \
320 (C) == 'K' ? CONST_OK_FOR_K (VALUE) : \
321 (C) == 'L' ? CONST_OK_FOR_L (VALUE) : \
322 (C) == 'M' ? CONST_OK_FOR_M (VALUE) : \
323 (C) == 'N' ? CONST_OK_FOR_N (VALUE) : 0)
326 /* Similar, but for floating constants, and defining letters G and H.
327 Here VALUE is the CONST_DOUBLE rtx itself.
329 `G' is a floating-point zero. */
331 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
332 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
333 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) : 0)
336 /* Stack layout; function entry, exit and calling. */
338 /* Define this if pushing a word on the stack
339 makes the stack pointer a smaller address. */
341 #define STACK_GROWS_DOWNWARD
343 /* Define this if the nominal address of the stack frame
344 is at the high-address end of the local variables;
345 that is, each additional local variable allocated
346 goes at a more negative offset in the frame. */
348 #define FRAME_GROWS_DOWNWARD
350 /* Offset within stack frame to start allocating local variables at.
351 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
352 first local allocated. Otherwise, it is the offset to the BEGINNING
353 of the first local allocated. */
355 #define STARTING_FRAME_OFFSET 0
357 /* Offset of first parameter from the argument pointer register value. */
358 /* Is equal to the size of the saved fp + pc, even if an fp isn't
359 saved since the value is used before we know. */
361 #define FIRST_PARM_OFFSET(FNDECL) 4
363 /* Specify the registers used for certain standard purposes.
364 The values of these macros are register numbers. */
366 /* Register to use for pushing function arguments. */
367 #define STACK_POINTER_REGNUM 9
369 /* Base register for access to local variables of the function. */
370 #define FRAME_POINTER_REGNUM 7
372 /* Base register for access to arguments of the function. This
373 is a fake register and will be eliminated into either the frame
374 pointer or stack pointer. */
375 #define ARG_POINTER_REGNUM 8
377 /* Register in which static-chain is passed to a function. */
378 #define STATIC_CHAIN_REGNUM 5
380 #define ELIMINABLE_REGS \
381 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
382 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
383 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
385 #define CAN_ELIMINATE(FROM, TO) 1
387 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
388 OFFSET = initial_offset (FROM, TO)
390 /* We can debug without frame pointers on the mn10300, so eliminate
391 them whenever possible. */
392 #define FRAME_POINTER_REQUIRED 0
393 #define CAN_DEBUG_WITHOUT_FP
395 /* A guess for the MN10300. */
396 #define PROMOTE_PROTOTYPES 1
398 /* Value is the number of bytes of arguments automatically
399 popped when returning from a subroutine call.
400 FUNDECL is the declaration node of the function (as a tree),
401 FUNTYPE is the data type of the function (as a tree),
402 or for a library call it is an identifier node for the subroutine name.
403 SIZE is the number of bytes of arguments passed on the stack. */
405 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
407 /* We use d0/d1 for passing parameters, so allocate 8 bytes of space
408 for a register flushback area. */
409 #define REG_PARM_STACK_SPACE(DECL) 8
410 #define OUTGOING_REG_PARM_STACK_SPACE
411 #define ACCUMULATE_OUTGOING_ARGS
413 /* So we can allocate space for return pointers once for the function
414 instead of around every call. */
415 #define STACK_POINTER_OFFSET 4
417 /* 1 if N is a possible register number for function argument passing.
418 On the MN10300, no registers are used in this way. */
420 #define FUNCTION_ARG_REGNO_P(N) ((N) <= 1)
423 /* Define a data type for recording info about an argument list
424 during the scan of that argument list. This data type should
425 hold all necessary information about the function itself
426 and about the args processed so far, enough to enable macros
427 such as FUNCTION_ARG to determine where the next arg should go.
429 On the MN10300, this is a single integer, which is a number of bytes
430 of arguments scanned so far. */
432 #define CUMULATIVE_ARGS struct cum_arg
433 struct cum_arg
{int nbytes
; };
435 /* Initialize a variable CUM of type CUMULATIVE_ARGS
436 for a call to a function whose data type is FNTYPE.
437 For a library call, FNTYPE is 0.
439 On the MN10300, the offset starts at 0. */
441 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
444 /* Update the data in CUM to advance over an argument
445 of mode MODE and data type TYPE.
446 (TYPE is null for libcalls where that information may not be available.) */
448 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
449 ((CUM).nbytes += ((MODE) != BLKmode \
450 ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
451 : (int_size_in_bytes (TYPE) + 3) & ~3))
453 /* Define where to put the arguments to a function.
454 Value is zero to push the argument on the stack,
455 or a hard register in which to store the argument.
457 MODE is the argument's machine mode.
458 TYPE is the data type of the argument (as a tree).
459 This is null for libcalls where that information may
461 CUM is a variable of type CUMULATIVE_ARGS which gives info about
462 the preceding args and about the function being called.
463 NAMED is nonzero if this argument is a named parameter
464 (otherwise it is an extra parameter matching an ellipsis). */
466 /* On the MN10300 all args are pushed. */
468 extern struct rtx_def
*function_arg ();
469 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
470 function_arg (&CUM, MODE, TYPE, NAMED)
472 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
473 function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)
476 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
477 ((TYPE) && int_size_in_bytes (TYPE) > 8)
479 #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \
480 ((TYPE) && int_size_in_bytes (TYPE) > 8)
482 /* Define how to find the value returned by a function.
483 VALTYPE is the data type of the value (as a tree).
484 If the precise function being called is known, FUNC is its FUNCTION_DECL;
485 otherwise, FUNC is 0. */
487 #define FUNCTION_VALUE(VALTYPE, FUNC) \
488 gen_rtx (REG, TYPE_MODE (VALTYPE), POINTER_TYPE_P (VALTYPE) ? 4 : 0)
490 /* Define how to find the value returned by a library function
491 assuming the value has mode MODE. */
493 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0)
495 /* 1 if N is a possible register number for a function value. */
497 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0 || (N) == 4)
499 /* Return values > 8 bytes in length in memory. */
500 #define DEFAULT_PCC_STRUCT_RETURN 0
501 #define RETURN_IN_MEMORY(TYPE) \
502 (int_size_in_bytes (TYPE) > 8 || TYPE_MODE (TYPE) == BLKmode)
504 /* Register in which address to store a structure value
505 is passed to a function. On the MN10300 it's passed as
506 the first parameter. */
508 #define STRUCT_VALUE 0
510 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
511 the stack pointer does not matter. The value is tested only in
512 functions that have frame pointers.
513 No definition is equivalent to always zero. */
515 #define EXIT_IGNORE_STACK 1
517 /* Output assembler code to FILE to increment profiler label # LABELNO
518 for profiling a function entry. */
520 #define FUNCTION_PROFILER(FILE, LABELNO) ;
522 #define TRAMPOLINE_TEMPLATE(FILE) \
524 fprintf (FILE, "\tadd -4,sp\n"); \
525 fprintf (FILE, "\t.long 0x0004fffa\n"); \
526 fprintf (FILE, "\tmov (0,sp),a0\n"); \
527 fprintf (FILE, "\tadd 4,sp\n"); \
528 fprintf (FILE, "\tmov (13,a0),a1\n"); \
529 fprintf (FILE, "\tmov (17,a0),a0\n"); \
530 fprintf (FILE, "\tjmp (a0)\n"); \
531 fprintf (FILE, "\t.long 0\n"); \
532 fprintf (FILE, "\t.long 0\n"); \
535 /* Length in units of the trampoline for entering a nested function. */
537 #define TRAMPOLINE_SIZE 0x1b
539 #define TRAMPOLINE_ALIGNMENT 32
541 /* Emit RTL insns to initialize the variable parts of a trampoline.
542 FNADDR is an RTX for the address of the function's pure code.
543 CXT is an RTX for the static chain value for the function. */
545 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
547 emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 0x14)), \
549 emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 0x18)), \
552 /* A C expression whose value is RTL representing the value of the return
553 address for the frame COUNT steps up from the current frame.
555 On the mn10300, the return address is not at a constant location
556 due to the frame layout. Luckily, it is at a constant offset from
557 the argument pointer, so we define RETURN_ADDR_RTX to return a
558 MEM using arg_pointer_rtx. Reload will replace arg_pointer_rtx
559 with a reference to the stack/frame pointer + an appropriate offset. */
561 #define RETURN_ADDR_RTX(COUNT, FRAME) \
563 ? gen_rtx (MEM, Pmode, arg_pointer_rtx) \
566 /* Emit code for a call to builtin_saveregs. We must emit USE insns which
567 reference the 2 integer arg registers.
568 Ordinarily they are not call used registers, but they are for
569 _builtin_saveregs, so we must make this explicit. */
571 extern struct rtx_def
*mn10300_builtin_saveregs ();
572 #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) mn10300_builtin_saveregs (ARGLIST)
574 /* Addressing modes, and classification of registers for them. */
577 /* 1 if X is an rtx for a constant that is a valid address. */
579 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
581 /* Extra constraints. */
583 #define OK_FOR_R(OP) \
584 (GET_CODE (OP) == MEM \
585 && GET_MODE (OP) == QImode \
586 && (CONSTANT_ADDRESS_P (XEXP (OP, 0)) \
587 || (GET_CODE (XEXP (OP, 0)) == REG \
588 && REG_OK_FOR_BASE_P (XEXP (OP, 0)) \
589 && XEXP (OP, 0) != stack_pointer_rtx) \
590 || (GET_CODE (XEXP (OP, 0)) == PLUS \
591 && GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \
592 && REG_OK_FOR_BASE_P (XEXP (XEXP (OP, 0), 0)) \
593 && XEXP (XEXP (OP, 0), 0) != stack_pointer_rtx \
594 && GET_CODE (XEXP (XEXP (OP, 0), 1)) == CONST_INT \
595 && INT_8_BITS (INTVAL (XEXP (XEXP (OP, 0), 1))))))
597 #define EXTRA_CONSTRAINT(OP, C) \
598 ((C) == 'R' ? OK_FOR_R (OP) : (C) == 'S' ? GET_CODE (OP) == SYMBOL_REF : 0)
600 /* Maximum number of registers that can appear in a valid memory address. */
602 #define MAX_REGS_PER_ADDRESS 2
604 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
605 and check its validity for a certain class.
606 We have two alternate definitions for each of them.
607 The usual definition accepts all pseudo regs; the other rejects
608 them unless they have been allocated suitable hard regs.
609 The symbol REG_OK_STRICT causes the latter definition to be used.
611 Most source files want to accept pseudo regs in the hope that
612 they will get allocated to the class that the insn wants them to be in.
613 Source files for reload pass need to be strict.
614 After reload, it makes no difference, since pseudo regs have
615 been eliminated by then. */
617 #ifndef REG_OK_STRICT
618 /* Nonzero if X is a hard reg that can be used as an index
619 or if it is a pseudo reg. */
620 #define REG_OK_FOR_INDEX_P(X) \
621 ((REGNO (X) >= 0 && REGNO(X) <= 3) || REGNO (X) >= FIRST_PSEUDO_REGISTER)
622 /* Nonzero if X is a hard reg that can be used as a base reg
623 or if it is a pseudo reg. */
624 #define REG_OK_FOR_BASE_P(X) \
625 ((REGNO (X) >= 4 && REGNO(X) <= 9) || REGNO (X) >= FIRST_PSEUDO_REGISTER)
627 /* Nonzero if X is a hard reg that can be used as an index. */
628 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
629 /* Nonzero if X is a hard reg that can be used as a base reg. */
630 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
634 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
635 that is a valid memory address for an instruction.
636 The MODE argument is the machine mode for the MEM expression
637 that wants to use this address.
639 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
640 except for CONSTANT_ADDRESS_P which is actually
643 On the mn10300, the value in the address register must be
644 in the same memory space/segment as the effective address.
646 This is problematical for reload since it does not understand
647 that base+index != index+base in a memory reference.
649 Note it is still possible to use reg+reg addressing modes,
650 it's just much more difficult. For a discussion of a possible
651 workaround and solution, see the comments in pa.c before the
652 function record_unscaled_index_insn_codes. */
654 /* Accept either REG or SUBREG where a register is valid. */
656 #define RTX_OK_FOR_BASE_P(X) \
657 ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
658 || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \
659 && REG_OK_FOR_BASE_P (SUBREG_REG (X))))
661 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
663 if (CONSTANT_ADDRESS_P (X)) \
665 if (RTX_OK_FOR_BASE_P (X)) \
667 if (GET_CODE (X) == PLUS) \
669 rtx base = 0, index = 0; \
670 if (REG_P (XEXP (X, 0)) \
671 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
672 base = XEXP (X, 0), index = XEXP (X, 1); \
673 if (REG_P (XEXP (X, 1)) \
674 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
675 base = XEXP (X, 1), index = XEXP (X, 0); \
676 if (base != 0 && index != 0) \
678 if (GET_CODE (index) == CONST_INT) \
685 /* Try machine-dependent ways of modifying an illegitimate address
686 to be legitimate. If we find one, return the new, valid address.
687 This macro is used in only one place: `memory_address' in explow.c.
689 OLDX is the address as it was before break_out_memory_refs was called.
690 In some cases it is useful to look at this to decide what needs to be done.
692 MODE and WIN are passed so that this macro can use
693 GO_IF_LEGITIMATE_ADDRESS.
695 It is always safe for this macro to do nothing. It exists to recognize
696 opportunities to optimize the output. */
698 extern struct rtx_def
*legitimize_address ();
699 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
700 { rtx orig_x = (X); \
701 (X) = legitimize_address (X, OLDX, MODE); \
702 if ((X) != orig_x && memory_address_p (MODE, X)) \
705 /* Go to LABEL if ADDR (a legitimate address expression)
706 has an effect that depends on the machine mode it is used for. */
708 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {}
710 /* Nonzero if the constant value X is a legitimate general operand.
711 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
713 #define LEGITIMATE_CONSTANT_P(X) 1
716 /* Tell final.c how to eliminate redundant test instructions. */
718 /* Here we define machine-dependent flags and fields in cc_status
719 (see `conditions.h'). No extra ones are needed for the vax. */
721 /* Store in cc_status the expressions
722 that the condition codes will describe
723 after execution of an instruction whose pattern is EXP.
724 Do not alter them if the instruction would not alter the cc's. */
726 #define CC_OVERFLOW_UNUSABLE 0x200
727 #define CC_NO_CARRY CC_NO_OVERFLOW
728 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
730 /* Compute the cost of computing a constant rtl expression RTX
731 whose rtx-code is CODE. The body of this macro is a portion
732 of a switch statement. If the code is computed here,
733 return it with a return statement. Otherwise, break from the switch. */
735 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
737 /* Zeros are extremely cheap. */ \
738 if (INTVAL (RTX) == 0 && OUTER_CODE == SET) \
740 /* If it fits in 8 bits, then it's still relatively cheap. */ \
741 if (INT_8_BITS (INTVAL (RTX))) \
743 /* This is the "base" cost, includes constants where either the \
744 upper or lower 16bits are all zeros. */ \
745 if (INT_16_BITS (INTVAL (RTX)) \
746 || (INTVAL (RTX) & 0xffff) == 0 \
747 || (INTVAL (RTX) & 0xffff0000) == 0) \
750 /* These are more costly than a CONST_INT, but we can relax them, \
751 so they're less costly than a CONST_DOUBLE. */ \
756 /* We don't optimize CONST_DOUBLEs well nor do we relax them well, \
757 so their cost is very high. */ \
762 #define REGISTER_MOVE_COST(CLASS1, CLASS2) (CLASS1 != CLASS2 ? 4 : 2)
764 /* A crude cut at RTX_COSTS for the MN10300. */
766 /* Provide the costs of a rtl expression. This is in the body of a
768 #define RTX_COSTS(RTX,CODE,OUTER_CODE) \
775 /* Nonzero if access to memory by bytes or half words is no faster
776 than accessing full words. */
777 #define SLOW_BYTE_ACCESS 1
779 /* Dispatch tables on the mn10300 are extremely expensive in terms of code
780 and readonly data size. So we crank up the case threshold value to
781 encourage a series of if/else comparisons to implement many small switch
782 statements. In theory, this value could be increased much more if we
783 were solely optimizing for space, but we keep it "reasonable" to avoid
784 serious code efficiency lossage. */
785 #define CASE_VALUES_THRESHOLD 6
787 #define NO_FUNCTION_CSE
789 /* According expr.c, a value of around 6 should minimize code size, and
790 for the MN10300 series, that's our primary concern. */
793 #define TEXT_SECTION_ASM_OP "\t.section .text"
794 #define DATA_SECTION_ASM_OP "\t.section .data"
795 #define BSS_SECTION_ASM_OP "\t.section .bss"
797 /* Output at beginning/end of assembler file. */
798 #undef ASM_FILE_START
799 #define ASM_FILE_START(FILE) asm_file_start(FILE)
801 #define ASM_COMMENT_START "#"
803 /* Output to assembler file text saying following lines
804 may contain character constants, extra white space, comments, etc. */
806 #define ASM_APP_ON "#APP\n"
808 /* Output to assembler file text saying following lines
809 no longer contain unusual constructs. */
811 #define ASM_APP_OFF "#NO_APP\n"
813 /* This is how to output an assembler line defining a `double' constant.
814 It is .dfloat or .gfloat, depending. */
816 #define ASM_OUTPUT_DOUBLE(FILE, VALUE) \
817 do { char dstr[30]; \
818 REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", dstr); \
819 fprintf (FILE, "\t.double %s\n", dstr); \
823 /* This is how to output an assembler line defining a `float' constant. */
824 #define ASM_OUTPUT_FLOAT(FILE, VALUE) \
825 do { char dstr[30]; \
826 REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", dstr); \
827 fprintf (FILE, "\t.float %s\n", dstr); \
830 /* This is how to output an assembler line defining an `int' constant. */
832 #define ASM_OUTPUT_INT(FILE, VALUE) \
833 ( fprintf (FILE, "\t.long "), \
834 output_addr_const (FILE, (VALUE)), \
835 fprintf (FILE, "\n"))
837 /* Likewise for `char' and `short' constants. */
839 #define ASM_OUTPUT_SHORT(FILE, VALUE) \
840 ( fprintf (FILE, "\t.hword "), \
841 output_addr_const (FILE, (VALUE)), \
842 fprintf (FILE, "\n"))
844 #define ASM_OUTPUT_CHAR(FILE, VALUE) \
845 ( fprintf (FILE, "\t.byte "), \
846 output_addr_const (FILE, (VALUE)), \
847 fprintf (FILE, "\n"))
849 /* This is how to output an assembler line for a numeric constant byte. */
850 #define ASM_OUTPUT_BYTE(FILE, VALUE) \
851 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
853 /* Define the parentheses used to group arithmetic operations
854 in assembler code. */
856 #define ASM_OPEN_PAREN "("
857 #define ASM_CLOSE_PAREN ")"
859 /* This says how to output the assembler to define a global
860 uninitialized but not common symbol.
861 Try to use asm_output_bss to implement this macro. */
863 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
864 asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN))
866 /* This is how to output the definition of a user-level label named NAME,
867 such as the label on a static function or variable NAME. */
869 #define ASM_OUTPUT_LABEL(FILE, NAME) \
870 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
872 /* This is how to output a command to make the user-level label named NAME
873 defined for reference from other files. */
875 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
876 do { fputs ("\t.global ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
878 /* This is how to output a reference to a user-level label named NAME.
879 `assemble_name' uses this. */
881 #undef ASM_OUTPUT_LABELREF
882 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
885 STRIP_NAME_ENCODING (real_name, (NAME)); \
886 fprintf (FILE, "_%s", real_name); \
889 /* Store in OUTPUT a string (made with alloca) containing
890 an assembler-name for a local static variable named NAME.
891 LABELNO is an integer which is different for each call. */
893 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
894 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
895 sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
897 /* This is how we tell the assembler that two symbols have the same value. */
899 #define ASM_OUTPUT_DEF(FILE,NAME1,NAME2) \
900 do { assemble_name(FILE, NAME1); \
901 fputs(" = ", FILE); \
902 assemble_name(FILE, NAME2); \
903 fputc('\n', FILE); } while (0)
906 /* How to refer to registers in assembler output.
907 This sequence is indexed by compiler's hard-register-number (see above). */
909 #define REGISTER_NAMES \
910 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", "ap", "sp" }
912 /* Print an instruction operand X on file FILE.
913 look in mn10300.c for details */
915 #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE,X,CODE)
917 /* Print a memory operand whose address is X, on file FILE.
918 This uses a function in output-vax.c. */
920 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
922 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO)
923 #define ASM_OUTPUT_REG_POP(FILE,REGNO)
925 /* This is how to output an element of a case-vector that is absolute. */
927 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
928 asm_fprintf (FILE, "\t%s .L%d\n", ".long", VALUE)
930 /* This is how to output an element of a case-vector that is relative. */
932 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
933 fprintf (FILE, "\t%s .L%d-.L%d\n", ".long", VALUE, REL)
935 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
937 fprintf (FILE, "\t.align %d\n", (LOG))
939 /* We don't have to worry about dbx compatibility for the mn10300. */
940 #define DEFAULT_GDB_EXTENSIONS 1
942 /* Use stabs debugging info by default. */
943 #undef PREFERRED_DEBUGGING_TYPE
944 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
946 #define DBX_REGISTER_NUMBER(REGNO) REGNO
948 /* Define to use software floating point emulator for REAL_ARITHMETIC and
949 decimal <-> binary conversion. */
950 #define REAL_ARITHMETIC
952 /* Specify the machine mode that this machine uses
953 for the index in the tablejump instruction. */
954 #define CASE_VECTOR_MODE Pmode
956 /* Define this if the case instruction drops through after the table
957 when the index is out of range. Don't define it if the case insn
958 jumps to the default label instead. */
959 #define CASE_DROPS_THROUGH
961 /* Define if operations between registers always perform the operation
962 on the full register even if a narrower mode is specified. */
963 #define WORD_REGISTER_OPERATIONS
965 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
967 /* Specify the tree operation to be used to convert reals to integers. */
968 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
970 /* This flag, if defined, says the same insns that convert to a signed fixnum
971 also convert validly to an unsigned one. */
972 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
974 /* This is the kind of divide that is easiest to do in the general case. */
975 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
977 /* Max number of bytes we can move from memory to memory
978 in one reasonably fast instruction. */
981 /* Define if shifts truncate the shift count
982 which implies one can omit a sign-extension or zero-extension
984 #define SHIFT_COUNT_TRUNCATED 1
986 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
987 is done just by pretending it is already truncated. */
988 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
990 /* Specify the machine mode that pointers have.
991 After generation of rtl, the compiler makes no further distinction
992 between pointers and any other objects of this machine mode. */
995 /* A function address in a call instruction
996 is a byte address (for indexing purposes)
997 so give the MEM rtx a byte's mode. */
998 #define FUNCTION_MODE QImode
1000 /* The assembler op to get a word. */
1002 #define FILE_ASM_OP "\t.file\n"
1004 extern void asm_file_start ();
1005 extern int const_costs ();
1006 extern void print_operand ();
1007 extern void print_operand_address ();
1008 extern void expand_prologue ();
1009 extern void expand_epilogue ();
1010 extern void notice_update_cc ();
1011 extern int call_address_operand ();
1012 extern int impossible_plus_operand ();
1013 extern enum reg_class
secondary_reload_class ();
1014 extern int initial_offset ();
1015 extern char *output_tst ();
1016 int symbolic_operand ();