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1 /* Auxiliary functions for expand movmem, setmem, cmpmem, load_multiple
2 and store_multiple pattern of Andes NDS32 cpu for GNU compiler
3 Copyright (C) 2012-2015 Free Software Foundation, Inc.
4 Contributed by Andes Technology Corporation.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it
9 under the terms of the GNU General Public License as published
10 by the Free Software Foundation; either version 3, or (at your
11 option) any later version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 /* ------------------------------------------------------------------------ */
23
24 #include "config.h"
25 #include "system.h"
26 #include "coretypes.h"
27 #include "backend.h"
28 #include "cfghooks.h"
29 #include "tree.h"
30 #include "rtl.h"
31 #include "df.h"
32 #include "alias.h"
33 #include "stor-layout.h"
34 #include "varasm.h"
35 #include "calls.h"
36 #include "regs.h"
37 #include "insn-config.h" /* Required by recog.h. */
38 #include "conditions.h"
39 #include "output.h"
40 #include "insn-attr.h" /* For DFA state_t. */
41 #include "insn-codes.h" /* For CODE_FOR_xxx. */
42 #include "reload.h" /* For push_reload(). */
43 #include "flags.h"
44 #include "insn-config.h"
45 #include "expmed.h"
46 #include "dojump.h"
47 #include "explow.h"
48 #include "emit-rtl.h"
49 #include "stmt.h"
50 #include "expr.h"
51 #include "recog.h"
52 #include "diagnostic-core.h"
53 #include "cfgrtl.h"
54 #include "cfganal.h"
55 #include "lcm.h"
56 #include "cfgbuild.h"
57 #include "cfgcleanup.h"
58 #include "tm_p.h"
59 #include "tm-constrs.h"
60 #include "optabs.h" /* For GEN_FCN. */
61 #include "target.h"
62 #include "langhooks.h" /* For add_builtin_function(). */
63 #include "builtins.h"
64
65 /* ------------------------------------------------------------------------ */
66
67 /* Functions to expand load_multiple and store_multiple.
68 They are auxiliary extern functions to help create rtx template.
69 Check nds32-multiple.md file for the patterns. */
70 rtx
71 nds32_expand_load_multiple (int base_regno, int count,
72 rtx base_addr, rtx basemem)
73 {
74 int par_index;
75 int offset;
76 rtx result;
77 rtx new_addr, mem, reg;
78
79 /* Create the pattern that is presented in nds32-multiple.md. */
80
81 result = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count));
82
83 for (par_index = 0; par_index < count; par_index++)
84 {
85 offset = par_index * 4;
86 /* 4-byte for loading data to each register. */
87 new_addr = plus_constant (Pmode, base_addr, offset);
88 mem = adjust_automodify_address_nv (basemem, SImode,
89 new_addr, offset);
90 reg = gen_rtx_REG (SImode, base_regno + par_index);
91
92 XVECEXP (result, 0, par_index) = gen_rtx_SET (reg, mem);
93 }
94
95 return result;
96 }
97
98 rtx
99 nds32_expand_store_multiple (int base_regno, int count,
100 rtx base_addr, rtx basemem)
101 {
102 int par_index;
103 int offset;
104 rtx result;
105 rtx new_addr, mem, reg;
106
107 /* Create the pattern that is presented in nds32-multiple.md. */
108
109 result = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count));
110
111 for (par_index = 0; par_index < count; par_index++)
112 {
113 offset = par_index * 4;
114 /* 4-byte for storing data to memory. */
115 new_addr = plus_constant (Pmode, base_addr, offset);
116 mem = adjust_automodify_address_nv (basemem, SImode,
117 new_addr, offset);
118 reg = gen_rtx_REG (SImode, base_regno + par_index);
119
120 XVECEXP (result, 0, par_index) = gen_rtx_SET (mem, reg);
121 }
122
123 return result;
124 }
125
126 /* Function to move block memory content by
127 using load_multiple and store_multiple.
128 This is auxiliary extern function to help create rtx template.
129 Check nds32-multiple.md file for the patterns. */
130 int
131 nds32_expand_movmemqi (rtx dstmem, rtx srcmem, rtx total_bytes, rtx alignment)
132 {
133 HOST_WIDE_INT in_words, out_words;
134 rtx dst_base_reg, src_base_reg;
135 int maximum_bytes;
136
137 /* Because reduced-set regsiters has few registers
138 (r0~r5, r6~10, r15, r28~r31, where 'r15' and 'r28~r31'
139 cannot be used for register allocation),
140 using 8 registers (32 bytes) for moving memory block
141 may easily consume all of them.
142 It makes register allocation/spilling hard to work.
143 So we only allow maximum=4 registers (16 bytes) for
144 moving memory block under reduced-set registers. */
145 if (TARGET_REDUCED_REGS)
146 maximum_bytes = 16;
147 else
148 maximum_bytes = 32;
149
150 /* 1. Total_bytes is integer for sure.
151 2. Alignment is integer for sure.
152 3. Maximum 4 or 8 registers, 4 * 4 = 16 bytes, 8 * 4 = 32 bytes.
153 4. Requires (n * 4) block size.
154 5. Requires 4-byte alignment. */
155 if (GET_CODE (total_bytes) != CONST_INT
156 || GET_CODE (alignment) != CONST_INT
157 || INTVAL (total_bytes) > maximum_bytes
158 || INTVAL (total_bytes) & 3
159 || INTVAL (alignment) & 3)
160 return 0;
161
162 dst_base_reg = copy_to_mode_reg (SImode, XEXP (dstmem, 0));
163 src_base_reg = copy_to_mode_reg (SImode, XEXP (srcmem, 0));
164
165 out_words = in_words = INTVAL (total_bytes) / UNITS_PER_WORD;
166
167 emit_insn (nds32_expand_load_multiple (0, in_words, src_base_reg, srcmem));
168 emit_insn (nds32_expand_store_multiple (0, out_words, dst_base_reg, dstmem));
169
170 /* Successfully create patterns, return 1. */
171 return 1;
172 }
173
174 /* ------------------------------------------------------------------------ */