gcc/config/or1k/predicates.md

   1 ;; Predicate definitions for OpenRISC
   2 ;; Copyright (C) 2018-2022 Free Software Foundation, Inc.
   3 ;; Contributed by Stafford Horne
   4
   5 ;; This file is part of GCC.
   6
   7 ;; GCC is free software; you can redistribute it and/or modify it
   8 ;; under the terms of the GNU General Public License as published
   9 ;; by the Free Software Foundation; either version 3, or (at your
  10 ;; option) any later version.
  11
  12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
  13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14 ;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15 ;; License for more details.
  16
  17 ;; You should have received a copy of the GNU General Public License
  18 ;; along with GCC; see the file COPYING3.  If not see
  19 ;; <http://www.gnu.org/licenses/>.
  20
  21 ;; -------------------------------------------------------------------------
  22 ;; Predicates
  23 ;; -------------------------------------------------------------------------
  24
  25 (define_predicate "input_operand"
  26   (ior (match_operand 0 "register_operand")
  27        (match_operand 0 "memory_operand")
  28        (and (match_code "const_int")
  29             (match_test "satisfies_constraint_I (op)
  30                          || satisfies_constraint_K (op)
  31                          || satisfies_constraint_M (op)"))))
  32
  33 (define_predicate "const0_operand"
  34   (and (match_code "const_int,const_wide_int,const_double,const_vector")
  35        (match_test "op == CONST0_RTX (mode)")))
  36
  37 (define_predicate "reg_or_0_operand"
  38   (ior (match_operand 0 "register_operand")
  39        (match_operand 0 "const0_operand")))
  40
  41 (define_predicate "reg_or_u6_operand"
  42   (if_then_else (match_code "const_int")
  43     (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 0x3f")
  44     (match_operand 0 "register_operand")))
  45
  46 (define_predicate "reg_or_u16_operand"
  47   (if_then_else (match_code "const_int")
  48     (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 0xffff")
  49     (match_operand 0 "register_operand")))
  50
  51 (define_predicate "reg_or_s16_operand"
  52   (if_then_else (match_code "const_int")
  53     (match_test "INTVAL (op) >= -32768 && INTVAL (op) <= 32767")
  54     (match_operand 0 "register_operand")))
  55
  56 (define_predicate "ror_reg_or_u6_operand"
  57   (if_then_else (match_code "const_int")
  58     (and (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 0x3f")
  59          (match_test "TARGET_RORI"))
  60     (and (match_operand 0 "register_operand")
  61          (match_test "TARGET_ROR"))))
  62
  63 (define_predicate "call_insn_operand"
  64   (ior (match_code "symbol_ref")
  65        (match_operand 0 "register_operand")))
  66
  67 (define_predicate "high_operand"
  68   (match_code "symbol_ref,label_ref,const,unspec"))
  69
  70 ;; Return true for relocations that must use MOVHI+ADDI
  71 (define_predicate "losum_add_operand"
  72   (match_code "symbol_ref,label_ref,const,unspec"))
  73
  74 ;; Return true for relocations that must use MOVHI+ORI
  75 (define_predicate "losum_ior_operand"
  76   (and (match_code "unspec")
  77        (match_test "XINT(op, 1) == UNSPEC_TLSGD")))
  78
  79 ;; Return true for a "virtual" or "soft" register that will be
  80 ;; adjusted to a "soft" or "hard" register during elimination.
  81 (define_predicate "virtual_frame_reg_operand"
  82   (match_code "reg")
  83 {
  84   unsigned regno = REGNO (op);
  85   return (regno != STACK_POINTER_REGNUM
  86           && regno != HARD_FRAME_POINTER_REGNUM
  87           && REGNO_PTR_FRAME_P (regno));
  88 })
  89
  90 (define_predicate "equality_comparison_operator"
  91   (match_code "ne,eq"))
  92
  93 (define_predicate "fp_comparison_operator"
  94   (if_then_else (match_test "TARGET_FP_UNORDERED")
  95     (match_operand 0 "comparison_operator")
  96     (match_operand 0 "ordered_comparison_operator")))
  97
  98 ;; Borrowed from rs6000
  99 ;; Return true if the operand is in volatile memory.  Note that during the
 100 ;; RTL generation phase, memory_operand does not return TRUE for volatile
 101 ;; memory references.  So this function allows us to recognize volatile
 102 ;; references where it's safe.
 103 (define_predicate "volatile_mem_operand"
 104   (and (match_code "mem")
 105        (match_test "MEM_VOLATILE_P (op)")
 106        (if_then_else (match_test "reload_completed")
 107          (match_operand 0 "memory_operand")
 108          (match_test "memory_address_p (mode, XEXP (op, 0))"))))
 109
 110 ;; Return true if the operand is a register or memory; including volatile
 111 ;; memory.
 112 (define_predicate "reg_or_mem_operand"
 113   (ior (match_operand 0 "nonimmediate_operand")
 114        (match_operand 0 "volatile_mem_operand")))