gcc/config/pru/pru.h

   1 /* Definitions of target machine for TI PRU.
   2    Copyright (C) 2014-2020 Free Software Foundation, Inc.
   3    Contributed by Dimitar Dimitrov <dimitar@dinux.eu>
   4
   5    This file is part of GCC.
   6
   7    GCC is free software; you can redistribute it and/or modify it
   8    under the terms of the GNU General Public License as published
   9    by the Free Software Foundation; either version 3, or (at your
  10    option) any later version.
  11
  12    GCC is distributed in the hope that it will be useful, but WITHOUT
  13    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15    License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with GCC; see the file COPYING3.  If not see
  19    <http://www.gnu.org/licenses/>.  */
  20
  21 #ifndef GCC_PRU_H
  22 #define GCC_PRU_H
  23
  24 #include "config/pru/pru-opts.h"
  25
  26 /* Define built-in preprocessor macros.  */
  27 #define TARGET_CPU_CPP_BUILTINS()                   \
  28   do                                                \
  29     {                                               \
  30       builtin_define_std ("__PRU__");               \
  31       builtin_define_std ("__pru__");               \
  32       builtin_define_std ("__PRU_V3__");            \
  33       builtin_define_std ("__LITTLE_ENDIAN__");     \
  34       builtin_define_std ("__little_endian__");     \
  35       /* Trampolines are disabled for now.  */      \
  36       builtin_define_std ("NO_TRAMPOLINES");        \
  37     }                                               \
  38   while (0)
  39
  40 /* TI ABI implementation is not feature-complete enough (e.g. function
  41    pointers are not supported), so we cannot list it as a multilib variant.
  42    To prevent misuse from users, do not link any of the standard libraries.  */
  43 #define DRIVER_SELF_SPECS                             \
  44   "%{mabi=ti:-nodefaultlibs} "                        \
  45   "%{mmcu=*:-specs=device-specs/%*%s %<mmcu=*} "
  46
  47 #undef CPP_SPEC
  48 #define CPP_SPEC                                        \
  49   "%(cpp_device) "                                      \
  50   "%{mabi=ti:-D__PRU_EABI_TI__; :-D__PRU_EABI_GNU__}"
  51
  52 /* Do not relax when in TI ABI mode since TI tools do not always
  53    put PRU_S10_PCREL.  */
  54 #undef  LINK_SPEC
  55 #define LINK_SPEC                                           \
  56   "%(link_device) "                                         \
  57   "%{mabi=ti:--no-relax;:%{mno-relax:--no-relax;:--relax}} "   \
  58   "%{shared:%eshared is not supported} "
  59
  60 /* CRT0 is carefully maintained to be compatible with both GNU and TI ABIs.  */
  61 #undef  STARTFILE_SPEC
  62 #define STARTFILE_SPEC                                                  \
  63   "%{!pg:%{minrt:crt0-minrt.o%s}%{!minrt:crt0.o%s}} %{!mabi=ti:-lgcc} "
  64
  65 #undef  ENDFILE_SPEC
  66 #define ENDFILE_SPEC "%{!mabi=ti:-lgloss} "
  67
  68 /* TI ABI mandates that ELF symbols do not start with any prefix.  */
  69 #undef USER_LABEL_PREFIX
  70 #define USER_LABEL_PREFIX ""
  71
  72 #undef LOCAL_LABEL_PREFIX
  73 #define LOCAL_LABEL_PREFIX ".L"
  74
  75 /* Storage layout.  */
  76
  77 #define DEFAULT_SIGNED_CHAR 0
  78 #define BITS_BIG_ENDIAN 0
  79 #define BYTES_BIG_ENDIAN 0
  80 #define WORDS_BIG_ENDIAN 0
  81
  82 /* PRU is represented in GCC as an 8-bit CPU with fast 16-bit and 32-bit
  83    arithmetic.  */
  84 #define BITS_PER_WORD 8
  85
  86 #ifdef IN_LIBGCC2
  87 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits).  */
  88 #define UNITS_PER_WORD 4
  89 #else
  90 /* Width of a word, in units (bytes).  */
  91 #define UNITS_PER_WORD 1
  92 #endif
  93
  94 #define POINTER_SIZE 32
  95 #define BIGGEST_ALIGNMENT 8
  96 #define STRICT_ALIGNMENT 0
  97 #define FUNCTION_BOUNDARY 8     /* Func pointers are word-addressed.  */
  98 #define PARM_BOUNDARY 8
  99 #define STACK_BOUNDARY 8
 100 #define MAX_FIXED_MODE_SIZE 64
 101
 102 #define POINTERS_EXTEND_UNSIGNED 1
 103
 104 /* Layout of source language data types.  */
 105
 106 #define INT_TYPE_SIZE 32
 107 #define SHORT_TYPE_SIZE 16
 108 #define LONG_TYPE_SIZE 32
 109 #define LONG_LONG_TYPE_SIZE 64
 110 #define FLOAT_TYPE_SIZE 32
 111 #define DOUBLE_TYPE_SIZE 64
 112 #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
 113
 114 #undef SIZE_TYPE
 115 #define SIZE_TYPE "unsigned int"
 116
 117 #undef PTRDIFF_TYPE
 118 #define PTRDIFF_TYPE "int"
 119
 120
 121 /* Basic characteristics of PRU registers:
 122
 123    Regno  Name
 124    0      r0              Caller Saved.  Also used as a static chain register.
 125    1      r1              Caller Saved.  Also used as a temporary by function.
 126                           profiler and function prologue/epilogue.
 127    2      r2       sp     Stack Pointer.
 128    3*     r3.w0    ra     Return Address (16-bit).
 129    4      r4       fp     Frame Pointer, also called Argument Pointer in ABI.
 130    5-13   r5-r13          Callee Saved Registers.
 131    14-29  r14-r29         Register Arguments.  Caller Saved Registers.
 132    14-15  r14-r15         Return Location.
 133    30     r30             Special I/O register.  Not used by compiler.
 134    31     r31             Special I/O register.  Not used by compiler.
 135
 136    32     loop_cntr       Internal register used as a counter by LOOP insns.
 137
 138    33     pc              Not an actual register.
 139
 140    34     fake_fp         Fake Frame Pointer (always eliminated).
 141    35     fake_ap         Fake Argument Pointer (always eliminated).
 142    36                     First Pseudo Register.
 143
 144    The definitions for some hard register numbers are located in pru.md.
 145    Note that GCC's internal register numbering differs from the conventional
 146    register naming in PRU ISA.  PRU ISA defines word-based register numbers
 147    and sub-register suffixes (e.g. RA is r3.w0).  GCC uses linear numbering
 148    of 8 bit sub-registers (e.g. RA starts at r12).  When outputting assembly,
 149    GCC will take into account the RTL operand size (e.g. r12:HI) in order to
 150    translate to the conventional PRU ISA format expected by GAS (r3.w0).
 151 */
 152
 153 #define FIXED_REGISTERS                         \
 154   {                                             \
 155 /*   0 */  0,0,0,0, 0,0,0,0, 1,1,1,1, 1,1,1,1,  \
 156 /*   4 */  0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0,  \
 157 /*   8 */  0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0,  \
 158 /*  12 */  0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0,  \
 159 /*  16 */  0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0,  \
 160 /*  20 */  0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0,  \
 161 /*  24 */  0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0,  \
 162 /*  28 */  0,0,0,0, 0,0,0,0, 1,1,1,1, 1,1,1,1,  \
 163 /*  32 */  1,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1   \
 164   }
 165
 166 /* Call used == caller saved + fixed regs + args + ret vals.  */
 167 #define CALL_USED_REGISTERS                     \
 168   {                                             \
 169 /*   0 */  1,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1,  \
 170 /*   4 */  0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0,  \
 171 /*   8 */  0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0,  \
 172 /*  12 */  0,0,0,0, 0,0,0,0, 1,1,1,1, 1,1,1,1,  \
 173 /*  16 */  1,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1,  \
 174 /*  20 */  1,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1,  \
 175 /*  24 */  1,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1,  \
 176 /*  28 */  1,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1,  \
 177 /*  32 */  1,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1   \
 178   }
 179
 180 #define PRU_SEQ_R(X)  (X) * 4 + 0, (X) * 4 + 1, (X) * 4 + 2, (X) * 4 + 3
 181 #define REG_ALLOC_ORDER                                                     \
 182   {                                                                         \
 183     /* Call-clobbered, yet not used for parameters.  */                     \
 184     PRU_SEQ_R (0),  PRU_SEQ_R ( 1),                                         \
 185                                                                             \
 186     PRU_SEQ_R (14), PRU_SEQ_R (15), PRU_SEQ_R (16), PRU_SEQ_R (17),         \
 187     PRU_SEQ_R (18), PRU_SEQ_R (19), PRU_SEQ_R (20), PRU_SEQ_R (21),         \
 188     PRU_SEQ_R (22), PRU_SEQ_R (23), PRU_SEQ_R (24), PRU_SEQ_R (25),         \
 189     PRU_SEQ_R (26), PRU_SEQ_R (27), PRU_SEQ_R (28), PRU_SEQ_R (29),         \
 190                                                                             \
 191     PRU_SEQ_R ( 5), PRU_SEQ_R ( 6), PRU_SEQ_R ( 7), PRU_SEQ_R ( 8),         \
 192     PRU_SEQ_R ( 9), PRU_SEQ_R (10), PRU_SEQ_R (11), PRU_SEQ_R (12),         \
 193     PRU_SEQ_R (13),                                                         \
 194                                                                             \
 195     PRU_SEQ_R ( 4),                                                         \
 196     PRU_SEQ_R ( 2), PRU_SEQ_R ( 3),                                         \
 197                                                                             \
 198     /* I/O and virtual registers.  */                                       \
 199     PRU_SEQ_R (30), PRU_SEQ_R (31), PRU_SEQ_R (32), PRU_SEQ_R (33),         \
 200     PRU_SEQ_R (34), PRU_SEQ_R (35)                                          \
 201   }
 202
 203 /* Register Classes.  */
 204
 205 enum reg_class
 206 {
 207   NO_REGS,
 208   SIB_REGS,
 209   LOOPCNTR_REGS,
 210   MULDST_REGS,
 211   MULSRC0_REGS,
 212   MULSRC1_REGS,
 213   GP_REGS,
 214   ALL_REGS,
 215   LIM_REG_CLASSES
 216 };
 217
 218 #define N_REG_CLASSES (int) LIM_REG_CLASSES
 219
 220 #define REG_CLASS_NAMES   \
 221   {  "NO_REGS",           \
 222      "SIB_REGS",          \
 223      "LOOPCNTR_REGS",     \
 224      "MULDST_REGS",       \
 225      "MULSRC0_REGS",      \
 226      "MULSRC1_REGS",      \
 227      "GP_REGS",           \
 228      "ALL_REGS" }
 229
 230 #define GENERAL_REGS ALL_REGS
 231
 232 #define REG_CLASS_CONTENTS                                      \
 233   {                                                             \
 234     /* NO_REGS        */ { 0, 0, 0, 0, 0},                      \
 235     /* SIB_REGS       */ { 0xf, 0xff000000, ~0, 0xffffff, 0},   \
 236     /* LOOPCNTR_REGS  */ { 0, 0, 0, 0, 0xf},                    \
 237     /* MULDST_REGS    */ { 0, 0, 0, 0x00000f00, 0},             \
 238     /* MULSRC0_REGS   */ { 0, 0, 0, 0x000f0000, 0},             \
 239     /* MULSRC1_REGS   */ { 0, 0, 0, 0x00f00000, 0},             \
 240     /* GP_REGS        */ { ~0, ~0, ~0, ~0, 0},                  \
 241     /* ALL_REGS       */ { ~0,~0, ~0, ~0, ~0}                   \
 242   }
 243
 244
 245 #define GP_REG_P(REGNO) ((unsigned)(REGNO) <= LAST_GP_REGNUM)
 246 #define REGNO_REG_CLASS(REGNO)                                              \
 247         ((REGNO) == MULDST_REGNUM ? MULDST_REGS                             \
 248          : (REGNO) == MULSRC0_REGNUM ? MULSRC0_REGS                         \
 249          : (REGNO) == MULSRC1_REGNUM ? MULSRC1_REGS                         \
 250          : (REGNO) >= FIRST_ARG_REGNUM                                      \
 251             && (REGNO) <= LAST_ARG_REGNUM ? SIB_REGS                        \
 252          : (REGNO) == STATIC_CHAIN_REGNUM ? SIB_REGS                        \
 253          : (REGNO) == LOOPCNTR_REGNUM ? LOOPCNTR_REGS                       \
 254          : (REGNO) <= LAST_NONIO_GP_REGNUM ? GP_REGS                        \
 255          : ALL_REGS)
 256
 257 #define CLASS_MAX_NREGS(CLASS, MODE) \
 258   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 259
 260 /* Arbitrarily set to a non-argument register.  Not defined by TI ABI.  */
 261 #define STATIC_CHAIN_REGNUM      0      /* r0 */
 262
 263 /* Tests for various kinds of constants used in the PRU port.  */
 264 #define SHIFT_INT(X) (IN_RANGE ((X), 0, 31))
 265
 266 #define UHWORD_INT(X) (IN_RANGE ((X), 0, 0xffff))
 267 #define SHWORD_INT(X) (IN_RANGE ((X), -32768, 32767))
 268 #define UBYTE_INT(X) (IN_RANGE ((X), 0, 0xff))
 269 #define SBYTE_INT(X) (IN_RANGE ((X), -128, 127))
 270
 271 /* Say that the epilogue uses the return address register.  Note that
 272    in the case of sibcalls, the values "used by the epilogue" are
 273    considered live at the start of the called function.  */
 274 #define EPILOGUE_USES(REGNO) (epilogue_completed                \
 275                               && (((REGNO) == RA_REGNUM)                \
 276                                   || (REGNO) == (RA_REGNUM + 1)))
 277
 278 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
 279    the stack pointer does not matter.  The value is tested only in
 280    functions that have frame pointers.
 281    No definition is equivalent to always zero.  */
 282
 283 #define EXIT_IGNORE_STACK 1
 284
 285 /* Trampolines are not supported, but put a define to keep the build.  */
 286 #define TRAMPOLINE_SIZE 4
 287
 288 /* Stack layout.  */
 289 #define STACK_GROWS_DOWNWARD  1
 290 #undef FRAME_GROWS_DOWNWARD
 291 #define FIRST_PARM_OFFSET(FUNDECL) 0
 292
 293 /* Before the prologue, RA lives in r3.w2.  */
 294 #define INCOMING_RETURN_ADDR_RTX        gen_rtx_REG (HImode, RA_REGNUM)
 295
 296 #define RETURN_ADDR_RTX(C,F) pru_get_return_address (C)
 297
 298 #define DWARF_FRAME_RETURN_COLUMN RA_REGNUM
 299
 300 /* The CFA includes the pretend args.  */
 301 #define ARG_POINTER_CFA_OFFSET(FNDECL) \
 302   (gcc_assert ((FNDECL) == current_function_decl), \
 303    FIRST_PARM_OFFSET (FNDECL) + crtl->args.pretend_args_size)
 304
 305 /* Frame/arg pointer elimination settings.  */
 306 #define ELIMINABLE_REGS                                                 \
 307 {{ ARG_POINTER_REGNUM,   STACK_POINTER_REGNUM},                         \
 308  { ARG_POINTER_REGNUM,   HARD_FRAME_POINTER_REGNUM},                    \
 309  { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},                         \
 310  { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
 311
 312 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
 313   (OFFSET) = pru_initial_elimination_offset ((FROM), (TO))
 314
 315 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
 316   pru_hard_regno_rename_ok (OLD_REG, NEW_REG)
 317
 318 /* Calling convention definitions.  */
 319 #if !defined(IN_LIBGCC2)
 320
 321 #define NUM_ARG_REGS (LAST_ARG_REGNUM - FIRST_ARG_REGNUM + 1)
 322
 323 typedef struct pru_args
 324 {
 325   bool regs_used[NUM_ARG_REGS];
 326 } CUMULATIVE_ARGS;
 327
 328 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS)  \
 329   do {                                                                    \
 330       memset ((CUM).regs_used, 0, sizeof ((CUM).regs_used));              \
 331   } while (0)
 332
 333 #define FUNCTION_ARG_REGNO_P(REGNO) \
 334   ((REGNO) >= FIRST_ARG_REGNUM && (REGNO) <= LAST_ARG_REGNUM)
 335
 336 /* Passing function arguments on stack.  */
 337 #define PUSH_ARGS 0
 338 #define ACCUMULATE_OUTGOING_ARGS 1
 339
 340 /* We define TARGET_RETURN_IN_MEMORY, so set to zero.  */
 341 #define DEFAULT_PCC_STRUCT_RETURN 0
 342
 343 /* Profiling.  */
 344 #define PROFILE_BEFORE_PROLOGUE
 345 #define NO_PROFILE_COUNTERS 1
 346 #define FUNCTION_PROFILER(FILE, LABELNO) \
 347   pru_function_profiler ((FILE), (LABELNO))
 348
 349 #endif  /* IN_LIBGCC2 */
 350
 351 /* Addressing modes.  */
 352
 353 #define CONSTANT_ADDRESS_P(X) \
 354   (CONSTANT_P (X) && memory_address_p (SImode, X))
 355
 356 #define MAX_REGS_PER_ADDRESS 2
 357 #define BASE_REG_CLASS ALL_REGS
 358 #define INDEX_REG_CLASS ALL_REGS
 359
 360 #define REGNO_OK_FOR_BASE_P(REGNO) pru_regno_ok_for_base_p ((REGNO), true)
 361 #define REGNO_OK_FOR_INDEX_P(REGNO) pru_regno_ok_for_index_p ((REGNO), true)
 362
 363 /* Limited by the insns in pru-ldst-multiple.md.  */
 364 #define MOVE_MAX 8
 365 #define SLOW_BYTE_ACCESS 1
 366
 367 /* It is as good to call a constant function address as to call an address
 368    kept in a register.  */
 369 #define NO_FUNCTION_CSE 1
 370
 371 /* Define output assembler language.  */
 372
 373 #define ASM_APP_ON "#APP\n"
 374 #define ASM_APP_OFF "#NO_APP\n"
 375
 376 #define ASM_COMMENT_START "# "
 377
 378 #define GLOBAL_ASM_OP "\t.global\t"
 379
 380 #define PRU_NAME_R(X)  X".b0", X".b1", X".b2", X".b3"
 381 #define REGISTER_NAMES            \
 382   {                               \
 383     PRU_NAME_R ("r0"),            \
 384     PRU_NAME_R ("r1"),            \
 385     PRU_NAME_R ("r2"),            \
 386     PRU_NAME_R ("r3"),            \
 387     PRU_NAME_R ("r4"),            \
 388     PRU_NAME_R ("r5"),            \
 389     PRU_NAME_R ("r6"),            \
 390     PRU_NAME_R ("r7"),            \
 391     PRU_NAME_R ("r8"),            \
 392     PRU_NAME_R ("r9"),            \
 393     PRU_NAME_R ("r10"),           \
 394     PRU_NAME_R ("r11"),           \
 395     PRU_NAME_R ("r12"),           \
 396     PRU_NAME_R ("r13"),           \
 397     PRU_NAME_R ("r14"),           \
 398     PRU_NAME_R ("r15"),           \
 399     PRU_NAME_R ("r16"),           \
 400     PRU_NAME_R ("r17"),           \
 401     PRU_NAME_R ("r18"),           \
 402     PRU_NAME_R ("r19"),           \
 403     PRU_NAME_R ("r20"),           \
 404     PRU_NAME_R ("r21"),           \
 405     PRU_NAME_R ("r22"),           \
 406     PRU_NAME_R ("r23"),           \
 407     PRU_NAME_R ("r24"),           \
 408     PRU_NAME_R ("r25"),           \
 409     PRU_NAME_R ("r26"),           \
 410     PRU_NAME_R ("r27"),           \
 411     PRU_NAME_R ("r28"),           \
 412     PRU_NAME_R ("r29"),           \
 413     PRU_NAME_R ("r30"),           \
 414     PRU_NAME_R ("r31"),           \
 415     PRU_NAME_R ("loopcntr_reg"),  \
 416     PRU_NAME_R ("pc"),            \
 417     PRU_NAME_R ("fake_fp"),       \
 418     PRU_NAME_R ("fake_ap"),       \
 419 }
 420
 421 #define PRU_OVERLAP_R(X)              \
 422   { "r" #X      , X * 4     ,  4 },   \
 423   { "r" #X ".w0", X * 4 + 0 ,  2 },   \
 424   { "r" #X ".w1", X * 4 + 1 ,  2 },   \
 425   { "r" #X ".w2", X * 4 + 2 ,  2 }
 426
 427 #define OVERLAPPING_REGISTER_NAMES  \
 428   {                                 \
 429     /* Aliases.  */                 \
 430     { "sp", 2 * 4, 4 },             \
 431     { "ra", 3 * 4, 2 },             \
 432     { "fp", 4 * 4, 4 },             \
 433     PRU_OVERLAP_R (0),              \
 434     PRU_OVERLAP_R (1),              \
 435     PRU_OVERLAP_R (2),              \
 436     PRU_OVERLAP_R (3),              \
 437     PRU_OVERLAP_R (4),              \
 438     PRU_OVERLAP_R (5),              \
 439     PRU_OVERLAP_R (6),              \
 440     PRU_OVERLAP_R (7),              \
 441     PRU_OVERLAP_R (8),              \
 442     PRU_OVERLAP_R (9),              \
 443     PRU_OVERLAP_R (10),             \
 444     PRU_OVERLAP_R (11),             \
 445     PRU_OVERLAP_R (12),             \
 446     PRU_OVERLAP_R (13),             \
 447     PRU_OVERLAP_R (14),             \
 448     PRU_OVERLAP_R (15),             \
 449     PRU_OVERLAP_R (16),             \
 450     PRU_OVERLAP_R (17),             \
 451     PRU_OVERLAP_R (18),             \
 452     PRU_OVERLAP_R (19),             \
 453     PRU_OVERLAP_R (20),             \
 454     PRU_OVERLAP_R (21),             \
 455     PRU_OVERLAP_R (22),             \
 456     PRU_OVERLAP_R (23),             \
 457     PRU_OVERLAP_R (24),             \
 458     PRU_OVERLAP_R (25),             \
 459     PRU_OVERLAP_R (26),             \
 460     PRU_OVERLAP_R (27),             \
 461     PRU_OVERLAP_R (28),             \
 462     PRU_OVERLAP_R (29),             \
 463     PRU_OVERLAP_R (30),             \
 464     PRU_OVERLAP_R (31),             \
 465 }
 466
 467 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)                                \
 468   do                                                                        \
 469     {                                                                       \
 470       fputs (integer_asm_op (POINTER_SIZE / BITS_PER_UNIT, TRUE), FILE);    \
 471       fprintf (FILE, "%%pmem(.L%u)\n", (unsigned) (VALUE));                 \
 472     }                                                                       \
 473   while (0)
 474
 475 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL)                  \
 476   do                                                                        \
 477     {                                                                       \
 478       fputs (integer_asm_op (POINTER_SIZE / BITS_PER_UNIT, TRUE), STREAM);  \
 479       fprintf (STREAM, "%%pmem(.L%u-.L%u)\n", (unsigned) (VALUE),           \
 480                (unsigned) (REL));                                           \
 481     }                                                                       \
 482   while (0)
 483
 484 /* Section directives.  */
 485
 486 /* Output before read-only data.  */
 487 #define TEXT_SECTION_ASM_OP "\t.section\t.text"
 488
 489 /* Output before writable data.  */
 490 #define DATA_SECTION_ASM_OP "\t.section\t.data"
 491
 492 /* Output before uninitialized data.  */
 493 #define BSS_SECTION_ASM_OP "\t.section\t.bss"
 494
 495 #define CTORS_SECTION_ASM_OP "\t.section\t.init_array,\"aw\",%init_array"
 496 #define DTORS_SECTION_ASM_OP "\t.section\t.fini_array,\"aw\",%fini_array"
 497
 498 #undef INIT_SECTION_ASM_OP
 499 #undef FINI_SECTION_ASM_OP
 500 #define INIT_ARRAY_SECTION_ASM_OP CTORS_SECTION_ASM_OP
 501 #define FINI_ARRAY_SECTION_ASM_OP DTORS_SECTION_ASM_OP
 502
 503 /* Since we use .init_array/.fini_array we don't need the markers at
 504    the start and end of the ctors/dtors arrays.  */
 505 #define CTOR_LIST_BEGIN asm (CTORS_SECTION_ASM_OP)
 506 #define CTOR_LIST_END           /* empty */
 507 #define DTOR_LIST_BEGIN asm (DTORS_SECTION_ASM_OP)
 508 #define DTOR_LIST_END           /* empty */
 509
 510 #undef TARGET_ASM_CONSTRUCTOR
 511 #define TARGET_ASM_CONSTRUCTOR pru_elf_asm_constructor
 512
 513 #undef TARGET_ASM_DESTRUCTOR
 514 #define TARGET_ASM_DESTRUCTOR pru_elf_asm_destructor
 515
 516 #define ASM_OUTPUT_ALIGN(FILE, LOG)                   \
 517   do {                                                \
 518     fprintf ((FILE), "%s%d\n", ALIGN_ASM_OP, (LOG));  \
 519   } while (0)
 520
 521 #undef  ASM_OUTPUT_ALIGNED_COMMON
 522 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN)              \
 523 do                                                                      \
 524   {                                                                     \
 525     fprintf ((FILE), "%s", COMMON_ASM_OP);                              \
 526     assemble_name ((FILE), (NAME));                                     \
 527     fprintf ((FILE), "," HOST_WIDE_INT_PRINT_UNSIGNED ",%u\n", (SIZE),  \
 528              (ALIGN) / BITS_PER_UNIT);                                  \
 529   }                                                                     \
 530 while (0)
 531
 532
 533 /* This says how to output assembler code to declare an
 534    uninitialized internal linkage data object.  Under SVR4,
 535    the linker seems to want the alignment of data objects
 536    to depend on their types.  We do exactly that here.  */
 537
 538 #undef  ASM_OUTPUT_ALIGNED_LOCAL
 539 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN)               \
 540 do {                                                                    \
 541   switch_to_section (bss_section);                                      \
 542   ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object");                     \
 543   if (!flag_inhibit_size_directive)                                     \
 544     ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, SIZE);                       \
 545   ASM_OUTPUT_ALIGN ((FILE), exact_log2 ((ALIGN) / BITS_PER_UNIT));      \
 546   ASM_OUTPUT_LABEL (FILE, NAME);                                        \
 547   ASM_OUTPUT_SKIP ((FILE), (SIZE) ? (SIZE) : 1);                        \
 548 } while (0)
 549
 550 /* Misc parameters.  */
 551
 552 #define TARGET_SUPPORTS_WIDE_INT 1
 553
 554 #define STORE_FLAG_VALUE 1
 555 #define Pmode SImode
 556 #define FUNCTION_MODE Pmode
 557
 558 #define CASE_VECTOR_MODE Pmode
 559
 560 /* Jumps are cheap on PRU.  */
 561 #define LOGICAL_OP_NON_SHORT_CIRCUIT            0
 562
 563 /* Unfortunately the LBBO instruction does not zero-extend data.  */
 564 #undef LOAD_EXTEND_OP
 565
 566 #undef WORD_REGISTER_OPERATIONS
 567
 568 #define HAS_LONG_UNCOND_BRANCH                  1
 569 #define HAS_LONG_COND_BRANCH                    1
 570
 571 #define REGISTER_TARGET_PRAGMAS() pru_register_pragmas ()
 572
 573 #endif /* GCC_PRU_H */