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[thirdparty/gcc.git] / gcc / config / rx / rx.h
1 /* GCC backend definitions for the Renesas RX processor.
2 Copyright (C) 2008, 2009, 2010 Free Software Foundation, Inc.
3 Contributed by Red Hat.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20 \f
21
22 #define TARGET_CPU_CPP_BUILTINS() \
23 do \
24 { \
25 builtin_define ("__RX__"); \
26 builtin_assert ("cpu=RX"); \
27 if (rx_cpu_type == RX610) \
28 { \
29 builtin_define ("__RX610__"); \
30 builtin_assert ("machine=RX610"); \
31 } \
32 else \
33 builtin_assert ("machine=RX600"); \
34 \
35 if (TARGET_BIG_ENDIAN_DATA) \
36 builtin_define ("__RX_BIG_ENDIAN__"); \
37 else \
38 builtin_define ("__RX_LITTLE_ENDIAN__");\
39 \
40 if (TARGET_64BIT_DOUBLES) \
41 builtin_define ("__RX_64BIT_DOUBLES__");\
42 else \
43 builtin_define ("__RX_32BIT_DOUBLES__");\
44 \
45 if (ALLOW_RX_FPU_INSNS) \
46 builtin_define ("__RX_FPU_INSNS__"); \
47 \
48 if (TARGET_AS100_SYNTAX) \
49 builtin_define ("__RX_AS100_SYNTAX__"); \
50 else \
51 builtin_define ("__RX_GAS_SYNTAX__"); \
52 } \
53 while (0)
54
55 enum rx_cpu_types
56 {
57 RX600,
58 RX610,
59 RX200
60 };
61
62 extern enum rx_cpu_types rx_cpu_type;
63
64 #undef CC1_SPEC
65 #define CC1_SPEC "\
66 %{mas100-syntax:%{gdwarf*:%e-mas100-syntax is incompatible with -gdwarf}} \
67 %{mcpu=rx200:%{fpu:%erx200 cpu does not have FPU hardware}}"
68
69 #undef STARTFILE_SPEC
70 #define STARTFILE_SPEC "%{pg:gcrt0.o%s}%{!pg:crt0.o%s} crtbegin.o%s"
71
72 #undef ENDFILE_SPEC
73 #define ENDFILE_SPEC "crtend.o%s crtn.o%s"
74
75 #undef ASM_SPEC
76 #define ASM_SPEC "\
77 %{mbig-endian-data:-mbig-endian-data} \
78 %{m64bit-doubles:-m64bit-doubles} \
79 %{!m64bit-doubles:-m32bit-doubles} \
80 %{msmall-data-limit*:-msmall-data-limit} \
81 %{mrelax:-relax} \
82 "
83
84 #undef LIB_SPEC
85 #define LIB_SPEC " \
86 --start-group \
87 -lc \
88 %{msim*:-lsim}%{!msim*:-lnosys} \
89 %{fprofile-arcs|fprofile-generate|coverage:-lgcov} \
90 --end-group \
91 %{!T*: %{msim*:%Trx-sim.ld}%{!msim*:%Trx.ld}} \
92 "
93
94 #undef LINK_SPEC
95 #define LINK_SPEC "%{mbig-endian-data:--oformat elf32-rx-be} %{mrelax:-relax}"
96 \f
97
98 #define BITS_BIG_ENDIAN 0
99 #define BYTES_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
100 #define WORDS_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
101
102 #define UNITS_PER_WORD 4
103
104 #define INT_TYPE_SIZE 32
105 #define LONG_TYPE_SIZE 32
106 #define LONG_LONG_TYPE_SIZE 64
107
108 #define FLOAT_TYPE_SIZE 32
109 #define DOUBLE_TYPE_SIZE (TARGET_64BIT_DOUBLES ? 64 : 32)
110 #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
111
112 #ifdef __RX_32BIT_DOUBLES__
113 #define LIBGCC2_HAS_DF_MODE 0
114 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 32
115 #else
116 #define LIBGCC2_HAS_DF_MODE 1
117 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
118 #endif
119
120 #define DEFAULT_SIGNED_CHAR 0
121
122 #define STRICT_ALIGNMENT 1
123 #define FUNCTION_BOUNDARY 8
124 #define BIGGEST_ALIGNMENT 32
125 #define STACK_BOUNDARY 32
126 #define PARM_BOUNDARY 8
127
128 #define STACK_GROWS_DOWNWARD 1
129 #define FRAME_GROWS_DOWNWARD 0
130 #define FIRST_PARM_OFFSET(FNDECL) 0
131
132 #define MAX_REGS_PER_ADDRESS 2
133
134 #define Pmode SImode
135 #define POINTER_SIZE 32
136 #undef SIZE_TYPE
137 #define SIZE_TYPE "long unsigned int"
138 #undef PTRDIFF_TYPE
139 #define PTRDIFF_TYPE "long int"
140 #define POINTERS_EXTEND_UNSIGNED 1
141 #define FUNCTION_MODE QImode
142 #define CASE_VECTOR_MODE Pmode
143 #define WORD_REGISTER_OPERATIONS 1
144 #define HAS_LONG_COND_BRANCH 0
145 #define HAS_LONG_UNCOND_BRANCH 0
146
147 #define MOVE_MAX 4
148 #define STARTING_FRAME_OFFSET 0
149
150 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
151
152 #define LEGITIMATE_CONSTANT_P(X) rx_is_legitimate_constant (X)
153
154 #define HANDLE_PRAGMA_PACK_PUSH_POP 1
155
156 #define HAVE_PRE_DECCREMENT 1
157 #define HAVE_POST_INCREMENT 1
158
159 #define MOVE_RATIO(SPEED) ((SPEED) ? 4 : 2)
160 #define SLOW_BYTE_ACCESS 1
161
162 #define STORE_FLAG_VALUE 1
163 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
164 #define SHORT_IMMEDIATES_SIGN_EXTEND 1
165 \f
166 enum reg_class
167 {
168 NO_REGS, /* No registers in set. */
169 GR_REGS, /* Integer registers. */
170 ALL_REGS, /* All registers. */
171 LIM_REG_CLASSES /* Max value + 1. */
172 };
173
174 #define REG_CLASS_NAMES \
175 { \
176 "NO_REGS", \
177 "GR_REGS", \
178 "ALL_REGS" \
179 }
180
181 #define REG_CLASS_CONTENTS \
182 { \
183 { 0x00000000 }, /* No registers, */ \
184 { 0x0000ffff }, /* Integer registers. */ \
185 { 0x0000ffff } /* All registers. */ \
186 }
187
188 #define IRA_COVER_CLASSES \
189 { \
190 GR_REGS, LIM_REG_CLASSES \
191 }
192
193 #define SMALL_REGISTER_CLASSES 0
194 #define N_REG_CLASSES (int) LIM_REG_CLASSES
195 #define CLASS_MAX_NREGS(CLASS, MODE) ((GET_MODE_SIZE (MODE) \
196 + UNITS_PER_WORD - 1) \
197 / UNITS_PER_WORD)
198
199 #define GENERAL_REGS GR_REGS
200 #define BASE_REG_CLASS GR_REGS
201 #define INDEX_REG_CLASS GR_REGS
202
203 #define FIRST_PSEUDO_REGISTER 17
204
205 #define REGNO_REG_CLASS(REGNO) ((REGNO) < FIRST_PSEUDO_REGISTER \
206 ? GR_REGS : NO_REGS)
207
208 #define STACK_POINTER_REGNUM 0
209 #define FUNC_RETURN_REGNUM 1
210 #define FRAME_POINTER_REGNUM 6
211 #define ARG_POINTER_REGNUM 7
212 #define STATIC_CHAIN_REGNUM 8
213 #define TRAMPOLINE_TEMP_REGNUM 9
214 #define STRUCT_VAL_REGNUM 15
215 #define CC_REGNUM 16
216
217 /* This is the register which is used to hold the address of the start
218 of the small data area, if that feature is being used. Note - this
219 register must not be call_used because otherwise library functions
220 that are compiled without small data support might clobber it.
221
222 FIXME: The function gcc/config/rx/rx.c:rx_gen_move_template() has a
223 built in copy of this register's name, rather than constructing the
224 name from this #define. */
225 #define GP_BASE_REGNUM 13
226
227 #define ELIMINABLE_REGS \
228 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
229 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }, \
230 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }}
231
232 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
233 (OFFSET) = rx_initial_elimination_offset ((FROM), (TO))
234
235
236 #define FUNCTION_ARG_REGNO_P(N) (((N) >= 1) && ((N) <= 4))
237 #define FUNCTION_VALUE_REGNO_P(N) ((N) == FUNC_RETURN_REGNUM)
238 #define DEFAULT_PCC_STRUCT_RETURN 0
239
240 #define FIXED_REGISTERS \
241 { \
242 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 \
243 }
244
245 #define CALL_USED_REGISTERS \
246 { \
247 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1 \
248 }
249
250 #define CONDITIONAL_REGISTER_USAGE \
251 rx_conditional_register_usage ()
252
253 #define LIBCALL_VALUE(MODE) \
254 gen_rtx_REG (((GET_MODE_CLASS (MODE) != MODE_INT \
255 || GET_MODE_SIZE (MODE) >= 4) \
256 ? (MODE) \
257 : SImode), \
258 FUNC_RETURN_REGNUM)
259
260 /* Order of allocation of registers. */
261
262 #define REG_ALLOC_ORDER \
263 { 7, 10, 11, 12, 13, 14, 4, 3, 2, 1, 9, 8, 6, 5, 15 \
264 }
265
266 #define REGNO_IN_RANGE(REGNO, MIN, MAX) \
267 (IN_RANGE ((REGNO), (MIN), (MAX)) \
268 || (reg_renumber != NULL \
269 && reg_renumber[(REGNO)] >= (MIN) \
270 && reg_renumber[(REGNO)] <= (MAX)))
271
272 #ifdef REG_OK_STRICT
273 #define REGNO_OK_FOR_BASE_P(regno) REGNO_IN_RANGE (regno, 0, 15)
274 #else
275 #define REGNO_OK_FOR_BASE_P(regno) 1
276 #endif
277
278 #define REGNO_OK_FOR_INDEX_P(regno) REGNO_OK_FOR_BASE_P (regno)
279
280 #define RTX_OK_FOR_BASE(X, STRICT) \
281 ((STRICT) ? \
282 ( (REG_P (X) \
283 && REGNO_IN_RANGE (REGNO (X), 0, 15)) \
284 || (GET_CODE (X) == SUBREG \
285 && REG_P (SUBREG_REG (X)) \
286 && REGNO_IN_RANGE (REGNO (SUBREG_REG (X)), 0, 15))) \
287 : \
288 ( (REG_P (X) \
289 || (GET_CODE (X) == SUBREG \
290 && REG_P (SUBREG_REG (X))))))
291
292 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
293 do \
294 { \
295 if (rx_is_mode_dependent_addr (ADDR)) \
296 goto LABEL; \
297 } \
298 while (0)
299 \f
300
301 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
302 ((COUNT) == 0 \
303 ? gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, arg_pointer_rtx, GEN_INT (-4))) \
304 : NULL_RTX)
305
306 #define INCOMING_RETURN_ADDR_RTX gen_rtx_MEM (Pmode, stack_pointer_rtx)
307
308 #define ACCUMULATE_OUTGOING_ARGS 1
309
310 typedef unsigned int CUMULATIVE_ARGS;
311
312 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
313 (CUM) = 0
314
315 \f
316 #define TRAMPOLINE_SIZE (! TARGET_BIG_ENDIAN_DATA ? 14 : 20)
317 #define TRAMPOLINE_ALIGNMENT 32
318 \f
319 #define NO_PROFILE_COUNTERS 1
320 #define PROFILE_BEFORE_PROLOGUE 1
321
322 #define FUNCTION_PROFILER(FILE, LABELNO) \
323 fprintf (FILE, "\tbsr\t__mcount\n");
324 \f
325
326 #define HARD_REGNO_NREGS(REGNO, MODE) CLASS_MAX_NREGS (0, MODE)
327
328 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
329 REGNO_REG_CLASS (REGNO) == GR_REGS
330
331 #define MODES_TIEABLE_P(MODE1, MODE2) \
332 ( ( GET_MODE_CLASS (MODE1) == MODE_FLOAT \
333 || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
334 == ( GET_MODE_CLASS (MODE2) == MODE_FLOAT \
335 || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
336 \f
337
338 #define REGISTER_NAMES \
339 { \
340 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
341 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", "cc" \
342 }
343
344 #define ADDITIONAL_REGISTER_NAMES \
345 { \
346 { "sp", STACK_POINTER_REGNUM } \
347 , { "fp", FRAME_POINTER_REGNUM } \
348 , { "arg", ARG_POINTER_REGNUM } \
349 , { "chain", STATIC_CHAIN_REGNUM } \
350 }
351
352 #define DATA_SECTION_ASM_OP \
353 (TARGET_AS100_SYNTAX ? "\t.SECTION D,DATA" \
354 : "\t.section D,\"aw\",@progbits\n\t.p2align 2")
355
356 #define SDATA_SECTION_ASM_OP \
357 (TARGET_AS100_SYNTAX ? "\t.SECTION D_2,DATA,ALIGN=2" \
358 : "\t.section D_2,\"aw\",@progbits\n\t.p2align 1")
359
360 #undef READONLY_DATA_SECTION_ASM_OP
361 #define READONLY_DATA_SECTION_ASM_OP \
362 (TARGET_AS100_SYNTAX ? "\t.SECTION C,ROMDATA,ALIGN=4" \
363 : "\t.section C,\"a\",@progbits\n\t.p2align 2")
364
365 #define BSS_SECTION_ASM_OP \
366 (TARGET_AS100_SYNTAX ? "\t.SECTION B,DATA,ALIGN=4" \
367 : "\t.section B,\"w\",@nobits\n\t.p2align 2")
368
369 #define SBSS_SECTION_ASM_OP \
370 (TARGET_AS100_SYNTAX ? "\t.SECTION B_2,DATA,ALIGN=2" \
371 : "\t.section B_2,\"w\",@nobits\n\t.p2align 1")
372
373 /* The following definitions are conditional depending upon whether the
374 compiler is being built or crtstuff.c is being compiled by the built
375 compiler. */
376 #if defined CRT_BEGIN || defined CRT_END
377 # ifdef __RX_AS100_SYNTAX
378 # define TEXT_SECTION_ASM_OP "\t.SECTION P,CODE"
379 # define CTORS_SECTION_ASM_OP "\t.SECTION init_array,CODE"
380 # define DTORS_SECTION_ASM_OP "\t.SECTION fini_array,CODE"
381 # define INIT_ARRAY_SECTION_ASM_OP "\t.SECTION init_array,CODE"
382 # define FINI_ARRAY_SECTION_ASM_OP "\t.SECTION fini_array,CODE"
383 # else
384 # define TEXT_SECTION_ASM_OP "\t.section P,\"ax\""
385 # define CTORS_SECTION_ASM_OP \
386 "\t.section\t.init_array,\"aw\",@init_array"
387 # define DTORS_SECTION_ASM_OP \
388 "\t.section\t.fini_array,\"aw\",@fini_array"
389 # define INIT_ARRAY_SECTION_ASM_OP \
390 "\t.section\t.init_array,\"aw\",@init_array"
391 # define FINI_ARRAY_SECTION_ASM_OP \
392 "\t.section\t.fini_array,\"aw\",@fini_array"
393 # endif
394 #else
395 # define TEXT_SECTION_ASM_OP \
396 (TARGET_AS100_SYNTAX ? "\t.SECTION P,CODE" : "\t.section P,\"ax\"")
397
398 # define CTORS_SECTION_ASM_OP \
399 (TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
400 : "\t.section\t.init_array,\"aw\",@init_array")
401
402 # define DTORS_SECTION_ASM_OP \
403 (TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
404 : "\t.section\t.fini_array,\"aw\",@fini_array")
405
406 # define INIT_ARRAY_SECTION_ASM_OP \
407 (TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
408 : "\t.section\t.init_array,\"aw\",@init_array")
409
410 # define FINI_ARRAY_SECTION_ASM_OP \
411 (TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
412 : "\t.section\t.fini_array,\"aw\",@fini_array")
413 #endif
414
415 #define GLOBAL_ASM_OP \
416 (TARGET_AS100_SYNTAX ? "\t.GLB\t" : "\t.global\t")
417 #define ASM_COMMENT_START " ;"
418 #define ASM_APP_ON ""
419 #define ASM_APP_OFF ""
420 #define LOCAL_LABEL_PREFIX "L"
421 #undef USER_LABEL_PREFIX
422 #define USER_LABEL_PREFIX "_"
423
424 #define ASM_OUTPUT_ALIGN(STREAM, LOG) \
425 do \
426 { \
427 if ((LOG) == 0) \
428 break; \
429 if (TARGET_AS100_SYNTAX) \
430 { \
431 if ((LOG) >= 2) \
432 fprintf (STREAM, "\t.ALIGN 4\t; %d alignment actually requested\n", 1 << (LOG)); \
433 else \
434 fprintf (STREAM, "\t.ALIGN 2\n"); \
435 } \
436 else \
437 fprintf (STREAM, "\t.balign %d\n", 1 << (LOG)); \
438 } \
439 while (0)
440
441 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
442 fprintf (FILE, TARGET_AS100_SYNTAX ? "\t.LWORD L%d\n" : "\t.long .L%d\n", \
443 VALUE)
444
445 /* This is how to output an element of a case-vector that is relative.
446 Note: The local label referenced by the "3b" below is emitted by
447 the tablejump insn. */
448
449 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
450 fprintf (FILE, TARGET_AS100_SYNTAX \
451 ? "\t.LWORD L%d - ?-\n" : "\t.long .L%d - 1b\n", VALUE)
452
453 #define ASM_OUTPUT_SIZE_DIRECTIVE(STREAM, NAME, SIZE) \
454 do \
455 { \
456 HOST_WIDE_INT size_ = (SIZE); \
457 \
458 /* The as100 assembler does not have an equivalent of the SVR4 \
459 .size pseudo-op. */ \
460 if (TARGET_AS100_SYNTAX) \
461 break; \
462 \
463 fputs (SIZE_ASM_OP, STREAM); \
464 assemble_name (STREAM, NAME); \
465 fprintf (STREAM, ", " HOST_WIDE_INT_PRINT_DEC "\n", size_); \
466 } \
467 while (0)
468
469 #define ASM_OUTPUT_MEASURED_SIZE(STREAM, NAME) \
470 do \
471 { \
472 /* The as100 assembler does not have an equivalent of the SVR4 \
473 .size pseudo-op. */ \
474 if (TARGET_AS100_SYNTAX) \
475 break; \
476 fputs (SIZE_ASM_OP, STREAM); \
477 assemble_name (STREAM, NAME); \
478 fputs (", .-", STREAM); \
479 assemble_name (STREAM, NAME); \
480 putc ('\n', STREAM); \
481 } \
482 while (0)
483
484 #define ASM_OUTPUT_TYPE_DIRECTIVE(STREAM, NAME, TYPE) \
485 do \
486 { \
487 /* The as100 assembler does not have an equivalent of the SVR4 \
488 .size pseudo-op. */ \
489 if (TARGET_AS100_SYNTAX) \
490 break; \
491 fputs (TYPE_ASM_OP, STREAM); \
492 assemble_name (STREAM, NAME); \
493 fputs (", ", STREAM); \
494 fprintf (STREAM, TYPE_OPERAND_FMT, TYPE); \
495 putc ('\n', STREAM); \
496 } \
497 while (0)
498
499 #undef ASM_GENERATE_INTERNAL_LABEL
500 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
501 do \
502 { \
503 sprintf (LABEL, TARGET_AS100_SYNTAX ? "*%s%u" : "*.%s%u", \
504 PREFIX, (unsigned) (NUM)); \
505 } \
506 while (0)
507
508 #undef ASM_OUTPUT_EXTERNAL
509 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
510 do \
511 { \
512 if (TARGET_AS100_SYNTAX) \
513 targetm.asm_out.globalize_label (FILE, NAME); \
514 default_elf_asm_output_external (FILE, DECL, NAME); \
515 } \
516 while (0)
517
518 #undef ASM_OUTPUT_ALIGNED_COMMON
519 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
520 do \
521 { \
522 if (TARGET_AS100_SYNTAX) \
523 { \
524 fprintf ((FILE), "\t.GLB\t"); \
525 assemble_name ((FILE), (NAME)); \
526 fprintf ((FILE), "\n"); \
527 assemble_name ((FILE), (NAME)); \
528 switch ((ALIGN) / BITS_PER_UNIT) \
529 { \
530 case 4: \
531 fprintf ((FILE), ":\t.BLKL\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
532 (SIZE) / 4); \
533 break; \
534 case 2: \
535 fprintf ((FILE), ":\t.BLKW\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
536 (SIZE) / 2); \
537 break; \
538 default: \
539 fprintf ((FILE), ":\t.BLKB\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
540 (SIZE)); \
541 break; \
542 } \
543 } \
544 else \
545 { \
546 fprintf ((FILE), "%s", COMMON_ASM_OP); \
547 assemble_name ((FILE), (NAME)); \
548 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",%u\n", \
549 (SIZE), (ALIGN) / BITS_PER_UNIT); \
550 } \
551 } \
552 while (0)
553
554 #undef SKIP_ASM_OP
555 #define SKIP_ASM_OP (TARGET_AS100_SYNTAX ? "\t.BLKB\t" : "\t.zero\t")
556
557 #undef ASM_OUTPUT_LIMITED_STRING
558 #define ASM_OUTPUT_LIMITED_STRING(FILE, STR) \
559 do \
560 { \
561 const unsigned char *_limited_str = \
562 (const unsigned char *) (STR); \
563 unsigned ch; \
564 \
565 fprintf ((FILE), TARGET_AS100_SYNTAX \
566 ? "\t.BYTE\t\"" : "\t.string\t\""); \
567 \
568 for (; (ch = *_limited_str); _limited_str++) \
569 { \
570 int escape; \
571 \
572 switch (escape = ESCAPES[ch]) \
573 { \
574 case 0: \
575 putc (ch, (FILE)); \
576 break; \
577 case 1: \
578 fprintf ((FILE), "\\%03o", ch); \
579 break; \
580 default: \
581 putc ('\\', (FILE)); \
582 putc (escape, (FILE)); \
583 break; \
584 } \
585 } \
586 \
587 fprintf ((FILE), TARGET_AS100_SYNTAX ? "\"\n\t.BYTE\t0\n" : "\"\n");\
588 } \
589 while (0)
590
591 #undef IDENT_ASM_OP
592 #define IDENT_ASM_OP (TARGET_AS100_SYNTAX \
593 ? "\t.END\t; Built by: ": "\t.ident\t")
594
595 /* For PIC put jump tables into the text section so that the offsets that
596 they contain are always computed between two same-section symbols. */
597 #define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
598 \f
599 extern int rx_float_compare_mode;
600 \f
601 /* This is a version of REG_P that also returns TRUE for SUBREGs. */
602 #define RX_REG_P(rtl) (REG_P (rtl) || GET_CODE (rtl) == SUBREG)
603
604 /* Like REG_P except that this macro is true for SET expressions. */
605 #define SET_P(rtl) (GET_CODE (rtl) == SET)
606 \f
607 /* The AS100 assembler does not support .leb128 and .uleb128, but
608 the compiler-build-time configure tests will have enabled their
609 use because GAS supports them. So default to generating STABS
610 debug information instead of DWARF2 when generating AS100
611 compatible output. */
612 #undef PREFERRED_DEBUGGING_TYPE
613 #define PREFERRED_DEBUGGING_TYPE (TARGET_AS100_SYNTAX \
614 ? DBX_DEBUG : DWARF2_DEBUG)
615
616 #define INCOMING_FRAME_SP_OFFSET 4
617 #define ARG_POINTER_CFA_OFFSET(FNDECL) 4
618 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 4
619 \f
620 #define TARGET_USE_FPU (! TARGET_NO_USE_FPU)
621
622 /* This macro is used to decide when RX FPU instructions can be used. */
623 #define ALLOW_RX_FPU_INSNS (TARGET_USE_FPU)
624
625 #define BRANCH_COST(SPEED,PREDICT) 1
626 #define REGISTER_MOVE_COST(MODE,FROM,TO) 2
627
628 #define SELECT_CC_MODE(OP,X,Y) \
629 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CC_ZSmode : \
630 (GET_CODE (X) == PLUS || GET_CODE (X) == MINUS ? CC_ZSCmode : \
631 (GET_CODE (X) == ABS ? CC_ZSOmode : \
632 (GET_CODE (X) == AND || GET_CODE (X) == NOT || GET_CODE (X) == IOR \
633 || GET_CODE (X) == XOR || GET_CODE (X) == ROTATE \
634 || GET_CODE (X) == ROTATERT || GET_CODE (X) == ASHIFTRT \
635 || GET_CODE (X) == LSHIFTRT || GET_CODE (X) == ASHIFT ? CC_ZSmode : \
636 CCmode))))
Mirror of https://gcc.gnu.org/git/gcc.git