1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987-2019 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
31 #include "insn-config.h"
37 #include "cfgcleanup.h"
41 #include "rtlhooks-def.h"
42 #include "tree-pass.h"
46 #include "function-abi.h"
48 /* The basic idea of common subexpression elimination is to go
49 through the code, keeping a record of expressions that would
50 have the same value at the current scan point, and replacing
51 expressions encountered with the cheapest equivalent expression.
53 It is too complicated to keep track of the different possibilities
54 when control paths merge in this code; so, at each label, we forget all
55 that is known and start fresh. This can be described as processing each
56 extended basic block separately. We have a separate pass to perform
59 Note CSE can turn a conditional or computed jump into a nop or
60 an unconditional jump. When this occurs we arrange to run the jump
61 optimizer after CSE to delete the unreachable code.
63 We use two data structures to record the equivalent expressions:
64 a hash table for most expressions, and a vector of "quantity
65 numbers" to record equivalent (pseudo) registers.
67 The use of the special data structure for registers is desirable
68 because it is faster. It is possible because registers references
69 contain a fairly small number, the register number, taken from
70 a contiguously allocated series, and two register references are
71 identical if they have the same number. General expressions
72 do not have any such thing, so the only way to retrieve the
73 information recorded on an expression other than a register
74 is to keep it in a hash table.
76 Registers and "quantity numbers":
78 At the start of each basic block, all of the (hardware and pseudo)
79 registers used in the function are given distinct quantity
80 numbers to indicate their contents. During scan, when the code
81 copies one register into another, we copy the quantity number.
82 When a register is loaded in any other way, we allocate a new
83 quantity number to describe the value generated by this operation.
84 `REG_QTY (N)' records what quantity register N is currently thought
87 All real quantity numbers are greater than or equal to zero.
88 If register N has not been assigned a quantity, `REG_QTY (N)' will
89 equal -N - 1, which is always negative.
91 Quantity numbers below zero do not exist and none of the `qty_table'
92 entries should be referenced with a negative index.
94 We also maintain a bidirectional chain of registers for each
95 quantity number. The `qty_table` members `first_reg' and `last_reg',
96 and `reg_eqv_table' members `next' and `prev' hold these chains.
98 The first register in a chain is the one whose lifespan is least local.
99 Among equals, it is the one that was seen first.
100 We replace any equivalent register with that one.
102 If two registers have the same quantity number, it must be true that
103 REG expressions with qty_table `mode' must be in the hash table for both
104 registers and must be in the same class.
106 The converse is not true. Since hard registers may be referenced in
107 any mode, two REG expressions might be equivalent in the hash table
108 but not have the same quantity number if the quantity number of one
109 of the registers is not the same mode as those expressions.
111 Constants and quantity numbers
113 When a quantity has a known constant value, that value is stored
114 in the appropriate qty_table `const_rtx'. This is in addition to
115 putting the constant in the hash table as is usual for non-regs.
117 Whether a reg or a constant is preferred is determined by the configuration
118 macro CONST_COSTS and will often depend on the constant value. In any
119 event, expressions containing constants can be simplified, by fold_rtx.
121 When a quantity has a known nearly constant value (such as an address
122 of a stack slot), that value is stored in the appropriate qty_table
125 Integer constants don't have a machine mode. However, cse
126 determines the intended machine mode from the destination
127 of the instruction that moves the constant. The machine mode
128 is recorded in the hash table along with the actual RTL
129 constant expression so that different modes are kept separate.
133 To record known equivalences among expressions in general
134 we use a hash table called `table'. It has a fixed number of buckets
135 that contain chains of `struct table_elt' elements for expressions.
136 These chains connect the elements whose expressions have the same
139 Other chains through the same elements connect the elements which
140 currently have equivalent values.
142 Register references in an expression are canonicalized before hashing
143 the expression. This is done using `reg_qty' and qty_table `first_reg'.
144 The hash code of a register reference is computed using the quantity
145 number, not the register number.
147 When the value of an expression changes, it is necessary to remove from the
148 hash table not just that expression but all expressions whose values
149 could be different as a result.
151 1. If the value changing is in memory, except in special cases
152 ANYTHING referring to memory could be changed. That is because
153 nobody knows where a pointer does not point.
154 The function `invalidate_memory' removes what is necessary.
156 The special cases are when the address is constant or is
157 a constant plus a fixed register such as the frame pointer
158 or a static chain pointer. When such addresses are stored in,
159 we can tell exactly which other such addresses must be invalidated
160 due to overlap. `invalidate' does this.
161 All expressions that refer to non-constant
162 memory addresses are also invalidated. `invalidate_memory' does this.
164 2. If the value changing is a register, all expressions
165 containing references to that register, and only those,
168 Because searching the entire hash table for expressions that contain
169 a register is very slow, we try to figure out when it isn't necessary.
170 Precisely, this is necessary only when expressions have been
171 entered in the hash table using this register, and then the value has
172 changed, and then another expression wants to be added to refer to
173 the register's new value. This sequence of circumstances is rare
174 within any one basic block.
176 `REG_TICK' and `REG_IN_TABLE', accessors for members of
177 cse_reg_info, are used to detect this case. REG_TICK (i) is
178 incremented whenever a value is stored in register i.
179 REG_IN_TABLE (i) holds -1 if no references to register i have been
180 entered in the table; otherwise, it contains the value REG_TICK (i)
181 had when the references were entered. If we want to enter a
182 reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
183 remove old references. Until we want to enter a new entry, the
184 mere fact that the two vectors don't match makes the entries be
185 ignored if anyone tries to match them.
187 Registers themselves are entered in the hash table as well as in
188 the equivalent-register chains. However, `REG_TICK' and
189 `REG_IN_TABLE' do not apply to expressions which are simple
190 register references. These expressions are removed from the table
191 immediately when they become invalid, and this can be done even if
192 we do not immediately search for all the expressions that refer to
195 A CLOBBER rtx in an instruction invalidates its operand for further
196 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
197 invalidates everything that resides in memory.
201 Constant expressions that differ only by an additive integer
202 are called related. When a constant expression is put in
203 the table, the related expression with no constant term
204 is also entered. These are made to point at each other
205 so that it is possible to find out if there exists any
206 register equivalent to an expression related to a given expression. */
208 /* Length of qty_table vector. We know in advance we will not need
209 a quantity number this big. */
213 /* Next quantity number to be allocated.
214 This is 1 + the largest number needed so far. */
218 /* Per-qty information tracking.
220 `first_reg' and `last_reg' track the head and tail of the
221 chain of registers which currently contain this quantity.
223 `mode' contains the machine mode of this quantity.
225 `const_rtx' holds the rtx of the constant value of this
226 quantity, if known. A summations of the frame/arg pointer
227 and a constant can also be entered here. When this holds
228 a known value, `const_insn' is the insn which stored the
231 `comparison_{code,const,qty}' are used to track when a
232 comparison between a quantity and some constant or register has
233 been passed. In such a case, we know the results of the comparison
234 in case we see it again. These members record a comparison that
235 is known to be true. `comparison_code' holds the rtx code of such
236 a comparison, else it is set to UNKNOWN and the other two
237 comparison members are undefined. `comparison_const' holds
238 the constant being compared against, or zero if the comparison
239 is not against a constant. `comparison_qty' holds the quantity
240 being compared against when the result is known. If the comparison
241 is not with a register, `comparison_qty' is -1. */
243 struct qty_table_elem
246 rtx_insn
*const_insn
;
247 rtx comparison_const
;
249 unsigned int first_reg
, last_reg
;
250 /* The sizes of these fields should match the sizes of the
251 code and mode fields of struct rtx_def (see rtl.h). */
252 ENUM_BITFIELD(rtx_code
) comparison_code
: 16;
253 ENUM_BITFIELD(machine_mode
) mode
: 8;
256 /* The table of all qtys, indexed by qty number. */
257 static struct qty_table_elem
*qty_table
;
259 /* For machines that have a CC0, we do not record its value in the hash
260 table since its use is guaranteed to be the insn immediately following
261 its definition and any other insn is presumed to invalidate it.
263 Instead, we store below the current and last value assigned to CC0.
264 If it should happen to be a constant, it is stored in preference
265 to the actual assigned value. In case it is a constant, we store
266 the mode in which the constant should be interpreted. */
268 static rtx this_insn_cc0
, prev_insn_cc0
;
269 static machine_mode this_insn_cc0_mode
, prev_insn_cc0_mode
;
271 /* Insn being scanned. */
273 static rtx_insn
*this_insn
;
274 static bool optimize_this_for_speed_p
;
276 /* Index by register number, gives the number of the next (or
277 previous) register in the chain of registers sharing the same
280 Or -1 if this register is at the end of the chain.
282 If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
284 /* Per-register equivalence chain. */
290 /* The table of all register equivalence chains. */
291 static struct reg_eqv_elem
*reg_eqv_table
;
295 /* The timestamp at which this register is initialized. */
296 unsigned int timestamp
;
298 /* The quantity number of the register's current contents. */
301 /* The number of times the register has been altered in the current
305 /* The REG_TICK value at which rtx's containing this register are
306 valid in the hash table. If this does not equal the current
307 reg_tick value, such expressions existing in the hash table are
311 /* The SUBREG that was set when REG_TICK was last incremented. Set
312 to -1 if the last store was to the whole register, not a subreg. */
313 unsigned int subreg_ticked
;
316 /* A table of cse_reg_info indexed by register numbers. */
317 static struct cse_reg_info
*cse_reg_info_table
;
319 /* The size of the above table. */
320 static unsigned int cse_reg_info_table_size
;
322 /* The index of the first entry that has not been initialized. */
323 static unsigned int cse_reg_info_table_first_uninitialized
;
325 /* The timestamp at the beginning of the current run of
326 cse_extended_basic_block. We increment this variable at the beginning of
327 the current run of cse_extended_basic_block. The timestamp field of a
328 cse_reg_info entry matches the value of this variable if and only
329 if the entry has been initialized during the current run of
330 cse_extended_basic_block. */
331 static unsigned int cse_reg_info_timestamp
;
333 /* A HARD_REG_SET containing all the hard registers for which there is
334 currently a REG expression in the hash table. Note the difference
335 from the above variables, which indicate if the REG is mentioned in some
336 expression in the table. */
338 static HARD_REG_SET hard_regs_in_table
;
340 /* True if CSE has altered the CFG. */
341 static bool cse_cfg_altered
;
343 /* True if CSE has altered conditional jump insns in such a way
344 that jump optimization should be redone. */
345 static bool cse_jumps_altered
;
347 /* True if we put a LABEL_REF into the hash table for an INSN
348 without a REG_LABEL_OPERAND, we have to rerun jump after CSE
349 to put in the note. */
350 static bool recorded_label_ref
;
352 /* canon_hash stores 1 in do_not_record
353 if it notices a reference to CC0, PC, or some other volatile
356 static int do_not_record
;
358 /* canon_hash stores 1 in hash_arg_in_memory
359 if it notices a reference to memory within the expression being hashed. */
361 static int hash_arg_in_memory
;
363 /* The hash table contains buckets which are chains of `struct table_elt's,
364 each recording one expression's information.
365 That expression is in the `exp' field.
367 The canon_exp field contains a canonical (from the point of view of
368 alias analysis) version of the `exp' field.
370 Those elements with the same hash code are chained in both directions
371 through the `next_same_hash' and `prev_same_hash' fields.
373 Each set of expressions with equivalent values
374 are on a two-way chain through the `next_same_value'
375 and `prev_same_value' fields, and all point with
376 the `first_same_value' field at the first element in
377 that chain. The chain is in order of increasing cost.
378 Each element's cost value is in its `cost' field.
380 The `in_memory' field is nonzero for elements that
381 involve any reference to memory. These elements are removed
382 whenever a write is done to an unidentified location in memory.
383 To be safe, we assume that a memory address is unidentified unless
384 the address is either a symbol constant or a constant plus
385 the frame pointer or argument pointer.
387 The `related_value' field is used to connect related expressions
388 (that differ by adding an integer).
389 The related expressions are chained in a circular fashion.
390 `related_value' is zero for expressions for which this
393 The `cost' field stores the cost of this element's expression.
394 The `regcost' field stores the value returned by approx_reg_cost for
395 this element's expression.
397 The `is_const' flag is set if the element is a constant (including
400 The `flag' field is used as a temporary during some search routines.
402 The `mode' field is usually the same as GET_MODE (`exp'), but
403 if `exp' is a CONST_INT and has no machine mode then the `mode'
404 field is the mode it was being used as. Each constant is
405 recorded separately for each mode it is used with. */
411 struct table_elt
*next_same_hash
;
412 struct table_elt
*prev_same_hash
;
413 struct table_elt
*next_same_value
;
414 struct table_elt
*prev_same_value
;
415 struct table_elt
*first_same_value
;
416 struct table_elt
*related_value
;
419 /* The size of this field should match the size
420 of the mode field of struct rtx_def (see rtl.h). */
421 ENUM_BITFIELD(machine_mode
) mode
: 8;
427 /* We don't want a lot of buckets, because we rarely have very many
428 things stored in the hash table, and a lot of buckets slows
429 down a lot of loops that happen frequently. */
431 #define HASH_SIZE (1 << HASH_SHIFT)
432 #define HASH_MASK (HASH_SIZE - 1)
434 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
435 register (hard registers may require `do_not_record' to be set). */
438 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
439 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
440 : canon_hash (X, M)) & HASH_MASK)
442 /* Like HASH, but without side-effects. */
443 #define SAFE_HASH(X, M) \
444 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
445 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
446 : safe_hash (X, M)) & HASH_MASK)
448 /* Determine whether register number N is considered a fixed register for the
449 purpose of approximating register costs.
450 It is desirable to replace other regs with fixed regs, to reduce need for
452 A reg wins if it is either the frame pointer or designated as fixed. */
453 #define FIXED_REGNO_P(N) \
454 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
455 || fixed_regs[N] || global_regs[N])
457 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
458 hard registers and pointers into the frame are the cheapest with a cost
459 of 0. Next come pseudos with a cost of one and other hard registers with
460 a cost of 2. Aside from these special cases, call `rtx_cost'. */
462 #define CHEAP_REGNO(N) \
463 (REGNO_PTR_FRAME_P (N) \
464 || (HARD_REGISTER_NUM_P (N) \
465 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
467 #define COST(X, MODE) \
468 (REG_P (X) ? 0 : notreg_cost (X, MODE, SET, 1))
469 #define COST_IN(X, MODE, OUTER, OPNO) \
470 (REG_P (X) ? 0 : notreg_cost (X, MODE, OUTER, OPNO))
472 /* Get the number of times this register has been updated in this
475 #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
477 /* Get the point at which REG was recorded in the table. */
479 #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
481 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
484 #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
486 /* Get the quantity number for REG. */
488 #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
490 /* Determine if the quantity number for register X represents a valid index
491 into the qty_table. */
493 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
495 /* Compare table_elt X and Y and return true iff X is cheaper than Y. */
497 #define CHEAPER(X, Y) \
498 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
500 static struct table_elt
*table
[HASH_SIZE
];
502 /* Chain of `struct table_elt's made so far for this function
503 but currently removed from the table. */
505 static struct table_elt
*free_element_chain
;
507 /* Set to the cost of a constant pool reference if one was found for a
508 symbolic constant. If this was found, it means we should try to
509 convert constants into constant pool entries if they don't fit in
512 static int constant_pool_entries_cost
;
513 static int constant_pool_entries_regcost
;
515 /* Trace a patch through the CFG. */
519 /* The basic block for this path entry. */
523 /* This data describes a block that will be processed by
524 cse_extended_basic_block. */
526 struct cse_basic_block_data
528 /* Total number of SETs in block. */
530 /* Size of current branch path, if any. */
532 /* Current path, indicating which basic_blocks will be processed. */
533 struct branch_path
*path
;
537 /* Pointers to the live in/live out bitmaps for the boundaries of the
539 static bitmap cse_ebb_live_in
, cse_ebb_live_out
;
541 /* A simple bitmap to track which basic blocks have been visited
542 already as part of an already processed extended basic block. */
543 static sbitmap cse_visited_basic_blocks
;
545 static bool fixed_base_plus_p (rtx x
);
546 static int notreg_cost (rtx
, machine_mode
, enum rtx_code
, int);
547 static int preferable (int, int, int, int);
548 static void new_basic_block (void);
549 static void make_new_qty (unsigned int, machine_mode
);
550 static void make_regs_eqv (unsigned int, unsigned int);
551 static void delete_reg_equiv (unsigned int);
552 static int mention_regs (rtx
);
553 static int insert_regs (rtx
, struct table_elt
*, int);
554 static void remove_from_table (struct table_elt
*, unsigned);
555 static void remove_pseudo_from_table (rtx
, unsigned);
556 static struct table_elt
*lookup (rtx
, unsigned, machine_mode
);
557 static struct table_elt
*lookup_for_remove (rtx
, unsigned, machine_mode
);
558 static rtx
lookup_as_function (rtx
, enum rtx_code
);
559 static struct table_elt
*insert_with_costs (rtx
, struct table_elt
*, unsigned,
560 machine_mode
, int, int);
561 static struct table_elt
*insert (rtx
, struct table_elt
*, unsigned,
563 static void merge_equiv_classes (struct table_elt
*, struct table_elt
*);
564 static void invalidate_reg (rtx
, bool);
565 static void invalidate (rtx
, machine_mode
);
566 static void remove_invalid_refs (unsigned int);
567 static void remove_invalid_subreg_refs (unsigned int, poly_uint64
,
569 static void rehash_using_reg (rtx
);
570 static void invalidate_memory (void);
571 static rtx
use_related_value (rtx
, struct table_elt
*);
573 static inline unsigned canon_hash (rtx
, machine_mode
);
574 static inline unsigned safe_hash (rtx
, machine_mode
);
575 static inline unsigned hash_rtx_string (const char *);
577 static rtx
canon_reg (rtx
, rtx_insn
*);
578 static enum rtx_code
find_comparison_args (enum rtx_code
, rtx
*, rtx
*,
581 static rtx
fold_rtx (rtx
, rtx_insn
*);
582 static rtx
equiv_constant (rtx
);
583 static void record_jump_equiv (rtx_insn
*, bool);
584 static void record_jump_cond (enum rtx_code
, machine_mode
, rtx
, rtx
,
586 static void cse_insn (rtx_insn
*);
587 static void cse_prescan_path (struct cse_basic_block_data
*);
588 static void invalidate_from_clobbers (rtx_insn
*);
589 static void invalidate_from_sets_and_clobbers (rtx_insn
*);
590 static rtx
cse_process_notes (rtx
, rtx
, bool *);
591 static void cse_extended_basic_block (struct cse_basic_block_data
*);
592 extern void dump_class (struct table_elt
*);
593 static void get_cse_reg_info_1 (unsigned int regno
);
594 static struct cse_reg_info
* get_cse_reg_info (unsigned int regno
);
596 static void flush_hash_table (void);
597 static bool insn_live_p (rtx_insn
*, int *);
598 static bool set_live_p (rtx
, rtx_insn
*, int *);
599 static void cse_change_cc_mode_insn (rtx_insn
*, rtx
);
600 static void cse_change_cc_mode_insns (rtx_insn
*, rtx_insn
*, rtx
);
601 static machine_mode
cse_cc_succs (basic_block
, basic_block
, rtx
, rtx
,
605 #undef RTL_HOOKS_GEN_LOWPART
606 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
608 static const struct rtl_hooks cse_rtl_hooks
= RTL_HOOKS_INITIALIZER
;
610 /* Nonzero if X has the form (PLUS frame-pointer integer). */
613 fixed_base_plus_p (rtx x
)
615 switch (GET_CODE (x
))
618 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
)
620 if (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
])
625 if (!CONST_INT_P (XEXP (x
, 1)))
627 return fixed_base_plus_p (XEXP (x
, 0));
634 /* Dump the expressions in the equivalence class indicated by CLASSP.
635 This function is used only for debugging. */
637 dump_class (struct table_elt
*classp
)
639 struct table_elt
*elt
;
641 fprintf (stderr
, "Equivalence chain for ");
642 print_rtl (stderr
, classp
->exp
);
643 fprintf (stderr
, ": \n");
645 for (elt
= classp
->first_same_value
; elt
; elt
= elt
->next_same_value
)
647 print_rtl (stderr
, elt
->exp
);
648 fprintf (stderr
, "\n");
652 /* Return an estimate of the cost of the registers used in an rtx.
653 This is mostly the number of different REG expressions in the rtx;
654 however for some exceptions like fixed registers we use a cost of
655 0. If any other hard register reference occurs, return MAX_COST. */
658 approx_reg_cost (const_rtx x
)
661 subrtx_iterator::array_type array
;
662 FOR_EACH_SUBRTX (iter
, array
, x
, NONCONST
)
667 unsigned int regno
= REGNO (x
);
668 if (!CHEAP_REGNO (regno
))
670 if (regno
< FIRST_PSEUDO_REGISTER
)
672 if (targetm
.small_register_classes_for_mode_p (GET_MODE (x
)))
684 /* Return a negative value if an rtx A, whose costs are given by COST_A
685 and REGCOST_A, is more desirable than an rtx B.
686 Return a positive value if A is less desirable, or 0 if the two are
689 preferable (int cost_a
, int regcost_a
, int cost_b
, int regcost_b
)
691 /* First, get rid of cases involving expressions that are entirely
693 if (cost_a
!= cost_b
)
695 if (cost_a
== MAX_COST
)
697 if (cost_b
== MAX_COST
)
701 /* Avoid extending lifetimes of hardregs. */
702 if (regcost_a
!= regcost_b
)
704 if (regcost_a
== MAX_COST
)
706 if (regcost_b
== MAX_COST
)
710 /* Normal operation costs take precedence. */
711 if (cost_a
!= cost_b
)
712 return cost_a
- cost_b
;
713 /* Only if these are identical consider effects on register pressure. */
714 if (regcost_a
!= regcost_b
)
715 return regcost_a
- regcost_b
;
719 /* Internal function, to compute cost when X is not a register; called
720 from COST macro to keep it simple. */
723 notreg_cost (rtx x
, machine_mode mode
, enum rtx_code outer
, int opno
)
725 scalar_int_mode int_mode
, inner_mode
;
726 return ((GET_CODE (x
) == SUBREG
727 && REG_P (SUBREG_REG (x
))
728 && is_int_mode (mode
, &int_mode
)
729 && is_int_mode (GET_MODE (SUBREG_REG (x
)), &inner_mode
)
730 && GET_MODE_SIZE (int_mode
) < GET_MODE_SIZE (inner_mode
)
731 && subreg_lowpart_p (x
)
732 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode
, inner_mode
))
734 : rtx_cost (x
, mode
, outer
, opno
, optimize_this_for_speed_p
) * 2);
738 /* Initialize CSE_REG_INFO_TABLE. */
741 init_cse_reg_info (unsigned int nregs
)
743 /* Do we need to grow the table? */
744 if (nregs
> cse_reg_info_table_size
)
746 unsigned int new_size
;
748 if (cse_reg_info_table_size
< 2048)
750 /* Compute a new size that is a power of 2 and no smaller
751 than the large of NREGS and 64. */
752 new_size
= (cse_reg_info_table_size
753 ? cse_reg_info_table_size
: 64);
755 while (new_size
< nregs
)
760 /* If we need a big table, allocate just enough to hold
765 /* Reallocate the table with NEW_SIZE entries. */
766 free (cse_reg_info_table
);
767 cse_reg_info_table
= XNEWVEC (struct cse_reg_info
, new_size
);
768 cse_reg_info_table_size
= new_size
;
769 cse_reg_info_table_first_uninitialized
= 0;
772 /* Do we have all of the first NREGS entries initialized? */
773 if (cse_reg_info_table_first_uninitialized
< nregs
)
775 unsigned int old_timestamp
= cse_reg_info_timestamp
- 1;
778 /* Put the old timestamp on newly allocated entries so that they
779 will all be considered out of date. We do not touch those
780 entries beyond the first NREGS entries to be nice to the
782 for (i
= cse_reg_info_table_first_uninitialized
; i
< nregs
; i
++)
783 cse_reg_info_table
[i
].timestamp
= old_timestamp
;
785 cse_reg_info_table_first_uninitialized
= nregs
;
789 /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
792 get_cse_reg_info_1 (unsigned int regno
)
794 /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
795 entry will be considered to have been initialized. */
796 cse_reg_info_table
[regno
].timestamp
= cse_reg_info_timestamp
;
798 /* Initialize the rest of the entry. */
799 cse_reg_info_table
[regno
].reg_tick
= 1;
800 cse_reg_info_table
[regno
].reg_in_table
= -1;
801 cse_reg_info_table
[regno
].subreg_ticked
= -1;
802 cse_reg_info_table
[regno
].reg_qty
= -regno
- 1;
805 /* Find a cse_reg_info entry for REGNO. */
807 static inline struct cse_reg_info
*
808 get_cse_reg_info (unsigned int regno
)
810 struct cse_reg_info
*p
= &cse_reg_info_table
[regno
];
812 /* If this entry has not been initialized, go ahead and initialize
814 if (p
->timestamp
!= cse_reg_info_timestamp
)
815 get_cse_reg_info_1 (regno
);
820 /* Clear the hash table and initialize each register with its own quantity,
821 for a new basic block. */
824 new_basic_block (void)
830 /* Invalidate cse_reg_info_table. */
831 cse_reg_info_timestamp
++;
833 /* Clear out hash table state for this pass. */
834 CLEAR_HARD_REG_SET (hard_regs_in_table
);
836 /* The per-quantity values used to be initialized here, but it is
837 much faster to initialize each as it is made in `make_new_qty'. */
839 for (i
= 0; i
< HASH_SIZE
; i
++)
841 struct table_elt
*first
;
846 struct table_elt
*last
= first
;
850 while (last
->next_same_hash
!= NULL
)
851 last
= last
->next_same_hash
;
853 /* Now relink this hash entire chain into
854 the free element list. */
856 last
->next_same_hash
= free_element_chain
;
857 free_element_chain
= first
;
864 /* Say that register REG contains a quantity in mode MODE not in any
865 register before and initialize that quantity. */
868 make_new_qty (unsigned int reg
, machine_mode mode
)
871 struct qty_table_elem
*ent
;
872 struct reg_eqv_elem
*eqv
;
874 gcc_assert (next_qty
< max_qty
);
876 q
= REG_QTY (reg
) = next_qty
++;
878 ent
->first_reg
= reg
;
881 ent
->const_rtx
= ent
->const_insn
= NULL
;
882 ent
->comparison_code
= UNKNOWN
;
884 eqv
= ®_eqv_table
[reg
];
885 eqv
->next
= eqv
->prev
= -1;
888 /* Make reg NEW equivalent to reg OLD.
889 OLD is not changing; NEW is. */
892 make_regs_eqv (unsigned int new_reg
, unsigned int old_reg
)
894 unsigned int lastr
, firstr
;
895 int q
= REG_QTY (old_reg
);
896 struct qty_table_elem
*ent
;
900 /* Nothing should become eqv until it has a "non-invalid" qty number. */
901 gcc_assert (REGNO_QTY_VALID_P (old_reg
));
903 REG_QTY (new_reg
) = q
;
904 firstr
= ent
->first_reg
;
905 lastr
= ent
->last_reg
;
907 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
908 hard regs. Among pseudos, if NEW will live longer than any other reg
909 of the same qty, and that is beyond the current basic block,
910 make it the new canonical replacement for this qty. */
911 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
912 /* Certain fixed registers might be of the class NO_REGS. This means
913 that not only can they not be allocated by the compiler, but
914 they cannot be used in substitutions or canonicalizations
916 && (new_reg
>= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new_reg
) != NO_REGS
)
917 && ((new_reg
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new_reg
))
918 || (new_reg
>= FIRST_PSEUDO_REGISTER
919 && (firstr
< FIRST_PSEUDO_REGISTER
920 || (bitmap_bit_p (cse_ebb_live_out
, new_reg
)
921 && !bitmap_bit_p (cse_ebb_live_out
, firstr
))
922 || (bitmap_bit_p (cse_ebb_live_in
, new_reg
)
923 && !bitmap_bit_p (cse_ebb_live_in
, firstr
))))))
925 reg_eqv_table
[firstr
].prev
= new_reg
;
926 reg_eqv_table
[new_reg
].next
= firstr
;
927 reg_eqv_table
[new_reg
].prev
= -1;
928 ent
->first_reg
= new_reg
;
932 /* If NEW is a hard reg (known to be non-fixed), insert at end.
933 Otherwise, insert before any non-fixed hard regs that are at the
934 end. Registers of class NO_REGS cannot be used as an
935 equivalent for anything. */
936 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_eqv_table
[lastr
].prev
>= 0
937 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
938 && new_reg
>= FIRST_PSEUDO_REGISTER
)
939 lastr
= reg_eqv_table
[lastr
].prev
;
940 reg_eqv_table
[new_reg
].next
= reg_eqv_table
[lastr
].next
;
941 if (reg_eqv_table
[lastr
].next
>= 0)
942 reg_eqv_table
[reg_eqv_table
[lastr
].next
].prev
= new_reg
;
944 qty_table
[q
].last_reg
= new_reg
;
945 reg_eqv_table
[lastr
].next
= new_reg
;
946 reg_eqv_table
[new_reg
].prev
= lastr
;
950 /* Remove REG from its equivalence class. */
953 delete_reg_equiv (unsigned int reg
)
955 struct qty_table_elem
*ent
;
956 int q
= REG_QTY (reg
);
959 /* If invalid, do nothing. */
960 if (! REGNO_QTY_VALID_P (reg
))
965 p
= reg_eqv_table
[reg
].prev
;
966 n
= reg_eqv_table
[reg
].next
;
969 reg_eqv_table
[n
].prev
= p
;
973 reg_eqv_table
[p
].next
= n
;
977 REG_QTY (reg
) = -reg
- 1;
980 /* Remove any invalid expressions from the hash table
981 that refer to any of the registers contained in expression X.
983 Make sure that newly inserted references to those registers
984 as subexpressions will be considered valid.
986 mention_regs is not called when a register itself
987 is being stored in the table.
989 Return 1 if we have done something that may have changed the hash code
1003 code
= GET_CODE (x
);
1006 unsigned int regno
= REGNO (x
);
1007 unsigned int endregno
= END_REGNO (x
);
1010 for (i
= regno
; i
< endregno
; i
++)
1012 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1013 remove_invalid_refs (i
);
1015 REG_IN_TABLE (i
) = REG_TICK (i
);
1016 SUBREG_TICKED (i
) = -1;
1022 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1023 pseudo if they don't use overlapping words. We handle only pseudos
1024 here for simplicity. */
1025 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
))
1026 && REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
)
1028 unsigned int i
= REGNO (SUBREG_REG (x
));
1030 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1032 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1033 the last store to this register really stored into this
1034 subreg, then remove the memory of this subreg.
1035 Otherwise, remove any memory of the entire register and
1036 all its subregs from the table. */
1037 if (REG_TICK (i
) - REG_IN_TABLE (i
) > 1
1038 || SUBREG_TICKED (i
) != REGNO (SUBREG_REG (x
)))
1039 remove_invalid_refs (i
);
1041 remove_invalid_subreg_refs (i
, SUBREG_BYTE (x
), GET_MODE (x
));
1044 REG_IN_TABLE (i
) = REG_TICK (i
);
1045 SUBREG_TICKED (i
) = REGNO (SUBREG_REG (x
));
1049 /* If X is a comparison or a COMPARE and either operand is a register
1050 that does not have a quantity, give it one. This is so that a later
1051 call to record_jump_equiv won't cause X to be assigned a different
1052 hash code and not found in the table after that call.
1054 It is not necessary to do this here, since rehash_using_reg can
1055 fix up the table later, but doing this here eliminates the need to
1056 call that expensive function in the most common case where the only
1057 use of the register is in the comparison. */
1059 if (code
== COMPARE
|| COMPARISON_P (x
))
1061 if (REG_P (XEXP (x
, 0))
1062 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
1063 if (insert_regs (XEXP (x
, 0), NULL
, 0))
1065 rehash_using_reg (XEXP (x
, 0));
1069 if (REG_P (XEXP (x
, 1))
1070 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
1071 if (insert_regs (XEXP (x
, 1), NULL
, 0))
1073 rehash_using_reg (XEXP (x
, 1));
1078 fmt
= GET_RTX_FORMAT (code
);
1079 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1081 changed
|= mention_regs (XEXP (x
, i
));
1082 else if (fmt
[i
] == 'E')
1083 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1084 changed
|= mention_regs (XVECEXP (x
, i
, j
));
1089 /* Update the register quantities for inserting X into the hash table
1090 with a value equivalent to CLASSP.
1091 (If the class does not contain a REG, it is irrelevant.)
1092 If MODIFIED is nonzero, X is a destination; it is being modified.
1093 Note that delete_reg_equiv should be called on a register
1094 before insert_regs is done on that register with MODIFIED != 0.
1096 Nonzero value means that elements of reg_qty have changed
1097 so X's hash code may be different. */
1100 insert_regs (rtx x
, struct table_elt
*classp
, int modified
)
1104 unsigned int regno
= REGNO (x
);
1107 /* If REGNO is in the equivalence table already but is of the
1108 wrong mode for that equivalence, don't do anything here. */
1110 qty_valid
= REGNO_QTY_VALID_P (regno
);
1113 struct qty_table_elem
*ent
= &qty_table
[REG_QTY (regno
)];
1115 if (ent
->mode
!= GET_MODE (x
))
1119 if (modified
|| ! qty_valid
)
1122 for (classp
= classp
->first_same_value
;
1124 classp
= classp
->next_same_value
)
1125 if (REG_P (classp
->exp
)
1126 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1128 unsigned c_regno
= REGNO (classp
->exp
);
1130 gcc_assert (REGNO_QTY_VALID_P (c_regno
));
1132 /* Suppose that 5 is hard reg and 100 and 101 are
1135 (set (reg:si 100) (reg:si 5))
1136 (set (reg:si 5) (reg:si 100))
1137 (set (reg:di 101) (reg:di 5))
1139 We would now set REG_QTY (101) = REG_QTY (5), but the
1140 entry for 5 is in SImode. When we use this later in
1141 copy propagation, we get the register in wrong mode. */
1142 if (qty_table
[REG_QTY (c_regno
)].mode
!= GET_MODE (x
))
1145 make_regs_eqv (regno
, c_regno
);
1149 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1150 than REG_IN_TABLE to find out if there was only a single preceding
1151 invalidation - for the SUBREG - or another one, which would be
1152 for the full register. However, if we find here that REG_TICK
1153 indicates that the register is invalid, it means that it has
1154 been invalidated in a separate operation. The SUBREG might be used
1155 now (then this is a recursive call), or we might use the full REG
1156 now and a SUBREG of it later. So bump up REG_TICK so that
1157 mention_regs will do the right thing. */
1159 && REG_IN_TABLE (regno
) >= 0
1160 && REG_TICK (regno
) == REG_IN_TABLE (regno
) + 1)
1162 make_new_qty (regno
, GET_MODE (x
));
1169 /* If X is a SUBREG, we will likely be inserting the inner register in the
1170 table. If that register doesn't have an assigned quantity number at
1171 this point but does later, the insertion that we will be doing now will
1172 not be accessible because its hash code will have changed. So assign
1173 a quantity number now. */
1175 else if (GET_CODE (x
) == SUBREG
&& REG_P (SUBREG_REG (x
))
1176 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1178 insert_regs (SUBREG_REG (x
), NULL
, 0);
1183 return mention_regs (x
);
1187 /* Compute upper and lower anchors for CST. Also compute the offset of CST
1188 from these anchors/bases such that *_BASE + *_OFFS = CST. Return false iff
1189 CST is equal to an anchor. */
1192 compute_const_anchors (rtx cst
,
1193 HOST_WIDE_INT
*lower_base
, HOST_WIDE_INT
*lower_offs
,
1194 HOST_WIDE_INT
*upper_base
, HOST_WIDE_INT
*upper_offs
)
1196 HOST_WIDE_INT n
= INTVAL (cst
);
1198 *lower_base
= n
& ~(targetm
.const_anchor
- 1);
1199 if (*lower_base
== n
)
1203 (n
+ (targetm
.const_anchor
- 1)) & ~(targetm
.const_anchor
- 1);
1204 *upper_offs
= n
- *upper_base
;
1205 *lower_offs
= n
- *lower_base
;
1209 /* Insert the equivalence between ANCHOR and (REG + OFF) in mode MODE. */
1212 insert_const_anchor (HOST_WIDE_INT anchor
, rtx reg
, HOST_WIDE_INT offs
,
1215 struct table_elt
*elt
;
1220 anchor_exp
= GEN_INT (anchor
);
1221 hash
= HASH (anchor_exp
, mode
);
1222 elt
= lookup (anchor_exp
, hash
, mode
);
1224 elt
= insert (anchor_exp
, NULL
, hash
, mode
);
1226 exp
= plus_constant (mode
, reg
, offs
);
1227 /* REG has just been inserted and the hash codes recomputed. */
1229 hash
= HASH (exp
, mode
);
1231 /* Use the cost of the register rather than the whole expression. When
1232 looking up constant anchors we will further offset the corresponding
1233 expression therefore it does not make sense to prefer REGs over
1234 reg-immediate additions. Prefer instead the oldest expression. Also
1235 don't prefer pseudos over hard regs so that we derive constants in
1236 argument registers from other argument registers rather than from the
1237 original pseudo that was used to synthesize the constant. */
1238 insert_with_costs (exp
, elt
, hash
, mode
, COST (reg
, mode
), 1);
1241 /* The constant CST is equivalent to the register REG. Create
1242 equivalences between the two anchors of CST and the corresponding
1243 register-offset expressions using REG. */
1246 insert_const_anchors (rtx reg
, rtx cst
, machine_mode mode
)
1248 HOST_WIDE_INT lower_base
, lower_offs
, upper_base
, upper_offs
;
1250 if (!compute_const_anchors (cst
, &lower_base
, &lower_offs
,
1251 &upper_base
, &upper_offs
))
1254 /* Ignore anchors of value 0. Constants accessible from zero are
1256 if (lower_base
!= 0)
1257 insert_const_anchor (lower_base
, reg
, -lower_offs
, mode
);
1259 if (upper_base
!= 0)
1260 insert_const_anchor (upper_base
, reg
, -upper_offs
, mode
);
1263 /* We need to express ANCHOR_ELT->exp + OFFS. Walk the equivalence list of
1264 ANCHOR_ELT and see if offsetting any of the entries by OFFS would create a
1265 valid expression. Return the cheapest and oldest of such expressions. In
1266 *OLD, return how old the resulting expression is compared to the other
1267 equivalent expressions. */
1270 find_reg_offset_for_const (struct table_elt
*anchor_elt
, HOST_WIDE_INT offs
,
1273 struct table_elt
*elt
;
1275 struct table_elt
*match_elt
;
1278 /* Find the cheapest and *oldest* expression to maximize the chance of
1279 reusing the same pseudo. */
1283 for (elt
= anchor_elt
->first_same_value
, idx
= 0;
1285 elt
= elt
->next_same_value
, idx
++)
1287 if (match_elt
&& CHEAPER (match_elt
, elt
))
1290 if (REG_P (elt
->exp
)
1291 || (GET_CODE (elt
->exp
) == PLUS
1292 && REG_P (XEXP (elt
->exp
, 0))
1293 && GET_CODE (XEXP (elt
->exp
, 1)) == CONST_INT
))
1297 /* Ignore expressions that are no longer valid. */
1298 if (!REG_P (elt
->exp
) && !exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
1301 x
= plus_constant (GET_MODE (elt
->exp
), elt
->exp
, offs
);
1303 || (GET_CODE (x
) == PLUS
1304 && IN_RANGE (INTVAL (XEXP (x
, 1)),
1305 -targetm
.const_anchor
,
1306 targetm
.const_anchor
- 1)))
1318 /* Try to express the constant SRC_CONST using a register+offset expression
1319 derived from a constant anchor. Return it if successful or NULL_RTX,
1323 try_const_anchors (rtx src_const
, machine_mode mode
)
1325 struct table_elt
*lower_elt
, *upper_elt
;
1326 HOST_WIDE_INT lower_base
, lower_offs
, upper_base
, upper_offs
;
1327 rtx lower_anchor_rtx
, upper_anchor_rtx
;
1328 rtx lower_exp
= NULL_RTX
, upper_exp
= NULL_RTX
;
1329 unsigned lower_old
, upper_old
;
1331 /* CONST_INT is used for CC modes, but we should leave those alone. */
1332 if (GET_MODE_CLASS (mode
) == MODE_CC
)
1335 gcc_assert (SCALAR_INT_MODE_P (mode
));
1336 if (!compute_const_anchors (src_const
, &lower_base
, &lower_offs
,
1337 &upper_base
, &upper_offs
))
1340 lower_anchor_rtx
= GEN_INT (lower_base
);
1341 upper_anchor_rtx
= GEN_INT (upper_base
);
1342 lower_elt
= lookup (lower_anchor_rtx
, HASH (lower_anchor_rtx
, mode
), mode
);
1343 upper_elt
= lookup (upper_anchor_rtx
, HASH (upper_anchor_rtx
, mode
), mode
);
1346 lower_exp
= find_reg_offset_for_const (lower_elt
, lower_offs
, &lower_old
);
1348 upper_exp
= find_reg_offset_for_const (upper_elt
, upper_offs
, &upper_old
);
1355 /* Return the older expression. */
1356 return (upper_old
> lower_old
? upper_exp
: lower_exp
);
1359 /* Look in or update the hash table. */
1361 /* Remove table element ELT from use in the table.
1362 HASH is its hash code, made using the HASH macro.
1363 It's an argument because often that is known in advance
1364 and we save much time not recomputing it. */
1367 remove_from_table (struct table_elt
*elt
, unsigned int hash
)
1372 /* Mark this element as removed. See cse_insn. */
1373 elt
->first_same_value
= 0;
1375 /* Remove the table element from its equivalence class. */
1378 struct table_elt
*prev
= elt
->prev_same_value
;
1379 struct table_elt
*next
= elt
->next_same_value
;
1382 next
->prev_same_value
= prev
;
1385 prev
->next_same_value
= next
;
1388 struct table_elt
*newfirst
= next
;
1391 next
->first_same_value
= newfirst
;
1392 next
= next
->next_same_value
;
1397 /* Remove the table element from its hash bucket. */
1400 struct table_elt
*prev
= elt
->prev_same_hash
;
1401 struct table_elt
*next
= elt
->next_same_hash
;
1404 next
->prev_same_hash
= prev
;
1407 prev
->next_same_hash
= next
;
1408 else if (table
[hash
] == elt
)
1412 /* This entry is not in the proper hash bucket. This can happen
1413 when two classes were merged by `merge_equiv_classes'. Search
1414 for the hash bucket that it heads. This happens only very
1415 rarely, so the cost is acceptable. */
1416 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1417 if (table
[hash
] == elt
)
1422 /* Remove the table element from its related-value circular chain. */
1424 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1426 struct table_elt
*p
= elt
->related_value
;
1428 while (p
->related_value
!= elt
)
1429 p
= p
->related_value
;
1430 p
->related_value
= elt
->related_value
;
1431 if (p
->related_value
== p
)
1432 p
->related_value
= 0;
1435 /* Now add it to the free element chain. */
1436 elt
->next_same_hash
= free_element_chain
;
1437 free_element_chain
= elt
;
1440 /* Same as above, but X is a pseudo-register. */
1443 remove_pseudo_from_table (rtx x
, unsigned int hash
)
1445 struct table_elt
*elt
;
1447 /* Because a pseudo-register can be referenced in more than one
1448 mode, we might have to remove more than one table entry. */
1449 while ((elt
= lookup_for_remove (x
, hash
, VOIDmode
)))
1450 remove_from_table (elt
, hash
);
1453 /* Look up X in the hash table and return its table element,
1454 or 0 if X is not in the table.
1456 MODE is the machine-mode of X, or if X is an integer constant
1457 with VOIDmode then MODE is the mode with which X will be used.
1459 Here we are satisfied to find an expression whose tree structure
1462 static struct table_elt
*
1463 lookup (rtx x
, unsigned int hash
, machine_mode mode
)
1465 struct table_elt
*p
;
1467 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1468 if (mode
== p
->mode
&& ((x
== p
->exp
&& REG_P (x
))
1469 || exp_equiv_p (x
, p
->exp
, !REG_P (x
), false)))
1475 /* Like `lookup' but don't care whether the table element uses invalid regs.
1476 Also ignore discrepancies in the machine mode of a register. */
1478 static struct table_elt
*
1479 lookup_for_remove (rtx x
, unsigned int hash
, machine_mode mode
)
1481 struct table_elt
*p
;
1485 unsigned int regno
= REGNO (x
);
1487 /* Don't check the machine mode when comparing registers;
1488 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1489 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1491 && REGNO (p
->exp
) == regno
)
1496 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1498 && (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, false)))
1505 /* Look for an expression equivalent to X and with code CODE.
1506 If one is found, return that expression. */
1509 lookup_as_function (rtx x
, enum rtx_code code
)
1512 = lookup (x
, SAFE_HASH (x
, VOIDmode
), GET_MODE (x
));
1517 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1518 if (GET_CODE (p
->exp
) == code
1519 /* Make sure this is a valid entry in the table. */
1520 && exp_equiv_p (p
->exp
, p
->exp
, 1, false))
1526 /* Insert X in the hash table, assuming HASH is its hash code and
1527 CLASSP is an element of the class it should go in (or 0 if a new
1528 class should be made). COST is the code of X and reg_cost is the
1529 cost of registers in X. It is inserted at the proper position to
1530 keep the class in the order cheapest first.
1532 MODE is the machine-mode of X, or if X is an integer constant
1533 with VOIDmode then MODE is the mode with which X will be used.
1535 For elements of equal cheapness, the most recent one
1536 goes in front, except that the first element in the list
1537 remains first unless a cheaper element is added. The order of
1538 pseudo-registers does not matter, as canon_reg will be called to
1539 find the cheapest when a register is retrieved from the table.
1541 The in_memory field in the hash table element is set to 0.
1542 The caller must set it nonzero if appropriate.
1544 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1545 and if insert_regs returns a nonzero value
1546 you must then recompute its hash code before calling here.
1548 If necessary, update table showing constant values of quantities. */
1550 static struct table_elt
*
1551 insert_with_costs (rtx x
, struct table_elt
*classp
, unsigned int hash
,
1552 machine_mode mode
, int cost
, int reg_cost
)
1554 struct table_elt
*elt
;
1556 /* If X is a register and we haven't made a quantity for it,
1557 something is wrong. */
1558 gcc_assert (!REG_P (x
) || REGNO_QTY_VALID_P (REGNO (x
)));
1560 /* If X is a hard register, show it is being put in the table. */
1561 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1562 add_to_hard_reg_set (&hard_regs_in_table
, GET_MODE (x
), REGNO (x
));
1564 /* Put an element for X into the right hash bucket. */
1566 elt
= free_element_chain
;
1568 free_element_chain
= elt
->next_same_hash
;
1570 elt
= XNEW (struct table_elt
);
1573 elt
->canon_exp
= NULL_RTX
;
1575 elt
->regcost
= reg_cost
;
1576 elt
->next_same_value
= 0;
1577 elt
->prev_same_value
= 0;
1578 elt
->next_same_hash
= table
[hash
];
1579 elt
->prev_same_hash
= 0;
1580 elt
->related_value
= 0;
1583 elt
->is_const
= (CONSTANT_P (x
) || fixed_base_plus_p (x
));
1586 table
[hash
]->prev_same_hash
= elt
;
1589 /* Put it into the proper value-class. */
1592 classp
= classp
->first_same_value
;
1593 if (CHEAPER (elt
, classp
))
1594 /* Insert at the head of the class. */
1596 struct table_elt
*p
;
1597 elt
->next_same_value
= classp
;
1598 classp
->prev_same_value
= elt
;
1599 elt
->first_same_value
= elt
;
1601 for (p
= classp
; p
; p
= p
->next_same_value
)
1602 p
->first_same_value
= elt
;
1606 /* Insert not at head of the class. */
1607 /* Put it after the last element cheaper than X. */
1608 struct table_elt
*p
, *next
;
1611 (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1615 /* Put it after P and before NEXT. */
1616 elt
->next_same_value
= next
;
1618 next
->prev_same_value
= elt
;
1620 elt
->prev_same_value
= p
;
1621 p
->next_same_value
= elt
;
1622 elt
->first_same_value
= classp
;
1626 elt
->first_same_value
= elt
;
1628 /* If this is a constant being set equivalent to a register or a register
1629 being set equivalent to a constant, note the constant equivalence.
1631 If this is a constant, it cannot be equivalent to a different constant,
1632 and a constant is the only thing that can be cheaper than a register. So
1633 we know the register is the head of the class (before the constant was
1636 If this is a register that is not already known equivalent to a
1637 constant, we must check the entire class.
1639 If this is a register that is already known equivalent to an insn,
1640 update the qtys `const_insn' to show that `this_insn' is the latest
1641 insn making that quantity equivalent to the constant. */
1643 if (elt
->is_const
&& classp
&& REG_P (classp
->exp
)
1646 int exp_q
= REG_QTY (REGNO (classp
->exp
));
1647 struct qty_table_elem
*exp_ent
= &qty_table
[exp_q
];
1649 exp_ent
->const_rtx
= gen_lowpart (exp_ent
->mode
, x
);
1650 exp_ent
->const_insn
= this_insn
;
1655 && ! qty_table
[REG_QTY (REGNO (x
))].const_rtx
1658 struct table_elt
*p
;
1660 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1662 if (p
->is_const
&& !REG_P (p
->exp
))
1664 int x_q
= REG_QTY (REGNO (x
));
1665 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
1668 = gen_lowpart (GET_MODE (x
), p
->exp
);
1669 x_ent
->const_insn
= this_insn
;
1676 && qty_table
[REG_QTY (REGNO (x
))].const_rtx
1677 && GET_MODE (x
) == qty_table
[REG_QTY (REGNO (x
))].mode
)
1678 qty_table
[REG_QTY (REGNO (x
))].const_insn
= this_insn
;
1680 /* If this is a constant with symbolic value,
1681 and it has a term with an explicit integer value,
1682 link it up with related expressions. */
1683 if (GET_CODE (x
) == CONST
)
1685 rtx subexp
= get_related_value (x
);
1687 struct table_elt
*subelt
, *subelt_prev
;
1691 /* Get the integer-free subexpression in the hash table. */
1692 subhash
= SAFE_HASH (subexp
, mode
);
1693 subelt
= lookup (subexp
, subhash
, mode
);
1695 subelt
= insert (subexp
, NULL
, subhash
, mode
);
1696 /* Initialize SUBELT's circular chain if it has none. */
1697 if (subelt
->related_value
== 0)
1698 subelt
->related_value
= subelt
;
1699 /* Find the element in the circular chain that precedes SUBELT. */
1700 subelt_prev
= subelt
;
1701 while (subelt_prev
->related_value
!= subelt
)
1702 subelt_prev
= subelt_prev
->related_value
;
1703 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1704 This way the element that follows SUBELT is the oldest one. */
1705 elt
->related_value
= subelt_prev
->related_value
;
1706 subelt_prev
->related_value
= elt
;
1713 /* Wrap insert_with_costs by passing the default costs. */
1715 static struct table_elt
*
1716 insert (rtx x
, struct table_elt
*classp
, unsigned int hash
,
1719 return insert_with_costs (x
, classp
, hash
, mode
,
1720 COST (x
, mode
), approx_reg_cost (x
));
1724 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1725 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1726 the two classes equivalent.
1728 CLASS1 will be the surviving class; CLASS2 should not be used after this
1731 Any invalid entries in CLASS2 will not be copied. */
1734 merge_equiv_classes (struct table_elt
*class1
, struct table_elt
*class2
)
1736 struct table_elt
*elt
, *next
, *new_elt
;
1738 /* Ensure we start with the head of the classes. */
1739 class1
= class1
->first_same_value
;
1740 class2
= class2
->first_same_value
;
1742 /* If they were already equal, forget it. */
1743 if (class1
== class2
)
1746 for (elt
= class2
; elt
; elt
= next
)
1750 machine_mode mode
= elt
->mode
;
1752 next
= elt
->next_same_value
;
1754 /* Remove old entry, make a new one in CLASS1's class.
1755 Don't do this for invalid entries as we cannot find their
1756 hash code (it also isn't necessary). */
1757 if (REG_P (exp
) || exp_equiv_p (exp
, exp
, 1, false))
1759 bool need_rehash
= false;
1761 hash_arg_in_memory
= 0;
1762 hash
= HASH (exp
, mode
);
1766 need_rehash
= REGNO_QTY_VALID_P (REGNO (exp
));
1767 delete_reg_equiv (REGNO (exp
));
1770 if (REG_P (exp
) && REGNO (exp
) >= FIRST_PSEUDO_REGISTER
)
1771 remove_pseudo_from_table (exp
, hash
);
1773 remove_from_table (elt
, hash
);
1775 if (insert_regs (exp
, class1
, 0) || need_rehash
)
1777 rehash_using_reg (exp
);
1778 hash
= HASH (exp
, mode
);
1780 new_elt
= insert (exp
, class1
, hash
, mode
);
1781 new_elt
->in_memory
= hash_arg_in_memory
;
1782 if (GET_CODE (exp
) == ASM_OPERANDS
&& elt
->cost
== MAX_COST
)
1783 new_elt
->cost
= MAX_COST
;
1788 /* Flush the entire hash table. */
1791 flush_hash_table (void)
1794 struct table_elt
*p
;
1796 for (i
= 0; i
< HASH_SIZE
; i
++)
1797 for (p
= table
[i
]; p
; p
= table
[i
])
1799 /* Note that invalidate can remove elements
1800 after P in the current hash chain. */
1802 invalidate (p
->exp
, VOIDmode
);
1804 remove_from_table (p
, i
);
1808 /* Check whether an anti dependence exists between X and EXP. MODE and
1809 ADDR are as for canon_anti_dependence. */
1812 check_dependence (const_rtx x
, rtx exp
, machine_mode mode
, rtx addr
)
1814 subrtx_iterator::array_type array
;
1815 FOR_EACH_SUBRTX (iter
, array
, x
, NONCONST
)
1817 const_rtx x
= *iter
;
1818 if (MEM_P (x
) && canon_anti_dependence (x
, true, exp
, mode
, addr
))
1824 /* Remove from the hash table, or mark as invalid, all expressions whose
1825 values could be altered by storing in register X.
1827 CLOBBER_HIGH is set if X was part of a CLOBBER_HIGH expression. */
1830 invalidate_reg (rtx x
, bool clobber_high
)
1832 gcc_assert (GET_CODE (x
) == REG
);
1834 /* If X is a register, dependencies on its contents are recorded
1835 through the qty number mechanism. Just change the qty number of
1836 the register, mark it as invalid for expressions that refer to it,
1837 and remove it itself. */
1838 unsigned int regno
= REGNO (x
);
1839 unsigned int hash
= HASH (x
, GET_MODE (x
));
1841 /* Remove REGNO from any quantity list it might be on and indicate
1842 that its value might have changed. If it is a pseudo, remove its
1843 entry from the hash table.
1845 For a hard register, we do the first two actions above for any
1846 additional hard registers corresponding to X. Then, if any of these
1847 registers are in the table, we must remove any REG entries that
1848 overlap these registers. */
1850 delete_reg_equiv (regno
);
1852 SUBREG_TICKED (regno
) = -1;
1854 if (regno
>= FIRST_PSEUDO_REGISTER
)
1856 gcc_assert (!clobber_high
);
1857 remove_pseudo_from_table (x
, hash
);
1861 HOST_WIDE_INT in_table
= TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1862 unsigned int endregno
= END_REGNO (x
);
1864 struct table_elt
*p
, *next
;
1866 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1868 for (rn
= regno
+ 1; rn
< endregno
; rn
++)
1870 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, rn
);
1871 CLEAR_HARD_REG_BIT (hard_regs_in_table
, rn
);
1872 delete_reg_equiv (rn
);
1874 SUBREG_TICKED (rn
) = -1;
1878 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1879 for (p
= table
[hash
]; p
; p
= next
)
1881 next
= p
->next_same_hash
;
1883 if (!REG_P (p
->exp
) || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1888 if (reg_is_clobbered_by_clobber_high (p
->exp
, x
))
1889 remove_from_table (p
, hash
);
1893 unsigned int tregno
= REGNO (p
->exp
);
1894 unsigned int tendregno
= END_REGNO (p
->exp
);
1895 if (tendregno
> regno
&& tregno
< endregno
)
1896 remove_from_table (p
, hash
);
1902 /* Remove from the hash table, or mark as invalid, all expressions whose
1903 values could be altered by storing in X. X is a register, a subreg, or
1904 a memory reference with nonvarying address (because, when a memory
1905 reference with a varying address is stored in, all memory references are
1906 removed by invalidate_memory so specific invalidation is superfluous).
1907 FULL_MODE, if not VOIDmode, indicates that this much should be
1908 invalidated instead of just the amount indicated by the mode of X. This
1909 is only used for bitfield stores into memory.
1911 A nonvarying address may be just a register or just a symbol reference,
1912 or it may be either of those plus a numeric offset. */
1915 invalidate (rtx x
, machine_mode full_mode
)
1918 struct table_elt
*p
;
1921 switch (GET_CODE (x
))
1924 invalidate_reg (x
, false);
1928 invalidate (SUBREG_REG (x
), VOIDmode
);
1932 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; --i
)
1933 invalidate (XVECEXP (x
, 0, i
), VOIDmode
);
1937 /* This is part of a disjoint return value; extract the location in
1938 question ignoring the offset. */
1939 invalidate (XEXP (x
, 0), VOIDmode
);
1943 addr
= canon_rtx (get_addr (XEXP (x
, 0)));
1944 /* Calculate the canonical version of X here so that
1945 true_dependence doesn't generate new RTL for X on each call. */
1948 /* Remove all hash table elements that refer to overlapping pieces of
1950 if (full_mode
== VOIDmode
)
1951 full_mode
= GET_MODE (x
);
1953 for (i
= 0; i
< HASH_SIZE
; i
++)
1955 struct table_elt
*next
;
1957 for (p
= table
[i
]; p
; p
= next
)
1959 next
= p
->next_same_hash
;
1962 /* Just canonicalize the expression once;
1963 otherwise each time we call invalidate
1964 true_dependence will canonicalize the
1965 expression again. */
1967 p
->canon_exp
= canon_rtx (p
->exp
);
1968 if (check_dependence (p
->canon_exp
, x
, full_mode
, addr
))
1969 remove_from_table (p
, i
);
1980 /* Invalidate DEST. Used when DEST is not going to be added
1981 into the hash table for some reason, e.g. do_not_record
1985 invalidate_dest (rtx dest
)
1988 || GET_CODE (dest
) == SUBREG
1990 invalidate (dest
, VOIDmode
);
1991 else if (GET_CODE (dest
) == STRICT_LOW_PART
1992 || GET_CODE (dest
) == ZERO_EXTRACT
)
1993 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
1996 /* Remove all expressions that refer to register REGNO,
1997 since they are already invalid, and we are about to
1998 mark that register valid again and don't want the old
1999 expressions to reappear as valid. */
2002 remove_invalid_refs (unsigned int regno
)
2005 struct table_elt
*p
, *next
;
2007 for (i
= 0; i
< HASH_SIZE
; i
++)
2008 for (p
= table
[i
]; p
; p
= next
)
2010 next
= p
->next_same_hash
;
2011 if (!REG_P (p
->exp
) && refers_to_regno_p (regno
, p
->exp
))
2012 remove_from_table (p
, i
);
2016 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
2019 remove_invalid_subreg_refs (unsigned int regno
, poly_uint64 offset
,
2023 struct table_elt
*p
, *next
;
2025 for (i
= 0; i
< HASH_SIZE
; i
++)
2026 for (p
= table
[i
]; p
; p
= next
)
2029 next
= p
->next_same_hash
;
2032 && (GET_CODE (exp
) != SUBREG
2033 || !REG_P (SUBREG_REG (exp
))
2034 || REGNO (SUBREG_REG (exp
)) != regno
2035 || ranges_maybe_overlap_p (SUBREG_BYTE (exp
),
2036 GET_MODE_SIZE (GET_MODE (exp
)),
2037 offset
, GET_MODE_SIZE (mode
)))
2038 && refers_to_regno_p (regno
, p
->exp
))
2039 remove_from_table (p
, i
);
2043 /* Recompute the hash codes of any valid entries in the hash table that
2044 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2046 This is called when we make a jump equivalence. */
2049 rehash_using_reg (rtx x
)
2052 struct table_elt
*p
, *next
;
2055 if (GET_CODE (x
) == SUBREG
)
2058 /* If X is not a register or if the register is known not to be in any
2059 valid entries in the table, we have no work to do. */
2062 || REG_IN_TABLE (REGNO (x
)) < 0
2063 || REG_IN_TABLE (REGNO (x
)) != REG_TICK (REGNO (x
)))
2066 /* Scan all hash chains looking for valid entries that mention X.
2067 If we find one and it is in the wrong hash chain, move it. */
2069 for (i
= 0; i
< HASH_SIZE
; i
++)
2070 for (p
= table
[i
]; p
; p
= next
)
2072 next
= p
->next_same_hash
;
2073 if (reg_mentioned_p (x
, p
->exp
)
2074 && exp_equiv_p (p
->exp
, p
->exp
, 1, false)
2075 && i
!= (hash
= SAFE_HASH (p
->exp
, p
->mode
)))
2077 if (p
->next_same_hash
)
2078 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
2080 if (p
->prev_same_hash
)
2081 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
2083 table
[i
] = p
->next_same_hash
;
2085 p
->next_same_hash
= table
[hash
];
2086 p
->prev_same_hash
= 0;
2088 table
[hash
]->prev_same_hash
= p
;
2094 /* Remove from the hash table any expression that is a call-clobbered
2095 register in INSN. Also update their TICK values. */
2098 invalidate_for_call (rtx_insn
*insn
)
2102 struct table_elt
*p
, *next
;
2104 hard_reg_set_iterator hrsi
;
2106 /* Go through all the hard registers. For each that might be clobbered
2107 in call insn INSN, remove the register from quantity chains and update
2108 reg_tick if defined. Also see if any of these registers is currently
2111 ??? We could be more precise for partially-clobbered registers,
2112 and only invalidate values that actually occupy the clobbered part
2113 of the registers. It doesn't seem worth the effort though, since
2114 we shouldn't see this situation much before RA. Whatever choice
2115 we make here has to be consistent with the table walk below,
2116 so any change to this test will require a change there too. */
2117 HARD_REG_SET callee_clobbers
2118 = insn_callee_abi (insn
).full_and_partial_reg_clobbers ();
2119 EXECUTE_IF_SET_IN_HARD_REG_SET (callee_clobbers
, 0, regno
, hrsi
)
2121 delete_reg_equiv (regno
);
2122 if (REG_TICK (regno
) >= 0)
2125 SUBREG_TICKED (regno
) = -1;
2127 in_table
|= (TEST_HARD_REG_BIT (hard_regs_in_table
, regno
) != 0);
2130 /* In the case where we have no call-clobbered hard registers in the
2131 table, we are done. Otherwise, scan the table and remove any
2132 entry that overlaps a call-clobbered register. */
2135 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
2136 for (p
= table
[hash
]; p
; p
= next
)
2138 next
= p
->next_same_hash
;
2141 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
2144 /* This must use the same test as above rather than the
2145 more accurate clobbers_reg_p. */
2146 if (overlaps_hard_reg_set_p (callee_clobbers
, GET_MODE (p
->exp
),
2148 remove_from_table (p
, hash
);
2152 /* Given an expression X of type CONST,
2153 and ELT which is its table entry (or 0 if it
2154 is not in the hash table),
2155 return an alternate expression for X as a register plus integer.
2156 If none can be found, return 0. */
2159 use_related_value (rtx x
, struct table_elt
*elt
)
2161 struct table_elt
*relt
= 0;
2162 struct table_elt
*p
, *q
;
2163 HOST_WIDE_INT offset
;
2165 /* First, is there anything related known?
2166 If we have a table element, we can tell from that.
2167 Otherwise, must look it up. */
2169 if (elt
!= 0 && elt
->related_value
!= 0)
2171 else if (elt
== 0 && GET_CODE (x
) == CONST
)
2173 rtx subexp
= get_related_value (x
);
2175 relt
= lookup (subexp
,
2176 SAFE_HASH (subexp
, GET_MODE (subexp
)),
2183 /* Search all related table entries for one that has an
2184 equivalent register. */
2189 /* This loop is strange in that it is executed in two different cases.
2190 The first is when X is already in the table. Then it is searching
2191 the RELATED_VALUE list of X's class (RELT). The second case is when
2192 X is not in the table. Then RELT points to a class for the related
2195 Ensure that, whatever case we are in, that we ignore classes that have
2196 the same value as X. */
2198 if (rtx_equal_p (x
, p
->exp
))
2201 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
2208 p
= p
->related_value
;
2210 /* We went all the way around, so there is nothing to be found.
2211 Alternatively, perhaps RELT was in the table for some other reason
2212 and it has no related values recorded. */
2213 if (p
== relt
|| p
== 0)
2220 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
2221 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2222 return plus_constant (q
->mode
, q
->exp
, offset
);
2226 /* Hash a string. Just add its bytes up. */
2227 static inline unsigned
2228 hash_rtx_string (const char *ps
)
2231 const unsigned char *p
= (const unsigned char *) ps
;
2240 /* Same as hash_rtx, but call CB on each rtx if it is not NULL.
2241 When the callback returns true, we continue with the new rtx. */
2244 hash_rtx_cb (const_rtx x
, machine_mode mode
,
2245 int *do_not_record_p
, int *hash_arg_in_memory_p
,
2246 bool have_reg_qty
, hash_rtx_callback_function cb
)
2252 machine_mode newmode
;
2255 /* Used to turn recursion into iteration. We can't rely on GCC's
2256 tail-recursion elimination since we need to keep accumulating values
2262 /* Invoke the callback first. */
2264 && ((*cb
) (x
, mode
, &newx
, &newmode
)))
2266 hash
+= hash_rtx_cb (newx
, newmode
, do_not_record_p
,
2267 hash_arg_in_memory_p
, have_reg_qty
, cb
);
2271 code
= GET_CODE (x
);
2276 unsigned int regno
= REGNO (x
);
2278 if (do_not_record_p
&& !reload_completed
)
2280 /* On some machines, we can't record any non-fixed hard register,
2281 because extending its life will cause reload problems. We
2282 consider ap, fp, sp, gp to be fixed for this purpose.
2284 We also consider CCmode registers to be fixed for this purpose;
2285 failure to do so leads to failure to simplify 0<100 type of
2288 On all machines, we can't record any global registers.
2289 Nor should we record any register that is in a small
2290 class, as defined by TARGET_CLASS_LIKELY_SPILLED_P. */
2293 if (regno
>= FIRST_PSEUDO_REGISTER
)
2295 else if (x
== frame_pointer_rtx
2296 || x
== hard_frame_pointer_rtx
2297 || x
== arg_pointer_rtx
2298 || x
== stack_pointer_rtx
2299 || x
== pic_offset_table_rtx
)
2301 else if (global_regs
[regno
])
2303 else if (fixed_regs
[regno
])
2305 else if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
)
2307 else if (targetm
.small_register_classes_for_mode_p (GET_MODE (x
)))
2309 else if (targetm
.class_likely_spilled_p (REGNO_REG_CLASS (regno
)))
2316 *do_not_record_p
= 1;
2321 hash
+= ((unsigned int) REG
<< 7);
2322 hash
+= (have_reg_qty
? (unsigned) REG_QTY (regno
) : regno
);
2326 /* We handle SUBREG of a REG specially because the underlying
2327 reg changes its hash value with every value change; we don't
2328 want to have to forget unrelated subregs when one subreg changes. */
2331 if (REG_P (SUBREG_REG (x
)))
2333 hash
+= (((unsigned int) SUBREG
<< 7)
2334 + REGNO (SUBREG_REG (x
))
2335 + (constant_lower_bound (SUBREG_BYTE (x
))
2343 hash
+= (((unsigned int) CONST_INT
<< 7) + (unsigned int) mode
2344 + (unsigned int) INTVAL (x
));
2347 case CONST_WIDE_INT
:
2348 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (x
); i
++)
2349 hash
+= CONST_WIDE_INT_ELT (x
, i
);
2352 case CONST_POLY_INT
:
2356 for (unsigned int i
= 0; i
< NUM_POLY_INT_COEFFS
; ++i
)
2357 h
.add_wide_int (CONST_POLY_INT_COEFFS (x
)[i
]);
2362 /* This is like the general case, except that it only counts
2363 the integers representing the constant. */
2364 hash
+= (unsigned int) code
+ (unsigned int) GET_MODE (x
);
2365 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (x
) == VOIDmode
)
2366 hash
+= ((unsigned int) CONST_DOUBLE_LOW (x
)
2367 + (unsigned int) CONST_DOUBLE_HIGH (x
));
2369 hash
+= real_hash (CONST_DOUBLE_REAL_VALUE (x
));
2373 hash
+= (unsigned int) code
+ (unsigned int) GET_MODE (x
);
2374 hash
+= fixed_hash (CONST_FIXED_VALUE (x
));
2382 units
= const_vector_encoded_nelts (x
);
2384 for (i
= 0; i
< units
; ++i
)
2386 elt
= CONST_VECTOR_ENCODED_ELT (x
, i
);
2387 hash
+= hash_rtx_cb (elt
, GET_MODE (elt
),
2388 do_not_record_p
, hash_arg_in_memory_p
,
2395 /* Assume there is only one rtx object for any given label. */
2397 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2398 differences and differences between each stage's debugging dumps. */
2399 hash
+= (((unsigned int) LABEL_REF
<< 7)
2400 + CODE_LABEL_NUMBER (label_ref_label (x
)));
2405 /* Don't hash on the symbol's address to avoid bootstrap differences.
2406 Different hash values may cause expressions to be recorded in
2407 different orders and thus different registers to be used in the
2408 final assembler. This also avoids differences in the dump files
2409 between various stages. */
2411 const unsigned char *p
= (const unsigned char *) XSTR (x
, 0);
2414 h
+= (h
<< 7) + *p
++; /* ??? revisit */
2416 hash
+= ((unsigned int) SYMBOL_REF
<< 7) + h
;
2421 /* We don't record if marked volatile or if BLKmode since we don't
2422 know the size of the move. */
2423 if (do_not_record_p
&& (MEM_VOLATILE_P (x
) || GET_MODE (x
) == BLKmode
))
2425 *do_not_record_p
= 1;
2428 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2429 *hash_arg_in_memory_p
= 1;
2431 /* Now that we have already found this special case,
2432 might as well speed it up as much as possible. */
2433 hash
+= (unsigned) MEM
;
2438 /* A USE that mentions non-volatile memory needs special
2439 handling since the MEM may be BLKmode which normally
2440 prevents an entry from being made. Pure calls are
2441 marked by a USE which mentions BLKmode memory.
2442 See calls.c:emit_call_1. */
2443 if (MEM_P (XEXP (x
, 0))
2444 && ! MEM_VOLATILE_P (XEXP (x
, 0)))
2446 hash
+= (unsigned) USE
;
2449 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2450 *hash_arg_in_memory_p
= 1;
2452 /* Now that we have already found this special case,
2453 might as well speed it up as much as possible. */
2454 hash
+= (unsigned) MEM
;
2469 case UNSPEC_VOLATILE
:
2470 if (do_not_record_p
) {
2471 *do_not_record_p
= 1;
2479 if (do_not_record_p
&& MEM_VOLATILE_P (x
))
2481 *do_not_record_p
= 1;
2486 /* We don't want to take the filename and line into account. */
2487 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
)
2488 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x
))
2489 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
))
2490 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x
);
2492 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2494 for (i
= 1; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
2496 hash
+= (hash_rtx_cb (ASM_OPERANDS_INPUT (x
, i
),
2497 GET_MODE (ASM_OPERANDS_INPUT (x
, i
)),
2498 do_not_record_p
, hash_arg_in_memory_p
,
2501 (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
)));
2504 hash
+= hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x
, 0));
2505 x
= ASM_OPERANDS_INPUT (x
, 0);
2506 mode
= GET_MODE (x
);
2518 i
= GET_RTX_LENGTH (code
) - 1;
2519 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
2520 fmt
= GET_RTX_FORMAT (code
);
2526 /* If we are about to do the last recursive call
2527 needed at this level, change it into iteration.
2528 This function is called enough to be worth it. */
2535 hash
+= hash_rtx_cb (XEXP (x
, i
), VOIDmode
, do_not_record_p
,
2536 hash_arg_in_memory_p
,
2541 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2542 hash
+= hash_rtx_cb (XVECEXP (x
, i
, j
), VOIDmode
, do_not_record_p
,
2543 hash_arg_in_memory_p
,
2548 hash
+= hash_rtx_string (XSTR (x
, i
));
2552 hash
+= (unsigned int) XINT (x
, i
);
2556 hash
+= constant_lower_bound (SUBREG_BYTE (x
));
2571 /* Hash an rtx. We are careful to make sure the value is never negative.
2572 Equivalent registers hash identically.
2573 MODE is used in hashing for CONST_INTs only;
2574 otherwise the mode of X is used.
2576 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2578 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2579 a MEM rtx which does not have the MEM_READONLY_P flag set.
2581 Note that cse_insn knows that the hash code of a MEM expression
2582 is just (int) MEM plus the hash code of the address. */
2585 hash_rtx (const_rtx x
, machine_mode mode
, int *do_not_record_p
,
2586 int *hash_arg_in_memory_p
, bool have_reg_qty
)
2588 return hash_rtx_cb (x
, mode
, do_not_record_p
,
2589 hash_arg_in_memory_p
, have_reg_qty
, NULL
);
2592 /* Hash an rtx X for cse via hash_rtx.
2593 Stores 1 in do_not_record if any subexpression is volatile.
2594 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2595 does not have the MEM_READONLY_P flag set. */
2597 static inline unsigned
2598 canon_hash (rtx x
, machine_mode mode
)
2600 return hash_rtx (x
, mode
, &do_not_record
, &hash_arg_in_memory
, true);
2603 /* Like canon_hash but with no side effects, i.e. do_not_record
2604 and hash_arg_in_memory are not changed. */
2606 static inline unsigned
2607 safe_hash (rtx x
, machine_mode mode
)
2609 int dummy_do_not_record
;
2610 return hash_rtx (x
, mode
, &dummy_do_not_record
, NULL
, true);
2613 /* Return 1 iff X and Y would canonicalize into the same thing,
2614 without actually constructing the canonicalization of either one.
2615 If VALIDATE is nonzero,
2616 we assume X is an expression being processed from the rtl
2617 and Y was found in the hash table. We check register refs
2618 in Y for being marked as valid.
2620 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2623 exp_equiv_p (const_rtx x
, const_rtx y
, int validate
, bool for_gcse
)
2629 /* Note: it is incorrect to assume an expression is equivalent to itself
2630 if VALIDATE is nonzero. */
2631 if (x
== y
&& !validate
)
2634 if (x
== 0 || y
== 0)
2637 code
= GET_CODE (x
);
2638 if (code
!= GET_CODE (y
))
2641 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2642 if (GET_MODE (x
) != GET_MODE (y
))
2645 /* MEMs referring to different address space are not equivalent. */
2646 if (code
== MEM
&& MEM_ADDR_SPACE (x
) != MEM_ADDR_SPACE (y
))
2657 return label_ref_label (x
) == label_ref_label (y
);
2660 return XSTR (x
, 0) == XSTR (y
, 0);
2664 return REGNO (x
) == REGNO (y
);
2667 unsigned int regno
= REGNO (y
);
2669 unsigned int endregno
= END_REGNO (y
);
2671 /* If the quantities are not the same, the expressions are not
2672 equivalent. If there are and we are not to validate, they
2673 are equivalent. Otherwise, ensure all regs are up-to-date. */
2675 if (REG_QTY (REGNO (x
)) != REG_QTY (regno
))
2681 for (i
= regno
; i
< endregno
; i
++)
2682 if (REG_IN_TABLE (i
) != REG_TICK (i
))
2691 /* A volatile mem should not be considered equivalent to any
2693 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2696 /* Can't merge two expressions in different alias sets, since we
2697 can decide that the expression is transparent in a block when
2698 it isn't, due to it being set with the different alias set.
2700 Also, can't merge two expressions with different MEM_ATTRS.
2701 They could e.g. be two different entities allocated into the
2702 same space on the stack (see e.g. PR25130). In that case, the
2703 MEM addresses can be the same, even though the two MEMs are
2704 absolutely not equivalent.
2706 But because really all MEM attributes should be the same for
2707 equivalent MEMs, we just use the invariant that MEMs that have
2708 the same attributes share the same mem_attrs data structure. */
2709 if (!mem_attrs_eq_p (MEM_ATTRS (x
), MEM_ATTRS (y
)))
2712 /* If we are handling exceptions, we cannot consider two expressions
2713 with different trapping status as equivalent, because simple_mem
2714 might accept one and reject the other. */
2715 if (cfun
->can_throw_non_call_exceptions
2716 && (MEM_NOTRAP_P (x
) != MEM_NOTRAP_P (y
)))
2721 /* For commutative operations, check both orders. */
2729 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0),
2731 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2732 validate
, for_gcse
))
2733 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2735 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2736 validate
, for_gcse
)));
2739 /* We don't use the generic code below because we want to
2740 disregard filename and line numbers. */
2742 /* A volatile asm isn't equivalent to any other. */
2743 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2746 if (GET_MODE (x
) != GET_MODE (y
)
2747 || strcmp (ASM_OPERANDS_TEMPLATE (x
), ASM_OPERANDS_TEMPLATE (y
))
2748 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
),
2749 ASM_OPERANDS_OUTPUT_CONSTRAINT (y
))
2750 || ASM_OPERANDS_OUTPUT_IDX (x
) != ASM_OPERANDS_OUTPUT_IDX (y
)
2751 || ASM_OPERANDS_INPUT_LENGTH (x
) != ASM_OPERANDS_INPUT_LENGTH (y
))
2754 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2756 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
2757 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x
, i
),
2758 ASM_OPERANDS_INPUT (y
, i
),
2760 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
),
2761 ASM_OPERANDS_INPUT_CONSTRAINT (y
, i
)))
2771 /* Compare the elements. If any pair of corresponding elements
2772 fail to match, return 0 for the whole thing. */
2774 fmt
= GET_RTX_FORMAT (code
);
2775 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2780 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
),
2781 validate
, for_gcse
))
2786 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2788 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2789 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2790 validate
, for_gcse
))
2795 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2800 if (XINT (x
, i
) != XINT (y
, i
))
2805 if (XWINT (x
, i
) != XWINT (y
, i
))
2810 if (maybe_ne (SUBREG_BYTE (x
), SUBREG_BYTE (y
)))
2826 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2827 the result if necessary. INSN is as for canon_reg. */
2830 validate_canon_reg (rtx
*xloc
, rtx_insn
*insn
)
2834 rtx new_rtx
= canon_reg (*xloc
, insn
);
2836 /* If replacing pseudo with hard reg or vice versa, ensure the
2837 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2838 gcc_assert (insn
&& new_rtx
);
2839 validate_change (insn
, xloc
, new_rtx
, 1);
2843 /* Canonicalize an expression:
2844 replace each register reference inside it
2845 with the "oldest" equivalent register.
2847 If INSN is nonzero validate_change is used to ensure that INSN remains valid
2848 after we make our substitution. The calls are made with IN_GROUP nonzero
2849 so apply_change_group must be called upon the outermost return from this
2850 function (unless INSN is zero). The result of apply_change_group can
2851 generally be discarded since the changes we are making are optional. */
2854 canon_reg (rtx x
, rtx_insn
*insn
)
2863 code
= GET_CODE (x
);
2880 struct qty_table_elem
*ent
;
2882 /* Never replace a hard reg, because hard regs can appear
2883 in more than one machine mode, and we must preserve the mode
2884 of each occurrence. Also, some hard regs appear in
2885 MEMs that are shared and mustn't be altered. Don't try to
2886 replace any reg that maps to a reg of class NO_REGS. */
2887 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2888 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2891 q
= REG_QTY (REGNO (x
));
2892 ent
= &qty_table
[q
];
2893 first
= ent
->first_reg
;
2894 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2895 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2896 : gen_rtx_REG (ent
->mode
, first
));
2903 fmt
= GET_RTX_FORMAT (code
);
2904 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2909 validate_canon_reg (&XEXP (x
, i
), insn
);
2910 else if (fmt
[i
] == 'E')
2911 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2912 validate_canon_reg (&XVECEXP (x
, i
, j
), insn
);
2918 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2919 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2920 what values are being compared.
2922 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2923 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2924 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2925 compared to produce cc0.
2927 The return value is the comparison operator and is either the code of
2928 A or the code corresponding to the inverse of the comparison. */
2930 static enum rtx_code
2931 find_comparison_args (enum rtx_code code
, rtx
*parg1
, rtx
*parg2
,
2932 machine_mode
*pmode1
, machine_mode
*pmode2
)
2935 hash_set
<rtx
> *visited
= NULL
;
2936 /* Set nonzero when we find something of interest. */
2939 arg1
= *parg1
, arg2
= *parg2
;
2941 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2943 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
2945 int reverse_code
= 0;
2946 struct table_elt
*p
= 0;
2948 /* Remember state from previous iteration. */
2952 visited
= new hash_set
<rtx
>;
2957 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2958 On machines with CC0, this is the only case that can occur, since
2959 fold_rtx will return the COMPARE or item being compared with zero
2962 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2965 /* If ARG1 is a comparison operator and CODE is testing for
2966 STORE_FLAG_VALUE, get the inner arguments. */
2968 else if (COMPARISON_P (arg1
))
2970 #ifdef FLOAT_STORE_FLAG_VALUE
2971 REAL_VALUE_TYPE fsfv
;
2975 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2976 && code
== LT
&& STORE_FLAG_VALUE
== -1)
2977 #ifdef FLOAT_STORE_FLAG_VALUE
2978 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1
))
2979 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
2980 REAL_VALUE_NEGATIVE (fsfv
)))
2985 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2986 && code
== GE
&& STORE_FLAG_VALUE
== -1)
2987 #ifdef FLOAT_STORE_FLAG_VALUE
2988 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1
))
2989 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
2990 REAL_VALUE_NEGATIVE (fsfv
)))
2993 x
= arg1
, reverse_code
= 1;
2996 /* ??? We could also check for
2998 (ne (and (eq (...) (const_int 1))) (const_int 0))
3000 and related forms, but let's wait until we see them occurring. */
3003 /* Look up ARG1 in the hash table and see if it has an equivalence
3004 that lets us see what is being compared. */
3005 p
= lookup (arg1
, SAFE_HASH (arg1
, GET_MODE (arg1
)), GET_MODE (arg1
));
3008 p
= p
->first_same_value
;
3010 /* If what we compare is already known to be constant, that is as
3012 We need to break the loop in this case, because otherwise we
3013 can have an infinite loop when looking at a reg that is known
3014 to be a constant which is the same as a comparison of a reg
3015 against zero which appears later in the insn stream, which in
3016 turn is constant and the same as the comparison of the first reg
3022 for (; p
; p
= p
->next_same_value
)
3024 machine_mode inner_mode
= GET_MODE (p
->exp
);
3025 #ifdef FLOAT_STORE_FLAG_VALUE
3026 REAL_VALUE_TYPE fsfv
;
3029 /* If the entry isn't valid, skip it. */
3030 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
3033 /* If it's a comparison we've used before, skip it. */
3034 if (visited
&& visited
->contains (p
->exp
))
3037 if (GET_CODE (p
->exp
) == COMPARE
3038 /* Another possibility is that this machine has a compare insn
3039 that includes the comparison code. In that case, ARG1 would
3040 be equivalent to a comparison operation that would set ARG1 to
3041 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3042 ORIG_CODE is the actual comparison being done; if it is an EQ,
3043 we must reverse ORIG_CODE. On machine with a negative value
3044 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3047 && val_signbit_known_set_p (inner_mode
,
3049 #ifdef FLOAT_STORE_FLAG_VALUE
3051 && SCALAR_FLOAT_MODE_P (inner_mode
)
3052 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3053 REAL_VALUE_NEGATIVE (fsfv
)))
3056 && COMPARISON_P (p
->exp
)))
3061 else if ((code
== EQ
3063 && val_signbit_known_set_p (inner_mode
,
3065 #ifdef FLOAT_STORE_FLAG_VALUE
3067 && SCALAR_FLOAT_MODE_P (inner_mode
)
3068 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3069 REAL_VALUE_NEGATIVE (fsfv
)))
3072 && COMPARISON_P (p
->exp
))
3079 /* If this non-trapping address, e.g. fp + constant, the
3080 equivalent is a better operand since it may let us predict
3081 the value of the comparison. */
3082 else if (!rtx_addr_can_trap_p (p
->exp
))
3089 /* If we didn't find a useful equivalence for ARG1, we are done.
3090 Otherwise, set up for the next iteration. */
3094 /* If we need to reverse the comparison, make sure that is
3095 possible -- we can't necessarily infer the value of GE from LT
3096 with floating-point operands. */
3099 enum rtx_code reversed
= reversed_comparison_code (x
, NULL
);
3100 if (reversed
== UNKNOWN
)
3105 else if (COMPARISON_P (x
))
3106 code
= GET_CODE (x
);
3107 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
3110 /* Return our results. Return the modes from before fold_rtx
3111 because fold_rtx might produce const_int, and then it's too late. */
3112 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
3113 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
3120 /* If X is a nontrivial arithmetic operation on an argument for which
3121 a constant value can be determined, return the result of operating
3122 on that value, as a constant. Otherwise, return X, possibly with
3123 one or more operands changed to a forward-propagated constant.
3125 If X is a register whose contents are known, we do NOT return
3126 those contents here; equiv_constant is called to perform that task.
3127 For SUBREGs and MEMs, we do that both here and in equiv_constant.
3129 INSN is the insn that we may be modifying. If it is 0, make a copy
3130 of X before modifying it. */
3133 fold_rtx (rtx x
, rtx_insn
*insn
)
3143 /* Operands of X. */
3144 /* Workaround -Wmaybe-uninitialized false positive during
3145 profiledbootstrap by initializing them. */
3146 rtx folded_arg0
= NULL_RTX
;
3147 rtx folded_arg1
= NULL_RTX
;
3149 /* Constant equivalents of first three operands of X;
3150 0 when no such equivalent is known. */
3155 /* The mode of the first operand of X. We need this for sign and zero
3157 machine_mode mode_arg0
;
3162 /* Try to perform some initial simplifications on X. */
3163 code
= GET_CODE (x
);
3168 /* The first operand of a SIGN/ZERO_EXTRACT has a different meaning
3169 than it would in other contexts. Basically its mode does not
3170 signify the size of the object read. That information is carried
3171 by size operand. If we happen to have a MEM of the appropriate
3172 mode in our tables with a constant value we could simplify the
3173 extraction incorrectly if we allowed substitution of that value
3177 if ((new_rtx
= equiv_constant (x
)) != NULL_RTX
)
3187 /* No use simplifying an EXPR_LIST
3188 since they are used only for lists of args
3189 in a function call's REG_EQUAL note. */
3194 return prev_insn_cc0
;
3199 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
3200 validate_change (insn
, &ASM_OPERANDS_INPUT (x
, i
),
3201 fold_rtx (ASM_OPERANDS_INPUT (x
, i
), insn
), 0);
3206 if (NO_FUNCTION_CSE
&& CONSTANT_P (XEXP (XEXP (x
, 0), 0)))
3210 /* Anything else goes through the loop below. */
3215 mode
= GET_MODE (x
);
3219 mode_arg0
= VOIDmode
;
3221 /* Try folding our operands.
3222 Then see which ones have constant values known. */
3224 fmt
= GET_RTX_FORMAT (code
);
3225 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3228 rtx folded_arg
= XEXP (x
, i
), const_arg
;
3229 machine_mode mode_arg
= GET_MODE (folded_arg
);
3231 switch (GET_CODE (folded_arg
))
3236 const_arg
= equiv_constant (folded_arg
);
3243 const_arg
= folded_arg
;
3247 /* The cc0-user and cc0-setter may be in different blocks if
3248 the cc0-setter potentially traps. In that case PREV_INSN_CC0
3249 will have been cleared as we exited the block with the
3252 While we could potentially track cc0 in this case, it just
3253 doesn't seem to be worth it given that cc0 targets are not
3254 terribly common or important these days and trapping math
3255 is rarely used. The combination of those two conditions
3256 necessary to trip this situation is exceedingly rare in the
3260 const_arg
= NULL_RTX
;
3264 folded_arg
= prev_insn_cc0
;
3265 mode_arg
= prev_insn_cc0_mode
;
3266 const_arg
= equiv_constant (folded_arg
);
3271 folded_arg
= fold_rtx (folded_arg
, insn
);
3272 const_arg
= equiv_constant (folded_arg
);
3276 /* For the first three operands, see if the operand
3277 is constant or equivalent to a constant. */
3281 folded_arg0
= folded_arg
;
3282 const_arg0
= const_arg
;
3283 mode_arg0
= mode_arg
;
3286 folded_arg1
= folded_arg
;
3287 const_arg1
= const_arg
;
3290 const_arg2
= const_arg
;
3294 /* Pick the least expensive of the argument and an equivalent constant
3297 && const_arg
!= folded_arg
3298 && (COST_IN (const_arg
, mode_arg
, code
, i
)
3299 <= COST_IN (folded_arg
, mode_arg
, code
, i
))
3301 /* It's not safe to substitute the operand of a conversion
3302 operator with a constant, as the conversion's identity
3303 depends upon the mode of its operand. This optimization
3304 is handled by the call to simplify_unary_operation. */
3305 && (GET_RTX_CLASS (code
) != RTX_UNARY
3306 || GET_MODE (const_arg
) == mode_arg0
3307 || (code
!= ZERO_EXTEND
3308 && code
!= SIGN_EXTEND
3310 && code
!= FLOAT_TRUNCATE
3311 && code
!= FLOAT_EXTEND
3314 && code
!= UNSIGNED_FLOAT
3315 && code
!= UNSIGNED_FIX
)))
3316 folded_arg
= const_arg
;
3318 if (folded_arg
== XEXP (x
, i
))
3321 if (insn
== NULL_RTX
&& !changed
)
3324 validate_unshare_change (insn
, &XEXP (x
, i
), folded_arg
, 1);
3329 /* Canonicalize X if necessary, and keep const_argN and folded_argN
3330 consistent with the order in X. */
3331 if (canonicalize_change_group (insn
, x
))
3333 std::swap (const_arg0
, const_arg1
);
3334 std::swap (folded_arg0
, folded_arg1
);
3337 apply_change_group ();
3340 /* If X is an arithmetic operation, see if we can simplify it. */
3342 switch (GET_RTX_CLASS (code
))
3346 /* We can't simplify extension ops unless we know the
3348 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
3349 && mode_arg0
== VOIDmode
)
3352 new_rtx
= simplify_unary_operation (code
, mode
,
3353 const_arg0
? const_arg0
: folded_arg0
,
3359 case RTX_COMM_COMPARE
:
3360 /* See what items are actually being compared and set FOLDED_ARG[01]
3361 to those values and CODE to the actual comparison code. If any are
3362 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3363 do anything if both operands are already known to be constant. */
3365 /* ??? Vector mode comparisons are not supported yet. */
3366 if (VECTOR_MODE_P (mode
))
3369 if (const_arg0
== 0 || const_arg1
== 0)
3371 struct table_elt
*p0
, *p1
;
3372 rtx true_rtx
, false_rtx
;
3373 machine_mode mode_arg1
;
3375 if (SCALAR_FLOAT_MODE_P (mode
))
3377 #ifdef FLOAT_STORE_FLAG_VALUE
3378 true_rtx
= (const_double_from_real_value
3379 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
3381 true_rtx
= NULL_RTX
;
3383 false_rtx
= CONST0_RTX (mode
);
3387 true_rtx
= const_true_rtx
;
3388 false_rtx
= const0_rtx
;
3391 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
3392 &mode_arg0
, &mode_arg1
);
3394 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3395 what kinds of things are being compared, so we can't do
3396 anything with this comparison. */
3398 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
3401 const_arg0
= equiv_constant (folded_arg0
);
3402 const_arg1
= equiv_constant (folded_arg1
);
3404 /* If we do not now have two constants being compared, see
3405 if we can nevertheless deduce some things about the
3407 if (const_arg0
== 0 || const_arg1
== 0)
3409 if (const_arg1
!= NULL
)
3411 rtx cheapest_simplification
;
3414 struct table_elt
*p
;
3416 /* See if we can find an equivalent of folded_arg0
3417 that gets us a cheaper expression, possibly a
3418 constant through simplifications. */
3419 p
= lookup (folded_arg0
, SAFE_HASH (folded_arg0
, mode_arg0
),
3424 cheapest_simplification
= x
;
3425 cheapest_cost
= COST (x
, mode
);
3427 for (p
= p
->first_same_value
; p
!= NULL
; p
= p
->next_same_value
)
3431 /* If the entry isn't valid, skip it. */
3432 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
3435 /* Try to simplify using this equivalence. */
3437 = simplify_relational_operation (code
, mode
,
3442 if (simp_result
== NULL
)
3445 cost
= COST (simp_result
, mode
);
3446 if (cost
< cheapest_cost
)
3448 cheapest_cost
= cost
;
3449 cheapest_simplification
= simp_result
;
3453 /* If we have a cheaper expression now, use that
3454 and try folding it further, from the top. */
3455 if (cheapest_simplification
!= x
)
3456 return fold_rtx (copy_rtx (cheapest_simplification
),
3461 /* See if the two operands are the same. */
3463 if ((REG_P (folded_arg0
)
3464 && REG_P (folded_arg1
)
3465 && (REG_QTY (REGNO (folded_arg0
))
3466 == REG_QTY (REGNO (folded_arg1
))))
3467 || ((p0
= lookup (folded_arg0
,
3468 SAFE_HASH (folded_arg0
, mode_arg0
),
3470 && (p1
= lookup (folded_arg1
,
3471 SAFE_HASH (folded_arg1
, mode_arg0
),
3473 && p0
->first_same_value
== p1
->first_same_value
))
3474 folded_arg1
= folded_arg0
;
3476 /* If FOLDED_ARG0 is a register, see if the comparison we are
3477 doing now is either the same as we did before or the reverse
3478 (we only check the reverse if not floating-point). */
3479 else if (REG_P (folded_arg0
))
3481 int qty
= REG_QTY (REGNO (folded_arg0
));
3483 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
)))
3485 struct qty_table_elem
*ent
= &qty_table
[qty
];
3487 if ((comparison_dominates_p (ent
->comparison_code
, code
)
3488 || (! FLOAT_MODE_P (mode_arg0
)
3489 && comparison_dominates_p (ent
->comparison_code
,
3490 reverse_condition (code
))))
3491 && (rtx_equal_p (ent
->comparison_const
, folded_arg1
)
3493 && rtx_equal_p (ent
->comparison_const
,
3495 || (REG_P (folded_arg1
)
3496 && (REG_QTY (REGNO (folded_arg1
)) == ent
->comparison_qty
))))
3498 if (comparison_dominates_p (ent
->comparison_code
, code
))
3513 /* If we are comparing against zero, see if the first operand is
3514 equivalent to an IOR with a constant. If so, we may be able to
3515 determine the result of this comparison. */
3516 if (const_arg1
== const0_rtx
&& !const_arg0
)
3518 rtx y
= lookup_as_function (folded_arg0
, IOR
);
3522 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
3523 && CONST_INT_P (inner_const
)
3524 && INTVAL (inner_const
) != 0)
3525 folded_arg0
= gen_rtx_IOR (mode_arg0
, XEXP (y
, 0), inner_const
);
3529 rtx op0
= const_arg0
? const_arg0
: copy_rtx (folded_arg0
);
3530 rtx op1
= const_arg1
? const_arg1
: copy_rtx (folded_arg1
);
3531 new_rtx
= simplify_relational_operation (code
, mode
, mode_arg0
,
3537 case RTX_COMM_ARITH
:
3541 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3542 with that LABEL_REF as its second operand. If so, the result is
3543 the first operand of that MINUS. This handles switches with an
3544 ADDR_DIFF_VEC table. */
3545 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
3548 = GET_CODE (folded_arg0
) == MINUS
? folded_arg0
3549 : lookup_as_function (folded_arg0
, MINUS
);
3551 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
3552 && label_ref_label (XEXP (y
, 1)) == label_ref_label (const_arg1
))
3555 /* Now try for a CONST of a MINUS like the above. */
3556 if ((y
= (GET_CODE (folded_arg0
) == CONST
? folded_arg0
3557 : lookup_as_function (folded_arg0
, CONST
))) != 0
3558 && GET_CODE (XEXP (y
, 0)) == MINUS
3559 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
3560 && label_ref_label (XEXP (XEXP (y
, 0), 1)) == label_ref_label (const_arg1
))
3561 return XEXP (XEXP (y
, 0), 0);
3564 /* Likewise if the operands are in the other order. */
3565 if (const_arg0
&& GET_CODE (const_arg0
) == LABEL_REF
)
3568 = GET_CODE (folded_arg1
) == MINUS
? folded_arg1
3569 : lookup_as_function (folded_arg1
, MINUS
);
3571 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
3572 && label_ref_label (XEXP (y
, 1)) == label_ref_label (const_arg0
))
3575 /* Now try for a CONST of a MINUS like the above. */
3576 if ((y
= (GET_CODE (folded_arg1
) == CONST
? folded_arg1
3577 : lookup_as_function (folded_arg1
, CONST
))) != 0
3578 && GET_CODE (XEXP (y
, 0)) == MINUS
3579 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
3580 && label_ref_label (XEXP (XEXP (y
, 0), 1)) == label_ref_label (const_arg0
))
3581 return XEXP (XEXP (y
, 0), 0);
3584 /* If second operand is a register equivalent to a negative
3585 CONST_INT, see if we can find a register equivalent to the
3586 positive constant. Make a MINUS if so. Don't do this for
3587 a non-negative constant since we might then alternate between
3588 choosing positive and negative constants. Having the positive
3589 constant previously-used is the more common case. Be sure
3590 the resulting constant is non-negative; if const_arg1 were
3591 the smallest negative number this would overflow: depending
3592 on the mode, this would either just be the same value (and
3593 hence not save anything) or be incorrect. */
3594 if (const_arg1
!= 0 && CONST_INT_P (const_arg1
)
3595 && INTVAL (const_arg1
) < 0
3596 /* This used to test
3598 -INTVAL (const_arg1) >= 0
3600 But The Sun V5.0 compilers mis-compiled that test. So
3601 instead we test for the problematic value in a more direct
3602 manner and hope the Sun compilers get it correct. */
3603 && INTVAL (const_arg1
) !=
3604 (HOST_WIDE_INT_1
<< (HOST_BITS_PER_WIDE_INT
- 1))
3605 && REG_P (folded_arg1
))
3607 rtx new_const
= GEN_INT (-INTVAL (const_arg1
));
3609 = lookup (new_const
, SAFE_HASH (new_const
, mode
), mode
);
3612 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
3614 return simplify_gen_binary (MINUS
, mode
, folded_arg0
,
3615 canon_reg (p
->exp
, NULL
));
3620 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3621 If so, produce (PLUS Z C2-C). */
3622 if (const_arg1
!= 0 && poly_int_rtx_p (const_arg1
, &xval
))
3624 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
3625 if (y
&& poly_int_rtx_p (XEXP (y
, 1)))
3626 return fold_rtx (plus_constant (mode
, copy_rtx (y
), -xval
),
3633 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
3634 case IOR
: case AND
: case XOR
:
3636 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
3637 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3638 is known to be of similar form, we may be able to replace the
3639 operation with a combined operation. This may eliminate the
3640 intermediate operation if every use is simplified in this way.
3641 Note that the similar optimization done by combine.c only works
3642 if the intermediate operation's result has only one reference. */
3644 if (REG_P (folded_arg0
)
3645 && const_arg1
&& CONST_INT_P (const_arg1
))
3648 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
3649 rtx y
, inner_const
, new_const
;
3650 rtx canon_const_arg1
= const_arg1
;
3651 enum rtx_code associate_code
;
3654 && (INTVAL (const_arg1
) >= GET_MODE_UNIT_PRECISION (mode
)
3655 || INTVAL (const_arg1
) < 0))
3657 if (SHIFT_COUNT_TRUNCATED
)
3658 canon_const_arg1
= gen_int_shift_amount
3659 (mode
, (INTVAL (const_arg1
)
3660 & (GET_MODE_UNIT_BITSIZE (mode
) - 1)));
3665 y
= lookup_as_function (folded_arg0
, code
);
3669 /* If we have compiled a statement like
3670 "if (x == (x & mask1))", and now are looking at
3671 "x & mask2", we will have a case where the first operand
3672 of Y is the same as our first operand. Unless we detect
3673 this case, an infinite loop will result. */
3674 if (XEXP (y
, 0) == folded_arg0
)
3677 inner_const
= equiv_constant (fold_rtx (XEXP (y
, 1), 0));
3678 if (!inner_const
|| !CONST_INT_P (inner_const
))
3681 /* Don't associate these operations if they are a PLUS with the
3682 same constant and it is a power of two. These might be doable
3683 with a pre- or post-increment. Similarly for two subtracts of
3684 identical powers of two with post decrement. */
3686 if (code
== PLUS
&& const_arg1
== inner_const
3687 && ((HAVE_PRE_INCREMENT
3688 && pow2p_hwi (INTVAL (const_arg1
)))
3689 || (HAVE_POST_INCREMENT
3690 && pow2p_hwi (INTVAL (const_arg1
)))
3691 || (HAVE_PRE_DECREMENT
3692 && pow2p_hwi (- INTVAL (const_arg1
)))
3693 || (HAVE_POST_DECREMENT
3694 && pow2p_hwi (- INTVAL (const_arg1
)))))
3697 /* ??? Vector mode shifts by scalar
3698 shift operand are not supported yet. */
3699 if (is_shift
&& VECTOR_MODE_P (mode
))
3703 && (INTVAL (inner_const
) >= GET_MODE_UNIT_PRECISION (mode
)
3704 || INTVAL (inner_const
) < 0))
3706 if (SHIFT_COUNT_TRUNCATED
)
3707 inner_const
= gen_int_shift_amount
3708 (mode
, (INTVAL (inner_const
)
3709 & (GET_MODE_UNIT_BITSIZE (mode
) - 1)));
3714 /* Compute the code used to compose the constants. For example,
3715 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
3717 associate_code
= (is_shift
|| code
== MINUS
? PLUS
: code
);
3719 new_const
= simplify_binary_operation (associate_code
, mode
,
3726 /* If we are associating shift operations, don't let this
3727 produce a shift of the size of the object or larger.
3728 This could occur when we follow a sign-extend by a right
3729 shift on a machine that does a sign-extend as a pair
3733 && CONST_INT_P (new_const
)
3734 && INTVAL (new_const
) >= GET_MODE_UNIT_PRECISION (mode
))
3736 /* As an exception, we can turn an ASHIFTRT of this
3737 form into a shift of the number of bits - 1. */
3738 if (code
== ASHIFTRT
)
3739 new_const
= gen_int_shift_amount
3740 (mode
, GET_MODE_UNIT_BITSIZE (mode
) - 1);
3741 else if (!side_effects_p (XEXP (y
, 0)))
3742 return CONST0_RTX (mode
);
3747 y
= copy_rtx (XEXP (y
, 0));
3749 /* If Y contains our first operand (the most common way this
3750 can happen is if Y is a MEM), we would do into an infinite
3751 loop if we tried to fold it. So don't in that case. */
3753 if (! reg_mentioned_p (folded_arg0
, y
))
3754 y
= fold_rtx (y
, insn
);
3756 return simplify_gen_binary (code
, mode
, y
, new_const
);
3760 case DIV
: case UDIV
:
3761 /* ??? The associative optimization performed immediately above is
3762 also possible for DIV and UDIV using associate_code of MULT.
3763 However, we would need extra code to verify that the
3764 multiplication does not overflow, that is, there is no overflow
3765 in the calculation of new_const. */
3772 new_rtx
= simplify_binary_operation (code
, mode
,
3773 const_arg0
? const_arg0
: folded_arg0
,
3774 const_arg1
? const_arg1
: folded_arg1
);
3778 /* (lo_sum (high X) X) is simply X. */
3779 if (code
== LO_SUM
&& const_arg0
!= 0
3780 && GET_CODE (const_arg0
) == HIGH
3781 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
3786 case RTX_BITFIELD_OPS
:
3787 new_rtx
= simplify_ternary_operation (code
, mode
, mode_arg0
,
3788 const_arg0
? const_arg0
: folded_arg0
,
3789 const_arg1
? const_arg1
: folded_arg1
,
3790 const_arg2
? const_arg2
: XEXP (x
, 2));
3797 return new_rtx
? new_rtx
: x
;
3800 /* Return a constant value currently equivalent to X.
3801 Return 0 if we don't know one. */
3804 equiv_constant (rtx x
)
3807 && REGNO_QTY_VALID_P (REGNO (x
)))
3809 int x_q
= REG_QTY (REGNO (x
));
3810 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
3812 if (x_ent
->const_rtx
)
3813 x
= gen_lowpart (GET_MODE (x
), x_ent
->const_rtx
);
3816 if (x
== 0 || CONSTANT_P (x
))
3819 if (GET_CODE (x
) == SUBREG
)
3821 machine_mode mode
= GET_MODE (x
);
3822 machine_mode imode
= GET_MODE (SUBREG_REG (x
));
3825 /* See if we previously assigned a constant value to this SUBREG. */
3826 if ((new_rtx
= lookup_as_function (x
, CONST_INT
)) != 0
3827 || (new_rtx
= lookup_as_function (x
, CONST_WIDE_INT
)) != 0
3828 || (NUM_POLY_INT_COEFFS
> 1
3829 && (new_rtx
= lookup_as_function (x
, CONST_POLY_INT
)) != 0)
3830 || (new_rtx
= lookup_as_function (x
, CONST_DOUBLE
)) != 0
3831 || (new_rtx
= lookup_as_function (x
, CONST_FIXED
)) != 0)
3834 /* If we didn't and if doing so makes sense, see if we previously
3835 assigned a constant value to the enclosing word mode SUBREG. */
3836 if (known_lt (GET_MODE_SIZE (mode
), UNITS_PER_WORD
)
3837 && known_lt (UNITS_PER_WORD
, GET_MODE_SIZE (imode
)))
3839 poly_int64 byte
= (SUBREG_BYTE (x
)
3840 - subreg_lowpart_offset (mode
, word_mode
));
3841 if (known_ge (byte
, 0) && multiple_p (byte
, UNITS_PER_WORD
))
3843 rtx y
= gen_rtx_SUBREG (word_mode
, SUBREG_REG (x
), byte
);
3844 new_rtx
= lookup_as_function (y
, CONST_INT
);
3846 return gen_lowpart (mode
, new_rtx
);
3850 /* Otherwise see if we already have a constant for the inner REG,
3851 and if that is enough to calculate an equivalent constant for
3852 the subreg. Note that the upper bits of paradoxical subregs
3853 are undefined, so they cannot be said to equal anything. */
3854 if (REG_P (SUBREG_REG (x
))
3855 && !paradoxical_subreg_p (x
)
3856 && (new_rtx
= equiv_constant (SUBREG_REG (x
))) != 0)
3857 return simplify_subreg (mode
, new_rtx
, imode
, SUBREG_BYTE (x
));
3862 /* If X is a MEM, see if it is a constant-pool reference, or look it up in
3863 the hash table in case its value was seen before. */
3867 struct table_elt
*elt
;
3869 x
= avoid_constant_pool_reference (x
);
3873 elt
= lookup (x
, SAFE_HASH (x
, GET_MODE (x
)), GET_MODE (x
));
3877 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
3878 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
3885 /* Given INSN, a jump insn, TAKEN indicates if we are following the
3888 In certain cases, this can cause us to add an equivalence. For example,
3889 if we are following the taken case of
3891 we can add the fact that `i' and '2' are now equivalent.
3893 In any case, we can record that this comparison was passed. If the same
3894 comparison is seen later, we will know its value. */
3897 record_jump_equiv (rtx_insn
*insn
, bool taken
)
3899 int cond_known_true
;
3902 machine_mode mode
, mode0
, mode1
;
3903 int reversed_nonequality
= 0;
3906 /* Ensure this is the right kind of insn. */
3907 gcc_assert (any_condjump_p (insn
));
3909 set
= pc_set (insn
);
3911 /* See if this jump condition is known true or false. */
3913 cond_known_true
= (XEXP (SET_SRC (set
), 2) == pc_rtx
);
3915 cond_known_true
= (XEXP (SET_SRC (set
), 1) == pc_rtx
);
3917 /* Get the type of comparison being done and the operands being compared.
3918 If we had to reverse a non-equality condition, record that fact so we
3919 know that it isn't valid for floating-point. */
3920 code
= GET_CODE (XEXP (SET_SRC (set
), 0));
3921 op0
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 0), insn
);
3922 op1
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 1), insn
);
3924 /* On a cc0 target the cc0-setter and cc0-user may end up in different
3925 blocks. When that happens the tracking of the cc0-setter via
3926 PREV_INSN_CC0 is spoiled. That means that fold_rtx may return
3927 NULL_RTX. In those cases, there's nothing to record. */
3928 if (op0
== NULL_RTX
|| op1
== NULL_RTX
)
3931 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
3932 if (! cond_known_true
)
3934 code
= reversed_comparison_code_parts (code
, op0
, op1
, insn
);
3936 /* Don't remember if we can't find the inverse. */
3937 if (code
== UNKNOWN
)
3941 /* The mode is the mode of the non-constant. */
3943 if (mode1
!= VOIDmode
)
3946 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
3949 /* Yet another form of subreg creation. In this case, we want something in
3950 MODE, and we should assume OP has MODE iff it is naturally modeless. */
3953 record_jump_cond_subreg (machine_mode mode
, rtx op
)
3955 machine_mode op_mode
= GET_MODE (op
);
3956 if (op_mode
== mode
|| op_mode
== VOIDmode
)
3958 return lowpart_subreg (mode
, op
, op_mode
);
3961 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
3962 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
3963 Make any useful entries we can with that information. Called from
3964 above function and called recursively. */
3967 record_jump_cond (enum rtx_code code
, machine_mode mode
, rtx op0
,
3968 rtx op1
, int reversed_nonequality
)
3970 unsigned op0_hash
, op1_hash
;
3971 int op0_in_memory
, op1_in_memory
;
3972 struct table_elt
*op0_elt
, *op1_elt
;
3974 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
3975 we know that they are also equal in the smaller mode (this is also
3976 true for all smaller modes whether or not there is a SUBREG, but
3977 is not worth testing for with no SUBREG). */
3979 /* Note that GET_MODE (op0) may not equal MODE. */
3980 if (code
== EQ
&& paradoxical_subreg_p (op0
))
3982 machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
3983 rtx tem
= record_jump_cond_subreg (inner_mode
, op1
);
3985 record_jump_cond (code
, mode
, SUBREG_REG (op0
), tem
,
3986 reversed_nonequality
);
3989 if (code
== EQ
&& paradoxical_subreg_p (op1
))
3991 machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
3992 rtx tem
= record_jump_cond_subreg (inner_mode
, op0
);
3994 record_jump_cond (code
, mode
, SUBREG_REG (op1
), tem
,
3995 reversed_nonequality
);
3998 /* Similarly, if this is an NE comparison, and either is a SUBREG
3999 making a smaller mode, we know the whole thing is also NE. */
4001 /* Note that GET_MODE (op0) may not equal MODE;
4002 if we test MODE instead, we can get an infinite recursion
4003 alternating between two modes each wider than MODE. */
4006 && partial_subreg_p (op0
)
4007 && subreg_lowpart_p (op0
))
4009 machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
4010 rtx tem
= record_jump_cond_subreg (inner_mode
, op1
);
4012 record_jump_cond (code
, mode
, SUBREG_REG (op0
), tem
,
4013 reversed_nonequality
);
4017 && partial_subreg_p (op1
)
4018 && subreg_lowpart_p (op1
))
4020 machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
4021 rtx tem
= record_jump_cond_subreg (inner_mode
, op0
);
4023 record_jump_cond (code
, mode
, SUBREG_REG (op1
), tem
,
4024 reversed_nonequality
);
4027 /* Hash both operands. */
4030 hash_arg_in_memory
= 0;
4031 op0_hash
= HASH (op0
, mode
);
4032 op0_in_memory
= hash_arg_in_memory
;
4038 hash_arg_in_memory
= 0;
4039 op1_hash
= HASH (op1
, mode
);
4040 op1_in_memory
= hash_arg_in_memory
;
4045 /* Look up both operands. */
4046 op0_elt
= lookup (op0
, op0_hash
, mode
);
4047 op1_elt
= lookup (op1
, op1_hash
, mode
);
4049 /* If both operands are already equivalent or if they are not in the
4050 table but are identical, do nothing. */
4051 if ((op0_elt
!= 0 && op1_elt
!= 0
4052 && op0_elt
->first_same_value
== op1_elt
->first_same_value
)
4053 || op0
== op1
|| rtx_equal_p (op0
, op1
))
4056 /* If we aren't setting two things equal all we can do is save this
4057 comparison. Similarly if this is floating-point. In the latter
4058 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4059 If we record the equality, we might inadvertently delete code
4060 whose intent was to change -0 to +0. */
4062 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
4064 struct qty_table_elem
*ent
;
4067 /* If we reversed a floating-point comparison, if OP0 is not a
4068 register, or if OP1 is neither a register or constant, we can't
4072 op1
= equiv_constant (op1
);
4074 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
4075 || !REG_P (op0
) || op1
== 0)
4078 /* Put OP0 in the hash table if it isn't already. This gives it a
4079 new quantity number. */
4082 if (insert_regs (op0
, NULL
, 0))
4084 rehash_using_reg (op0
);
4085 op0_hash
= HASH (op0
, mode
);
4087 /* If OP0 is contained in OP1, this changes its hash code
4088 as well. Faster to rehash than to check, except
4089 for the simple case of a constant. */
4090 if (! CONSTANT_P (op1
))
4091 op1_hash
= HASH (op1
,mode
);
4094 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4095 op0_elt
->in_memory
= op0_in_memory
;
4098 qty
= REG_QTY (REGNO (op0
));
4099 ent
= &qty_table
[qty
];
4101 ent
->comparison_code
= code
;
4104 /* Look it up again--in case op0 and op1 are the same. */
4105 op1_elt
= lookup (op1
, op1_hash
, mode
);
4107 /* Put OP1 in the hash table so it gets a new quantity number. */
4110 if (insert_regs (op1
, NULL
, 0))
4112 rehash_using_reg (op1
);
4113 op1_hash
= HASH (op1
, mode
);
4116 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4117 op1_elt
->in_memory
= op1_in_memory
;
4120 ent
->comparison_const
= NULL_RTX
;
4121 ent
->comparison_qty
= REG_QTY (REGNO (op1
));
4125 ent
->comparison_const
= op1
;
4126 ent
->comparison_qty
= -1;
4132 /* If either side is still missing an equivalence, make it now,
4133 then merge the equivalences. */
4137 if (insert_regs (op0
, NULL
, 0))
4139 rehash_using_reg (op0
);
4140 op0_hash
= HASH (op0
, mode
);
4143 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4144 op0_elt
->in_memory
= op0_in_memory
;
4149 if (insert_regs (op1
, NULL
, 0))
4151 rehash_using_reg (op1
);
4152 op1_hash
= HASH (op1
, mode
);
4155 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4156 op1_elt
->in_memory
= op1_in_memory
;
4159 merge_equiv_classes (op0_elt
, op1_elt
);
4162 /* CSE processing for one instruction.
4164 Most "true" common subexpressions are mostly optimized away in GIMPLE,
4165 but the few that "leak through" are cleaned up by cse_insn, and complex
4166 addressing modes are often formed here.
4168 The main function is cse_insn, and between here and that function
4169 a couple of helper functions is defined to keep the size of cse_insn
4170 within reasonable proportions.
4172 Data is shared between the main and helper functions via STRUCT SET,
4173 that contains all data related for every set in the instruction that
4176 Note that cse_main processes all sets in the instruction. Most
4177 passes in GCC only process simple SET insns or single_set insns, but
4178 CSE processes insns with multiple sets as well. */
4180 /* Data on one SET contained in the instruction. */
4184 /* The SET rtx itself. */
4186 /* The SET_SRC of the rtx (the original value, if it is changing). */
4188 /* The hash-table element for the SET_SRC of the SET. */
4189 struct table_elt
*src_elt
;
4190 /* Hash value for the SET_SRC. */
4192 /* Hash value for the SET_DEST. */
4194 /* The SET_DEST, with SUBREG, etc., stripped. */
4196 /* Nonzero if the SET_SRC is in memory. */
4198 /* Nonzero if the SET_SRC contains something
4199 whose value cannot be predicted and understood. */
4201 /* Original machine mode, in case it becomes a CONST_INT.
4202 The size of this field should match the size of the mode
4203 field of struct rtx_def (see rtl.h). */
4204 ENUM_BITFIELD(machine_mode
) mode
: 8;
4205 /* Hash value of constant equivalent for SET_SRC. */
4206 unsigned src_const_hash
;
4207 /* A constant equivalent for SET_SRC, if any. */
4209 /* Table entry for constant equivalent for SET_SRC, if any. */
4210 struct table_elt
*src_const_elt
;
4211 /* Table entry for the destination address. */
4212 struct table_elt
*dest_addr_elt
;
4215 /* Special handling for (set REG0 REG1) where REG0 is the
4216 "cheapest", cheaper than REG1. After cse, REG1 will probably not
4217 be used in the sequel, so (if easily done) change this insn to
4218 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
4219 that computed their value. Then REG1 will become a dead store
4220 and won't cloud the situation for later optimizations.
4222 Do not make this change if REG1 is a hard register, because it will
4223 then be used in the sequel and we may be changing a two-operand insn
4224 into a three-operand insn.
4226 This is the last transformation that cse_insn will try to do. */
4229 try_back_substitute_reg (rtx set
, rtx_insn
*insn
)
4231 rtx dest
= SET_DEST (set
);
4232 rtx src
= SET_SRC (set
);
4235 && REG_P (src
) && ! HARD_REGISTER_P (src
)
4236 && REGNO_QTY_VALID_P (REGNO (src
)))
4238 int src_q
= REG_QTY (REGNO (src
));
4239 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
4241 if (src_ent
->first_reg
== REGNO (dest
))
4243 /* Scan for the previous nonnote insn, but stop at a basic
4245 rtx_insn
*prev
= insn
;
4246 rtx_insn
*bb_head
= BB_HEAD (BLOCK_FOR_INSN (insn
));
4249 prev
= PREV_INSN (prev
);
4251 while (prev
!= bb_head
&& (NOTE_P (prev
) || DEBUG_INSN_P (prev
)));
4253 /* Do not swap the registers around if the previous instruction
4254 attaches a REG_EQUIV note to REG1.
4256 ??? It's not entirely clear whether we can transfer a REG_EQUIV
4257 from the pseudo that originally shadowed an incoming argument
4258 to another register. Some uses of REG_EQUIV might rely on it
4259 being attached to REG1 rather than REG2.
4261 This section previously turned the REG_EQUIV into a REG_EQUAL
4262 note. We cannot do that because REG_EQUIV may provide an
4263 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
4264 if (NONJUMP_INSN_P (prev
)
4265 && GET_CODE (PATTERN (prev
)) == SET
4266 && SET_DEST (PATTERN (prev
)) == src
4267 && ! find_reg_note (prev
, REG_EQUIV
, NULL_RTX
))
4271 validate_change (prev
, &SET_DEST (PATTERN (prev
)), dest
, 1);
4272 validate_change (insn
, &SET_DEST (set
), src
, 1);
4273 validate_change (insn
, &SET_SRC (set
), dest
, 1);
4274 apply_change_group ();
4276 /* If INSN has a REG_EQUAL note, and this note mentions
4277 REG0, then we must delete it, because the value in
4278 REG0 has changed. If the note's value is REG1, we must
4279 also delete it because that is now this insn's dest. */
4280 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
4282 && (reg_mentioned_p (dest
, XEXP (note
, 0))
4283 || rtx_equal_p (src
, XEXP (note
, 0))))
4284 remove_note (insn
, note
);
4286 /* If INSN has a REG_ARGS_SIZE note, move it to PREV. */
4287 note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL_RTX
);
4290 remove_note (insn
, note
);
4291 gcc_assert (!find_reg_note (prev
, REG_ARGS_SIZE
, NULL_RTX
));
4292 set_unique_reg_note (prev
, REG_ARGS_SIZE
, XEXP (note
, 0));
4299 /* Record all the SETs in this instruction into SETS_PTR,
4300 and return the number of recorded sets. */
4302 find_sets_in_insn (rtx_insn
*insn
, struct set
**psets
)
4304 struct set
*sets
= *psets
;
4306 rtx x
= PATTERN (insn
);
4308 if (GET_CODE (x
) == SET
)
4310 /* Ignore SETs that are unconditional jumps.
4311 They never need cse processing, so this does not hurt.
4312 The reason is not efficiency but rather
4313 so that we can test at the end for instructions
4314 that have been simplified to unconditional jumps
4315 and not be misled by unchanged instructions
4316 that were unconditional jumps to begin with. */
4317 if (SET_DEST (x
) == pc_rtx
4318 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
4320 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4321 The hard function value register is used only once, to copy to
4322 someplace else, so it isn't worth cse'ing. */
4323 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4326 sets
[n_sets
++].rtl
= x
;
4328 else if (GET_CODE (x
) == PARALLEL
)
4330 int i
, lim
= XVECLEN (x
, 0);
4332 /* Go over the expressions of the PARALLEL in forward order, to
4333 put them in the same order in the SETS array. */
4334 for (i
= 0; i
< lim
; i
++)
4336 rtx y
= XVECEXP (x
, 0, i
);
4337 if (GET_CODE (y
) == SET
)
4339 /* As above, we ignore unconditional jumps and call-insns and
4340 ignore the result of apply_change_group. */
4341 if (SET_DEST (y
) == pc_rtx
4342 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
4344 else if (GET_CODE (SET_SRC (y
)) == CALL
)
4347 sets
[n_sets
++].rtl
= y
;
4355 /* Subroutine of canonicalize_insn. X is an ASM_OPERANDS in INSN. */
4358 canon_asm_operands (rtx x
, rtx_insn
*insn
)
4360 for (int i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
4362 rtx input
= ASM_OPERANDS_INPUT (x
, i
);
4363 if (!(REG_P (input
) && HARD_REGISTER_P (input
)))
4365 input
= canon_reg (input
, insn
);
4366 validate_change (insn
, &ASM_OPERANDS_INPUT (x
, i
), input
, 1);
4371 /* Where possible, substitute every register reference in the N_SETS
4372 number of SETS in INSN with the canonical register.
4374 Register canonicalization propagatest the earliest register (i.e.
4375 one that is set before INSN) with the same value. This is a very
4376 useful, simple form of CSE, to clean up warts from expanding GIMPLE
4377 to RTL. For instance, a CONST for an address is usually expanded
4378 multiple times to loads into different registers, thus creating many
4379 subexpressions of the form:
4381 (set (reg1) (some_const))
4382 (set (mem (... reg1 ...) (thing)))
4383 (set (reg2) (some_const))
4384 (set (mem (... reg2 ...) (thing)))
4386 After canonicalizing, the code takes the following form:
4388 (set (reg1) (some_const))
4389 (set (mem (... reg1 ...) (thing)))
4390 (set (reg2) (some_const))
4391 (set (mem (... reg1 ...) (thing)))
4393 The set to reg2 is now trivially dead, and the memory reference (or
4394 address, or whatever) may be a candidate for further CSEing.
4396 In this function, the result of apply_change_group can be ignored;
4400 canonicalize_insn (rtx_insn
*insn
, struct set
**psets
, int n_sets
)
4402 struct set
*sets
= *psets
;
4404 rtx x
= PATTERN (insn
);
4409 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
4410 if (GET_CODE (XEXP (tem
, 0)) != SET
)
4411 XEXP (tem
, 0) = canon_reg (XEXP (tem
, 0), insn
);
4414 if (GET_CODE (x
) == SET
&& GET_CODE (SET_SRC (x
)) == CALL
)
4416 canon_reg (SET_SRC (x
), insn
);
4417 apply_change_group ();
4418 fold_rtx (SET_SRC (x
), insn
);
4420 else if (GET_CODE (x
) == CLOBBER
)
4422 /* If we clobber memory, canon the address.
4423 This does nothing when a register is clobbered
4424 because we have already invalidated the reg. */
4425 if (MEM_P (XEXP (x
, 0)))
4426 canon_reg (XEXP (x
, 0), insn
);
4428 else if (GET_CODE (x
) == CLOBBER_HIGH
)
4429 gcc_assert (REG_P (XEXP (x
, 0)));
4430 else if (GET_CODE (x
) == USE
4431 && ! (REG_P (XEXP (x
, 0))
4432 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
4433 /* Canonicalize a USE of a pseudo register or memory location. */
4434 canon_reg (x
, insn
);
4435 else if (GET_CODE (x
) == ASM_OPERANDS
)
4436 canon_asm_operands (x
, insn
);
4437 else if (GET_CODE (x
) == CALL
)
4439 canon_reg (x
, insn
);
4440 apply_change_group ();
4443 else if (DEBUG_INSN_P (insn
))
4444 canon_reg (PATTERN (insn
), insn
);
4445 else if (GET_CODE (x
) == PARALLEL
)
4447 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
4449 rtx y
= XVECEXP (x
, 0, i
);
4450 if (GET_CODE (y
) == SET
&& GET_CODE (SET_SRC (y
)) == CALL
)
4452 canon_reg (SET_SRC (y
), insn
);
4453 apply_change_group ();
4454 fold_rtx (SET_SRC (y
), insn
);
4456 else if (GET_CODE (y
) == CLOBBER
)
4458 if (MEM_P (XEXP (y
, 0)))
4459 canon_reg (XEXP (y
, 0), insn
);
4461 else if (GET_CODE (y
) == CLOBBER_HIGH
)
4462 gcc_assert (REG_P (XEXP (y
, 0)));
4463 else if (GET_CODE (y
) == USE
4464 && ! (REG_P (XEXP (y
, 0))
4465 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
4466 canon_reg (y
, insn
);
4467 else if (GET_CODE (y
) == ASM_OPERANDS
)
4468 canon_asm_operands (y
, insn
);
4469 else if (GET_CODE (y
) == CALL
)
4471 canon_reg (y
, insn
);
4472 apply_change_group ();
4478 if (n_sets
== 1 && REG_NOTES (insn
) != 0
4479 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0)
4481 /* We potentially will process this insn many times. Therefore,
4482 drop the REG_EQUAL note if it is equal to the SET_SRC of the
4485 Do not do so if the REG_EQUAL note is for a STRICT_LOW_PART,
4486 because cse_insn handles those specially. */
4487 if (GET_CODE (SET_DEST (sets
[0].rtl
)) != STRICT_LOW_PART
4488 && rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
)))
4489 remove_note (insn
, tem
);
4492 canon_reg (XEXP (tem
, 0), insn
);
4493 apply_change_group ();
4494 XEXP (tem
, 0) = fold_rtx (XEXP (tem
, 0), insn
);
4495 df_notes_rescan (insn
);
4499 /* Canonicalize sources and addresses of destinations.
4500 We do this in a separate pass to avoid problems when a MATCH_DUP is
4501 present in the insn pattern. In that case, we want to ensure that
4502 we don't break the duplicate nature of the pattern. So we will replace
4503 both operands at the same time. Otherwise, we would fail to find an
4504 equivalent substitution in the loop calling validate_change below.
4506 We used to suppress canonicalization of DEST if it appears in SRC,
4507 but we don't do this any more. */
4509 for (i
= 0; i
< n_sets
; i
++)
4511 rtx dest
= SET_DEST (sets
[i
].rtl
);
4512 rtx src
= SET_SRC (sets
[i
].rtl
);
4513 rtx new_rtx
= canon_reg (src
, insn
);
4515 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_rtx
, 1);
4517 if (GET_CODE (dest
) == ZERO_EXTRACT
)
4519 validate_change (insn
, &XEXP (dest
, 1),
4520 canon_reg (XEXP (dest
, 1), insn
), 1);
4521 validate_change (insn
, &XEXP (dest
, 2),
4522 canon_reg (XEXP (dest
, 2), insn
), 1);
4525 while (GET_CODE (dest
) == SUBREG
4526 || GET_CODE (dest
) == ZERO_EXTRACT
4527 || GET_CODE (dest
) == STRICT_LOW_PART
)
4528 dest
= XEXP (dest
, 0);
4531 canon_reg (dest
, insn
);
4534 /* Now that we have done all the replacements, we can apply the change
4535 group and see if they all work. Note that this will cause some
4536 canonicalizations that would have worked individually not to be applied
4537 because some other canonicalization didn't work, but this should not
4540 The result of apply_change_group can be ignored; see canon_reg. */
4542 apply_change_group ();
4545 /* Main function of CSE.
4546 First simplify sources and addresses of all assignments
4547 in the instruction, using previously-computed equivalents values.
4548 Then install the new sources and destinations in the table
4549 of available values. */
4552 cse_insn (rtx_insn
*insn
)
4554 rtx x
= PATTERN (insn
);
4560 struct table_elt
*src_eqv_elt
= 0;
4561 int src_eqv_volatile
= 0;
4562 int src_eqv_in_memory
= 0;
4563 unsigned src_eqv_hash
= 0;
4565 struct set
*sets
= (struct set
*) 0;
4567 if (GET_CODE (x
) == SET
)
4568 sets
= XALLOCA (struct set
);
4569 else if (GET_CODE (x
) == PARALLEL
)
4570 sets
= XALLOCAVEC (struct set
, XVECLEN (x
, 0));
4573 /* Records what this insn does to set CC0. */
4575 this_insn_cc0_mode
= VOIDmode
;
4577 /* Find all regs explicitly clobbered in this insn,
4578 to ensure they are not replaced with any other regs
4579 elsewhere in this insn. */
4580 invalidate_from_sets_and_clobbers (insn
);
4582 /* Record all the SETs in this instruction. */
4583 n_sets
= find_sets_in_insn (insn
, &sets
);
4585 /* Substitute the canonical register where possible. */
4586 canonicalize_insn (insn
, &sets
, n_sets
);
4588 /* If this insn has a REG_EQUAL note, store the equivalent value in SRC_EQV,
4589 if different, or if the DEST is a STRICT_LOW_PART/ZERO_EXTRACT. The
4590 latter condition is necessary because SRC_EQV is handled specially for
4591 this case, and if it isn't set, then there will be no equivalence
4592 for the destination. */
4593 if (n_sets
== 1 && REG_NOTES (insn
) != 0
4594 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0)
4597 if (GET_CODE (SET_DEST (sets
[0].rtl
)) != ZERO_EXTRACT
4598 && (! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
))
4599 || GET_CODE (SET_DEST (sets
[0].rtl
)) == STRICT_LOW_PART
))
4600 src_eqv
= copy_rtx (XEXP (tem
, 0));
4601 /* If DEST is of the form ZERO_EXTACT, as in:
4602 (set (zero_extract:SI (reg:SI 119)
4603 (const_int 16 [0x10])
4604 (const_int 16 [0x10]))
4605 (const_int 51154 [0xc7d2]))
4606 REG_EQUAL note will specify the value of register (reg:SI 119) at this
4607 point. Note that this is different from SRC_EQV. We can however
4608 calculate SRC_EQV with the position and width of ZERO_EXTRACT. */
4609 else if (GET_CODE (SET_DEST (sets
[0].rtl
)) == ZERO_EXTRACT
4610 && CONST_INT_P (XEXP (tem
, 0))
4611 && CONST_INT_P (XEXP (SET_DEST (sets
[0].rtl
), 1))
4612 && CONST_INT_P (XEXP (SET_DEST (sets
[0].rtl
), 2)))
4614 rtx dest_reg
= XEXP (SET_DEST (sets
[0].rtl
), 0);
4615 /* This is the mode of XEXP (tem, 0) as well. */
4616 scalar_int_mode dest_mode
4617 = as_a
<scalar_int_mode
> (GET_MODE (dest_reg
));
4618 rtx width
= XEXP (SET_DEST (sets
[0].rtl
), 1);
4619 rtx pos
= XEXP (SET_DEST (sets
[0].rtl
), 2);
4620 HOST_WIDE_INT val
= INTVAL (XEXP (tem
, 0));
4623 if (BITS_BIG_ENDIAN
)
4624 shift
= (GET_MODE_PRECISION (dest_mode
)
4625 - INTVAL (pos
) - INTVAL (width
));
4627 shift
= INTVAL (pos
);
4628 if (INTVAL (width
) == HOST_BITS_PER_WIDE_INT
)
4629 mask
= HOST_WIDE_INT_M1
;
4631 mask
= (HOST_WIDE_INT_1
<< INTVAL (width
)) - 1;
4632 val
= (val
>> shift
) & mask
;
4633 src_eqv
= GEN_INT (val
);
4637 /* Set sets[i].src_elt to the class each source belongs to.
4638 Detect assignments from or to volatile things
4639 and set set[i] to zero so they will be ignored
4640 in the rest of this function.
4642 Nothing in this loop changes the hash table or the register chains. */
4644 for (i
= 0; i
< n_sets
; i
++)
4646 bool repeat
= false;
4647 bool mem_noop_insn
= false;
4650 struct table_elt
*elt
= 0, *p
;
4654 rtx src_related
= 0;
4655 bool src_related_is_const_anchor
= false;
4656 struct table_elt
*src_const_elt
= 0;
4657 int src_cost
= MAX_COST
;
4658 int src_eqv_cost
= MAX_COST
;
4659 int src_folded_cost
= MAX_COST
;
4660 int src_related_cost
= MAX_COST
;
4661 int src_elt_cost
= MAX_COST
;
4662 int src_regcost
= MAX_COST
;
4663 int src_eqv_regcost
= MAX_COST
;
4664 int src_folded_regcost
= MAX_COST
;
4665 int src_related_regcost
= MAX_COST
;
4666 int src_elt_regcost
= MAX_COST
;
4667 /* Set nonzero if we need to call force_const_mem on with the
4668 contents of src_folded before using it. */
4669 int src_folded_force_flag
= 0;
4670 scalar_int_mode int_mode
;
4672 dest
= SET_DEST (sets
[i
].rtl
);
4673 src
= SET_SRC (sets
[i
].rtl
);
4675 /* If SRC is a constant that has no machine mode,
4676 hash it with the destination's machine mode.
4677 This way we can keep different modes separate. */
4679 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
4680 sets
[i
].mode
= mode
;
4684 machine_mode eqvmode
= mode
;
4685 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4686 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
4688 hash_arg_in_memory
= 0;
4689 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
4691 /* Find the equivalence class for the equivalent expression. */
4694 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
4696 src_eqv_volatile
= do_not_record
;
4697 src_eqv_in_memory
= hash_arg_in_memory
;
4700 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4701 value of the INNER register, not the destination. So it is not
4702 a valid substitution for the source. But save it for later. */
4703 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4706 src_eqv_here
= src_eqv
;
4708 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4709 simplified result, which may not necessarily be valid. */
4710 src_folded
= fold_rtx (src
, NULL
);
4713 /* ??? This caused bad code to be generated for the m68k port with -O2.
4714 Suppose src is (CONST_INT -1), and that after truncation src_folded
4715 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4716 At the end we will add src and src_const to the same equivalence
4717 class. We now have 3 and -1 on the same equivalence class. This
4718 causes later instructions to be mis-optimized. */
4719 /* If storing a constant in a bitfield, pre-truncate the constant
4720 so we will be able to record it later. */
4721 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
)
4723 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
4725 if (CONST_INT_P (src
)
4726 && CONST_INT_P (width
)
4727 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
4728 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
4730 = GEN_INT (INTVAL (src
) & ((HOST_WIDE_INT_1
4731 << INTVAL (width
)) - 1));
4735 /* Compute SRC's hash code, and also notice if it
4736 should not be recorded at all. In that case,
4737 prevent any further processing of this assignment. */
4739 hash_arg_in_memory
= 0;
4742 sets
[i
].src_hash
= HASH (src
, mode
);
4743 sets
[i
].src_volatile
= do_not_record
;
4744 sets
[i
].src_in_memory
= hash_arg_in_memory
;
4746 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4747 a pseudo, do not record SRC. Using SRC as a replacement for
4748 anything else will be incorrect in that situation. Note that
4749 this usually occurs only for stack slots, in which case all the
4750 RTL would be referring to SRC, so we don't lose any optimization
4751 opportunities by not having SRC in the hash table. */
4754 && find_reg_note (insn
, REG_EQUIV
, NULL_RTX
) != 0
4756 && REGNO (dest
) >= FIRST_PSEUDO_REGISTER
)
4757 sets
[i
].src_volatile
= 1;
4759 else if (GET_CODE (src
) == ASM_OPERANDS
4760 && GET_CODE (x
) == PARALLEL
)
4762 /* Do not record result of a non-volatile inline asm with
4763 more than one result. */
4765 sets
[i
].src_volatile
= 1;
4767 int j
, lim
= XVECLEN (x
, 0);
4768 for (j
= 0; j
< lim
; j
++)
4770 rtx y
= XVECEXP (x
, 0, j
);
4771 /* And do not record result of a non-volatile inline asm
4772 with "memory" clobber. */
4773 if (GET_CODE (y
) == CLOBBER
&& MEM_P (XEXP (y
, 0)))
4775 sets
[i
].src_volatile
= 1;
4782 /* It is no longer clear why we used to do this, but it doesn't
4783 appear to still be needed. So let's try without it since this
4784 code hurts cse'ing widened ops. */
4785 /* If source is a paradoxical subreg (such as QI treated as an SI),
4786 treat it as volatile. It may do the work of an SI in one context
4787 where the extra bits are not being used, but cannot replace an SI
4789 if (paradoxical_subreg_p (src
))
4790 sets
[i
].src_volatile
= 1;
4793 /* Locate all possible equivalent forms for SRC. Try to replace
4794 SRC in the insn with each cheaper equivalent.
4796 We have the following types of equivalents: SRC itself, a folded
4797 version, a value given in a REG_EQUAL note, or a value related
4800 Each of these equivalents may be part of an additional class
4801 of equivalents (if more than one is in the table, they must be in
4802 the same class; we check for this).
4804 If the source is volatile, we don't do any table lookups.
4806 We note any constant equivalent for possible later use in a
4809 if (!sets
[i
].src_volatile
)
4810 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
4812 sets
[i
].src_elt
= elt
;
4814 if (elt
&& src_eqv_here
&& src_eqv_elt
)
4816 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
4818 /* The REG_EQUAL is indicating that two formerly distinct
4819 classes are now equivalent. So merge them. */
4820 merge_equiv_classes (elt
, src_eqv_elt
);
4821 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
4822 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
4828 else if (src_eqv_elt
)
4831 /* Try to find a constant somewhere and record it in `src_const'.
4832 Record its table element, if any, in `src_const_elt'. Look in
4833 any known equivalences first. (If the constant is not in the
4834 table, also set `sets[i].src_const_hash'). */
4836 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
4840 src_const_elt
= elt
;
4845 && (CONSTANT_P (src_folded
)
4846 /* Consider (minus (label_ref L1) (label_ref L2)) as
4847 "constant" here so we will record it. This allows us
4848 to fold switch statements when an ADDR_DIFF_VEC is used. */
4849 || (GET_CODE (src_folded
) == MINUS
4850 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
4851 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
4852 src_const
= src_folded
, src_const_elt
= elt
;
4853 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
4854 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
4856 /* If we don't know if the constant is in the table, get its
4857 hash code and look it up. */
4858 if (src_const
&& src_const_elt
== 0)
4860 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
4861 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
4864 sets
[i
].src_const
= src_const
;
4865 sets
[i
].src_const_elt
= src_const_elt
;
4867 /* If the constant and our source are both in the table, mark them as
4868 equivalent. Otherwise, if a constant is in the table but the source
4869 isn't, set ELT to it. */
4870 if (src_const_elt
&& elt
4871 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
4872 merge_equiv_classes (elt
, src_const_elt
);
4873 else if (src_const_elt
&& elt
== 0)
4874 elt
= src_const_elt
;
4876 /* See if there is a register linearly related to a constant
4877 equivalent of SRC. */
4879 && (GET_CODE (src_const
) == CONST
4880 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
4882 src_related
= use_related_value (src_const
, src_const_elt
);
4885 struct table_elt
*src_related_elt
4886 = lookup (src_related
, HASH (src_related
, mode
), mode
);
4887 if (src_related_elt
&& elt
)
4889 if (elt
->first_same_value
4890 != src_related_elt
->first_same_value
)
4891 /* This can occur when we previously saw a CONST
4892 involving a SYMBOL_REF and then see the SYMBOL_REF
4893 twice. Merge the involved classes. */
4894 merge_equiv_classes (elt
, src_related_elt
);
4897 src_related_elt
= 0;
4899 else if (src_related_elt
&& elt
== 0)
4900 elt
= src_related_elt
;
4904 /* See if we have a CONST_INT that is already in a register in a
4907 if (src_const
&& src_related
== 0 && CONST_INT_P (src_const
)
4908 && is_int_mode (mode
, &int_mode
)
4909 && GET_MODE_PRECISION (int_mode
) < BITS_PER_WORD
)
4911 opt_scalar_int_mode wider_mode_iter
;
4912 FOR_EACH_WIDER_MODE (wider_mode_iter
, int_mode
)
4914 scalar_int_mode wider_mode
= wider_mode_iter
.require ();
4915 if (GET_MODE_PRECISION (wider_mode
) > BITS_PER_WORD
)
4918 struct table_elt
*const_elt
4919 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
4924 for (const_elt
= const_elt
->first_same_value
;
4925 const_elt
; const_elt
= const_elt
->next_same_value
)
4926 if (REG_P (const_elt
->exp
))
4928 src_related
= gen_lowpart (int_mode
, const_elt
->exp
);
4932 if (src_related
!= 0)
4937 /* Another possibility is that we have an AND with a constant in
4938 a mode narrower than a word. If so, it might have been generated
4939 as part of an "if" which would narrow the AND. If we already
4940 have done the AND in a wider mode, we can use a SUBREG of that
4943 if (flag_expensive_optimizations
&& ! src_related
4944 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
4945 && GET_CODE (src
) == AND
&& CONST_INT_P (XEXP (src
, 1))
4946 && GET_MODE_SIZE (int_mode
) < UNITS_PER_WORD
)
4948 opt_scalar_int_mode tmode_iter
;
4949 rtx new_and
= gen_rtx_AND (VOIDmode
, NULL_RTX
, XEXP (src
, 1));
4951 FOR_EACH_WIDER_MODE (tmode_iter
, int_mode
)
4953 scalar_int_mode tmode
= tmode_iter
.require ();
4954 if (GET_MODE_SIZE (tmode
) > UNITS_PER_WORD
)
4957 rtx inner
= gen_lowpart (tmode
, XEXP (src
, 0));
4958 struct table_elt
*larger_elt
;
4962 PUT_MODE (new_and
, tmode
);
4963 XEXP (new_and
, 0) = inner
;
4964 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
4965 if (larger_elt
== 0)
4968 for (larger_elt
= larger_elt
->first_same_value
;
4969 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
4970 if (REG_P (larger_elt
->exp
))
4973 = gen_lowpart (int_mode
, larger_elt
->exp
);
4983 /* See if a MEM has already been loaded with a widening operation;
4984 if it has, we can use a subreg of that. Many CISC machines
4985 also have such operations, but this is only likely to be
4986 beneficial on these machines. */
4989 if (flag_expensive_optimizations
&& src_related
== 0
4990 && MEM_P (src
) && ! do_not_record
4991 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
4992 && (extend_op
= load_extend_op (int_mode
)) != UNKNOWN
)
4994 struct rtx_def memory_extend_buf
;
4995 rtx memory_extend_rtx
= &memory_extend_buf
;
4997 /* Set what we are trying to extend and the operation it might
4998 have been extended with. */
4999 memset (memory_extend_rtx
, 0, sizeof (*memory_extend_rtx
));
5000 PUT_CODE (memory_extend_rtx
, extend_op
);
5001 XEXP (memory_extend_rtx
, 0) = src
;
5003 opt_scalar_int_mode tmode_iter
;
5004 FOR_EACH_WIDER_MODE (tmode_iter
, int_mode
)
5006 struct table_elt
*larger_elt
;
5008 scalar_int_mode tmode
= tmode_iter
.require ();
5009 if (GET_MODE_SIZE (tmode
) > UNITS_PER_WORD
)
5012 PUT_MODE (memory_extend_rtx
, tmode
);
5013 larger_elt
= lookup (memory_extend_rtx
,
5014 HASH (memory_extend_rtx
, tmode
), tmode
);
5015 if (larger_elt
== 0)
5018 for (larger_elt
= larger_elt
->first_same_value
;
5019 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
5020 if (REG_P (larger_elt
->exp
))
5022 src_related
= gen_lowpart (int_mode
, larger_elt
->exp
);
5031 /* Try to express the constant using a register+offset expression
5032 derived from a constant anchor. */
5034 if (targetm
.const_anchor
5037 && GET_CODE (src_const
) == CONST_INT
)
5039 src_related
= try_const_anchors (src_const
, mode
);
5040 src_related_is_const_anchor
= src_related
!= NULL_RTX
;
5044 if (src
== src_folded
)
5047 /* At this point, ELT, if nonzero, points to a class of expressions
5048 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5049 and SRC_RELATED, if nonzero, each contain additional equivalent
5050 expressions. Prune these latter expressions by deleting expressions
5051 already in the equivalence class.
5053 Check for an equivalent identical to the destination. If found,
5054 this is the preferred equivalent since it will likely lead to
5055 elimination of the insn. Indicate this by placing it in
5059 elt
= elt
->first_same_value
;
5060 for (p
= elt
; p
; p
= p
->next_same_value
)
5062 enum rtx_code code
= GET_CODE (p
->exp
);
5064 /* If the expression is not valid, ignore it. Then we do not
5065 have to check for validity below. In most cases, we can use
5066 `rtx_equal_p', since canonicalization has already been done. */
5067 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
5070 /* Also skip paradoxical subregs, unless that's what we're
5072 if (paradoxical_subreg_p (p
->exp
)
5074 && GET_CODE (src
) == SUBREG
5075 && GET_MODE (src
) == GET_MODE (p
->exp
)
5076 && partial_subreg_p (GET_MODE (SUBREG_REG (src
)),
5077 GET_MODE (SUBREG_REG (p
->exp
)))))
5080 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
5082 else if (src_folded
&& GET_CODE (src_folded
) == code
5083 && rtx_equal_p (src_folded
, p
->exp
))
5085 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
5086 && rtx_equal_p (src_eqv_here
, p
->exp
))
5088 else if (src_related
&& GET_CODE (src_related
) == code
5089 && rtx_equal_p (src_related
, p
->exp
))
5092 /* This is the same as the destination of the insns, we want
5093 to prefer it. Copy it to src_related. The code below will
5094 then give it a negative cost. */
5095 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
5099 /* Find the cheapest valid equivalent, trying all the available
5100 possibilities. Prefer items not in the hash table to ones
5101 that are when they are equal cost. Note that we can never
5102 worsen an insn as the current contents will also succeed.
5103 If we find an equivalent identical to the destination, use it as best,
5104 since this insn will probably be eliminated in that case. */
5107 if (rtx_equal_p (src
, dest
))
5108 src_cost
= src_regcost
= -1;
5111 src_cost
= COST (src
, mode
);
5112 src_regcost
= approx_reg_cost (src
);
5118 if (rtx_equal_p (src_eqv_here
, dest
))
5119 src_eqv_cost
= src_eqv_regcost
= -1;
5122 src_eqv_cost
= COST (src_eqv_here
, mode
);
5123 src_eqv_regcost
= approx_reg_cost (src_eqv_here
);
5129 if (rtx_equal_p (src_folded
, dest
))
5130 src_folded_cost
= src_folded_regcost
= -1;
5133 src_folded_cost
= COST (src_folded
, mode
);
5134 src_folded_regcost
= approx_reg_cost (src_folded
);
5140 if (rtx_equal_p (src_related
, dest
))
5141 src_related_cost
= src_related_regcost
= -1;
5144 src_related_cost
= COST (src_related
, mode
);
5145 src_related_regcost
= approx_reg_cost (src_related
);
5147 /* If a const-anchor is used to synthesize a constant that
5148 normally requires multiple instructions then slightly prefer
5149 it over the original sequence. These instructions are likely
5150 to become redundant now. We can't compare against the cost
5151 of src_eqv_here because, on MIPS for example, multi-insn
5152 constants have zero cost; they are assumed to be hoisted from
5154 if (src_related_is_const_anchor
5155 && src_related_cost
== src_cost
5161 /* If this was an indirect jump insn, a known label will really be
5162 cheaper even though it looks more expensive. */
5163 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
5164 src_folded
= src_const
, src_folded_cost
= src_folded_regcost
= -1;
5166 /* Terminate loop when replacement made. This must terminate since
5167 the current contents will be tested and will always be valid. */
5172 /* Skip invalid entries. */
5173 while (elt
&& !REG_P (elt
->exp
)
5174 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
5175 elt
= elt
->next_same_value
;
5177 /* A paradoxical subreg would be bad here: it'll be the right
5178 size, but later may be adjusted so that the upper bits aren't
5179 what we want. So reject it. */
5181 && paradoxical_subreg_p (elt
->exp
)
5182 /* It is okay, though, if the rtx we're trying to match
5183 will ignore any of the bits we can't predict. */
5185 && GET_CODE (src
) == SUBREG
5186 && GET_MODE (src
) == GET_MODE (elt
->exp
)
5187 && partial_subreg_p (GET_MODE (SUBREG_REG (src
)),
5188 GET_MODE (SUBREG_REG (elt
->exp
)))))
5190 elt
= elt
->next_same_value
;
5196 src_elt_cost
= elt
->cost
;
5197 src_elt_regcost
= elt
->regcost
;
5200 /* Find cheapest and skip it for the next time. For items
5201 of equal cost, use this order:
5202 src_folded, src, src_eqv, src_related and hash table entry. */
5204 && preferable (src_folded_cost
, src_folded_regcost
,
5205 src_cost
, src_regcost
) <= 0
5206 && preferable (src_folded_cost
, src_folded_regcost
,
5207 src_eqv_cost
, src_eqv_regcost
) <= 0
5208 && preferable (src_folded_cost
, src_folded_regcost
,
5209 src_related_cost
, src_related_regcost
) <= 0
5210 && preferable (src_folded_cost
, src_folded_regcost
,
5211 src_elt_cost
, src_elt_regcost
) <= 0)
5213 trial
= src_folded
, src_folded_cost
= MAX_COST
;
5214 if (src_folded_force_flag
)
5216 rtx forced
= force_const_mem (mode
, trial
);
5222 && preferable (src_cost
, src_regcost
,
5223 src_eqv_cost
, src_eqv_regcost
) <= 0
5224 && preferable (src_cost
, src_regcost
,
5225 src_related_cost
, src_related_regcost
) <= 0
5226 && preferable (src_cost
, src_regcost
,
5227 src_elt_cost
, src_elt_regcost
) <= 0)
5228 trial
= src
, src_cost
= MAX_COST
;
5229 else if (src_eqv_here
5230 && preferable (src_eqv_cost
, src_eqv_regcost
,
5231 src_related_cost
, src_related_regcost
) <= 0
5232 && preferable (src_eqv_cost
, src_eqv_regcost
,
5233 src_elt_cost
, src_elt_regcost
) <= 0)
5234 trial
= src_eqv_here
, src_eqv_cost
= MAX_COST
;
5235 else if (src_related
5236 && preferable (src_related_cost
, src_related_regcost
,
5237 src_elt_cost
, src_elt_regcost
) <= 0)
5238 trial
= src_related
, src_related_cost
= MAX_COST
;
5242 elt
= elt
->next_same_value
;
5243 src_elt_cost
= MAX_COST
;
5247 (set (reg:M N) (const_int A))
5248 (set (reg:M2 O) (const_int B))
5249 (set (zero_extract:M2 (reg:M N) (const_int C) (const_int D))
5251 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
5252 && CONST_INT_P (trial
)
5253 && CONST_INT_P (XEXP (SET_DEST (sets
[i
].rtl
), 1))
5254 && CONST_INT_P (XEXP (SET_DEST (sets
[i
].rtl
), 2))
5255 && REG_P (XEXP (SET_DEST (sets
[i
].rtl
), 0))
5257 (GET_MODE_PRECISION (GET_MODE (SET_DEST (sets
[i
].rtl
))),
5258 INTVAL (XEXP (SET_DEST (sets
[i
].rtl
), 1))))
5259 && ((unsigned) INTVAL (XEXP (SET_DEST (sets
[i
].rtl
), 1))
5260 + (unsigned) INTVAL (XEXP (SET_DEST (sets
[i
].rtl
), 2))
5261 <= HOST_BITS_PER_WIDE_INT
))
5263 rtx dest_reg
= XEXP (SET_DEST (sets
[i
].rtl
), 0);
5264 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5265 rtx pos
= XEXP (SET_DEST (sets
[i
].rtl
), 2);
5266 unsigned int dest_hash
= HASH (dest_reg
, GET_MODE (dest_reg
));
5267 struct table_elt
*dest_elt
5268 = lookup (dest_reg
, dest_hash
, GET_MODE (dest_reg
));
5269 rtx dest_cst
= NULL
;
5272 for (p
= dest_elt
->first_same_value
; p
; p
= p
->next_same_value
)
5273 if (p
->is_const
&& CONST_INT_P (p
->exp
))
5280 HOST_WIDE_INT val
= INTVAL (dest_cst
);
5283 /* This is the mode of DEST_CST as well. */
5284 scalar_int_mode dest_mode
5285 = as_a
<scalar_int_mode
> (GET_MODE (dest_reg
));
5286 if (BITS_BIG_ENDIAN
)
5287 shift
= GET_MODE_PRECISION (dest_mode
)
5288 - INTVAL (pos
) - INTVAL (width
);
5290 shift
= INTVAL (pos
);
5291 if (INTVAL (width
) == HOST_BITS_PER_WIDE_INT
)
5292 mask
= HOST_WIDE_INT_M1
;
5294 mask
= (HOST_WIDE_INT_1
<< INTVAL (width
)) - 1;
5295 val
&= ~(mask
<< shift
);
5296 val
|= (INTVAL (trial
) & mask
) << shift
;
5297 val
= trunc_int_for_mode (val
, dest_mode
);
5298 validate_unshare_change (insn
, &SET_DEST (sets
[i
].rtl
),
5300 validate_unshare_change (insn
, &SET_SRC (sets
[i
].rtl
),
5302 if (apply_change_group ())
5304 rtx note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5307 remove_note (insn
, note
);
5308 df_notes_rescan (insn
);
5312 src_eqv_volatile
= 0;
5313 src_eqv_in_memory
= 0;
5321 /* We don't normally have an insn matching (set (pc) (pc)), so
5322 check for this separately here. We will delete such an
5325 For other cases such as a table jump or conditional jump
5326 where we know the ultimate target, go ahead and replace the
5327 operand. While that may not make a valid insn, we will
5328 reemit the jump below (and also insert any necessary
5330 if (n_sets
== 1 && dest
== pc_rtx
5332 || (GET_CODE (trial
) == LABEL_REF
5333 && ! condjump_p (insn
))))
5335 /* Don't substitute non-local labels, this confuses CFG. */
5336 if (GET_CODE (trial
) == LABEL_REF
5337 && LABEL_REF_NONLOCAL_P (trial
))
5340 SET_SRC (sets
[i
].rtl
) = trial
;
5341 cse_jumps_altered
= true;
5345 /* Similarly, lots of targets don't allow no-op
5346 (set (mem x) (mem x)) moves. */
5347 else if (n_sets
== 1
5350 && rtx_equal_p (trial
, dest
)
5351 && !side_effects_p (dest
)
5352 && (cfun
->can_delete_dead_exceptions
5353 || insn_nothrow_p (insn
)))
5355 SET_SRC (sets
[i
].rtl
) = trial
;
5356 mem_noop_insn
= true;
5360 /* Reject certain invalid forms of CONST that we create. */
5361 else if (CONSTANT_P (trial
)
5362 && GET_CODE (trial
) == CONST
5363 /* Reject cases that will cause decode_rtx_const to
5364 die. On the alpha when simplifying a switch, we
5365 get (const (truncate (minus (label_ref)
5367 && (GET_CODE (XEXP (trial
, 0)) == TRUNCATE
5368 /* Likewise on IA-64, except without the
5370 || (GET_CODE (XEXP (trial
, 0)) == MINUS
5371 && GET_CODE (XEXP (XEXP (trial
, 0), 0)) == LABEL_REF
5372 && GET_CODE (XEXP (XEXP (trial
, 0), 1)) == LABEL_REF
)))
5373 /* Do nothing for this case. */
5376 /* Do not replace anything with a MEM, except the replacement
5377 is a no-op. This allows this loop to terminate. */
5378 else if (MEM_P (trial
) && !rtx_equal_p (trial
, SET_SRC(sets
[i
].rtl
)))
5379 /* Do nothing for this case. */
5382 /* Look for a substitution that makes a valid insn. */
5383 else if (validate_unshare_change (insn
, &SET_SRC (sets
[i
].rtl
),
5386 rtx new_rtx
= canon_reg (SET_SRC (sets
[i
].rtl
), insn
);
5388 /* The result of apply_change_group can be ignored; see
5391 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_rtx
, 1);
5392 apply_change_group ();
5397 /* If we previously found constant pool entries for
5398 constants and this is a constant, try making a
5399 pool entry. Put it in src_folded unless we already have done
5400 this since that is where it likely came from. */
5402 else if (constant_pool_entries_cost
5403 && CONSTANT_P (trial
)
5405 || (!MEM_P (src_folded
)
5406 && ! src_folded_force_flag
))
5407 && GET_MODE_CLASS (mode
) != MODE_CC
5408 && mode
!= VOIDmode
)
5410 src_folded_force_flag
= 1;
5412 src_folded_cost
= constant_pool_entries_cost
;
5413 src_folded_regcost
= constant_pool_entries_regcost
;
5417 /* If we changed the insn too much, handle this set from scratch. */
5424 src
= SET_SRC (sets
[i
].rtl
);
5426 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5427 However, there is an important exception: If both are registers
5428 that are not the head of their equivalence class, replace SET_SRC
5429 with the head of the class. If we do not do this, we will have
5430 both registers live over a portion of the basic block. This way,
5431 their lifetimes will likely abut instead of overlapping. */
5433 && REGNO_QTY_VALID_P (REGNO (dest
)))
5435 int dest_q
= REG_QTY (REGNO (dest
));
5436 struct qty_table_elem
*dest_ent
= &qty_table
[dest_q
];
5438 if (dest_ent
->mode
== GET_MODE (dest
)
5439 && dest_ent
->first_reg
!= REGNO (dest
)
5440 && REG_P (src
) && REGNO (src
) == REGNO (dest
)
5441 /* Don't do this if the original insn had a hard reg as
5442 SET_SRC or SET_DEST. */
5443 && (!REG_P (sets
[i
].src
)
5444 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
)
5445 && (!REG_P (dest
) || REGNO (dest
) >= FIRST_PSEUDO_REGISTER
))
5446 /* We can't call canon_reg here because it won't do anything if
5447 SRC is a hard register. */
5449 int src_q
= REG_QTY (REGNO (src
));
5450 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
5451 int first
= src_ent
->first_reg
;
5453 = (first
>= FIRST_PSEUDO_REGISTER
5454 ? regno_reg_rtx
[first
] : gen_rtx_REG (GET_MODE (src
), first
));
5456 /* We must use validate-change even for this, because this
5457 might be a special no-op instruction, suitable only to
5459 if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_src
, 0))
5462 /* If we had a constant that is cheaper than what we are now
5463 setting SRC to, use that constant. We ignored it when we
5464 thought we could make this into a no-op. */
5465 if (src_const
&& COST (src_const
, mode
) < COST (src
, mode
)
5466 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
5473 /* If we made a change, recompute SRC values. */
5474 if (src
!= sets
[i
].src
)
5477 hash_arg_in_memory
= 0;
5479 sets
[i
].src_hash
= HASH (src
, mode
);
5480 sets
[i
].src_volatile
= do_not_record
;
5481 sets
[i
].src_in_memory
= hash_arg_in_memory
;
5482 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
5485 /* If this is a single SET, we are setting a register, and we have an
5486 equivalent constant, we want to add a REG_EQUAL note if the constant
5487 is different from the source. We don't want to do it for a constant
5488 pseudo since verifying that this pseudo hasn't been eliminated is a
5489 pain; moreover such a note won't help anything.
5491 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5492 which can be created for a reference to a compile time computable
5493 entry in a jump table. */
5497 && !REG_P (src_const
)
5498 && !(GET_CODE (src_const
) == SUBREG
5499 && REG_P (SUBREG_REG (src_const
)))
5500 && !(GET_CODE (src_const
) == CONST
5501 && GET_CODE (XEXP (src_const
, 0)) == MINUS
5502 && GET_CODE (XEXP (XEXP (src_const
, 0), 0)) == LABEL_REF
5503 && GET_CODE (XEXP (XEXP (src_const
, 0), 1)) == LABEL_REF
)
5504 && !rtx_equal_p (src
, src_const
))
5506 /* Make sure that the rtx is not shared. */
5507 src_const
= copy_rtx (src_const
);
5509 /* Record the actual constant value in a REG_EQUAL note,
5510 making a new one if one does not already exist. */
5511 set_unique_reg_note (insn
, REG_EQUAL
, src_const
);
5512 df_notes_rescan (insn
);
5515 /* Now deal with the destination. */
5518 /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
5519 while (GET_CODE (dest
) == SUBREG
5520 || GET_CODE (dest
) == ZERO_EXTRACT
5521 || GET_CODE (dest
) == STRICT_LOW_PART
)
5522 dest
= XEXP (dest
, 0);
5524 sets
[i
].inner_dest
= dest
;
5528 #ifdef PUSH_ROUNDING
5529 /* Stack pushes invalidate the stack pointer. */
5530 rtx addr
= XEXP (dest
, 0);
5531 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
5532 && XEXP (addr
, 0) == stack_pointer_rtx
)
5533 invalidate (stack_pointer_rtx
, VOIDmode
);
5535 dest
= fold_rtx (dest
, insn
);
5538 /* Compute the hash code of the destination now,
5539 before the effects of this instruction are recorded,
5540 since the register values used in the address computation
5541 are those before this instruction. */
5542 sets
[i
].dest_hash
= HASH (dest
, mode
);
5544 /* Don't enter a bit-field in the hash table
5545 because the value in it after the store
5546 may not equal what was stored, due to truncation. */
5548 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
)
5550 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5552 if (src_const
!= 0 && CONST_INT_P (src_const
)
5553 && CONST_INT_P (width
)
5554 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
5555 && ! (INTVAL (src_const
)
5556 & (HOST_WIDE_INT_M1U
<< INTVAL (width
))))
5557 /* Exception: if the value is constant,
5558 and it won't be truncated, record it. */
5562 /* This is chosen so that the destination will be invalidated
5563 but no new value will be recorded.
5564 We must invalidate because sometimes constant
5565 values can be recorded for bitfields. */
5566 sets
[i
].src_elt
= 0;
5567 sets
[i
].src_volatile
= 1;
5573 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5575 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
5577 /* One less use of the label this insn used to jump to. */
5578 cse_cfg_altered
|= delete_insn_and_edges (insn
);
5579 cse_jumps_altered
= true;
5580 /* No more processing for this set. */
5584 /* Similarly for no-op MEM moves. */
5585 else if (mem_noop_insn
)
5587 if (cfun
->can_throw_non_call_exceptions
&& can_throw_internal (insn
))
5588 cse_cfg_altered
= true;
5589 cse_cfg_altered
|= delete_insn_and_edges (insn
);
5590 /* No more processing for this set. */
5594 /* If this SET is now setting PC to a label, we know it used to
5595 be a conditional or computed branch. */
5596 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
5597 && !LABEL_REF_NONLOCAL_P (src
))
5599 /* We reemit the jump in as many cases as possible just in
5600 case the form of an unconditional jump is significantly
5601 different than a computed jump or conditional jump.
5603 If this insn has multiple sets, then reemitting the
5604 jump is nontrivial. So instead we just force rerecognition
5605 and hope for the best. */
5608 rtx_jump_insn
*new_rtx
;
5611 rtx_insn
*seq
= targetm
.gen_jump (XEXP (src
, 0));
5612 new_rtx
= emit_jump_insn_before (seq
, insn
);
5613 JUMP_LABEL (new_rtx
) = XEXP (src
, 0);
5614 LABEL_NUSES (XEXP (src
, 0))++;
5616 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5617 note
= find_reg_note (insn
, REG_NON_LOCAL_GOTO
, 0);
5620 XEXP (note
, 1) = NULL_RTX
;
5621 REG_NOTES (new_rtx
) = note
;
5624 cse_cfg_altered
|= delete_insn_and_edges (insn
);
5628 INSN_CODE (insn
) = -1;
5630 /* Do not bother deleting any unreachable code, let jump do it. */
5631 cse_jumps_altered
= true;
5635 /* If destination is volatile, invalidate it and then do no further
5636 processing for this assignment. */
5638 else if (do_not_record
)
5640 invalidate_dest (dest
);
5644 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
5647 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
5650 invalidate_dest (SET_DEST (sets
[i
].rtl
));
5655 /* If setting CC0, record what it was set to, or a constant, if it
5656 is equivalent to a constant. If it is being set to a floating-point
5657 value, make a COMPARE with the appropriate constant of 0. If we
5658 don't do this, later code can interpret this as a test against
5659 const0_rtx, which can cause problems if we try to put it into an
5660 insn as a floating-point operand. */
5661 if (dest
== cc0_rtx
)
5663 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
5664 this_insn_cc0_mode
= mode
;
5665 if (FLOAT_MODE_P (mode
))
5666 this_insn_cc0
= gen_rtx_COMPARE (VOIDmode
, this_insn_cc0
,
5671 /* Now enter all non-volatile source expressions in the hash table
5672 if they are not already present.
5673 Record their equivalence classes in src_elt.
5674 This way we can insert the corresponding destinations into
5675 the same classes even if the actual sources are no longer in them
5676 (having been invalidated). */
5678 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
5679 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
5681 struct table_elt
*elt
;
5682 struct table_elt
*classp
= sets
[0].src_elt
;
5683 rtx dest
= SET_DEST (sets
[0].rtl
);
5684 machine_mode eqvmode
= GET_MODE (dest
);
5686 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5688 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
5691 if (insert_regs (src_eqv
, classp
, 0))
5693 rehash_using_reg (src_eqv
);
5694 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
5696 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
5697 elt
->in_memory
= src_eqv_in_memory
;
5700 /* Check to see if src_eqv_elt is the same as a set source which
5701 does not yet have an elt, and if so set the elt of the set source
5703 for (i
= 0; i
< n_sets
; i
++)
5704 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
5705 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
5706 sets
[i
].src_elt
= src_eqv_elt
;
5709 for (i
= 0; i
< n_sets
; i
++)
5710 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
5711 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
5713 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
5715 /* REG_EQUAL in setting a STRICT_LOW_PART
5716 gives an equivalent for the entire destination register,
5717 not just for the subreg being stored in now.
5718 This is a more interesting equivalence, so we arrange later
5719 to treat the entire reg as the destination. */
5720 sets
[i
].src_elt
= src_eqv_elt
;
5721 sets
[i
].src_hash
= src_eqv_hash
;
5725 /* Insert source and constant equivalent into hash table, if not
5727 struct table_elt
*classp
= src_eqv_elt
;
5728 rtx src
= sets
[i
].src
;
5729 rtx dest
= SET_DEST (sets
[i
].rtl
);
5731 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
5733 /* It's possible that we have a source value known to be
5734 constant but don't have a REG_EQUAL note on the insn.
5735 Lack of a note will mean src_eqv_elt will be NULL. This
5736 can happen where we've generated a SUBREG to access a
5737 CONST_INT that is already in a register in a wider mode.
5738 Ensure that the source expression is put in the proper
5741 classp
= sets
[i
].src_const_elt
;
5743 if (sets
[i
].src_elt
== 0)
5745 struct table_elt
*elt
;
5747 /* Note that these insert_regs calls cannot remove
5748 any of the src_elt's, because they would have failed to
5749 match if not still valid. */
5750 if (insert_regs (src
, classp
, 0))
5752 rehash_using_reg (src
);
5753 sets
[i
].src_hash
= HASH (src
, mode
);
5755 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
5756 elt
->in_memory
= sets
[i
].src_in_memory
;
5757 /* If inline asm has any clobbers, ensure we only reuse
5758 existing inline asms and never try to put the ASM_OPERANDS
5759 into an insn that isn't inline asm. */
5760 if (GET_CODE (src
) == ASM_OPERANDS
5761 && GET_CODE (x
) == PARALLEL
)
5762 elt
->cost
= MAX_COST
;
5763 sets
[i
].src_elt
= classp
= elt
;
5765 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
5766 && src
!= sets
[i
].src_const
5767 && ! rtx_equal_p (sets
[i
].src_const
, src
))
5768 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
5769 sets
[i
].src_const_hash
, mode
);
5772 else if (sets
[i
].src_elt
== 0)
5773 /* If we did not insert the source into the hash table (e.g., it was
5774 volatile), note the equivalence class for the REG_EQUAL value, if any,
5775 so that the destination goes into that class. */
5776 sets
[i
].src_elt
= src_eqv_elt
;
5778 /* Record destination addresses in the hash table. This allows us to
5779 check if they are invalidated by other sets. */
5780 for (i
= 0; i
< n_sets
; i
++)
5784 rtx x
= sets
[i
].inner_dest
;
5785 struct table_elt
*elt
;
5792 mode
= GET_MODE (x
);
5793 hash
= HASH (x
, mode
);
5794 elt
= lookup (x
, hash
, mode
);
5797 if (insert_regs (x
, NULL
, 0))
5799 rtx dest
= SET_DEST (sets
[i
].rtl
);
5801 rehash_using_reg (x
);
5802 hash
= HASH (x
, mode
);
5803 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
5805 elt
= insert (x
, NULL
, hash
, mode
);
5808 sets
[i
].dest_addr_elt
= elt
;
5811 sets
[i
].dest_addr_elt
= NULL
;
5815 invalidate_from_clobbers (insn
);
5817 /* Some registers are invalidated by subroutine calls. Memory is
5818 invalidated by non-constant calls. */
5822 if (!(RTL_CONST_OR_PURE_CALL_P (insn
)))
5823 invalidate_memory ();
5825 /* For const/pure calls, invalidate any argument slots, because
5826 those are owned by the callee. */
5827 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
5828 if (GET_CODE (XEXP (tem
, 0)) == USE
5829 && MEM_P (XEXP (XEXP (tem
, 0), 0)))
5830 invalidate (XEXP (XEXP (tem
, 0), 0), VOIDmode
);
5831 invalidate_for_call (insn
);
5834 /* Now invalidate everything set by this instruction.
5835 If a SUBREG or other funny destination is being set,
5836 sets[i].rtl is still nonzero, so here we invalidate the reg
5837 a part of which is being set. */
5839 for (i
= 0; i
< n_sets
; i
++)
5842 /* We can't use the inner dest, because the mode associated with
5843 a ZERO_EXTRACT is significant. */
5844 rtx dest
= SET_DEST (sets
[i
].rtl
);
5846 /* Needed for registers to remove the register from its
5847 previous quantity's chain.
5848 Needed for memory if this is a nonvarying address, unless
5849 we have just done an invalidate_memory that covers even those. */
5850 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5851 invalidate (dest
, VOIDmode
);
5852 else if (MEM_P (dest
))
5853 invalidate (dest
, VOIDmode
);
5854 else if (GET_CODE (dest
) == STRICT_LOW_PART
5855 || GET_CODE (dest
) == ZERO_EXTRACT
)
5856 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5859 /* Don't cse over a call to setjmp; on some machines (eg VAX)
5860 the regs restored by the longjmp come from a later time
5862 if (CALL_P (insn
) && find_reg_note (insn
, REG_SETJMP
, NULL
))
5864 flush_hash_table ();
5868 /* Make sure registers mentioned in destinations
5869 are safe for use in an expression to be inserted.
5870 This removes from the hash table
5871 any invalid entry that refers to one of these registers.
5873 We don't care about the return value from mention_regs because
5874 we are going to hash the SET_DEST values unconditionally. */
5876 for (i
= 0; i
< n_sets
; i
++)
5880 rtx x
= SET_DEST (sets
[i
].rtl
);
5886 /* We used to rely on all references to a register becoming
5887 inaccessible when a register changes to a new quantity,
5888 since that changes the hash code. However, that is not
5889 safe, since after HASH_SIZE new quantities we get a
5890 hash 'collision' of a register with its own invalid
5891 entries. And since SUBREGs have been changed not to
5892 change their hash code with the hash code of the register,
5893 it wouldn't work any longer at all. So we have to check
5894 for any invalid references lying around now.
5895 This code is similar to the REG case in mention_regs,
5896 but it knows that reg_tick has been incremented, and
5897 it leaves reg_in_table as -1 . */
5898 unsigned int regno
= REGNO (x
);
5899 unsigned int endregno
= END_REGNO (x
);
5902 for (i
= regno
; i
< endregno
; i
++)
5904 if (REG_IN_TABLE (i
) >= 0)
5906 remove_invalid_refs (i
);
5907 REG_IN_TABLE (i
) = -1;
5914 /* We may have just removed some of the src_elt's from the hash table.
5915 So replace each one with the current head of the same class.
5916 Also check if destination addresses have been removed. */
5918 for (i
= 0; i
< n_sets
; i
++)
5921 if (sets
[i
].dest_addr_elt
5922 && sets
[i
].dest_addr_elt
->first_same_value
== 0)
5924 /* The elt was removed, which means this destination is not
5925 valid after this instruction. */
5926 sets
[i
].rtl
= NULL_RTX
;
5928 else if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
5929 /* If elt was removed, find current head of same class,
5930 or 0 if nothing remains of that class. */
5932 struct table_elt
*elt
= sets
[i
].src_elt
;
5934 while (elt
&& elt
->prev_same_value
)
5935 elt
= elt
->prev_same_value
;
5937 while (elt
&& elt
->first_same_value
== 0)
5938 elt
= elt
->next_same_value
;
5939 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
5943 /* Now insert the destinations into their equivalence classes. */
5945 for (i
= 0; i
< n_sets
; i
++)
5948 rtx dest
= SET_DEST (sets
[i
].rtl
);
5949 struct table_elt
*elt
;
5951 /* Don't record value if we are not supposed to risk allocating
5952 floating-point values in registers that might be wider than
5954 if ((flag_float_store
5956 && FLOAT_MODE_P (GET_MODE (dest
)))
5957 /* Don't record BLKmode values, because we don't know the
5958 size of it, and can't be sure that other BLKmode values
5959 have the same or smaller size. */
5960 || GET_MODE (dest
) == BLKmode
5961 /* If we didn't put a REG_EQUAL value or a source into the hash
5962 table, there is no point is recording DEST. */
5963 || sets
[i
].src_elt
== 0)
5966 /* STRICT_LOW_PART isn't part of the value BEING set,
5967 and neither is the SUBREG inside it.
5968 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5969 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5970 dest
= SUBREG_REG (XEXP (dest
, 0));
5972 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5973 /* Registers must also be inserted into chains for quantities. */
5974 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
5976 /* If `insert_regs' changes something, the hash code must be
5978 rehash_using_reg (dest
);
5979 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
5982 /* If DEST is a paradoxical SUBREG, don't record DEST since the bits
5983 outside the mode of GET_MODE (SUBREG_REG (dest)) are undefined. */
5984 if (paradoxical_subreg_p (dest
))
5987 elt
= insert (dest
, sets
[i
].src_elt
,
5988 sets
[i
].dest_hash
, GET_MODE (dest
));
5990 /* If this is a constant, insert the constant anchors with the
5991 equivalent register-offset expressions using register DEST. */
5992 if (targetm
.const_anchor
5994 && SCALAR_INT_MODE_P (GET_MODE (dest
))
5995 && GET_CODE (sets
[i
].src_elt
->exp
) == CONST_INT
)
5996 insert_const_anchors (dest
, sets
[i
].src_elt
->exp
, GET_MODE (dest
));
5998 elt
->in_memory
= (MEM_P (sets
[i
].inner_dest
)
5999 && !MEM_READONLY_P (sets
[i
].inner_dest
));
6001 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6002 narrower than M2, and both M1 and M2 are the same number of words,
6003 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6004 make that equivalence as well.
6006 However, BAR may have equivalences for which gen_lowpart
6007 will produce a simpler value than gen_lowpart applied to
6008 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6009 BAR's equivalences. If we don't get a simplified form, make
6010 the SUBREG. It will not be used in an equivalence, but will
6011 cause two similar assignments to be detected.
6013 Note the loop below will find SUBREG_REG (DEST) since we have
6014 already entered SRC and DEST of the SET in the table. */
6016 if (GET_CODE (dest
) == SUBREG
6017 && (known_equal_after_align_down
6018 (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) - 1,
6019 GET_MODE_SIZE (GET_MODE (dest
)) - 1,
6021 && !partial_subreg_p (dest
)
6022 && sets
[i
].src_elt
!= 0)
6024 machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
6025 struct table_elt
*elt
, *classp
= 0;
6027 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
6028 elt
= elt
->next_same_value
)
6032 struct table_elt
*src_elt
;
6034 /* Ignore invalid entries. */
6035 if (!REG_P (elt
->exp
)
6036 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
6039 /* We may have already been playing subreg games. If the
6040 mode is already correct for the destination, use it. */
6041 if (GET_MODE (elt
->exp
) == new_mode
)
6046 = subreg_lowpart_offset (new_mode
, GET_MODE (dest
));
6047 new_src
= simplify_gen_subreg (new_mode
, elt
->exp
,
6048 GET_MODE (dest
), byte
);
6051 /* The call to simplify_gen_subreg fails if the value
6052 is VOIDmode, yet we can't do any simplification, e.g.
6053 for EXPR_LISTs denoting function call results.
6054 It is invalid to construct a SUBREG with a VOIDmode
6055 SUBREG_REG, hence a zero new_src means we can't do
6056 this substitution. */
6060 src_hash
= HASH (new_src
, new_mode
);
6061 src_elt
= lookup (new_src
, src_hash
, new_mode
);
6063 /* Put the new source in the hash table is if isn't
6067 if (insert_regs (new_src
, classp
, 0))
6069 rehash_using_reg (new_src
);
6070 src_hash
= HASH (new_src
, new_mode
);
6072 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
6073 src_elt
->in_memory
= elt
->in_memory
;
6074 if (GET_CODE (new_src
) == ASM_OPERANDS
6075 && elt
->cost
== MAX_COST
)
6076 src_elt
->cost
= MAX_COST
;
6078 else if (classp
&& classp
!= src_elt
->first_same_value
)
6079 /* Show that two things that we've seen before are
6080 actually the same. */
6081 merge_equiv_classes (src_elt
, classp
);
6083 classp
= src_elt
->first_same_value
;
6084 /* Ignore invalid entries. */
6086 && !REG_P (classp
->exp
)
6087 && ! exp_equiv_p (classp
->exp
, classp
->exp
, 1, false))
6088 classp
= classp
->next_same_value
;
6093 /* Special handling for (set REG0 REG1) where REG0 is the
6094 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6095 be used in the sequel, so (if easily done) change this insn to
6096 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6097 that computed their value. Then REG1 will become a dead store
6098 and won't cloud the situation for later optimizations.
6100 Do not make this change if REG1 is a hard register, because it will
6101 then be used in the sequel and we may be changing a two-operand insn
6102 into a three-operand insn.
6104 Also do not do this if we are operating on a copy of INSN. */
6106 if (n_sets
== 1 && sets
[0].rtl
)
6107 try_back_substitute_reg (sets
[0].rtl
, insn
);
6112 /* Remove from the hash table all expressions that reference memory. */
6115 invalidate_memory (void)
6118 struct table_elt
*p
, *next
;
6120 for (i
= 0; i
< HASH_SIZE
; i
++)
6121 for (p
= table
[i
]; p
; p
= next
)
6123 next
= p
->next_same_hash
;
6125 remove_from_table (p
, i
);
6129 /* Perform invalidation on the basis of everything about INSN,
6130 except for invalidating the actual places that are SET in it.
6131 This includes the places CLOBBERed, and anything that might
6132 alias with something that is SET or CLOBBERed. */
6135 invalidate_from_clobbers (rtx_insn
*insn
)
6137 rtx x
= PATTERN (insn
);
6139 if (GET_CODE (x
) == CLOBBER
)
6141 rtx ref
= XEXP (x
, 0);
6144 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
6146 invalidate (ref
, VOIDmode
);
6147 else if (GET_CODE (ref
) == STRICT_LOW_PART
6148 || GET_CODE (ref
) == ZERO_EXTRACT
)
6149 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
6152 if (GET_CODE (x
) == CLOBBER_HIGH
)
6154 rtx ref
= XEXP (x
, 0);
6155 gcc_assert (REG_P (ref
));
6156 invalidate_reg (ref
, true);
6158 else if (GET_CODE (x
) == PARALLEL
)
6161 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
6163 rtx y
= XVECEXP (x
, 0, i
);
6164 if (GET_CODE (y
) == CLOBBER
)
6166 rtx ref
= XEXP (y
, 0);
6167 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
6169 invalidate (ref
, VOIDmode
);
6170 else if (GET_CODE (ref
) == STRICT_LOW_PART
6171 || GET_CODE (ref
) == ZERO_EXTRACT
)
6172 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
6174 else if (GET_CODE (y
) == CLOBBER_HIGH
)
6176 rtx ref
= XEXP (y
, 0);
6177 gcc_assert (REG_P (ref
));
6178 invalidate_reg (ref
, true);
6184 /* Perform invalidation on the basis of everything about INSN.
6185 This includes the places CLOBBERed, and anything that might
6186 alias with something that is SET or CLOBBERed. */
6189 invalidate_from_sets_and_clobbers (rtx_insn
*insn
)
6192 rtx x
= PATTERN (insn
);
6196 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
6198 rtx temx
= XEXP (tem
, 0);
6199 if (GET_CODE (temx
) == CLOBBER
)
6200 invalidate (SET_DEST (temx
), VOIDmode
);
6201 else if (GET_CODE (temx
) == CLOBBER_HIGH
)
6203 rtx temref
= XEXP (temx
, 0);
6204 gcc_assert (REG_P (temref
));
6205 invalidate_reg (temref
, true);
6210 /* Ensure we invalidate the destination register of a CALL insn.
6211 This is necessary for machines where this register is a fixed_reg,
6212 because no other code would invalidate it. */
6213 if (GET_CODE (x
) == SET
&& GET_CODE (SET_SRC (x
)) == CALL
)
6214 invalidate (SET_DEST (x
), VOIDmode
);
6216 else if (GET_CODE (x
) == PARALLEL
)
6220 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
6222 rtx y
= XVECEXP (x
, 0, i
);
6223 if (GET_CODE (y
) == CLOBBER
)
6225 rtx clobbered
= XEXP (y
, 0);
6227 if (REG_P (clobbered
)
6228 || GET_CODE (clobbered
) == SUBREG
)
6229 invalidate (clobbered
, VOIDmode
);
6230 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
6231 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
6232 invalidate (XEXP (clobbered
, 0), GET_MODE (clobbered
));
6234 else if (GET_CODE (y
) == CLOBBER_HIGH
)
6236 rtx ref
= XEXP (y
, 0);
6237 gcc_assert (REG_P (ref
));
6238 invalidate_reg (ref
, true);
6240 else if (GET_CODE (y
) == SET
&& GET_CODE (SET_SRC (y
)) == CALL
)
6241 invalidate (SET_DEST (y
), VOIDmode
);
6246 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6247 and replace any registers in them with either an equivalent constant
6248 or the canonical form of the register. If we are inside an address,
6249 only do this if the address remains valid.
6251 OBJECT is 0 except when within a MEM in which case it is the MEM.
6253 Return the replacement for X. */
6256 cse_process_notes_1 (rtx x
, rtx object
, bool *changed
)
6258 enum rtx_code code
= GET_CODE (x
);
6259 const char *fmt
= GET_RTX_FORMAT (code
);
6274 validate_change (x
, &XEXP (x
, 0),
6275 cse_process_notes (XEXP (x
, 0), x
, changed
), 0);
6279 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
6280 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
, changed
);
6286 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
, changed
);
6293 rtx new_rtx
= cse_process_notes (XEXP (x
, 0), object
, changed
);
6294 /* We don't substitute VOIDmode constants into these rtx,
6295 since they would impede folding. */
6296 if (GET_MODE (new_rtx
) != VOIDmode
)
6297 validate_change (object
, &XEXP (x
, 0), new_rtx
, 0);
6301 case UNSIGNED_FLOAT
:
6303 rtx new_rtx
= cse_process_notes (XEXP (x
, 0), object
, changed
);
6304 /* We don't substitute negative VOIDmode constants into these rtx,
6305 since they would impede folding. */
6306 if (GET_MODE (new_rtx
) != VOIDmode
6307 || (CONST_INT_P (new_rtx
) && INTVAL (new_rtx
) >= 0)
6308 || (CONST_DOUBLE_P (new_rtx
) && CONST_DOUBLE_HIGH (new_rtx
) >= 0))
6309 validate_change (object
, &XEXP (x
, 0), new_rtx
, 0);
6314 i
= REG_QTY (REGNO (x
));
6316 /* Return a constant or a constant register. */
6317 if (REGNO_QTY_VALID_P (REGNO (x
)))
6319 struct qty_table_elem
*ent
= &qty_table
[i
];
6321 if (ent
->const_rtx
!= NULL_RTX
6322 && (CONSTANT_P (ent
->const_rtx
)
6323 || REG_P (ent
->const_rtx
)))
6325 rtx new_rtx
= gen_lowpart (GET_MODE (x
), ent
->const_rtx
);
6327 return copy_rtx (new_rtx
);
6331 /* Otherwise, canonicalize this register. */
6332 return canon_reg (x
, NULL
);
6338 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
6340 validate_change (object
, &XEXP (x
, i
),
6341 cse_process_notes (XEXP (x
, i
), object
, changed
), 0);
6347 cse_process_notes (rtx x
, rtx object
, bool *changed
)
6349 rtx new_rtx
= cse_process_notes_1 (x
, object
, changed
);
6356 /* Find a path in the CFG, starting with FIRST_BB to perform CSE on.
6358 DATA is a pointer to a struct cse_basic_block_data, that is used to
6360 It is filled with a queue of basic blocks, starting with FIRST_BB
6361 and following a trace through the CFG.
6363 If all paths starting at FIRST_BB have been followed, or no new path
6364 starting at FIRST_BB can be constructed, this function returns FALSE.
6365 Otherwise, DATA->path is filled and the function returns TRUE indicating
6366 that a path to follow was found.
6368 If FOLLOW_JUMPS is false, the maximum path length is 1 and the only
6369 block in the path will be FIRST_BB. */
6372 cse_find_path (basic_block first_bb
, struct cse_basic_block_data
*data
,
6379 bitmap_set_bit (cse_visited_basic_blocks
, first_bb
->index
);
6381 /* See if there is a previous path. */
6382 path_size
= data
->path_size
;
6384 /* There is a previous path. Make sure it started with FIRST_BB. */
6386 gcc_assert (data
->path
[0].bb
== first_bb
);
6388 /* There was only one basic block in the last path. Clear the path and
6389 return, so that paths starting at another basic block can be tried. */
6396 /* If the path was empty from the beginning, construct a new path. */
6398 data
->path
[path_size
++].bb
= first_bb
;
6401 /* Otherwise, path_size must be equal to or greater than 2, because
6402 a previous path exists that is at least two basic blocks long.
6404 Update the previous branch path, if any. If the last branch was
6405 previously along the branch edge, take the fallthrough edge now. */
6406 while (path_size
>= 2)
6408 basic_block last_bb_in_path
, previous_bb_in_path
;
6412 last_bb_in_path
= data
->path
[path_size
].bb
;
6413 previous_bb_in_path
= data
->path
[path_size
- 1].bb
;
6415 /* If we previously followed a path along the branch edge, try
6416 the fallthru edge now. */
6417 if (EDGE_COUNT (previous_bb_in_path
->succs
) == 2
6418 && any_condjump_p (BB_END (previous_bb_in_path
))
6419 && (e
= find_edge (previous_bb_in_path
, last_bb_in_path
))
6420 && e
== BRANCH_EDGE (previous_bb_in_path
))
6422 bb
= FALLTHRU_EDGE (previous_bb_in_path
)->dest
;
6423 if (bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
)
6424 && single_pred_p (bb
)
6425 /* We used to assert here that we would only see blocks
6426 that we have not visited yet. But we may end up
6427 visiting basic blocks twice if the CFG has changed
6428 in this run of cse_main, because when the CFG changes
6429 the topological sort of the CFG also changes. A basic
6430 blocks that previously had more than two predecessors
6431 may now have a single predecessor, and become part of
6432 a path that starts at another basic block.
6434 We still want to visit each basic block only once, so
6435 halt the path here if we have already visited BB. */
6436 && !bitmap_bit_p (cse_visited_basic_blocks
, bb
->index
))
6438 bitmap_set_bit (cse_visited_basic_blocks
, bb
->index
);
6439 data
->path
[path_size
++].bb
= bb
;
6444 data
->path
[path_size
].bb
= NULL
;
6447 /* If only one block remains in the path, bail. */
6455 /* Extend the path if possible. */
6458 bb
= data
->path
[path_size
- 1].bb
;
6459 while (bb
&& path_size
< PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
))
6461 if (single_succ_p (bb
))
6462 e
= single_succ_edge (bb
);
6463 else if (EDGE_COUNT (bb
->succs
) == 2
6464 && any_condjump_p (BB_END (bb
)))
6466 /* First try to follow the branch. If that doesn't lead
6467 to a useful path, follow the fallthru edge. */
6468 e
= BRANCH_EDGE (bb
);
6469 if (!single_pred_p (e
->dest
))
6470 e
= FALLTHRU_EDGE (bb
);
6476 && !((e
->flags
& EDGE_ABNORMAL_CALL
) && cfun
->has_nonlocal_label
)
6477 && e
->dest
!= EXIT_BLOCK_PTR_FOR_FN (cfun
)
6478 && single_pred_p (e
->dest
)
6479 /* Avoid visiting basic blocks twice. The large comment
6480 above explains why this can happen. */
6481 && !bitmap_bit_p (cse_visited_basic_blocks
, e
->dest
->index
))
6483 basic_block bb2
= e
->dest
;
6484 bitmap_set_bit (cse_visited_basic_blocks
, bb2
->index
);
6485 data
->path
[path_size
++].bb
= bb2
;
6494 data
->path_size
= path_size
;
6495 return path_size
!= 0;
6498 /* Dump the path in DATA to file F. NSETS is the number of sets
6502 cse_dump_path (struct cse_basic_block_data
*data
, int nsets
, FILE *f
)
6506 fprintf (f
, ";; Following path with %d sets: ", nsets
);
6507 for (path_entry
= 0; path_entry
< data
->path_size
; path_entry
++)
6508 fprintf (f
, "%d ", (data
->path
[path_entry
].bb
)->index
);
6514 /* Return true if BB has exception handling successor edges. */
6517 have_eh_succ_edges (basic_block bb
)
6522 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
6523 if (e
->flags
& EDGE_EH
)
6530 /* Scan to the end of the path described by DATA. Return an estimate of
6531 the total number of SETs of all insns in the path. */
6534 cse_prescan_path (struct cse_basic_block_data
*data
)
6537 int path_size
= data
->path_size
;
6540 /* Scan to end of each basic block in the path. */
6541 for (path_entry
= 0; path_entry
< path_size
; path_entry
++)
6546 bb
= data
->path
[path_entry
].bb
;
6548 FOR_BB_INSNS (bb
, insn
)
6553 /* A PARALLEL can have lots of SETs in it,
6554 especially if it is really an ASM_OPERANDS. */
6555 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6556 nsets
+= XVECLEN (PATTERN (insn
), 0);
6562 data
->nsets
= nsets
;
6565 /* Return true if the pattern of INSN uses a LABEL_REF for which
6566 there isn't a REG_LABEL_OPERAND note. */
6569 check_for_label_ref (rtx_insn
*insn
)
6571 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND
6572 note for it, we must rerun jump since it needs to place the note. If
6573 this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain,
6574 don't do this since no REG_LABEL_OPERAND will be added. */
6575 subrtx_iterator::array_type array
;
6576 FOR_EACH_SUBRTX (iter
, array
, PATTERN (insn
), ALL
)
6578 const_rtx x
= *iter
;
6579 if (GET_CODE (x
) == LABEL_REF
6580 && !LABEL_REF_NONLOCAL_P (x
)
6582 || !label_is_jump_target_p (label_ref_label (x
), insn
))
6583 && LABEL_P (label_ref_label (x
))
6584 && INSN_UID (label_ref_label (x
)) != 0
6585 && !find_reg_note (insn
, REG_LABEL_OPERAND
, label_ref_label (x
)))
6591 /* Process a single extended basic block described by EBB_DATA. */
6594 cse_extended_basic_block (struct cse_basic_block_data
*ebb_data
)
6596 int path_size
= ebb_data
->path_size
;
6600 /* Allocate the space needed by qty_table. */
6601 qty_table
= XNEWVEC (struct qty_table_elem
, max_qty
);
6604 cse_ebb_live_in
= df_get_live_in (ebb_data
->path
[0].bb
);
6605 cse_ebb_live_out
= df_get_live_out (ebb_data
->path
[path_size
- 1].bb
);
6606 for (path_entry
= 0; path_entry
< path_size
; path_entry
++)
6611 bb
= ebb_data
->path
[path_entry
].bb
;
6613 /* Invalidate recorded information for eh regs if there is an EH
6614 edge pointing to that bb. */
6615 if (bb_has_eh_pred (bb
))
6619 FOR_EACH_ARTIFICIAL_DEF (def
, bb
->index
)
6620 if (DF_REF_FLAGS (def
) & DF_REF_AT_TOP
)
6621 invalidate (DF_REF_REG (def
), GET_MODE (DF_REF_REG (def
)));
6624 optimize_this_for_speed_p
= optimize_bb_for_speed_p (bb
);
6625 FOR_BB_INSNS (bb
, insn
)
6627 /* If we have processed 1,000 insns, flush the hash table to
6628 avoid extreme quadratic behavior. We must not include NOTEs
6629 in the count since there may be more of them when generating
6630 debugging information. If we clear the table at different
6631 times, code generated with -g -O might be different than code
6632 generated with -O but not -g.
6634 FIXME: This is a real kludge and needs to be done some other
6636 if (NONDEBUG_INSN_P (insn
)
6637 && num_insns
++ > PARAM_VALUE (PARAM_MAX_CSE_INSNS
))
6639 flush_hash_table ();
6645 /* Process notes first so we have all notes in canonical forms
6646 when looking for duplicate operations. */
6647 if (REG_NOTES (insn
))
6649 bool changed
= false;
6650 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
),
6651 NULL_RTX
, &changed
);
6653 df_notes_rescan (insn
);
6658 /* If we haven't already found an insn where we added a LABEL_REF,
6660 if (INSN_P (insn
) && !recorded_label_ref
6661 && check_for_label_ref (insn
))
6662 recorded_label_ref
= true;
6664 if (HAVE_cc0
&& NONDEBUG_INSN_P (insn
))
6666 /* If the previous insn sets CC0 and this insn no
6667 longer references CC0, delete the previous insn.
6668 Here we use fact that nothing expects CC0 to be
6669 valid over an insn, which is true until the final
6671 rtx_insn
*prev_insn
;
6674 prev_insn
= prev_nonnote_nondebug_insn (insn
);
6675 if (prev_insn
&& NONJUMP_INSN_P (prev_insn
)
6676 && (tem
= single_set (prev_insn
)) != NULL_RTX
6677 && SET_DEST (tem
) == cc0_rtx
6678 && ! reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
6679 delete_insn (prev_insn
);
6681 /* If this insn is not the last insn in the basic
6682 block, it will be PREV_INSN(insn) in the next
6683 iteration. If we recorded any CC0-related
6684 information for this insn, remember it. */
6685 if (insn
!= BB_END (bb
))
6687 prev_insn_cc0
= this_insn_cc0
;
6688 prev_insn_cc0_mode
= this_insn_cc0_mode
;
6694 /* With non-call exceptions, we are not always able to update
6695 the CFG properly inside cse_insn. So clean up possibly
6696 redundant EH edges here. */
6697 if (cfun
->can_throw_non_call_exceptions
&& have_eh_succ_edges (bb
))
6698 cse_cfg_altered
|= purge_dead_edges (bb
);
6700 /* If we changed a conditional jump, we may have terminated
6701 the path we are following. Check that by verifying that
6702 the edge we would take still exists. If the edge does
6703 not exist anymore, purge the remainder of the path.
6704 Note that this will cause us to return to the caller. */
6705 if (path_entry
< path_size
- 1)
6707 basic_block next_bb
= ebb_data
->path
[path_entry
+ 1].bb
;
6708 if (!find_edge (bb
, next_bb
))
6714 /* If we truncate the path, we must also reset the
6715 visited bit on the remaining blocks in the path,
6716 or we will never visit them at all. */
6717 bitmap_clear_bit (cse_visited_basic_blocks
,
6718 ebb_data
->path
[path_size
].bb
->index
);
6719 ebb_data
->path
[path_size
].bb
= NULL
;
6721 while (path_size
- 1 != path_entry
);
6722 ebb_data
->path_size
= path_size
;
6726 /* If this is a conditional jump insn, record any known
6727 equivalences due to the condition being tested. */
6729 if (path_entry
< path_size
- 1
6730 && EDGE_COUNT (bb
->succs
) == 2
6732 && single_set (insn
)
6733 && any_condjump_p (insn
))
6735 basic_block next_bb
= ebb_data
->path
[path_entry
+ 1].bb
;
6736 bool taken
= (next_bb
== BRANCH_EDGE (bb
)->dest
);
6737 record_jump_equiv (insn
, taken
);
6740 /* Clear the CC0-tracking related insns, they can't provide
6741 useful information across basic block boundaries. */
6745 gcc_assert (next_qty
<= max_qty
);
6751 /* Perform cse on the instructions of a function.
6752 F is the first instruction.
6753 NREGS is one plus the highest pseudo-reg number used in the instruction.
6755 Return 2 if jump optimizations should be redone due to simplifications
6756 in conditional jump instructions.
6757 Return 1 if the CFG should be cleaned up because it has been modified.
6758 Return 0 otherwise. */
6761 cse_main (rtx_insn
*f ATTRIBUTE_UNUSED
, int nregs
)
6763 struct cse_basic_block_data ebb_data
;
6765 int *rc_order
= XNEWVEC (int, last_basic_block_for_fn (cfun
));
6768 /* CSE doesn't use dominane info but can invalidate it in different ways.
6769 For simplicity free dominance info here. */
6770 free_dominance_info (CDI_DOMINATORS
);
6772 df_set_flags (DF_LR_RUN_DCE
);
6773 df_note_add_problem ();
6775 df_set_flags (DF_DEFER_INSN_RESCAN
);
6777 reg_scan (get_insns (), max_reg_num ());
6778 init_cse_reg_info (nregs
);
6780 ebb_data
.path
= XNEWVEC (struct branch_path
,
6781 PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
));
6783 cse_cfg_altered
= false;
6784 cse_jumps_altered
= false;
6785 recorded_label_ref
= false;
6786 constant_pool_entries_cost
= 0;
6787 constant_pool_entries_regcost
= 0;
6788 ebb_data
.path_size
= 0;
6790 rtl_hooks
= cse_rtl_hooks
;
6793 init_alias_analysis ();
6795 reg_eqv_table
= XNEWVEC (struct reg_eqv_elem
, nregs
);
6797 /* Set up the table of already visited basic blocks. */
6798 cse_visited_basic_blocks
= sbitmap_alloc (last_basic_block_for_fn (cfun
));
6799 bitmap_clear (cse_visited_basic_blocks
);
6801 /* Loop over basic blocks in reverse completion order (RPO),
6802 excluding the ENTRY and EXIT blocks. */
6803 n_blocks
= pre_and_rev_post_order_compute (NULL
, rc_order
, false);
6805 while (i
< n_blocks
)
6807 /* Find the first block in the RPO queue that we have not yet
6808 processed before. */
6811 bb
= BASIC_BLOCK_FOR_FN (cfun
, rc_order
[i
++]);
6813 while (bitmap_bit_p (cse_visited_basic_blocks
, bb
->index
)
6816 /* Find all paths starting with BB, and process them. */
6817 while (cse_find_path (bb
, &ebb_data
, flag_cse_follow_jumps
))
6819 /* Pre-scan the path. */
6820 cse_prescan_path (&ebb_data
);
6822 /* If this basic block has no sets, skip it. */
6823 if (ebb_data
.nsets
== 0)
6826 /* Get a reasonable estimate for the maximum number of qty's
6827 needed for this path. For this, we take the number of sets
6828 and multiply that by MAX_RECOG_OPERANDS. */
6829 max_qty
= ebb_data
.nsets
* MAX_RECOG_OPERANDS
;
6831 /* Dump the path we're about to process. */
6833 cse_dump_path (&ebb_data
, ebb_data
.nsets
, dump_file
);
6835 cse_extended_basic_block (&ebb_data
);
6840 end_alias_analysis ();
6841 free (reg_eqv_table
);
6842 free (ebb_data
.path
);
6843 sbitmap_free (cse_visited_basic_blocks
);
6845 rtl_hooks
= general_rtl_hooks
;
6847 if (cse_jumps_altered
|| recorded_label_ref
)
6849 else if (cse_cfg_altered
)
6855 /* Count the number of times registers are used (not set) in X.
6856 COUNTS is an array in which we accumulate the count, INCR is how much
6857 we count each register usage.
6859 Don't count a usage of DEST, which is the SET_DEST of a SET which
6860 contains X in its SET_SRC. This is because such a SET does not
6861 modify the liveness of DEST.
6862 DEST is set to pc_rtx for a trapping insn, or for an insn with side effects.
6863 We must then count uses of a SET_DEST regardless, because the insn can't be
6867 count_reg_usage (rtx x
, int *counts
, rtx dest
, int incr
)
6877 switch (code
= GET_CODE (x
))
6881 counts
[REGNO (x
)] += incr
;
6893 /* If we are clobbering a MEM, mark any registers inside the address
6895 if (MEM_P (XEXP (x
, 0)))
6896 count_reg_usage (XEXP (XEXP (x
, 0), 0), counts
, NULL_RTX
, incr
);
6900 gcc_assert (REG_P ((XEXP (x
, 0))));
6904 /* Unless we are setting a REG, count everything in SET_DEST. */
6905 if (!REG_P (SET_DEST (x
)))
6906 count_reg_usage (SET_DEST (x
), counts
, NULL_RTX
, incr
);
6907 count_reg_usage (SET_SRC (x
), counts
,
6908 dest
? dest
: SET_DEST (x
),
6918 /* We expect dest to be NULL_RTX here. If the insn may throw,
6919 or if it cannot be deleted due to side-effects, mark this fact
6920 by setting DEST to pc_rtx. */
6921 if ((!cfun
->can_delete_dead_exceptions
&& !insn_nothrow_p (x
))
6922 || side_effects_p (PATTERN (x
)))
6924 if (code
== CALL_INSN
)
6925 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x
), counts
, dest
, incr
);
6926 count_reg_usage (PATTERN (x
), counts
, dest
, incr
);
6928 /* Things used in a REG_EQUAL note aren't dead since loop may try to
6931 note
= find_reg_equal_equiv_note (x
);
6934 rtx eqv
= XEXP (note
, 0);
6936 if (GET_CODE (eqv
) == EXPR_LIST
)
6937 /* This REG_EQUAL note describes the result of a function call.
6938 Process all the arguments. */
6941 count_reg_usage (XEXP (eqv
, 0), counts
, dest
, incr
);
6942 eqv
= XEXP (eqv
, 1);
6944 while (eqv
&& GET_CODE (eqv
) == EXPR_LIST
);
6946 count_reg_usage (eqv
, counts
, dest
, incr
);
6951 if (REG_NOTE_KIND (x
) == REG_EQUAL
6952 || (REG_NOTE_KIND (x
) != REG_NONNEG
&& GET_CODE (XEXP (x
,0)) == USE
)
6953 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
6954 involving registers in the address. */
6955 || GET_CODE (XEXP (x
, 0)) == CLOBBER
6956 || GET_CODE (XEXP (x
, 0)) == CLOBBER_HIGH
)
6957 count_reg_usage (XEXP (x
, 0), counts
, NULL_RTX
, incr
);
6959 count_reg_usage (XEXP (x
, 1), counts
, NULL_RTX
, incr
);
6963 /* Iterate over just the inputs, not the constraints as well. */
6964 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
6965 count_reg_usage (ASM_OPERANDS_INPUT (x
, i
), counts
, dest
, incr
);
6976 fmt
= GET_RTX_FORMAT (code
);
6977 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6980 count_reg_usage (XEXP (x
, i
), counts
, dest
, incr
);
6981 else if (fmt
[i
] == 'E')
6982 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6983 count_reg_usage (XVECEXP (x
, i
, j
), counts
, dest
, incr
);
6987 /* Return true if X is a dead register. */
6990 is_dead_reg (const_rtx x
, int *counts
)
6993 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
6994 && counts
[REGNO (x
)] == 0);
6997 /* Return true if set is live. */
6999 set_live_p (rtx set
, rtx_insn
*insn ATTRIBUTE_UNUSED
, /* Only used with HAVE_cc0. */
7004 if (set_noop_p (set
))
7007 else if (GET_CODE (SET_DEST (set
)) == CC0
7008 && !side_effects_p (SET_SRC (set
))
7009 && ((tem
= next_nonnote_nondebug_insn (insn
)) == NULL_RTX
7011 || !reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
7013 else if (!is_dead_reg (SET_DEST (set
), counts
)
7014 || side_effects_p (SET_SRC (set
)))
7019 /* Return true if insn is live. */
7022 insn_live_p (rtx_insn
*insn
, int *counts
)
7025 if (!cfun
->can_delete_dead_exceptions
&& !insn_nothrow_p (insn
))
7027 else if (GET_CODE (PATTERN (insn
)) == SET
)
7028 return set_live_p (PATTERN (insn
), insn
, counts
);
7029 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
7031 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
7033 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
7035 if (GET_CODE (elt
) == SET
)
7037 if (set_live_p (elt
, insn
, counts
))
7040 else if (GET_CODE (elt
) != CLOBBER
7041 && GET_CODE (elt
) != CLOBBER_HIGH
7042 && GET_CODE (elt
) != USE
)
7047 else if (DEBUG_INSN_P (insn
))
7051 if (DEBUG_MARKER_INSN_P (insn
))
7054 for (next
= NEXT_INSN (insn
); next
; next
= NEXT_INSN (next
))
7057 else if (!DEBUG_INSN_P (next
))
7059 /* If we find an inspection point, such as a debug begin stmt,
7060 we want to keep the earlier debug insn. */
7061 else if (DEBUG_MARKER_INSN_P (next
))
7063 else if (INSN_VAR_LOCATION_DECL (insn
) == INSN_VAR_LOCATION_DECL (next
))
7072 /* Count the number of stores into pseudo. Callback for note_stores. */
7075 count_stores (rtx x
, const_rtx set ATTRIBUTE_UNUSED
, void *data
)
7077 int *counts
= (int *) data
;
7078 if (REG_P (x
) && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
7079 counts
[REGNO (x
)]++;
7082 /* Return if DEBUG_INSN pattern PAT needs to be reset because some dead
7083 pseudo doesn't have a replacement. COUNTS[X] is zero if register X
7084 is dead and REPLACEMENTS[X] is null if it has no replacemenet.
7085 Set *SEEN_REPL to true if we see a dead register that does have
7089 is_dead_debug_insn (const_rtx pat
, int *counts
, rtx
*replacements
,
7092 subrtx_iterator::array_type array
;
7093 FOR_EACH_SUBRTX (iter
, array
, pat
, NONCONST
)
7095 const_rtx x
= *iter
;
7096 if (is_dead_reg (x
, counts
))
7098 if (replacements
&& replacements
[REGNO (x
)] != NULL_RTX
)
7107 /* Replace a dead pseudo in a DEBUG_INSN with replacement DEBUG_EXPR.
7108 Callback for simplify_replace_fn_rtx. */
7111 replace_dead_reg (rtx x
, const_rtx old_rtx ATTRIBUTE_UNUSED
, void *data
)
7113 rtx
*replacements
= (rtx
*) data
;
7116 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
7117 && replacements
[REGNO (x
)] != NULL_RTX
)
7119 if (GET_MODE (x
) == GET_MODE (replacements
[REGNO (x
)]))
7120 return replacements
[REGNO (x
)];
7121 return lowpart_subreg (GET_MODE (x
), replacements
[REGNO (x
)],
7122 GET_MODE (replacements
[REGNO (x
)]));
7127 /* Scan all the insns and delete any that are dead; i.e., they store a register
7128 that is never used or they copy a register to itself.
7130 This is used to remove insns made obviously dead by cse, loop or other
7131 optimizations. It improves the heuristics in loop since it won't try to
7132 move dead invariants out of loops or make givs for dead quantities. The
7133 remaining passes of the compilation are also sped up. */
7136 delete_trivially_dead_insns (rtx_insn
*insns
, int nreg
)
7139 rtx_insn
*insn
, *prev
;
7140 rtx
*replacements
= NULL
;
7143 timevar_push (TV_DELETE_TRIVIALLY_DEAD
);
7144 /* First count the number of times each register is used. */
7145 if (MAY_HAVE_DEBUG_BIND_INSNS
)
7147 counts
= XCNEWVEC (int, nreg
* 3);
7148 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
7149 if (DEBUG_BIND_INSN_P (insn
))
7150 count_reg_usage (INSN_VAR_LOCATION_LOC (insn
), counts
+ nreg
,
7152 else if (INSN_P (insn
))
7154 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
7155 note_stores (insn
, count_stores
, counts
+ nreg
* 2);
7157 /* If there can be debug insns, COUNTS are 3 consecutive arrays.
7158 First one counts how many times each pseudo is used outside
7159 of debug insns, second counts how many times each pseudo is
7160 used in debug insns and third counts how many times a pseudo
7165 counts
= XCNEWVEC (int, nreg
);
7166 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
7168 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
7169 /* If no debug insns can be present, COUNTS is just an array
7170 which counts how many times each pseudo is used. */
7172 /* Pseudo PIC register should be considered as used due to possible
7173 new usages generated. */
7174 if (!reload_completed
7175 && pic_offset_table_rtx
7176 && REGNO (pic_offset_table_rtx
) >= FIRST_PSEUDO_REGISTER
)
7177 counts
[REGNO (pic_offset_table_rtx
)]++;
7178 /* Go from the last insn to the first and delete insns that only set unused
7179 registers or copy a register to itself. As we delete an insn, remove
7180 usage counts for registers it uses.
7182 The first jump optimization pass may leave a real insn as the last
7183 insn in the function. We must not skip that insn or we may end
7184 up deleting code that is not really dead.
7186 If some otherwise unused register is only used in DEBUG_INSNs,
7187 try to create a DEBUG_EXPR temporary and emit a DEBUG_INSN before
7188 the setter. Then go through DEBUG_INSNs and if a DEBUG_EXPR
7189 has been created for the unused register, replace it with
7190 the DEBUG_EXPR, otherwise reset the DEBUG_INSN. */
7191 for (insn
= get_last_insn (); insn
; insn
= prev
)
7195 prev
= PREV_INSN (insn
);
7199 live_insn
= insn_live_p (insn
, counts
);
7201 /* If this is a dead insn, delete it and show registers in it aren't
7204 if (! live_insn
&& dbg_cnt (delete_trivial_dead
))
7206 if (DEBUG_INSN_P (insn
))
7208 if (DEBUG_BIND_INSN_P (insn
))
7209 count_reg_usage (INSN_VAR_LOCATION_LOC (insn
), counts
+ nreg
,
7215 if (MAY_HAVE_DEBUG_BIND_INSNS
7216 && (set
= single_set (insn
)) != NULL_RTX
7217 && is_dead_reg (SET_DEST (set
), counts
)
7218 /* Used at least once in some DEBUG_INSN. */
7219 && counts
[REGNO (SET_DEST (set
)) + nreg
] > 0
7220 /* And set exactly once. */
7221 && counts
[REGNO (SET_DEST (set
)) + nreg
* 2] == 1
7222 && !side_effects_p (SET_SRC (set
))
7223 && asm_noperands (PATTERN (insn
)) < 0)
7225 rtx dval
, bind_var_loc
;
7228 /* Create DEBUG_EXPR (and DEBUG_EXPR_DECL). */
7229 dval
= make_debug_expr_from_rtl (SET_DEST (set
));
7231 /* Emit a debug bind insn before the insn in which
7234 gen_rtx_VAR_LOCATION (GET_MODE (SET_DEST (set
)),
7235 DEBUG_EXPR_TREE_DECL (dval
),
7237 VAR_INIT_STATUS_INITIALIZED
);
7238 count_reg_usage (bind_var_loc
, counts
+ nreg
, NULL_RTX
, 1);
7240 bind
= emit_debug_insn_before (bind_var_loc
, insn
);
7241 df_insn_rescan (bind
);
7243 if (replacements
== NULL
)
7244 replacements
= XCNEWVEC (rtx
, nreg
);
7245 replacements
[REGNO (SET_DEST (set
))] = dval
;
7248 count_reg_usage (insn
, counts
, NULL_RTX
, -1);
7251 cse_cfg_altered
|= delete_insn_and_edges (insn
);
7255 if (MAY_HAVE_DEBUG_BIND_INSNS
)
7257 for (insn
= get_last_insn (); insn
; insn
= PREV_INSN (insn
))
7258 if (DEBUG_BIND_INSN_P (insn
))
7260 /* If this debug insn references a dead register that wasn't replaced
7261 with an DEBUG_EXPR, reset the DEBUG_INSN. */
7262 bool seen_repl
= false;
7263 if (is_dead_debug_insn (INSN_VAR_LOCATION_LOC (insn
),
7264 counts
, replacements
, &seen_repl
))
7266 INSN_VAR_LOCATION_LOC (insn
) = gen_rtx_UNKNOWN_VAR_LOC ();
7267 df_insn_rescan (insn
);
7271 INSN_VAR_LOCATION_LOC (insn
)
7272 = simplify_replace_fn_rtx (INSN_VAR_LOCATION_LOC (insn
),
7273 NULL_RTX
, replace_dead_reg
,
7275 df_insn_rescan (insn
);
7278 free (replacements
);
7281 if (dump_file
&& ndead
)
7282 fprintf (dump_file
, "Deleted %i trivially dead insns\n",
7286 timevar_pop (TV_DELETE_TRIVIALLY_DEAD
);
7290 /* If LOC contains references to NEWREG in a different mode, change them
7291 to use NEWREG instead. */
7294 cse_change_cc_mode (subrtx_ptr_iterator::array_type
&array
,
7295 rtx
*loc
, rtx_insn
*insn
, rtx newreg
)
7297 FOR_EACH_SUBRTX_PTR (iter
, array
, loc
, NONCONST
)
7303 && REGNO (x
) == REGNO (newreg
)
7304 && GET_MODE (x
) != GET_MODE (newreg
))
7306 validate_change (insn
, loc
, newreg
, 1);
7307 iter
.skip_subrtxes ();
7312 /* Change the mode of any reference to the register REGNO (NEWREG) to
7313 GET_MODE (NEWREG) in INSN. */
7316 cse_change_cc_mode_insn (rtx_insn
*insn
, rtx newreg
)
7323 subrtx_ptr_iterator::array_type array
;
7324 cse_change_cc_mode (array
, &PATTERN (insn
), insn
, newreg
);
7325 cse_change_cc_mode (array
, ®_NOTES (insn
), insn
, newreg
);
7327 /* If the following assertion was triggered, there is most probably
7328 something wrong with the cc_modes_compatible back end function.
7329 CC modes only can be considered compatible if the insn - with the mode
7330 replaced by any of the compatible modes - can still be recognized. */
7331 success
= apply_change_group ();
7332 gcc_assert (success
);
7335 /* Change the mode of any reference to the register REGNO (NEWREG) to
7336 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7337 any instruction which modifies NEWREG. */
7340 cse_change_cc_mode_insns (rtx_insn
*start
, rtx_insn
*end
, rtx newreg
)
7344 for (insn
= start
; insn
!= end
; insn
= NEXT_INSN (insn
))
7346 if (! INSN_P (insn
))
7349 if (reg_set_p (newreg
, insn
))
7352 cse_change_cc_mode_insn (insn
, newreg
);
7356 /* BB is a basic block which finishes with CC_REG as a condition code
7357 register which is set to CC_SRC. Look through the successors of BB
7358 to find blocks which have a single predecessor (i.e., this one),
7359 and look through those blocks for an assignment to CC_REG which is
7360 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7361 permitted to change the mode of CC_SRC to a compatible mode. This
7362 returns VOIDmode if no equivalent assignments were found.
7363 Otherwise it returns the mode which CC_SRC should wind up with.
7364 ORIG_BB should be the same as BB in the outermost cse_cc_succs call,
7365 but is passed unmodified down to recursive calls in order to prevent
7368 The main complexity in this function is handling the mode issues.
7369 We may have more than one duplicate which we can eliminate, and we
7370 try to find a mode which will work for multiple duplicates. */
7373 cse_cc_succs (basic_block bb
, basic_block orig_bb
, rtx cc_reg
, rtx cc_src
,
7374 bool can_change_mode
)
7378 unsigned int insn_count
;
7381 machine_mode modes
[2];
7382 rtx_insn
*last_insns
[2];
7387 /* We expect to have two successors. Look at both before picking
7388 the final mode for the comparison. If we have more successors
7389 (i.e., some sort of table jump, although that seems unlikely),
7390 then we require all beyond the first two to use the same
7393 found_equiv
= false;
7394 mode
= GET_MODE (cc_src
);
7396 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
7401 if (e
->flags
& EDGE_COMPLEX
)
7404 if (EDGE_COUNT (e
->dest
->preds
) != 1
7405 || e
->dest
== EXIT_BLOCK_PTR_FOR_FN (cfun
)
7406 /* Avoid endless recursion on unreachable blocks. */
7407 || e
->dest
== orig_bb
)
7410 end
= NEXT_INSN (BB_END (e
->dest
));
7411 for (insn
= BB_HEAD (e
->dest
); insn
!= end
; insn
= NEXT_INSN (insn
))
7415 if (! INSN_P (insn
))
7418 /* If CC_SRC is modified, we have to stop looking for
7419 something which uses it. */
7420 if (modified_in_p (cc_src
, insn
))
7423 /* Check whether INSN sets CC_REG to CC_SRC. */
7424 set
= single_set (insn
);
7426 && REG_P (SET_DEST (set
))
7427 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7430 machine_mode set_mode
;
7431 machine_mode comp_mode
;
7434 set_mode
= GET_MODE (SET_SRC (set
));
7435 comp_mode
= set_mode
;
7436 if (rtx_equal_p (cc_src
, SET_SRC (set
)))
7438 else if (GET_CODE (cc_src
) == COMPARE
7439 && GET_CODE (SET_SRC (set
)) == COMPARE
7441 && rtx_equal_p (XEXP (cc_src
, 0),
7442 XEXP (SET_SRC (set
), 0))
7443 && rtx_equal_p (XEXP (cc_src
, 1),
7444 XEXP (SET_SRC (set
), 1)))
7447 comp_mode
= targetm
.cc_modes_compatible (mode
, set_mode
);
7448 if (comp_mode
!= VOIDmode
7449 && (can_change_mode
|| comp_mode
== mode
))
7456 if (insn_count
< ARRAY_SIZE (insns
))
7458 insns
[insn_count
] = insn
;
7459 modes
[insn_count
] = set_mode
;
7460 last_insns
[insn_count
] = end
;
7463 if (mode
!= comp_mode
)
7465 gcc_assert (can_change_mode
);
7468 /* The modified insn will be re-recognized later. */
7469 PUT_MODE (cc_src
, mode
);
7474 if (set_mode
!= mode
)
7476 /* We found a matching expression in the
7477 wrong mode, but we don't have room to
7478 store it in the array. Punt. This case
7482 /* INSN sets CC_REG to a value equal to CC_SRC
7483 with the right mode. We can simply delete
7488 /* We found an instruction to delete. Keep looking,
7489 in the hopes of finding a three-way jump. */
7493 /* We found an instruction which sets the condition
7494 code, so don't look any farther. */
7498 /* If INSN sets CC_REG in some other way, don't look any
7500 if (reg_set_p (cc_reg
, insn
))
7504 /* If we fell off the bottom of the block, we can keep looking
7505 through successors. We pass CAN_CHANGE_MODE as false because
7506 we aren't prepared to handle compatibility between the
7507 further blocks and this block. */
7510 machine_mode submode
;
7512 submode
= cse_cc_succs (e
->dest
, orig_bb
, cc_reg
, cc_src
, false);
7513 if (submode
!= VOIDmode
)
7515 gcc_assert (submode
== mode
);
7517 can_change_mode
= false;
7525 /* Now INSN_COUNT is the number of instructions we found which set
7526 CC_REG to a value equivalent to CC_SRC. The instructions are in
7527 INSNS. The modes used by those instructions are in MODES. */
7530 for (i
= 0; i
< insn_count
; ++i
)
7532 if (modes
[i
] != mode
)
7534 /* We need to change the mode of CC_REG in INSNS[i] and
7535 subsequent instructions. */
7538 if (GET_MODE (cc_reg
) == mode
)
7541 newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7543 cse_change_cc_mode_insns (NEXT_INSN (insns
[i
]), last_insns
[i
],
7547 cse_cfg_altered
|= delete_insn_and_edges (insns
[i
]);
7553 /* If we have a fixed condition code register (or two), walk through
7554 the instructions and try to eliminate duplicate assignments. */
7557 cse_condition_code_reg (void)
7559 unsigned int cc_regno_1
;
7560 unsigned int cc_regno_2
;
7565 if (! targetm
.fixed_condition_code_regs (&cc_regno_1
, &cc_regno_2
))
7568 cc_reg_1
= gen_rtx_REG (CCmode
, cc_regno_1
);
7569 if (cc_regno_2
!= INVALID_REGNUM
)
7570 cc_reg_2
= gen_rtx_REG (CCmode
, cc_regno_2
);
7572 cc_reg_2
= NULL_RTX
;
7574 FOR_EACH_BB_FN (bb
, cfun
)
7576 rtx_insn
*last_insn
;
7579 rtx_insn
*cc_src_insn
;
7582 machine_mode orig_mode
;
7584 /* Look for blocks which end with a conditional jump based on a
7585 condition code register. Then look for the instruction which
7586 sets the condition code register. Then look through the
7587 successor blocks for instructions which set the condition
7588 code register to the same value. There are other possible
7589 uses of the condition code register, but these are by far the
7590 most common and the ones which we are most likely to be able
7593 last_insn
= BB_END (bb
);
7594 if (!JUMP_P (last_insn
))
7597 if (reg_referenced_p (cc_reg_1
, PATTERN (last_insn
)))
7599 else if (cc_reg_2
&& reg_referenced_p (cc_reg_2
, PATTERN (last_insn
)))
7606 for (insn
= PREV_INSN (last_insn
);
7607 insn
&& insn
!= PREV_INSN (BB_HEAD (bb
));
7608 insn
= PREV_INSN (insn
))
7612 if (! INSN_P (insn
))
7614 set
= single_set (insn
);
7616 && REG_P (SET_DEST (set
))
7617 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7620 cc_src
= SET_SRC (set
);
7623 else if (reg_set_p (cc_reg
, insn
))
7630 if (modified_between_p (cc_src
, cc_src_insn
, NEXT_INSN (last_insn
)))
7633 /* Now CC_REG is a condition code register used for a
7634 conditional jump at the end of the block, and CC_SRC, in
7635 CC_SRC_INSN, is the value to which that condition code
7636 register is set, and CC_SRC is still meaningful at the end of
7639 orig_mode
= GET_MODE (cc_src
);
7640 mode
= cse_cc_succs (bb
, bb
, cc_reg
, cc_src
, true);
7641 if (mode
!= VOIDmode
)
7643 gcc_assert (mode
== GET_MODE (cc_src
));
7644 if (mode
!= orig_mode
)
7646 rtx newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7648 cse_change_cc_mode_insn (cc_src_insn
, newreg
);
7650 /* Do the same in the following insns that use the
7651 current value of CC_REG within BB. */
7652 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn
),
7653 NEXT_INSN (last_insn
),
7661 /* Perform common subexpression elimination. Nonzero value from
7662 `cse_main' means that jumps were simplified and some code may now
7663 be unreachable, so do jump optimization again. */
7665 rest_of_handle_cse (void)
7670 dump_flow_info (dump_file
, dump_flags
);
7672 tem
= cse_main (get_insns (), max_reg_num ());
7674 /* If we are not running more CSE passes, then we are no longer
7675 expecting CSE to be run. But always rerun it in a cheap mode. */
7676 cse_not_expected
= !flag_rerun_cse_after_loop
&& !flag_gcse
;
7680 timevar_push (TV_JUMP
);
7681 rebuild_jump_labels (get_insns ());
7682 cse_cfg_altered
|= cleanup_cfg (CLEANUP_CFG_CHANGED
);
7683 timevar_pop (TV_JUMP
);
7685 else if (tem
== 1 || optimize
> 1)
7686 cse_cfg_altered
|= cleanup_cfg (0);
7693 const pass_data pass_data_cse
=
7695 RTL_PASS
, /* type */
7697 OPTGROUP_NONE
, /* optinfo_flags */
7699 0, /* properties_required */
7700 0, /* properties_provided */
7701 0, /* properties_destroyed */
7702 0, /* todo_flags_start */
7703 TODO_df_finish
, /* todo_flags_finish */
7706 class pass_cse
: public rtl_opt_pass
7709 pass_cse (gcc::context
*ctxt
)
7710 : rtl_opt_pass (pass_data_cse
, ctxt
)
7713 /* opt_pass methods: */
7714 virtual bool gate (function
*) { return optimize
> 0; }
7715 virtual unsigned int execute (function
*) { return rest_of_handle_cse (); }
7717 }; // class pass_cse
7722 make_pass_cse (gcc::context
*ctxt
)
7724 return new pass_cse (ctxt
);
7728 /* Run second CSE pass after loop optimizations. */
7730 rest_of_handle_cse2 (void)
7735 dump_flow_info (dump_file
, dump_flags
);
7737 tem
= cse_main (get_insns (), max_reg_num ());
7739 /* Run a pass to eliminate duplicated assignments to condition code
7740 registers. We have to run this after bypass_jumps, because it
7741 makes it harder for that pass to determine whether a jump can be
7743 cse_condition_code_reg ();
7745 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7749 timevar_push (TV_JUMP
);
7750 rebuild_jump_labels (get_insns ());
7751 cse_cfg_altered
|= cleanup_cfg (CLEANUP_CFG_CHANGED
);
7752 timevar_pop (TV_JUMP
);
7755 cse_cfg_altered
|= cleanup_cfg (0);
7757 cse_not_expected
= 1;
7764 const pass_data pass_data_cse2
=
7766 RTL_PASS
, /* type */
7768 OPTGROUP_NONE
, /* optinfo_flags */
7769 TV_CSE2
, /* tv_id */
7770 0, /* properties_required */
7771 0, /* properties_provided */
7772 0, /* properties_destroyed */
7773 0, /* todo_flags_start */
7774 TODO_df_finish
, /* todo_flags_finish */
7777 class pass_cse2
: public rtl_opt_pass
7780 pass_cse2 (gcc::context
*ctxt
)
7781 : rtl_opt_pass (pass_data_cse2
, ctxt
)
7784 /* opt_pass methods: */
7785 virtual bool gate (function
*)
7787 return optimize
> 0 && flag_rerun_cse_after_loop
;
7790 virtual unsigned int execute (function
*) { return rest_of_handle_cse2 (); }
7792 }; // class pass_cse2
7797 make_pass_cse2 (gcc::context
*ctxt
)
7799 return new pass_cse2 (ctxt
);
7802 /* Run second CSE pass after loop optimizations. */
7804 rest_of_handle_cse_after_global_opts (void)
7809 /* We only want to do local CSE, so don't follow jumps. */
7810 save_cfj
= flag_cse_follow_jumps
;
7811 flag_cse_follow_jumps
= 0;
7813 rebuild_jump_labels (get_insns ());
7814 tem
= cse_main (get_insns (), max_reg_num ());
7815 cse_cfg_altered
|= purge_all_dead_edges ();
7816 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7818 cse_not_expected
= !flag_rerun_cse_after_loop
;
7820 /* If cse altered any jumps, rerun jump opts to clean things up. */
7823 timevar_push (TV_JUMP
);
7824 rebuild_jump_labels (get_insns ());
7825 cse_cfg_altered
|= cleanup_cfg (CLEANUP_CFG_CHANGED
);
7826 timevar_pop (TV_JUMP
);
7829 cse_cfg_altered
|= cleanup_cfg (0);
7831 flag_cse_follow_jumps
= save_cfj
;
7837 const pass_data pass_data_cse_after_global_opts
=
7839 RTL_PASS
, /* type */
7840 "cse_local", /* name */
7841 OPTGROUP_NONE
, /* optinfo_flags */
7843 0, /* properties_required */
7844 0, /* properties_provided */
7845 0, /* properties_destroyed */
7846 0, /* todo_flags_start */
7847 TODO_df_finish
, /* todo_flags_finish */
7850 class pass_cse_after_global_opts
: public rtl_opt_pass
7853 pass_cse_after_global_opts (gcc::context
*ctxt
)
7854 : rtl_opt_pass (pass_data_cse_after_global_opts
, ctxt
)
7857 /* opt_pass methods: */
7858 virtual bool gate (function
*)
7860 return optimize
> 0 && flag_rerun_cse_after_global_opts
;
7863 virtual unsigned int execute (function
*)
7865 return rest_of_handle_cse_after_global_opts ();
7868 }; // class pass_cse_after_global_opts
7873 make_pass_cse_after_global_opts (gcc::context
*ctxt
)
7875 return new pass_cse_after_global_opts (ctxt
);