1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92-7, 1998, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
23 /* stdio.h must precede rtl.h for FFS. */
29 #include "hard-reg-set.h"
32 #include "insn-config.h"
38 #include "splay-tree.h"
40 /* The basic idea of common subexpression elimination is to go
41 through the code, keeping a record of expressions that would
42 have the same value at the current scan point, and replacing
43 expressions encountered with the cheapest equivalent expression.
45 It is too complicated to keep track of the different possibilities
46 when control paths merge; so, at each label, we forget all that is
47 known and start fresh. This can be described as processing each
48 basic block separately. Note, however, that these are not quite
49 the same as the basic blocks found by a later pass and used for
50 data flow analysis and register packing. We do not need to start fresh
51 after a conditional jump instruction if there is no label there.
53 We use two data structures to record the equivalent expressions:
54 a hash table for most expressions, and several vectors together
55 with "quantity numbers" to record equivalent (pseudo) registers.
57 The use of the special data structure for registers is desirable
58 because it is faster. It is possible because registers references
59 contain a fairly small number, the register number, taken from
60 a contiguously allocated series, and two register references are
61 identical if they have the same number. General expressions
62 do not have any such thing, so the only way to retrieve the
63 information recorded on an expression other than a register
64 is to keep it in a hash table.
66 Registers and "quantity numbers":
68 At the start of each basic block, all of the (hardware and pseudo)
69 registers used in the function are given distinct quantity
70 numbers to indicate their contents. During scan, when the code
71 copies one register into another, we copy the quantity number.
72 When a register is loaded in any other way, we allocate a new
73 quantity number to describe the value generated by this operation.
74 `reg_qty' records what quantity a register is currently thought
77 All real quantity numbers are greater than or equal to `max_reg'.
78 If register N has not been assigned a quantity, reg_qty[N] will equal N.
80 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
81 variables should be referenced with an index below `max_reg'.
83 We also maintain a bidirectional chain of registers for each
84 quantity number. `qty_first_reg', `qty_last_reg',
85 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
87 The first register in a chain is the one whose lifespan is least local.
88 Among equals, it is the one that was seen first.
89 We replace any equivalent register with that one.
91 If two registers have the same quantity number, it must be true that
92 REG expressions with `qty_mode' must be in the hash table for both
93 registers and must be in the same class.
95 The converse is not true. Since hard registers may be referenced in
96 any mode, two REG expressions might be equivalent in the hash table
97 but not have the same quantity number if the quantity number of one
98 of the registers is not the same mode as those expressions.
100 Constants and quantity numbers
102 When a quantity has a known constant value, that value is stored
103 in the appropriate element of qty_const. This is in addition to
104 putting the constant in the hash table as is usual for non-regs.
106 Whether a reg or a constant is preferred is determined by the configuration
107 macro CONST_COSTS and will often depend on the constant value. In any
108 event, expressions containing constants can be simplified, by fold_rtx.
110 When a quantity has a known nearly constant value (such as an address
111 of a stack slot), that value is stored in the appropriate element
114 Integer constants don't have a machine mode. However, cse
115 determines the intended machine mode from the destination
116 of the instruction that moves the constant. The machine mode
117 is recorded in the hash table along with the actual RTL
118 constant expression so that different modes are kept separate.
122 To record known equivalences among expressions in general
123 we use a hash table called `table'. It has a fixed number of buckets
124 that contain chains of `struct table_elt' elements for expressions.
125 These chains connect the elements whose expressions have the same
128 Other chains through the same elements connect the elements which
129 currently have equivalent values.
131 Register references in an expression are canonicalized before hashing
132 the expression. This is done using `reg_qty' and `qty_first_reg'.
133 The hash code of a register reference is computed using the quantity
134 number, not the register number.
136 When the value of an expression changes, it is necessary to remove from the
137 hash table not just that expression but all expressions whose values
138 could be different as a result.
140 1. If the value changing is in memory, except in special cases
141 ANYTHING referring to memory could be changed. That is because
142 nobody knows where a pointer does not point.
143 The function `invalidate_memory' removes what is necessary.
145 The special cases are when the address is constant or is
146 a constant plus a fixed register such as the frame pointer
147 or a static chain pointer. When such addresses are stored in,
148 we can tell exactly which other such addresses must be invalidated
149 due to overlap. `invalidate' does this.
150 All expressions that refer to non-constant
151 memory addresses are also invalidated. `invalidate_memory' does this.
153 2. If the value changing is a register, all expressions
154 containing references to that register, and only those,
157 Because searching the entire hash table for expressions that contain
158 a register is very slow, we try to figure out when it isn't necessary.
159 Precisely, this is necessary only when expressions have been
160 entered in the hash table using this register, and then the value has
161 changed, and then another expression wants to be added to refer to
162 the register's new value. This sequence of circumstances is rare
163 within any one basic block.
165 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
166 reg_tick[i] is incremented whenever a value is stored in register i.
167 reg_in_table[i] holds -1 if no references to register i have been
168 entered in the table; otherwise, it contains the value reg_tick[i] had
169 when the references were entered. If we want to enter a reference
170 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
171 Until we want to enter a new entry, the mere fact that the two vectors
172 don't match makes the entries be ignored if anyone tries to match them.
174 Registers themselves are entered in the hash table as well as in
175 the equivalent-register chains. However, the vectors `reg_tick'
176 and `reg_in_table' do not apply to expressions which are simple
177 register references. These expressions are removed from the table
178 immediately when they become invalid, and this can be done even if
179 we do not immediately search for all the expressions that refer to
182 A CLOBBER rtx in an instruction invalidates its operand for further
183 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
184 invalidates everything that resides in memory.
188 Constant expressions that differ only by an additive integer
189 are called related. When a constant expression is put in
190 the table, the related expression with no constant term
191 is also entered. These are made to point at each other
192 so that it is possible to find out if there exists any
193 register equivalent to an expression related to a given expression. */
195 /* One plus largest register number used in this function. */
199 /* One plus largest instruction UID used in this function at time of
202 static int max_insn_uid
;
204 /* Length of vectors indexed by quantity number.
205 We know in advance we will not need a quantity number this big. */
209 /* Next quantity number to be allocated.
210 This is 1 + the largest number needed so far. */
214 /* Indexed by quantity number, gives the first (or last) register
215 in the chain of registers that currently contain this quantity. */
217 static int *qty_first_reg
;
218 static int *qty_last_reg
;
220 /* Index by quantity number, gives the mode of the quantity. */
222 static enum machine_mode
*qty_mode
;
224 /* Indexed by quantity number, gives the rtx of the constant value of the
225 quantity, or zero if it does not have a known value.
226 A sum of the frame pointer (or arg pointer) plus a constant
227 can also be entered here. */
229 static rtx
*qty_const
;
231 /* Indexed by qty number, gives the insn that stored the constant value
232 recorded in `qty_const'. */
234 static rtx
*qty_const_insn
;
236 /* The next three variables are used to track when a comparison between a
237 quantity and some constant or register has been passed. In that case, we
238 know the results of the comparison in case we see it again. These variables
239 record a comparison that is known to be true. */
241 /* Indexed by qty number, gives the rtx code of a comparison with a known
242 result involving this quantity. If none, it is UNKNOWN. */
243 static enum rtx_code
*qty_comparison_code
;
245 /* Indexed by qty number, gives the constant being compared against in a
246 comparison of known result. If no such comparison, it is undefined.
247 If the comparison is not with a constant, it is zero. */
249 static rtx
*qty_comparison_const
;
251 /* Indexed by qty number, gives the quantity being compared against in a
252 comparison of known result. If no such comparison, if it undefined.
253 If the comparison is not with a register, it is -1. */
255 static int *qty_comparison_qty
;
258 /* For machines that have a CC0, we do not record its value in the hash
259 table since its use is guaranteed to be the insn immediately following
260 its definition and any other insn is presumed to invalidate it.
262 Instead, we store below the value last assigned to CC0. If it should
263 happen to be a constant, it is stored in preference to the actual
264 assigned value. In case it is a constant, we store the mode in which
265 the constant should be interpreted. */
267 static rtx prev_insn_cc0
;
268 static enum machine_mode prev_insn_cc0_mode
;
271 /* Previous actual insn. 0 if at first insn of basic block. */
273 static rtx prev_insn
;
275 /* Insn being scanned. */
277 static rtx this_insn
;
279 /* Index by register number, gives the number of the next (or
280 previous) register in the chain of registers sharing the same
283 Or -1 if this register is at the end of the chain.
285 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
287 static int *reg_next_eqv
;
288 static int *reg_prev_eqv
;
290 struct cse_reg_info
{
292 /* The number of times the register has been altered in the current
296 /* The next cse_reg_info structure in the free list. */
297 struct cse_reg_info
* next
;
300 /* The REG_TICK value at which rtx's containing this register are
301 valid in the hash table. If this does not equal the current
302 reg_tick value, such expressions existing in the hash table are
306 /* The quantity number of the register's current contents. */
310 /* A free list of cse_reg_info entries. */
311 static struct cse_reg_info
*cse_reg_info_free_list
;
313 /* A mapping from registers to cse_reg_info data structures. */
314 static splay_tree cse_reg_info_tree
;
316 /* The last lookup we did into the cse_reg_info_tree. This allows us
317 to cache repeated lookups. */
318 static int cached_regno
;
319 static struct cse_reg_info
*cached_cse_reg_info
;
321 /* A HARD_REG_SET containing all the hard registers for which there is
322 currently a REG expression in the hash table. Note the difference
323 from the above variables, which indicate if the REG is mentioned in some
324 expression in the table. */
326 static HARD_REG_SET hard_regs_in_table
;
328 /* A HARD_REG_SET containing all the hard registers that are invalidated
331 static HARD_REG_SET regs_invalidated_by_call
;
333 /* CUID of insn that starts the basic block currently being cse-processed. */
335 static int cse_basic_block_start
;
337 /* CUID of insn that ends the basic block currently being cse-processed. */
339 static int cse_basic_block_end
;
341 /* Vector mapping INSN_UIDs to cuids.
342 The cuids are like uids but increase monotonically always.
343 We use them to see whether a reg is used outside a given basic block. */
345 static int *uid_cuid
;
347 /* Highest UID in UID_CUID. */
350 /* Get the cuid of an insn. */
352 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
354 /* Nonzero if cse has altered conditional jump insns
355 in such a way that jump optimization should be redone. */
357 static int cse_jumps_altered
;
359 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
360 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
361 to put in the note. */
362 static int recorded_label_ref
;
364 /* canon_hash stores 1 in do_not_record
365 if it notices a reference to CC0, PC, or some other volatile
368 static int do_not_record
;
370 #ifdef LOAD_EXTEND_OP
372 /* Scratch rtl used when looking for load-extended copy of a MEM. */
373 static rtx memory_extend_rtx
;
376 /* canon_hash stores 1 in hash_arg_in_memory
377 if it notices a reference to memory within the expression being hashed. */
379 static int hash_arg_in_memory
;
381 /* canon_hash stores 1 in hash_arg_in_struct
382 if it notices a reference to memory that's part of a structure. */
384 static int hash_arg_in_struct
;
386 /* The hash table contains buckets which are chains of `struct table_elt's,
387 each recording one expression's information.
388 That expression is in the `exp' field.
390 Those elements with the same hash code are chained in both directions
391 through the `next_same_hash' and `prev_same_hash' fields.
393 Each set of expressions with equivalent values
394 are on a two-way chain through the `next_same_value'
395 and `prev_same_value' fields, and all point with
396 the `first_same_value' field at the first element in
397 that chain. The chain is in order of increasing cost.
398 Each element's cost value is in its `cost' field.
400 The `in_memory' field is nonzero for elements that
401 involve any reference to memory. These elements are removed
402 whenever a write is done to an unidentified location in memory.
403 To be safe, we assume that a memory address is unidentified unless
404 the address is either a symbol constant or a constant plus
405 the frame pointer or argument pointer.
407 The `in_struct' field is nonzero for elements that
408 involve any reference to memory inside a structure or array.
410 The `related_value' field is used to connect related expressions
411 (that differ by adding an integer).
412 The related expressions are chained in a circular fashion.
413 `related_value' is zero for expressions for which this
416 The `cost' field stores the cost of this element's expression.
418 The `is_const' flag is set if the element is a constant (including
421 The `flag' field is used as a temporary during some search routines.
423 The `mode' field is usually the same as GET_MODE (`exp'), but
424 if `exp' is a CONST_INT and has no machine mode then the `mode'
425 field is the mode it was being used as. Each constant is
426 recorded separately for each mode it is used with. */
432 struct table_elt
*next_same_hash
;
433 struct table_elt
*prev_same_hash
;
434 struct table_elt
*next_same_value
;
435 struct table_elt
*prev_same_value
;
436 struct table_elt
*first_same_value
;
437 struct table_elt
*related_value
;
439 enum machine_mode mode
;
446 /* We don't want a lot of buckets, because we rarely have very many
447 things stored in the hash table, and a lot of buckets slows
448 down a lot of loops that happen frequently. */
451 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
452 register (hard registers may require `do_not_record' to be set). */
455 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
456 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) % NBUCKETS \
457 : canon_hash (X, M) % NBUCKETS)
459 /* Determine whether register number N is considered a fixed register for CSE.
460 It is desirable to replace other regs with fixed regs, to reduce need for
462 A reg wins if it is either the frame pointer or designated as fixed,
463 but not if it is an overlapping register. */
464 #ifdef OVERLAPPING_REGNO_P
465 #define FIXED_REGNO_P(N) \
466 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
467 || fixed_regs[N] || global_regs[N]) \
468 && ! OVERLAPPING_REGNO_P ((N)))
470 #define FIXED_REGNO_P(N) \
471 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
472 || fixed_regs[N] || global_regs[N])
475 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
476 hard registers and pointers into the frame are the cheapest with a cost
477 of 0. Next come pseudos with a cost of one and other hard registers with
478 a cost of 2. Aside from these special cases, call `rtx_cost'. */
480 #define CHEAP_REGNO(N) \
481 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
482 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
483 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
484 || ((N) < FIRST_PSEUDO_REGISTER \
485 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
487 /* A register is cheap if it is a user variable assigned to the register
488 or if its register number always corresponds to a cheap register. */
490 #define CHEAP_REG(N) \
491 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
492 || CHEAP_REGNO (REGNO (N)))
495 (GET_CODE (X) == REG \
496 ? (CHEAP_REG (X) ? 0 \
497 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
501 /* Get the info associated with register N. */
503 #define GET_CSE_REG_INFO(N) \
504 (((N) == cached_regno && cached_cse_reg_info) \
505 ? cached_cse_reg_info : get_cse_reg_info ((N)))
507 /* Get the number of times this register has been updated in this
510 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->variant.reg_tick)
512 /* Get the point at which REG was recorded in the table. */
514 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
516 /* Get the quantity number for REG. */
518 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
520 /* Determine if the quantity number for register X represents a valid index
521 into the `qty_...' variables. */
523 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (N))
526 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
527 during CSE, such nodes are present. Using an ADDRESSOF node which
528 refers to the address of a REG is a good thing because we can then
529 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
530 #define CSE_ADDRESS_COST(RTX) \
531 ((GET_CODE (RTX) == ADDRESSOF && REG_P (XEXP ((RTX), 0))) \
532 ? -1 : ADDRESS_COST(RTX))
535 static struct table_elt
*table
[NBUCKETS
];
537 /* Chain of `struct table_elt's made so far for this function
538 but currently removed from the table. */
540 static struct table_elt
*free_element_chain
;
542 /* Number of `struct table_elt' structures made so far for this function. */
544 static int n_elements_made
;
546 /* Maximum value `n_elements_made' has had so far in this compilation
547 for functions previously processed. */
549 static int max_elements_made
;
551 /* Surviving equivalence class when two equivalence classes are merged
552 by recording the effects of a jump in the last insn. Zero if the
553 last insn was not a conditional jump. */
555 static struct table_elt
*last_jump_equiv_class
;
557 /* Set to the cost of a constant pool reference if one was found for a
558 symbolic constant. If this was found, it means we should try to
559 convert constants into constant pool entries if they don't fit in
562 static int constant_pool_entries_cost
;
564 /* Define maximum length of a branch path. */
566 #define PATHLENGTH 10
568 /* This data describes a block that will be processed by cse_basic_block. */
570 struct cse_basic_block_data
{
571 /* Lowest CUID value of insns in block. */
573 /* Highest CUID value of insns in block. */
575 /* Total number of SETs in block. */
577 /* Last insn in the block. */
579 /* Size of current branch path, if any. */
581 /* Current branch path, indicating which branches will be taken. */
583 /* The branch insn. */
585 /* Whether it should be taken or not. AROUND is the same as taken
586 except that it is used when the destination label is not preceded
588 enum taken
{TAKEN
, NOT_TAKEN
, AROUND
} status
;
592 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
593 virtual regs here because the simplify_*_operation routines are called
594 by integrate.c, which is called before virtual register instantiation. */
596 #define FIXED_BASE_PLUS_P(X) \
597 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
598 || (X) == arg_pointer_rtx \
599 || (X) == virtual_stack_vars_rtx \
600 || (X) == virtual_incoming_args_rtx \
601 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
602 && (XEXP (X, 0) == frame_pointer_rtx \
603 || XEXP (X, 0) == hard_frame_pointer_rtx \
604 || XEXP (X, 0) == arg_pointer_rtx \
605 || XEXP (X, 0) == virtual_stack_vars_rtx \
606 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
607 || GET_CODE (X) == ADDRESSOF)
609 /* Similar, but also allows reference to the stack pointer.
611 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
612 arg_pointer_rtx by itself is nonzero, because on at least one machine,
613 the i960, the arg pointer is zero when it is unused. */
615 #define NONZERO_BASE_PLUS_P(X) \
616 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
617 || (X) == virtual_stack_vars_rtx \
618 || (X) == virtual_incoming_args_rtx \
619 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
620 && (XEXP (X, 0) == frame_pointer_rtx \
621 || XEXP (X, 0) == hard_frame_pointer_rtx \
622 || XEXP (X, 0) == arg_pointer_rtx \
623 || XEXP (X, 0) == virtual_stack_vars_rtx \
624 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
625 || (X) == stack_pointer_rtx \
626 || (X) == virtual_stack_dynamic_rtx \
627 || (X) == virtual_outgoing_args_rtx \
628 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
629 && (XEXP (X, 0) == stack_pointer_rtx \
630 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
631 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
632 || GET_CODE (X) == ADDRESSOF)
634 static int notreg_cost
PROTO((rtx
));
635 static void new_basic_block
PROTO((void));
636 static void make_new_qty
PROTO((int));
637 static void make_regs_eqv
PROTO((int, int));
638 static void delete_reg_equiv
PROTO((int));
639 static int mention_regs
PROTO((rtx
));
640 static int insert_regs
PROTO((rtx
, struct table_elt
*, int));
641 static void free_element
PROTO((struct table_elt
*));
642 static void remove_from_table
PROTO((struct table_elt
*, unsigned));
643 static struct table_elt
*get_element
PROTO((void));
644 static struct table_elt
*lookup
PROTO((rtx
, unsigned, enum machine_mode
)),
645 *lookup_for_remove
PROTO((rtx
, unsigned, enum machine_mode
));
646 static rtx lookup_as_function
PROTO((rtx
, enum rtx_code
));
647 static struct table_elt
*insert
PROTO((rtx
, struct table_elt
*, unsigned,
649 static void merge_equiv_classes
PROTO((struct table_elt
*,
650 struct table_elt
*));
651 static void invalidate
PROTO((rtx
, enum machine_mode
));
652 static int cse_rtx_varies_p
PROTO((rtx
));
653 static void remove_invalid_refs
PROTO((int));
654 static void remove_invalid_subreg_refs
PROTO((int, int, enum machine_mode
));
655 static void rehash_using_reg
PROTO((rtx
));
656 static void invalidate_memory
PROTO((void));
657 static void invalidate_for_call
PROTO((void));
658 static rtx use_related_value
PROTO((rtx
, struct table_elt
*));
659 static unsigned canon_hash
PROTO((rtx
, enum machine_mode
));
660 static unsigned safe_hash
PROTO((rtx
, enum machine_mode
));
661 static int exp_equiv_p
PROTO((rtx
, rtx
, int, int));
662 static void set_nonvarying_address_components
PROTO((rtx
, int, rtx
*,
665 static int refers_to_p
PROTO((rtx
, rtx
));
666 static rtx canon_reg
PROTO((rtx
, rtx
));
667 static void find_best_addr
PROTO((rtx
, rtx
*));
668 static enum rtx_code find_comparison_args
PROTO((enum rtx_code
, rtx
*, rtx
*,
670 enum machine_mode
*));
671 static rtx cse_gen_binary
PROTO((enum rtx_code
, enum machine_mode
,
673 static rtx simplify_plus_minus
PROTO((enum rtx_code
, enum machine_mode
,
675 static rtx fold_rtx
PROTO((rtx
, rtx
));
676 static rtx equiv_constant
PROTO((rtx
));
677 static void record_jump_equiv
PROTO((rtx
, int));
678 static void record_jump_cond
PROTO((enum rtx_code
, enum machine_mode
,
680 static void cse_insn
PROTO((rtx
, rtx
));
681 static int note_mem_written
PROTO((rtx
));
682 static void invalidate_from_clobbers
PROTO((rtx
));
683 static rtx cse_process_notes
PROTO((rtx
, rtx
));
684 static void cse_around_loop
PROTO((rtx
));
685 static void invalidate_skipped_set
PROTO((rtx
, rtx
));
686 static void invalidate_skipped_block
PROTO((rtx
));
687 static void cse_check_loop_start
PROTO((rtx
, rtx
));
688 static void cse_set_around_loop
PROTO((rtx
, rtx
, rtx
));
689 static rtx cse_basic_block
PROTO((rtx
, rtx
, struct branch_path
*, int));
690 static void count_reg_usage
PROTO((rtx
, int *, rtx
, int));
691 extern void dump_class
PROTO((struct table_elt
*));
692 static void check_fold_consts
PROTO((PTR
));
693 static struct cse_reg_info
* get_cse_reg_info
PROTO((int));
694 static void free_cse_reg_info
PROTO((splay_tree_value
));
695 static void flush_hash_table
PROTO((void));
697 /* Dump the expressions in the equivalence class indicated by CLASSP.
698 This function is used only for debugging. */
701 struct table_elt
*classp
;
703 struct table_elt
*elt
;
705 fprintf (stderr
, "Equivalence chain for ");
706 print_rtl (stderr
, classp
->exp
);
707 fprintf (stderr
, ": \n");
709 for (elt
= classp
->first_same_value
; elt
; elt
= elt
->next_same_value
)
711 print_rtl (stderr
, elt
->exp
);
712 fprintf (stderr
, "\n");
716 /* Return an estimate of the cost of computing rtx X.
717 One use is in cse, to decide which expression to keep in the hash table.
718 Another is in rtl generation, to pick the cheapest way to multiply.
719 Other uses like the latter are expected in the future. */
721 /* Internal function, to compute cost when X is not a register; called
722 from COST macro to keep it simple. */
728 return ((GET_CODE (x
) == SUBREG
729 && GET_CODE (SUBREG_REG (x
)) == REG
730 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
731 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x
))) == MODE_INT
732 && (GET_MODE_SIZE (GET_MODE (x
))
733 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
734 && subreg_lowpart_p (x
)
735 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x
)),
736 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))))
737 ? (CHEAP_REG (SUBREG_REG (x
)) ? 0
738 : (REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
? 1
740 : rtx_cost (x
, SET
) * 2);
743 /* Return the right cost to give to an operation
744 to make the cost of the corresponding register-to-register instruction
745 N times that of a fast register-to-register instruction. */
747 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
750 rtx_cost (x
, outer_code
)
752 enum rtx_code outer_code ATTRIBUTE_UNUSED
;
755 register enum rtx_code code
;
756 register const char *fmt
;
762 /* Compute the default costs of certain things.
763 Note that RTX_COSTS can override the defaults. */
769 /* Count multiplication by 2**n as a shift,
770 because if we are considering it, we would output it as a shift. */
771 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
772 && exact_log2 (INTVAL (XEXP (x
, 1))) >= 0)
775 total
= COSTS_N_INSNS (5);
781 total
= COSTS_N_INSNS (7);
784 /* Used in loop.c and combine.c as a marker. */
788 /* We don't want these to be used in substitutions because
789 we have no way of validating the resulting insn. So assign
790 anything containing an ASM_OPERANDS a very high cost. */
800 return ! CHEAP_REG (x
);
803 /* If we can't tie these modes, make this expensive. The larger
804 the mode, the more expensive it is. */
805 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
806 return COSTS_N_INSNS (2
807 + GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
);
810 RTX_COSTS (x
, code
, outer_code
);
813 CONST_COSTS (x
, code
, outer_code
);
817 #ifdef DEFAULT_RTX_COSTS
818 DEFAULT_RTX_COSTS(x
, code
, outer_code
);
823 /* Sum the costs of the sub-rtx's, plus cost of this operation,
824 which is already in total. */
826 fmt
= GET_RTX_FORMAT (code
);
827 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
829 total
+= rtx_cost (XEXP (x
, i
), code
);
830 else if (fmt
[i
] == 'E')
831 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
832 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
);
837 static struct cse_reg_info
*
838 get_cse_reg_info (regno
)
841 struct cse_reg_info
*cri
;
844 /* See if we already have this entry. */
845 n
= splay_tree_lookup (cse_reg_info_tree
,
846 (splay_tree_key
) regno
);
848 cri
= (struct cse_reg_info
*) (n
->value
);
851 /* Get a new cse_reg_info structure. */
852 if (cse_reg_info_free_list
)
854 cri
= cse_reg_info_free_list
;
855 cse_reg_info_free_list
= cri
->variant
.next
;
858 cri
= (struct cse_reg_info
*) xmalloc (sizeof (struct cse_reg_info
));
861 cri
->variant
.reg_tick
= 0;
862 cri
->reg_in_table
= -1;
863 cri
->reg_qty
= regno
;
865 splay_tree_insert (cse_reg_info_tree
,
866 (splay_tree_key
) regno
,
867 (splay_tree_value
) cri
);
870 /* Cache this lookup; we tend to be looking up information about the
871 same register several times in a row. */
872 cached_regno
= regno
;
873 cached_cse_reg_info
= cri
;
879 free_cse_reg_info (v
)
882 struct cse_reg_info
*cri
= (struct cse_reg_info
*) v
;
884 cri
->variant
.next
= cse_reg_info_free_list
;
885 cse_reg_info_free_list
= cri
;
888 /* Clear the hash table and initialize each register with its own quantity,
889 for a new basic block. */
898 if (cse_reg_info_tree
)
900 splay_tree_delete (cse_reg_info_tree
);
901 cached_cse_reg_info
= 0;
904 cse_reg_info_tree
= splay_tree_new (splay_tree_compare_ints
, 0,
907 CLEAR_HARD_REG_SET (hard_regs_in_table
);
909 /* The per-quantity values used to be initialized here, but it is
910 much faster to initialize each as it is made in `make_new_qty'. */
912 for (i
= 0; i
< NBUCKETS
; i
++)
914 register struct table_elt
*this, *next
;
915 for (this = table
[i
]; this; this = next
)
917 next
= this->next_same_hash
;
922 bzero ((char *) table
, sizeof table
);
931 /* Say that register REG contains a quantity not in any register before
932 and initialize that quantity. */
940 if (next_qty
>= max_qty
)
943 q
= REG_QTY (reg
) = next_qty
++;
944 qty_first_reg
[q
] = reg
;
945 qty_last_reg
[q
] = reg
;
946 qty_const
[q
] = qty_const_insn
[q
] = 0;
947 qty_comparison_code
[q
] = UNKNOWN
;
949 reg_next_eqv
[reg
] = reg_prev_eqv
[reg
] = -1;
952 /* Make reg NEW equivalent to reg OLD.
953 OLD is not changing; NEW is. */
956 make_regs_eqv (new, old
)
957 register int new, old
;
959 register int lastr
, firstr
;
960 register int q
= REG_QTY (old
);
962 /* Nothing should become eqv until it has a "non-invalid" qty number. */
963 if (! REGNO_QTY_VALID_P (old
))
967 firstr
= qty_first_reg
[q
];
968 lastr
= qty_last_reg
[q
];
970 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
971 hard regs. Among pseudos, if NEW will live longer than any other reg
972 of the same qty, and that is beyond the current basic block,
973 make it the new canonical replacement for this qty. */
974 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
975 /* Certain fixed registers might be of the class NO_REGS. This means
976 that not only can they not be allocated by the compiler, but
977 they cannot be used in substitutions or canonicalizations
979 && (new >= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new) != NO_REGS
)
980 && ((new < FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new))
981 || (new >= FIRST_PSEUDO_REGISTER
982 && (firstr
< FIRST_PSEUDO_REGISTER
983 || ((uid_cuid
[REGNO_LAST_UID (new)] > cse_basic_block_end
984 || (uid_cuid
[REGNO_FIRST_UID (new)]
985 < cse_basic_block_start
))
986 && (uid_cuid
[REGNO_LAST_UID (new)]
987 > uid_cuid
[REGNO_LAST_UID (firstr
)]))))))
989 reg_prev_eqv
[firstr
] = new;
990 reg_next_eqv
[new] = firstr
;
991 reg_prev_eqv
[new] = -1;
992 qty_first_reg
[q
] = new;
996 /* If NEW is a hard reg (known to be non-fixed), insert at end.
997 Otherwise, insert before any non-fixed hard regs that are at the
998 end. Registers of class NO_REGS cannot be used as an
999 equivalent for anything. */
1000 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_prev_eqv
[lastr
] >= 0
1001 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
1002 && new >= FIRST_PSEUDO_REGISTER
)
1003 lastr
= reg_prev_eqv
[lastr
];
1004 reg_next_eqv
[new] = reg_next_eqv
[lastr
];
1005 if (reg_next_eqv
[lastr
] >= 0)
1006 reg_prev_eqv
[reg_next_eqv
[lastr
]] = new;
1008 qty_last_reg
[q
] = new;
1009 reg_next_eqv
[lastr
] = new;
1010 reg_prev_eqv
[new] = lastr
;
1014 /* Remove REG from its equivalence class. */
1017 delete_reg_equiv (reg
)
1020 register int q
= REG_QTY (reg
);
1023 /* If invalid, do nothing. */
1027 p
= reg_prev_eqv
[reg
];
1028 n
= reg_next_eqv
[reg
];
1031 reg_prev_eqv
[n
] = p
;
1033 qty_last_reg
[q
] = p
;
1035 reg_next_eqv
[p
] = n
;
1037 qty_first_reg
[q
] = n
;
1039 REG_QTY (reg
) = reg
;
1042 /* Remove any invalid expressions from the hash table
1043 that refer to any of the registers contained in expression X.
1045 Make sure that newly inserted references to those registers
1046 as subexpressions will be considered valid.
1048 mention_regs is not called when a register itself
1049 is being stored in the table.
1051 Return 1 if we have done something that may have changed the hash code
1058 register enum rtx_code code
;
1060 register const char *fmt
;
1061 register int changed
= 0;
1066 code
= GET_CODE (x
);
1069 register int regno
= REGNO (x
);
1070 register int endregno
1071 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
1072 : HARD_REGNO_NREGS (regno
, GET_MODE (x
)));
1075 for (i
= regno
; i
< endregno
; i
++)
1077 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1078 remove_invalid_refs (i
);
1080 REG_IN_TABLE (i
) = REG_TICK (i
);
1086 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1087 pseudo if they don't use overlapping words. We handle only pseudos
1088 here for simplicity. */
1089 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
1090 && REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
)
1092 int i
= REGNO (SUBREG_REG (x
));
1094 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1096 /* If reg_tick has been incremented more than once since
1097 reg_in_table was last set, that means that the entire
1098 register has been set before, so discard anything memorized
1099 for the entrire register, including all SUBREG expressions. */
1100 if (REG_IN_TABLE (i
) != REG_TICK (i
) - 1)
1101 remove_invalid_refs (i
);
1103 remove_invalid_subreg_refs (i
, SUBREG_WORD (x
), GET_MODE (x
));
1106 REG_IN_TABLE (i
) = REG_TICK (i
);
1110 /* If X is a comparison or a COMPARE and either operand is a register
1111 that does not have a quantity, give it one. This is so that a later
1112 call to record_jump_equiv won't cause X to be assigned a different
1113 hash code and not found in the table after that call.
1115 It is not necessary to do this here, since rehash_using_reg can
1116 fix up the table later, but doing this here eliminates the need to
1117 call that expensive function in the most common case where the only
1118 use of the register is in the comparison. */
1120 if (code
== COMPARE
|| GET_RTX_CLASS (code
) == '<')
1122 if (GET_CODE (XEXP (x
, 0)) == REG
1123 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
1124 if (insert_regs (XEXP (x
, 0), NULL_PTR
, 0))
1126 rehash_using_reg (XEXP (x
, 0));
1130 if (GET_CODE (XEXP (x
, 1)) == REG
1131 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
1132 if (insert_regs (XEXP (x
, 1), NULL_PTR
, 0))
1134 rehash_using_reg (XEXP (x
, 1));
1139 fmt
= GET_RTX_FORMAT (code
);
1140 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1142 changed
|= mention_regs (XEXP (x
, i
));
1143 else if (fmt
[i
] == 'E')
1144 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1145 changed
|= mention_regs (XVECEXP (x
, i
, j
));
1150 /* Update the register quantities for inserting X into the hash table
1151 with a value equivalent to CLASSP.
1152 (If the class does not contain a REG, it is irrelevant.)
1153 If MODIFIED is nonzero, X is a destination; it is being modified.
1154 Note that delete_reg_equiv should be called on a register
1155 before insert_regs is done on that register with MODIFIED != 0.
1157 Nonzero value means that elements of reg_qty have changed
1158 so X's hash code may be different. */
1161 insert_regs (x
, classp
, modified
)
1163 struct table_elt
*classp
;
1166 if (GET_CODE (x
) == REG
)
1168 register int regno
= REGNO (x
);
1170 /* If REGNO is in the equivalence table already but is of the
1171 wrong mode for that equivalence, don't do anything here. */
1173 if (REGNO_QTY_VALID_P (regno
)
1174 && qty_mode
[REG_QTY (regno
)] != GET_MODE (x
))
1177 if (modified
|| ! REGNO_QTY_VALID_P (regno
))
1180 for (classp
= classp
->first_same_value
;
1182 classp
= classp
->next_same_value
)
1183 if (GET_CODE (classp
->exp
) == REG
1184 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1186 make_regs_eqv (regno
, REGNO (classp
->exp
));
1190 make_new_qty (regno
);
1191 qty_mode
[REG_QTY (regno
)] = GET_MODE (x
);
1198 /* If X is a SUBREG, we will likely be inserting the inner register in the
1199 table. If that register doesn't have an assigned quantity number at
1200 this point but does later, the insertion that we will be doing now will
1201 not be accessible because its hash code will have changed. So assign
1202 a quantity number now. */
1204 else if (GET_CODE (x
) == SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
1205 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1207 int regno
= REGNO (SUBREG_REG (x
));
1209 insert_regs (SUBREG_REG (x
), NULL_PTR
, 0);
1210 /* Mention_regs checks if REG_TICK is exactly one larger than
1211 REG_IN_TABLE to find out if there was only a single preceding
1212 invalidation - for the SUBREG - or another one, which would be
1213 for the full register. Since we don't invalidate the SUBREG
1214 here first, we might have to bump up REG_TICK so that mention_regs
1215 will do the right thing. */
1216 if (REG_IN_TABLE (regno
) >= 0
1217 && REG_TICK (regno
) == REG_IN_TABLE (regno
) + 1)
1223 return mention_regs (x
);
1226 /* Look in or update the hash table. */
1228 /* Put the element ELT on the list of free elements. */
1232 struct table_elt
*elt
;
1234 elt
->next_same_hash
= free_element_chain
;
1235 free_element_chain
= elt
;
1238 /* Return an element that is free for use. */
1240 static struct table_elt
*
1243 struct table_elt
*elt
= free_element_chain
;
1246 free_element_chain
= elt
->next_same_hash
;
1250 return (struct table_elt
*) oballoc (sizeof (struct table_elt
));
1253 /* Remove table element ELT from use in the table.
1254 HASH is its hash code, made using the HASH macro.
1255 It's an argument because often that is known in advance
1256 and we save much time not recomputing it. */
1259 remove_from_table (elt
, hash
)
1260 register struct table_elt
*elt
;
1266 /* Mark this element as removed. See cse_insn. */
1267 elt
->first_same_value
= 0;
1269 /* Remove the table element from its equivalence class. */
1272 register struct table_elt
*prev
= elt
->prev_same_value
;
1273 register struct table_elt
*next
= elt
->next_same_value
;
1275 if (next
) next
->prev_same_value
= prev
;
1278 prev
->next_same_value
= next
;
1281 register struct table_elt
*newfirst
= next
;
1284 next
->first_same_value
= newfirst
;
1285 next
= next
->next_same_value
;
1290 /* Remove the table element from its hash bucket. */
1293 register struct table_elt
*prev
= elt
->prev_same_hash
;
1294 register struct table_elt
*next
= elt
->next_same_hash
;
1296 if (next
) next
->prev_same_hash
= prev
;
1299 prev
->next_same_hash
= next
;
1300 else if (table
[hash
] == elt
)
1304 /* This entry is not in the proper hash bucket. This can happen
1305 when two classes were merged by `merge_equiv_classes'. Search
1306 for the hash bucket that it heads. This happens only very
1307 rarely, so the cost is acceptable. */
1308 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1309 if (table
[hash
] == elt
)
1314 /* Remove the table element from its related-value circular chain. */
1316 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1318 register struct table_elt
*p
= elt
->related_value
;
1319 while (p
->related_value
!= elt
)
1320 p
= p
->related_value
;
1321 p
->related_value
= elt
->related_value
;
1322 if (p
->related_value
== p
)
1323 p
->related_value
= 0;
1329 /* Look up X in the hash table and return its table element,
1330 or 0 if X is not in the table.
1332 MODE is the machine-mode of X, or if X is an integer constant
1333 with VOIDmode then MODE is the mode with which X will be used.
1335 Here we are satisfied to find an expression whose tree structure
1338 static struct table_elt
*
1339 lookup (x
, hash
, mode
)
1342 enum machine_mode mode
;
1344 register struct table_elt
*p
;
1346 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1347 if (mode
== p
->mode
&& ((x
== p
->exp
&& GET_CODE (x
) == REG
)
1348 || exp_equiv_p (x
, p
->exp
, GET_CODE (x
) != REG
, 0)))
1354 /* Like `lookup' but don't care whether the table element uses invalid regs.
1355 Also ignore discrepancies in the machine mode of a register. */
1357 static struct table_elt
*
1358 lookup_for_remove (x
, hash
, mode
)
1361 enum machine_mode mode
;
1363 register struct table_elt
*p
;
1365 if (GET_CODE (x
) == REG
)
1367 int regno
= REGNO (x
);
1368 /* Don't check the machine mode when comparing registers;
1369 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1370 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1371 if (GET_CODE (p
->exp
) == REG
1372 && REGNO (p
->exp
) == regno
)
1377 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1378 if (mode
== p
->mode
&& (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, 0)))
1385 /* Look for an expression equivalent to X and with code CODE.
1386 If one is found, return that expression. */
1389 lookup_as_function (x
, code
)
1393 register struct table_elt
*p
= lookup (x
, safe_hash (x
, VOIDmode
) % NBUCKETS
,
1395 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1396 long as we are narrowing. So if we looked in vain for a mode narrower
1397 than word_mode before, look for word_mode now. */
1398 if (p
== 0 && code
== CONST_INT
1399 && GET_MODE_SIZE (GET_MODE (x
)) < GET_MODE_SIZE (word_mode
))
1402 PUT_MODE (x
, word_mode
);
1403 p
= lookup (x
, safe_hash (x
, VOIDmode
) % NBUCKETS
, word_mode
);
1409 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1411 if (GET_CODE (p
->exp
) == code
1412 /* Make sure this is a valid entry in the table. */
1413 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
1420 /* Insert X in the hash table, assuming HASH is its hash code
1421 and CLASSP is an element of the class it should go in
1422 (or 0 if a new class should be made).
1423 It is inserted at the proper position to keep the class in
1424 the order cheapest first.
1426 MODE is the machine-mode of X, or if X is an integer constant
1427 with VOIDmode then MODE is the mode with which X will be used.
1429 For elements of equal cheapness, the most recent one
1430 goes in front, except that the first element in the list
1431 remains first unless a cheaper element is added. The order of
1432 pseudo-registers does not matter, as canon_reg will be called to
1433 find the cheapest when a register is retrieved from the table.
1435 The in_memory field in the hash table element is set to 0.
1436 The caller must set it nonzero if appropriate.
1438 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1439 and if insert_regs returns a nonzero value
1440 you must then recompute its hash code before calling here.
1442 If necessary, update table showing constant values of quantities. */
1444 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1446 static struct table_elt
*
1447 insert (x
, classp
, hash
, mode
)
1449 register struct table_elt
*classp
;
1451 enum machine_mode mode
;
1453 register struct table_elt
*elt
;
1455 /* If X is a register and we haven't made a quantity for it,
1456 something is wrong. */
1457 if (GET_CODE (x
) == REG
&& ! REGNO_QTY_VALID_P (REGNO (x
)))
1460 /* If X is a hard register, show it is being put in the table. */
1461 if (GET_CODE (x
) == REG
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1463 int regno
= REGNO (x
);
1464 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1467 for (i
= regno
; i
< endregno
; i
++)
1468 SET_HARD_REG_BIT (hard_regs_in_table
, i
);
1471 /* If X is a label, show we recorded it. */
1472 if (GET_CODE (x
) == LABEL_REF
1473 || (GET_CODE (x
) == CONST
&& GET_CODE (XEXP (x
, 0)) == PLUS
1474 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == LABEL_REF
))
1475 recorded_label_ref
= 1;
1477 /* Put an element for X into the right hash bucket. */
1479 elt
= get_element ();
1481 elt
->cost
= COST (x
);
1482 elt
->next_same_value
= 0;
1483 elt
->prev_same_value
= 0;
1484 elt
->next_same_hash
= table
[hash
];
1485 elt
->prev_same_hash
= 0;
1486 elt
->related_value
= 0;
1489 elt
->is_const
= (CONSTANT_P (x
)
1490 /* GNU C++ takes advantage of this for `this'
1491 (and other const values). */
1492 || (RTX_UNCHANGING_P (x
)
1493 && GET_CODE (x
) == REG
1494 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
1495 || FIXED_BASE_PLUS_P (x
));
1498 table
[hash
]->prev_same_hash
= elt
;
1501 /* Put it into the proper value-class. */
1504 classp
= classp
->first_same_value
;
1505 if (CHEAPER (elt
, classp
))
1506 /* Insert at the head of the class */
1508 register struct table_elt
*p
;
1509 elt
->next_same_value
= classp
;
1510 classp
->prev_same_value
= elt
;
1511 elt
->first_same_value
= elt
;
1513 for (p
= classp
; p
; p
= p
->next_same_value
)
1514 p
->first_same_value
= elt
;
1518 /* Insert not at head of the class. */
1519 /* Put it after the last element cheaper than X. */
1520 register struct table_elt
*p
, *next
;
1521 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1523 /* Put it after P and before NEXT. */
1524 elt
->next_same_value
= next
;
1526 next
->prev_same_value
= elt
;
1527 elt
->prev_same_value
= p
;
1528 p
->next_same_value
= elt
;
1529 elt
->first_same_value
= classp
;
1533 elt
->first_same_value
= elt
;
1535 /* If this is a constant being set equivalent to a register or a register
1536 being set equivalent to a constant, note the constant equivalence.
1538 If this is a constant, it cannot be equivalent to a different constant,
1539 and a constant is the only thing that can be cheaper than a register. So
1540 we know the register is the head of the class (before the constant was
1543 If this is a register that is not already known equivalent to a
1544 constant, we must check the entire class.
1546 If this is a register that is already known equivalent to an insn,
1547 update `qty_const_insn' to show that `this_insn' is the latest
1548 insn making that quantity equivalent to the constant. */
1550 if (elt
->is_const
&& classp
&& GET_CODE (classp
->exp
) == REG
1551 && GET_CODE (x
) != REG
)
1553 qty_const
[REG_QTY (REGNO (classp
->exp
))]
1554 = gen_lowpart_if_possible (qty_mode
[REG_QTY (REGNO (classp
->exp
))], x
);
1555 qty_const_insn
[REG_QTY (REGNO (classp
->exp
))] = this_insn
;
1558 else if (GET_CODE (x
) == REG
&& classp
&& ! qty_const
[REG_QTY (REGNO (x
))]
1561 register struct table_elt
*p
;
1563 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1565 if (p
->is_const
&& GET_CODE (p
->exp
) != REG
)
1567 qty_const
[REG_QTY (REGNO (x
))]
1568 = gen_lowpart_if_possible (GET_MODE (x
), p
->exp
);
1569 qty_const_insn
[REG_QTY (REGNO (x
))] = this_insn
;
1575 else if (GET_CODE (x
) == REG
&& qty_const
[REG_QTY (REGNO (x
))]
1576 && GET_MODE (x
) == qty_mode
[REG_QTY (REGNO (x
))])
1577 qty_const_insn
[REG_QTY (REGNO (x
))] = this_insn
;
1579 /* If this is a constant with symbolic value,
1580 and it has a term with an explicit integer value,
1581 link it up with related expressions. */
1582 if (GET_CODE (x
) == CONST
)
1584 rtx subexp
= get_related_value (x
);
1586 struct table_elt
*subelt
, *subelt_prev
;
1590 /* Get the integer-free subexpression in the hash table. */
1591 subhash
= safe_hash (subexp
, mode
) % NBUCKETS
;
1592 subelt
= lookup (subexp
, subhash
, mode
);
1594 subelt
= insert (subexp
, NULL_PTR
, subhash
, mode
);
1595 /* Initialize SUBELT's circular chain if it has none. */
1596 if (subelt
->related_value
== 0)
1597 subelt
->related_value
= subelt
;
1598 /* Find the element in the circular chain that precedes SUBELT. */
1599 subelt_prev
= subelt
;
1600 while (subelt_prev
->related_value
!= subelt
)
1601 subelt_prev
= subelt_prev
->related_value
;
1602 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1603 This way the element that follows SUBELT is the oldest one. */
1604 elt
->related_value
= subelt_prev
->related_value
;
1605 subelt_prev
->related_value
= elt
;
1612 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1613 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1614 the two classes equivalent.
1616 CLASS1 will be the surviving class; CLASS2 should not be used after this
1619 Any invalid entries in CLASS2 will not be copied. */
1622 merge_equiv_classes (class1
, class2
)
1623 struct table_elt
*class1
, *class2
;
1625 struct table_elt
*elt
, *next
, *new;
1627 /* Ensure we start with the head of the classes. */
1628 class1
= class1
->first_same_value
;
1629 class2
= class2
->first_same_value
;
1631 /* If they were already equal, forget it. */
1632 if (class1
== class2
)
1635 for (elt
= class2
; elt
; elt
= next
)
1639 enum machine_mode mode
= elt
->mode
;
1641 next
= elt
->next_same_value
;
1643 /* Remove old entry, make a new one in CLASS1's class.
1644 Don't do this for invalid entries as we cannot find their
1645 hash code (it also isn't necessary). */
1646 if (GET_CODE (exp
) == REG
|| exp_equiv_p (exp
, exp
, 1, 0))
1648 hash_arg_in_memory
= 0;
1649 hash_arg_in_struct
= 0;
1650 hash
= HASH (exp
, mode
);
1652 if (GET_CODE (exp
) == REG
)
1653 delete_reg_equiv (REGNO (exp
));
1655 remove_from_table (elt
, hash
);
1657 if (insert_regs (exp
, class1
, 0))
1659 rehash_using_reg (exp
);
1660 hash
= HASH (exp
, mode
);
1662 new = insert (exp
, class1
, hash
, mode
);
1663 new->in_memory
= hash_arg_in_memory
;
1664 new->in_struct
= hash_arg_in_struct
;
1670 /* Flush the entire hash table. */
1676 struct table_elt
*p
;
1678 for (i
= 0; i
< NBUCKETS
; i
++)
1679 for (p
= table
[i
]; p
; p
= table
[i
])
1681 /* Note that invalidate can remove elements
1682 after P in the current hash chain. */
1683 if (GET_CODE (p
->exp
) == REG
)
1684 invalidate (p
->exp
, p
->mode
);
1686 remove_from_table (p
, i
);
1691 /* Remove from the hash table, or mark as invalid,
1692 all expressions whose values could be altered by storing in X.
1693 X is a register, a subreg, or a memory reference with nonvarying address
1694 (because, when a memory reference with a varying address is stored in,
1695 all memory references are removed by invalidate_memory
1696 so specific invalidation is superfluous).
1697 FULL_MODE, if not VOIDmode, indicates that this much should be invalidated
1698 instead of just the amount indicated by the mode of X. This is only used
1699 for bitfield stores into memory.
1701 A nonvarying address may be just a register or just
1702 a symbol reference, or it may be either of those plus
1703 a numeric offset. */
1706 invalidate (x
, full_mode
)
1708 enum machine_mode full_mode
;
1711 register struct table_elt
*p
;
1713 /* If X is a register, dependencies on its contents
1714 are recorded through the qty number mechanism.
1715 Just change the qty number of the register,
1716 mark it as invalid for expressions that refer to it,
1717 and remove it itself. */
1719 if (GET_CODE (x
) == REG
)
1721 register int regno
= REGNO (x
);
1722 register unsigned hash
= HASH (x
, GET_MODE (x
));
1724 /* Remove REGNO from any quantity list it might be on and indicate
1725 that its value might have changed. If it is a pseudo, remove its
1726 entry from the hash table.
1728 For a hard register, we do the first two actions above for any
1729 additional hard registers corresponding to X. Then, if any of these
1730 registers are in the table, we must remove any REG entries that
1731 overlap these registers. */
1733 delete_reg_equiv (regno
);
1736 if (regno
>= FIRST_PSEUDO_REGISTER
)
1738 /* Because a register can be referenced in more than one mode,
1739 we might have to remove more than one table entry. */
1741 struct table_elt
*elt
;
1743 while ((elt
= lookup_for_remove (x
, hash
, GET_MODE (x
))))
1744 remove_from_table (elt
, hash
);
1748 HOST_WIDE_INT in_table
1749 = TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1750 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1751 int tregno
, tendregno
;
1752 register struct table_elt
*p
, *next
;
1754 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1756 for (i
= regno
+ 1; i
< endregno
; i
++)
1758 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, i
);
1759 CLEAR_HARD_REG_BIT (hard_regs_in_table
, i
);
1760 delete_reg_equiv (i
);
1765 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1766 for (p
= table
[hash
]; p
; p
= next
)
1768 next
= p
->next_same_hash
;
1770 if (GET_CODE (p
->exp
) != REG
1771 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1774 tregno
= REGNO (p
->exp
);
1776 = tregno
+ HARD_REGNO_NREGS (tregno
, GET_MODE (p
->exp
));
1777 if (tendregno
> regno
&& tregno
< endregno
)
1778 remove_from_table (p
, hash
);
1785 if (GET_CODE (x
) == SUBREG
)
1787 if (GET_CODE (SUBREG_REG (x
)) != REG
)
1789 invalidate (SUBREG_REG (x
), VOIDmode
);
1793 /* If X is a parallel, invalidate all of its elements. */
1795 if (GET_CODE (x
) == PARALLEL
)
1797 for (i
= XVECLEN (x
, 0) - 1; i
>= 0 ; --i
)
1798 invalidate (XVECEXP (x
, 0, i
), VOIDmode
);
1802 /* If X is an expr_list, this is part of a disjoint return value;
1803 extract the location in question ignoring the offset. */
1805 if (GET_CODE (x
) == EXPR_LIST
)
1807 invalidate (XEXP (x
, 0), VOIDmode
);
1811 /* X is not a register; it must be a memory reference with
1812 a nonvarying address. Remove all hash table elements
1813 that refer to overlapping pieces of memory. */
1815 if (GET_CODE (x
) != MEM
)
1818 if (full_mode
== VOIDmode
)
1819 full_mode
= GET_MODE (x
);
1821 for (i
= 0; i
< NBUCKETS
; i
++)
1823 register struct table_elt
*next
;
1824 for (p
= table
[i
]; p
; p
= next
)
1826 next
= p
->next_same_hash
;
1827 /* Invalidate ASM_OPERANDS which reference memory (this is easier
1828 than checking all the aliases). */
1830 && (GET_CODE (p
->exp
) != MEM
1831 || true_dependence (x
, full_mode
, p
->exp
, cse_rtx_varies_p
)))
1832 remove_from_table (p
, i
);
1837 /* Remove all expressions that refer to register REGNO,
1838 since they are already invalid, and we are about to
1839 mark that register valid again and don't want the old
1840 expressions to reappear as valid. */
1843 remove_invalid_refs (regno
)
1847 register struct table_elt
*p
, *next
;
1849 for (i
= 0; i
< NBUCKETS
; i
++)
1850 for (p
= table
[i
]; p
; p
= next
)
1852 next
= p
->next_same_hash
;
1853 if (GET_CODE (p
->exp
) != REG
1854 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, NULL_PTR
))
1855 remove_from_table (p
, i
);
1859 /* Likewise for a subreg with subreg_reg WORD and mode MODE. */
1861 remove_invalid_subreg_refs (regno
, word
, mode
)
1864 enum machine_mode mode
;
1867 register struct table_elt
*p
, *next
;
1868 int end
= word
+ (GET_MODE_SIZE (mode
) - 1) / UNITS_PER_WORD
;
1870 for (i
= 0; i
< NBUCKETS
; i
++)
1871 for (p
= table
[i
]; p
; p
= next
)
1874 next
= p
->next_same_hash
;
1877 if (GET_CODE (p
->exp
) != REG
1878 && (GET_CODE (exp
) != SUBREG
1879 || GET_CODE (SUBREG_REG (exp
)) != REG
1880 || REGNO (SUBREG_REG (exp
)) != regno
1881 || (((SUBREG_WORD (exp
)
1882 + (GET_MODE_SIZE (GET_MODE (exp
)) - 1) / UNITS_PER_WORD
)
1884 && SUBREG_WORD (exp
) <= end
))
1885 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, NULL_PTR
))
1886 remove_from_table (p
, i
);
1890 /* Recompute the hash codes of any valid entries in the hash table that
1891 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1893 This is called when we make a jump equivalence. */
1896 rehash_using_reg (x
)
1900 struct table_elt
*p
, *next
;
1903 if (GET_CODE (x
) == SUBREG
)
1906 /* If X is not a register or if the register is known not to be in any
1907 valid entries in the table, we have no work to do. */
1909 if (GET_CODE (x
) != REG
1910 || REG_IN_TABLE (REGNO (x
)) < 0
1911 || REG_IN_TABLE (REGNO (x
)) != REG_TICK (REGNO (x
)))
1914 /* Scan all hash chains looking for valid entries that mention X.
1915 If we find one and it is in the wrong hash chain, move it. We can skip
1916 objects that are registers, since they are handled specially. */
1918 for (i
= 0; i
< NBUCKETS
; i
++)
1919 for (p
= table
[i
]; p
; p
= next
)
1921 next
= p
->next_same_hash
;
1922 if (GET_CODE (p
->exp
) != REG
&& reg_mentioned_p (x
, p
->exp
)
1923 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0)
1924 && i
!= (hash
= safe_hash (p
->exp
, p
->mode
) % NBUCKETS
))
1926 if (p
->next_same_hash
)
1927 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
1929 if (p
->prev_same_hash
)
1930 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
1932 table
[i
] = p
->next_same_hash
;
1934 p
->next_same_hash
= table
[hash
];
1935 p
->prev_same_hash
= 0;
1937 table
[hash
]->prev_same_hash
= p
;
1943 /* Remove from the hash table any expression that is a call-clobbered
1944 register. Also update their TICK values. */
1947 invalidate_for_call ()
1949 int regno
, endregno
;
1952 struct table_elt
*p
, *next
;
1955 /* Go through all the hard registers. For each that is clobbered in
1956 a CALL_INSN, remove the register from quantity chains and update
1957 reg_tick if defined. Also see if any of these registers is currently
1960 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
1961 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
1963 delete_reg_equiv (regno
);
1964 if (REG_TICK (regno
) >= 0)
1967 in_table
|= (TEST_HARD_REG_BIT (hard_regs_in_table
, regno
) != 0);
1970 /* In the case where we have no call-clobbered hard registers in the
1971 table, we are done. Otherwise, scan the table and remove any
1972 entry that overlaps a call-clobbered register. */
1975 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1976 for (p
= table
[hash
]; p
; p
= next
)
1978 next
= p
->next_same_hash
;
1982 remove_from_table (p
, hash
);
1986 if (GET_CODE (p
->exp
) != REG
1987 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1990 regno
= REGNO (p
->exp
);
1991 endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (p
->exp
));
1993 for (i
= regno
; i
< endregno
; i
++)
1994 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
1996 remove_from_table (p
, hash
);
2002 /* Given an expression X of type CONST,
2003 and ELT which is its table entry (or 0 if it
2004 is not in the hash table),
2005 return an alternate expression for X as a register plus integer.
2006 If none can be found, return 0. */
2009 use_related_value (x
, elt
)
2011 struct table_elt
*elt
;
2013 register struct table_elt
*relt
= 0;
2014 register struct table_elt
*p
, *q
;
2015 HOST_WIDE_INT offset
;
2017 /* First, is there anything related known?
2018 If we have a table element, we can tell from that.
2019 Otherwise, must look it up. */
2021 if (elt
!= 0 && elt
->related_value
!= 0)
2023 else if (elt
== 0 && GET_CODE (x
) == CONST
)
2025 rtx subexp
= get_related_value (x
);
2027 relt
= lookup (subexp
,
2028 safe_hash (subexp
, GET_MODE (subexp
)) % NBUCKETS
,
2035 /* Search all related table entries for one that has an
2036 equivalent register. */
2041 /* This loop is strange in that it is executed in two different cases.
2042 The first is when X is already in the table. Then it is searching
2043 the RELATED_VALUE list of X's class (RELT). The second case is when
2044 X is not in the table. Then RELT points to a class for the related
2047 Ensure that, whatever case we are in, that we ignore classes that have
2048 the same value as X. */
2050 if (rtx_equal_p (x
, p
->exp
))
2053 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
2054 if (GET_CODE (q
->exp
) == REG
)
2060 p
= p
->related_value
;
2062 /* We went all the way around, so there is nothing to be found.
2063 Alternatively, perhaps RELT was in the table for some other reason
2064 and it has no related values recorded. */
2065 if (p
== relt
|| p
== 0)
2072 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
2073 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2074 return plus_constant (q
->exp
, offset
);
2077 /* Hash an rtx. We are careful to make sure the value is never negative.
2078 Equivalent registers hash identically.
2079 MODE is used in hashing for CONST_INTs only;
2080 otherwise the mode of X is used.
2082 Store 1 in do_not_record if any subexpression is volatile.
2084 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2085 which does not have the RTX_UNCHANGING_P bit set.
2086 In this case, also store 1 in hash_arg_in_struct
2087 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
2089 Note that cse_insn knows that the hash code of a MEM expression
2090 is just (int) MEM plus the hash code of the address. */
2093 canon_hash (x
, mode
)
2095 enum machine_mode mode
;
2098 register unsigned hash
= 0;
2099 register enum rtx_code code
;
2100 register const char *fmt
;
2102 /* repeat is used to turn tail-recursion into iteration. */
2107 code
= GET_CODE (x
);
2112 register int regno
= REGNO (x
);
2114 /* On some machines, we can't record any non-fixed hard register,
2115 because extending its life will cause reload problems. We
2116 consider ap, fp, and sp to be fixed for this purpose.
2118 We also consider CCmode registers to be fixed for this purpose;
2119 failure to do so leads to failure to simplify 0<100 type of
2122 On all machines, we can't record any global registers. */
2124 if (regno
< FIRST_PSEUDO_REGISTER
2125 && (global_regs
[regno
]
2126 || (SMALL_REGISTER_CLASSES
2127 && ! fixed_regs
[regno
]
2128 && regno
!= FRAME_POINTER_REGNUM
2129 && regno
!= HARD_FRAME_POINTER_REGNUM
2130 && regno
!= ARG_POINTER_REGNUM
2131 && regno
!= STACK_POINTER_REGNUM
2132 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_CC
)))
2137 hash
+= ((unsigned) REG
<< 7) + (unsigned) REG_QTY (regno
);
2141 /* We handle SUBREG of a REG specially because the underlying
2142 reg changes its hash value with every value change; we don't
2143 want to have to forget unrelated subregs when one subreg changes. */
2146 if (GET_CODE (SUBREG_REG (x
)) == REG
)
2148 hash
+= (((unsigned) SUBREG
<< 7)
2149 + REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
));
2157 unsigned HOST_WIDE_INT tem
= INTVAL (x
);
2158 hash
+= ((unsigned) CONST_INT
<< 7) + (unsigned) mode
+ tem
;
2163 /* This is like the general case, except that it only counts
2164 the integers representing the constant. */
2165 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
2166 if (GET_MODE (x
) != VOIDmode
)
2167 for (i
= 2; i
< GET_RTX_LENGTH (CONST_DOUBLE
); i
++)
2169 unsigned HOST_WIDE_INT tem
= XWINT (x
, i
);
2173 hash
+= ((unsigned) CONST_DOUBLE_LOW (x
)
2174 + (unsigned) CONST_DOUBLE_HIGH (x
));
2177 /* Assume there is only one rtx object for any given label. */
2180 += ((unsigned) LABEL_REF
<< 7) + (unsigned long) XEXP (x
, 0);
2185 += ((unsigned) SYMBOL_REF
<< 7) + (unsigned long) XSTR (x
, 0);
2189 if (MEM_VOLATILE_P (x
))
2194 if (! RTX_UNCHANGING_P (x
) || FIXED_BASE_PLUS_P (XEXP (x
, 0)))
2196 hash_arg_in_memory
= 1;
2197 if (MEM_IN_STRUCT_P (x
)) hash_arg_in_struct
= 1;
2199 /* Now that we have already found this special case,
2200 might as well speed it up as much as possible. */
2201 hash
+= (unsigned) MEM
;
2212 case UNSPEC_VOLATILE
:
2217 if (MEM_VOLATILE_P (x
))
2228 i
= GET_RTX_LENGTH (code
) - 1;
2229 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
2230 fmt
= GET_RTX_FORMAT (code
);
2235 rtx tem
= XEXP (x
, i
);
2237 /* If we are about to do the last recursive call
2238 needed at this level, change it into iteration.
2239 This function is called enough to be worth it. */
2245 hash
+= canon_hash (tem
, 0);
2247 else if (fmt
[i
] == 'E')
2248 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2249 hash
+= canon_hash (XVECEXP (x
, i
, j
), 0);
2250 else if (fmt
[i
] == 's')
2252 register unsigned char *p
= (unsigned char *) XSTR (x
, i
);
2257 else if (fmt
[i
] == 'i')
2259 register unsigned tem
= XINT (x
, i
);
2262 else if (fmt
[i
] == '0' || fmt
[i
] == 't')
2270 /* Like canon_hash but with no side effects. */
2275 enum machine_mode mode
;
2277 int save_do_not_record
= do_not_record
;
2278 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2279 int save_hash_arg_in_struct
= hash_arg_in_struct
;
2280 unsigned hash
= canon_hash (x
, mode
);
2281 hash_arg_in_memory
= save_hash_arg_in_memory
;
2282 hash_arg_in_struct
= save_hash_arg_in_struct
;
2283 do_not_record
= save_do_not_record
;
2287 /* Return 1 iff X and Y would canonicalize into the same thing,
2288 without actually constructing the canonicalization of either one.
2289 If VALIDATE is nonzero,
2290 we assume X is an expression being processed from the rtl
2291 and Y was found in the hash table. We check register refs
2292 in Y for being marked as valid.
2294 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2295 that is known to be in the register. Ordinarily, we don't allow them
2296 to match, because letting them match would cause unpredictable results
2297 in all the places that search a hash table chain for an equivalent
2298 for a given value. A possible equivalent that has different structure
2299 has its hash code computed from different data. Whether the hash code
2300 is the same as that of the given value is pure luck. */
2303 exp_equiv_p (x
, y
, validate
, equal_values
)
2309 register enum rtx_code code
;
2310 register const char *fmt
;
2312 /* Note: it is incorrect to assume an expression is equivalent to itself
2313 if VALIDATE is nonzero. */
2314 if (x
== y
&& !validate
)
2316 if (x
== 0 || y
== 0)
2319 code
= GET_CODE (x
);
2320 if (code
!= GET_CODE (y
))
2325 /* If X is a constant and Y is a register or vice versa, they may be
2326 equivalent. We only have to validate if Y is a register. */
2327 if (CONSTANT_P (x
) && GET_CODE (y
) == REG
2328 && REGNO_QTY_VALID_P (REGNO (y
))
2329 && GET_MODE (y
) == qty_mode
[REG_QTY (REGNO (y
))]
2330 && rtx_equal_p (x
, qty_const
[REG_QTY (REGNO (y
))])
2331 && (! validate
|| REG_IN_TABLE (REGNO (y
)) == REG_TICK (REGNO (y
))))
2334 if (CONSTANT_P (y
) && code
== REG
2335 && REGNO_QTY_VALID_P (REGNO (x
))
2336 && GET_MODE (x
) == qty_mode
[REG_QTY (REGNO (x
))]
2337 && rtx_equal_p (y
, qty_const
[REG_QTY (REGNO (x
))]))
2343 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2344 if (GET_MODE (x
) != GET_MODE (y
))
2354 return INTVAL (x
) == INTVAL (y
);
2357 return XEXP (x
, 0) == XEXP (y
, 0);
2360 return XSTR (x
, 0) == XSTR (y
, 0);
2364 int regno
= REGNO (y
);
2366 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
2367 : HARD_REGNO_NREGS (regno
, GET_MODE (y
)));
2370 /* If the quantities are not the same, the expressions are not
2371 equivalent. If there are and we are not to validate, they
2372 are equivalent. Otherwise, ensure all regs are up-to-date. */
2374 if (REG_QTY (REGNO (x
)) != REG_QTY (regno
))
2380 for (i
= regno
; i
< endregno
; i
++)
2381 if (REG_IN_TABLE (i
) != REG_TICK (i
))
2387 /* For commutative operations, check both orders. */
2395 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0), validate
, equal_values
)
2396 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2397 validate
, equal_values
))
2398 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2399 validate
, equal_values
)
2400 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2401 validate
, equal_values
)));
2407 /* Compare the elements. If any pair of corresponding elements
2408 fail to match, return 0 for the whole things. */
2410 fmt
= GET_RTX_FORMAT (code
);
2411 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2416 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
), validate
, equal_values
))
2421 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2423 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2424 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2425 validate
, equal_values
))
2430 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2435 if (XINT (x
, i
) != XINT (y
, i
))
2440 if (XWINT (x
, i
) != XWINT (y
, i
))
2456 /* Return 1 iff any subexpression of X matches Y.
2457 Here we do not require that X or Y be valid (for registers referred to)
2458 for being in the hash table. */
2465 register enum rtx_code code
;
2466 register const char *fmt
;
2471 if (x
== 0 || y
== 0)
2474 code
= GET_CODE (x
);
2475 /* If X as a whole has the same code as Y, they may match.
2477 if (code
== GET_CODE (y
))
2479 if (exp_equiv_p (x
, y
, 0, 1))
2483 /* X does not match, so try its subexpressions. */
2485 fmt
= GET_RTX_FORMAT (code
);
2486 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2495 if (refers_to_p (XEXP (x
, i
), y
))
2498 else if (fmt
[i
] == 'E')
2501 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2502 if (refers_to_p (XVECEXP (x
, i
, j
), y
))
2509 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2510 set PBASE, PSTART, and PEND which correspond to the base of the address,
2511 the starting offset, and ending offset respectively.
2513 ADDR is known to be a nonvarying address. */
2515 /* ??? Despite what the comments say, this function is in fact frequently
2516 passed varying addresses. This does not appear to cause any problems. */
2519 set_nonvarying_address_components (addr
, size
, pbase
, pstart
, pend
)
2523 HOST_WIDE_INT
*pstart
, *pend
;
2526 HOST_WIDE_INT start
, end
;
2532 if (flag_pic
&& GET_CODE (base
) == PLUS
2533 && XEXP (base
, 0) == pic_offset_table_rtx
)
2534 base
= XEXP (base
, 1);
2536 /* Registers with nonvarying addresses usually have constant equivalents;
2537 but the frame pointer register is also possible. */
2538 if (GET_CODE (base
) == REG
2540 && REGNO_QTY_VALID_P (REGNO (base
))
2541 && qty_mode
[REG_QTY (REGNO (base
))] == GET_MODE (base
)
2542 && qty_const
[REG_QTY (REGNO (base
))] != 0)
2543 base
= qty_const
[REG_QTY (REGNO (base
))];
2544 else if (GET_CODE (base
) == PLUS
2545 && GET_CODE (XEXP (base
, 1)) == CONST_INT
2546 && GET_CODE (XEXP (base
, 0)) == REG
2548 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 0)))
2549 && (qty_mode
[REG_QTY (REGNO (XEXP (base
, 0)))]
2550 == GET_MODE (XEXP (base
, 0)))
2551 && qty_const
[REG_QTY (REGNO (XEXP (base
, 0)))])
2553 start
= INTVAL (XEXP (base
, 1));
2554 base
= qty_const
[REG_QTY (REGNO (XEXP (base
, 0)))];
2556 /* This can happen as the result of virtual register instantiation,
2557 if the initial offset is too large to be a valid address. */
2558 else if (GET_CODE (base
) == PLUS
2559 && GET_CODE (XEXP (base
, 0)) == REG
2560 && GET_CODE (XEXP (base
, 1)) == REG
2562 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 0)))
2563 && (qty_mode
[REG_QTY (REGNO (XEXP (base
, 0)))]
2564 == GET_MODE (XEXP (base
, 0)))
2565 && qty_const
[REG_QTY (REGNO (XEXP (base
, 0)))]
2566 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 1)))
2567 && (qty_mode
[REG_QTY (REGNO (XEXP (base
, 1)))]
2568 == GET_MODE (XEXP (base
, 1)))
2569 && qty_const
[REG_QTY (REGNO (XEXP (base
, 1)))])
2571 rtx tem
= qty_const
[REG_QTY (REGNO (XEXP (base
, 1)))];
2572 base
= qty_const
[REG_QTY (REGNO (XEXP (base
, 0)))];
2574 /* One of the two values must be a constant. */
2575 if (GET_CODE (base
) != CONST_INT
)
2577 if (GET_CODE (tem
) != CONST_INT
)
2579 start
= INTVAL (tem
);
2583 start
= INTVAL (base
);
2588 /* Handle everything that we can find inside an address that has been
2589 viewed as constant. */
2593 /* If no part of this switch does a "continue", the code outside
2594 will exit this loop. */
2596 switch (GET_CODE (base
))
2599 /* By definition, operand1 of a LO_SUM is the associated constant
2600 address. Use the associated constant address as the base
2602 base
= XEXP (base
, 1);
2606 /* Strip off CONST. */
2607 base
= XEXP (base
, 0);
2611 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
)
2613 start
+= INTVAL (XEXP (base
, 1));
2614 base
= XEXP (base
, 0);
2620 /* Handle the case of an AND which is the negative of a power of
2621 two. This is used to represent unaligned memory operations. */
2622 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
2623 && exact_log2 (- INTVAL (XEXP (base
, 1))) > 0)
2625 set_nonvarying_address_components (XEXP (base
, 0), size
,
2626 pbase
, pstart
, pend
);
2628 /* Assume the worst misalignment. START is affected, but not
2629 END, so compensate but adjusting SIZE. Don't lose any
2630 constant we already had. */
2632 size
= *pend
- *pstart
- INTVAL (XEXP (base
, 1)) - 1;
2633 start
+= *pstart
+ INTVAL (XEXP (base
, 1)) + 1;
2646 if (GET_CODE (base
) == CONST_INT
)
2648 start
+= INTVAL (base
);
2654 /* Set the return values. */
2660 /* Return 1 if X has a value that can vary even between two
2661 executions of the program. 0 means X can be compared reliably
2662 against certain constants or near-constants. */
2665 cse_rtx_varies_p (x
)
2668 /* We need not check for X and the equivalence class being of the same
2669 mode because if X is equivalent to a constant in some mode, it
2670 doesn't vary in any mode. */
2672 if (GET_CODE (x
) == REG
2673 && REGNO_QTY_VALID_P (REGNO (x
))
2674 && GET_MODE (x
) == qty_mode
[REG_QTY (REGNO (x
))]
2675 && qty_const
[REG_QTY (REGNO (x
))] != 0)
2678 if (GET_CODE (x
) == PLUS
2679 && GET_CODE (XEXP (x
, 1)) == CONST_INT
2680 && GET_CODE (XEXP (x
, 0)) == REG
2681 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2682 && (GET_MODE (XEXP (x
, 0))
2683 == qty_mode
[REG_QTY (REGNO (XEXP (x
, 0)))])
2684 && qty_const
[REG_QTY (REGNO (XEXP (x
, 0)))])
2687 /* This can happen as the result of virtual register instantiation, if
2688 the initial constant is too large to be a valid address. This gives
2689 us a three instruction sequence, load large offset into a register,
2690 load fp minus a constant into a register, then a MEM which is the
2691 sum of the two `constant' registers. */
2692 if (GET_CODE (x
) == PLUS
2693 && GET_CODE (XEXP (x
, 0)) == REG
2694 && GET_CODE (XEXP (x
, 1)) == REG
2695 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2696 && (GET_MODE (XEXP (x
, 0))
2697 == qty_mode
[REG_QTY (REGNO (XEXP (x
, 0)))])
2698 && qty_const
[REG_QTY (REGNO (XEXP (x
, 0)))]
2699 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1)))
2700 && (GET_MODE (XEXP (x
, 1))
2701 == qty_mode
[REG_QTY (REGNO (XEXP (x
, 1)))])
2702 && qty_const
[REG_QTY (REGNO (XEXP (x
, 1)))])
2705 return rtx_varies_p (x
);
2708 /* Canonicalize an expression:
2709 replace each register reference inside it
2710 with the "oldest" equivalent register.
2712 If INSN is non-zero and we are replacing a pseudo with a hard register
2713 or vice versa, validate_change is used to ensure that INSN remains valid
2714 after we make our substitution. The calls are made with IN_GROUP non-zero
2715 so apply_change_group must be called upon the outermost return from this
2716 function (unless INSN is zero). The result of apply_change_group can
2717 generally be discarded since the changes we are making are optional. */
2725 register enum rtx_code code
;
2726 register const char *fmt
;
2731 code
= GET_CODE (x
);
2749 /* Never replace a hard reg, because hard regs can appear
2750 in more than one machine mode, and we must preserve the mode
2751 of each occurrence. Also, some hard regs appear in
2752 MEMs that are shared and mustn't be altered. Don't try to
2753 replace any reg that maps to a reg of class NO_REGS. */
2754 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2755 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2758 first
= qty_first_reg
[REG_QTY (REGNO (x
))];
2759 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2760 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2761 : gen_rtx_REG (qty_mode
[REG_QTY (REGNO (x
))], first
));
2768 fmt
= GET_RTX_FORMAT (code
);
2769 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2775 rtx
new = canon_reg (XEXP (x
, i
), insn
);
2778 /* If replacing pseudo with hard reg or vice versa, ensure the
2779 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2780 if (insn
!= 0 && new != 0
2781 && GET_CODE (new) == REG
&& GET_CODE (XEXP (x
, i
)) == REG
2782 && (((REGNO (new) < FIRST_PSEUDO_REGISTER
)
2783 != (REGNO (XEXP (x
, i
)) < FIRST_PSEUDO_REGISTER
))
2784 || (insn_code
= recog_memoized (insn
)) < 0
2785 || insn_n_dups
[insn_code
] > 0))
2786 validate_change (insn
, &XEXP (x
, i
), new, 1);
2790 else if (fmt
[i
] == 'E')
2791 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2792 XVECEXP (x
, i
, j
) = canon_reg (XVECEXP (x
, i
, j
), insn
);
2798 /* LOC is a location within INSN that is an operand address (the contents of
2799 a MEM). Find the best equivalent address to use that is valid for this
2802 On most CISC machines, complicated address modes are costly, and rtx_cost
2803 is a good approximation for that cost. However, most RISC machines have
2804 only a few (usually only one) memory reference formats. If an address is
2805 valid at all, it is often just as cheap as any other address. Hence, for
2806 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2807 costs of various addresses. For two addresses of equal cost, choose the one
2808 with the highest `rtx_cost' value as that has the potential of eliminating
2809 the most insns. For equal costs, we choose the first in the equivalence
2810 class. Note that we ignore the fact that pseudo registers are cheaper
2811 than hard registers here because we would also prefer the pseudo registers.
2815 find_best_addr (insn
, loc
)
2819 struct table_elt
*elt
;
2822 struct table_elt
*p
;
2823 int found_better
= 1;
2825 int save_do_not_record
= do_not_record
;
2826 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2827 int save_hash_arg_in_struct
= hash_arg_in_struct
;
2832 /* Do not try to replace constant addresses or addresses of local and
2833 argument slots. These MEM expressions are made only once and inserted
2834 in many instructions, as well as being used to control symbol table
2835 output. It is not safe to clobber them.
2837 There are some uncommon cases where the address is already in a register
2838 for some reason, but we cannot take advantage of that because we have
2839 no easy way to unshare the MEM. In addition, looking up all stack
2840 addresses is costly. */
2841 if ((GET_CODE (addr
) == PLUS
2842 && GET_CODE (XEXP (addr
, 0)) == REG
2843 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2844 && (regno
= REGNO (XEXP (addr
, 0)),
2845 regno
== FRAME_POINTER_REGNUM
|| regno
== HARD_FRAME_POINTER_REGNUM
2846 || regno
== ARG_POINTER_REGNUM
))
2847 || (GET_CODE (addr
) == REG
2848 && (regno
= REGNO (addr
), regno
== FRAME_POINTER_REGNUM
2849 || regno
== HARD_FRAME_POINTER_REGNUM
2850 || regno
== ARG_POINTER_REGNUM
))
2851 || GET_CODE (addr
) == ADDRESSOF
2852 || CONSTANT_ADDRESS_P (addr
))
2855 /* If this address is not simply a register, try to fold it. This will
2856 sometimes simplify the expression. Many simplifications
2857 will not be valid, but some, usually applying the associative rule, will
2858 be valid and produce better code. */
2859 if (GET_CODE (addr
) != REG
)
2861 rtx folded
= fold_rtx (copy_rtx (addr
), NULL_RTX
);
2865 && (CSE_ADDRESS_COST (folded
) < CSE_ADDRESS_COST (addr
)
2866 || (CSE_ADDRESS_COST (folded
) == CSE_ADDRESS_COST (addr
)
2867 && rtx_cost (folded
, MEM
) > rtx_cost (addr
, MEM
)))
2869 && rtx_cost (folded
, MEM
) < rtx_cost (addr
, MEM
)
2871 && validate_change (insn
, loc
, folded
, 0))
2875 /* If this address is not in the hash table, we can't look for equivalences
2876 of the whole address. Also, ignore if volatile. */
2879 hash
= HASH (addr
, Pmode
);
2880 addr_volatile
= do_not_record
;
2881 do_not_record
= save_do_not_record
;
2882 hash_arg_in_memory
= save_hash_arg_in_memory
;
2883 hash_arg_in_struct
= save_hash_arg_in_struct
;
2888 elt
= lookup (addr
, hash
, Pmode
);
2890 #ifndef ADDRESS_COST
2893 int our_cost
= elt
->cost
;
2895 /* Find the lowest cost below ours that works. */
2896 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
2897 if (elt
->cost
< our_cost
2898 && (GET_CODE (elt
->exp
) == REG
2899 || exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
2900 && validate_change (insn
, loc
,
2901 canon_reg (copy_rtx (elt
->exp
), NULL_RTX
), 0))
2908 /* We need to find the best (under the criteria documented above) entry
2909 in the class that is valid. We use the `flag' field to indicate
2910 choices that were invalid and iterate until we can't find a better
2911 one that hasn't already been tried. */
2913 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2916 while (found_better
)
2918 int best_addr_cost
= CSE_ADDRESS_COST (*loc
);
2919 int best_rtx_cost
= (elt
->cost
+ 1) >> 1;
2920 struct table_elt
*best_elt
= elt
;
2923 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2926 if ((GET_CODE (p
->exp
) == REG
2927 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2928 && (CSE_ADDRESS_COST (p
->exp
) < best_addr_cost
2929 || (CSE_ADDRESS_COST (p
->exp
) == best_addr_cost
2930 && (p
->cost
+ 1) >> 1 > best_rtx_cost
)))
2933 best_addr_cost
= CSE_ADDRESS_COST (p
->exp
);
2934 best_rtx_cost
= (p
->cost
+ 1) >> 1;
2941 if (validate_change (insn
, loc
,
2942 canon_reg (copy_rtx (best_elt
->exp
),
2951 /* If the address is a binary operation with the first operand a register
2952 and the second a constant, do the same as above, but looking for
2953 equivalences of the register. Then try to simplify before checking for
2954 the best address to use. This catches a few cases: First is when we
2955 have REG+const and the register is another REG+const. We can often merge
2956 the constants and eliminate one insn and one register. It may also be
2957 that a machine has a cheap REG+REG+const. Finally, this improves the
2958 code on the Alpha for unaligned byte stores. */
2960 if (flag_expensive_optimizations
2961 && (GET_RTX_CLASS (GET_CODE (*loc
)) == '2'
2962 || GET_RTX_CLASS (GET_CODE (*loc
)) == 'c')
2963 && GET_CODE (XEXP (*loc
, 0)) == REG
2964 && GET_CODE (XEXP (*loc
, 1)) == CONST_INT
)
2966 rtx c
= XEXP (*loc
, 1);
2969 hash
= HASH (XEXP (*loc
, 0), Pmode
);
2970 do_not_record
= save_do_not_record
;
2971 hash_arg_in_memory
= save_hash_arg_in_memory
;
2972 hash_arg_in_struct
= save_hash_arg_in_struct
;
2974 elt
= lookup (XEXP (*loc
, 0), hash
, Pmode
);
2978 /* We need to find the best (under the criteria documented above) entry
2979 in the class that is valid. We use the `flag' field to indicate
2980 choices that were invalid and iterate until we can't find a better
2981 one that hasn't already been tried. */
2983 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2986 while (found_better
)
2988 int best_addr_cost
= CSE_ADDRESS_COST (*loc
);
2989 int best_rtx_cost
= (COST (*loc
) + 1) >> 1;
2990 struct table_elt
*best_elt
= elt
;
2991 rtx best_rtx
= *loc
;
2994 /* This is at worst case an O(n^2) algorithm, so limit our search
2995 to the first 32 elements on the list. This avoids trouble
2996 compiling code with very long basic blocks that can easily
2997 call cse_gen_binary so many times that we run out of memory. */
3000 for (p
= elt
->first_same_value
, count
= 0;
3002 p
= p
->next_same_value
, count
++)
3004 && (GET_CODE (p
->exp
) == REG
3005 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0)))
3007 rtx
new = cse_gen_binary (GET_CODE (*loc
), Pmode
, p
->exp
, c
);
3009 if ((CSE_ADDRESS_COST (new) < best_addr_cost
3010 || (CSE_ADDRESS_COST (new) == best_addr_cost
3011 && (COST (new) + 1) >> 1 > best_rtx_cost
)))
3014 best_addr_cost
= CSE_ADDRESS_COST (new);
3015 best_rtx_cost
= (COST (new) + 1) >> 1;
3023 if (validate_change (insn
, loc
,
3024 canon_reg (copy_rtx (best_rtx
),
3035 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3036 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3037 what values are being compared.
3039 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3040 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3041 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3042 compared to produce cc0.
3044 The return value is the comparison operator and is either the code of
3045 A or the code corresponding to the inverse of the comparison. */
3047 static enum rtx_code
3048 find_comparison_args (code
, parg1
, parg2
, pmode1
, pmode2
)
3051 enum machine_mode
*pmode1
, *pmode2
;
3055 arg1
= *parg1
, arg2
= *parg2
;
3057 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3059 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
3061 /* Set non-zero when we find something of interest. */
3063 int reverse_code
= 0;
3064 struct table_elt
*p
= 0;
3066 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3067 On machines with CC0, this is the only case that can occur, since
3068 fold_rtx will return the COMPARE or item being compared with zero
3071 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
3074 /* If ARG1 is a comparison operator and CODE is testing for
3075 STORE_FLAG_VALUE, get the inner arguments. */
3077 else if (GET_RTX_CLASS (GET_CODE (arg1
)) == '<')
3080 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
3081 && code
== LT
&& STORE_FLAG_VALUE
== -1)
3082 #ifdef FLOAT_STORE_FLAG_VALUE
3083 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
3084 && FLOAT_STORE_FLAG_VALUE
< 0)
3089 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
3090 && code
== GE
&& STORE_FLAG_VALUE
== -1)
3091 #ifdef FLOAT_STORE_FLAG_VALUE
3092 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
3093 && FLOAT_STORE_FLAG_VALUE
< 0)
3096 x
= arg1
, reverse_code
= 1;
3099 /* ??? We could also check for
3101 (ne (and (eq (...) (const_int 1))) (const_int 0))
3103 and related forms, but let's wait until we see them occurring. */
3106 /* Look up ARG1 in the hash table and see if it has an equivalence
3107 that lets us see what is being compared. */
3108 p
= lookup (arg1
, safe_hash (arg1
, GET_MODE (arg1
)) % NBUCKETS
,
3110 if (p
) p
= p
->first_same_value
;
3112 for (; p
; p
= p
->next_same_value
)
3114 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
3116 /* If the entry isn't valid, skip it. */
3117 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
3120 if (GET_CODE (p
->exp
) == COMPARE
3121 /* Another possibility is that this machine has a compare insn
3122 that includes the comparison code. In that case, ARG1 would
3123 be equivalent to a comparison operation that would set ARG1 to
3124 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3125 ORIG_CODE is the actual comparison being done; if it is an EQ,
3126 we must reverse ORIG_CODE. On machine with a negative value
3127 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3130 && GET_MODE_CLASS (inner_mode
) == MODE_INT
3131 && (GET_MODE_BITSIZE (inner_mode
)
3132 <= HOST_BITS_PER_WIDE_INT
)
3133 && (STORE_FLAG_VALUE
3134 & ((HOST_WIDE_INT
) 1
3135 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
3136 #ifdef FLOAT_STORE_FLAG_VALUE
3138 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
3139 && FLOAT_STORE_FLAG_VALUE
< 0)
3142 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<'))
3147 else if ((code
== EQ
3149 && GET_MODE_CLASS (inner_mode
) == MODE_INT
3150 && (GET_MODE_BITSIZE (inner_mode
)
3151 <= HOST_BITS_PER_WIDE_INT
)
3152 && (STORE_FLAG_VALUE
3153 & ((HOST_WIDE_INT
) 1
3154 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
3155 #ifdef FLOAT_STORE_FLAG_VALUE
3157 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
3158 && FLOAT_STORE_FLAG_VALUE
< 0)
3161 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<')
3168 /* If this is fp + constant, the equivalent is a better operand since
3169 it may let us predict the value of the comparison. */
3170 else if (NONZERO_BASE_PLUS_P (p
->exp
))
3177 /* If we didn't find a useful equivalence for ARG1, we are done.
3178 Otherwise, set up for the next iteration. */
3182 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
3183 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
3184 code
= GET_CODE (x
);
3187 code
= reverse_condition (code
);
3190 /* Return our results. Return the modes from before fold_rtx
3191 because fold_rtx might produce const_int, and then it's too late. */
3192 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
3193 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
3198 /* Try to simplify a unary operation CODE whose output mode is to be
3199 MODE with input operand OP whose mode was originally OP_MODE.
3200 Return zero if no simplification can be made. */
3203 simplify_unary_operation (code
, mode
, op
, op_mode
)
3205 enum machine_mode mode
;
3207 enum machine_mode op_mode
;
3209 register int width
= GET_MODE_BITSIZE (mode
);
3211 /* The order of these tests is critical so that, for example, we don't
3212 check the wrong mode (input vs. output) for a conversion operation,
3213 such as FIX. At some point, this should be simplified. */
3215 #if !defined(REAL_IS_NOT_DOUBLE) || defined(REAL_ARITHMETIC)
3217 if (code
== FLOAT
&& GET_MODE (op
) == VOIDmode
3218 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
3220 HOST_WIDE_INT hv
, lv
;
3223 if (GET_CODE (op
) == CONST_INT
)
3224 lv
= INTVAL (op
), hv
= INTVAL (op
) < 0 ? -1 : 0;
3226 lv
= CONST_DOUBLE_LOW (op
), hv
= CONST_DOUBLE_HIGH (op
);
3228 #ifdef REAL_ARITHMETIC
3229 REAL_VALUE_FROM_INT (d
, lv
, hv
, mode
);
3233 d
= (double) (~ hv
);
3234 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
3235 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
3236 d
+= (double) (unsigned HOST_WIDE_INT
) (~ lv
);
3242 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
3243 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
3244 d
+= (double) (unsigned HOST_WIDE_INT
) lv
;
3246 #endif /* REAL_ARITHMETIC */
3247 d
= real_value_truncate (mode
, d
);
3248 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
3250 else if (code
== UNSIGNED_FLOAT
&& GET_MODE (op
) == VOIDmode
3251 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
3253 HOST_WIDE_INT hv
, lv
;
3256 if (GET_CODE (op
) == CONST_INT
)
3257 lv
= INTVAL (op
), hv
= INTVAL (op
) < 0 ? -1 : 0;
3259 lv
= CONST_DOUBLE_LOW (op
), hv
= CONST_DOUBLE_HIGH (op
);
3261 if (op_mode
== VOIDmode
)
3263 /* We don't know how to interpret negative-looking numbers in
3264 this case, so don't try to fold those. */
3268 else if (GET_MODE_BITSIZE (op_mode
) >= HOST_BITS_PER_WIDE_INT
* 2)
3271 hv
= 0, lv
&= GET_MODE_MASK (op_mode
);
3273 #ifdef REAL_ARITHMETIC
3274 REAL_VALUE_FROM_UNSIGNED_INT (d
, lv
, hv
, mode
);
3277 d
= (double) (unsigned HOST_WIDE_INT
) hv
;
3278 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
3279 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
3280 d
+= (double) (unsigned HOST_WIDE_INT
) lv
;
3281 #endif /* REAL_ARITHMETIC */
3282 d
= real_value_truncate (mode
, d
);
3283 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
3287 if (GET_CODE (op
) == CONST_INT
3288 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
3290 register HOST_WIDE_INT arg0
= INTVAL (op
);
3291 register HOST_WIDE_INT val
;
3304 val
= (arg0
>= 0 ? arg0
: - arg0
);
3308 /* Don't use ffs here. Instead, get low order bit and then its
3309 number. If arg0 is zero, this will return 0, as desired. */
3310 arg0
&= GET_MODE_MASK (mode
);
3311 val
= exact_log2 (arg0
& (- arg0
)) + 1;
3319 if (op_mode
== VOIDmode
)
3321 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
3323 /* If we were really extending the mode,
3324 we would have to distinguish between zero-extension
3325 and sign-extension. */
3326 if (width
!= GET_MODE_BITSIZE (op_mode
))
3330 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
3331 val
= arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
3337 if (op_mode
== VOIDmode
)
3339 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
3341 /* If we were really extending the mode,
3342 we would have to distinguish between zero-extension
3343 and sign-extension. */
3344 if (width
!= GET_MODE_BITSIZE (op_mode
))
3348 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
3351 = arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
3353 & ((HOST_WIDE_INT
) 1 << (GET_MODE_BITSIZE (op_mode
) - 1)))
3354 val
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3367 val
= trunc_int_for_mode (val
, mode
);
3369 return GEN_INT (val
);
3372 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3373 for a DImode operation on a CONST_INT. */
3374 else if (GET_MODE (op
) == VOIDmode
&& width
<= HOST_BITS_PER_INT
* 2
3375 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
3377 HOST_WIDE_INT l1
, h1
, lv
, hv
;
3379 if (GET_CODE (op
) == CONST_DOUBLE
)
3380 l1
= CONST_DOUBLE_LOW (op
), h1
= CONST_DOUBLE_HIGH (op
);
3382 l1
= INTVAL (op
), h1
= l1
< 0 ? -1 : 0;
3392 neg_double (l1
, h1
, &lv
, &hv
);
3397 neg_double (l1
, h1
, &lv
, &hv
);
3405 lv
= HOST_BITS_PER_WIDE_INT
+ exact_log2 (h1
& (-h1
)) + 1;
3407 lv
= exact_log2 (l1
& (-l1
)) + 1;
3411 /* This is just a change-of-mode, so do nothing. */
3416 if (op_mode
== VOIDmode
3417 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3421 lv
= l1
& GET_MODE_MASK (op_mode
);
3425 if (op_mode
== VOIDmode
3426 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3430 lv
= l1
& GET_MODE_MASK (op_mode
);
3431 if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
3432 && (lv
& ((HOST_WIDE_INT
) 1
3433 << (GET_MODE_BITSIZE (op_mode
) - 1))) != 0)
3434 lv
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3436 hv
= (lv
< 0) ? ~ (HOST_WIDE_INT
) 0 : 0;
3447 return immed_double_const (lv
, hv
, mode
);
3450 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3451 else if (GET_CODE (op
) == CONST_DOUBLE
3452 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3458 if (setjmp (handler
))
3459 /* There used to be a warning here, but that is inadvisable.
3460 People may want to cause traps, and the natural way
3461 to do it should not get a warning. */
3464 set_float_handler (handler
);
3466 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3471 d
= REAL_VALUE_NEGATE (d
);
3475 if (REAL_VALUE_NEGATIVE (d
))
3476 d
= REAL_VALUE_NEGATE (d
);
3479 case FLOAT_TRUNCATE
:
3480 d
= real_value_truncate (mode
, d
);
3484 /* All this does is change the mode. */
3488 d
= REAL_VALUE_RNDZINT (d
);
3492 d
= REAL_VALUE_UNSIGNED_RNDZINT (d
);
3502 x
= CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
3503 set_float_handler (NULL_PTR
);
3507 else if (GET_CODE (op
) == CONST_DOUBLE
3508 && GET_MODE_CLASS (GET_MODE (op
)) == MODE_FLOAT
3509 && GET_MODE_CLASS (mode
) == MODE_INT
3510 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
3516 if (setjmp (handler
))
3519 set_float_handler (handler
);
3521 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3526 val
= REAL_VALUE_FIX (d
);
3530 val
= REAL_VALUE_UNSIGNED_FIX (d
);
3537 set_float_handler (NULL_PTR
);
3539 val
= trunc_int_for_mode (val
, mode
);
3541 return GEN_INT (val
);
3544 /* This was formerly used only for non-IEEE float.
3545 eggert@twinsun.com says it is safe for IEEE also. */
3548 /* There are some simplifications we can do even if the operands
3554 /* (not (not X)) == X, similarly for NEG. */
3555 if (GET_CODE (op
) == code
)
3556 return XEXP (op
, 0);
3560 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3561 becomes just the MINUS if its mode is MODE. This allows
3562 folding switch statements on machines using casesi (such as
3564 if (GET_CODE (op
) == TRUNCATE
3565 && GET_MODE (XEXP (op
, 0)) == mode
3566 && GET_CODE (XEXP (op
, 0)) == MINUS
3567 && GET_CODE (XEXP (XEXP (op
, 0), 0)) == LABEL_REF
3568 && GET_CODE (XEXP (XEXP (op
, 0), 1)) == LABEL_REF
)
3569 return XEXP (op
, 0);
3571 #ifdef POINTERS_EXTEND_UNSIGNED
3572 if (! POINTERS_EXTEND_UNSIGNED
3573 && mode
== Pmode
&& GET_MODE (op
) == ptr_mode
3575 return convert_memory_address (Pmode
, op
);
3579 #ifdef POINTERS_EXTEND_UNSIGNED
3581 if (POINTERS_EXTEND_UNSIGNED
3582 && mode
== Pmode
&& GET_MODE (op
) == ptr_mode
3584 return convert_memory_address (Pmode
, op
);
3596 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3597 and OP1. Return 0 if no simplification is possible.
3599 Don't use this for relational operations such as EQ or LT.
3600 Use simplify_relational_operation instead. */
3603 simplify_binary_operation (code
, mode
, op0
, op1
)
3605 enum machine_mode mode
;
3608 register HOST_WIDE_INT arg0
, arg1
, arg0s
, arg1s
;
3610 int width
= GET_MODE_BITSIZE (mode
);
3613 /* Relational operations don't work here. We must know the mode
3614 of the operands in order to do the comparison correctly.
3615 Assuming a full word can give incorrect results.
3616 Consider comparing 128 with -128 in QImode. */
3618 if (GET_RTX_CLASS (code
) == '<')
3621 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3622 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
3623 && GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
3624 && mode
== GET_MODE (op0
) && mode
== GET_MODE (op1
))
3626 REAL_VALUE_TYPE f0
, f1
, value
;
3629 if (setjmp (handler
))
3632 set_float_handler (handler
);
3634 REAL_VALUE_FROM_CONST_DOUBLE (f0
, op0
);
3635 REAL_VALUE_FROM_CONST_DOUBLE (f1
, op1
);
3636 f0
= real_value_truncate (mode
, f0
);
3637 f1
= real_value_truncate (mode
, f1
);
3639 #ifdef REAL_ARITHMETIC
3640 #ifndef REAL_INFINITY
3641 if (code
== DIV
&& REAL_VALUES_EQUAL (f1
, dconst0
))
3644 REAL_ARITHMETIC (value
, rtx_to_tree_code (code
), f0
, f1
);
3658 #ifndef REAL_INFINITY
3665 value
= MIN (f0
, f1
);
3668 value
= MAX (f0
, f1
);
3675 value
= real_value_truncate (mode
, value
);
3676 set_float_handler (NULL_PTR
);
3677 return CONST_DOUBLE_FROM_REAL_VALUE (value
, mode
);
3679 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3681 /* We can fold some multi-word operations. */
3682 if (GET_MODE_CLASS (mode
) == MODE_INT
3683 && width
== HOST_BITS_PER_WIDE_INT
* 2
3684 && (GET_CODE (op0
) == CONST_DOUBLE
|| GET_CODE (op0
) == CONST_INT
)
3685 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
3687 HOST_WIDE_INT l1
, l2
, h1
, h2
, lv
, hv
;
3689 if (GET_CODE (op0
) == CONST_DOUBLE
)
3690 l1
= CONST_DOUBLE_LOW (op0
), h1
= CONST_DOUBLE_HIGH (op0
);
3692 l1
= INTVAL (op0
), h1
= l1
< 0 ? -1 : 0;
3694 if (GET_CODE (op1
) == CONST_DOUBLE
)
3695 l2
= CONST_DOUBLE_LOW (op1
), h2
= CONST_DOUBLE_HIGH (op1
);
3697 l2
= INTVAL (op1
), h2
= l2
< 0 ? -1 : 0;
3702 /* A - B == A + (-B). */
3703 neg_double (l2
, h2
, &lv
, &hv
);
3706 /* .. fall through ... */
3709 add_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3713 mul_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3716 case DIV
: case MOD
: case UDIV
: case UMOD
:
3717 /* We'd need to include tree.h to do this and it doesn't seem worth
3722 lv
= l1
& l2
, hv
= h1
& h2
;
3726 lv
= l1
| l2
, hv
= h1
| h2
;
3730 lv
= l1
^ l2
, hv
= h1
^ h2
;
3736 && ((unsigned HOST_WIDE_INT
) l1
3737 < (unsigned HOST_WIDE_INT
) l2
)))
3746 && ((unsigned HOST_WIDE_INT
) l1
3747 > (unsigned HOST_WIDE_INT
) l2
)))
3754 if ((unsigned HOST_WIDE_INT
) h1
< (unsigned HOST_WIDE_INT
) h2
3756 && ((unsigned HOST_WIDE_INT
) l1
3757 < (unsigned HOST_WIDE_INT
) l2
)))
3764 if ((unsigned HOST_WIDE_INT
) h1
> (unsigned HOST_WIDE_INT
) h2
3766 && ((unsigned HOST_WIDE_INT
) l1
3767 > (unsigned HOST_WIDE_INT
) l2
)))
3773 case LSHIFTRT
: case ASHIFTRT
:
3775 case ROTATE
: case ROTATERT
:
3776 #ifdef SHIFT_COUNT_TRUNCATED
3777 if (SHIFT_COUNT_TRUNCATED
)
3778 l2
&= (GET_MODE_BITSIZE (mode
) - 1), h2
= 0;
3781 if (h2
!= 0 || l2
< 0 || l2
>= GET_MODE_BITSIZE (mode
))
3784 if (code
== LSHIFTRT
|| code
== ASHIFTRT
)
3785 rshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
,
3787 else if (code
== ASHIFT
)
3788 lshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
, 1);
3789 else if (code
== ROTATE
)
3790 lrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3791 else /* code == ROTATERT */
3792 rrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3799 return immed_double_const (lv
, hv
, mode
);
3802 if (GET_CODE (op0
) != CONST_INT
|| GET_CODE (op1
) != CONST_INT
3803 || width
> HOST_BITS_PER_WIDE_INT
|| width
== 0)
3805 /* Even if we can't compute a constant result,
3806 there are some cases worth simplifying. */
3811 /* In IEEE floating point, x+0 is not the same as x. Similarly
3812 for the other optimizations below. */
3813 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3814 && FLOAT_MODE_P (mode
) && ! flag_fast_math
)
3817 if (op1
== CONST0_RTX (mode
))
3820 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3821 if (GET_CODE (op0
) == NEG
)
3822 return cse_gen_binary (MINUS
, mode
, op1
, XEXP (op0
, 0));
3823 else if (GET_CODE (op1
) == NEG
)
3824 return cse_gen_binary (MINUS
, mode
, op0
, XEXP (op1
, 0));
3826 /* Handle both-operands-constant cases. We can only add
3827 CONST_INTs to constants since the sum of relocatable symbols
3828 can't be handled by most assemblers. Don't add CONST_INT
3829 to CONST_INT since overflow won't be computed properly if wider
3830 than HOST_BITS_PER_WIDE_INT. */
3832 if (CONSTANT_P (op0
) && GET_MODE (op0
) != VOIDmode
3833 && GET_CODE (op1
) == CONST_INT
)
3834 return plus_constant (op0
, INTVAL (op1
));
3835 else if (CONSTANT_P (op1
) && GET_MODE (op1
) != VOIDmode
3836 && GET_CODE (op0
) == CONST_INT
)
3837 return plus_constant (op1
, INTVAL (op0
));
3839 /* See if this is something like X * C - X or vice versa or
3840 if the multiplication is written as a shift. If so, we can
3841 distribute and make a new multiply, shift, or maybe just
3842 have X (if C is 2 in the example above). But don't make
3843 real multiply if we didn't have one before. */
3845 if (! FLOAT_MODE_P (mode
))
3847 HOST_WIDE_INT coeff0
= 1, coeff1
= 1;
3848 rtx lhs
= op0
, rhs
= op1
;
3851 if (GET_CODE (lhs
) == NEG
)
3852 coeff0
= -1, lhs
= XEXP (lhs
, 0);
3853 else if (GET_CODE (lhs
) == MULT
3854 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
)
3856 coeff0
= INTVAL (XEXP (lhs
, 1)), lhs
= XEXP (lhs
, 0);
3859 else if (GET_CODE (lhs
) == ASHIFT
3860 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
3861 && INTVAL (XEXP (lhs
, 1)) >= 0
3862 && INTVAL (XEXP (lhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3864 coeff0
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (lhs
, 1));
3865 lhs
= XEXP (lhs
, 0);
3868 if (GET_CODE (rhs
) == NEG
)
3869 coeff1
= -1, rhs
= XEXP (rhs
, 0);
3870 else if (GET_CODE (rhs
) == MULT
3871 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
)
3873 coeff1
= INTVAL (XEXP (rhs
, 1)), rhs
= XEXP (rhs
, 0);
3876 else if (GET_CODE (rhs
) == ASHIFT
3877 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
3878 && INTVAL (XEXP (rhs
, 1)) >= 0
3879 && INTVAL (XEXP (rhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3881 coeff1
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (rhs
, 1));
3882 rhs
= XEXP (rhs
, 0);
3885 if (rtx_equal_p (lhs
, rhs
))
3887 tem
= cse_gen_binary (MULT
, mode
, lhs
,
3888 GEN_INT (coeff0
+ coeff1
));
3889 return (GET_CODE (tem
) == MULT
&& ! had_mult
) ? 0 : tem
;
3893 /* If one of the operands is a PLUS or a MINUS, see if we can
3894 simplify this by the associative law.
3895 Don't use the associative law for floating point.
3896 The inaccuracy makes it nonassociative,
3897 and subtle programs can break if operations are associated. */
3899 if (INTEGRAL_MODE_P (mode
)
3900 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3901 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3902 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3908 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3909 using cc0, in which case we want to leave it as a COMPARE
3910 so we can distinguish it from a register-register-copy.
3912 In IEEE floating point, x-0 is not the same as x. */
3914 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3915 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3916 && op1
== CONST0_RTX (mode
))
3919 /* Do nothing here. */
3924 /* None of these optimizations can be done for IEEE
3926 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3927 && FLOAT_MODE_P (mode
) && ! flag_fast_math
)
3930 /* We can't assume x-x is 0 even with non-IEEE floating point,
3931 but since it is zero except in very strange circumstances, we
3932 will treat it as zero with -ffast-math. */
3933 if (rtx_equal_p (op0
, op1
)
3934 && ! side_effects_p (op0
)
3935 && (! FLOAT_MODE_P (mode
) || flag_fast_math
))
3936 return CONST0_RTX (mode
);
3938 /* Change subtraction from zero into negation. */
3939 if (op0
== CONST0_RTX (mode
))
3940 return gen_rtx_NEG (mode
, op1
);
3942 /* (-1 - a) is ~a. */
3943 if (op0
== constm1_rtx
)
3944 return gen_rtx_NOT (mode
, op1
);
3946 /* Subtracting 0 has no effect. */
3947 if (op1
== CONST0_RTX (mode
))
3950 /* See if this is something like X * C - X or vice versa or
3951 if the multiplication is written as a shift. If so, we can
3952 distribute and make a new multiply, shift, or maybe just
3953 have X (if C is 2 in the example above). But don't make
3954 real multiply if we didn't have one before. */
3956 if (! FLOAT_MODE_P (mode
))
3958 HOST_WIDE_INT coeff0
= 1, coeff1
= 1;
3959 rtx lhs
= op0
, rhs
= op1
;
3962 if (GET_CODE (lhs
) == NEG
)
3963 coeff0
= -1, lhs
= XEXP (lhs
, 0);
3964 else if (GET_CODE (lhs
) == MULT
3965 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
)
3967 coeff0
= INTVAL (XEXP (lhs
, 1)), lhs
= XEXP (lhs
, 0);
3970 else if (GET_CODE (lhs
) == ASHIFT
3971 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
3972 && INTVAL (XEXP (lhs
, 1)) >= 0
3973 && INTVAL (XEXP (lhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3975 coeff0
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (lhs
, 1));
3976 lhs
= XEXP (lhs
, 0);
3979 if (GET_CODE (rhs
) == NEG
)
3980 coeff1
= - 1, rhs
= XEXP (rhs
, 0);
3981 else if (GET_CODE (rhs
) == MULT
3982 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
)
3984 coeff1
= INTVAL (XEXP (rhs
, 1)), rhs
= XEXP (rhs
, 0);
3987 else if (GET_CODE (rhs
) == ASHIFT
3988 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
3989 && INTVAL (XEXP (rhs
, 1)) >= 0
3990 && INTVAL (XEXP (rhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3992 coeff1
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (rhs
, 1));
3993 rhs
= XEXP (rhs
, 0);
3996 if (rtx_equal_p (lhs
, rhs
))
3998 tem
= cse_gen_binary (MULT
, mode
, lhs
,
3999 GEN_INT (coeff0
- coeff1
));
4000 return (GET_CODE (tem
) == MULT
&& ! had_mult
) ? 0 : tem
;
4004 /* (a - (-b)) -> (a + b). */
4005 if (GET_CODE (op1
) == NEG
)
4006 return cse_gen_binary (PLUS
, mode
, op0
, XEXP (op1
, 0));
4008 /* If one of the operands is a PLUS or a MINUS, see if we can
4009 simplify this by the associative law.
4010 Don't use the associative law for floating point.
4011 The inaccuracy makes it nonassociative,
4012 and subtle programs can break if operations are associated. */
4014 if (INTEGRAL_MODE_P (mode
)
4015 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
4016 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
4017 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
4020 /* Don't let a relocatable value get a negative coeff. */
4021 if (GET_CODE (op1
) == CONST_INT
&& GET_MODE (op0
) != VOIDmode
)
4022 return plus_constant (op0
, - INTVAL (op1
));
4024 /* (x - (x & y)) -> (x & ~y) */
4025 if (GET_CODE (op1
) == AND
)
4027 if (rtx_equal_p (op0
, XEXP (op1
, 0)))
4028 return cse_gen_binary (AND
, mode
, op0
, gen_rtx_NOT (mode
, XEXP (op1
, 1)));
4029 if (rtx_equal_p (op0
, XEXP (op1
, 1)))
4030 return cse_gen_binary (AND
, mode
, op0
, gen_rtx_NOT (mode
, XEXP (op1
, 0)));
4035 if (op1
== constm1_rtx
)
4037 tem
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
4039 return tem
? tem
: gen_rtx_NEG (mode
, op0
);
4042 /* In IEEE floating point, x*0 is not always 0. */
4043 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
4044 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
4045 && op1
== CONST0_RTX (mode
)
4046 && ! side_effects_p (op0
))
4049 /* In IEEE floating point, x*1 is not equivalent to x for nans.
4050 However, ANSI says we can drop signals,
4051 so we can do this anyway. */
4052 if (op1
== CONST1_RTX (mode
))
4055 /* Convert multiply by constant power of two into shift unless
4056 we are still generating RTL. This test is a kludge. */
4057 if (GET_CODE (op1
) == CONST_INT
4058 && (val
= exact_log2 (INTVAL (op1
))) >= 0
4059 /* If the mode is larger than the host word size, and the
4060 uppermost bit is set, then this isn't a power of two due
4061 to implicit sign extension. */
4062 && (width
<= HOST_BITS_PER_WIDE_INT
4063 || val
!= HOST_BITS_PER_WIDE_INT
- 1)
4064 && ! rtx_equal_function_value_matters
)
4065 return gen_rtx_ASHIFT (mode
, op0
, GEN_INT (val
));
4067 if (GET_CODE (op1
) == CONST_DOUBLE
4068 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
)
4072 int op1is2
, op1ism1
;
4074 if (setjmp (handler
))
4077 set_float_handler (handler
);
4078 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
4079 op1is2
= REAL_VALUES_EQUAL (d
, dconst2
);
4080 op1ism1
= REAL_VALUES_EQUAL (d
, dconstm1
);
4081 set_float_handler (NULL_PTR
);
4083 /* x*2 is x+x and x*(-1) is -x */
4084 if (op1is2
&& GET_MODE (op0
) == mode
)
4085 return gen_rtx_PLUS (mode
, op0
, copy_rtx (op0
));
4087 else if (op1ism1
&& GET_MODE (op0
) == mode
)
4088 return gen_rtx_NEG (mode
, op0
);
4093 if (op1
== const0_rtx
)
4095 if (GET_CODE (op1
) == CONST_INT
4096 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
4098 if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4100 /* A | (~A) -> -1 */
4101 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
4102 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
4103 && ! side_effects_p (op0
)
4104 && GET_MODE_CLASS (mode
) != MODE_CC
)
4109 if (op1
== const0_rtx
)
4111 if (GET_CODE (op1
) == CONST_INT
4112 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
4113 return gen_rtx_NOT (mode
, op0
);
4114 if (op0
== op1
&& ! side_effects_p (op0
)
4115 && GET_MODE_CLASS (mode
) != MODE_CC
)
4120 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
4122 if (GET_CODE (op1
) == CONST_INT
4123 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
4125 if (op0
== op1
&& ! side_effects_p (op0
)
4126 && GET_MODE_CLASS (mode
) != MODE_CC
)
4129 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
4130 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
4131 && ! side_effects_p (op0
)
4132 && GET_MODE_CLASS (mode
) != MODE_CC
)
4137 /* Convert divide by power of two into shift (divide by 1 handled
4139 if (GET_CODE (op1
) == CONST_INT
4140 && (arg1
= exact_log2 (INTVAL (op1
))) > 0)
4141 return gen_rtx_LSHIFTRT (mode
, op0
, GEN_INT (arg1
));
4143 /* ... fall through ... */
4146 if (op1
== CONST1_RTX (mode
))
4149 /* In IEEE floating point, 0/x is not always 0. */
4150 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
4151 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
4152 && op0
== CONST0_RTX (mode
)
4153 && ! side_effects_p (op1
))
4156 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4157 /* Change division by a constant into multiplication. Only do
4158 this with -ffast-math until an expert says it is safe in
4160 else if (GET_CODE (op1
) == CONST_DOUBLE
4161 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
4162 && op1
!= CONST0_RTX (mode
)
4166 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
4168 if (! REAL_VALUES_EQUAL (d
, dconst0
))
4170 #if defined (REAL_ARITHMETIC)
4171 REAL_ARITHMETIC (d
, rtx_to_tree_code (DIV
), dconst1
, d
);
4172 return gen_rtx_MULT (mode
, op0
,
4173 CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
));
4175 return gen_rtx_MULT (mode
, op0
,
4176 CONST_DOUBLE_FROM_REAL_VALUE (1./d
, mode
));
4184 /* Handle modulus by power of two (mod with 1 handled below). */
4185 if (GET_CODE (op1
) == CONST_INT
4186 && exact_log2 (INTVAL (op1
)) > 0)
4187 return gen_rtx_AND (mode
, op0
, GEN_INT (INTVAL (op1
) - 1));
4189 /* ... fall through ... */
4192 if ((op0
== const0_rtx
|| op1
== const1_rtx
)
4193 && ! side_effects_p (op0
) && ! side_effects_p (op1
))
4199 /* Rotating ~0 always results in ~0. */
4200 if (GET_CODE (op0
) == CONST_INT
&& width
<= HOST_BITS_PER_WIDE_INT
4201 && (unsigned HOST_WIDE_INT
) INTVAL (op0
) == GET_MODE_MASK (mode
)
4202 && ! side_effects_p (op1
))
4205 /* ... fall through ... */
4210 if (op1
== const0_rtx
)
4212 if (op0
== const0_rtx
&& ! side_effects_p (op1
))
4217 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
4218 && INTVAL (op1
) == (HOST_WIDE_INT
) 1 << (width
-1)
4219 && ! side_effects_p (op0
))
4221 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4226 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
4227 && ((unsigned HOST_WIDE_INT
) INTVAL (op1
)
4228 == (unsigned HOST_WIDE_INT
) GET_MODE_MASK (mode
) >> 1)
4229 && ! side_effects_p (op0
))
4231 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4236 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
4238 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4243 if (op1
== constm1_rtx
&& ! side_effects_p (op0
))
4245 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4256 /* Get the integer argument values in two forms:
4257 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4259 arg0
= INTVAL (op0
);
4260 arg1
= INTVAL (op1
);
4262 if (width
< HOST_BITS_PER_WIDE_INT
)
4264 arg0
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4265 arg1
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4268 if (arg0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4269 arg0s
|= ((HOST_WIDE_INT
) (-1) << width
);
4272 if (arg1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4273 arg1s
|= ((HOST_WIDE_INT
) (-1) << width
);
4281 /* Compute the value of the arithmetic. */
4286 val
= arg0s
+ arg1s
;
4290 val
= arg0s
- arg1s
;
4294 val
= arg0s
* arg1s
;
4300 val
= arg0s
/ arg1s
;
4306 val
= arg0s
% arg1s
;
4312 val
= (unsigned HOST_WIDE_INT
) arg0
/ arg1
;
4318 val
= (unsigned HOST_WIDE_INT
) arg0
% arg1
;
4334 /* If shift count is undefined, don't fold it; let the machine do
4335 what it wants. But truncate it if the machine will do that. */
4339 #ifdef SHIFT_COUNT_TRUNCATED
4340 if (SHIFT_COUNT_TRUNCATED
)
4344 val
= ((unsigned HOST_WIDE_INT
) arg0
) >> arg1
;
4351 #ifdef SHIFT_COUNT_TRUNCATED
4352 if (SHIFT_COUNT_TRUNCATED
)
4356 val
= ((unsigned HOST_WIDE_INT
) arg0
) << arg1
;
4363 #ifdef SHIFT_COUNT_TRUNCATED
4364 if (SHIFT_COUNT_TRUNCATED
)
4368 val
= arg0s
>> arg1
;
4370 /* Bootstrap compiler may not have sign extended the right shift.
4371 Manually extend the sign to insure bootstrap cc matches gcc. */
4372 if (arg0s
< 0 && arg1
> 0)
4373 val
|= ((HOST_WIDE_INT
) -1) << (HOST_BITS_PER_WIDE_INT
- arg1
);
4382 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << (width
- arg1
))
4383 | (((unsigned HOST_WIDE_INT
) arg0
) >> arg1
));
4391 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << arg1
)
4392 | (((unsigned HOST_WIDE_INT
) arg0
) >> (width
- arg1
)));
4396 /* Do nothing here. */
4400 val
= arg0s
<= arg1s
? arg0s
: arg1s
;
4404 val
= ((unsigned HOST_WIDE_INT
) arg0
4405 <= (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
4409 val
= arg0s
> arg1s
? arg0s
: arg1s
;
4413 val
= ((unsigned HOST_WIDE_INT
) arg0
4414 > (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
4421 val
= trunc_int_for_mode (val
, mode
);
4423 return GEN_INT (val
);
4426 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
4429 Rather than test for specific case, we do this by a brute-force method
4430 and do all possible simplifications until no more changes occur. Then
4431 we rebuild the operation. */
4434 simplify_plus_minus (code
, mode
, op0
, op1
)
4436 enum machine_mode mode
;
4442 int n_ops
= 2, input_ops
= 2, input_consts
= 0, n_consts
= 0;
4443 int first
= 1, negate
= 0, changed
;
4446 bzero ((char *) ops
, sizeof ops
);
4448 /* Set up the two operands and then expand them until nothing has been
4449 changed. If we run out of room in our array, give up; this should
4450 almost never happen. */
4452 ops
[0] = op0
, ops
[1] = op1
, negs
[0] = 0, negs
[1] = (code
== MINUS
);
4459 for (i
= 0; i
< n_ops
; i
++)
4460 switch (GET_CODE (ops
[i
]))
4467 ops
[n_ops
] = XEXP (ops
[i
], 1);
4468 negs
[n_ops
++] = GET_CODE (ops
[i
]) == MINUS
? !negs
[i
] : negs
[i
];
4469 ops
[i
] = XEXP (ops
[i
], 0);
4475 ops
[i
] = XEXP (ops
[i
], 0);
4476 negs
[i
] = ! negs
[i
];
4481 ops
[i
] = XEXP (ops
[i
], 0);
4487 /* ~a -> (-a - 1) */
4490 ops
[n_ops
] = constm1_rtx
;
4491 negs
[n_ops
++] = negs
[i
];
4492 ops
[i
] = XEXP (ops
[i
], 0);
4493 negs
[i
] = ! negs
[i
];
4500 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0, changed
= 1;
4508 /* If we only have two operands, we can't do anything. */
4512 /* Now simplify each pair of operands until nothing changes. The first
4513 time through just simplify constants against each other. */
4520 for (i
= 0; i
< n_ops
- 1; i
++)
4521 for (j
= i
+ 1; j
< n_ops
; j
++)
4522 if (ops
[i
] != 0 && ops
[j
] != 0
4523 && (! first
|| (CONSTANT_P (ops
[i
]) && CONSTANT_P (ops
[j
]))))
4525 rtx lhs
= ops
[i
], rhs
= ops
[j
];
4526 enum rtx_code ncode
= PLUS
;
4528 if (negs
[i
] && ! negs
[j
])
4529 lhs
= ops
[j
], rhs
= ops
[i
], ncode
= MINUS
;
4530 else if (! negs
[i
] && negs
[j
])
4533 tem
= simplify_binary_operation (ncode
, mode
, lhs
, rhs
);
4536 ops
[i
] = tem
, ops
[j
] = 0;
4537 negs
[i
] = negs
[i
] && negs
[j
];
4538 if (GET_CODE (tem
) == NEG
)
4539 ops
[i
] = XEXP (tem
, 0), negs
[i
] = ! negs
[i
];
4541 if (GET_CODE (ops
[i
]) == CONST_INT
&& negs
[i
])
4542 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0;
4550 /* Pack all the operands to the lower-numbered entries and give up if
4551 we didn't reduce the number of operands we had. Make sure we
4552 count a CONST as two operands. If we have the same number of
4553 operands, but have made more CONSTs than we had, this is also
4554 an improvement, so accept it. */
4556 for (i
= 0, j
= 0; j
< n_ops
; j
++)
4559 ops
[i
] = ops
[j
], negs
[i
++] = negs
[j
];
4560 if (GET_CODE (ops
[j
]) == CONST
)
4564 if (i
+ n_consts
> input_ops
4565 || (i
+ n_consts
== input_ops
&& n_consts
<= input_consts
))
4570 /* If we have a CONST_INT, put it last. */
4571 for (i
= 0; i
< n_ops
- 1; i
++)
4572 if (GET_CODE (ops
[i
]) == CONST_INT
)
4574 tem
= ops
[n_ops
- 1], ops
[n_ops
- 1] = ops
[i
] , ops
[i
] = tem
;
4575 j
= negs
[n_ops
- 1], negs
[n_ops
- 1] = negs
[i
], negs
[i
] = j
;
4578 /* Put a non-negated operand first. If there aren't any, make all
4579 operands positive and negate the whole thing later. */
4580 for (i
= 0; i
< n_ops
&& negs
[i
]; i
++)
4585 for (i
= 0; i
< n_ops
; i
++)
4591 tem
= ops
[0], ops
[0] = ops
[i
], ops
[i
] = tem
;
4592 j
= negs
[0], negs
[0] = negs
[i
], negs
[i
] = j
;
4595 /* Now make the result by performing the requested operations. */
4597 for (i
= 1; i
< n_ops
; i
++)
4598 result
= cse_gen_binary (negs
[i
] ? MINUS
: PLUS
, mode
, result
, ops
[i
]);
4600 return negate
? gen_rtx_NEG (mode
, result
) : result
;
4603 /* Make a binary operation by properly ordering the operands and
4604 seeing if the expression folds. */
4607 cse_gen_binary (code
, mode
, op0
, op1
)
4609 enum machine_mode mode
;
4614 /* Put complex operands first and constants second if commutative. */
4615 if (GET_RTX_CLASS (code
) == 'c'
4616 && ((CONSTANT_P (op0
) && GET_CODE (op1
) != CONST_INT
)
4617 || (GET_RTX_CLASS (GET_CODE (op0
)) == 'o'
4618 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')
4619 || (GET_CODE (op0
) == SUBREG
4620 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0
))) == 'o'
4621 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')))
4622 tem
= op0
, op0
= op1
, op1
= tem
;
4624 /* If this simplifies, do it. */
4625 tem
= simplify_binary_operation (code
, mode
, op0
, op1
);
4630 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4631 just form the operation. */
4633 if (code
== PLUS
&& GET_CODE (op1
) == CONST_INT
4634 && GET_MODE (op0
) != VOIDmode
)
4635 return plus_constant (op0
, INTVAL (op1
));
4636 else if (code
== MINUS
&& GET_CODE (op1
) == CONST_INT
4637 && GET_MODE (op0
) != VOIDmode
)
4638 return plus_constant (op0
, - INTVAL (op1
));
4640 return gen_rtx_fmt_ee (code
, mode
, op0
, op1
);
4648 int equal
, op0lt
, op1lt
;
4652 check_fold_consts (data
)
4655 struct cfc_args
* args
= (struct cfc_args
*) data
;
4656 REAL_VALUE_TYPE d0
, d1
;
4658 REAL_VALUE_FROM_CONST_DOUBLE (d0
, args
->op0
);
4659 REAL_VALUE_FROM_CONST_DOUBLE (d1
, args
->op1
);
4660 args
->equal
= REAL_VALUES_EQUAL (d0
, d1
);
4661 args
->op0lt
= REAL_VALUES_LESS (d0
, d1
);
4662 args
->op1lt
= REAL_VALUES_LESS (d1
, d0
);
4665 /* Like simplify_binary_operation except used for relational operators.
4666 MODE is the mode of the operands, not that of the result. If MODE
4667 is VOIDmode, both operands must also be VOIDmode and we compare the
4668 operands in "infinite precision".
4670 If no simplification is possible, this function returns zero. Otherwise,
4671 it returns either const_true_rtx or const0_rtx. */
4674 simplify_relational_operation (code
, mode
, op0
, op1
)
4676 enum machine_mode mode
;
4679 int equal
, op0lt
, op0ltu
, op1lt
, op1ltu
;
4682 /* If op0 is a compare, extract the comparison arguments from it. */
4683 if (GET_CODE (op0
) == COMPARE
&& op1
== const0_rtx
)
4684 op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4686 /* We can't simplify MODE_CC values since we don't know what the
4687 actual comparison is. */
4688 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
4695 /* For integer comparisons of A and B maybe we can simplify A - B and can
4696 then simplify a comparison of that with zero. If A and B are both either
4697 a register or a CONST_INT, this can't help; testing for these cases will
4698 prevent infinite recursion here and speed things up.
4700 If CODE is an unsigned comparison, then we can never do this optimization,
4701 because it gives an incorrect result if the subtraction wraps around zero.
4702 ANSI C defines unsigned operations such that they never overflow, and
4703 thus such cases can not be ignored. */
4705 if (INTEGRAL_MODE_P (mode
) && op1
!= const0_rtx
4706 && ! ((GET_CODE (op0
) == REG
|| GET_CODE (op0
) == CONST_INT
)
4707 && (GET_CODE (op1
) == REG
|| GET_CODE (op1
) == CONST_INT
))
4708 && 0 != (tem
= simplify_binary_operation (MINUS
, mode
, op0
, op1
))
4709 && code
!= GTU
&& code
!= GEU
&& code
!= LTU
&& code
!= LEU
)
4710 return simplify_relational_operation (signed_condition (code
),
4711 mode
, tem
, const0_rtx
);
4713 /* For non-IEEE floating-point, if the two operands are equal, we know the
4715 if (rtx_equal_p (op0
, op1
)
4716 && (TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
4717 || ! FLOAT_MODE_P (GET_MODE (op0
)) || flag_fast_math
))
4718 equal
= 1, op0lt
= 0, op0ltu
= 0, op1lt
= 0, op1ltu
= 0;
4720 /* If the operands are floating-point constants, see if we can fold
4722 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4723 else if (GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
4724 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
4726 struct cfc_args args
;
4728 /* Setup input for check_fold_consts() */
4732 if (do_float_handler(check_fold_consts
, (PTR
) &args
) == 0)
4733 /* We got an exception from check_fold_consts() */
4736 /* Receive output from check_fold_consts() */
4738 op0lt
= op0ltu
= args
.op0lt
;
4739 op1lt
= op1ltu
= args
.op1lt
;
4741 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4743 /* Otherwise, see if the operands are both integers. */
4744 else if ((GET_MODE_CLASS (mode
) == MODE_INT
|| mode
== VOIDmode
)
4745 && (GET_CODE (op0
) == CONST_DOUBLE
|| GET_CODE (op0
) == CONST_INT
)
4746 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
4748 int width
= GET_MODE_BITSIZE (mode
);
4749 HOST_WIDE_INT l0s
, h0s
, l1s
, h1s
;
4750 unsigned HOST_WIDE_INT l0u
, h0u
, l1u
, h1u
;
4752 /* Get the two words comprising each integer constant. */
4753 if (GET_CODE (op0
) == CONST_DOUBLE
)
4755 l0u
= l0s
= CONST_DOUBLE_LOW (op0
);
4756 h0u
= h0s
= CONST_DOUBLE_HIGH (op0
);
4760 l0u
= l0s
= INTVAL (op0
);
4761 h0u
= h0s
= l0s
< 0 ? -1 : 0;
4764 if (GET_CODE (op1
) == CONST_DOUBLE
)
4766 l1u
= l1s
= CONST_DOUBLE_LOW (op1
);
4767 h1u
= h1s
= CONST_DOUBLE_HIGH (op1
);
4771 l1u
= l1s
= INTVAL (op1
);
4772 h1u
= h1s
= l1s
< 0 ? -1 : 0;
4775 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
4776 we have to sign or zero-extend the values. */
4777 if (width
!= 0 && width
<= HOST_BITS_PER_WIDE_INT
)
4778 h0u
= h1u
= 0, h0s
= l0s
< 0 ? -1 : 0, h1s
= l1s
< 0 ? -1 : 0;
4780 if (width
!= 0 && width
< HOST_BITS_PER_WIDE_INT
)
4782 l0u
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4783 l1u
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4785 if (l0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4786 l0s
|= ((HOST_WIDE_INT
) (-1) << width
);
4788 if (l1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4789 l1s
|= ((HOST_WIDE_INT
) (-1) << width
);
4792 equal
= (h0u
== h1u
&& l0u
== l1u
);
4793 op0lt
= (h0s
< h1s
|| (h0s
== h1s
&& l0s
< l1s
));
4794 op1lt
= (h1s
< h0s
|| (h1s
== h0s
&& l1s
< l0s
));
4795 op0ltu
= (h0u
< h1u
|| (h0u
== h1u
&& l0u
< l1u
));
4796 op1ltu
= (h1u
< h0u
|| (h1u
== h0u
&& l1u
< l0u
));
4799 /* Otherwise, there are some code-specific tests we can make. */
4805 /* References to the frame plus a constant or labels cannot
4806 be zero, but a SYMBOL_REF can due to #pragma weak. */
4807 if (((NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
)
4808 || GET_CODE (op0
) == LABEL_REF
)
4809 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4810 /* On some machines, the ap reg can be 0 sometimes. */
4811 && op0
!= arg_pointer_rtx
4818 if (((NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
)
4819 || GET_CODE (op0
) == LABEL_REF
)
4820 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4821 && op0
!= arg_pointer_rtx
4824 return const_true_rtx
;
4828 /* Unsigned values are never negative. */
4829 if (op1
== const0_rtx
)
4830 return const_true_rtx
;
4834 if (op1
== const0_rtx
)
4839 /* Unsigned values are never greater than the largest
4841 if (GET_CODE (op1
) == CONST_INT
4842 && (unsigned HOST_WIDE_INT
) INTVAL (op1
) == GET_MODE_MASK (mode
)
4843 && INTEGRAL_MODE_P (mode
))
4844 return const_true_rtx
;
4848 if (GET_CODE (op1
) == CONST_INT
4849 && (unsigned HOST_WIDE_INT
) INTVAL (op1
) == GET_MODE_MASK (mode
)
4850 && INTEGRAL_MODE_P (mode
))
4861 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
4866 return equal
? const_true_rtx
: const0_rtx
;
4868 return ! equal
? const_true_rtx
: const0_rtx
;
4870 return op0lt
? const_true_rtx
: const0_rtx
;
4872 return op1lt
? const_true_rtx
: const0_rtx
;
4874 return op0ltu
? const_true_rtx
: const0_rtx
;
4876 return op1ltu
? const_true_rtx
: const0_rtx
;
4878 return equal
|| op0lt
? const_true_rtx
: const0_rtx
;
4880 return equal
|| op1lt
? const_true_rtx
: const0_rtx
;
4882 return equal
|| op0ltu
? const_true_rtx
: const0_rtx
;
4884 return equal
|| op1ltu
? const_true_rtx
: const0_rtx
;
4890 /* Simplify CODE, an operation with result mode MODE and three operands,
4891 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4892 a constant. Return 0 if no simplifications is possible. */
4895 simplify_ternary_operation (code
, mode
, op0_mode
, op0
, op1
, op2
)
4897 enum machine_mode mode
, op0_mode
;
4900 int width
= GET_MODE_BITSIZE (mode
);
4902 /* VOIDmode means "infinite" precision. */
4904 width
= HOST_BITS_PER_WIDE_INT
;
4910 if (GET_CODE (op0
) == CONST_INT
4911 && GET_CODE (op1
) == CONST_INT
4912 && GET_CODE (op2
) == CONST_INT
4913 && INTVAL (op1
) + INTVAL (op2
) <= GET_MODE_BITSIZE (op0_mode
)
4914 && width
<= HOST_BITS_PER_WIDE_INT
)
4916 /* Extracting a bit-field from a constant */
4917 HOST_WIDE_INT val
= INTVAL (op0
);
4919 if (BITS_BIG_ENDIAN
)
4920 val
>>= (GET_MODE_BITSIZE (op0_mode
)
4921 - INTVAL (op2
) - INTVAL (op1
));
4923 val
>>= INTVAL (op2
);
4925 if (HOST_BITS_PER_WIDE_INT
!= INTVAL (op1
))
4927 /* First zero-extend. */
4928 val
&= ((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1;
4929 /* If desired, propagate sign bit. */
4930 if (code
== SIGN_EXTRACT
4931 && (val
& ((HOST_WIDE_INT
) 1 << (INTVAL (op1
) - 1))))
4932 val
|= ~ (((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1);
4935 /* Clear the bits that don't belong in our mode,
4936 unless they and our sign bit are all one.
4937 So we get either a reasonable negative value or a reasonable
4938 unsigned value for this mode. */
4939 if (width
< HOST_BITS_PER_WIDE_INT
4940 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4941 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4942 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4944 return GEN_INT (val
);
4949 if (GET_CODE (op0
) == CONST_INT
)
4950 return op0
!= const0_rtx
? op1
: op2
;
4952 /* Convert a == b ? b : a to "a". */
4953 if (GET_CODE (op0
) == NE
&& ! side_effects_p (op0
)
4954 && rtx_equal_p (XEXP (op0
, 0), op1
)
4955 && rtx_equal_p (XEXP (op0
, 1), op2
))
4957 else if (GET_CODE (op0
) == EQ
&& ! side_effects_p (op0
)
4958 && rtx_equal_p (XEXP (op0
, 1), op1
)
4959 && rtx_equal_p (XEXP (op0
, 0), op2
))
4961 else if (GET_RTX_CLASS (GET_CODE (op0
)) == '<' && ! side_effects_p (op0
))
4964 temp
= simplify_relational_operation (GET_CODE (op0
), op0_mode
,
4965 XEXP (op0
, 0), XEXP (op0
, 1));
4966 /* See if any simplifications were possible. */
4967 if (temp
== const0_rtx
)
4969 else if (temp
== const1_rtx
)
4981 /* If X is a nontrivial arithmetic operation on an argument
4982 for which a constant value can be determined, return
4983 the result of operating on that value, as a constant.
4984 Otherwise, return X, possibly with one or more operands
4985 modified by recursive calls to this function.
4987 If X is a register whose contents are known, we do NOT
4988 return those contents here. equiv_constant is called to
4991 INSN is the insn that we may be modifying. If it is 0, make a copy
4992 of X before modifying it. */
4999 register enum rtx_code code
;
5000 register enum machine_mode mode
;
5001 register const char *fmt
;
5007 /* Folded equivalents of first two operands of X. */
5011 /* Constant equivalents of first three operands of X;
5012 0 when no such equivalent is known. */
5017 /* The mode of the first operand of X. We need this for sign and zero
5019 enum machine_mode mode_arg0
;
5024 mode
= GET_MODE (x
);
5025 code
= GET_CODE (x
);
5034 /* No use simplifying an EXPR_LIST
5035 since they are used only for lists of args
5036 in a function call's REG_EQUAL note. */
5038 /* Changing anything inside an ADDRESSOF is incorrect; we don't
5039 want to (e.g.,) make (addressof (const_int 0)) just because
5040 the location is known to be zero. */
5046 return prev_insn_cc0
;
5050 /* If the next insn is a CODE_LABEL followed by a jump table,
5051 PC's value is a LABEL_REF pointing to that label. That
5052 lets us fold switch statements on the Vax. */
5053 if (insn
&& GET_CODE (insn
) == JUMP_INSN
)
5055 rtx next
= next_nonnote_insn (insn
);
5057 if (next
&& GET_CODE (next
) == CODE_LABEL
5058 && NEXT_INSN (next
) != 0
5059 && GET_CODE (NEXT_INSN (next
)) == JUMP_INSN
5060 && (GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_VEC
5061 || GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_DIFF_VEC
))
5062 return gen_rtx_LABEL_REF (Pmode
, next
);
5067 /* See if we previously assigned a constant value to this SUBREG. */
5068 if ((new = lookup_as_function (x
, CONST_INT
)) != 0
5069 || (new = lookup_as_function (x
, CONST_DOUBLE
)) != 0)
5072 /* If this is a paradoxical SUBREG, we have no idea what value the
5073 extra bits would have. However, if the operand is equivalent
5074 to a SUBREG whose operand is the same as our mode, and all the
5075 modes are within a word, we can just use the inner operand
5076 because these SUBREGs just say how to treat the register.
5078 Similarly if we find an integer constant. */
5080 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
5082 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
5083 struct table_elt
*elt
;
5085 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
5086 && GET_MODE_SIZE (imode
) <= UNITS_PER_WORD
5087 && (elt
= lookup (SUBREG_REG (x
), HASH (SUBREG_REG (x
), imode
),
5089 for (elt
= elt
->first_same_value
;
5090 elt
; elt
= elt
->next_same_value
)
5092 if (CONSTANT_P (elt
->exp
)
5093 && GET_MODE (elt
->exp
) == VOIDmode
)
5096 if (GET_CODE (elt
->exp
) == SUBREG
5097 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
5098 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
5099 return copy_rtx (SUBREG_REG (elt
->exp
));
5105 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
5106 We might be able to if the SUBREG is extracting a single word in an
5107 integral mode or extracting the low part. */
5109 folded_arg0
= fold_rtx (SUBREG_REG (x
), insn
);
5110 const_arg0
= equiv_constant (folded_arg0
);
5112 folded_arg0
= const_arg0
;
5114 if (folded_arg0
!= SUBREG_REG (x
))
5118 if (GET_MODE_CLASS (mode
) == MODE_INT
5119 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
5120 && GET_MODE (SUBREG_REG (x
)) != VOIDmode
)
5121 new = operand_subword (folded_arg0
, SUBREG_WORD (x
), 0,
5122 GET_MODE (SUBREG_REG (x
)));
5123 if (new == 0 && subreg_lowpart_p (x
))
5124 new = gen_lowpart_if_possible (mode
, folded_arg0
);
5129 /* If this is a narrowing SUBREG and our operand is a REG, see if
5130 we can find an equivalence for REG that is an arithmetic operation
5131 in a wider mode where both operands are paradoxical SUBREGs
5132 from objects of our result mode. In that case, we couldn't report
5133 an equivalent value for that operation, since we don't know what the
5134 extra bits will be. But we can find an equivalence for this SUBREG
5135 by folding that operation is the narrow mode. This allows us to
5136 fold arithmetic in narrow modes when the machine only supports
5137 word-sized arithmetic.
5139 Also look for a case where we have a SUBREG whose operand is the
5140 same as our result. If both modes are smaller than a word, we
5141 are simply interpreting a register in different modes and we
5142 can use the inner value. */
5144 if (GET_CODE (folded_arg0
) == REG
5145 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (folded_arg0
))
5146 && subreg_lowpart_p (x
))
5148 struct table_elt
*elt
;
5150 /* We can use HASH here since we know that canon_hash won't be
5152 elt
= lookup (folded_arg0
,
5153 HASH (folded_arg0
, GET_MODE (folded_arg0
)),
5154 GET_MODE (folded_arg0
));
5157 elt
= elt
->first_same_value
;
5159 for (; elt
; elt
= elt
->next_same_value
)
5161 enum rtx_code eltcode
= GET_CODE (elt
->exp
);
5163 /* Just check for unary and binary operations. */
5164 if (GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '1'
5165 && GET_CODE (elt
->exp
) != SIGN_EXTEND
5166 && GET_CODE (elt
->exp
) != ZERO_EXTEND
5167 && GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
5168 && GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0))) == mode
)
5170 rtx op0
= SUBREG_REG (XEXP (elt
->exp
, 0));
5172 if (GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
5173 op0
= fold_rtx (op0
, NULL_RTX
);
5175 op0
= equiv_constant (op0
);
5177 new = simplify_unary_operation (GET_CODE (elt
->exp
), mode
,
5180 else if ((GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '2'
5181 || GET_RTX_CLASS (GET_CODE (elt
->exp
)) == 'c')
5182 && eltcode
!= DIV
&& eltcode
!= MOD
5183 && eltcode
!= UDIV
&& eltcode
!= UMOD
5184 && eltcode
!= ASHIFTRT
&& eltcode
!= LSHIFTRT
5185 && eltcode
!= ROTATE
&& eltcode
!= ROTATERT
5186 && ((GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
5187 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0)))
5189 || CONSTANT_P (XEXP (elt
->exp
, 0)))
5190 && ((GET_CODE (XEXP (elt
->exp
, 1)) == SUBREG
5191 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 1)))
5193 || CONSTANT_P (XEXP (elt
->exp
, 1))))
5195 rtx op0
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 0));
5196 rtx op1
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 1));
5198 if (op0
&& GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
5199 op0
= fold_rtx (op0
, NULL_RTX
);
5202 op0
= equiv_constant (op0
);
5204 if (op1
&& GET_CODE (op1
) != REG
&& ! CONSTANT_P (op1
))
5205 op1
= fold_rtx (op1
, NULL_RTX
);
5208 op1
= equiv_constant (op1
);
5210 /* If we are looking for the low SImode part of
5211 (ashift:DI c (const_int 32)), it doesn't work
5212 to compute that in SImode, because a 32-bit shift
5213 in SImode is unpredictable. We know the value is 0. */
5215 && GET_CODE (elt
->exp
) == ASHIFT
5216 && GET_CODE (op1
) == CONST_INT
5217 && INTVAL (op1
) >= GET_MODE_BITSIZE (mode
))
5219 if (INTVAL (op1
) < GET_MODE_BITSIZE (GET_MODE (elt
->exp
)))
5221 /* If the count fits in the inner mode's width,
5222 but exceeds the outer mode's width,
5223 the value will get truncated to 0
5227 /* If the count exceeds even the inner mode's width,
5228 don't fold this expression. */
5231 else if (op0
&& op1
)
5232 new = simplify_binary_operation (GET_CODE (elt
->exp
), mode
,
5236 else if (GET_CODE (elt
->exp
) == SUBREG
5237 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
5238 && (GET_MODE_SIZE (GET_MODE (folded_arg0
))
5240 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
5241 new = copy_rtx (SUBREG_REG (elt
->exp
));
5252 /* If we have (NOT Y), see if Y is known to be (NOT Z).
5253 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
5254 new = lookup_as_function (XEXP (x
, 0), code
);
5256 return fold_rtx (copy_rtx (XEXP (new, 0)), insn
);
5260 /* If we are not actually processing an insn, don't try to find the
5261 best address. Not only don't we care, but we could modify the
5262 MEM in an invalid way since we have no insn to validate against. */
5264 find_best_addr (insn
, &XEXP (x
, 0));
5267 /* Even if we don't fold in the insn itself,
5268 we can safely do so here, in hopes of getting a constant. */
5269 rtx addr
= fold_rtx (XEXP (x
, 0), NULL_RTX
);
5271 HOST_WIDE_INT offset
= 0;
5273 if (GET_CODE (addr
) == REG
5274 && REGNO_QTY_VALID_P (REGNO (addr
))
5275 && GET_MODE (addr
) == qty_mode
[REG_QTY (REGNO (addr
))]
5276 && qty_const
[REG_QTY (REGNO (addr
))] != 0)
5277 addr
= qty_const
[REG_QTY (REGNO (addr
))];
5279 /* If address is constant, split it into a base and integer offset. */
5280 if (GET_CODE (addr
) == SYMBOL_REF
|| GET_CODE (addr
) == LABEL_REF
)
5282 else if (GET_CODE (addr
) == CONST
&& GET_CODE (XEXP (addr
, 0)) == PLUS
5283 && GET_CODE (XEXP (XEXP (addr
, 0), 1)) == CONST_INT
)
5285 base
= XEXP (XEXP (addr
, 0), 0);
5286 offset
= INTVAL (XEXP (XEXP (addr
, 0), 1));
5288 else if (GET_CODE (addr
) == LO_SUM
5289 && GET_CODE (XEXP (addr
, 1)) == SYMBOL_REF
)
5290 base
= XEXP (addr
, 1);
5291 else if (GET_CODE (addr
) == ADDRESSOF
)
5292 return change_address (x
, VOIDmode
, addr
);
5294 /* If this is a constant pool reference, we can fold it into its
5295 constant to allow better value tracking. */
5296 if (base
&& GET_CODE (base
) == SYMBOL_REF
5297 && CONSTANT_POOL_ADDRESS_P (base
))
5299 rtx constant
= get_pool_constant (base
);
5300 enum machine_mode const_mode
= get_pool_mode (base
);
5303 if (CONSTANT_P (constant
) && GET_CODE (constant
) != CONST_INT
)
5304 constant_pool_entries_cost
= COST (constant
);
5306 /* If we are loading the full constant, we have an equivalence. */
5307 if (offset
== 0 && mode
== const_mode
)
5310 /* If this actually isn't a constant (weird!), we can't do
5311 anything. Otherwise, handle the two most common cases:
5312 extracting a word from a multi-word constant, and extracting
5313 the low-order bits. Other cases don't seem common enough to
5315 if (! CONSTANT_P (constant
))
5318 if (GET_MODE_CLASS (mode
) == MODE_INT
5319 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
5320 && offset
% UNITS_PER_WORD
== 0
5321 && (new = operand_subword (constant
,
5322 offset
/ UNITS_PER_WORD
,
5323 0, const_mode
)) != 0)
5326 if (((BYTES_BIG_ENDIAN
5327 && offset
== GET_MODE_SIZE (GET_MODE (constant
)) - 1)
5328 || (! BYTES_BIG_ENDIAN
&& offset
== 0))
5329 && (new = gen_lowpart_if_possible (mode
, constant
)) != 0)
5333 /* If this is a reference to a label at a known position in a jump
5334 table, we also know its value. */
5335 if (base
&& GET_CODE (base
) == LABEL_REF
)
5337 rtx label
= XEXP (base
, 0);
5338 rtx table_insn
= NEXT_INSN (label
);
5340 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
5341 && GET_CODE (PATTERN (table_insn
)) == ADDR_VEC
)
5343 rtx table
= PATTERN (table_insn
);
5346 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
5347 < XVECLEN (table
, 0)))
5348 return XVECEXP (table
, 0,
5349 offset
/ GET_MODE_SIZE (GET_MODE (table
)));
5351 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
5352 && GET_CODE (PATTERN (table_insn
)) == ADDR_DIFF_VEC
)
5354 rtx table
= PATTERN (table_insn
);
5357 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
5358 < XVECLEN (table
, 1)))
5360 offset
/= GET_MODE_SIZE (GET_MODE (table
));
5361 new = gen_rtx_MINUS (Pmode
, XVECEXP (table
, 1, offset
),
5364 if (GET_MODE (table
) != Pmode
)
5365 new = gen_rtx_TRUNCATE (GET_MODE (table
), new);
5367 /* Indicate this is a constant. This isn't a
5368 valid form of CONST, but it will only be used
5369 to fold the next insns and then discarded, so
5372 Note this expression must be explicitly discarded,
5373 by cse_insn, else it may end up in a REG_EQUAL note
5374 and "escape" to cause problems elsewhere. */
5375 return gen_rtx_CONST (GET_MODE (new), new);
5384 for (i
= XVECLEN (x
, 3) - 1; i
>= 0; i
--)
5385 validate_change (insn
, &XVECEXP (x
, 3, i
),
5386 fold_rtx (XVECEXP (x
, 3, i
), insn
), 0);
5396 mode_arg0
= VOIDmode
;
5398 /* Try folding our operands.
5399 Then see which ones have constant values known. */
5401 fmt
= GET_RTX_FORMAT (code
);
5402 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5405 rtx arg
= XEXP (x
, i
);
5406 rtx folded_arg
= arg
, const_arg
= 0;
5407 enum machine_mode mode_arg
= GET_MODE (arg
);
5408 rtx cheap_arg
, expensive_arg
;
5409 rtx replacements
[2];
5412 /* Most arguments are cheap, so handle them specially. */
5413 switch (GET_CODE (arg
))
5416 /* This is the same as calling equiv_constant; it is duplicated
5418 if (REGNO_QTY_VALID_P (REGNO (arg
))
5419 && qty_const
[REG_QTY (REGNO (arg
))] != 0
5420 && GET_CODE (qty_const
[REG_QTY (REGNO (arg
))]) != REG
5421 && GET_CODE (qty_const
[REG_QTY (REGNO (arg
))]) != PLUS
)
5423 = gen_lowpart_if_possible (GET_MODE (arg
),
5424 qty_const
[REG_QTY (REGNO (arg
))]);
5437 folded_arg
= prev_insn_cc0
;
5438 mode_arg
= prev_insn_cc0_mode
;
5439 const_arg
= equiv_constant (folded_arg
);
5444 folded_arg
= fold_rtx (arg
, insn
);
5445 const_arg
= equiv_constant (folded_arg
);
5448 /* For the first three operands, see if the operand
5449 is constant or equivalent to a constant. */
5453 folded_arg0
= folded_arg
;
5454 const_arg0
= const_arg
;
5455 mode_arg0
= mode_arg
;
5458 folded_arg1
= folded_arg
;
5459 const_arg1
= const_arg
;
5462 const_arg2
= const_arg
;
5466 /* Pick the least expensive of the folded argument and an
5467 equivalent constant argument. */
5468 if (const_arg
== 0 || const_arg
== folded_arg
5469 || COST (const_arg
) > COST (folded_arg
))
5470 cheap_arg
= folded_arg
, expensive_arg
= const_arg
;
5472 cheap_arg
= const_arg
, expensive_arg
= folded_arg
;
5474 /* Try to replace the operand with the cheapest of the two
5475 possibilities. If it doesn't work and this is either of the first
5476 two operands of a commutative operation, try swapping them.
5477 If THAT fails, try the more expensive, provided it is cheaper
5478 than what is already there. */
5480 if (cheap_arg
== XEXP (x
, i
))
5483 if (insn
== 0 && ! copied
)
5489 replacements
[0] = cheap_arg
, replacements
[1] = expensive_arg
;
5491 j
< 2 && replacements
[j
]
5492 && COST (replacements
[j
]) < COST (XEXP (x
, i
));
5495 if (validate_change (insn
, &XEXP (x
, i
), replacements
[j
], 0))
5498 if (code
== NE
|| code
== EQ
|| GET_RTX_CLASS (code
) == 'c')
5500 validate_change (insn
, &XEXP (x
, i
), XEXP (x
, 1 - i
), 1);
5501 validate_change (insn
, &XEXP (x
, 1 - i
), replacements
[j
], 1);
5503 if (apply_change_group ())
5505 /* Swap them back to be invalid so that this loop can
5506 continue and flag them to be swapped back later. */
5509 tem
= XEXP (x
, 0); XEXP (x
, 0) = XEXP (x
, 1);
5521 /* Don't try to fold inside of a vector of expressions.
5522 Doing nothing is harmless. */
5526 /* If a commutative operation, place a constant integer as the second
5527 operand unless the first operand is also a constant integer. Otherwise,
5528 place any constant second unless the first operand is also a constant. */
5530 if (code
== EQ
|| code
== NE
|| GET_RTX_CLASS (code
) == 'c')
5532 if (must_swap
|| (const_arg0
5534 || (GET_CODE (const_arg0
) == CONST_INT
5535 && GET_CODE (const_arg1
) != CONST_INT
))))
5537 register rtx tem
= XEXP (x
, 0);
5539 if (insn
== 0 && ! copied
)
5545 validate_change (insn
, &XEXP (x
, 0), XEXP (x
, 1), 1);
5546 validate_change (insn
, &XEXP (x
, 1), tem
, 1);
5547 if (apply_change_group ())
5549 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
5550 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
5555 /* If X is an arithmetic operation, see if we can simplify it. */
5557 switch (GET_RTX_CLASS (code
))
5563 /* We can't simplify extension ops unless we know the
5565 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
5566 && mode_arg0
== VOIDmode
)
5569 /* If we had a CONST, strip it off and put it back later if we
5571 if (const_arg0
!= 0 && GET_CODE (const_arg0
) == CONST
)
5572 is_const
= 1, const_arg0
= XEXP (const_arg0
, 0);
5574 new = simplify_unary_operation (code
, mode
,
5575 const_arg0
? const_arg0
: folded_arg0
,
5577 if (new != 0 && is_const
)
5578 new = gen_rtx_CONST (mode
, new);
5583 /* See what items are actually being compared and set FOLDED_ARG[01]
5584 to those values and CODE to the actual comparison code. If any are
5585 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5586 do anything if both operands are already known to be constant. */
5588 if (const_arg0
== 0 || const_arg1
== 0)
5590 struct table_elt
*p0
, *p1
;
5591 rtx
true = const_true_rtx
, false = const0_rtx
;
5592 enum machine_mode mode_arg1
;
5594 #ifdef FLOAT_STORE_FLAG_VALUE
5595 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5597 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
,
5599 false = CONST0_RTX (mode
);
5603 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
5604 &mode_arg0
, &mode_arg1
);
5605 const_arg0
= equiv_constant (folded_arg0
);
5606 const_arg1
= equiv_constant (folded_arg1
);
5608 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5609 what kinds of things are being compared, so we can't do
5610 anything with this comparison. */
5612 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
5615 /* If we do not now have two constants being compared, see
5616 if we can nevertheless deduce some things about the
5618 if (const_arg0
== 0 || const_arg1
== 0)
5620 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
5621 non-explicit constant? These aren't zero, but we
5622 don't know their sign. */
5623 if (const_arg1
== const0_rtx
5624 && (NONZERO_BASE_PLUS_P (folded_arg0
)
5625 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5627 || GET_CODE (folded_arg0
) == SYMBOL_REF
5629 || GET_CODE (folded_arg0
) == LABEL_REF
5630 || GET_CODE (folded_arg0
) == CONST
))
5634 else if (code
== NE
)
5638 /* See if the two operands are the same. We don't do this
5639 for IEEE floating-point since we can't assume x == x
5640 since x might be a NaN. */
5642 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
5643 || ! FLOAT_MODE_P (mode_arg0
) || flag_fast_math
)
5644 && (folded_arg0
== folded_arg1
5645 || (GET_CODE (folded_arg0
) == REG
5646 && GET_CODE (folded_arg1
) == REG
5647 && (REG_QTY (REGNO (folded_arg0
))
5648 == REG_QTY (REGNO (folded_arg1
))))
5649 || ((p0
= lookup (folded_arg0
,
5650 (safe_hash (folded_arg0
, mode_arg0
)
5651 % NBUCKETS
), mode_arg0
))
5652 && (p1
= lookup (folded_arg1
,
5653 (safe_hash (folded_arg1
, mode_arg0
)
5654 % NBUCKETS
), mode_arg0
))
5655 && p0
->first_same_value
== p1
->first_same_value
)))
5656 return ((code
== EQ
|| code
== LE
|| code
== GE
5657 || code
== LEU
|| code
== GEU
)
5660 /* If FOLDED_ARG0 is a register, see if the comparison we are
5661 doing now is either the same as we did before or the reverse
5662 (we only check the reverse if not floating-point). */
5663 else if (GET_CODE (folded_arg0
) == REG
)
5665 int qty
= REG_QTY (REGNO (folded_arg0
));
5667 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
))
5668 && (comparison_dominates_p (qty_comparison_code
[qty
], code
)
5669 || (comparison_dominates_p (qty_comparison_code
[qty
],
5670 reverse_condition (code
))
5671 && ! FLOAT_MODE_P (mode_arg0
)))
5672 && (rtx_equal_p (qty_comparison_const
[qty
], folded_arg1
)
5674 && rtx_equal_p (qty_comparison_const
[qty
],
5676 || (GET_CODE (folded_arg1
) == REG
5677 && (REG_QTY (REGNO (folded_arg1
))
5678 == qty_comparison_qty
[qty
]))))
5679 return (comparison_dominates_p (qty_comparison_code
[qty
],
5686 /* If we are comparing against zero, see if the first operand is
5687 equivalent to an IOR with a constant. If so, we may be able to
5688 determine the result of this comparison. */
5690 if (const_arg1
== const0_rtx
)
5692 rtx y
= lookup_as_function (folded_arg0
, IOR
);
5696 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
5697 && GET_CODE (inner_const
) == CONST_INT
5698 && INTVAL (inner_const
) != 0)
5700 int sign_bitnum
= GET_MODE_BITSIZE (mode_arg0
) - 1;
5701 int has_sign
= (HOST_BITS_PER_WIDE_INT
>= sign_bitnum
5702 && (INTVAL (inner_const
)
5703 & ((HOST_WIDE_INT
) 1 << sign_bitnum
)));
5704 rtx
true = const_true_rtx
, false = const0_rtx
;
5706 #ifdef FLOAT_STORE_FLAG_VALUE
5707 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5709 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
,
5711 false = CONST0_RTX (mode
);
5735 new = simplify_relational_operation (code
, mode_arg0
,
5736 const_arg0
? const_arg0
: folded_arg0
,
5737 const_arg1
? const_arg1
: folded_arg1
);
5738 #ifdef FLOAT_STORE_FLAG_VALUE
5739 if (new != 0 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5740 new = ((new == const0_rtx
) ? CONST0_RTX (mode
)
5741 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
, mode
));
5750 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5751 with that LABEL_REF as its second operand. If so, the result is
5752 the first operand of that MINUS. This handles switches with an
5753 ADDR_DIFF_VEC table. */
5754 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
5757 = GET_CODE (folded_arg0
) == MINUS
? folded_arg0
5758 : lookup_as_function (folded_arg0
, MINUS
);
5760 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
5761 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
5764 /* Now try for a CONST of a MINUS like the above. */
5765 if ((y
= (GET_CODE (folded_arg0
) == CONST
? folded_arg0
5766 : lookup_as_function (folded_arg0
, CONST
))) != 0
5767 && GET_CODE (XEXP (y
, 0)) == MINUS
5768 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
5769 && XEXP (XEXP (XEXP (y
, 0),1), 0) == XEXP (const_arg1
, 0))
5770 return XEXP (XEXP (y
, 0), 0);
5773 /* Likewise if the operands are in the other order. */
5774 if (const_arg0
&& GET_CODE (const_arg0
) == LABEL_REF
)
5777 = GET_CODE (folded_arg1
) == MINUS
? folded_arg1
5778 : lookup_as_function (folded_arg1
, MINUS
);
5780 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
5781 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg0
, 0))
5784 /* Now try for a CONST of a MINUS like the above. */
5785 if ((y
= (GET_CODE (folded_arg1
) == CONST
? folded_arg1
5786 : lookup_as_function (folded_arg1
, CONST
))) != 0
5787 && GET_CODE (XEXP (y
, 0)) == MINUS
5788 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
5789 && XEXP (XEXP (XEXP (y
, 0),1), 0) == XEXP (const_arg0
, 0))
5790 return XEXP (XEXP (y
, 0), 0);
5793 /* If second operand is a register equivalent to a negative
5794 CONST_INT, see if we can find a register equivalent to the
5795 positive constant. Make a MINUS if so. Don't do this for
5796 a non-negative constant since we might then alternate between
5797 chosing positive and negative constants. Having the positive
5798 constant previously-used is the more common case. Be sure
5799 the resulting constant is non-negative; if const_arg1 were
5800 the smallest negative number this would overflow: depending
5801 on the mode, this would either just be the same value (and
5802 hence not save anything) or be incorrect. */
5803 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
5804 && INTVAL (const_arg1
) < 0
5805 /* This used to test
5807 - INTVAL (const_arg1) >= 0
5809 But The Sun V5.0 compilers mis-compiled that test. So
5810 instead we test for the problematic value in a more direct
5811 manner and hope the Sun compilers get it correct. */
5812 && INTVAL (const_arg1
) !=
5813 ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
- 1))
5814 && GET_CODE (folded_arg1
) == REG
)
5816 rtx new_const
= GEN_INT (- INTVAL (const_arg1
));
5818 = lookup (new_const
, safe_hash (new_const
, mode
) % NBUCKETS
,
5822 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
5823 if (GET_CODE (p
->exp
) == REG
)
5824 return cse_gen_binary (MINUS
, mode
, folded_arg0
,
5825 canon_reg (p
->exp
, NULL_RTX
));
5830 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5831 If so, produce (PLUS Z C2-C). */
5832 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
)
5834 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
5835 if (y
&& GET_CODE (XEXP (y
, 1)) == CONST_INT
)
5836 return fold_rtx (plus_constant (copy_rtx (y
),
5837 -INTVAL (const_arg1
)),
5841 /* ... fall through ... */
5844 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
5845 case IOR
: case AND
: case XOR
:
5846 case MULT
: case DIV
: case UDIV
:
5847 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
5848 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5849 is known to be of similar form, we may be able to replace the
5850 operation with a combined operation. This may eliminate the
5851 intermediate operation if every use is simplified in this way.
5852 Note that the similar optimization done by combine.c only works
5853 if the intermediate operation's result has only one reference. */
5855 if (GET_CODE (folded_arg0
) == REG
5856 && const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
)
5859 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
5860 rtx y
= lookup_as_function (folded_arg0
, code
);
5862 enum rtx_code associate_code
;
5866 || 0 == (inner_const
5867 = equiv_constant (fold_rtx (XEXP (y
, 1), 0)))
5868 || GET_CODE (inner_const
) != CONST_INT
5869 /* If we have compiled a statement like
5870 "if (x == (x & mask1))", and now are looking at
5871 "x & mask2", we will have a case where the first operand
5872 of Y is the same as our first operand. Unless we detect
5873 this case, an infinite loop will result. */
5874 || XEXP (y
, 0) == folded_arg0
)
5877 /* Don't associate these operations if they are a PLUS with the
5878 same constant and it is a power of two. These might be doable
5879 with a pre- or post-increment. Similarly for two subtracts of
5880 identical powers of two with post decrement. */
5882 if (code
== PLUS
&& INTVAL (const_arg1
) == INTVAL (inner_const
)
5883 && ((HAVE_PRE_INCREMENT
5884 && exact_log2 (INTVAL (const_arg1
)) >= 0)
5885 || (HAVE_POST_INCREMENT
5886 && exact_log2 (INTVAL (const_arg1
)) >= 0)
5887 || (HAVE_PRE_DECREMENT
5888 && exact_log2 (- INTVAL (const_arg1
)) >= 0)
5889 || (HAVE_POST_DECREMENT
5890 && exact_log2 (- INTVAL (const_arg1
)) >= 0)))
5893 /* Compute the code used to compose the constants. For example,
5894 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5897 = (code
== MULT
|| code
== DIV
|| code
== UDIV
? MULT
5898 : is_shift
|| code
== PLUS
|| code
== MINUS
? PLUS
: code
);
5900 new_const
= simplify_binary_operation (associate_code
, mode
,
5901 const_arg1
, inner_const
);
5906 /* If we are associating shift operations, don't let this
5907 produce a shift of the size of the object or larger.
5908 This could occur when we follow a sign-extend by a right
5909 shift on a machine that does a sign-extend as a pair
5912 if (is_shift
&& GET_CODE (new_const
) == CONST_INT
5913 && INTVAL (new_const
) >= GET_MODE_BITSIZE (mode
))
5915 /* As an exception, we can turn an ASHIFTRT of this
5916 form into a shift of the number of bits - 1. */
5917 if (code
== ASHIFTRT
)
5918 new_const
= GEN_INT (GET_MODE_BITSIZE (mode
) - 1);
5923 y
= copy_rtx (XEXP (y
, 0));
5925 /* If Y contains our first operand (the most common way this
5926 can happen is if Y is a MEM), we would do into an infinite
5927 loop if we tried to fold it. So don't in that case. */
5929 if (! reg_mentioned_p (folded_arg0
, y
))
5930 y
= fold_rtx (y
, insn
);
5932 return cse_gen_binary (code
, mode
, y
, new_const
);
5940 new = simplify_binary_operation (code
, mode
,
5941 const_arg0
? const_arg0
: folded_arg0
,
5942 const_arg1
? const_arg1
: folded_arg1
);
5946 /* (lo_sum (high X) X) is simply X. */
5947 if (code
== LO_SUM
&& const_arg0
!= 0
5948 && GET_CODE (const_arg0
) == HIGH
5949 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
5955 new = simplify_ternary_operation (code
, mode
, mode_arg0
,
5956 const_arg0
? const_arg0
: folded_arg0
,
5957 const_arg1
? const_arg1
: folded_arg1
,
5958 const_arg2
? const_arg2
: XEXP (x
, 2));
5962 /* Always eliminate CONSTANT_P_RTX at this stage. */
5963 if (code
== CONSTANT_P_RTX
)
5964 return (const_arg0
? const1_rtx
: const0_rtx
);
5968 return new ? new : x
;
5971 /* Return a constant value currently equivalent to X.
5972 Return 0 if we don't know one. */
5978 if (GET_CODE (x
) == REG
5979 && REGNO_QTY_VALID_P (REGNO (x
))
5980 && qty_const
[REG_QTY (REGNO (x
))])
5981 x
= gen_lowpart_if_possible (GET_MODE (x
), qty_const
[REG_QTY (REGNO (x
))]);
5983 if (x
== 0 || CONSTANT_P (x
))
5986 /* If X is a MEM, try to fold it outside the context of any insn to see if
5987 it might be equivalent to a constant. That handles the case where it
5988 is a constant-pool reference. Then try to look it up in the hash table
5989 in case it is something whose value we have seen before. */
5991 if (GET_CODE (x
) == MEM
)
5993 struct table_elt
*elt
;
5995 x
= fold_rtx (x
, NULL_RTX
);
5999 elt
= lookup (x
, safe_hash (x
, GET_MODE (x
)) % NBUCKETS
, GET_MODE (x
));
6003 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
6004 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
6011 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
6012 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
6013 least-significant part of X.
6014 MODE specifies how big a part of X to return.
6016 If the requested operation cannot be done, 0 is returned.
6018 This is similar to gen_lowpart in emit-rtl.c. */
6021 gen_lowpart_if_possible (mode
, x
)
6022 enum machine_mode mode
;
6025 rtx result
= gen_lowpart_common (mode
, x
);
6029 else if (GET_CODE (x
) == MEM
)
6031 /* This is the only other case we handle. */
6032 register int offset
= 0;
6035 if (WORDS_BIG_ENDIAN
)
6036 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
6037 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
6038 if (BYTES_BIG_ENDIAN
)
6039 /* Adjust the address so that the address-after-the-data is
6041 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
6042 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
6043 new = gen_rtx_MEM (mode
, plus_constant (XEXP (x
, 0), offset
));
6044 if (! memory_address_p (mode
, XEXP (new, 0)))
6046 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x
);
6047 MEM_COPY_ATTRIBUTES (new, x
);
6054 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
6055 branch. It will be zero if not.
6057 In certain cases, this can cause us to add an equivalence. For example,
6058 if we are following the taken case of
6060 we can add the fact that `i' and '2' are now equivalent.
6062 In any case, we can record that this comparison was passed. If the same
6063 comparison is seen later, we will know its value. */
6066 record_jump_equiv (insn
, taken
)
6070 int cond_known_true
;
6072 enum machine_mode mode
, mode0
, mode1
;
6073 int reversed_nonequality
= 0;
6076 /* Ensure this is the right kind of insn. */
6077 if (! condjump_p (insn
) || simplejump_p (insn
))
6080 /* See if this jump condition is known true or false. */
6082 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 2) == pc_rtx
);
6084 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 1) == pc_rtx
);
6086 /* Get the type of comparison being done and the operands being compared.
6087 If we had to reverse a non-equality condition, record that fact so we
6088 know that it isn't valid for floating-point. */
6089 code
= GET_CODE (XEXP (SET_SRC (PATTERN (insn
)), 0));
6090 op0
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 0), insn
);
6091 op1
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 1), insn
);
6093 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
6094 if (! cond_known_true
)
6096 reversed_nonequality
= (code
!= EQ
&& code
!= NE
);
6097 code
= reverse_condition (code
);
6100 /* The mode is the mode of the non-constant. */
6102 if (mode1
!= VOIDmode
)
6105 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
6108 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
6109 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
6110 Make any useful entries we can with that information. Called from
6111 above function and called recursively. */
6114 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
)
6116 enum machine_mode mode
;
6118 int reversed_nonequality
;
6120 unsigned op0_hash
, op1_hash
;
6121 int op0_in_memory
, op0_in_struct
, op1_in_memory
, op1_in_struct
;
6122 struct table_elt
*op0_elt
, *op1_elt
;
6124 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
6125 we know that they are also equal in the smaller mode (this is also
6126 true for all smaller modes whether or not there is a SUBREG, but
6127 is not worth testing for with no SUBREG). */
6129 /* Note that GET_MODE (op0) may not equal MODE. */
6130 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
6131 && (GET_MODE_SIZE (GET_MODE (op0
))
6132 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
6134 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
6135 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
6137 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
6138 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op1
, 0),
6139 reversed_nonequality
);
6142 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
6143 && (GET_MODE_SIZE (GET_MODE (op1
))
6144 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
6146 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
6147 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
6149 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
6150 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op0
, 0),
6151 reversed_nonequality
);
6154 /* Similarly, if this is an NE comparison, and either is a SUBREG
6155 making a smaller mode, we know the whole thing is also NE. */
6157 /* Note that GET_MODE (op0) may not equal MODE;
6158 if we test MODE instead, we can get an infinite recursion
6159 alternating between two modes each wider than MODE. */
6161 if (code
== NE
&& GET_CODE (op0
) == SUBREG
6162 && subreg_lowpart_p (op0
)
6163 && (GET_MODE_SIZE (GET_MODE (op0
))
6164 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
6166 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
6167 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
6169 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
6170 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op1
, 0),
6171 reversed_nonequality
);
6174 if (code
== NE
&& GET_CODE (op1
) == SUBREG
6175 && subreg_lowpart_p (op1
)
6176 && (GET_MODE_SIZE (GET_MODE (op1
))
6177 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
6179 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
6180 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
6182 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
6183 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op0
, 0),
6184 reversed_nonequality
);
6187 /* Hash both operands. */
6190 hash_arg_in_memory
= 0;
6191 hash_arg_in_struct
= 0;
6192 op0_hash
= HASH (op0
, mode
);
6193 op0_in_memory
= hash_arg_in_memory
;
6194 op0_in_struct
= hash_arg_in_struct
;
6200 hash_arg_in_memory
= 0;
6201 hash_arg_in_struct
= 0;
6202 op1_hash
= HASH (op1
, mode
);
6203 op1_in_memory
= hash_arg_in_memory
;
6204 op1_in_struct
= hash_arg_in_struct
;
6209 /* Look up both operands. */
6210 op0_elt
= lookup (op0
, op0_hash
, mode
);
6211 op1_elt
= lookup (op1
, op1_hash
, mode
);
6213 /* If both operands are already equivalent or if they are not in the
6214 table but are identical, do nothing. */
6215 if ((op0_elt
!= 0 && op1_elt
!= 0
6216 && op0_elt
->first_same_value
== op1_elt
->first_same_value
)
6217 || op0
== op1
|| rtx_equal_p (op0
, op1
))
6220 /* If we aren't setting two things equal all we can do is save this
6221 comparison. Similarly if this is floating-point. In the latter
6222 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
6223 If we record the equality, we might inadvertently delete code
6224 whose intent was to change -0 to +0. */
6226 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
6228 /* If we reversed a floating-point comparison, if OP0 is not a
6229 register, or if OP1 is neither a register or constant, we can't
6232 if (GET_CODE (op1
) != REG
)
6233 op1
= equiv_constant (op1
);
6235 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
6236 || GET_CODE (op0
) != REG
|| op1
== 0)
6239 /* Put OP0 in the hash table if it isn't already. This gives it a
6240 new quantity number. */
6243 if (insert_regs (op0
, NULL_PTR
, 0))
6245 rehash_using_reg (op0
);
6246 op0_hash
= HASH (op0
, mode
);
6248 /* If OP0 is contained in OP1, this changes its hash code
6249 as well. Faster to rehash than to check, except
6250 for the simple case of a constant. */
6251 if (! CONSTANT_P (op1
))
6252 op1_hash
= HASH (op1
,mode
);
6255 op0_elt
= insert (op0
, NULL_PTR
, op0_hash
, mode
);
6256 op0_elt
->in_memory
= op0_in_memory
;
6257 op0_elt
->in_struct
= op0_in_struct
;
6260 qty_comparison_code
[REG_QTY (REGNO (op0
))] = code
;
6261 if (GET_CODE (op1
) == REG
)
6263 /* Look it up again--in case op0 and op1 are the same. */
6264 op1_elt
= lookup (op1
, op1_hash
, mode
);
6266 /* Put OP1 in the hash table so it gets a new quantity number. */
6269 if (insert_regs (op1
, NULL_PTR
, 0))
6271 rehash_using_reg (op1
);
6272 op1_hash
= HASH (op1
, mode
);
6275 op1_elt
= insert (op1
, NULL_PTR
, op1_hash
, mode
);
6276 op1_elt
->in_memory
= op1_in_memory
;
6277 op1_elt
->in_struct
= op1_in_struct
;
6280 qty_comparison_qty
[REG_QTY (REGNO (op0
))] = REG_QTY (REGNO (op1
));
6281 qty_comparison_const
[REG_QTY (REGNO (op0
))] = 0;
6285 qty_comparison_qty
[REG_QTY (REGNO (op0
))] = -1;
6286 qty_comparison_const
[REG_QTY (REGNO (op0
))] = op1
;
6292 /* If either side is still missing an equivalence, make it now,
6293 then merge the equivalences. */
6297 if (insert_regs (op0
, NULL_PTR
, 0))
6299 rehash_using_reg (op0
);
6300 op0_hash
= HASH (op0
, mode
);
6303 op0_elt
= insert (op0
, NULL_PTR
, op0_hash
, mode
);
6304 op0_elt
->in_memory
= op0_in_memory
;
6305 op0_elt
->in_struct
= op0_in_struct
;
6310 if (insert_regs (op1
, NULL_PTR
, 0))
6312 rehash_using_reg (op1
);
6313 op1_hash
= HASH (op1
, mode
);
6316 op1_elt
= insert (op1
, NULL_PTR
, op1_hash
, mode
);
6317 op1_elt
->in_memory
= op1_in_memory
;
6318 op1_elt
->in_struct
= op1_in_struct
;
6321 merge_equiv_classes (op0_elt
, op1_elt
);
6322 last_jump_equiv_class
= op0_elt
;
6325 /* CSE processing for one instruction.
6326 First simplify sources and addresses of all assignments
6327 in the instruction, using previously-computed equivalents values.
6328 Then install the new sources and destinations in the table
6329 of available values.
6331 If LIBCALL_INSN is nonzero, don't record any equivalence made in
6332 the insn. It means that INSN is inside libcall block. In this
6333 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
6335 /* Data on one SET contained in the instruction. */
6339 /* The SET rtx itself. */
6341 /* The SET_SRC of the rtx (the original value, if it is changing). */
6343 /* The hash-table element for the SET_SRC of the SET. */
6344 struct table_elt
*src_elt
;
6345 /* Hash value for the SET_SRC. */
6347 /* Hash value for the SET_DEST. */
6349 /* The SET_DEST, with SUBREG, etc., stripped. */
6351 /* Place where the pointer to the INNER_DEST was found. */
6352 rtx
*inner_dest_loc
;
6353 /* Nonzero if the SET_SRC is in memory. */
6355 /* Nonzero if the SET_SRC is in a structure. */
6357 /* Nonzero if the SET_SRC contains something
6358 whose value cannot be predicted and understood. */
6360 /* Original machine mode, in case it becomes a CONST_INT. */
6361 enum machine_mode mode
;
6362 /* A constant equivalent for SET_SRC, if any. */
6364 /* Hash value of constant equivalent for SET_SRC. */
6365 unsigned src_const_hash
;
6366 /* Table entry for constant equivalent for SET_SRC, if any. */
6367 struct table_elt
*src_const_elt
;
6371 cse_insn (insn
, libcall_insn
)
6375 register rtx x
= PATTERN (insn
);
6378 register int n_sets
= 0;
6381 /* Records what this insn does to set CC0. */
6382 rtx this_insn_cc0
= 0;
6383 enum machine_mode this_insn_cc0_mode
= VOIDmode
;
6387 struct table_elt
*src_eqv_elt
= 0;
6388 int src_eqv_volatile
= 0;
6389 int src_eqv_in_memory
= 0;
6390 int src_eqv_in_struct
= 0;
6391 unsigned src_eqv_hash
= 0;
6393 struct set
*sets
= NULL_PTR
;
6397 /* Find all the SETs and CLOBBERs in this instruction.
6398 Record all the SETs in the array `set' and count them.
6399 Also determine whether there is a CLOBBER that invalidates
6400 all memory references, or all references at varying addresses. */
6402 if (GET_CODE (insn
) == CALL_INSN
)
6404 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
6405 if (GET_CODE (XEXP (tem
, 0)) == CLOBBER
)
6406 invalidate (SET_DEST (XEXP (tem
, 0)), VOIDmode
);
6409 if (GET_CODE (x
) == SET
)
6411 sets
= (struct set
*) alloca (sizeof (struct set
));
6414 /* Ignore SETs that are unconditional jumps.
6415 They never need cse processing, so this does not hurt.
6416 The reason is not efficiency but rather
6417 so that we can test at the end for instructions
6418 that have been simplified to unconditional jumps
6419 and not be misled by unchanged instructions
6420 that were unconditional jumps to begin with. */
6421 if (SET_DEST (x
) == pc_rtx
6422 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
6425 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
6426 The hard function value register is used only once, to copy to
6427 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
6428 Ensure we invalidate the destination register. On the 80386 no
6429 other code would invalidate it since it is a fixed_reg.
6430 We need not check the return of apply_change_group; see canon_reg. */
6432 else if (GET_CODE (SET_SRC (x
)) == CALL
)
6434 canon_reg (SET_SRC (x
), insn
);
6435 apply_change_group ();
6436 fold_rtx (SET_SRC (x
), insn
);
6437 invalidate (SET_DEST (x
), VOIDmode
);
6442 else if (GET_CODE (x
) == PARALLEL
)
6444 register int lim
= XVECLEN (x
, 0);
6446 sets
= (struct set
*) alloca (lim
* sizeof (struct set
));
6448 /* Find all regs explicitly clobbered in this insn,
6449 and ensure they are not replaced with any other regs
6450 elsewhere in this insn.
6451 When a reg that is clobbered is also used for input,
6452 we should presume that that is for a reason,
6453 and we should not substitute some other register
6454 which is not supposed to be clobbered.
6455 Therefore, this loop cannot be merged into the one below
6456 because a CALL may precede a CLOBBER and refer to the
6457 value clobbered. We must not let a canonicalization do
6458 anything in that case. */
6459 for (i
= 0; i
< lim
; i
++)
6461 register rtx y
= XVECEXP (x
, 0, i
);
6462 if (GET_CODE (y
) == CLOBBER
)
6464 rtx clobbered
= XEXP (y
, 0);
6466 if (GET_CODE (clobbered
) == REG
6467 || GET_CODE (clobbered
) == SUBREG
)
6468 invalidate (clobbered
, VOIDmode
);
6469 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
6470 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
6471 invalidate (XEXP (clobbered
, 0), GET_MODE (clobbered
));
6475 for (i
= 0; i
< lim
; i
++)
6477 register rtx y
= XVECEXP (x
, 0, i
);
6478 if (GET_CODE (y
) == SET
)
6480 /* As above, we ignore unconditional jumps and call-insns and
6481 ignore the result of apply_change_group. */
6482 if (GET_CODE (SET_SRC (y
)) == CALL
)
6484 canon_reg (SET_SRC (y
), insn
);
6485 apply_change_group ();
6486 fold_rtx (SET_SRC (y
), insn
);
6487 invalidate (SET_DEST (y
), VOIDmode
);
6489 else if (SET_DEST (y
) == pc_rtx
6490 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
6493 sets
[n_sets
++].rtl
= y
;
6495 else if (GET_CODE (y
) == CLOBBER
)
6497 /* If we clobber memory, canon the address.
6498 This does nothing when a register is clobbered
6499 because we have already invalidated the reg. */
6500 if (GET_CODE (XEXP (y
, 0)) == MEM
)
6501 canon_reg (XEXP (y
, 0), NULL_RTX
);
6503 else if (GET_CODE (y
) == USE
6504 && ! (GET_CODE (XEXP (y
, 0)) == REG
6505 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
6506 canon_reg (y
, NULL_RTX
);
6507 else if (GET_CODE (y
) == CALL
)
6509 /* The result of apply_change_group can be ignored; see
6511 canon_reg (y
, insn
);
6512 apply_change_group ();
6517 else if (GET_CODE (x
) == CLOBBER
)
6519 if (GET_CODE (XEXP (x
, 0)) == MEM
)
6520 canon_reg (XEXP (x
, 0), NULL_RTX
);
6523 /* Canonicalize a USE of a pseudo register or memory location. */
6524 else if (GET_CODE (x
) == USE
6525 && ! (GET_CODE (XEXP (x
, 0)) == REG
6526 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
6527 canon_reg (XEXP (x
, 0), NULL_RTX
);
6528 else if (GET_CODE (x
) == CALL
)
6530 /* The result of apply_change_group can be ignored; see canon_reg. */
6531 canon_reg (x
, insn
);
6532 apply_change_group ();
6536 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
6537 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
6538 is handled specially for this case, and if it isn't set, then there will
6539 be no equivalence for the destination. */
6540 if (n_sets
== 1 && REG_NOTES (insn
) != 0
6541 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0
6542 && (! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
))
6543 || GET_CODE (SET_DEST (sets
[0].rtl
)) == STRICT_LOW_PART
))
6544 src_eqv
= canon_reg (XEXP (tem
, 0), NULL_RTX
);
6546 /* Canonicalize sources and addresses of destinations.
6547 We do this in a separate pass to avoid problems when a MATCH_DUP is
6548 present in the insn pattern. In that case, we want to ensure that
6549 we don't break the duplicate nature of the pattern. So we will replace
6550 both operands at the same time. Otherwise, we would fail to find an
6551 equivalent substitution in the loop calling validate_change below.
6553 We used to suppress canonicalization of DEST if it appears in SRC,
6554 but we don't do this any more. */
6556 for (i
= 0; i
< n_sets
; i
++)
6558 rtx dest
= SET_DEST (sets
[i
].rtl
);
6559 rtx src
= SET_SRC (sets
[i
].rtl
);
6560 rtx
new = canon_reg (src
, insn
);
6563 if ((GET_CODE (new) == REG
&& GET_CODE (src
) == REG
6564 && ((REGNO (new) < FIRST_PSEUDO_REGISTER
)
6565 != (REGNO (src
) < FIRST_PSEUDO_REGISTER
)))
6566 || (insn_code
= recog_memoized (insn
)) < 0
6567 || insn_n_dups
[insn_code
] > 0)
6568 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
6570 SET_SRC (sets
[i
].rtl
) = new;
6572 if (GET_CODE (dest
) == ZERO_EXTRACT
|| GET_CODE (dest
) == SIGN_EXTRACT
)
6574 validate_change (insn
, &XEXP (dest
, 1),
6575 canon_reg (XEXP (dest
, 1), insn
), 1);
6576 validate_change (insn
, &XEXP (dest
, 2),
6577 canon_reg (XEXP (dest
, 2), insn
), 1);
6580 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
6581 || GET_CODE (dest
) == ZERO_EXTRACT
6582 || GET_CODE (dest
) == SIGN_EXTRACT
)
6583 dest
= XEXP (dest
, 0);
6585 if (GET_CODE (dest
) == MEM
)
6586 canon_reg (dest
, insn
);
6589 /* Now that we have done all the replacements, we can apply the change
6590 group and see if they all work. Note that this will cause some
6591 canonicalizations that would have worked individually not to be applied
6592 because some other canonicalization didn't work, but this should not
6595 The result of apply_change_group can be ignored; see canon_reg. */
6597 apply_change_group ();
6599 /* Set sets[i].src_elt to the class each source belongs to.
6600 Detect assignments from or to volatile things
6601 and set set[i] to zero so they will be ignored
6602 in the rest of this function.
6604 Nothing in this loop changes the hash table or the register chains. */
6606 for (i
= 0; i
< n_sets
; i
++)
6608 register rtx src
, dest
;
6609 register rtx src_folded
;
6610 register struct table_elt
*elt
= 0, *p
;
6611 enum machine_mode mode
;
6614 rtx src_related
= 0;
6615 struct table_elt
*src_const_elt
= 0;
6616 int src_cost
= 10000, src_eqv_cost
= 10000, src_folded_cost
= 10000;
6617 int src_related_cost
= 10000, src_elt_cost
= 10000;
6618 /* Set non-zero if we need to call force_const_mem on with the
6619 contents of src_folded before using it. */
6620 int src_folded_force_flag
= 0;
6622 dest
= SET_DEST (sets
[i
].rtl
);
6623 src
= SET_SRC (sets
[i
].rtl
);
6625 /* If SRC is a constant that has no machine mode,
6626 hash it with the destination's machine mode.
6627 This way we can keep different modes separate. */
6629 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
6630 sets
[i
].mode
= mode
;
6634 enum machine_mode eqvmode
= mode
;
6635 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6636 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
6638 hash_arg_in_memory
= 0;
6639 hash_arg_in_struct
= 0;
6640 src_eqv
= fold_rtx (src_eqv
, insn
);
6641 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
6643 /* Find the equivalence class for the equivalent expression. */
6646 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
6648 src_eqv_volatile
= do_not_record
;
6649 src_eqv_in_memory
= hash_arg_in_memory
;
6650 src_eqv_in_struct
= hash_arg_in_struct
;
6653 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6654 value of the INNER register, not the destination. So it is not
6655 a valid substitution for the source. But save it for later. */
6656 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6659 src_eqv_here
= src_eqv
;
6661 /* Simplify and foldable subexpressions in SRC. Then get the fully-
6662 simplified result, which may not necessarily be valid. */
6663 src_folded
= fold_rtx (src
, insn
);
6666 /* ??? This caused bad code to be generated for the m68k port with -O2.
6667 Suppose src is (CONST_INT -1), and that after truncation src_folded
6668 is (CONST_INT 3). Suppose src_folded is then used for src_const.
6669 At the end we will add src and src_const to the same equivalence
6670 class. We now have 3 and -1 on the same equivalence class. This
6671 causes later instructions to be mis-optimized. */
6672 /* If storing a constant in a bitfield, pre-truncate the constant
6673 so we will be able to record it later. */
6674 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
6675 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
6677 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
6679 if (GET_CODE (src
) == CONST_INT
6680 && GET_CODE (width
) == CONST_INT
6681 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
6682 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
6684 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
6685 << INTVAL (width
)) - 1));
6689 /* Compute SRC's hash code, and also notice if it
6690 should not be recorded at all. In that case,
6691 prevent any further processing of this assignment. */
6693 hash_arg_in_memory
= 0;
6694 hash_arg_in_struct
= 0;
6697 sets
[i
].src_hash
= HASH (src
, mode
);
6698 sets
[i
].src_volatile
= do_not_record
;
6699 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6700 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6702 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
6703 a pseudo that is set more than once, do not record SRC. Using
6704 SRC as a replacement for anything else will be incorrect in that
6705 situation. Note that this usually occurs only for stack slots,
6706 in which case all the RTL would be referring to SRC, so we don't
6707 lose any optimization opportunities by not having SRC in the
6710 if (GET_CODE (src
) == MEM
6711 && find_reg_note (insn
, REG_EQUIV
, src
) != 0
6712 && GET_CODE (dest
) == REG
6713 && REGNO (dest
) >= FIRST_PSEUDO_REGISTER
6714 && REG_N_SETS (REGNO (dest
)) != 1)
6715 sets
[i
].src_volatile
= 1;
6718 /* It is no longer clear why we used to do this, but it doesn't
6719 appear to still be needed. So let's try without it since this
6720 code hurts cse'ing widened ops. */
6721 /* If source is a perverse subreg (such as QI treated as an SI),
6722 treat it as volatile. It may do the work of an SI in one context
6723 where the extra bits are not being used, but cannot replace an SI
6725 if (GET_CODE (src
) == SUBREG
6726 && (GET_MODE_SIZE (GET_MODE (src
))
6727 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
6728 sets
[i
].src_volatile
= 1;
6731 /* Locate all possible equivalent forms for SRC. Try to replace
6732 SRC in the insn with each cheaper equivalent.
6734 We have the following types of equivalents: SRC itself, a folded
6735 version, a value given in a REG_EQUAL note, or a value related
6738 Each of these equivalents may be part of an additional class
6739 of equivalents (if more than one is in the table, they must be in
6740 the same class; we check for this).
6742 If the source is volatile, we don't do any table lookups.
6744 We note any constant equivalent for possible later use in a
6747 if (!sets
[i
].src_volatile
)
6748 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
6750 sets
[i
].src_elt
= elt
;
6752 if (elt
&& src_eqv_here
&& src_eqv_elt
)
6754 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
6756 /* The REG_EQUAL is indicating that two formerly distinct
6757 classes are now equivalent. So merge them. */
6758 merge_equiv_classes (elt
, src_eqv_elt
);
6759 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
6760 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
6766 else if (src_eqv_elt
)
6769 /* Try to find a constant somewhere and record it in `src_const'.
6770 Record its table element, if any, in `src_const_elt'. Look in
6771 any known equivalences first. (If the constant is not in the
6772 table, also set `sets[i].src_const_hash'). */
6774 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
6778 src_const_elt
= elt
;
6783 && (CONSTANT_P (src_folded
)
6784 /* Consider (minus (label_ref L1) (label_ref L2)) as
6785 "constant" here so we will record it. This allows us
6786 to fold switch statements when an ADDR_DIFF_VEC is used. */
6787 || (GET_CODE (src_folded
) == MINUS
6788 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
6789 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
6790 src_const
= src_folded
, src_const_elt
= elt
;
6791 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
6792 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
6794 /* If we don't know if the constant is in the table, get its
6795 hash code and look it up. */
6796 if (src_const
&& src_const_elt
== 0)
6798 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
6799 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
6802 sets
[i
].src_const
= src_const
;
6803 sets
[i
].src_const_elt
= src_const_elt
;
6805 /* If the constant and our source are both in the table, mark them as
6806 equivalent. Otherwise, if a constant is in the table but the source
6807 isn't, set ELT to it. */
6808 if (src_const_elt
&& elt
6809 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
6810 merge_equiv_classes (elt
, src_const_elt
);
6811 else if (src_const_elt
&& elt
== 0)
6812 elt
= src_const_elt
;
6814 /* See if there is a register linearly related to a constant
6815 equivalent of SRC. */
6817 && (GET_CODE (src_const
) == CONST
6818 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
6820 src_related
= use_related_value (src_const
, src_const_elt
);
6823 struct table_elt
*src_related_elt
6824 = lookup (src_related
, HASH (src_related
, mode
), mode
);
6825 if (src_related_elt
&& elt
)
6827 if (elt
->first_same_value
6828 != src_related_elt
->first_same_value
)
6829 /* This can occur when we previously saw a CONST
6830 involving a SYMBOL_REF and then see the SYMBOL_REF
6831 twice. Merge the involved classes. */
6832 merge_equiv_classes (elt
, src_related_elt
);
6835 src_related_elt
= 0;
6837 else if (src_related_elt
&& elt
== 0)
6838 elt
= src_related_elt
;
6842 /* See if we have a CONST_INT that is already in a register in a
6845 if (src_const
&& src_related
== 0 && GET_CODE (src_const
) == CONST_INT
6846 && GET_MODE_CLASS (mode
) == MODE_INT
6847 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
6849 enum machine_mode wider_mode
;
6851 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
6852 GET_MODE_BITSIZE (wider_mode
) <= BITS_PER_WORD
6853 && src_related
== 0;
6854 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
6856 struct table_elt
*const_elt
6857 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
6862 for (const_elt
= const_elt
->first_same_value
;
6863 const_elt
; const_elt
= const_elt
->next_same_value
)
6864 if (GET_CODE (const_elt
->exp
) == REG
)
6866 src_related
= gen_lowpart_if_possible (mode
,
6873 /* Another possibility is that we have an AND with a constant in
6874 a mode narrower than a word. If so, it might have been generated
6875 as part of an "if" which would narrow the AND. If we already
6876 have done the AND in a wider mode, we can use a SUBREG of that
6879 if (flag_expensive_optimizations
&& ! src_related
6880 && GET_CODE (src
) == AND
&& GET_CODE (XEXP (src
, 1)) == CONST_INT
6881 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
6883 enum machine_mode tmode
;
6884 rtx new_and
= gen_rtx_AND (VOIDmode
, NULL_RTX
, XEXP (src
, 1));
6886 for (tmode
= GET_MODE_WIDER_MODE (mode
);
6887 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
6888 tmode
= GET_MODE_WIDER_MODE (tmode
))
6890 rtx inner
= gen_lowpart_if_possible (tmode
, XEXP (src
, 0));
6891 struct table_elt
*larger_elt
;
6895 PUT_MODE (new_and
, tmode
);
6896 XEXP (new_and
, 0) = inner
;
6897 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
6898 if (larger_elt
== 0)
6901 for (larger_elt
= larger_elt
->first_same_value
;
6902 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
6903 if (GET_CODE (larger_elt
->exp
) == REG
)
6906 = gen_lowpart_if_possible (mode
, larger_elt
->exp
);
6916 #ifdef LOAD_EXTEND_OP
6917 /* See if a MEM has already been loaded with a widening operation;
6918 if it has, we can use a subreg of that. Many CISC machines
6919 also have such operations, but this is only likely to be
6920 beneficial these machines. */
6922 if (flag_expensive_optimizations
&& src_related
== 0
6923 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
6924 && GET_MODE_CLASS (mode
) == MODE_INT
6925 && GET_CODE (src
) == MEM
&& ! do_not_record
6926 && LOAD_EXTEND_OP (mode
) != NIL
)
6928 enum machine_mode tmode
;
6930 /* Set what we are trying to extend and the operation it might
6931 have been extended with. */
6932 PUT_CODE (memory_extend_rtx
, LOAD_EXTEND_OP (mode
));
6933 XEXP (memory_extend_rtx
, 0) = src
;
6935 for (tmode
= GET_MODE_WIDER_MODE (mode
);
6936 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
6937 tmode
= GET_MODE_WIDER_MODE (tmode
))
6939 struct table_elt
*larger_elt
;
6941 PUT_MODE (memory_extend_rtx
, tmode
);
6942 larger_elt
= lookup (memory_extend_rtx
,
6943 HASH (memory_extend_rtx
, tmode
), tmode
);
6944 if (larger_elt
== 0)
6947 for (larger_elt
= larger_elt
->first_same_value
;
6948 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
6949 if (GET_CODE (larger_elt
->exp
) == REG
)
6951 src_related
= gen_lowpart_if_possible (mode
,
6960 #endif /* LOAD_EXTEND_OP */
6962 if (src
== src_folded
)
6965 /* At this point, ELT, if non-zero, points to a class of expressions
6966 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6967 and SRC_RELATED, if non-zero, each contain additional equivalent
6968 expressions. Prune these latter expressions by deleting expressions
6969 already in the equivalence class.
6971 Check for an equivalent identical to the destination. If found,
6972 this is the preferred equivalent since it will likely lead to
6973 elimination of the insn. Indicate this by placing it in
6976 if (elt
) elt
= elt
->first_same_value
;
6977 for (p
= elt
; p
; p
= p
->next_same_value
)
6979 enum rtx_code code
= GET_CODE (p
->exp
);
6981 /* If the expression is not valid, ignore it. Then we do not
6982 have to check for validity below. In most cases, we can use
6983 `rtx_equal_p', since canonicalization has already been done. */
6984 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
6987 /* Also skip paradoxical subregs, unless that's what we're
6990 && (GET_MODE_SIZE (GET_MODE (p
->exp
))
6991 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))
6993 && GET_CODE (src
) == SUBREG
6994 && GET_MODE (src
) == GET_MODE (p
->exp
)
6995 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
6996 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))))
6999 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
7001 else if (src_folded
&& GET_CODE (src_folded
) == code
7002 && rtx_equal_p (src_folded
, p
->exp
))
7004 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
7005 && rtx_equal_p (src_eqv_here
, p
->exp
))
7007 else if (src_related
&& GET_CODE (src_related
) == code
7008 && rtx_equal_p (src_related
, p
->exp
))
7011 /* This is the same as the destination of the insns, we want
7012 to prefer it. Copy it to src_related. The code below will
7013 then give it a negative cost. */
7014 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
7019 /* Find the cheapest valid equivalent, trying all the available
7020 possibilities. Prefer items not in the hash table to ones
7021 that are when they are equal cost. Note that we can never
7022 worsen an insn as the current contents will also succeed.
7023 If we find an equivalent identical to the destination, use it as best,
7024 since this insn will probably be eliminated in that case. */
7027 if (rtx_equal_p (src
, dest
))
7030 src_cost
= COST (src
);
7035 if (rtx_equal_p (src_eqv_here
, dest
))
7038 src_eqv_cost
= COST (src_eqv_here
);
7043 if (rtx_equal_p (src_folded
, dest
))
7044 src_folded_cost
= -1;
7046 src_folded_cost
= COST (src_folded
);
7051 if (rtx_equal_p (src_related
, dest
))
7052 src_related_cost
= -1;
7054 src_related_cost
= COST (src_related
);
7057 /* If this was an indirect jump insn, a known label will really be
7058 cheaper even though it looks more expensive. */
7059 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
7060 src_folded
= src_const
, src_folded_cost
= -1;
7062 /* Terminate loop when replacement made. This must terminate since
7063 the current contents will be tested and will always be valid. */
7068 /* Skip invalid entries. */
7069 while (elt
&& GET_CODE (elt
->exp
) != REG
7070 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
7071 elt
= elt
->next_same_value
;
7073 /* A paradoxical subreg would be bad here: it'll be the right
7074 size, but later may be adjusted so that the upper bits aren't
7075 what we want. So reject it. */
7077 && GET_CODE (elt
->exp
) == SUBREG
7078 && (GET_MODE_SIZE (GET_MODE (elt
->exp
))
7079 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))
7080 /* It is okay, though, if the rtx we're trying to match
7081 will ignore any of the bits we can't predict. */
7083 && GET_CODE (src
) == SUBREG
7084 && GET_MODE (src
) == GET_MODE (elt
->exp
)
7085 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
7086 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))))
7088 elt
= elt
->next_same_value
;
7092 if (elt
) src_elt_cost
= elt
->cost
;
7094 /* Find cheapest and skip it for the next time. For items
7095 of equal cost, use this order:
7096 src_folded, src, src_eqv, src_related and hash table entry. */
7097 if (src_folded_cost
<= src_cost
7098 && src_folded_cost
<= src_eqv_cost
7099 && src_folded_cost
<= src_related_cost
7100 && src_folded_cost
<= src_elt_cost
)
7102 trial
= src_folded
, src_folded_cost
= 10000;
7103 if (src_folded_force_flag
)
7104 trial
= force_const_mem (mode
, trial
);
7106 else if (src_cost
<= src_eqv_cost
7107 && src_cost
<= src_related_cost
7108 && src_cost
<= src_elt_cost
)
7109 trial
= src
, src_cost
= 10000;
7110 else if (src_eqv_cost
<= src_related_cost
7111 && src_eqv_cost
<= src_elt_cost
)
7112 trial
= copy_rtx (src_eqv_here
), src_eqv_cost
= 10000;
7113 else if (src_related_cost
<= src_elt_cost
)
7114 trial
= copy_rtx (src_related
), src_related_cost
= 10000;
7117 trial
= copy_rtx (elt
->exp
);
7118 elt
= elt
->next_same_value
;
7119 src_elt_cost
= 10000;
7122 /* We don't normally have an insn matching (set (pc) (pc)), so
7123 check for this separately here. We will delete such an
7126 Tablejump insns contain a USE of the table, so simply replacing
7127 the operand with the constant won't match. This is simply an
7128 unconditional branch, however, and is therefore valid. Just
7129 insert the substitution here and we will delete and re-emit
7132 /* Keep track of the original SET_SRC so that we can fix notes
7133 on libcall instructions. */
7134 old_src
= SET_SRC (sets
[i
].rtl
);
7136 if (n_sets
== 1 && dest
== pc_rtx
7138 || (GET_CODE (trial
) == LABEL_REF
7139 && ! condjump_p (insn
))))
7141 /* If TRIAL is a label in front of a jump table, we are
7142 really falling through the switch (this is how casesi
7143 insns work), so we must branch around the table. */
7144 if (GET_CODE (trial
) == CODE_LABEL
7145 && NEXT_INSN (trial
) != 0
7146 && GET_CODE (NEXT_INSN (trial
)) == JUMP_INSN
7147 && (GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_DIFF_VEC
7148 || GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_VEC
))
7150 trial
= gen_rtx_LABEL_REF (Pmode
, get_label_after (trial
));
7152 SET_SRC (sets
[i
].rtl
) = trial
;
7153 cse_jumps_altered
= 1;
7157 /* Look for a substitution that makes a valid insn. */
7158 else if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
7160 /* If we just made a substitution inside a libcall, then we
7161 need to make the same substitution in any notes attached
7162 to the RETVAL insn. */
7164 && (GET_CODE (old_src
) == REG
7165 || GET_CODE (old_src
) == SUBREG
7166 || GET_CODE (old_src
) == MEM
))
7167 replace_rtx (REG_NOTES (libcall_insn
), old_src
,
7168 canon_reg (SET_SRC (sets
[i
].rtl
), insn
));
7170 /* The result of apply_change_group can be ignored; see
7173 validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
7174 canon_reg (SET_SRC (sets
[i
].rtl
), insn
),
7176 apply_change_group ();
7180 /* If we previously found constant pool entries for
7181 constants and this is a constant, try making a
7182 pool entry. Put it in src_folded unless we already have done
7183 this since that is where it likely came from. */
7185 else if (constant_pool_entries_cost
7186 && CONSTANT_P (trial
)
7187 && ! (GET_CODE (trial
) == CONST
7188 && GET_CODE (XEXP (trial
, 0)) == TRUNCATE
)
7190 || (GET_CODE (src_folded
) != MEM
7191 && ! src_folded_force_flag
))
7192 && GET_MODE_CLASS (mode
) != MODE_CC
7193 && mode
!= VOIDmode
)
7195 src_folded_force_flag
= 1;
7197 src_folded_cost
= constant_pool_entries_cost
;
7201 src
= SET_SRC (sets
[i
].rtl
);
7203 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
7204 However, there is an important exception: If both are registers
7205 that are not the head of their equivalence class, replace SET_SRC
7206 with the head of the class. If we do not do this, we will have
7207 both registers live over a portion of the basic block. This way,
7208 their lifetimes will likely abut instead of overlapping. */
7209 if (GET_CODE (dest
) == REG
7210 && REGNO_QTY_VALID_P (REGNO (dest
))
7211 && qty_mode
[REG_QTY (REGNO (dest
))] == GET_MODE (dest
)
7212 && qty_first_reg
[REG_QTY (REGNO (dest
))] != REGNO (dest
)
7213 && GET_CODE (src
) == REG
&& REGNO (src
) == REGNO (dest
)
7214 /* Don't do this if the original insn had a hard reg as
7216 && (GET_CODE (sets
[i
].src
) != REG
7217 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
))
7218 /* We can't call canon_reg here because it won't do anything if
7219 SRC is a hard register. */
7221 int first
= qty_first_reg
[REG_QTY (REGNO (src
))];
7223 = (first
>= FIRST_PSEUDO_REGISTER
7224 ? regno_reg_rtx
[first
] : gen_rtx_REG (GET_MODE (src
), first
));
7226 /* We must use validate-change even for this, because this
7227 might be a special no-op instruction, suitable only to
7229 if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_src
, 0))
7232 /* If we had a constant that is cheaper than what we are now
7233 setting SRC to, use that constant. We ignored it when we
7234 thought we could make this into a no-op. */
7235 if (src_const
&& COST (src_const
) < COST (src
)
7236 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
), src_const
,
7242 /* If we made a change, recompute SRC values. */
7243 if (src
!= sets
[i
].src
)
7246 hash_arg_in_memory
= 0;
7247 hash_arg_in_struct
= 0;
7249 sets
[i
].src_hash
= HASH (src
, mode
);
7250 sets
[i
].src_volatile
= do_not_record
;
7251 sets
[i
].src_in_memory
= hash_arg_in_memory
;
7252 sets
[i
].src_in_struct
= hash_arg_in_struct
;
7253 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
7256 /* If this is a single SET, we are setting a register, and we have an
7257 equivalent constant, we want to add a REG_NOTE. We don't want
7258 to write a REG_EQUAL note for a constant pseudo since verifying that
7259 that pseudo hasn't been eliminated is a pain. Such a note also
7260 won't help anything.
7262 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
7263 which can be created for a reference to a compile time computable
7264 entry in a jump table. */
7266 if (n_sets
== 1 && src_const
&& GET_CODE (dest
) == REG
7267 && GET_CODE (src_const
) != REG
7268 && ! (GET_CODE (src_const
) == CONST
7269 && GET_CODE (XEXP (src_const
, 0)) == MINUS
7270 && GET_CODE (XEXP (XEXP (src_const
, 0), 0)) == LABEL_REF
7271 && GET_CODE (XEXP (XEXP (src_const
, 0), 1)) == LABEL_REF
))
7273 tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
7275 /* Make sure that the rtx is not shared with any other insn. */
7276 src_const
= copy_rtx (src_const
);
7278 /* Record the actual constant value in a REG_EQUAL note, making
7279 a new one if one does not already exist. */
7281 XEXP (tem
, 0) = src_const
;
7283 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_EQUAL
,
7284 src_const
, REG_NOTES (insn
));
7286 /* If storing a constant value in a register that
7287 previously held the constant value 0,
7288 record this fact with a REG_WAS_0 note on this insn.
7290 Note that the *register* is required to have previously held 0,
7291 not just any register in the quantity and we must point to the
7292 insn that set that register to zero.
7294 Rather than track each register individually, we just see if
7295 the last set for this quantity was for this register. */
7297 if (REGNO_QTY_VALID_P (REGNO (dest
))
7298 && qty_const
[REG_QTY (REGNO (dest
))] == const0_rtx
)
7300 /* See if we previously had a REG_WAS_0 note. */
7301 rtx note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
7302 rtx const_insn
= qty_const_insn
[REG_QTY (REGNO (dest
))];
7304 if ((tem
= single_set (const_insn
)) != 0
7305 && rtx_equal_p (SET_DEST (tem
), dest
))
7308 XEXP (note
, 0) = const_insn
;
7310 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_WAS_0
,
7317 /* Now deal with the destination. */
7319 sets
[i
].inner_dest_loc
= &SET_DEST (sets
[0].rtl
);
7321 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
7322 to the MEM or REG within it. */
7323 while (GET_CODE (dest
) == SIGN_EXTRACT
7324 || GET_CODE (dest
) == ZERO_EXTRACT
7325 || GET_CODE (dest
) == SUBREG
7326 || GET_CODE (dest
) == STRICT_LOW_PART
)
7328 sets
[i
].inner_dest_loc
= &XEXP (dest
, 0);
7329 dest
= XEXP (dest
, 0);
7332 sets
[i
].inner_dest
= dest
;
7334 if (GET_CODE (dest
) == MEM
)
7336 #ifdef PUSH_ROUNDING
7337 /* Stack pushes invalidate the stack pointer. */
7338 rtx addr
= XEXP (dest
, 0);
7339 if ((GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
7340 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
7341 && XEXP (addr
, 0) == stack_pointer_rtx
)
7342 invalidate (stack_pointer_rtx
, Pmode
);
7344 dest
= fold_rtx (dest
, insn
);
7347 /* Compute the hash code of the destination now,
7348 before the effects of this instruction are recorded,
7349 since the register values used in the address computation
7350 are those before this instruction. */
7351 sets
[i
].dest_hash
= HASH (dest
, mode
);
7353 /* Don't enter a bit-field in the hash table
7354 because the value in it after the store
7355 may not equal what was stored, due to truncation. */
7357 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
7358 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
7360 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
7362 if (src_const
!= 0 && GET_CODE (src_const
) == CONST_INT
7363 && GET_CODE (width
) == CONST_INT
7364 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
7365 && ! (INTVAL (src_const
)
7366 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
7367 /* Exception: if the value is constant,
7368 and it won't be truncated, record it. */
7372 /* This is chosen so that the destination will be invalidated
7373 but no new value will be recorded.
7374 We must invalidate because sometimes constant
7375 values can be recorded for bitfields. */
7376 sets
[i
].src_elt
= 0;
7377 sets
[i
].src_volatile
= 1;
7383 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
7385 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
7387 /* One less use of the label this insn used to jump to. */
7388 if (JUMP_LABEL (insn
) != 0)
7389 --LABEL_NUSES (JUMP_LABEL (insn
));
7390 PUT_CODE (insn
, NOTE
);
7391 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
7392 NOTE_SOURCE_FILE (insn
) = 0;
7393 cse_jumps_altered
= 1;
7394 /* No more processing for this set. */
7398 /* If this SET is now setting PC to a label, we know it used to
7399 be a conditional or computed branch. So we see if we can follow
7400 it. If it was a computed branch, delete it and re-emit. */
7401 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
)
7405 /* If this is not in the format for a simple branch and
7406 we are the only SET in it, re-emit it. */
7407 if (! simplejump_p (insn
) && n_sets
== 1)
7409 rtx
new = emit_jump_insn_before (gen_jump (XEXP (src
, 0)), insn
);
7410 JUMP_LABEL (new) = XEXP (src
, 0);
7411 LABEL_NUSES (XEXP (src
, 0))++;
7416 /* Otherwise, force rerecognition, since it probably had
7417 a different pattern before.
7418 This shouldn't really be necessary, since whatever
7419 changed the source value above should have done this.
7420 Until the right place is found, might as well do this here. */
7421 INSN_CODE (insn
) = -1;
7423 /* Now that we've converted this jump to an unconditional jump,
7424 there is dead code after it. Delete the dead code until we
7425 reach a BARRIER, the end of the function, or a label. Do
7426 not delete NOTEs except for NOTE_INSN_DELETED since later
7427 phases assume these notes are retained. */
7429 never_reached_warning (insn
);
7433 while (NEXT_INSN (p
) != 0
7434 && GET_CODE (NEXT_INSN (p
)) != BARRIER
7435 && GET_CODE (NEXT_INSN (p
)) != CODE_LABEL
)
7437 /* Note, we must update P with the return value from
7438 delete_insn, otherwise we could get an infinite loop
7439 if NEXT_INSN (p) had INSN_DELETED_P set. */
7440 if (GET_CODE (NEXT_INSN (p
)) != NOTE
7441 || NOTE_LINE_NUMBER (NEXT_INSN (p
)) == NOTE_INSN_DELETED
)
7442 p
= PREV_INSN (delete_insn (NEXT_INSN (p
)));
7447 /* If we don't have a BARRIER immediately after INSN, put one there.
7448 Much code assumes that there are no NOTEs between a JUMP_INSN and
7451 if (NEXT_INSN (insn
) == 0
7452 || GET_CODE (NEXT_INSN (insn
)) != BARRIER
)
7453 emit_barrier_before (NEXT_INSN (insn
));
7455 /* We might have two BARRIERs separated by notes. Delete the second
7458 if (p
!= insn
&& NEXT_INSN (p
) != 0
7459 && GET_CODE (NEXT_INSN (p
)) == BARRIER
)
7460 delete_insn (NEXT_INSN (p
));
7462 cse_jumps_altered
= 1;
7466 /* If destination is volatile, invalidate it and then do no further
7467 processing for this assignment. */
7469 else if (do_not_record
)
7471 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7472 || GET_CODE (dest
) == MEM
)
7473 invalidate (dest
, VOIDmode
);
7474 else if (GET_CODE (dest
) == STRICT_LOW_PART
7475 || GET_CODE (dest
) == ZERO_EXTRACT
)
7476 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
7480 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
7481 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
7484 /* If setting CC0, record what it was set to, or a constant, if it
7485 is equivalent to a constant. If it is being set to a floating-point
7486 value, make a COMPARE with the appropriate constant of 0. If we
7487 don't do this, later code can interpret this as a test against
7488 const0_rtx, which can cause problems if we try to put it into an
7489 insn as a floating-point operand. */
7490 if (dest
== cc0_rtx
)
7492 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
7493 this_insn_cc0_mode
= mode
;
7494 if (FLOAT_MODE_P (mode
))
7495 this_insn_cc0
= gen_rtx_COMPARE (VOIDmode
, this_insn_cc0
,
7501 /* Now enter all non-volatile source expressions in the hash table
7502 if they are not already present.
7503 Record their equivalence classes in src_elt.
7504 This way we can insert the corresponding destinations into
7505 the same classes even if the actual sources are no longer in them
7506 (having been invalidated). */
7508 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
7509 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
7511 register struct table_elt
*elt
;
7512 register struct table_elt
*classp
= sets
[0].src_elt
;
7513 rtx dest
= SET_DEST (sets
[0].rtl
);
7514 enum machine_mode eqvmode
= GET_MODE (dest
);
7516 if (GET_CODE (dest
) == STRICT_LOW_PART
)
7518 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
7521 if (insert_regs (src_eqv
, classp
, 0))
7523 rehash_using_reg (src_eqv
);
7524 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
7526 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
7527 elt
->in_memory
= src_eqv_in_memory
;
7528 elt
->in_struct
= src_eqv_in_struct
;
7531 /* Check to see if src_eqv_elt is the same as a set source which
7532 does not yet have an elt, and if so set the elt of the set source
7534 for (i
= 0; i
< n_sets
; i
++)
7535 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
7536 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
7537 sets
[i
].src_elt
= src_eqv_elt
;
7540 for (i
= 0; i
< n_sets
; i
++)
7541 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
7542 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
7544 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
7546 /* REG_EQUAL in setting a STRICT_LOW_PART
7547 gives an equivalent for the entire destination register,
7548 not just for the subreg being stored in now.
7549 This is a more interesting equivalence, so we arrange later
7550 to treat the entire reg as the destination. */
7551 sets
[i
].src_elt
= src_eqv_elt
;
7552 sets
[i
].src_hash
= src_eqv_hash
;
7556 /* Insert source and constant equivalent into hash table, if not
7558 register struct table_elt
*classp
= src_eqv_elt
;
7559 register rtx src
= sets
[i
].src
;
7560 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7561 enum machine_mode mode
7562 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
7564 /* Don't put a hard register source into the table if this is
7565 the last insn of a libcall. */
7566 if (sets
[i
].src_elt
== 0
7567 && (GET_CODE (src
) != REG
7568 || REGNO (src
) >= FIRST_PSEUDO_REGISTER
7569 || ! find_reg_note (insn
, REG_RETVAL
, NULL_RTX
)))
7571 register struct table_elt
*elt
;
7573 /* Note that these insert_regs calls cannot remove
7574 any of the src_elt's, because they would have failed to
7575 match if not still valid. */
7576 if (insert_regs (src
, classp
, 0))
7578 rehash_using_reg (src
);
7579 sets
[i
].src_hash
= HASH (src
, mode
);
7581 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
7582 elt
->in_memory
= sets
[i
].src_in_memory
;
7583 elt
->in_struct
= sets
[i
].src_in_struct
;
7584 sets
[i
].src_elt
= classp
= elt
;
7587 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
7588 && src
!= sets
[i
].src_const
7589 && ! rtx_equal_p (sets
[i
].src_const
, src
))
7590 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
7591 sets
[i
].src_const_hash
, mode
);
7594 else if (sets
[i
].src_elt
== 0)
7595 /* If we did not insert the source into the hash table (e.g., it was
7596 volatile), note the equivalence class for the REG_EQUAL value, if any,
7597 so that the destination goes into that class. */
7598 sets
[i
].src_elt
= src_eqv_elt
;
7600 invalidate_from_clobbers (x
);
7602 /* Some registers are invalidated by subroutine calls. Memory is
7603 invalidated by non-constant calls. */
7605 if (GET_CODE (insn
) == CALL_INSN
)
7607 if (! CONST_CALL_P (insn
))
7608 invalidate_memory ();
7609 invalidate_for_call ();
7612 /* Now invalidate everything set by this instruction.
7613 If a SUBREG or other funny destination is being set,
7614 sets[i].rtl is still nonzero, so here we invalidate the reg
7615 a part of which is being set. */
7617 for (i
= 0; i
< n_sets
; i
++)
7620 /* We can't use the inner dest, because the mode associated with
7621 a ZERO_EXTRACT is significant. */
7622 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7624 /* Needed for registers to remove the register from its
7625 previous quantity's chain.
7626 Needed for memory if this is a nonvarying address, unless
7627 we have just done an invalidate_memory that covers even those. */
7628 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7629 || GET_CODE (dest
) == MEM
)
7630 invalidate (dest
, VOIDmode
);
7631 else if (GET_CODE (dest
) == STRICT_LOW_PART
7632 || GET_CODE (dest
) == ZERO_EXTRACT
)
7633 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
7636 /* A volatile ASM invalidates everything. */
7637 if (GET_CODE (insn
) == INSN
7638 && GET_CODE (PATTERN (insn
)) == ASM_OPERANDS
7639 && MEM_VOLATILE_P (PATTERN (insn
)))
7640 flush_hash_table ();
7642 /* Make sure registers mentioned in destinations
7643 are safe for use in an expression to be inserted.
7644 This removes from the hash table
7645 any invalid entry that refers to one of these registers.
7647 We don't care about the return value from mention_regs because
7648 we are going to hash the SET_DEST values unconditionally. */
7650 for (i
= 0; i
< n_sets
; i
++)
7654 rtx x
= SET_DEST (sets
[i
].rtl
);
7656 if (GET_CODE (x
) != REG
)
7660 /* We used to rely on all references to a register becoming
7661 inaccessible when a register changes to a new quantity,
7662 since that changes the hash code. However, that is not
7663 safe, since after NBUCKETS new quantities we get a
7664 hash 'collision' of a register with its own invalid
7665 entries. And since SUBREGs have been changed not to
7666 change their hash code with the hash code of the register,
7667 it wouldn't work any longer at all. So we have to check
7668 for any invalid references lying around now.
7669 This code is similar to the REG case in mention_regs,
7670 but it knows that reg_tick has been incremented, and
7671 it leaves reg_in_table as -1 . */
7672 register int regno
= REGNO (x
);
7673 register int endregno
7674 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
7675 : HARD_REGNO_NREGS (regno
, GET_MODE (x
)));
7678 for (i
= regno
; i
< endregno
; i
++)
7680 if (REG_IN_TABLE (i
) >= 0)
7682 remove_invalid_refs (i
);
7683 REG_IN_TABLE (i
) = -1;
7690 /* We may have just removed some of the src_elt's from the hash table.
7691 So replace each one with the current head of the same class. */
7693 for (i
= 0; i
< n_sets
; i
++)
7696 if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
7697 /* If elt was removed, find current head of same class,
7698 or 0 if nothing remains of that class. */
7700 register struct table_elt
*elt
= sets
[i
].src_elt
;
7702 while (elt
&& elt
->prev_same_value
)
7703 elt
= elt
->prev_same_value
;
7705 while (elt
&& elt
->first_same_value
== 0)
7706 elt
= elt
->next_same_value
;
7707 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
7711 /* Now insert the destinations into their equivalence classes. */
7713 for (i
= 0; i
< n_sets
; i
++)
7716 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7717 rtx inner_dest
= sets
[i
].inner_dest
;
7718 register struct table_elt
*elt
;
7720 /* Don't record value if we are not supposed to risk allocating
7721 floating-point values in registers that might be wider than
7723 if ((flag_float_store
7724 && GET_CODE (dest
) == MEM
7725 && FLOAT_MODE_P (GET_MODE (dest
)))
7726 /* Don't record BLKmode values, because we don't know the
7727 size of it, and can't be sure that other BLKmode values
7728 have the same or smaller size. */
7729 || GET_MODE (dest
) == BLKmode
7730 /* Don't record values of destinations set inside a libcall block
7731 since we might delete the libcall. Things should have been set
7732 up so we won't want to reuse such a value, but we play it safe
7735 /* If we didn't put a REG_EQUAL value or a source into the hash
7736 table, there is no point is recording DEST. */
7737 || sets
[i
].src_elt
== 0
7738 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
7739 or SIGN_EXTEND, don't record DEST since it can cause
7740 some tracking to be wrong.
7742 ??? Think about this more later. */
7743 || (GET_CODE (dest
) == SUBREG
7744 && (GET_MODE_SIZE (GET_MODE (dest
))
7745 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
7746 && (GET_CODE (sets
[i
].src
) == SIGN_EXTEND
7747 || GET_CODE (sets
[i
].src
) == ZERO_EXTEND
)))
7750 /* STRICT_LOW_PART isn't part of the value BEING set,
7751 and neither is the SUBREG inside it.
7752 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
7753 if (GET_CODE (dest
) == STRICT_LOW_PART
)
7754 dest
= SUBREG_REG (XEXP (dest
, 0));
7756 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
)
7757 /* Registers must also be inserted into chains for quantities. */
7758 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
7760 /* If `insert_regs' changes something, the hash code must be
7762 rehash_using_reg (dest
);
7763 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
7766 if (GET_CODE (inner_dest
) == MEM
7767 && GET_CODE (XEXP (inner_dest
, 0)) == ADDRESSOF
)
7768 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
7769 that (MEM (ADDRESSOF (X))) is equivalent to Y.
7770 Consider the case in which the address of the MEM is
7771 passed to a function, which alters the MEM. Then, if we
7772 later use Y instead of the MEM we'll miss the update. */
7773 elt
= insert (dest
, 0, sets
[i
].dest_hash
, GET_MODE (dest
));
7775 elt
= insert (dest
, sets
[i
].src_elt
,
7776 sets
[i
].dest_hash
, GET_MODE (dest
));
7778 elt
->in_memory
= (GET_CODE (sets
[i
].inner_dest
) == MEM
7779 && (! RTX_UNCHANGING_P (sets
[i
].inner_dest
)
7780 || FIXED_BASE_PLUS_P (XEXP (sets
[i
].inner_dest
,
7785 /* This implicitly assumes a whole struct
7786 need not have MEM_IN_STRUCT_P.
7787 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
7788 elt
->in_struct
= (MEM_IN_STRUCT_P (sets
[i
].inner_dest
)
7789 || sets
[i
].inner_dest
!= SET_DEST (sets
[i
].rtl
));
7792 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
7793 narrower than M2, and both M1 and M2 are the same number of words,
7794 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
7795 make that equivalence as well.
7797 However, BAR may have equivalences for which gen_lowpart_if_possible
7798 will produce a simpler value than gen_lowpart_if_possible applied to
7799 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
7800 BAR's equivalences. If we don't get a simplified form, make
7801 the SUBREG. It will not be used in an equivalence, but will
7802 cause two similar assignments to be detected.
7804 Note the loop below will find SUBREG_REG (DEST) since we have
7805 already entered SRC and DEST of the SET in the table. */
7807 if (GET_CODE (dest
) == SUBREG
7808 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) - 1)
7810 == (GET_MODE_SIZE (GET_MODE (dest
)) - 1)/ UNITS_PER_WORD
)
7811 && (GET_MODE_SIZE (GET_MODE (dest
))
7812 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
7813 && sets
[i
].src_elt
!= 0)
7815 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
7816 struct table_elt
*elt
, *classp
= 0;
7818 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
7819 elt
= elt
->next_same_value
)
7823 struct table_elt
*src_elt
;
7825 /* Ignore invalid entries. */
7826 if (GET_CODE (elt
->exp
) != REG
7827 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
7830 new_src
= gen_lowpart_if_possible (new_mode
, elt
->exp
);
7832 new_src
= gen_rtx_SUBREG (new_mode
, elt
->exp
, 0);
7834 src_hash
= HASH (new_src
, new_mode
);
7835 src_elt
= lookup (new_src
, src_hash
, new_mode
);
7837 /* Put the new source in the hash table is if isn't
7841 if (insert_regs (new_src
, classp
, 0))
7843 rehash_using_reg (new_src
);
7844 src_hash
= HASH (new_src
, new_mode
);
7846 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
7847 src_elt
->in_memory
= elt
->in_memory
;
7848 src_elt
->in_struct
= elt
->in_struct
;
7850 else if (classp
&& classp
!= src_elt
->first_same_value
)
7851 /* Show that two things that we've seen before are
7852 actually the same. */
7853 merge_equiv_classes (src_elt
, classp
);
7855 classp
= src_elt
->first_same_value
;
7856 /* Ignore invalid entries. */
7858 && GET_CODE (classp
->exp
) != REG
7859 && ! exp_equiv_p (classp
->exp
, classp
->exp
, 1, 0))
7860 classp
= classp
->next_same_value
;
7865 /* Special handling for (set REG0 REG1)
7866 where REG0 is the "cheapest", cheaper than REG1.
7867 After cse, REG1 will probably not be used in the sequel,
7868 so (if easily done) change this insn to (set REG1 REG0) and
7869 replace REG1 with REG0 in the previous insn that computed their value.
7870 Then REG1 will become a dead store and won't cloud the situation
7871 for later optimizations.
7873 Do not make this change if REG1 is a hard register, because it will
7874 then be used in the sequel and we may be changing a two-operand insn
7875 into a three-operand insn.
7877 Also do not do this if we are operating on a copy of INSN.
7879 Also don't do this if INSN ends a libcall; this would cause an unrelated
7880 register to be set in the middle of a libcall, and we then get bad code
7881 if the libcall is deleted. */
7883 if (n_sets
== 1 && sets
[0].rtl
&& GET_CODE (SET_DEST (sets
[0].rtl
)) == REG
7884 && NEXT_INSN (PREV_INSN (insn
)) == insn
7885 && GET_CODE (SET_SRC (sets
[0].rtl
)) == REG
7886 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
7887 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
)))
7888 && (qty_first_reg
[REG_QTY (REGNO (SET_SRC (sets
[0].rtl
)))]
7889 == REGNO (SET_DEST (sets
[0].rtl
)))
7890 && ! find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
7892 rtx prev
= PREV_INSN (insn
);
7893 while (prev
&& GET_CODE (prev
) == NOTE
)
7894 prev
= PREV_INSN (prev
);
7896 if (prev
&& GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SET
7897 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
))
7899 rtx dest
= SET_DEST (sets
[0].rtl
);
7900 rtx note
= find_reg_note (prev
, REG_EQUIV
, NULL_RTX
);
7902 validate_change (prev
, & SET_DEST (PATTERN (prev
)), dest
, 1);
7903 validate_change (insn
, & SET_DEST (sets
[0].rtl
),
7904 SET_SRC (sets
[0].rtl
), 1);
7905 validate_change (insn
, & SET_SRC (sets
[0].rtl
), dest
, 1);
7906 apply_change_group ();
7908 /* If REG1 was equivalent to a constant, REG0 is not. */
7910 PUT_REG_NOTE_KIND (note
, REG_EQUAL
);
7912 /* If there was a REG_WAS_0 note on PREV, remove it. Move
7913 any REG_WAS_0 note on INSN to PREV. */
7914 note
= find_reg_note (prev
, REG_WAS_0
, NULL_RTX
);
7916 remove_note (prev
, note
);
7918 note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
7921 remove_note (insn
, note
);
7922 XEXP (note
, 1) = REG_NOTES (prev
);
7923 REG_NOTES (prev
) = note
;
7926 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
7927 then we must delete it, because the value in REG0 has changed. */
7928 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
7929 if (note
&& reg_mentioned_p (dest
, XEXP (note
, 0)))
7930 remove_note (insn
, note
);
7934 /* If this is a conditional jump insn, record any known equivalences due to
7935 the condition being tested. */
7937 last_jump_equiv_class
= 0;
7938 if (GET_CODE (insn
) == JUMP_INSN
7939 && n_sets
== 1 && GET_CODE (x
) == SET
7940 && GET_CODE (SET_SRC (x
)) == IF_THEN_ELSE
)
7941 record_jump_equiv (insn
, 0);
7944 /* If the previous insn set CC0 and this insn no longer references CC0,
7945 delete the previous insn. Here we use the fact that nothing expects CC0
7946 to be valid over an insn, which is true until the final pass. */
7947 if (prev_insn
&& GET_CODE (prev_insn
) == INSN
7948 && (tem
= single_set (prev_insn
)) != 0
7949 && SET_DEST (tem
) == cc0_rtx
7950 && ! reg_mentioned_p (cc0_rtx
, x
))
7952 PUT_CODE (prev_insn
, NOTE
);
7953 NOTE_LINE_NUMBER (prev_insn
) = NOTE_INSN_DELETED
;
7954 NOTE_SOURCE_FILE (prev_insn
) = 0;
7957 prev_insn_cc0
= this_insn_cc0
;
7958 prev_insn_cc0_mode
= this_insn_cc0_mode
;
7964 /* Remove from the hash table all expressions that reference memory. */
7966 invalidate_memory ()
7969 register struct table_elt
*p
, *next
;
7971 for (i
= 0; i
< NBUCKETS
; i
++)
7972 for (p
= table
[i
]; p
; p
= next
)
7974 next
= p
->next_same_hash
;
7976 remove_from_table (p
, i
);
7980 /* XXX ??? The name of this function bears little resemblance to
7981 what this function actually does. FIXME. */
7983 note_mem_written (addr
)
7986 /* Pushing or popping the stack invalidates just the stack pointer. */
7987 if ((GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
7988 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
7989 && GET_CODE (XEXP (addr
, 0)) == REG
7990 && REGNO (XEXP (addr
, 0)) == STACK_POINTER_REGNUM
)
7992 if (REG_TICK (STACK_POINTER_REGNUM
) >= 0)
7993 REG_TICK (STACK_POINTER_REGNUM
)++;
7995 /* This should be *very* rare. */
7996 if (TEST_HARD_REG_BIT (hard_regs_in_table
, STACK_POINTER_REGNUM
))
7997 invalidate (stack_pointer_rtx
, VOIDmode
);
8003 /* Perform invalidation on the basis of everything about an insn
8004 except for invalidating the actual places that are SET in it.
8005 This includes the places CLOBBERed, and anything that might
8006 alias with something that is SET or CLOBBERed.
8008 X is the pattern of the insn. */
8011 invalidate_from_clobbers (x
)
8014 if (GET_CODE (x
) == CLOBBER
)
8016 rtx ref
= XEXP (x
, 0);
8019 if (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
8020 || GET_CODE (ref
) == MEM
)
8021 invalidate (ref
, VOIDmode
);
8022 else if (GET_CODE (ref
) == STRICT_LOW_PART
8023 || GET_CODE (ref
) == ZERO_EXTRACT
)
8024 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
8027 else if (GET_CODE (x
) == PARALLEL
)
8030 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
8032 register rtx y
= XVECEXP (x
, 0, i
);
8033 if (GET_CODE (y
) == CLOBBER
)
8035 rtx ref
= XEXP (y
, 0);
8036 if (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
8037 || GET_CODE (ref
) == MEM
)
8038 invalidate (ref
, VOIDmode
);
8039 else if (GET_CODE (ref
) == STRICT_LOW_PART
8040 || GET_CODE (ref
) == ZERO_EXTRACT
)
8041 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
8047 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
8048 and replace any registers in them with either an equivalent constant
8049 or the canonical form of the register. If we are inside an address,
8050 only do this if the address remains valid.
8052 OBJECT is 0 except when within a MEM in which case it is the MEM.
8054 Return the replacement for X. */
8057 cse_process_notes (x
, object
)
8061 enum rtx_code code
= GET_CODE (x
);
8062 const char *fmt
= GET_RTX_FORMAT (code
);
8078 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), x
);
8083 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
8084 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
);
8086 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
);
8093 rtx
new = cse_process_notes (XEXP (x
, 0), object
);
8094 /* We don't substitute VOIDmode constants into these rtx,
8095 since they would impede folding. */
8096 if (GET_MODE (new) != VOIDmode
)
8097 validate_change (object
, &XEXP (x
, 0), new, 0);
8102 i
= REG_QTY (REGNO (x
));
8104 /* Return a constant or a constant register. */
8105 if (REGNO_QTY_VALID_P (REGNO (x
))
8106 && qty_const
[i
] != 0
8107 && (CONSTANT_P (qty_const
[i
])
8108 || GET_CODE (qty_const
[i
]) == REG
))
8110 rtx
new = gen_lowpart_if_possible (GET_MODE (x
), qty_const
[i
]);
8115 /* Otherwise, canonicalize this register. */
8116 return canon_reg (x
, NULL_RTX
);
8122 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
8124 validate_change (object
, &XEXP (x
, i
),
8125 cse_process_notes (XEXP (x
, i
), object
), 0);
8130 /* Find common subexpressions between the end test of a loop and the beginning
8131 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
8133 Often we have a loop where an expression in the exit test is used
8134 in the body of the loop. For example "while (*p) *q++ = *p++;".
8135 Because of the way we duplicate the loop exit test in front of the loop,
8136 however, we don't detect that common subexpression. This will be caught
8137 when global cse is implemented, but this is a quite common case.
8139 This function handles the most common cases of these common expressions.
8140 It is called after we have processed the basic block ending with the
8141 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
8142 jumps to a label used only once. */
8145 cse_around_loop (loop_start
)
8150 struct table_elt
*p
;
8152 /* If the jump at the end of the loop doesn't go to the start, we don't
8154 for (insn
= PREV_INSN (loop_start
);
8155 insn
&& (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) >= 0);
8156 insn
= PREV_INSN (insn
))
8160 || GET_CODE (insn
) != NOTE
8161 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
)
8164 /* If the last insn of the loop (the end test) was an NE comparison,
8165 we will interpret it as an EQ comparison, since we fell through
8166 the loop. Any equivalences resulting from that comparison are
8167 therefore not valid and must be invalidated. */
8168 if (last_jump_equiv_class
)
8169 for (p
= last_jump_equiv_class
->first_same_value
; p
;
8170 p
= p
->next_same_value
)
8172 if (GET_CODE (p
->exp
) == MEM
|| GET_CODE (p
->exp
) == REG
8173 || (GET_CODE (p
->exp
) == SUBREG
8174 && GET_CODE (SUBREG_REG (p
->exp
)) == REG
))
8175 invalidate (p
->exp
, VOIDmode
);
8176 else if (GET_CODE (p
->exp
) == STRICT_LOW_PART
8177 || GET_CODE (p
->exp
) == ZERO_EXTRACT
)
8178 invalidate (XEXP (p
->exp
, 0), GET_MODE (p
->exp
));
8181 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
8182 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
8184 The only thing we do with SET_DEST is invalidate entries, so we
8185 can safely process each SET in order. It is slightly less efficient
8186 to do so, but we only want to handle the most common cases.
8188 The gen_move_insn call in cse_set_around_loop may create new pseudos.
8189 These pseudos won't have valid entries in any of the tables indexed
8190 by register number, such as reg_qty. We avoid out-of-range array
8191 accesses by not processing any instructions created after cse started. */
8193 for (insn
= NEXT_INSN (loop_start
);
8194 GET_CODE (insn
) != CALL_INSN
&& GET_CODE (insn
) != CODE_LABEL
8195 && INSN_UID (insn
) < max_insn_uid
8196 && ! (GET_CODE (insn
) == NOTE
8197 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
);
8198 insn
= NEXT_INSN (insn
))
8200 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
8201 && (GET_CODE (PATTERN (insn
)) == SET
8202 || GET_CODE (PATTERN (insn
)) == CLOBBER
))
8203 cse_set_around_loop (PATTERN (insn
), insn
, loop_start
);
8204 else if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
8205 && GET_CODE (PATTERN (insn
)) == PARALLEL
)
8206 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
8207 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
8208 || GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == CLOBBER
)
8209 cse_set_around_loop (XVECEXP (PATTERN (insn
), 0, i
), insn
,
8214 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
8215 since they are done elsewhere. This function is called via note_stores. */
8218 invalidate_skipped_set (dest
, set
)
8222 enum rtx_code code
= GET_CODE (dest
);
8225 && ! note_mem_written (dest
) /* If this is not a stack push ... */
8226 /* There are times when an address can appear varying and be a PLUS
8227 during this scan when it would be a fixed address were we to know
8228 the proper equivalences. So invalidate all memory if there is
8229 a BLKmode or nonscalar memory reference or a reference to a
8230 variable address. */
8231 && (MEM_IN_STRUCT_P (dest
) || GET_MODE (dest
) == BLKmode
8232 || cse_rtx_varies_p (XEXP (dest
, 0))))
8234 invalidate_memory ();
8238 if (GET_CODE (set
) == CLOBBER
8245 if (code
== STRICT_LOW_PART
|| code
== ZERO_EXTRACT
)
8246 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
8247 else if (code
== REG
|| code
== SUBREG
|| code
== MEM
)
8248 invalidate (dest
, VOIDmode
);
8251 /* Invalidate all insns from START up to the end of the function or the
8252 next label. This called when we wish to CSE around a block that is
8253 conditionally executed. */
8256 invalidate_skipped_block (start
)
8261 for (insn
= start
; insn
&& GET_CODE (insn
) != CODE_LABEL
;
8262 insn
= NEXT_INSN (insn
))
8264 if (GET_RTX_CLASS (GET_CODE (insn
)) != 'i')
8267 if (GET_CODE (insn
) == CALL_INSN
)
8269 if (! CONST_CALL_P (insn
))
8270 invalidate_memory ();
8271 invalidate_for_call ();
8274 invalidate_from_clobbers (PATTERN (insn
));
8275 note_stores (PATTERN (insn
), invalidate_skipped_set
);
8279 /* Used for communication between the following two routines; contains a
8280 value to be checked for modification. */
8282 static rtx cse_check_loop_start_value
;
8284 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
8285 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
8288 cse_check_loop_start (x
, set
)
8290 rtx set ATTRIBUTE_UNUSED
;
8292 if (cse_check_loop_start_value
== 0
8293 || GET_CODE (x
) == CC0
|| GET_CODE (x
) == PC
)
8296 if ((GET_CODE (x
) == MEM
&& GET_CODE (cse_check_loop_start_value
) == MEM
)
8297 || reg_overlap_mentioned_p (x
, cse_check_loop_start_value
))
8298 cse_check_loop_start_value
= 0;
8301 /* X is a SET or CLOBBER contained in INSN that was found near the start of
8302 a loop that starts with the label at LOOP_START.
8304 If X is a SET, we see if its SET_SRC is currently in our hash table.
8305 If so, we see if it has a value equal to some register used only in the
8306 loop exit code (as marked by jump.c).
8308 If those two conditions are true, we search backwards from the start of
8309 the loop to see if that same value was loaded into a register that still
8310 retains its value at the start of the loop.
8312 If so, we insert an insn after the load to copy the destination of that
8313 load into the equivalent register and (try to) replace our SET_SRC with that
8316 In any event, we invalidate whatever this SET or CLOBBER modifies. */
8319 cse_set_around_loop (x
, insn
, loop_start
)
8324 struct table_elt
*src_elt
;
8326 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
8327 are setting PC or CC0 or whose SET_SRC is already a register. */
8328 if (GET_CODE (x
) == SET
8329 && GET_CODE (SET_DEST (x
)) != PC
&& GET_CODE (SET_DEST (x
)) != CC0
8330 && GET_CODE (SET_SRC (x
)) != REG
)
8332 src_elt
= lookup (SET_SRC (x
),
8333 HASH (SET_SRC (x
), GET_MODE (SET_DEST (x
))),
8334 GET_MODE (SET_DEST (x
)));
8337 for (src_elt
= src_elt
->first_same_value
; src_elt
;
8338 src_elt
= src_elt
->next_same_value
)
8339 if (GET_CODE (src_elt
->exp
) == REG
&& REG_LOOP_TEST_P (src_elt
->exp
)
8340 && COST (src_elt
->exp
) < COST (SET_SRC (x
)))
8344 /* Look for an insn in front of LOOP_START that sets
8345 something in the desired mode to SET_SRC (x) before we hit
8346 a label or CALL_INSN. */
8348 for (p
= prev_nonnote_insn (loop_start
);
8349 p
&& GET_CODE (p
) != CALL_INSN
8350 && GET_CODE (p
) != CODE_LABEL
;
8351 p
= prev_nonnote_insn (p
))
8352 if ((set
= single_set (p
)) != 0
8353 && GET_CODE (SET_DEST (set
)) == REG
8354 && GET_MODE (SET_DEST (set
)) == src_elt
->mode
8355 && rtx_equal_p (SET_SRC (set
), SET_SRC (x
)))
8357 /* We now have to ensure that nothing between P
8358 and LOOP_START modified anything referenced in
8359 SET_SRC (x). We know that nothing within the loop
8360 can modify it, or we would have invalidated it in
8364 cse_check_loop_start_value
= SET_SRC (x
);
8365 for (q
= p
; q
!= loop_start
; q
= NEXT_INSN (q
))
8366 if (GET_RTX_CLASS (GET_CODE (q
)) == 'i')
8367 note_stores (PATTERN (q
), cse_check_loop_start
);
8369 /* If nothing was changed and we can replace our
8370 SET_SRC, add an insn after P to copy its destination
8371 to what we will be replacing SET_SRC with. */
8372 if (cse_check_loop_start_value
8373 && validate_change (insn
, &SET_SRC (x
),
8376 /* If this creates new pseudos, this is unsafe,
8377 because the regno of new pseudo is unsuitable
8378 to index into reg_qty when cse_insn processes
8379 the new insn. Therefore, if a new pseudo was
8380 created, discard this optimization. */
8381 int nregs
= max_reg_num ();
8383 = gen_move_insn (src_elt
->exp
, SET_DEST (set
));
8384 if (nregs
!= max_reg_num ())
8386 if (! validate_change (insn
, &SET_SRC (x
),
8391 emit_insn_after (move
, p
);
8398 /* Now invalidate anything modified by X. */
8399 note_mem_written (SET_DEST (x
));
8401 /* See comment on similar code in cse_insn for explanation of these tests. */
8402 if (GET_CODE (SET_DEST (x
)) == REG
|| GET_CODE (SET_DEST (x
)) == SUBREG
8403 || GET_CODE (SET_DEST (x
)) == MEM
)
8404 invalidate (SET_DEST (x
), VOIDmode
);
8405 else if (GET_CODE (SET_DEST (x
)) == STRICT_LOW_PART
8406 || GET_CODE (SET_DEST (x
)) == ZERO_EXTRACT
)
8407 invalidate (XEXP (SET_DEST (x
), 0), GET_MODE (SET_DEST (x
)));
8410 /* Find the end of INSN's basic block and return its range,
8411 the total number of SETs in all the insns of the block, the last insn of the
8412 block, and the branch path.
8414 The branch path indicates which branches should be followed. If a non-zero
8415 path size is specified, the block should be rescanned and a different set
8416 of branches will be taken. The branch path is only used if
8417 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
8419 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
8420 used to describe the block. It is filled in with the information about
8421 the current block. The incoming structure's branch path, if any, is used
8422 to construct the output branch path. */
8425 cse_end_of_basic_block (insn
, data
, follow_jumps
, after_loop
, skip_blocks
)
8427 struct cse_basic_block_data
*data
;
8434 int low_cuid
= INSN_CUID (insn
), high_cuid
= INSN_CUID (insn
);
8435 rtx next
= GET_RTX_CLASS (GET_CODE (insn
)) == 'i' ? insn
: next_real_insn (insn
);
8436 int path_size
= data
->path_size
;
8440 /* Update the previous branch path, if any. If the last branch was
8441 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
8442 shorten the path by one and look at the previous branch. We know that
8443 at least one branch must have been taken if PATH_SIZE is non-zero. */
8444 while (path_size
> 0)
8446 if (data
->path
[path_size
- 1].status
!= NOT_TAKEN
)
8448 data
->path
[path_size
- 1].status
= NOT_TAKEN
;
8455 /* Scan to end of this basic block. */
8456 while (p
&& GET_CODE (p
) != CODE_LABEL
)
8458 /* Don't cse out the end of a loop. This makes a difference
8459 only for the unusual loops that always execute at least once;
8460 all other loops have labels there so we will stop in any case.
8461 Cse'ing out the end of the loop is dangerous because it
8462 might cause an invariant expression inside the loop
8463 to be reused after the end of the loop. This would make it
8464 hard to move the expression out of the loop in loop.c,
8465 especially if it is one of several equivalent expressions
8466 and loop.c would like to eliminate it.
8468 If we are running after loop.c has finished, we can ignore
8469 the NOTE_INSN_LOOP_END. */
8471 if (! after_loop
&& GET_CODE (p
) == NOTE
8472 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
8475 /* Don't cse over a call to setjmp; on some machines (eg vax)
8476 the regs restored by the longjmp come from
8477 a later time than the setjmp. */
8478 if (GET_CODE (p
) == NOTE
8479 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
8482 /* A PARALLEL can have lots of SETs in it,
8483 especially if it is really an ASM_OPERANDS. */
8484 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
8485 && GET_CODE (PATTERN (p
)) == PARALLEL
)
8486 nsets
+= XVECLEN (PATTERN (p
), 0);
8487 else if (GET_CODE (p
) != NOTE
)
8490 /* Ignore insns made by CSE; they cannot affect the boundaries of
8493 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) > high_cuid
)
8494 high_cuid
= INSN_CUID (p
);
8495 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) < low_cuid
)
8496 low_cuid
= INSN_CUID (p
);
8498 /* See if this insn is in our branch path. If it is and we are to
8500 if (path_entry
< path_size
&& data
->path
[path_entry
].branch
== p
)
8502 if (data
->path
[path_entry
].status
!= NOT_TAKEN
)
8505 /* Point to next entry in path, if any. */
8509 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
8510 was specified, we haven't reached our maximum path length, there are
8511 insns following the target of the jump, this is the only use of the
8512 jump label, and the target label is preceded by a BARRIER.
8514 Alternatively, we can follow the jump if it branches around a
8515 block of code and there are no other branches into the block.
8516 In this case invalidate_skipped_block will be called to invalidate any
8517 registers set in the block when following the jump. */
8519 else if ((follow_jumps
|| skip_blocks
) && path_size
< PATHLENGTH
- 1
8520 && GET_CODE (p
) == JUMP_INSN
8521 && GET_CODE (PATTERN (p
)) == SET
8522 && GET_CODE (SET_SRC (PATTERN (p
))) == IF_THEN_ELSE
8523 && JUMP_LABEL (p
) != 0
8524 && LABEL_NUSES (JUMP_LABEL (p
)) == 1
8525 && NEXT_INSN (JUMP_LABEL (p
)) != 0)
8527 for (q
= PREV_INSN (JUMP_LABEL (p
)); q
; q
= PREV_INSN (q
))
8528 if ((GET_CODE (q
) != NOTE
8529 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
8530 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_SETJMP
)
8531 && (GET_CODE (q
) != CODE_LABEL
|| LABEL_NUSES (q
) != 0))
8534 /* If we ran into a BARRIER, this code is an extension of the
8535 basic block when the branch is taken. */
8536 if (follow_jumps
&& q
!= 0 && GET_CODE (q
) == BARRIER
)
8538 /* Don't allow ourself to keep walking around an
8539 always-executed loop. */
8540 if (next_real_insn (q
) == next
)
8546 /* Similarly, don't put a branch in our path more than once. */
8547 for (i
= 0; i
< path_entry
; i
++)
8548 if (data
->path
[i
].branch
== p
)
8551 if (i
!= path_entry
)
8554 data
->path
[path_entry
].branch
= p
;
8555 data
->path
[path_entry
++].status
= TAKEN
;
8557 /* This branch now ends our path. It was possible that we
8558 didn't see this branch the last time around (when the
8559 insn in front of the target was a JUMP_INSN that was
8560 turned into a no-op). */
8561 path_size
= path_entry
;
8564 /* Mark block so we won't scan it again later. */
8565 PUT_MODE (NEXT_INSN (p
), QImode
);
8567 /* Detect a branch around a block of code. */
8568 else if (skip_blocks
&& q
!= 0 && GET_CODE (q
) != CODE_LABEL
)
8572 if (next_real_insn (q
) == next
)
8578 for (i
= 0; i
< path_entry
; i
++)
8579 if (data
->path
[i
].branch
== p
)
8582 if (i
!= path_entry
)
8585 /* This is no_labels_between_p (p, q) with an added check for
8586 reaching the end of a function (in case Q precedes P). */
8587 for (tmp
= NEXT_INSN (p
); tmp
&& tmp
!= q
; tmp
= NEXT_INSN (tmp
))
8588 if (GET_CODE (tmp
) == CODE_LABEL
)
8593 data
->path
[path_entry
].branch
= p
;
8594 data
->path
[path_entry
++].status
= AROUND
;
8596 path_size
= path_entry
;
8599 /* Mark block so we won't scan it again later. */
8600 PUT_MODE (NEXT_INSN (p
), QImode
);
8607 data
->low_cuid
= low_cuid
;
8608 data
->high_cuid
= high_cuid
;
8609 data
->nsets
= nsets
;
8612 /* If all jumps in the path are not taken, set our path length to zero
8613 so a rescan won't be done. */
8614 for (i
= path_size
- 1; i
>= 0; i
--)
8615 if (data
->path
[i
].status
!= NOT_TAKEN
)
8619 data
->path_size
= 0;
8621 data
->path_size
= path_size
;
8623 /* End the current branch path. */
8624 data
->path
[path_size
].branch
= 0;
8627 /* Perform cse on the instructions of a function.
8628 F is the first instruction.
8629 NREGS is one plus the highest pseudo-reg number used in the instruction.
8631 AFTER_LOOP is 1 if this is the cse call done after loop optimization
8632 (only if -frerun-cse-after-loop).
8634 Returns 1 if jump_optimize should be redone due to simplifications
8635 in conditional jump instructions. */
8638 cse_main (f
, nregs
, after_loop
, file
)
8644 struct cse_basic_block_data val
;
8645 register rtx insn
= f
;
8648 cse_jumps_altered
= 0;
8649 recorded_label_ref
= 0;
8650 constant_pool_entries_cost
= 0;
8654 init_alias_analysis ();
8658 max_insn_uid
= get_max_uid ();
8660 reg_next_eqv
= (int *) alloca (nregs
* sizeof (int));
8661 reg_prev_eqv
= (int *) alloca (nregs
* sizeof (int));
8663 #ifdef LOAD_EXTEND_OP
8665 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
8666 and change the code and mode as appropriate. */
8667 memory_extend_rtx
= gen_rtx_ZERO_EXTEND (VOIDmode
, NULL_RTX
);
8670 /* Discard all the free elements of the previous function
8671 since they are allocated in the temporarily obstack. */
8672 bzero ((char *) table
, sizeof table
);
8673 free_element_chain
= 0;
8674 n_elements_made
= 0;
8676 /* Find the largest uid. */
8678 max_uid
= get_max_uid ();
8679 uid_cuid
= (int *) alloca ((max_uid
+ 1) * sizeof (int));
8680 bzero ((char *) uid_cuid
, (max_uid
+ 1) * sizeof (int));
8682 /* Compute the mapping from uids to cuids.
8683 CUIDs are numbers assigned to insns, like uids,
8684 except that cuids increase monotonically through the code.
8685 Don't assign cuids to line-number NOTEs, so that the distance in cuids
8686 between two insns is not affected by -g. */
8688 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
8690 if (GET_CODE (insn
) != NOTE
8691 || NOTE_LINE_NUMBER (insn
) < 0)
8692 INSN_CUID (insn
) = ++i
;
8694 /* Give a line number note the same cuid as preceding insn. */
8695 INSN_CUID (insn
) = i
;
8698 /* Initialize which registers are clobbered by calls. */
8700 CLEAR_HARD_REG_SET (regs_invalidated_by_call
);
8702 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
8703 if ((call_used_regs
[i
]
8704 /* Used to check !fixed_regs[i] here, but that isn't safe;
8705 fixed regs are still call-clobbered, and sched can get
8706 confused if they can "live across calls".
8708 The frame pointer is always preserved across calls. The arg
8709 pointer is if it is fixed. The stack pointer usually is, unless
8710 RETURN_POPS_ARGS, in which case an explicit CLOBBER
8711 will be present. If we are generating PIC code, the PIC offset
8712 table register is preserved across calls. */
8714 && i
!= STACK_POINTER_REGNUM
8715 && i
!= FRAME_POINTER_REGNUM
8716 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
8717 && i
!= HARD_FRAME_POINTER_REGNUM
8719 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
8720 && ! (i
== ARG_POINTER_REGNUM
&& fixed_regs
[i
])
8722 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
8723 && ! (i
== PIC_OFFSET_TABLE_REGNUM
&& flag_pic
)
8727 SET_HARD_REG_BIT (regs_invalidated_by_call
, i
);
8729 /* Loop over basic blocks.
8730 Compute the maximum number of qty's needed for each basic block
8731 (which is 2 for each SET). */
8735 cse_end_of_basic_block (insn
, &val
, flag_cse_follow_jumps
, after_loop
,
8736 flag_cse_skip_blocks
);
8738 /* If this basic block was already processed or has no sets, skip it. */
8739 if (val
.nsets
== 0 || GET_MODE (insn
) == QImode
)
8741 PUT_MODE (insn
, VOIDmode
);
8742 insn
= (val
.last
? NEXT_INSN (val
.last
) : 0);
8747 cse_basic_block_start
= val
.low_cuid
;
8748 cse_basic_block_end
= val
.high_cuid
;
8749 max_qty
= val
.nsets
* 2;
8752 fnotice (file
, ";; Processing block from %d to %d, %d sets.\n",
8753 INSN_UID (insn
), val
.last
? INSN_UID (val
.last
) : 0,
8756 /* Make MAX_QTY bigger to give us room to optimize
8757 past the end of this basic block, if that should prove useful. */
8763 /* If this basic block is being extended by following certain jumps,
8764 (see `cse_end_of_basic_block'), we reprocess the code from the start.
8765 Otherwise, we start after this basic block. */
8766 if (val
.path_size
> 0)
8767 cse_basic_block (insn
, val
.last
, val
.path
, 0);
8770 int old_cse_jumps_altered
= cse_jumps_altered
;
8773 /* When cse changes a conditional jump to an unconditional
8774 jump, we want to reprocess the block, since it will give
8775 us a new branch path to investigate. */
8776 cse_jumps_altered
= 0;
8777 temp
= cse_basic_block (insn
, val
.last
, val
.path
, ! after_loop
);
8778 if (cse_jumps_altered
== 0
8779 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
8782 cse_jumps_altered
|= old_cse_jumps_altered
;
8790 /* Tell refers_to_mem_p that qty_const info is not available. */
8793 if (max_elements_made
< n_elements_made
)
8794 max_elements_made
= n_elements_made
;
8796 return cse_jumps_altered
|| recorded_label_ref
;
8799 /* Process a single basic block. FROM and TO and the limits of the basic
8800 block. NEXT_BRANCH points to the branch path when following jumps or
8801 a null path when not following jumps.
8803 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
8804 loop. This is true when we are being called for the last time on a
8805 block and this CSE pass is before loop.c. */
8808 cse_basic_block (from
, to
, next_branch
, around_loop
)
8809 register rtx from
, to
;
8810 struct branch_path
*next_branch
;
8815 rtx libcall_insn
= NULL_RTX
;
8818 /* Each of these arrays is undefined before max_reg, so only allocate
8819 the space actually needed and adjust the start below. */
8821 qty_first_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8822 qty_last_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8823 qty_mode
= (enum machine_mode
*) alloca ((max_qty
- max_reg
) * sizeof (enum machine_mode
));
8824 qty_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8825 qty_const_insn
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8827 = (enum rtx_code
*) alloca ((max_qty
- max_reg
) * sizeof (enum rtx_code
));
8828 qty_comparison_qty
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8829 qty_comparison_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8831 qty_first_reg
-= max_reg
;
8832 qty_last_reg
-= max_reg
;
8833 qty_mode
-= max_reg
;
8834 qty_const
-= max_reg
;
8835 qty_const_insn
-= max_reg
;
8836 qty_comparison_code
-= max_reg
;
8837 qty_comparison_qty
-= max_reg
;
8838 qty_comparison_const
-= max_reg
;
8842 /* TO might be a label. If so, protect it from being deleted. */
8843 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
8846 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
8848 register enum rtx_code code
= GET_CODE (insn
);
8850 /* If we have processed 1,000 insns, flush the hash table to
8851 avoid extreme quadratic behavior. We must not include NOTEs
8852 in the count since there may be more or them when generating
8853 debugging information. If we clear the table at different
8854 times, code generated with -g -O might be different than code
8855 generated with -O but not -g.
8857 ??? This is a real kludge and needs to be done some other way.
8859 if (code
!= NOTE
&& num_insns
++ > 1000)
8861 flush_hash_table ();
8865 /* See if this is a branch that is part of the path. If so, and it is
8866 to be taken, do so. */
8867 if (next_branch
->branch
== insn
)
8869 enum taken status
= next_branch
++->status
;
8870 if (status
!= NOT_TAKEN
)
8872 if (status
== TAKEN
)
8873 record_jump_equiv (insn
, 1);
8875 invalidate_skipped_block (NEXT_INSN (insn
));
8877 /* Set the last insn as the jump insn; it doesn't affect cc0.
8878 Then follow this branch. */
8883 insn
= JUMP_LABEL (insn
);
8888 if (GET_MODE (insn
) == QImode
)
8889 PUT_MODE (insn
, VOIDmode
);
8891 if (GET_RTX_CLASS (code
) == 'i')
8895 /* Process notes first so we have all notes in canonical forms when
8896 looking for duplicate operations. */
8898 if (REG_NOTES (insn
))
8899 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
), NULL_RTX
);
8901 /* Track when we are inside in LIBCALL block. Inside such a block,
8902 we do not want to record destinations. The last insn of a
8903 LIBCALL block is not considered to be part of the block, since
8904 its destination is the result of the block and hence should be
8907 if ((p
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
8908 libcall_insn
= XEXP (p
, 0);
8909 else if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
8910 libcall_insn
= NULL_RTX
;
8912 cse_insn (insn
, libcall_insn
);
8915 /* If INSN is now an unconditional jump, skip to the end of our
8916 basic block by pretending that we just did the last insn in the
8917 basic block. If we are jumping to the end of our block, show
8918 that we can have one usage of TO. */
8920 if (simplejump_p (insn
))
8925 if (JUMP_LABEL (insn
) == to
)
8928 /* Maybe TO was deleted because the jump is unconditional.
8929 If so, there is nothing left in this basic block. */
8930 /* ??? Perhaps it would be smarter to set TO
8931 to whatever follows this insn,
8932 and pretend the basic block had always ended here. */
8933 if (INSN_DELETED_P (to
))
8936 insn
= PREV_INSN (to
);
8939 /* See if it is ok to keep on going past the label
8940 which used to end our basic block. Remember that we incremented
8941 the count of that label, so we decrement it here. If we made
8942 a jump unconditional, TO_USAGE will be one; in that case, we don't
8943 want to count the use in that jump. */
8945 if (to
!= 0 && NEXT_INSN (insn
) == to
8946 && GET_CODE (to
) == CODE_LABEL
&& --LABEL_NUSES (to
) == to_usage
)
8948 struct cse_basic_block_data val
;
8951 insn
= NEXT_INSN (to
);
8953 if (LABEL_NUSES (to
) == 0)
8954 insn
= delete_insn (to
);
8956 /* If TO was the last insn in the function, we are done. */
8960 /* If TO was preceded by a BARRIER we are done with this block
8961 because it has no continuation. */
8962 prev
= prev_nonnote_insn (to
);
8963 if (prev
&& GET_CODE (prev
) == BARRIER
)
8966 /* Find the end of the following block. Note that we won't be
8967 following branches in this case. */
8970 cse_end_of_basic_block (insn
, &val
, 0, 0, 0);
8972 /* If the tables we allocated have enough space left
8973 to handle all the SETs in the next basic block,
8974 continue through it. Otherwise, return,
8975 and that block will be scanned individually. */
8976 if (val
.nsets
* 2 + next_qty
> max_qty
)
8979 cse_basic_block_start
= val
.low_cuid
;
8980 cse_basic_block_end
= val
.high_cuid
;
8983 /* Prevent TO from being deleted if it is a label. */
8984 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
8987 /* Back up so we process the first insn in the extension. */
8988 insn
= PREV_INSN (insn
);
8992 if (next_qty
> max_qty
)
8995 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
8996 the previous insn is the only insn that branches to the head of a loop,
8997 we can cse into the loop. Don't do this if we changed the jump
8998 structure of a loop unless we aren't going to be following jumps. */
9000 if ((cse_jumps_altered
== 0
9001 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
9002 && around_loop
&& to
!= 0
9003 && GET_CODE (to
) == NOTE
&& NOTE_LINE_NUMBER (to
) == NOTE_INSN_LOOP_END
9004 && GET_CODE (PREV_INSN (to
)) == JUMP_INSN
9005 && JUMP_LABEL (PREV_INSN (to
)) != 0
9006 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to
))) == 1)
9007 cse_around_loop (JUMP_LABEL (PREV_INSN (to
)));
9009 return to
? NEXT_INSN (to
) : 0;
9012 /* Count the number of times registers are used (not set) in X.
9013 COUNTS is an array in which we accumulate the count, INCR is how much
9014 we count each register usage.
9016 Don't count a usage of DEST, which is the SET_DEST of a SET which
9017 contains X in its SET_SRC. This is because such a SET does not
9018 modify the liveness of DEST. */
9021 count_reg_usage (x
, counts
, dest
, incr
)
9034 switch (code
= GET_CODE (x
))
9038 counts
[REGNO (x
)] += incr
;
9051 /* If we are clobbering a MEM, mark any registers inside the address
9053 if (GET_CODE (XEXP (x
, 0)) == MEM
)
9054 count_reg_usage (XEXP (XEXP (x
, 0), 0), counts
, NULL_RTX
, incr
);
9058 /* Unless we are setting a REG, count everything in SET_DEST. */
9059 if (GET_CODE (SET_DEST (x
)) != REG
)
9060 count_reg_usage (SET_DEST (x
), counts
, NULL_RTX
, incr
);
9062 /* If SRC has side-effects, then we can't delete this insn, so the
9063 usage of SET_DEST inside SRC counts.
9065 ??? Strictly-speaking, we might be preserving this insn
9066 because some other SET has side-effects, but that's hard
9067 to do and can't happen now. */
9068 count_reg_usage (SET_SRC (x
), counts
,
9069 side_effects_p (SET_SRC (x
)) ? NULL_RTX
: SET_DEST (x
),
9074 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x
), counts
, NULL_RTX
, incr
);
9076 /* ... falls through ... */
9079 count_reg_usage (PATTERN (x
), counts
, NULL_RTX
, incr
);
9081 /* Things used in a REG_EQUAL note aren't dead since loop may try to
9084 count_reg_usage (REG_NOTES (x
), counts
, NULL_RTX
, incr
);
9089 if (REG_NOTE_KIND (x
) == REG_EQUAL
9090 || (REG_NOTE_KIND (x
) != REG_NONNEG
&& GET_CODE (XEXP (x
,0)) == USE
))
9091 count_reg_usage (XEXP (x
, 0), counts
, NULL_RTX
, incr
);
9092 count_reg_usage (XEXP (x
, 1), counts
, NULL_RTX
, incr
);
9099 fmt
= GET_RTX_FORMAT (code
);
9100 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
9103 count_reg_usage (XEXP (x
, i
), counts
, dest
, incr
);
9104 else if (fmt
[i
] == 'E')
9105 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
9106 count_reg_usage (XVECEXP (x
, i
, j
), counts
, dest
, incr
);
9110 /* Scan all the insns and delete any that are dead; i.e., they store a register
9111 that is never used or they copy a register to itself.
9113 This is used to remove insns made obviously dead by cse, loop or other
9114 optimizations. It improves the heuristics in loop since it won't try to
9115 move dead invariants out of loops or make givs for dead quantities. The
9116 remaining passes of the compilation are also sped up. */
9119 delete_trivially_dead_insns (insns
, nreg
)
9123 int *counts
= (int *) alloca (nreg
* sizeof (int));
9129 int in_libcall
= 0, dead_libcall
= 0;
9131 /* First count the number of times each register is used. */
9132 bzero ((char *) counts
, sizeof (int) * nreg
);
9133 for (insn
= next_real_insn (insns
); insn
; insn
= next_real_insn (insn
))
9134 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
9136 /* Go from the last insn to the first and delete insns that only set unused
9137 registers or copy a register to itself. As we delete an insn, remove
9138 usage counts for registers it uses.
9140 The first jump optimization pass may leave a real insn as the last
9141 insn in the function. We must not skip that insn or we may end
9142 up deleting code that is not really dead. */
9143 insn
= get_last_insn ();
9144 if (GET_RTX_CLASS (GET_CODE (insn
)) != 'i')
9145 insn
= prev_real_insn (insn
);
9147 for ( ; insn
; insn
= prev
)
9152 prev
= prev_real_insn (insn
);
9154 /* Don't delete any insns that are part of a libcall block unless
9155 we can delete the whole libcall block.
9157 Flow or loop might get confused if we did that. Remember
9158 that we are scanning backwards. */
9159 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
9165 /* See if there's a REG_EQUAL note on this insn and try to
9166 replace the source with the REG_EQUAL expression.
9168 We assume that insns with REG_RETVALs can only be reg->reg
9169 copies at this point. */
9170 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
9173 rtx set
= single_set (insn
);
9175 && validate_change (insn
, &SET_SRC (set
), XEXP (note
, 0), 0))
9178 find_reg_note (insn
, REG_RETVAL
, NULL_RTX
));
9183 else if (in_libcall
)
9184 live_insn
= ! dead_libcall
;
9185 else if (GET_CODE (PATTERN (insn
)) == SET
)
9187 if (GET_CODE (SET_DEST (PATTERN (insn
))) == REG
9188 && SET_DEST (PATTERN (insn
)) == SET_SRC (PATTERN (insn
)))
9192 else if (GET_CODE (SET_DEST (PATTERN (insn
))) == CC0
9193 && ! side_effects_p (SET_SRC (PATTERN (insn
)))
9194 && ((tem
= next_nonnote_insn (insn
)) == 0
9195 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
9196 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
9199 else if (GET_CODE (SET_DEST (PATTERN (insn
))) != REG
9200 || REGNO (SET_DEST (PATTERN (insn
))) < FIRST_PSEUDO_REGISTER
9201 || counts
[REGNO (SET_DEST (PATTERN (insn
)))] != 0
9202 || side_effects_p (SET_SRC (PATTERN (insn
)))
9203 /* An ADDRESSOF expression can turn into a use of the
9204 internal arg pointer, so always consider the
9205 internal arg pointer live. If it is truly dead,
9206 flow will delete the initializing insn. */
9207 || (SET_DEST (PATTERN (insn
))
9208 == current_function_internal_arg_pointer
))
9211 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
9212 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
9214 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
9216 if (GET_CODE (elt
) == SET
)
9218 if (GET_CODE (SET_DEST (elt
)) == REG
9219 && SET_DEST (elt
) == SET_SRC (elt
))
9223 else if (GET_CODE (SET_DEST (elt
)) == CC0
9224 && ! side_effects_p (SET_SRC (elt
))
9225 && ((tem
= next_nonnote_insn (insn
)) == 0
9226 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
9227 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
9230 else if (GET_CODE (SET_DEST (elt
)) != REG
9231 || REGNO (SET_DEST (elt
)) < FIRST_PSEUDO_REGISTER
9232 || counts
[REGNO (SET_DEST (elt
))] != 0
9233 || side_effects_p (SET_SRC (elt
))
9234 /* An ADDRESSOF expression can turn into a use of the
9235 internal arg pointer, so always consider the
9236 internal arg pointer live. If it is truly dead,
9237 flow will delete the initializing insn. */
9239 == current_function_internal_arg_pointer
))
9242 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
9248 /* If this is a dead insn, delete it and show registers in it aren't
9253 count_reg_usage (insn
, counts
, NULL_RTX
, -1);
9257 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))