gcc/doc/gcc/gcc-command-options/machine-dependent-options/ia-64-options.rst

   1 ..
   2   Copyright 1988-2022 Free Software Foundation, Inc.
   3   This is part of the GCC manual.
   4   For copying conditions, see the copyright.rst file.
   5
   6 .. program:: IA-64
   7
   8 .. index:: IA-64 Options
   9
  10 .. _ia-64-options:
  11
  12 IA-64 Options
  13 ^^^^^^^^^^^^^
  14
  15 These are the :samp:`-m` options defined for the Intel IA-64 architecture.
  16
  17 .. option:: -mbig-endian
  18
  19   Generate code for a big-endian target.  This is the default for HP-UX.
  20
  21 .. option:: -mlittle-endian
  22
  23   Generate code for a little-endian target.  This is the default for AIX5
  24   and GNU/Linux.
  25
  26 .. option:: -mgnu-as, -mno-gnu-as
  27
  28   Generate (or don't) code for the GNU assembler.  This is the default.
  29
  30   .. Also, this is the default if the configure option @option{-with-gnu-as}
  31
  32   .. is used.
  33
  34 .. option:: -mgnu-ld, -mno-gnu-ld
  35
  36   Generate (or don't) code for the GNU linker.  This is the default.
  37
  38   .. Also, this is the default if the configure option @option{-with-gnu-ld}
  39
  40   .. is used.
  41
  42 .. option:: -mno-pic
  43
  44   Generate code that does not use a global pointer register.  The result
  45   is not position independent code, and violates the IA-64 ABI.
  46
  47 .. option:: -mvolatile-asm-stop, -mno-volatile-asm-stop
  48
  49   Generate (or don't) a stop bit immediately before and after volatile asm
  50   statements.
  51
  52 .. option:: -mregister-names, -mno-register-names
  53
  54   Generate (or don't) :samp:`in`, :samp:`loc`, and :samp:`out` register names for
  55   the stacked registers.  This may make assembler output more readable.
  56
  57 .. option:: -mno-sdata, -msdata
  58
  59   Disable (or enable) optimizations that use the small data section.  This may
  60   be useful for working around optimizer bugs.
  61
  62 .. option:: -mconstant-gp
  63
  64   Generate code that uses a single constant global pointer value.  This is
  65   useful when compiling kernel code.
  66
  67 .. option:: -mauto-pic
  68
  69   Generate code that is self-relocatable.  This implies :option:`-mconstant-gp`.
  70   This is useful when compiling firmware code.
  71
  72 .. option:: -minline-float-divide-min-latency
  73
  74   Generate code for inline divides of floating-point values
  75   using the minimum latency algorithm.
  76
  77 .. option:: -minline-float-divide-max-throughput
  78
  79   Generate code for inline divides of floating-point values
  80   using the maximum throughput algorithm.
  81
  82 .. option:: -mno-inline-float-divide
  83
  84   Do not generate inline code for divides of floating-point values.
  85
  86 .. option:: -minline-int-divide-min-latency
  87
  88   Generate code for inline divides of integer values
  89   using the minimum latency algorithm.
  90
  91 .. option:: -minline-int-divide-max-throughput
  92
  93   Generate code for inline divides of integer values
  94   using the maximum throughput algorithm.
  95
  96 .. option:: -mno-inline-int-divide
  97
  98   Do not generate inline code for divides of integer values.
  99
 100 .. option:: -minline-int-divide
 101
 102   Default setting; overrides :option:`-mno-inline-int-divide`.
 103
 104 .. option:: -minline-sqrt-min-latency
 105
 106   Generate code for inline square roots
 107   using the minimum latency algorithm.
 108
 109 .. option:: -minline-sqrt-max-throughput
 110
 111   Generate code for inline square roots
 112   using the maximum throughput algorithm.
 113
 114 .. option:: -mno-inline-sqrt
 115
 116   Do not generate inline code for ``sqrt``.
 117
 118 .. option:: -mfused-madd, -mno-fused-madd
 119
 120   Do (don't) generate code that uses the fused multiply/add or multiply/subtract
 121   instructions.  The default is to use these instructions.
 122
 123 .. option:: -mno-dwarf2-asm, -mdwarf2-asm
 124
 125   Don't (or do) generate assembler code for the DWARF line number debugging
 126   info.  This may be useful when not using the GNU assembler.
 127
 128 .. option:: -mearly-stop-bits, -mno-early-stop-bits
 129
 130   Allow stop bits to be placed earlier than immediately preceding the
 131   instruction that triggered the stop bit.  This can improve instruction
 132   scheduling, but does not always do so.
 133
 134 .. option:: -mfixed-range={register-range}
 135
 136   Generate code treating the given register range as fixed registers.
 137   A fixed register is one that the register allocator cannot use.  This is
 138   useful when compiling kernel code.  A register range is specified as
 139   two registers separated by a dash.  Multiple register ranges can be
 140   specified separated by a comma.
 141
 142 .. option:: -mtls-size={tls-size}
 143
 144   Specify bit size of immediate TLS offsets.  Valid values are 14, 22, and
 145   64.
 146
 147 .. option:: -mtune={cpu-type}
 148
 149   Tune the instruction scheduling for a particular CPU, Valid values are
 150   :samp:`itanium`, :samp:`itanium1`, :samp:`merced`, :samp:`itanium2`,
 151   and :samp:`mckinley`.
 152
 153 .. option:: -milp32, -mlp64
 154
 155   Generate code for a 32-bit or 64-bit environment.
 156   The 32-bit environment sets int, long and pointer to 32 bits.
 157   The 64-bit environment sets int to 32 bits and long and pointer
 158   to 64 bits.  These are HP-UX specific flags.
 159
 160 .. option:: -mno-sched-br-data-spec, -msched-br-data-spec
 161
 162   (Dis/En)able data speculative scheduling before reload.
 163   This results in generation of ``ld.a`` instructions and
 164   the corresponding check instructions (``ld.c`` / ``chk.a``).
 165   The default setting is disabled.
 166
 167 .. option:: -msched-ar-data-spec, -mno-sched-ar-data-spec
 168
 169   (En/Dis)able data speculative scheduling after reload.
 170   This results in generation of ``ld.a`` instructions and
 171   the corresponding check instructions (``ld.c`` / ``chk.a``).
 172   The default setting is enabled.
 173
 174 .. option:: -mno-sched-control-spec, -msched-control-spec
 175
 176   (Dis/En)able control speculative scheduling.  This feature is
 177   available only during region scheduling (i.e. before reload).
 178   This results in generation of the ``ld.s`` instructions and
 179   the corresponding check instructions ``chk.s``.
 180   The default setting is disabled.
 181
 182 .. option:: -msched-br-in-data-spec, -mno-sched-br-in-data-spec
 183
 184   (En/Dis)able speculative scheduling of the instructions that
 185   are dependent on the data speculative loads before reload.
 186   This is effective only with :option:`-msched-br-data-spec` enabled.
 187   The default setting is enabled.
 188
 189 .. option:: -msched-ar-in-data-spec, -mno-sched-ar-in-data-spec
 190
 191   (En/Dis)able speculative scheduling of the instructions that
 192   are dependent on the data speculative loads after reload.
 193   This is effective only with :option:`-msched-ar-data-spec` enabled.
 194   The default setting is enabled.
 195
 196 .. option:: -msched-in-control-spec, -mno-sched-in-control-spec
 197
 198   (En/Dis)able speculative scheduling of the instructions that
 199   are dependent on the control speculative loads.
 200   This is effective only with :option:`-msched-control-spec` enabled.
 201   The default setting is enabled.
 202
 203 .. option:: -mno-sched-prefer-non-data-spec-insns, -msched-prefer-non-data-spec-insns
 204
 205   If enabled, data-speculative instructions are chosen for schedule
 206   only if there are no other choices at the moment.  This makes
 207   the use of the data speculation much more conservative.
 208   The default setting is disabled.
 209
 210 .. option:: -mno-sched-prefer-non-control-spec-insns, -msched-prefer-non-control-spec-insns
 211
 212   If enabled, control-speculative instructions are chosen for schedule
 213   only if there are no other choices at the moment.  This makes
 214   the use of the control speculation much more conservative.
 215   The default setting is disabled.
 216
 217 .. option:: -mno-sched-count-spec-in-critical-path, -msched-count-spec-in-critical-path
 218
 219   If enabled, speculative dependencies are considered during
 220   computation of the instructions priorities.  This makes the use of the
 221   speculation a bit more conservative.
 222   The default setting is disabled.
 223
 224 .. option:: -msched-spec-ldc
 225
 226   Use a simple data speculation check.  This option is on by default.
 227
 228 .. option:: -msched-control-spec-ldc
 229
 230   Use a simple check for control speculation.  This option is on by default.
 231
 232 .. option:: -msched-stop-bits-after-every-cycle
 233
 234   Place a stop bit after every cycle when scheduling.  This option is on
 235   by default.
 236
 237 .. option:: -msched-fp-mem-deps-zero-cost
 238
 239   Assume that floating-point stores and loads are not likely to cause a conflict
 240   when placed into the same instruction group.  This option is disabled by
 241   default.
 242
 243 .. option:: -msel-sched-dont-check-control-spec
 244
 245   Generate checks for control speculation in selective scheduling.
 246   This flag is disabled by default.
 247
 248 .. option:: -msched-max-memory-insns={max-insns}
 249
 250   Limit on the number of memory insns per instruction group, giving lower
 251   priority to subsequent memory insns attempting to schedule in the same
 252   instruction group. Frequently useful to prevent cache bank conflicts.
 253   The default value is 1.
 254
 255 .. option:: -msched-max-memory-insns-hard-limit
 256
 257   Makes the limit specified by msched-max-memory-insns a hard limit,
 258   disallowing more than that number in an instruction group.
 259   Otherwise, the limit is 'soft', meaning that non-memory operations
 260   are preferred when the limit is reached, but memory operations may still
 261   be scheduled.