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1 ..
2 Copyright 1988-2022 Free Software Foundation, Inc.
3 This is part of the GCC manual.
4 For copying conditions, see the copyright.rst file.
5
6 .. program:: Xtensa
7
8 .. index:: Xtensa Options
9
10 .. _xtensa-options:
11
12 Xtensa Options
13 ^^^^^^^^^^^^^^
14
15 These options are supported for Xtensa targets:
16
17 .. option:: -mconst16, -mno-const16
18
19 Enable or disable use of ``CONST16`` instructions for loading
20 constant values. The ``CONST16`` instruction is currently not a
21 standard option from Tensilica. When enabled, ``CONST16``
22 instructions are always used in place of the standard ``L32R``
23 instructions. The use of ``CONST16`` is enabled by default only if
24 the ``L32R`` instruction is not available.
25
26 .. option:: -mfused-madd, -mno-fused-madd
27
28 Enable or disable use of fused multiply/add and multiply/subtract
29 instructions in the floating-point option. This has no effect if the
30 floating-point option is not also enabled. Disabling fused multiply/add
31 and multiply/subtract instructions forces the compiler to use separate
32 instructions for the multiply and add/subtract operations. This may be
33 desirable in some cases where strict IEEE 754-compliant results are
34 required: the fused multiply add/subtract instructions do not round the
35 intermediate result, thereby producing results with *more* bits of
36 precision than specified by the IEEE standard. Disabling fused multiply
37 add/subtract instructions also ensures that the program output is not
38 sensitive to the compiler's ability to combine multiply and add/subtract
39 operations.
40
41 .. option:: -mserialize-volatile, -mno-serialize-volatile
42
43 When this option is enabled, GCC inserts ``MEMW`` instructions before
44 ``volatile`` memory references to guarantee sequential consistency.
45 The default is :option:`-mserialize-volatile`. Use
46 :option:`-mno-serialize-volatile` to omit the ``MEMW`` instructions.
47
48 .. option:: -mforce-no-pic
49
50 For targets, like GNU/Linux, where all user-mode Xtensa code must be
51 position-independent code (PIC), this option disables PIC for compiling
52 kernel code.
53
54 .. option:: -mtext-section-literals, -mno-text-section-literals
55
56 These options control the treatment of literal pools. The default is
57 :option:`-mno-text-section-literals`, which places literals in a separate
58 section in the output file. This allows the literal pool to be placed
59 in a data RAM/ROM, and it also allows the linker to combine literal
60 pools from separate object files to remove redundant literals and
61 improve code size. With :option:`-mtext-section-literals`, the literals
62 are interspersed in the text section in order to keep them as close as
63 possible to their references. This may be necessary for large assembly
64 files. Literals for each function are placed right before that function.
65
66 .. option:: -mauto-litpools, -mno-auto-litpools
67
68 These options control the treatment of literal pools. The default is
69 :option:`-mno-auto-litpools`, which places literals in a separate
70 section in the output file unless :option:`-mtext-section-literals` is
71 used. With :option:`-mauto-litpools` the literals are interspersed in
72 the text section by the assembler. Compiler does not produce explicit
73 ``.literal`` directives and loads literals into registers with
74 ``MOVI`` instructions instead of ``L32R`` to let the assembler
75 do relaxation and place literals as necessary. This option allows
76 assembler to create several literal pools per function and assemble
77 very big functions, which may not be possible with
78 :option:`-mtext-section-literals`.
79
80 .. option:: -mtarget-align, -mno-target-align
81
82 When this option is enabled, GCC instructs the assembler to
83 automatically align instructions to reduce branch penalties at the
84 expense of some code density. The assembler attempts to widen density
85 instructions to align branch targets and the instructions following call
86 instructions. If there are not enough preceding safe density
87 instructions to align a target, no widening is performed. The
88 default is :option:`-mtarget-align`. These options do not affect the
89 treatment of auto-aligned instructions like ``LOOP``, which the
90 assembler always aligns, either by widening density instructions or
91 by inserting NOP instructions.
92
93 .. option:: -mlongcalls, -mno-longcalls
94
95 When this option is enabled, GCC instructs the assembler to translate
96 direct calls to indirect calls unless it can determine that the target
97 of a direct call is in the range allowed by the call instruction. This
98 translation typically occurs for calls to functions in other source
99 files. Specifically, the assembler translates a direct ``CALL``
100 instruction into an ``L32R`` followed by a ``CALLX`` instruction.
101 The default is :option:`-mno-longcalls`. This option should be used in
102 programs where the call target can potentially be out of range. This
103 option is implemented in the assembler, not the compiler, so the
104 assembly code generated by GCC still shows direct call
105 instructions---look at the disassembled object code to see the actual
106 instructions. Note that the assembler uses an indirect call for
107 every cross-file call, not just those that really are out of range.
108
109 .. option:: -mabi={name}
110
111 Generate code for the specified ABI. Permissible values are: :samp:`call0`,
112 :samp:`windowed`. Default ABI is chosen by the Xtensa core configuration.
113
114 .. option:: -mabi=call0
115
116 When this option is enabled function parameters are passed in registers
117 ``a2`` through ``a7``, registers ``a12`` through ``a15`` are
118 caller-saved, and register ``a15`` may be used as a frame pointer.
119 When this version of the ABI is enabled the C preprocessor symbol
120 ``__XTENSA_CALL0_ABI__`` is defined.
121
122 .. option:: -mabi=windowed
123
124 When this option is enabled function parameters are passed in registers
125 ``a10`` through ``a15``, and called function rotates register window
126 by 8 registers on entry so that its arguments are found in registers
127 ``a2`` through ``a7``. Register ``a7`` may be used as a frame
128 pointer. Register window is rotated 8 registers back upon return.
129 When this version of the ABI is enabled the C preprocessor symbol
130 ``__XTENSA_WINDOWED_ABI__`` is defined.
131
132 .. option:: -mextra-l32r-costs={n}
133
134 Specify an extra cost of instruction RAM/ROM access for ``L32R``
135 instructions, in clock cycles. This affects, when optimizing for speed,
136 whether loading a constant from literal pool using ``L32R`` or
137 synthesizing the constant from a small one with a couple of arithmetic
138 instructions. The default value is 0.