gcc/doc/gccint/machine-descriptions/defining-jump-instruction-patterns.rst

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   2   Copyright 1988-2022 Free Software Foundation, Inc.
   3   This is part of the GCC manual.
   4   For copying conditions, see the copyright.rst file.
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   6 .. index:: jump instruction patterns, defining jump instruction patterns
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   8 .. _jump-patterns:
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  10 Defining Jump Instruction Patterns
  11 **********************************
  12
  13 GCC does not assume anything about how the machine realizes jumps.
  14 The machine description should define a single pattern, usually
  15 a ``define_expand``, which expands to all the required insns.
  16
  17 Usually, this would be a comparison insn to set the condition code
  18 and a separate branch insn testing the condition code and branching
  19 or not according to its value.  For many machines, however,
  20 separating compares and branches is limiting, which is why the
  21 more flexible approach with one ``define_expand`` is used in GCC.
  22 The machine description becomes clearer for architectures that
  23 have compare-and-branch instructions but no condition code.  It also
  24 works better when different sets of comparison operators are supported
  25 by different kinds of conditional branches (e.g. integer vs.
  26 floating-point), or by conditional branches with respect to conditional stores.
  27
  28 Two separate insns are always used on most machines that use a separate
  29 condition code register (see :ref:`condition-code`).
  30
  31 Even in this case having a single entry point for conditional branches
  32 is advantageous, because it handles equally well the case where a single
  33 comparison instruction records the results of both signed and unsigned
  34 comparison of the given operands (with the branch insns coming in distinct
  35 signed and unsigned flavors) as in the x86 or SPARC, and the case where
  36 there are distinct signed and unsigned compare instructions and only
  37 one set of conditional branch instructions as in the PowerPC.