1 /* Dwarf2 Call Frame Information helper routines.
2 Copyright (C) 1992-2019 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
27 #include "tree-pass.h"
31 #include "stor-layout.h"
33 #include "dwarf2out.h"
34 #include "dwarf2asm.h"
35 #include "common/common-target.h"
37 #include "except.h" /* expand_builtin_dwarf_sp_column */
38 #include "profile-count.h" /* For expr.h */
39 #include "expr.h" /* init_return_column_size */
40 #include "output.h" /* asm_out_file */
41 #include "debug.h" /* dwarf2out_do_frame, dwarf2out_do_cfi_asm */
44 /* ??? Poison these here until it can be done generically. They've been
45 totally replaced in this file; make sure it stays that way. */
46 #undef DWARF2_UNWIND_INFO
47 #undef DWARF2_FRAME_INFO
48 #if (GCC_VERSION >= 3000)
49 #pragma GCC poison DWARF2_UNWIND_INFO DWARF2_FRAME_INFO
52 #ifndef INCOMING_RETURN_ADDR_RTX
53 #define INCOMING_RETURN_ADDR_RTX (gcc_unreachable (), NULL_RTX)
56 #ifndef DEFAULT_INCOMING_FRAME_SP_OFFSET
57 #define DEFAULT_INCOMING_FRAME_SP_OFFSET INCOMING_FRAME_SP_OFFSET
60 /* A collected description of an entire row of the abstract CFI table. */
61 struct GTY(()) dw_cfi_row
63 /* The expression that computes the CFA, expressed in two different ways.
64 The CFA member for the simple cases, and the full CFI expression for
65 the complex cases. The later will be a DW_CFA_cfa_expression. */
69 /* The expressions for any register column that is saved. */
72 /* True if the register window is saved. */
76 /* The caller's ORIG_REG is saved in SAVED_IN_REG. */
77 struct GTY(()) reg_saved_in_data
{
83 /* Since we no longer have a proper CFG, we're going to create a facsimile
84 of one on the fly while processing the frame-related insns.
86 We create dw_trace_info structures for each extended basic block beginning
87 and ending at a "save point". Save points are labels, barriers, certain
88 notes, and of course the beginning and end of the function.
90 As we encounter control transfer insns, we propagate the "current"
91 row state across the edges to the starts of traces. When checking is
92 enabled, we validate that we propagate the same data from all sources.
94 All traces are members of the TRACE_INFO array, in the order in which
95 they appear in the instruction stream.
97 All save points are present in the TRACE_INDEX hash, mapping the insn
98 starting a trace to the dw_trace_info describing the trace. */
102 /* The insn that begins the trace. */
105 /* The row state at the beginning and end of the trace. */
106 dw_cfi_row
*beg_row
, *end_row
;
108 /* Tracking for DW_CFA_GNU_args_size. The "true" sizes are those we find
109 while scanning insns. However, the args_size value is irrelevant at
110 any point except can_throw_internal_p insns. Therefore the "delay"
111 sizes the values that must actually be emitted for this trace. */
112 poly_int64_pod beg_true_args_size
, end_true_args_size
;
113 poly_int64_pod beg_delay_args_size
, end_delay_args_size
;
115 /* The first EH insn in the trace, where beg_delay_args_size must be set. */
118 /* The following variables contain data used in interpreting frame related
119 expressions. These are not part of the "real" row state as defined by
120 Dwarf, but it seems like they need to be propagated into a trace in case
121 frame related expressions have been sunk. */
122 /* ??? This seems fragile. These variables are fragments of a larger
123 expression. If we do not keep the entire expression together, we risk
124 not being able to put it together properly. Consider forcing targets
125 to generate self-contained expressions and dropping all of the magic
126 interpretation code in this file. Or at least refusing to shrink wrap
127 any frame related insn that doesn't contain a complete expression. */
129 /* The register used for saving registers to the stack, and its offset
131 dw_cfa_location cfa_store
;
133 /* A temporary register holding an integral value used in adjusting SP
134 or setting up the store_reg. The "offset" field holds the integer
135 value, not an offset. */
136 dw_cfa_location cfa_temp
;
138 /* A set of registers saved in other registers. This is the inverse of
139 the row->reg_save info, if the entry is a DW_CFA_register. This is
140 implemented as a flat array because it normally contains zero or 1
141 entry, depending on the target. IA-64 is the big spender here, using
142 a maximum of 5 entries. */
143 vec
<reg_saved_in_data
> regs_saved_in_regs
;
145 /* An identifier for this trace. Used only for debugging dumps. */
148 /* True if this trace immediately follows NOTE_INSN_SWITCH_TEXT_SECTIONS. */
149 bool switch_sections
;
151 /* True if we've seen different values incoming to beg_true_args_size. */
152 bool args_size_undefined
;
154 /* True if we've seen an insn with a REG_ARGS_SIZE note before EH_HEAD. */
155 bool args_size_defined_for_eh
;
159 /* Hashtable helpers. */
161 struct trace_info_hasher
: nofree_ptr_hash
<dw_trace_info
>
163 static inline hashval_t
hash (const dw_trace_info
*);
164 static inline bool equal (const dw_trace_info
*, const dw_trace_info
*);
168 trace_info_hasher::hash (const dw_trace_info
*ti
)
170 return INSN_UID (ti
->head
);
174 trace_info_hasher::equal (const dw_trace_info
*a
, const dw_trace_info
*b
)
176 return a
->head
== b
->head
;
180 /* The variables making up the pseudo-cfg, as described above. */
181 static vec
<dw_trace_info
> trace_info
;
182 static vec
<dw_trace_info
*> trace_work_list
;
183 static hash_table
<trace_info_hasher
> *trace_index
;
185 /* A vector of call frame insns for the CIE. */
188 /* The state of the first row of the FDE table, which includes the
189 state provided by the CIE. */
190 static GTY(()) dw_cfi_row
*cie_cfi_row
;
192 static GTY(()) reg_saved_in_data
*cie_return_save
;
194 static GTY(()) unsigned long dwarf2out_cfi_label_num
;
196 /* The insn after which a new CFI note should be emitted. */
197 static rtx_insn
*add_cfi_insn
;
199 /* When non-null, add_cfi will add the CFI to this vector. */
200 static cfi_vec
*add_cfi_vec
;
202 /* The current instruction trace. */
203 static dw_trace_info
*cur_trace
;
205 /* The current, i.e. most recently generated, row of the CFI table. */
206 static dw_cfi_row
*cur_row
;
208 /* A copy of the current CFA, for use during the processing of a
210 static dw_cfa_location
*cur_cfa
;
212 /* We delay emitting a register save until either (a) we reach the end
213 of the prologue or (b) the register is clobbered. This clusters
214 register saves so that there are fewer pc advances. */
216 struct queued_reg_save
{
219 poly_int64_pod cfa_offset
;
223 static vec
<queued_reg_save
> queued_reg_saves
;
225 /* True if any CFI directives were emitted at the current insn. */
226 static bool any_cfis_emitted
;
228 /* Short-hand for commonly used register numbers. */
229 static unsigned dw_stack_pointer_regnum
;
230 static unsigned dw_frame_pointer_regnum
;
232 /* Hook used by __throw. */
235 expand_builtin_dwarf_sp_column (void)
237 unsigned int dwarf_regnum
= DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM
);
238 return GEN_INT (DWARF2_FRAME_REG_OUT (dwarf_regnum
, 1));
241 /* MEM is a memory reference for the register size table, each element of
242 which has mode MODE. Initialize column C as a return address column. */
245 init_return_column_size (scalar_int_mode mode
, rtx mem
, unsigned int c
)
247 HOST_WIDE_INT offset
= c
* GET_MODE_SIZE (mode
);
248 HOST_WIDE_INT size
= GET_MODE_SIZE (Pmode
);
249 emit_move_insn (adjust_address (mem
, mode
, offset
),
250 gen_int_mode (size
, mode
));
253 /* Datastructure used by expand_builtin_init_dwarf_reg_sizes and
254 init_one_dwarf_reg_size to communicate on what has been done by the
257 struct init_one_dwarf_reg_state
259 /* Whether the dwarf return column was initialized. */
260 bool wrote_return_column
;
262 /* For each hard register REGNO, whether init_one_dwarf_reg_size
263 was given REGNO to process already. */
264 bool processed_regno
[FIRST_PSEUDO_REGISTER
];
268 /* Helper for expand_builtin_init_dwarf_reg_sizes. Generate code to
269 initialize the dwarf register size table entry corresponding to register
270 REGNO in REGMODE. TABLE is the table base address, SLOTMODE is the mode to
271 use for the size entry to initialize, and INIT_STATE is the communication
272 datastructure conveying what we're doing to our caller. */
275 void init_one_dwarf_reg_size (int regno
, machine_mode regmode
,
276 rtx table
, machine_mode slotmode
,
277 init_one_dwarf_reg_state
*init_state
)
279 const unsigned int dnum
= DWARF_FRAME_REGNUM (regno
);
280 const unsigned int rnum
= DWARF2_FRAME_REG_OUT (dnum
, 1);
281 const unsigned int dcol
= DWARF_REG_TO_UNWIND_COLUMN (rnum
);
283 poly_int64 slotoffset
= dcol
* GET_MODE_SIZE (slotmode
);
284 poly_int64 regsize
= GET_MODE_SIZE (regmode
);
286 init_state
->processed_regno
[regno
] = true;
288 if (rnum
>= DWARF_FRAME_REGISTERS
)
291 if (dnum
== DWARF_FRAME_RETURN_COLUMN
)
293 if (regmode
== VOIDmode
)
295 init_state
->wrote_return_column
= true;
298 /* ??? When is this true? Should it be a test based on DCOL instead? */
299 if (maybe_lt (slotoffset
, 0))
302 emit_move_insn (adjust_address (table
, slotmode
, slotoffset
),
303 gen_int_mode (regsize
, slotmode
));
306 /* Generate code to initialize the dwarf register size table located
307 at the provided ADDRESS. */
310 expand_builtin_init_dwarf_reg_sizes (tree address
)
313 scalar_int_mode mode
= SCALAR_INT_TYPE_MODE (char_type_node
);
314 rtx addr
= expand_normal (address
);
315 rtx mem
= gen_rtx_MEM (BLKmode
, addr
);
317 init_one_dwarf_reg_state init_state
;
319 memset ((char *)&init_state
, 0, sizeof (init_state
));
321 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
323 machine_mode save_mode
;
326 /* No point in processing a register multiple times. This could happen
327 with register spans, e.g. when a reg is first processed as a piece of
328 a span, then as a register on its own later on. */
330 if (init_state
.processed_regno
[i
])
333 save_mode
= targetm
.dwarf_frame_reg_mode (i
);
334 span
= targetm
.dwarf_register_span (gen_rtx_REG (save_mode
, i
));
337 init_one_dwarf_reg_size (i
, save_mode
, mem
, mode
, &init_state
);
340 for (int si
= 0; si
< XVECLEN (span
, 0); si
++)
342 rtx reg
= XVECEXP (span
, 0, si
);
344 init_one_dwarf_reg_size
345 (REGNO (reg
), GET_MODE (reg
), mem
, mode
, &init_state
);
350 if (!init_state
.wrote_return_column
)
351 init_return_column_size (mode
, mem
, DWARF_FRAME_RETURN_COLUMN
);
353 #ifdef DWARF_ALT_FRAME_RETURN_COLUMN
354 init_return_column_size (mode
, mem
, DWARF_ALT_FRAME_RETURN_COLUMN
);
357 targetm
.init_dwarf_reg_sizes_extra (address
);
361 static dw_trace_info
*
362 get_trace_info (rtx_insn
*insn
)
366 return trace_index
->find_with_hash (&dummy
, INSN_UID (insn
));
370 save_point_p (rtx_insn
*insn
)
372 /* Labels, except those that are really jump tables. */
374 return inside_basic_block_p (insn
);
376 /* We split traces at the prologue/epilogue notes because those
377 are points at which the unwind info is usually stable. This
378 makes it easier to find spots with identical unwind info so
379 that we can use remember/restore_state opcodes. */
381 switch (NOTE_KIND (insn
))
383 case NOTE_INSN_PROLOGUE_END
:
384 case NOTE_INSN_EPILOGUE_BEG
:
391 /* Divide OFF by DWARF_CIE_DATA_ALIGNMENT, asserting no remainder. */
393 static inline HOST_WIDE_INT
394 div_data_align (HOST_WIDE_INT off
)
396 HOST_WIDE_INT r
= off
/ DWARF_CIE_DATA_ALIGNMENT
;
397 gcc_assert (r
* DWARF_CIE_DATA_ALIGNMENT
== off
);
401 /* Return true if we need a signed version of a given opcode
402 (e.g. DW_CFA_offset_extended_sf vs DW_CFA_offset_extended). */
405 need_data_align_sf_opcode (HOST_WIDE_INT off
)
407 return DWARF_CIE_DATA_ALIGNMENT
< 0 ? off
> 0 : off
< 0;
410 /* Return a pointer to a newly allocated Call Frame Instruction. */
412 static inline dw_cfi_ref
415 dw_cfi_ref cfi
= ggc_alloc
<dw_cfi_node
> ();
417 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= 0;
418 cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
= 0;
423 /* Return a newly allocated CFI row, with no defined data. */
428 dw_cfi_row
*row
= ggc_cleared_alloc
<dw_cfi_row
> ();
430 row
->cfa
.reg
= INVALID_REGNUM
;
435 /* Return a copy of an existing CFI row. */
438 copy_cfi_row (dw_cfi_row
*src
)
440 dw_cfi_row
*dst
= ggc_alloc
<dw_cfi_row
> ();
443 dst
->reg_save
= vec_safe_copy (src
->reg_save
);
448 /* Return a copy of an existing CFA location. */
450 static dw_cfa_location
*
451 copy_cfa (dw_cfa_location
*src
)
453 dw_cfa_location
*dst
= ggc_alloc
<dw_cfa_location
> ();
458 /* Generate a new label for the CFI info to refer to. */
461 dwarf2out_cfi_label (void)
463 int num
= dwarf2out_cfi_label_num
++;
466 ASM_GENERATE_INTERNAL_LABEL (label
, "LCFI", num
);
468 return xstrdup (label
);
471 /* Add CFI either to the current insn stream or to a vector, or both. */
474 add_cfi (dw_cfi_ref cfi
)
476 any_cfis_emitted
= true;
478 if (add_cfi_insn
!= NULL
)
480 add_cfi_insn
= emit_note_after (NOTE_INSN_CFI
, add_cfi_insn
);
481 NOTE_CFI (add_cfi_insn
) = cfi
;
484 if (add_cfi_vec
!= NULL
)
485 vec_safe_push (*add_cfi_vec
, cfi
);
489 add_cfi_args_size (poly_int64 size
)
491 /* We don't yet have a representation for polynomial sizes. */
492 HOST_WIDE_INT const_size
= size
.to_constant ();
494 dw_cfi_ref cfi
= new_cfi ();
496 /* While we can occasionally have args_size < 0 internally, this state
497 should not persist at a point we actually need an opcode. */
498 gcc_assert (const_size
>= 0);
500 cfi
->dw_cfi_opc
= DW_CFA_GNU_args_size
;
501 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
= const_size
;
507 add_cfi_restore (unsigned reg
)
509 dw_cfi_ref cfi
= new_cfi ();
511 cfi
->dw_cfi_opc
= (reg
& ~0x3f ? DW_CFA_restore_extended
: DW_CFA_restore
);
512 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
517 /* Perform ROW->REG_SAVE[COLUMN] = CFI. CFI may be null, indicating
518 that the register column is no longer saved. */
521 update_row_reg_save (dw_cfi_row
*row
, unsigned column
, dw_cfi_ref cfi
)
523 if (vec_safe_length (row
->reg_save
) <= column
)
524 vec_safe_grow_cleared (row
->reg_save
, column
+ 1);
525 (*row
->reg_save
)[column
] = cfi
;
528 /* This function fills in aa dw_cfa_location structure from a dwarf location
529 descriptor sequence. */
532 get_cfa_from_loc_descr (dw_cfa_location
*cfa
, struct dw_loc_descr_node
*loc
)
534 struct dw_loc_descr_node
*ptr
;
536 cfa
->base_offset
= 0;
540 for (ptr
= loc
; ptr
!= NULL
; ptr
= ptr
->dw_loc_next
)
542 enum dwarf_location_atom op
= ptr
->dw_loc_opc
;
578 cfa
->reg
= op
- DW_OP_reg0
;
581 cfa
->reg
= ptr
->dw_loc_oprnd1
.v
.val_int
;
615 cfa
->reg
= op
- DW_OP_breg0
;
616 cfa
->base_offset
= ptr
->dw_loc_oprnd1
.v
.val_int
;
619 cfa
->reg
= ptr
->dw_loc_oprnd1
.v
.val_int
;
620 cfa
->base_offset
= ptr
->dw_loc_oprnd2
.v
.val_int
;
625 case DW_OP_plus_uconst
:
626 cfa
->offset
= ptr
->dw_loc_oprnd1
.v
.val_unsigned
;
634 /* Find the previous value for the CFA, iteratively. CFI is the opcode
635 to interpret, *LOC will be updated as necessary, *REMEMBER is used for
636 one level of remember/restore state processing. */
639 lookup_cfa_1 (dw_cfi_ref cfi
, dw_cfa_location
*loc
, dw_cfa_location
*remember
)
641 switch (cfi
->dw_cfi_opc
)
643 case DW_CFA_def_cfa_offset
:
644 case DW_CFA_def_cfa_offset_sf
:
645 loc
->offset
= cfi
->dw_cfi_oprnd1
.dw_cfi_offset
;
647 case DW_CFA_def_cfa_register
:
648 loc
->reg
= cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
;
651 case DW_CFA_def_cfa_sf
:
652 loc
->reg
= cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
;
653 loc
->offset
= cfi
->dw_cfi_oprnd2
.dw_cfi_offset
;
655 case DW_CFA_def_cfa_expression
:
656 if (cfi
->dw_cfi_oprnd2
.dw_cfi_cfa_loc
)
657 *loc
= *cfi
->dw_cfi_oprnd2
.dw_cfi_cfa_loc
;
659 get_cfa_from_loc_descr (loc
, cfi
->dw_cfi_oprnd1
.dw_cfi_loc
);
662 case DW_CFA_remember_state
:
663 gcc_assert (!remember
->in_use
);
665 remember
->in_use
= 1;
667 case DW_CFA_restore_state
:
668 gcc_assert (remember
->in_use
);
670 remember
->in_use
= 0;
678 /* Determine if two dw_cfa_location structures define the same data. */
681 cfa_equal_p (const dw_cfa_location
*loc1
, const dw_cfa_location
*loc2
)
683 return (loc1
->reg
== loc2
->reg
684 && known_eq (loc1
->offset
, loc2
->offset
)
685 && loc1
->indirect
== loc2
->indirect
686 && (loc1
->indirect
== 0
687 || known_eq (loc1
->base_offset
, loc2
->base_offset
)));
690 /* Determine if two CFI operands are identical. */
693 cfi_oprnd_equal_p (enum dw_cfi_oprnd_type t
, dw_cfi_oprnd
*a
, dw_cfi_oprnd
*b
)
697 case dw_cfi_oprnd_unused
:
699 case dw_cfi_oprnd_reg_num
:
700 return a
->dw_cfi_reg_num
== b
->dw_cfi_reg_num
;
701 case dw_cfi_oprnd_offset
:
702 return a
->dw_cfi_offset
== b
->dw_cfi_offset
;
703 case dw_cfi_oprnd_addr
:
704 return (a
->dw_cfi_addr
== b
->dw_cfi_addr
705 || strcmp (a
->dw_cfi_addr
, b
->dw_cfi_addr
) == 0);
706 case dw_cfi_oprnd_loc
:
707 return loc_descr_equal_p (a
->dw_cfi_loc
, b
->dw_cfi_loc
);
708 case dw_cfi_oprnd_cfa_loc
:
709 return cfa_equal_p (a
->dw_cfi_cfa_loc
, b
->dw_cfi_cfa_loc
);
714 /* Determine if two CFI entries are identical. */
717 cfi_equal_p (dw_cfi_ref a
, dw_cfi_ref b
)
719 enum dwarf_call_frame_info opc
;
721 /* Make things easier for our callers, including missing operands. */
724 if (a
== NULL
|| b
== NULL
)
727 /* Obviously, the opcodes must match. */
729 if (opc
!= b
->dw_cfi_opc
)
732 /* Compare the two operands, re-using the type of the operands as
733 already exposed elsewhere. */
734 return (cfi_oprnd_equal_p (dw_cfi_oprnd1_desc (opc
),
735 &a
->dw_cfi_oprnd1
, &b
->dw_cfi_oprnd1
)
736 && cfi_oprnd_equal_p (dw_cfi_oprnd2_desc (opc
),
737 &a
->dw_cfi_oprnd2
, &b
->dw_cfi_oprnd2
));
740 /* Determine if two CFI_ROW structures are identical. */
743 cfi_row_equal_p (dw_cfi_row
*a
, dw_cfi_row
*b
)
745 size_t i
, n_a
, n_b
, n_max
;
749 if (!cfi_equal_p (a
->cfa_cfi
, b
->cfa_cfi
))
752 else if (!cfa_equal_p (&a
->cfa
, &b
->cfa
))
755 n_a
= vec_safe_length (a
->reg_save
);
756 n_b
= vec_safe_length (b
->reg_save
);
757 n_max
= MAX (n_a
, n_b
);
759 for (i
= 0; i
< n_max
; ++i
)
761 dw_cfi_ref r_a
= NULL
, r_b
= NULL
;
764 r_a
= (*a
->reg_save
)[i
];
766 r_b
= (*b
->reg_save
)[i
];
768 if (!cfi_equal_p (r_a
, r_b
))
772 if (a
->window_save
!= b
->window_save
)
778 /* The CFA is now calculated from NEW_CFA. Consider OLD_CFA in determining
779 what opcode to emit. Returns the CFI opcode to effect the change, or
780 NULL if NEW_CFA == OLD_CFA. */
783 def_cfa_0 (dw_cfa_location
*old_cfa
, dw_cfa_location
*new_cfa
)
787 /* If nothing changed, no need to issue any call frame instructions. */
788 if (cfa_equal_p (old_cfa
, new_cfa
))
793 HOST_WIDE_INT const_offset
;
794 if (new_cfa
->reg
== old_cfa
->reg
795 && !new_cfa
->indirect
796 && !old_cfa
->indirect
797 && new_cfa
->offset
.is_constant (&const_offset
))
799 /* Construct a "DW_CFA_def_cfa_offset <offset>" instruction, indicating
800 the CFA register did not change but the offset did. The data
801 factoring for DW_CFA_def_cfa_offset_sf happens in output_cfi, or
802 in the assembler via the .cfi_def_cfa_offset directive. */
803 if (const_offset
< 0)
804 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_offset_sf
;
806 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_offset
;
807 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
= const_offset
;
809 else if (new_cfa
->offset
.is_constant ()
810 && known_eq (new_cfa
->offset
, old_cfa
->offset
)
811 && old_cfa
->reg
!= INVALID_REGNUM
812 && !new_cfa
->indirect
813 && !old_cfa
->indirect
)
815 /* Construct a "DW_CFA_def_cfa_register <register>" instruction,
816 indicating the CFA register has changed to <register> but the
817 offset has not changed. This requires the old CFA to have
818 been set as a register plus offset rather than a general
819 DW_CFA_def_cfa_expression. */
820 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_register
;
821 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= new_cfa
->reg
;
823 else if (new_cfa
->indirect
== 0
824 && new_cfa
->offset
.is_constant (&const_offset
))
826 /* Construct a "DW_CFA_def_cfa <register> <offset>" instruction,
827 indicating the CFA register has changed to <register> with
828 the specified offset. The data factoring for DW_CFA_def_cfa_sf
829 happens in output_cfi, or in the assembler via the .cfi_def_cfa
831 if (const_offset
< 0)
832 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_sf
;
834 cfi
->dw_cfi_opc
= DW_CFA_def_cfa
;
835 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= new_cfa
->reg
;
836 cfi
->dw_cfi_oprnd2
.dw_cfi_offset
= const_offset
;
840 /* Construct a DW_CFA_def_cfa_expression instruction to
841 calculate the CFA using a full location expression since no
842 register-offset pair is available. */
843 struct dw_loc_descr_node
*loc_list
;
845 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_expression
;
846 loc_list
= build_cfa_loc (new_cfa
, 0);
847 cfi
->dw_cfi_oprnd1
.dw_cfi_loc
= loc_list
;
848 if (!new_cfa
->offset
.is_constant ()
849 || !new_cfa
->base_offset
.is_constant ())
850 /* It's hard to reconstruct the CFA location for a polynomial
851 expression, so just cache it instead. */
852 cfi
->dw_cfi_oprnd2
.dw_cfi_cfa_loc
= copy_cfa (new_cfa
);
854 cfi
->dw_cfi_oprnd2
.dw_cfi_cfa_loc
= NULL
;
860 /* Similarly, but take OLD_CFA from CUR_ROW, and update it after the fact. */
863 def_cfa_1 (dw_cfa_location
*new_cfa
)
867 if (cur_trace
->cfa_store
.reg
== new_cfa
->reg
&& new_cfa
->indirect
== 0)
868 cur_trace
->cfa_store
.offset
= new_cfa
->offset
;
870 cfi
= def_cfa_0 (&cur_row
->cfa
, new_cfa
);
873 cur_row
->cfa
= *new_cfa
;
874 cur_row
->cfa_cfi
= (cfi
->dw_cfi_opc
== DW_CFA_def_cfa_expression
881 /* Add the CFI for saving a register. REG is the CFA column number.
882 If SREG is -1, the register is saved at OFFSET from the CFA;
883 otherwise it is saved in SREG. */
886 reg_save (unsigned int reg
, unsigned int sreg
, poly_int64 offset
)
888 dw_fde_ref fde
= cfun
? cfun
->fde
: NULL
;
889 dw_cfi_ref cfi
= new_cfi ();
891 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
893 if (sreg
== INVALID_REGNUM
)
895 HOST_WIDE_INT const_offset
;
896 /* When stack is aligned, store REG using DW_CFA_expression with FP. */
897 if (fde
&& fde
->stack_realign
)
899 cfi
->dw_cfi_opc
= DW_CFA_expression
;
900 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
901 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
902 = build_cfa_aligned_loc (&cur_row
->cfa
, offset
,
903 fde
->stack_realignment
);
905 else if (offset
.is_constant (&const_offset
))
907 if (need_data_align_sf_opcode (const_offset
))
908 cfi
->dw_cfi_opc
= DW_CFA_offset_extended_sf
;
909 else if (reg
& ~0x3f)
910 cfi
->dw_cfi_opc
= DW_CFA_offset_extended
;
912 cfi
->dw_cfi_opc
= DW_CFA_offset
;
913 cfi
->dw_cfi_oprnd2
.dw_cfi_offset
= const_offset
;
917 cfi
->dw_cfi_opc
= DW_CFA_expression
;
918 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
919 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
920 = build_cfa_loc (&cur_row
->cfa
, offset
);
923 else if (sreg
== reg
)
925 /* While we could emit something like DW_CFA_same_value or
926 DW_CFA_restore, we never expect to see something like that
927 in a prologue. This is more likely to be a bug. A backend
928 can always bypass this by using REG_CFA_RESTORE directly. */
933 cfi
->dw_cfi_opc
= DW_CFA_register
;
934 cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
= sreg
;
938 update_row_reg_save (cur_row
, reg
, cfi
);
941 /* A subroutine of scan_trace. Check INSN for a REG_ARGS_SIZE note
942 and adjust data structures to match. */
945 notice_args_size (rtx_insn
*insn
)
947 poly_int64 args_size
, delta
;
950 note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL
);
954 if (!cur_trace
->eh_head
)
955 cur_trace
->args_size_defined_for_eh
= true;
957 args_size
= get_args_size (note
);
958 delta
= args_size
- cur_trace
->end_true_args_size
;
959 if (known_eq (delta
, 0))
962 cur_trace
->end_true_args_size
= args_size
;
964 /* If the CFA is computed off the stack pointer, then we must adjust
965 the computation of the CFA as well. */
966 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
968 gcc_assert (!cur_cfa
->indirect
);
970 /* Convert a change in args_size (always a positive in the
971 direction of stack growth) to a change in stack pointer. */
972 if (!STACK_GROWS_DOWNWARD
)
975 cur_cfa
->offset
+= delta
;
979 /* A subroutine of scan_trace. INSN is can_throw_internal. Update the
980 data within the trace related to EH insns and args_size. */
983 notice_eh_throw (rtx_insn
*insn
)
985 poly_int64 args_size
= cur_trace
->end_true_args_size
;
986 if (cur_trace
->eh_head
== NULL
)
988 cur_trace
->eh_head
= insn
;
989 cur_trace
->beg_delay_args_size
= args_size
;
990 cur_trace
->end_delay_args_size
= args_size
;
992 else if (maybe_ne (cur_trace
->end_delay_args_size
, args_size
))
994 cur_trace
->end_delay_args_size
= args_size
;
996 /* ??? If the CFA is the stack pointer, search backward for the last
997 CFI note and insert there. Given that the stack changed for the
998 args_size change, there *must* be such a note in between here and
1000 add_cfi_args_size (args_size
);
1004 /* Short-hand inline for the very common D_F_R (REGNO (x)) operation. */
1005 /* ??? This ought to go into dwarf2out.h, except that dwarf2out.h is
1006 used in places where rtl is prohibited. */
1008 static inline unsigned
1009 dwf_regno (const_rtx reg
)
1011 gcc_assert (REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
1012 return DWARF_FRAME_REGNUM (REGNO (reg
));
1015 /* Compare X and Y for equivalence. The inputs may be REGs or PC_RTX. */
1018 compare_reg_or_pc (rtx x
, rtx y
)
1020 if (REG_P (x
) && REG_P (y
))
1021 return REGNO (x
) == REGNO (y
);
1025 /* Record SRC as being saved in DEST. DEST may be null to delete an
1026 existing entry. SRC may be a register or PC_RTX. */
1029 record_reg_saved_in_reg (rtx dest
, rtx src
)
1031 reg_saved_in_data
*elt
;
1034 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, i
, elt
)
1035 if (compare_reg_or_pc (elt
->orig_reg
, src
))
1038 cur_trace
->regs_saved_in_regs
.unordered_remove (i
);
1040 elt
->saved_in_reg
= dest
;
1047 reg_saved_in_data e
= {src
, dest
};
1048 cur_trace
->regs_saved_in_regs
.safe_push (e
);
1051 /* Add an entry to QUEUED_REG_SAVES saying that REG is now saved at
1052 SREG, or if SREG is NULL then it is saved at OFFSET to the CFA. */
1055 queue_reg_save (rtx reg
, rtx sreg
, poly_int64 offset
)
1058 queued_reg_save e
= {reg
, sreg
, offset
};
1061 /* Duplicates waste space, but it's also necessary to remove them
1062 for correctness, since the queue gets output in reverse order. */
1063 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1064 if (compare_reg_or_pc (q
->reg
, reg
))
1070 queued_reg_saves
.safe_push (e
);
1073 /* Output all the entries in QUEUED_REG_SAVES. */
1076 dwarf2out_flush_queued_reg_saves (void)
1081 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1083 unsigned int reg
, sreg
;
1085 record_reg_saved_in_reg (q
->saved_reg
, q
->reg
);
1087 if (q
->reg
== pc_rtx
)
1088 reg
= DWARF_FRAME_RETURN_COLUMN
;
1090 reg
= dwf_regno (q
->reg
);
1092 sreg
= dwf_regno (q
->saved_reg
);
1094 sreg
= INVALID_REGNUM
;
1095 reg_save (reg
, sreg
, q
->cfa_offset
);
1098 queued_reg_saves
.truncate (0);
1101 /* Does INSN clobber any register which QUEUED_REG_SAVES lists a saved
1102 location for? Or, does it clobber a register which we've previously
1103 said that some other register is saved in, and for which we now
1104 have a new location for? */
1107 clobbers_queued_reg_save (const_rtx insn
)
1112 FOR_EACH_VEC_ELT (queued_reg_saves
, iq
, q
)
1115 reg_saved_in_data
*rir
;
1117 if (modified_in_p (q
->reg
, insn
))
1120 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, ir
, rir
)
1121 if (compare_reg_or_pc (q
->reg
, rir
->orig_reg
)
1122 && modified_in_p (rir
->saved_in_reg
, insn
))
1129 /* What register, if any, is currently saved in REG? */
1132 reg_saved_in (rtx reg
)
1134 unsigned int regn
= REGNO (reg
);
1136 reg_saved_in_data
*rir
;
1139 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1140 if (q
->saved_reg
&& regn
== REGNO (q
->saved_reg
))
1143 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, i
, rir
)
1144 if (regn
== REGNO (rir
->saved_in_reg
))
1145 return rir
->orig_reg
;
1150 /* A subroutine of dwarf2out_frame_debug, process a REG_DEF_CFA note. */
1153 dwarf2out_frame_debug_def_cfa (rtx pat
)
1155 memset (cur_cfa
, 0, sizeof (*cur_cfa
));
1157 pat
= strip_offset (pat
, &cur_cfa
->offset
);
1160 cur_cfa
->indirect
= 1;
1161 pat
= strip_offset (XEXP (pat
, 0), &cur_cfa
->base_offset
);
1163 /* ??? If this fails, we could be calling into the _loc functions to
1164 define a full expression. So far no port does that. */
1165 gcc_assert (REG_P (pat
));
1166 cur_cfa
->reg
= dwf_regno (pat
);
1169 /* A subroutine of dwarf2out_frame_debug, process a REG_ADJUST_CFA note. */
1172 dwarf2out_frame_debug_adjust_cfa (rtx pat
)
1176 gcc_assert (GET_CODE (pat
) == SET
);
1177 dest
= XEXP (pat
, 0);
1178 src
= XEXP (pat
, 1);
1180 switch (GET_CODE (src
))
1183 gcc_assert (dwf_regno (XEXP (src
, 0)) == cur_cfa
->reg
);
1184 cur_cfa
->offset
-= rtx_to_poly_int64 (XEXP (src
, 1));
1194 cur_cfa
->reg
= dwf_regno (dest
);
1195 gcc_assert (cur_cfa
->indirect
== 0);
1198 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_OFFSET note. */
1201 dwarf2out_frame_debug_cfa_offset (rtx set
)
1204 rtx src
, addr
, span
;
1205 unsigned int sregno
;
1207 src
= XEXP (set
, 1);
1208 addr
= XEXP (set
, 0);
1209 gcc_assert (MEM_P (addr
));
1210 addr
= XEXP (addr
, 0);
1212 /* As documented, only consider extremely simple addresses. */
1213 switch (GET_CODE (addr
))
1216 gcc_assert (dwf_regno (addr
) == cur_cfa
->reg
);
1217 offset
= -cur_cfa
->offset
;
1220 gcc_assert (dwf_regno (XEXP (addr
, 0)) == cur_cfa
->reg
);
1221 offset
= rtx_to_poly_int64 (XEXP (addr
, 1)) - cur_cfa
->offset
;
1230 sregno
= DWARF_FRAME_RETURN_COLUMN
;
1234 span
= targetm
.dwarf_register_span (src
);
1235 sregno
= dwf_regno (src
);
1238 /* ??? We'd like to use queue_reg_save, but we need to come up with
1239 a different flushing heuristic for epilogues. */
1241 reg_save (sregno
, INVALID_REGNUM
, offset
);
1244 /* We have a PARALLEL describing where the contents of SRC live.
1245 Adjust the offset for each piece of the PARALLEL. */
1246 poly_int64 span_offset
= offset
;
1248 gcc_assert (GET_CODE (span
) == PARALLEL
);
1250 const int par_len
= XVECLEN (span
, 0);
1251 for (int par_index
= 0; par_index
< par_len
; par_index
++)
1253 rtx elem
= XVECEXP (span
, 0, par_index
);
1254 sregno
= dwf_regno (src
);
1255 reg_save (sregno
, INVALID_REGNUM
, span_offset
);
1256 span_offset
+= GET_MODE_SIZE (GET_MODE (elem
));
1261 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_REGISTER note. */
1264 dwarf2out_frame_debug_cfa_register (rtx set
)
1267 unsigned sregno
, dregno
;
1269 src
= XEXP (set
, 1);
1270 dest
= XEXP (set
, 0);
1272 record_reg_saved_in_reg (dest
, src
);
1274 sregno
= DWARF_FRAME_RETURN_COLUMN
;
1276 sregno
= dwf_regno (src
);
1278 dregno
= dwf_regno (dest
);
1280 /* ??? We'd like to use queue_reg_save, but we need to come up with
1281 a different flushing heuristic for epilogues. */
1282 reg_save (sregno
, dregno
, 0);
1285 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION note. */
1288 dwarf2out_frame_debug_cfa_expression (rtx set
)
1290 rtx src
, dest
, span
;
1291 dw_cfi_ref cfi
= new_cfi ();
1294 dest
= SET_DEST (set
);
1295 src
= SET_SRC (set
);
1297 gcc_assert (REG_P (src
));
1298 gcc_assert (MEM_P (dest
));
1300 span
= targetm
.dwarf_register_span (src
);
1303 regno
= dwf_regno (src
);
1305 cfi
->dw_cfi_opc
= DW_CFA_expression
;
1306 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= regno
;
1307 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
1308 = mem_loc_descriptor (XEXP (dest
, 0), get_address_mode (dest
),
1309 GET_MODE (dest
), VAR_INIT_STATUS_INITIALIZED
);
1311 /* ??? We'd like to use queue_reg_save, were the interface different,
1312 and, as above, we could manage flushing for epilogues. */
1314 update_row_reg_save (cur_row
, regno
, cfi
);
1317 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_VAL_EXPRESSION
1321 dwarf2out_frame_debug_cfa_val_expression (rtx set
)
1323 rtx dest
= SET_DEST (set
);
1324 gcc_assert (REG_P (dest
));
1326 rtx span
= targetm
.dwarf_register_span (dest
);
1329 rtx src
= SET_SRC (set
);
1330 dw_cfi_ref cfi
= new_cfi ();
1331 cfi
->dw_cfi_opc
= DW_CFA_val_expression
;
1332 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= dwf_regno (dest
);
1333 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
1334 = mem_loc_descriptor (src
, GET_MODE (src
),
1335 GET_MODE (dest
), VAR_INIT_STATUS_INITIALIZED
);
1337 update_row_reg_save (cur_row
, dwf_regno (dest
), cfi
);
1340 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_RESTORE note. */
1343 dwarf2out_frame_debug_cfa_restore (rtx reg
)
1345 gcc_assert (REG_P (reg
));
1347 rtx span
= targetm
.dwarf_register_span (reg
);
1350 unsigned int regno
= dwf_regno (reg
);
1351 add_cfi_restore (regno
);
1352 update_row_reg_save (cur_row
, regno
, NULL
);
1356 /* We have a PARALLEL describing where the contents of REG live.
1357 Restore the register for each piece of the PARALLEL. */
1358 gcc_assert (GET_CODE (span
) == PARALLEL
);
1360 const int par_len
= XVECLEN (span
, 0);
1361 for (int par_index
= 0; par_index
< par_len
; par_index
++)
1363 reg
= XVECEXP (span
, 0, par_index
);
1364 gcc_assert (REG_P (reg
));
1365 unsigned int regno
= dwf_regno (reg
);
1366 add_cfi_restore (regno
);
1367 update_row_reg_save (cur_row
, regno
, NULL
);
1372 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_WINDOW_SAVE.
1373 FAKE is true if this is not really a window save but something else.
1375 ??? Perhaps we should note in the CIE where windows are saved (instead
1376 of assuming 0(cfa)) and what registers are in the window. */
1379 dwarf2out_frame_debug_cfa_window_save (bool fake
)
1381 dw_cfi_ref cfi
= new_cfi ();
1383 cfi
->dw_cfi_opc
= DW_CFA_GNU_window_save
;
1386 cur_row
->window_save
= true;
1389 /* Record call frame debugging information for an expression EXPR,
1390 which either sets SP or FP (adjusting how we calculate the frame
1391 address) or saves a register to the stack or another register.
1392 LABEL indicates the address of EXPR.
1394 This function encodes a state machine mapping rtxes to actions on
1395 cfa, cfa_store, and cfa_temp.reg. We describe these rules so
1396 users need not read the source code.
1398 The High-Level Picture
1400 Changes in the register we use to calculate the CFA: Currently we
1401 assume that if you copy the CFA register into another register, we
1402 should take the other one as the new CFA register; this seems to
1403 work pretty well. If it's wrong for some target, it's simple
1404 enough not to set RTX_FRAME_RELATED_P on the insn in question.
1406 Changes in the register we use for saving registers to the stack:
1407 This is usually SP, but not always. Again, we deduce that if you
1408 copy SP into another register (and SP is not the CFA register),
1409 then the new register is the one we will be using for register
1410 saves. This also seems to work.
1412 Register saves: There's not much guesswork about this one; if
1413 RTX_FRAME_RELATED_P is set on an insn which modifies memory, it's a
1414 register save, and the register used to calculate the destination
1415 had better be the one we think we're using for this purpose.
1416 It's also assumed that a copy from a call-saved register to another
1417 register is saving that register if RTX_FRAME_RELATED_P is set on
1418 that instruction. If the copy is from a call-saved register to
1419 the *same* register, that means that the register is now the same
1420 value as in the caller.
1422 Except: If the register being saved is the CFA register, and the
1423 offset is nonzero, we are saving the CFA, so we assume we have to
1424 use DW_CFA_def_cfa_expression. If the offset is 0, we assume that
1425 the intent is to save the value of SP from the previous frame.
1427 In addition, if a register has previously been saved to a different
1430 Invariants / Summaries of Rules
1432 cfa current rule for calculating the CFA. It usually
1433 consists of a register and an offset. This is
1434 actually stored in *cur_cfa, but abbreviated
1435 for the purposes of this documentation.
1436 cfa_store register used by prologue code to save things to the stack
1437 cfa_store.offset is the offset from the value of
1438 cfa_store.reg to the actual CFA
1439 cfa_temp register holding an integral value. cfa_temp.offset
1440 stores the value, which will be used to adjust the
1441 stack pointer. cfa_temp is also used like cfa_store,
1442 to track stores to the stack via fp or a temp reg.
1444 Rules 1- 4: Setting a register's value to cfa.reg or an expression
1445 with cfa.reg as the first operand changes the cfa.reg and its
1446 cfa.offset. Rule 1 and 4 also set cfa_temp.reg and
1449 Rules 6- 9: Set a non-cfa.reg register value to a constant or an
1450 expression yielding a constant. This sets cfa_temp.reg
1451 and cfa_temp.offset.
1453 Rule 5: Create a new register cfa_store used to save items to the
1456 Rules 10-14: Save a register to the stack. Define offset as the
1457 difference of the original location and cfa_store's
1458 location (or cfa_temp's location if cfa_temp is used).
1460 Rules 16-20: If AND operation happens on sp in prologue, we assume
1461 stack is realigned. We will use a group of DW_OP_XXX
1462 expressions to represent the location of the stored
1463 register instead of CFA+offset.
1467 "{a,b}" indicates a choice of a xor b.
1468 "<reg>:cfa.reg" indicates that <reg> must equal cfa.reg.
1471 (set <reg1> <reg2>:cfa.reg)
1472 effects: cfa.reg = <reg1>
1473 cfa.offset unchanged
1474 cfa_temp.reg = <reg1>
1475 cfa_temp.offset = cfa.offset
1478 (set sp ({minus,plus,losum} {sp,fp}:cfa.reg
1479 {<const_int>,<reg>:cfa_temp.reg}))
1480 effects: cfa.reg = sp if fp used
1481 cfa.offset += {+/- <const_int>, cfa_temp.offset} if cfa.reg==sp
1482 cfa_store.offset += {+/- <const_int>, cfa_temp.offset}
1483 if cfa_store.reg==sp
1486 (set fp ({minus,plus,losum} <reg>:cfa.reg <const_int>))
1487 effects: cfa.reg = fp
1488 cfa_offset += +/- <const_int>
1491 (set <reg1> ({plus,losum} <reg2>:cfa.reg <const_int>))
1492 constraints: <reg1> != fp
1494 effects: cfa.reg = <reg1>
1495 cfa_temp.reg = <reg1>
1496 cfa_temp.offset = cfa.offset
1499 (set <reg1> (plus <reg2>:cfa_temp.reg sp:cfa.reg))
1500 constraints: <reg1> != fp
1502 effects: cfa_store.reg = <reg1>
1503 cfa_store.offset = cfa.offset - cfa_temp.offset
1506 (set <reg> <const_int>)
1507 effects: cfa_temp.reg = <reg>
1508 cfa_temp.offset = <const_int>
1511 (set <reg1>:cfa_temp.reg (ior <reg2>:cfa_temp.reg <const_int>))
1512 effects: cfa_temp.reg = <reg1>
1513 cfa_temp.offset |= <const_int>
1516 (set <reg> (high <exp>))
1520 (set <reg> (lo_sum <exp> <const_int>))
1521 effects: cfa_temp.reg = <reg>
1522 cfa_temp.offset = <const_int>
1525 (set (mem ({pre,post}_modify sp:cfa_store (???? <reg1> <const_int>))) <reg2>)
1526 effects: cfa_store.offset -= <const_int>
1527 cfa.offset = cfa_store.offset if cfa.reg == sp
1529 cfa.base_offset = -cfa_store.offset
1532 (set (mem ({pre_inc,pre_dec,post_dec} sp:cfa_store.reg)) <reg>)
1533 effects: cfa_store.offset += -/+ mode_size(mem)
1534 cfa.offset = cfa_store.offset if cfa.reg == sp
1536 cfa.base_offset = -cfa_store.offset
1539 (set (mem ({minus,plus,losum} <reg1>:{cfa_store,cfa_temp} <const_int>))
1542 effects: cfa.reg = <reg1>
1543 cfa.base_offset = -/+ <const_int> - {cfa_store,cfa_temp}.offset
1546 (set (mem <reg1>:{cfa_store,cfa_temp}) <reg2>)
1547 effects: cfa.reg = <reg1>
1548 cfa.base_offset = -{cfa_store,cfa_temp}.offset
1551 (set (mem (post_inc <reg1>:cfa_temp <const_int>)) <reg2>)
1552 effects: cfa.reg = <reg1>
1553 cfa.base_offset = -cfa_temp.offset
1554 cfa_temp.offset -= mode_size(mem)
1557 (set <reg> {unspec, unspec_volatile})
1558 effects: target-dependent
1561 (set sp (and: sp <const_int>))
1562 constraints: cfa_store.reg == sp
1563 effects: cfun->fde.stack_realign = 1
1564 cfa_store.offset = 0
1565 fde->drap_reg = cfa.reg if cfa.reg != sp and cfa.reg != fp
1568 (set (mem ({pre_inc, pre_dec} sp)) (mem (plus (cfa.reg) (const_int))))
1569 effects: cfa_store.offset += -/+ mode_size(mem)
1572 (set (mem ({pre_inc, pre_dec} sp)) fp)
1573 constraints: fde->stack_realign == 1
1574 effects: cfa_store.offset = 0
1575 cfa.reg != HARD_FRAME_POINTER_REGNUM
1578 (set (mem ({pre_inc, pre_dec} sp)) cfa.reg)
1579 constraints: fde->stack_realign == 1
1581 && cfa.indirect == 0
1582 && cfa.reg != HARD_FRAME_POINTER_REGNUM
1583 effects: Use DW_CFA_def_cfa_expression to define cfa
1584 cfa.reg == fde->drap_reg */
1587 dwarf2out_frame_debug_expr (rtx expr
)
1589 rtx src
, dest
, span
;
1593 /* If RTX_FRAME_RELATED_P is set on a PARALLEL, process each member of
1594 the PARALLEL independently. The first element is always processed if
1595 it is a SET. This is for backward compatibility. Other elements
1596 are processed only if they are SETs and the RTX_FRAME_RELATED_P
1597 flag is set in them. */
1598 if (GET_CODE (expr
) == PARALLEL
|| GET_CODE (expr
) == SEQUENCE
)
1601 int limit
= XVECLEN (expr
, 0);
1604 /* PARALLELs have strict read-modify-write semantics, so we
1605 ought to evaluate every rvalue before changing any lvalue.
1606 It's cumbersome to do that in general, but there's an
1607 easy approximation that is enough for all current users:
1608 handle register saves before register assignments. */
1609 if (GET_CODE (expr
) == PARALLEL
)
1610 for (par_index
= 0; par_index
< limit
; par_index
++)
1612 elem
= XVECEXP (expr
, 0, par_index
);
1613 if (GET_CODE (elem
) == SET
1614 && MEM_P (SET_DEST (elem
))
1615 && (RTX_FRAME_RELATED_P (elem
) || par_index
== 0))
1616 dwarf2out_frame_debug_expr (elem
);
1619 for (par_index
= 0; par_index
< limit
; par_index
++)
1621 elem
= XVECEXP (expr
, 0, par_index
);
1622 if (GET_CODE (elem
) == SET
1623 && (!MEM_P (SET_DEST (elem
)) || GET_CODE (expr
) == SEQUENCE
)
1624 && (RTX_FRAME_RELATED_P (elem
) || par_index
== 0))
1625 dwarf2out_frame_debug_expr (elem
);
1630 gcc_assert (GET_CODE (expr
) == SET
);
1632 src
= SET_SRC (expr
);
1633 dest
= SET_DEST (expr
);
1637 rtx rsi
= reg_saved_in (src
);
1644 switch (GET_CODE (dest
))
1647 switch (GET_CODE (src
))
1649 /* Setting FP from SP. */
1651 if (cur_cfa
->reg
== dwf_regno (src
))
1654 /* Update the CFA rule wrt SP or FP. Make sure src is
1655 relative to the current CFA register.
1657 We used to require that dest be either SP or FP, but the
1658 ARM copies SP to a temporary register, and from there to
1659 FP. So we just rely on the backends to only set
1660 RTX_FRAME_RELATED_P on appropriate insns. */
1661 cur_cfa
->reg
= dwf_regno (dest
);
1662 cur_trace
->cfa_temp
.reg
= cur_cfa
->reg
;
1663 cur_trace
->cfa_temp
.offset
= cur_cfa
->offset
;
1667 /* Saving a register in a register. */
1668 gcc_assert (!fixed_regs
[REGNO (dest
)]
1669 /* For the SPARC and its register window. */
1670 || (dwf_regno (src
) == DWARF_FRAME_RETURN_COLUMN
));
1672 /* After stack is aligned, we can only save SP in FP
1673 if drap register is used. In this case, we have
1674 to restore stack pointer with the CFA value and we
1675 don't generate this DWARF information. */
1677 && fde
->stack_realign
1678 && REGNO (src
) == STACK_POINTER_REGNUM
)
1679 gcc_assert (REGNO (dest
) == HARD_FRAME_POINTER_REGNUM
1680 && fde
->drap_reg
!= INVALID_REGNUM
1681 && cur_cfa
->reg
!= dwf_regno (src
));
1683 queue_reg_save (src
, dest
, 0);
1690 if (dest
== stack_pointer_rtx
)
1694 if (REG_P (XEXP (src
, 1)))
1696 gcc_assert (dwf_regno (XEXP (src
, 1))
1697 == cur_trace
->cfa_temp
.reg
);
1698 offset
= cur_trace
->cfa_temp
.offset
;
1700 else if (!poly_int_rtx_p (XEXP (src
, 1), &offset
))
1703 if (XEXP (src
, 0) == hard_frame_pointer_rtx
)
1705 /* Restoring SP from FP in the epilogue. */
1706 gcc_assert (cur_cfa
->reg
== dw_frame_pointer_regnum
);
1707 cur_cfa
->reg
= dw_stack_pointer_regnum
;
1709 else if (GET_CODE (src
) == LO_SUM
)
1710 /* Assume we've set the source reg of the LO_SUM from sp. */
1713 gcc_assert (XEXP (src
, 0) == stack_pointer_rtx
);
1715 if (GET_CODE (src
) != MINUS
)
1717 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1718 cur_cfa
->offset
+= offset
;
1719 if (cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
)
1720 cur_trace
->cfa_store
.offset
+= offset
;
1722 else if (dest
== hard_frame_pointer_rtx
)
1725 /* Either setting the FP from an offset of the SP,
1726 or adjusting the FP */
1727 gcc_assert (frame_pointer_needed
);
1729 gcc_assert (REG_P (XEXP (src
, 0))
1730 && dwf_regno (XEXP (src
, 0)) == cur_cfa
->reg
);
1731 offset
= rtx_to_poly_int64 (XEXP (src
, 1));
1732 if (GET_CODE (src
) != MINUS
)
1734 cur_cfa
->offset
+= offset
;
1735 cur_cfa
->reg
= dw_frame_pointer_regnum
;
1739 gcc_assert (GET_CODE (src
) != MINUS
);
1742 if (REG_P (XEXP (src
, 0))
1743 && dwf_regno (XEXP (src
, 0)) == cur_cfa
->reg
1744 && poly_int_rtx_p (XEXP (src
, 1), &offset
))
1746 /* Setting a temporary CFA register that will be copied
1747 into the FP later on. */
1749 cur_cfa
->offset
+= offset
;
1750 cur_cfa
->reg
= dwf_regno (dest
);
1751 /* Or used to save regs to the stack. */
1752 cur_trace
->cfa_temp
.reg
= cur_cfa
->reg
;
1753 cur_trace
->cfa_temp
.offset
= cur_cfa
->offset
;
1757 else if (REG_P (XEXP (src
, 0))
1758 && dwf_regno (XEXP (src
, 0)) == cur_trace
->cfa_temp
.reg
1759 && XEXP (src
, 1) == stack_pointer_rtx
)
1761 /* Setting a scratch register that we will use instead
1762 of SP for saving registers to the stack. */
1763 gcc_assert (cur_cfa
->reg
== dw_stack_pointer_regnum
);
1764 cur_trace
->cfa_store
.reg
= dwf_regno (dest
);
1765 cur_trace
->cfa_store
.offset
1766 = cur_cfa
->offset
- cur_trace
->cfa_temp
.offset
;
1770 else if (GET_CODE (src
) == LO_SUM
1771 && poly_int_rtx_p (XEXP (src
, 1),
1772 &cur_trace
->cfa_temp
.offset
))
1773 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1781 case CONST_POLY_INT
:
1782 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1783 cur_trace
->cfa_temp
.offset
= rtx_to_poly_int64 (src
);
1788 gcc_assert (REG_P (XEXP (src
, 0))
1789 && dwf_regno (XEXP (src
, 0)) == cur_trace
->cfa_temp
.reg
1790 && CONST_INT_P (XEXP (src
, 1)));
1792 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1793 if (!can_ior_p (cur_trace
->cfa_temp
.offset
, INTVAL (XEXP (src
, 1)),
1794 &cur_trace
->cfa_temp
.offset
))
1795 /* The target shouldn't generate this kind of CFI note if we
1796 can't represent it. */
1800 /* Skip over HIGH, assuming it will be followed by a LO_SUM,
1801 which will fill in all of the bits. */
1808 case UNSPEC_VOLATILE
:
1809 /* All unspecs should be represented by REG_CFA_* notes. */
1815 /* If this AND operation happens on stack pointer in prologue,
1816 we assume the stack is realigned and we extract the
1818 if (fde
&& XEXP (src
, 0) == stack_pointer_rtx
)
1820 /* We interpret reg_save differently with stack_realign set.
1821 Thus we must flush whatever we have queued first. */
1822 dwarf2out_flush_queued_reg_saves ();
1824 gcc_assert (cur_trace
->cfa_store
.reg
1825 == dwf_regno (XEXP (src
, 0)));
1826 fde
->stack_realign
= 1;
1827 fde
->stack_realignment
= INTVAL (XEXP (src
, 1));
1828 cur_trace
->cfa_store
.offset
= 0;
1830 if (cur_cfa
->reg
!= dw_stack_pointer_regnum
1831 && cur_cfa
->reg
!= dw_frame_pointer_regnum
)
1832 fde
->drap_reg
= cur_cfa
->reg
;
1843 /* Saving a register to the stack. Make sure dest is relative to the
1845 switch (GET_CODE (XEXP (dest
, 0)))
1851 /* We can't handle variable size modifications. */
1852 offset
= -rtx_to_poly_int64 (XEXP (XEXP (XEXP (dest
, 0), 1), 1));
1854 gcc_assert (REGNO (XEXP (XEXP (dest
, 0), 0)) == STACK_POINTER_REGNUM
1855 && cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
);
1857 cur_trace
->cfa_store
.offset
+= offset
;
1858 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1859 cur_cfa
->offset
= cur_trace
->cfa_store
.offset
;
1861 if (GET_CODE (XEXP (dest
, 0)) == POST_MODIFY
)
1862 offset
-= cur_trace
->cfa_store
.offset
;
1864 offset
= -cur_trace
->cfa_store
.offset
;
1871 offset
= GET_MODE_SIZE (GET_MODE (dest
));
1872 if (GET_CODE (XEXP (dest
, 0)) == PRE_INC
)
1875 gcc_assert ((REGNO (XEXP (XEXP (dest
, 0), 0))
1876 == STACK_POINTER_REGNUM
)
1877 && cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
);
1879 cur_trace
->cfa_store
.offset
+= offset
;
1881 /* Rule 18: If stack is aligned, we will use FP as a
1882 reference to represent the address of the stored
1885 && fde
->stack_realign
1887 && REGNO (src
) == HARD_FRAME_POINTER_REGNUM
)
1889 gcc_assert (cur_cfa
->reg
!= dw_frame_pointer_regnum
);
1890 cur_trace
->cfa_store
.offset
= 0;
1893 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1894 cur_cfa
->offset
= cur_trace
->cfa_store
.offset
;
1896 if (GET_CODE (XEXP (dest
, 0)) == POST_DEC
)
1897 offset
+= -cur_trace
->cfa_store
.offset
;
1899 offset
= -cur_trace
->cfa_store
.offset
;
1903 /* With an offset. */
1910 gcc_assert (REG_P (XEXP (XEXP (dest
, 0), 0)));
1911 offset
= rtx_to_poly_int64 (XEXP (XEXP (dest
, 0), 1));
1912 if (GET_CODE (XEXP (dest
, 0)) == MINUS
)
1915 regno
= dwf_regno (XEXP (XEXP (dest
, 0), 0));
1917 if (cur_cfa
->reg
== regno
)
1918 offset
-= cur_cfa
->offset
;
1919 else if (cur_trace
->cfa_store
.reg
== regno
)
1920 offset
-= cur_trace
->cfa_store
.offset
;
1923 gcc_assert (cur_trace
->cfa_temp
.reg
== regno
);
1924 offset
-= cur_trace
->cfa_temp
.offset
;
1930 /* Without an offset. */
1933 unsigned int regno
= dwf_regno (XEXP (dest
, 0));
1935 if (cur_cfa
->reg
== regno
)
1936 offset
= -cur_cfa
->offset
;
1937 else if (cur_trace
->cfa_store
.reg
== regno
)
1938 offset
= -cur_trace
->cfa_store
.offset
;
1941 gcc_assert (cur_trace
->cfa_temp
.reg
== regno
);
1942 offset
= -cur_trace
->cfa_temp
.offset
;
1949 gcc_assert (cur_trace
->cfa_temp
.reg
1950 == dwf_regno (XEXP (XEXP (dest
, 0), 0)));
1951 offset
= -cur_trace
->cfa_temp
.offset
;
1952 cur_trace
->cfa_temp
.offset
-= GET_MODE_SIZE (GET_MODE (dest
));
1960 /* If the source operand of this MEM operation is a memory,
1961 we only care how much stack grew. */
1966 && REGNO (src
) != STACK_POINTER_REGNUM
1967 && REGNO (src
) != HARD_FRAME_POINTER_REGNUM
1968 && dwf_regno (src
) == cur_cfa
->reg
)
1970 /* We're storing the current CFA reg into the stack. */
1972 if (known_eq (cur_cfa
->offset
, 0))
1975 /* If stack is aligned, putting CFA reg into stack means
1976 we can no longer use reg + offset to represent CFA.
1977 Here we use DW_CFA_def_cfa_expression instead. The
1978 result of this expression equals to the original CFA
1981 && fde
->stack_realign
1982 && cur_cfa
->indirect
== 0
1983 && cur_cfa
->reg
!= dw_frame_pointer_regnum
)
1985 gcc_assert (fde
->drap_reg
== cur_cfa
->reg
);
1987 cur_cfa
->indirect
= 1;
1988 cur_cfa
->reg
= dw_frame_pointer_regnum
;
1989 cur_cfa
->base_offset
= offset
;
1990 cur_cfa
->offset
= 0;
1992 fde
->drap_reg_saved
= 1;
1996 /* If the source register is exactly the CFA, assume
1997 we're saving SP like any other register; this happens
1999 queue_reg_save (stack_pointer_rtx
, NULL_RTX
, offset
);
2004 /* Otherwise, we'll need to look in the stack to
2005 calculate the CFA. */
2006 rtx x
= XEXP (dest
, 0);
2010 gcc_assert (REG_P (x
));
2012 cur_cfa
->reg
= dwf_regno (x
);
2013 cur_cfa
->base_offset
= offset
;
2014 cur_cfa
->indirect
= 1;
2020 span
= targetm
.dwarf_register_span (src
);
2025 queue_reg_save (src
, NULL_RTX
, offset
);
2028 /* We have a PARALLEL describing where the contents of SRC live.
2029 Queue register saves for each piece of the PARALLEL. */
2030 poly_int64 span_offset
= offset
;
2032 gcc_assert (GET_CODE (span
) == PARALLEL
);
2034 const int par_len
= XVECLEN (span
, 0);
2035 for (int par_index
= 0; par_index
< par_len
; par_index
++)
2037 rtx elem
= XVECEXP (span
, 0, par_index
);
2038 queue_reg_save (elem
, NULL_RTX
, span_offset
);
2039 span_offset
+= GET_MODE_SIZE (GET_MODE (elem
));
2049 /* Record call frame debugging information for INSN, which either sets
2050 SP or FP (adjusting how we calculate the frame address) or saves a
2051 register to the stack. */
2054 dwarf2out_frame_debug (rtx_insn
*insn
)
2057 bool handled_one
= false;
2059 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2060 switch (REG_NOTE_KIND (note
))
2062 case REG_FRAME_RELATED_EXPR
:
2063 pat
= XEXP (note
, 0);
2066 case REG_CFA_DEF_CFA
:
2067 dwarf2out_frame_debug_def_cfa (XEXP (note
, 0));
2071 case REG_CFA_ADJUST_CFA
:
2076 if (GET_CODE (n
) == PARALLEL
)
2077 n
= XVECEXP (n
, 0, 0);
2079 dwarf2out_frame_debug_adjust_cfa (n
);
2083 case REG_CFA_OFFSET
:
2086 n
= single_set (insn
);
2087 dwarf2out_frame_debug_cfa_offset (n
);
2091 case REG_CFA_REGISTER
:
2096 if (GET_CODE (n
) == PARALLEL
)
2097 n
= XVECEXP (n
, 0, 0);
2099 dwarf2out_frame_debug_cfa_register (n
);
2103 case REG_CFA_EXPRESSION
:
2104 case REG_CFA_VAL_EXPRESSION
:
2107 n
= single_set (insn
);
2109 if (REG_NOTE_KIND (note
) == REG_CFA_EXPRESSION
)
2110 dwarf2out_frame_debug_cfa_expression (n
);
2112 dwarf2out_frame_debug_cfa_val_expression (n
);
2117 case REG_CFA_RESTORE
:
2122 if (GET_CODE (n
) == PARALLEL
)
2123 n
= XVECEXP (n
, 0, 0);
2126 dwarf2out_frame_debug_cfa_restore (n
);
2130 case REG_CFA_SET_VDRAP
:
2134 dw_fde_ref fde
= cfun
->fde
;
2137 gcc_assert (fde
->vdrap_reg
== INVALID_REGNUM
);
2139 fde
->vdrap_reg
= dwf_regno (n
);
2145 case REG_CFA_TOGGLE_RA_MANGLE
:
2146 /* This uses the same DWARF opcode as the next operation. */
2147 dwarf2out_frame_debug_cfa_window_save (true);
2151 case REG_CFA_WINDOW_SAVE
:
2152 dwarf2out_frame_debug_cfa_window_save (false);
2156 case REG_CFA_FLUSH_QUEUE
:
2157 /* The actual flush happens elsewhere. */
2167 pat
= PATTERN (insn
);
2169 dwarf2out_frame_debug_expr (pat
);
2171 /* Check again. A parallel can save and update the same register.
2172 We could probably check just once, here, but this is safer than
2173 removing the check at the start of the function. */
2174 if (clobbers_queued_reg_save (pat
))
2175 dwarf2out_flush_queued_reg_saves ();
2179 /* Emit CFI info to change the state from OLD_ROW to NEW_ROW. */
2182 change_cfi_row (dw_cfi_row
*old_row
, dw_cfi_row
*new_row
)
2184 size_t i
, n_old
, n_new
, n_max
;
2187 if (new_row
->cfa_cfi
&& !cfi_equal_p (old_row
->cfa_cfi
, new_row
->cfa_cfi
))
2188 add_cfi (new_row
->cfa_cfi
);
2191 cfi
= def_cfa_0 (&old_row
->cfa
, &new_row
->cfa
);
2196 n_old
= vec_safe_length (old_row
->reg_save
);
2197 n_new
= vec_safe_length (new_row
->reg_save
);
2198 n_max
= MAX (n_old
, n_new
);
2200 for (i
= 0; i
< n_max
; ++i
)
2202 dw_cfi_ref r_old
= NULL
, r_new
= NULL
;
2205 r_old
= (*old_row
->reg_save
)[i
];
2207 r_new
= (*new_row
->reg_save
)[i
];
2211 else if (r_new
== NULL
)
2212 add_cfi_restore (i
);
2213 else if (!cfi_equal_p (r_old
, r_new
))
2217 if (!old_row
->window_save
&& new_row
->window_save
)
2219 dw_cfi_ref cfi
= new_cfi ();
2221 cfi
->dw_cfi_opc
= DW_CFA_GNU_window_save
;
2226 /* Examine CFI and return true if a cfi label and set_loc is needed
2227 beforehand. Even when generating CFI assembler instructions, we
2228 still have to add the cfi to the list so that lookup_cfa_1 works
2229 later on. When -g2 and above we even need to force emitting of
2230 CFI labels and add to list a DW_CFA_set_loc for convert_cfa_to_fb_loc_list
2231 purposes. If we're generating DWARF3 output we use DW_OP_call_frame_cfa
2232 and so don't use convert_cfa_to_fb_loc_list. */
2235 cfi_label_required_p (dw_cfi_ref cfi
)
2237 if (!dwarf2out_do_cfi_asm ())
2240 if (dwarf_version
== 2
2241 && debug_info_level
> DINFO_LEVEL_TERSE
2242 && (write_symbols
== DWARF2_DEBUG
2243 || write_symbols
== VMS_AND_DWARF2_DEBUG
))
2245 switch (cfi
->dw_cfi_opc
)
2247 case DW_CFA_def_cfa_offset
:
2248 case DW_CFA_def_cfa_offset_sf
:
2249 case DW_CFA_def_cfa_register
:
2250 case DW_CFA_def_cfa
:
2251 case DW_CFA_def_cfa_sf
:
2252 case DW_CFA_def_cfa_expression
:
2253 case DW_CFA_restore_state
:
2262 /* Walk the function, looking for NOTE_INSN_CFI notes. Add the CFIs to the
2263 function's FDE, adding CFI labels and set_loc/advance_loc opcodes as
2266 add_cfis_to_fde (void)
2268 dw_fde_ref fde
= cfun
->fde
;
2269 rtx_insn
*insn
, *next
;
2271 for (insn
= get_insns (); insn
; insn
= next
)
2273 next
= NEXT_INSN (insn
);
2275 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_SWITCH_TEXT_SECTIONS
)
2276 fde
->dw_fde_switch_cfi_index
= vec_safe_length (fde
->dw_fde_cfi
);
2278 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_CFI
)
2280 bool required
= cfi_label_required_p (NOTE_CFI (insn
));
2282 if (NOTE_P (next
) && NOTE_KIND (next
) == NOTE_INSN_CFI
)
2284 required
|= cfi_label_required_p (NOTE_CFI (next
));
2285 next
= NEXT_INSN (next
);
2287 else if (active_insn_p (next
)
2288 || (NOTE_P (next
) && (NOTE_KIND (next
)
2289 == NOTE_INSN_SWITCH_TEXT_SECTIONS
)))
2292 next
= NEXT_INSN (next
);
2295 int num
= dwarf2out_cfi_label_num
;
2296 const char *label
= dwarf2out_cfi_label ();
2299 /* Set the location counter to the new label. */
2301 xcfi
->dw_cfi_opc
= DW_CFA_advance_loc4
;
2302 xcfi
->dw_cfi_oprnd1
.dw_cfi_addr
= label
;
2303 vec_safe_push (fde
->dw_fde_cfi
, xcfi
);
2305 rtx_note
*tmp
= emit_note_before (NOTE_INSN_CFI_LABEL
, insn
);
2306 NOTE_LABEL_NUMBER (tmp
) = num
;
2311 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_CFI
)
2312 vec_safe_push (fde
->dw_fde_cfi
, NOTE_CFI (insn
));
2313 insn
= NEXT_INSN (insn
);
2315 while (insn
!= next
);
2320 static void dump_cfi_row (FILE *f
, dw_cfi_row
*row
);
2322 /* If LABEL is the start of a trace, then initialize the state of that
2323 trace from CUR_TRACE and CUR_ROW. */
2326 maybe_record_trace_start (rtx_insn
*start
, rtx_insn
*origin
)
2330 ti
= get_trace_info (start
);
2331 gcc_assert (ti
!= NULL
);
2335 fprintf (dump_file
, " saw edge from trace %u to %u (via %s %d)\n",
2336 cur_trace
->id
, ti
->id
,
2337 (origin
? rtx_name
[(int) GET_CODE (origin
)] : "fallthru"),
2338 (origin
? INSN_UID (origin
) : 0));
2341 poly_int64 args_size
= cur_trace
->end_true_args_size
;
2342 if (ti
->beg_row
== NULL
)
2344 /* This is the first time we've encountered this trace. Propagate
2345 state across the edge and push the trace onto the work list. */
2346 ti
->beg_row
= copy_cfi_row (cur_row
);
2347 ti
->beg_true_args_size
= args_size
;
2349 ti
->cfa_store
= cur_trace
->cfa_store
;
2350 ti
->cfa_temp
= cur_trace
->cfa_temp
;
2351 ti
->regs_saved_in_regs
= cur_trace
->regs_saved_in_regs
.copy ();
2353 trace_work_list
.safe_push (ti
);
2356 fprintf (dump_file
, "\tpush trace %u to worklist\n", ti
->id
);
2361 /* We ought to have the same state incoming to a given trace no
2362 matter how we arrive at the trace. Anything else means we've
2363 got some kind of optimization error. */
2365 if (!cfi_row_equal_p (cur_row
, ti
->beg_row
))
2369 fprintf (dump_file
, "Inconsistent CFI state!\n");
2370 fprintf (dump_file
, "SHOULD have:\n");
2371 dump_cfi_row (dump_file
, ti
->beg_row
);
2372 fprintf (dump_file
, "DO have:\n");
2373 dump_cfi_row (dump_file
, cur_row
);
2380 /* The args_size is allowed to conflict if it isn't actually used. */
2381 if (maybe_ne (ti
->beg_true_args_size
, args_size
))
2382 ti
->args_size_undefined
= true;
2386 /* Similarly, but handle the args_size and CFA reset across EH
2387 and non-local goto edges. */
2390 maybe_record_trace_start_abnormal (rtx_insn
*start
, rtx_insn
*origin
)
2392 poly_int64 save_args_size
, delta
;
2393 dw_cfa_location save_cfa
;
2395 save_args_size
= cur_trace
->end_true_args_size
;
2396 if (known_eq (save_args_size
, 0))
2398 maybe_record_trace_start (start
, origin
);
2402 delta
= -save_args_size
;
2403 cur_trace
->end_true_args_size
= 0;
2405 save_cfa
= cur_row
->cfa
;
2406 if (cur_row
->cfa
.reg
== dw_stack_pointer_regnum
)
2408 /* Convert a change in args_size (always a positive in the
2409 direction of stack growth) to a change in stack pointer. */
2410 if (!STACK_GROWS_DOWNWARD
)
2413 cur_row
->cfa
.offset
+= delta
;
2416 maybe_record_trace_start (start
, origin
);
2418 cur_trace
->end_true_args_size
= save_args_size
;
2419 cur_row
->cfa
= save_cfa
;
2422 /* Propagate CUR_TRACE state to the destinations implied by INSN. */
2423 /* ??? Sadly, this is in large part a duplicate of make_edges. */
2426 create_trace_edges (rtx_insn
*insn
)
2433 rtx_jump_table_data
*table
;
2435 if (find_reg_note (insn
, REG_NON_LOCAL_GOTO
, NULL_RTX
))
2438 if (tablejump_p (insn
, NULL
, &table
))
2440 rtvec vec
= table
->get_labels ();
2442 n
= GET_NUM_ELEM (vec
);
2443 for (i
= 0; i
< n
; ++i
)
2445 rtx_insn
*lab
= as_a
<rtx_insn
*> (XEXP (RTVEC_ELT (vec
, i
), 0));
2446 maybe_record_trace_start (lab
, insn
);
2449 /* Handle casesi dispatch insns. */
2450 if ((tmp
= tablejump_casesi_pattern (insn
)) != NULL_RTX
)
2452 rtx_insn
* lab
= label_ref_label (XEXP (SET_SRC (tmp
), 2));
2453 maybe_record_trace_start (lab
, insn
);
2456 else if (computed_jump_p (insn
))
2460 FOR_EACH_VEC_SAFE_ELT (forced_labels
, i
, temp
)
2461 maybe_record_trace_start (temp
, insn
);
2463 else if (returnjump_p (insn
))
2465 else if ((tmp
= extract_asm_operands (PATTERN (insn
))) != NULL
)
2467 n
= ASM_OPERANDS_LABEL_LENGTH (tmp
);
2468 for (i
= 0; i
< n
; ++i
)
2471 as_a
<rtx_insn
*> (XEXP (ASM_OPERANDS_LABEL (tmp
, i
), 0));
2472 maybe_record_trace_start (lab
, insn
);
2477 rtx_insn
*lab
= JUMP_LABEL_AS_INSN (insn
);
2478 gcc_assert (lab
!= NULL
);
2479 maybe_record_trace_start (lab
, insn
);
2482 else if (CALL_P (insn
))
2484 /* Sibling calls don't have edges inside this function. */
2485 if (SIBLING_CALL_P (insn
))
2488 /* Process non-local goto edges. */
2489 if (can_nonlocal_goto (insn
))
2490 for (rtx_insn_list
*lab
= nonlocal_goto_handler_labels
;
2493 maybe_record_trace_start_abnormal (lab
->insn (), insn
);
2495 else if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
2497 int i
, n
= seq
->len ();
2498 for (i
= 0; i
< n
; ++i
)
2499 create_trace_edges (seq
->insn (i
));
2503 /* Process EH edges. */
2504 if (CALL_P (insn
) || cfun
->can_throw_non_call_exceptions
)
2506 eh_landing_pad lp
= get_eh_landing_pad_from_rtx (insn
);
2508 maybe_record_trace_start_abnormal (lp
->landing_pad
, insn
);
2512 /* A subroutine of scan_trace. Do what needs to be done "after" INSN. */
2515 scan_insn_after (rtx_insn
*insn
)
2517 if (RTX_FRAME_RELATED_P (insn
))
2518 dwarf2out_frame_debug (insn
);
2519 notice_args_size (insn
);
2522 /* Scan the trace beginning at INSN and create the CFI notes for the
2523 instructions therein. */
2526 scan_trace (dw_trace_info
*trace
, bool entry
)
2528 rtx_insn
*prev
, *insn
= trace
->head
;
2529 dw_cfa_location this_cfa
;
2532 fprintf (dump_file
, "Processing trace %u : start at %s %d\n",
2533 trace
->id
, rtx_name
[(int) GET_CODE (insn
)],
2536 trace
->end_row
= copy_cfi_row (trace
->beg_row
);
2537 trace
->end_true_args_size
= trace
->beg_true_args_size
;
2540 cur_row
= trace
->end_row
;
2542 this_cfa
= cur_row
->cfa
;
2543 cur_cfa
= &this_cfa
;
2545 /* If the current function starts with a non-standard incoming frame
2546 sp offset, emit a note before the first instruction. */
2548 && DEFAULT_INCOMING_FRAME_SP_OFFSET
!= INCOMING_FRAME_SP_OFFSET
)
2550 add_cfi_insn
= insn
;
2551 gcc_assert (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_DELETED
);
2552 this_cfa
.offset
= INCOMING_FRAME_SP_OFFSET
;
2553 def_cfa_1 (&this_cfa
);
2556 for (prev
= insn
, insn
= NEXT_INSN (insn
);
2558 prev
= insn
, insn
= NEXT_INSN (insn
))
2562 /* Do everything that happens "before" the insn. */
2563 add_cfi_insn
= prev
;
2565 /* Notice the end of a trace. */
2566 if (BARRIER_P (insn
))
2568 /* Don't bother saving the unneeded queued registers at all. */
2569 queued_reg_saves
.truncate (0);
2572 if (save_point_p (insn
))
2574 /* Propagate across fallthru edges. */
2575 dwarf2out_flush_queued_reg_saves ();
2576 maybe_record_trace_start (insn
, NULL
);
2580 if (DEBUG_INSN_P (insn
) || !inside_basic_block_p (insn
))
2583 /* Handle all changes to the row state. Sequences require special
2584 handling for the positioning of the notes. */
2585 if (rtx_sequence
*pat
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
2588 int i
, n
= pat
->len ();
2590 control
= pat
->insn (0);
2591 if (can_throw_internal (control
))
2592 notice_eh_throw (control
);
2593 dwarf2out_flush_queued_reg_saves ();
2595 if (JUMP_P (control
) && INSN_ANNULLED_BRANCH_P (control
))
2597 /* ??? Hopefully multiple delay slots are not annulled. */
2598 gcc_assert (n
== 2);
2599 gcc_assert (!RTX_FRAME_RELATED_P (control
));
2600 gcc_assert (!find_reg_note (control
, REG_ARGS_SIZE
, NULL
));
2602 elt
= pat
->insn (1);
2604 if (INSN_FROM_TARGET_P (elt
))
2606 cfi_vec save_row_reg_save
;
2608 /* If ELT is an instruction from target of an annulled
2609 branch, the effects are for the target only and so
2610 the args_size and CFA along the current path
2611 shouldn't change. */
2612 add_cfi_insn
= NULL
;
2613 poly_int64 restore_args_size
= cur_trace
->end_true_args_size
;
2614 cur_cfa
= &cur_row
->cfa
;
2615 save_row_reg_save
= vec_safe_copy (cur_row
->reg_save
);
2617 scan_insn_after (elt
);
2619 /* ??? Should we instead save the entire row state? */
2620 gcc_assert (!queued_reg_saves
.length ());
2622 create_trace_edges (control
);
2624 cur_trace
->end_true_args_size
= restore_args_size
;
2625 cur_row
->cfa
= this_cfa
;
2626 cur_row
->reg_save
= save_row_reg_save
;
2627 cur_cfa
= &this_cfa
;
2631 /* If ELT is a annulled branch-taken instruction (i.e.
2632 executed only when branch is not taken), the args_size
2633 and CFA should not change through the jump. */
2634 create_trace_edges (control
);
2636 /* Update and continue with the trace. */
2637 add_cfi_insn
= insn
;
2638 scan_insn_after (elt
);
2639 def_cfa_1 (&this_cfa
);
2644 /* The insns in the delay slot should all be considered to happen
2645 "before" a call insn. Consider a call with a stack pointer
2646 adjustment in the delay slot. The backtrace from the callee
2647 should include the sp adjustment. Unfortunately, that leaves
2648 us with an unavoidable unwinding error exactly at the call insn
2649 itself. For jump insns we'd prefer to avoid this error by
2650 placing the notes after the sequence. */
2651 if (JUMP_P (control
))
2652 add_cfi_insn
= insn
;
2654 for (i
= 1; i
< n
; ++i
)
2656 elt
= pat
->insn (i
);
2657 scan_insn_after (elt
);
2660 /* Make sure any register saves are visible at the jump target. */
2661 dwarf2out_flush_queued_reg_saves ();
2662 any_cfis_emitted
= false;
2664 /* However, if there is some adjustment on the call itself, e.g.
2665 a call_pop, that action should be considered to happen after
2666 the call returns. */
2667 add_cfi_insn
= insn
;
2668 scan_insn_after (control
);
2672 /* Flush data before calls and jumps, and of course if necessary. */
2673 if (can_throw_internal (insn
))
2675 notice_eh_throw (insn
);
2676 dwarf2out_flush_queued_reg_saves ();
2678 else if (!NONJUMP_INSN_P (insn
)
2679 || clobbers_queued_reg_save (insn
)
2680 || find_reg_note (insn
, REG_CFA_FLUSH_QUEUE
, NULL
))
2681 dwarf2out_flush_queued_reg_saves ();
2682 any_cfis_emitted
= false;
2684 add_cfi_insn
= insn
;
2685 scan_insn_after (insn
);
2689 /* Between frame-related-p and args_size we might have otherwise
2690 emitted two cfa adjustments. Do it now. */
2691 def_cfa_1 (&this_cfa
);
2693 /* Minimize the number of advances by emitting the entire queue
2694 once anything is emitted. */
2695 if (any_cfis_emitted
2696 || find_reg_note (insn
, REG_CFA_FLUSH_QUEUE
, NULL
))
2697 dwarf2out_flush_queued_reg_saves ();
2699 /* Note that a test for control_flow_insn_p does exactly the
2700 same tests as are done to actually create the edges. So
2701 always call the routine and let it not create edges for
2702 non-control-flow insns. */
2703 create_trace_edges (control
);
2706 add_cfi_insn
= NULL
;
2712 /* Scan the function and create the initial set of CFI notes. */
2715 create_cfi_notes (void)
2719 gcc_checking_assert (!queued_reg_saves
.exists ());
2720 gcc_checking_assert (!trace_work_list
.exists ());
2722 /* Always begin at the entry trace. */
2723 ti
= &trace_info
[0];
2724 scan_trace (ti
, true);
2726 while (!trace_work_list
.is_empty ())
2728 ti
= trace_work_list
.pop ();
2729 scan_trace (ti
, false);
2732 queued_reg_saves
.release ();
2733 trace_work_list
.release ();
2736 /* Return the insn before the first NOTE_INSN_CFI after START. */
2739 before_next_cfi_note (rtx_insn
*start
)
2741 rtx_insn
*prev
= start
;
2744 if (NOTE_P (start
) && NOTE_KIND (start
) == NOTE_INSN_CFI
)
2747 start
= NEXT_INSN (start
);
2752 /* Insert CFI notes between traces to properly change state between them. */
2755 connect_traces (void)
2758 dw_trace_info
*prev_ti
, *ti
;
2760 /* ??? Ideally, we should have both queued and processed every trace.
2761 However the current representation of constant pools on various targets
2762 is indistinguishable from unreachable code. Assume for the moment that
2763 we can simply skip over such traces. */
2764 /* ??? Consider creating a DATA_INSN rtx code to indicate that
2765 these are not "real" instructions, and should not be considered.
2766 This could be generically useful for tablejump data as well. */
2767 /* Remove all unprocessed traces from the list. */
2769 VEC_ORDERED_REMOVE_IF_FROM_TO (trace_info
, ix
, ix2
, ti
, 1,
2770 trace_info
.length (), ti
->beg_row
== NULL
);
2771 FOR_EACH_VEC_ELT (trace_info
, ix
, ti
)
2772 gcc_assert (ti
->end_row
!= NULL
);
2774 /* Work from the end back to the beginning. This lets us easily insert
2775 remember/restore_state notes in the correct order wrt other notes. */
2776 n
= trace_info
.length ();
2777 prev_ti
= &trace_info
[n
- 1];
2778 for (i
= n
- 1; i
> 0; --i
)
2780 dw_cfi_row
*old_row
;
2783 prev_ti
= &trace_info
[i
- 1];
2785 add_cfi_insn
= ti
->head
;
2787 /* In dwarf2out_switch_text_section, we'll begin a new FDE
2788 for the portion of the function in the alternate text
2789 section. The row state at the very beginning of that
2790 new FDE will be exactly the row state from the CIE. */
2791 if (ti
->switch_sections
)
2792 old_row
= cie_cfi_row
;
2795 old_row
= prev_ti
->end_row
;
2796 /* If there's no change from the previous end state, fine. */
2797 if (cfi_row_equal_p (old_row
, ti
->beg_row
))
2799 /* Otherwise check for the common case of sharing state with
2800 the beginning of an epilogue, but not the end. Insert
2801 remember/restore opcodes in that case. */
2802 else if (cfi_row_equal_p (prev_ti
->beg_row
, ti
->beg_row
))
2806 /* Note that if we blindly insert the remember at the
2807 start of the trace, we can wind up increasing the
2808 size of the unwind info due to extra advance opcodes.
2809 Instead, put the remember immediately before the next
2810 state change. We know there must be one, because the
2811 state at the beginning and head of the trace differ. */
2812 add_cfi_insn
= before_next_cfi_note (prev_ti
->head
);
2814 cfi
->dw_cfi_opc
= DW_CFA_remember_state
;
2817 add_cfi_insn
= ti
->head
;
2819 cfi
->dw_cfi_opc
= DW_CFA_restore_state
;
2822 old_row
= prev_ti
->beg_row
;
2824 /* Otherwise, we'll simply change state from the previous end. */
2827 change_cfi_row (old_row
, ti
->beg_row
);
2829 if (dump_file
&& add_cfi_insn
!= ti
->head
)
2833 fprintf (dump_file
, "Fixup between trace %u and %u:\n",
2834 prev_ti
->id
, ti
->id
);
2839 note
= NEXT_INSN (note
);
2840 gcc_assert (NOTE_P (note
) && NOTE_KIND (note
) == NOTE_INSN_CFI
);
2841 output_cfi_directive (dump_file
, NOTE_CFI (note
));
2843 while (note
!= add_cfi_insn
);
2847 /* Connect args_size between traces that have can_throw_internal insns. */
2848 if (cfun
->eh
->lp_array
)
2850 poly_int64 prev_args_size
= 0;
2852 for (i
= 0; i
< n
; ++i
)
2854 ti
= &trace_info
[i
];
2856 if (ti
->switch_sections
)
2859 if (ti
->eh_head
== NULL
)
2862 /* We require either the incoming args_size values to match or the
2863 presence of an insn setting it before the first EH insn. */
2864 gcc_assert (!ti
->args_size_undefined
|| ti
->args_size_defined_for_eh
);
2866 /* In the latter case, we force the creation of a CFI note. */
2867 if (ti
->args_size_undefined
2868 || maybe_ne (ti
->beg_delay_args_size
, prev_args_size
))
2870 /* ??? Search back to previous CFI note. */
2871 add_cfi_insn
= PREV_INSN (ti
->eh_head
);
2872 add_cfi_args_size (ti
->beg_delay_args_size
);
2875 prev_args_size
= ti
->end_delay_args_size
;
2880 /* Set up the pseudo-cfg of instruction traces, as described at the
2881 block comment at the top of the file. */
2884 create_pseudo_cfg (void)
2886 bool saw_barrier
, switch_sections
;
2891 /* The first trace begins at the start of the function,
2892 and begins with the CIE row state. */
2893 trace_info
.create (16);
2894 memset (&ti
, 0, sizeof (ti
));
2895 ti
.head
= get_insns ();
2896 ti
.beg_row
= cie_cfi_row
;
2897 ti
.cfa_store
= cie_cfi_row
->cfa
;
2898 ti
.cfa_temp
.reg
= INVALID_REGNUM
;
2899 trace_info
.quick_push (ti
);
2901 if (cie_return_save
)
2902 ti
.regs_saved_in_regs
.safe_push (*cie_return_save
);
2904 /* Walk all the insns, collecting start of trace locations. */
2905 saw_barrier
= false;
2906 switch_sections
= false;
2907 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2909 if (BARRIER_P (insn
))
2911 else if (NOTE_P (insn
)
2912 && NOTE_KIND (insn
) == NOTE_INSN_SWITCH_TEXT_SECTIONS
)
2914 /* We should have just seen a barrier. */
2915 gcc_assert (saw_barrier
);
2916 switch_sections
= true;
2918 /* Watch out for save_point notes between basic blocks.
2919 In particular, a note after a barrier. Do not record these,
2920 delaying trace creation until the label. */
2921 else if (save_point_p (insn
)
2922 && (LABEL_P (insn
) || !saw_barrier
))
2924 memset (&ti
, 0, sizeof (ti
));
2926 ti
.switch_sections
= switch_sections
;
2927 ti
.id
= trace_info
.length ();
2928 trace_info
.safe_push (ti
);
2930 saw_barrier
= false;
2931 switch_sections
= false;
2935 /* Create the trace index after we've finished building trace_info,
2936 avoiding stale pointer problems due to reallocation. */
2938 = new hash_table
<trace_info_hasher
> (trace_info
.length ());
2940 FOR_EACH_VEC_ELT (trace_info
, i
, tp
)
2942 dw_trace_info
**slot
;
2945 fprintf (dump_file
, "Creating trace %u : start at %s %d%s\n", tp
->id
,
2946 rtx_name
[(int) GET_CODE (tp
->head
)], INSN_UID (tp
->head
),
2947 tp
->switch_sections
? " (section switch)" : "");
2949 slot
= trace_index
->find_slot_with_hash (tp
, INSN_UID (tp
->head
), INSERT
);
2950 gcc_assert (*slot
== NULL
);
2955 /* Record the initial position of the return address. RTL is
2956 INCOMING_RETURN_ADDR_RTX. */
2959 initial_return_save (rtx rtl
)
2961 unsigned int reg
= INVALID_REGNUM
;
2962 poly_int64 offset
= 0;
2964 switch (GET_CODE (rtl
))
2967 /* RA is in a register. */
2968 reg
= dwf_regno (rtl
);
2972 /* RA is on the stack. */
2973 rtl
= XEXP (rtl
, 0);
2974 switch (GET_CODE (rtl
))
2977 gcc_assert (REGNO (rtl
) == STACK_POINTER_REGNUM
);
2982 gcc_assert (REGNO (XEXP (rtl
, 0)) == STACK_POINTER_REGNUM
);
2983 offset
= rtx_to_poly_int64 (XEXP (rtl
, 1));
2987 gcc_assert (REGNO (XEXP (rtl
, 0)) == STACK_POINTER_REGNUM
);
2988 offset
= -rtx_to_poly_int64 (XEXP (rtl
, 1));
2998 /* The return address is at some offset from any value we can
2999 actually load. For instance, on the SPARC it is in %i7+8. Just
3000 ignore the offset for now; it doesn't matter for unwinding frames. */
3001 gcc_assert (CONST_INT_P (XEXP (rtl
, 1)));
3002 initial_return_save (XEXP (rtl
, 0));
3009 if (reg
!= DWARF_FRAME_RETURN_COLUMN
)
3011 if (reg
!= INVALID_REGNUM
)
3012 record_reg_saved_in_reg (rtl
, pc_rtx
);
3013 reg_save (DWARF_FRAME_RETURN_COLUMN
, reg
, offset
- cur_row
->cfa
.offset
);
3018 create_cie_data (void)
3020 dw_cfa_location loc
;
3021 dw_trace_info cie_trace
;
3023 dw_stack_pointer_regnum
= DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM
);
3025 memset (&cie_trace
, 0, sizeof (cie_trace
));
3026 cur_trace
= &cie_trace
;
3028 add_cfi_vec
= &cie_cfi_vec
;
3029 cie_cfi_row
= cur_row
= new_cfi_row ();
3031 /* On entry, the Canonical Frame Address is at SP. */
3032 memset (&loc
, 0, sizeof (loc
));
3033 loc
.reg
= dw_stack_pointer_regnum
;
3034 /* create_cie_data is called just once per TU, and when using .cfi_startproc
3035 is even done by the assembler rather than the compiler. If the target
3036 has different incoming frame sp offsets depending on what kind of
3037 function it is, use a single constant offset for the target and
3038 if needed, adjust before the first instruction in insn stream. */
3039 loc
.offset
= DEFAULT_INCOMING_FRAME_SP_OFFSET
;
3042 if (targetm
.debug_unwind_info () == UI_DWARF2
3043 || targetm_common
.except_unwind_info (&global_options
) == UI_DWARF2
)
3045 initial_return_save (INCOMING_RETURN_ADDR_RTX
);
3047 /* For a few targets, we have the return address incoming into a
3048 register, but choose a different return column. This will result
3049 in a DW_CFA_register for the return, and an entry in
3050 regs_saved_in_regs to match. If the target later stores that
3051 return address register to the stack, we want to be able to emit
3052 the DW_CFA_offset against the return column, not the intermediate
3053 save register. Save the contents of regs_saved_in_regs so that
3054 we can re-initialize it at the start of each function. */
3055 switch (cie_trace
.regs_saved_in_regs
.length ())
3060 cie_return_save
= ggc_alloc
<reg_saved_in_data
> ();
3061 *cie_return_save
= cie_trace
.regs_saved_in_regs
[0];
3062 cie_trace
.regs_saved_in_regs
.release ();
3074 /* Annotate the function with NOTE_INSN_CFI notes to record the CFI
3075 state at each location within the function. These notes will be
3076 emitted during pass_final. */
3079 execute_dwarf2_frame (void)
3081 /* Different HARD_FRAME_POINTER_REGNUM might coexist in the same file. */
3082 dw_frame_pointer_regnum
= DWARF_FRAME_REGNUM (HARD_FRAME_POINTER_REGNUM
);
3084 /* The first time we're called, compute the incoming frame state. */
3085 if (cie_cfi_vec
== NULL
)
3088 dwarf2out_alloc_current_fde ();
3090 create_pseudo_cfg ();
3093 create_cfi_notes ();
3097 /* Free all the data we allocated. */
3102 FOR_EACH_VEC_ELT (trace_info
, i
, ti
)
3103 ti
->regs_saved_in_regs
.release ();
3105 trace_info
.release ();
3113 /* Convert a DWARF call frame info. operation to its string name */
3116 dwarf_cfi_name (unsigned int cfi_opc
)
3118 const char *name
= get_DW_CFA_name (cfi_opc
);
3123 return "DW_CFA_<unknown>";
3126 /* This routine will generate the correct assembly data for a location
3127 description based on a cfi entry with a complex address. */
3130 output_cfa_loc (dw_cfi_ref cfi
, int for_eh
)
3132 dw_loc_descr_ref loc
;
3135 if (cfi
->dw_cfi_opc
== DW_CFA_expression
3136 || cfi
->dw_cfi_opc
== DW_CFA_val_expression
)
3139 DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3140 dw2_asm_output_data (1, r
, NULL
);
3141 loc
= cfi
->dw_cfi_oprnd2
.dw_cfi_loc
;
3144 loc
= cfi
->dw_cfi_oprnd1
.dw_cfi_loc
;
3146 /* Output the size of the block. */
3147 size
= size_of_locs (loc
);
3148 dw2_asm_output_data_uleb128 (size
, NULL
);
3150 /* Now output the operations themselves. */
3151 output_loc_sequence (loc
, for_eh
);
3154 /* Similar, but used for .cfi_escape. */
3157 output_cfa_loc_raw (dw_cfi_ref cfi
)
3159 dw_loc_descr_ref loc
;
3162 if (cfi
->dw_cfi_opc
== DW_CFA_expression
3163 || cfi
->dw_cfi_opc
== DW_CFA_val_expression
)
3166 DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3167 fprintf (asm_out_file
, "%#x,", r
);
3168 loc
= cfi
->dw_cfi_oprnd2
.dw_cfi_loc
;
3171 loc
= cfi
->dw_cfi_oprnd1
.dw_cfi_loc
;
3173 /* Output the size of the block. */
3174 size
= size_of_locs (loc
);
3175 dw2_asm_output_data_uleb128_raw (size
);
3176 fputc (',', asm_out_file
);
3178 /* Now output the operations themselves. */
3179 output_loc_sequence_raw (loc
);
3182 /* Output a Call Frame Information opcode and its operand(s). */
3185 output_cfi (dw_cfi_ref cfi
, dw_fde_ref fde
, int for_eh
)
3190 if (cfi
->dw_cfi_opc
== DW_CFA_advance_loc
)
3191 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
3192 | (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
& 0x3f)),
3193 "DW_CFA_advance_loc " HOST_WIDE_INT_PRINT_HEX
,
3194 ((unsigned HOST_WIDE_INT
)
3195 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
));
3196 else if (cfi
->dw_cfi_opc
== DW_CFA_offset
)
3198 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3199 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
| (r
& 0x3f)),
3200 "DW_CFA_offset, column %#lx", r
);
3201 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3202 dw2_asm_output_data_uleb128 (off
, NULL
);
3204 else if (cfi
->dw_cfi_opc
== DW_CFA_restore
)
3206 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3207 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
| (r
& 0x3f)),
3208 "DW_CFA_restore, column %#lx", r
);
3212 dw2_asm_output_data (1, cfi
->dw_cfi_opc
,
3213 "%s", dwarf_cfi_name (cfi
->dw_cfi_opc
));
3215 switch (cfi
->dw_cfi_opc
)
3217 case DW_CFA_set_loc
:
3219 dw2_asm_output_encoded_addr_rtx (
3220 ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/1, /*global=*/0),
3221 gen_rtx_SYMBOL_REF (Pmode
, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
),
3224 dw2_asm_output_addr (DWARF2_ADDR_SIZE
,
3225 cfi
->dw_cfi_oprnd1
.dw_cfi_addr
, NULL
);
3226 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3229 case DW_CFA_advance_loc1
:
3230 dw2_asm_output_delta (1, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3231 fde
->dw_fde_current_label
, NULL
);
3232 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3235 case DW_CFA_advance_loc2
:
3236 dw2_asm_output_delta (2, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3237 fde
->dw_fde_current_label
, NULL
);
3238 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3241 case DW_CFA_advance_loc4
:
3242 dw2_asm_output_delta (4, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3243 fde
->dw_fde_current_label
, NULL
);
3244 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3247 case DW_CFA_MIPS_advance_loc8
:
3248 dw2_asm_output_delta (8, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3249 fde
->dw_fde_current_label
, NULL
);
3250 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3253 case DW_CFA_offset_extended
:
3254 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3255 dw2_asm_output_data_uleb128 (r
, NULL
);
3256 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3257 dw2_asm_output_data_uleb128 (off
, NULL
);
3260 case DW_CFA_def_cfa
:
3261 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3262 dw2_asm_output_data_uleb128 (r
, NULL
);
3263 dw2_asm_output_data_uleb128 (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
, NULL
);
3266 case DW_CFA_offset_extended_sf
:
3267 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3268 dw2_asm_output_data_uleb128 (r
, NULL
);
3269 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3270 dw2_asm_output_data_sleb128 (off
, NULL
);
3273 case DW_CFA_def_cfa_sf
:
3274 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3275 dw2_asm_output_data_uleb128 (r
, NULL
);
3276 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3277 dw2_asm_output_data_sleb128 (off
, NULL
);
3280 case DW_CFA_restore_extended
:
3281 case DW_CFA_undefined
:
3282 case DW_CFA_same_value
:
3283 case DW_CFA_def_cfa_register
:
3284 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3285 dw2_asm_output_data_uleb128 (r
, NULL
);
3288 case DW_CFA_register
:
3289 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3290 dw2_asm_output_data_uleb128 (r
, NULL
);
3291 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
, for_eh
);
3292 dw2_asm_output_data_uleb128 (r
, NULL
);
3295 case DW_CFA_def_cfa_offset
:
3296 case DW_CFA_GNU_args_size
:
3297 dw2_asm_output_data_uleb128 (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
, NULL
);
3300 case DW_CFA_def_cfa_offset_sf
:
3301 off
= div_data_align (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3302 dw2_asm_output_data_sleb128 (off
, NULL
);
3305 case DW_CFA_GNU_window_save
:
3308 case DW_CFA_def_cfa_expression
:
3309 case DW_CFA_expression
:
3310 case DW_CFA_val_expression
:
3311 output_cfa_loc (cfi
, for_eh
);
3314 case DW_CFA_GNU_negative_offset_extended
:
3315 /* Obsoleted by DW_CFA_offset_extended_sf. */
3324 /* Similar, but do it via assembler directives instead. */
3327 output_cfi_directive (FILE *f
, dw_cfi_ref cfi
)
3329 unsigned long r
, r2
;
3331 switch (cfi
->dw_cfi_opc
)
3333 case DW_CFA_advance_loc
:
3334 case DW_CFA_advance_loc1
:
3335 case DW_CFA_advance_loc2
:
3336 case DW_CFA_advance_loc4
:
3337 case DW_CFA_MIPS_advance_loc8
:
3338 case DW_CFA_set_loc
:
3339 /* Should only be created in a code path not followed when emitting
3340 via directives. The assembler is going to take care of this for
3341 us. But this routines is also used for debugging dumps, so
3343 gcc_assert (f
!= asm_out_file
);
3344 fprintf (f
, "\t.cfi_advance_loc\n");
3348 case DW_CFA_offset_extended
:
3349 case DW_CFA_offset_extended_sf
:
3350 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3351 fprintf (f
, "\t.cfi_offset %lu, " HOST_WIDE_INT_PRINT_DEC
"\n",
3352 r
, cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3355 case DW_CFA_restore
:
3356 case DW_CFA_restore_extended
:
3357 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3358 fprintf (f
, "\t.cfi_restore %lu\n", r
);
3361 case DW_CFA_undefined
:
3362 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3363 fprintf (f
, "\t.cfi_undefined %lu\n", r
);
3366 case DW_CFA_same_value
:
3367 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3368 fprintf (f
, "\t.cfi_same_value %lu\n", r
);
3371 case DW_CFA_def_cfa
:
3372 case DW_CFA_def_cfa_sf
:
3373 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3374 fprintf (f
, "\t.cfi_def_cfa %lu, " HOST_WIDE_INT_PRINT_DEC
"\n",
3375 r
, cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3378 case DW_CFA_def_cfa_register
:
3379 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3380 fprintf (f
, "\t.cfi_def_cfa_register %lu\n", r
);
3383 case DW_CFA_register
:
3384 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3385 r2
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
, 1);
3386 fprintf (f
, "\t.cfi_register %lu, %lu\n", r
, r2
);
3389 case DW_CFA_def_cfa_offset
:
3390 case DW_CFA_def_cfa_offset_sf
:
3391 fprintf (f
, "\t.cfi_def_cfa_offset "
3392 HOST_WIDE_INT_PRINT_DEC
"\n",
3393 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3396 case DW_CFA_remember_state
:
3397 fprintf (f
, "\t.cfi_remember_state\n");
3399 case DW_CFA_restore_state
:
3400 fprintf (f
, "\t.cfi_restore_state\n");
3403 case DW_CFA_GNU_args_size
:
3404 if (f
== asm_out_file
)
3406 fprintf (f
, "\t.cfi_escape %#x,", DW_CFA_GNU_args_size
);
3407 dw2_asm_output_data_uleb128_raw (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3409 fprintf (f
, "\t%s args_size " HOST_WIDE_INT_PRINT_DEC
,
3410 ASM_COMMENT_START
, cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3415 fprintf (f
, "\t.cfi_GNU_args_size " HOST_WIDE_INT_PRINT_DEC
"\n",
3416 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3420 case DW_CFA_GNU_window_save
:
3421 fprintf (f
, "\t.cfi_window_save\n");
3424 case DW_CFA_def_cfa_expression
:
3425 case DW_CFA_expression
:
3426 case DW_CFA_val_expression
:
3427 if (f
!= asm_out_file
)
3429 fprintf (f
, "\t.cfi_%scfa_%sexpression ...\n",
3430 cfi
->dw_cfi_opc
== DW_CFA_def_cfa_expression
? "def_" : "",
3431 cfi
->dw_cfi_opc
== DW_CFA_val_expression
? "val_" : "");
3434 fprintf (f
, "\t.cfi_escape %#x,", cfi
->dw_cfi_opc
);
3435 output_cfa_loc_raw (cfi
);
3445 dwarf2out_emit_cfi (dw_cfi_ref cfi
)
3447 if (dwarf2out_do_cfi_asm ())
3448 output_cfi_directive (asm_out_file
, cfi
);
3452 dump_cfi_row (FILE *f
, dw_cfi_row
*row
)
3460 dw_cfa_location dummy
;
3461 memset (&dummy
, 0, sizeof (dummy
));
3462 dummy
.reg
= INVALID_REGNUM
;
3463 cfi
= def_cfa_0 (&dummy
, &row
->cfa
);
3465 output_cfi_directive (f
, cfi
);
3467 FOR_EACH_VEC_SAFE_ELT (row
->reg_save
, i
, cfi
)
3469 output_cfi_directive (f
, cfi
);
3472 void debug_cfi_row (dw_cfi_row
*row
);
3475 debug_cfi_row (dw_cfi_row
*row
)
3477 dump_cfi_row (stderr
, row
);
3481 /* Save the result of dwarf2out_do_frame across PCH.
3482 This variable is tri-state, with 0 unset, >0 true, <0 false. */
3483 static GTY(()) signed char saved_do_cfi_asm
= 0;
3485 /* Decide whether to emit EH frame unwind information for the current
3486 translation unit. */
3489 dwarf2out_do_eh_frame (void)
3492 (flag_unwind_tables
|| flag_exceptions
)
3493 && targetm_common
.except_unwind_info (&global_options
) == UI_DWARF2
;
3496 /* Decide whether we want to emit frame unwind information for the current
3497 translation unit. */
3500 dwarf2out_do_frame (void)
3502 /* We want to emit correct CFA location expressions or lists, so we
3503 have to return true if we're going to output debug info, even if
3504 we're not going to output frame or unwind info. */
3505 if (write_symbols
== DWARF2_DEBUG
|| write_symbols
== VMS_AND_DWARF2_DEBUG
)
3508 if (saved_do_cfi_asm
> 0)
3511 if (targetm
.debug_unwind_info () == UI_DWARF2
)
3514 if (dwarf2out_do_eh_frame ())
3520 /* Decide whether to emit frame unwind via assembler directives. */
3523 dwarf2out_do_cfi_asm (void)
3527 if (saved_do_cfi_asm
!= 0)
3528 return saved_do_cfi_asm
> 0;
3530 /* Assume failure for a moment. */
3531 saved_do_cfi_asm
= -1;
3533 if (!flag_dwarf2_cfi_asm
|| !dwarf2out_do_frame ())
3535 if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE
)
3538 /* Make sure the personality encoding is one the assembler can support.
3539 In particular, aligned addresses can't be handled. */
3540 enc
= ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/2,/*global=*/1);
3541 if ((enc
& 0x70) != 0 && (enc
& 0x70) != DW_EH_PE_pcrel
)
3543 enc
= ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/0,/*global=*/0);
3544 if ((enc
& 0x70) != 0 && (enc
& 0x70) != DW_EH_PE_pcrel
)
3547 /* If we can't get the assembler to emit only .debug_frame, and we don't need
3548 dwarf2 unwind info for exceptions, then emit .debug_frame by hand. */
3549 if (!HAVE_GAS_CFI_SECTIONS_DIRECTIVE
&& !dwarf2out_do_eh_frame ())
3553 saved_do_cfi_asm
= 1;
3559 const pass_data pass_data_dwarf2_frame
=
3561 RTL_PASS
, /* type */
3562 "dwarf2", /* name */
3563 OPTGROUP_NONE
, /* optinfo_flags */
3564 TV_FINAL
, /* tv_id */
3565 0, /* properties_required */
3566 0, /* properties_provided */
3567 0, /* properties_destroyed */
3568 0, /* todo_flags_start */
3569 0, /* todo_flags_finish */
3572 class pass_dwarf2_frame
: public rtl_opt_pass
3575 pass_dwarf2_frame (gcc::context
*ctxt
)
3576 : rtl_opt_pass (pass_data_dwarf2_frame
, ctxt
)
3579 /* opt_pass methods: */
3580 virtual bool gate (function
*);
3581 virtual unsigned int execute (function
*) { return execute_dwarf2_frame (); }
3583 }; // class pass_dwarf2_frame
3586 pass_dwarf2_frame::gate (function
*)
3588 /* Targets which still implement the prologue in assembler text
3589 cannot use the generic dwarf2 unwinding. */
3590 if (!targetm
.have_prologue ())
3593 /* ??? What to do for UI_TARGET unwinding? They might be able to benefit
3594 from the optimized shrink-wrapping annotations that we will compute.
3595 For now, only produce the CFI notes for dwarf2. */
3596 return dwarf2out_do_frame ();
3602 make_pass_dwarf2_frame (gcc::context
*ctxt
)
3604 return new pass_dwarf2_frame (ctxt
);
3607 #include "gt-dwarf2cfi.h"