1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
40 #include "coretypes.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "basic-block.h"
59 #include "langhooks.h"
61 /* Commonly used modes. */
63 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
64 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
65 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
66 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
69 /* This is *not* reset after each function. It gives each CODE_LABEL
70 in the entire compilation a unique label number. */
72 static GTY(()) int label_num
= 1;
74 /* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
78 static int last_label_num
;
80 /* Value label_num had when set_new_last_label_num was called.
81 If label_num has not changed since then, last_label_num is valid. */
83 static int base_label_num
;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers
;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl
[GR_MAX
];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx
[FIRST_PSEUDO_REGISTER
];
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
110 REAL_VALUE_TYPE dconst0
;
111 REAL_VALUE_TYPE dconst1
;
112 REAL_VALUE_TYPE dconst2
;
113 REAL_VALUE_TYPE dconst3
;
114 REAL_VALUE_TYPE dconst10
;
115 REAL_VALUE_TYPE dconstm1
;
116 REAL_VALUE_TYPE dconstm2
;
117 REAL_VALUE_TYPE dconsthalf
;
118 REAL_VALUE_TYPE dconstthird
;
119 REAL_VALUE_TYPE dconstpi
;
120 REAL_VALUE_TYPE dconste
;
122 /* All references to the following fixed hard registers go through
123 these unique rtl objects. On machines where the frame-pointer and
124 arg-pointer are the same register, they use the same unique object.
126 After register allocation, other rtl objects which used to be pseudo-regs
127 may be clobbered to refer to the frame-pointer register.
128 But references that were originally to the frame-pointer can be
129 distinguished from the others because they contain frame_pointer_rtx.
131 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
132 tricky: until register elimination has taken place hard_frame_pointer_rtx
133 should be used if it is being set, and frame_pointer_rtx otherwise. After
134 register elimination hard_frame_pointer_rtx should always be used.
135 On machines where the two registers are same (most) then these are the
138 In an inline procedure, the stack and frame pointer rtxs may not be
139 used for anything else. */
140 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
141 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
142 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
144 /* This is used to implement __builtin_return_address for some machines.
145 See for instance the MIPS port. */
146 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
148 /* We make one copy of (const_int C) where C is in
149 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
150 to save space during the compilation and simplify comparisons of
153 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
155 /* A hash table storing CONST_INTs whose absolute value is greater
156 than MAX_SAVED_CONST_INT. */
158 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
159 htab_t const_int_htab
;
161 /* A hash table storing memory attribute structures. */
162 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
163 htab_t mem_attrs_htab
;
165 /* A hash table storing register attribute structures. */
166 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
167 htab_t reg_attrs_htab
;
169 /* A hash table storing all CONST_DOUBLEs. */
170 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
171 htab_t const_double_htab
;
173 #define first_insn (cfun->emit->x_first_insn)
174 #define last_insn (cfun->emit->x_last_insn)
175 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
176 #define last_location (cfun->emit->x_last_location)
177 #define first_label_num (cfun->emit->x_first_label_num)
179 static rtx
make_jump_insn_raw (rtx
);
180 static rtx
make_call_insn_raw (rtx
);
181 static rtx
find_line_note (rtx
);
182 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
183 static void unshare_all_decls (tree
);
184 static void reset_used_decls (tree
);
185 static void mark_label_nuses (rtx
);
186 static hashval_t
const_int_htab_hash (const void *);
187 static int const_int_htab_eq (const void *, const void *);
188 static hashval_t
const_double_htab_hash (const void *);
189 static int const_double_htab_eq (const void *, const void *);
190 static rtx
lookup_const_double (rtx
);
191 static hashval_t
mem_attrs_htab_hash (const void *);
192 static int mem_attrs_htab_eq (const void *, const void *);
193 static mem_attrs
*get_mem_attrs (HOST_WIDE_INT
, tree
, rtx
, rtx
, unsigned int,
195 static hashval_t
reg_attrs_htab_hash (const void *);
196 static int reg_attrs_htab_eq (const void *, const void *);
197 static reg_attrs
*get_reg_attrs (tree
, int);
198 static tree
component_ref_for_mem_expr (tree
);
199 static rtx
gen_const_vector_0 (enum machine_mode
);
200 static rtx
gen_complex_constant_part (enum machine_mode
, rtx
, int);
201 static void copy_rtx_if_shared_1 (rtx
*orig
);
203 /* Probability of the conditional branch currently proceeded by try_split.
204 Set to -1 otherwise. */
205 int split_branch_probability
= -1;
207 /* Returns a hash code for X (which is a really a CONST_INT). */
210 const_int_htab_hash (const void *x
)
212 return (hashval_t
) INTVAL ((rtx
) x
);
215 /* Returns nonzero if the value represented by X (which is really a
216 CONST_INT) is the same as that given by Y (which is really a
220 const_int_htab_eq (const void *x
, const void *y
)
222 return (INTVAL ((rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
225 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
227 const_double_htab_hash (const void *x
)
232 if (GET_MODE (value
) == VOIDmode
)
233 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
236 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
237 /* MODE is used in the comparison, so it should be in the hash. */
238 h
^= GET_MODE (value
);
243 /* Returns nonzero if the value represented by X (really a ...)
244 is the same as that represented by Y (really a ...) */
246 const_double_htab_eq (const void *x
, const void *y
)
248 rtx a
= (rtx
)x
, b
= (rtx
)y
;
250 if (GET_MODE (a
) != GET_MODE (b
))
252 if (GET_MODE (a
) == VOIDmode
)
253 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
254 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
256 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
257 CONST_DOUBLE_REAL_VALUE (b
));
260 /* Returns a hash code for X (which is a really a mem_attrs *). */
263 mem_attrs_htab_hash (const void *x
)
265 mem_attrs
*p
= (mem_attrs
*) x
;
267 return (p
->alias
^ (p
->align
* 1000)
268 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
269 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
273 /* Returns nonzero if the value represented by X (which is really a
274 mem_attrs *) is the same as that given by Y (which is also really a
278 mem_attrs_htab_eq (const void *x
, const void *y
)
280 mem_attrs
*p
= (mem_attrs
*) x
;
281 mem_attrs
*q
= (mem_attrs
*) y
;
283 return (p
->alias
== q
->alias
&& p
->expr
== q
->expr
&& p
->offset
== q
->offset
284 && p
->size
== q
->size
&& p
->align
== q
->align
);
287 /* Allocate a new mem_attrs structure and insert it into the hash table if
288 one identical to it is not already in the table. We are doing this for
292 get_mem_attrs (HOST_WIDE_INT alias
, tree expr
, rtx offset
, rtx size
,
293 unsigned int align
, enum machine_mode mode
)
298 /* If everything is the default, we can just return zero.
299 This must match what the corresponding MEM_* macros return when the
300 field is not present. */
301 if (alias
== 0 && expr
== 0 && offset
== 0
303 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
304 && (STRICT_ALIGNMENT
&& mode
!= BLKmode
305 ? align
== GET_MODE_ALIGNMENT (mode
) : align
== BITS_PER_UNIT
))
310 attrs
.offset
= offset
;
314 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
317 *slot
= ggc_alloc (sizeof (mem_attrs
));
318 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
324 /* Returns a hash code for X (which is a really a reg_attrs *). */
327 reg_attrs_htab_hash (const void *x
)
329 reg_attrs
*p
= (reg_attrs
*) x
;
331 return ((p
->offset
* 1000) ^ (long) p
->decl
);
334 /* Returns nonzero if the value represented by X (which is really a
335 reg_attrs *) is the same as that given by Y (which is also really a
339 reg_attrs_htab_eq (const void *x
, const void *y
)
341 reg_attrs
*p
= (reg_attrs
*) x
;
342 reg_attrs
*q
= (reg_attrs
*) y
;
344 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
346 /* Allocate a new reg_attrs structure and insert it into the hash table if
347 one identical to it is not already in the table. We are doing this for
351 get_reg_attrs (tree decl
, int offset
)
356 /* If everything is the default, we can just return zero. */
357 if (decl
== 0 && offset
== 0)
361 attrs
.offset
= offset
;
363 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
366 *slot
= ggc_alloc (sizeof (reg_attrs
));
367 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
373 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
374 don't attempt to share with the various global pieces of rtl (such as
375 frame_pointer_rtx). */
378 gen_raw_REG (enum machine_mode mode
, int regno
)
380 rtx x
= gen_rtx_raw_REG (mode
, regno
);
381 ORIGINAL_REGNO (x
) = regno
;
385 /* There are some RTL codes that require special attention; the generation
386 functions do the raw handling. If you add to this list, modify
387 special_rtx in gengenrtl.c as well. */
390 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
394 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
395 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
397 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
398 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
399 return const_true_rtx
;
402 /* Look up the CONST_INT in the hash table. */
403 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
404 (hashval_t
) arg
, INSERT
);
406 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
412 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
414 return GEN_INT (trunc_int_for_mode (c
, mode
));
417 /* CONST_DOUBLEs might be created from pairs of integers, or from
418 REAL_VALUE_TYPEs. Also, their length is known only at run time,
419 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
421 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
422 hash table. If so, return its counterpart; otherwise add it
423 to the hash table and return it. */
425 lookup_const_double (rtx real
)
427 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
434 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
435 VALUE in mode MODE. */
437 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
439 rtx real
= rtx_alloc (CONST_DOUBLE
);
440 PUT_MODE (real
, mode
);
442 memcpy (&CONST_DOUBLE_LOW (real
), &value
, sizeof (REAL_VALUE_TYPE
));
444 return lookup_const_double (real
);
447 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
448 of ints: I0 is the low-order word and I1 is the high-order word.
449 Do not use this routine for non-integer modes; convert to
450 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
453 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
458 if (mode
!= VOIDmode
)
461 if (GET_MODE_CLASS (mode
) != MODE_INT
462 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
463 /* We can get a 0 for an error mark. */
464 && GET_MODE_CLASS (mode
) != MODE_VECTOR_INT
465 && GET_MODE_CLASS (mode
) != MODE_VECTOR_FLOAT
)
468 /* We clear out all bits that don't belong in MODE, unless they and
469 our sign bit are all one. So we get either a reasonable negative
470 value or a reasonable unsigned value for this mode. */
471 width
= GET_MODE_BITSIZE (mode
);
472 if (width
< HOST_BITS_PER_WIDE_INT
473 && ((i0
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
474 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
475 i0
&= ((HOST_WIDE_INT
) 1 << width
) - 1, i1
= 0;
476 else if (width
== HOST_BITS_PER_WIDE_INT
477 && ! (i1
== ~0 && i0
< 0))
479 else if (width
> 2 * HOST_BITS_PER_WIDE_INT
)
480 /* We cannot represent this value as a constant. */
483 /* If this would be an entire word for the target, but is not for
484 the host, then sign-extend on the host so that the number will
485 look the same way on the host that it would on the target.
487 For example, when building a 64 bit alpha hosted 32 bit sparc
488 targeted compiler, then we want the 32 bit unsigned value -1 to be
489 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
490 The latter confuses the sparc backend. */
492 if (width
< HOST_BITS_PER_WIDE_INT
493 && (i0
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
494 i0
|= ((HOST_WIDE_INT
) (-1) << width
);
496 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
499 ??? Strictly speaking, this is wrong if we create a CONST_INT for
500 a large unsigned constant with the size of MODE being
501 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
502 in a wider mode. In that case we will mis-interpret it as a
505 Unfortunately, the only alternative is to make a CONST_DOUBLE for
506 any constant in any mode if it is an unsigned constant larger
507 than the maximum signed integer in an int on the host. However,
508 doing this will break everyone that always expects to see a
509 CONST_INT for SImode and smaller.
511 We have always been making CONST_INTs in this case, so nothing
512 new is being broken. */
514 if (width
<= HOST_BITS_PER_WIDE_INT
)
515 i1
= (i0
< 0) ? ~(HOST_WIDE_INT
) 0 : 0;
518 /* If this integer fits in one word, return a CONST_INT. */
519 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
522 /* We use VOIDmode for integers. */
523 value
= rtx_alloc (CONST_DOUBLE
);
524 PUT_MODE (value
, VOIDmode
);
526 CONST_DOUBLE_LOW (value
) = i0
;
527 CONST_DOUBLE_HIGH (value
) = i1
;
529 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
530 XWINT (value
, i
) = 0;
532 return lookup_const_double (value
);
536 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
538 /* In case the MD file explicitly references the frame pointer, have
539 all such references point to the same frame pointer. This is
540 used during frame pointer elimination to distinguish the explicit
541 references to these registers from pseudos that happened to be
544 If we have eliminated the frame pointer or arg pointer, we will
545 be using it as a normal register, for example as a spill
546 register. In such cases, we might be accessing it in a mode that
547 is not Pmode and therefore cannot use the pre-allocated rtx.
549 Also don't do this when we are making new REGs in reload, since
550 we don't want to get confused with the real pointers. */
552 if (mode
== Pmode
&& !reload_in_progress
)
554 if (regno
== FRAME_POINTER_REGNUM
555 && (!reload_completed
|| frame_pointer_needed
))
556 return frame_pointer_rtx
;
557 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
558 if (regno
== HARD_FRAME_POINTER_REGNUM
559 && (!reload_completed
|| frame_pointer_needed
))
560 return hard_frame_pointer_rtx
;
562 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
563 if (regno
== ARG_POINTER_REGNUM
)
564 return arg_pointer_rtx
;
566 #ifdef RETURN_ADDRESS_POINTER_REGNUM
567 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
568 return return_address_pointer_rtx
;
570 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
571 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
572 return pic_offset_table_rtx
;
573 if (regno
== STACK_POINTER_REGNUM
)
574 return stack_pointer_rtx
;
578 /* If the per-function register table has been set up, try to re-use
579 an existing entry in that table to avoid useless generation of RTL.
581 This code is disabled for now until we can fix the various backends
582 which depend on having non-shared hard registers in some cases. Long
583 term we want to re-enable this code as it can significantly cut down
584 on the amount of useless RTL that gets generated.
586 We'll also need to fix some code that runs after reload that wants to
587 set ORIGINAL_REGNO. */
592 && regno
< FIRST_PSEUDO_REGISTER
593 && reg_raw_mode
[regno
] == mode
)
594 return regno_reg_rtx
[regno
];
597 return gen_raw_REG (mode
, regno
);
601 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
603 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
605 /* This field is not cleared by the mere allocation of the rtx, so
613 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
615 /* This is the most common failure type.
616 Catch it early so we can see who does it. */
617 if ((offset
% GET_MODE_SIZE (mode
)) != 0)
620 /* This check isn't usable right now because combine will
621 throw arbitrary crap like a CALL into a SUBREG in
622 gen_lowpart_for_combine so we must just eat it. */
624 /* Check for this too. */
625 if (offset
>= GET_MODE_SIZE (GET_MODE (reg
)))
628 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
631 /* Generate a SUBREG representing the least-significant part of REG if MODE
632 is smaller than mode of REG, otherwise paradoxical SUBREG. */
635 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
637 enum machine_mode inmode
;
639 inmode
= GET_MODE (reg
);
640 if (inmode
== VOIDmode
)
642 return gen_rtx_SUBREG (mode
, reg
,
643 subreg_lowpart_offset (mode
, inmode
));
646 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
648 ** This routine generates an RTX of the size specified by
649 ** <code>, which is an RTX code. The RTX structure is initialized
650 ** from the arguments <element1> through <elementn>, which are
651 ** interpreted according to the specific RTX type's format. The
652 ** special machine mode associated with the rtx (if any) is specified
655 ** gen_rtx can be invoked in a way which resembles the lisp-like
656 ** rtx it will generate. For example, the following rtx structure:
658 ** (plus:QI (mem:QI (reg:SI 1))
659 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
661 ** ...would be generated by the following C code:
663 ** gen_rtx_PLUS (QImode,
664 ** gen_rtx_MEM (QImode,
665 ** gen_rtx_REG (SImode, 1)),
666 ** gen_rtx_MEM (QImode,
667 ** gen_rtx_PLUS (SImode,
668 ** gen_rtx_REG (SImode, 2),
669 ** gen_rtx_REG (SImode, 3)))),
674 gen_rtx (enum rtx_code code
, enum machine_mode mode
, ...)
676 int i
; /* Array indices... */
677 const char *fmt
; /* Current rtx's format... */
678 rtx rt_val
; /* RTX to return to caller... */
686 rt_val
= gen_rtx_CONST_INT (mode
, va_arg (p
, HOST_WIDE_INT
));
691 HOST_WIDE_INT arg0
= va_arg (p
, HOST_WIDE_INT
);
692 HOST_WIDE_INT arg1
= va_arg (p
, HOST_WIDE_INT
);
694 rt_val
= immed_double_const (arg0
, arg1
, mode
);
699 rt_val
= gen_rtx_REG (mode
, va_arg (p
, int));
703 rt_val
= gen_rtx_MEM (mode
, va_arg (p
, rtx
));
707 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
708 rt_val
->mode
= mode
; /* Store the machine mode... */
710 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
711 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
715 case '0': /* Field with unknown use. Zero it. */
716 X0EXP (rt_val
, i
) = NULL_RTX
;
719 case 'i': /* An integer? */
720 XINT (rt_val
, i
) = va_arg (p
, int);
723 case 'w': /* A wide integer? */
724 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
727 case 's': /* A string? */
728 XSTR (rt_val
, i
) = va_arg (p
, char *);
731 case 'e': /* An expression? */
732 case 'u': /* An insn? Same except when printing. */
733 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
736 case 'E': /* An RTX vector? */
737 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
740 case 'b': /* A bitmap? */
741 XBITMAP (rt_val
, i
) = va_arg (p
, bitmap
);
744 case 't': /* A tree? */
745 XTREE (rt_val
, i
) = va_arg (p
, tree
);
759 /* gen_rtvec (n, [rt1, ..., rtn])
761 ** This routine creates an rtvec and stores within it the
762 ** pointers to rtx's which are its arguments.
767 gen_rtvec (int n
, ...)
776 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
778 vector
= alloca (n
* sizeof (rtx
));
780 for (i
= 0; i
< n
; i
++)
781 vector
[i
] = va_arg (p
, rtx
);
783 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
787 return gen_rtvec_v (save_n
, vector
);
791 gen_rtvec_v (int n
, rtx
*argp
)
797 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
799 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
801 for (i
= 0; i
< n
; i
++)
802 rt_val
->elem
[i
] = *argp
++;
807 /* Generate a REG rtx for a new pseudo register of mode MODE.
808 This pseudo is assigned the next sequential register number. */
811 gen_reg_rtx (enum machine_mode mode
)
813 struct function
*f
= cfun
;
816 /* Don't let anything called after initial flow analysis create new
821 if (generating_concat_p
822 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
823 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
825 /* For complex modes, don't make a single pseudo.
826 Instead, make a CONCAT of two pseudos.
827 This allows noncontiguous allocation of the real and imaginary parts,
828 which makes much better code. Besides, allocating DCmode
829 pseudos overstrains reload on some machines like the 386. */
830 rtx realpart
, imagpart
;
831 enum machine_mode partmode
= GET_MODE_INNER (mode
);
833 realpart
= gen_reg_rtx (partmode
);
834 imagpart
= gen_reg_rtx (partmode
);
835 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
838 /* Make sure regno_pointer_align, and regno_reg_rtx are large
839 enough to have an element for this pseudo reg number. */
841 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
843 int old_size
= f
->emit
->regno_pointer_align_length
;
847 new = ggc_realloc (f
->emit
->regno_pointer_align
, old_size
* 2);
848 memset (new + old_size
, 0, old_size
);
849 f
->emit
->regno_pointer_align
= (unsigned char *) new;
851 new1
= ggc_realloc (f
->emit
->x_regno_reg_rtx
,
852 old_size
* 2 * sizeof (rtx
));
853 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
854 regno_reg_rtx
= new1
;
856 f
->emit
->regno_pointer_align_length
= old_size
* 2;
859 val
= gen_raw_REG (mode
, reg_rtx_no
);
860 regno_reg_rtx
[reg_rtx_no
++] = val
;
864 /* Generate a register with same attributes as REG,
865 but offsetted by OFFSET. */
868 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
, int offset
)
870 rtx
new = gen_rtx_REG (mode
, regno
);
871 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg
),
872 REG_OFFSET (reg
) + offset
);
876 /* Set the decl for MEM to DECL. */
879 set_reg_attrs_from_mem (rtx reg
, rtx mem
)
881 if (MEM_OFFSET (mem
) && GET_CODE (MEM_OFFSET (mem
)) == CONST_INT
)
883 = get_reg_attrs (MEM_EXPR (mem
), INTVAL (MEM_OFFSET (mem
)));
886 /* Set the register attributes for registers contained in PARM_RTX.
887 Use needed values from memory attributes of MEM. */
890 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
892 if (GET_CODE (parm_rtx
) == REG
)
893 set_reg_attrs_from_mem (parm_rtx
, mem
);
894 else if (GET_CODE (parm_rtx
) == PARALLEL
)
896 /* Check for a NULL entry in the first slot, used to indicate that the
897 parameter goes both on the stack and in registers. */
898 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
899 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
901 rtx x
= XVECEXP (parm_rtx
, 0, i
);
902 if (GET_CODE (XEXP (x
, 0)) == REG
)
903 REG_ATTRS (XEXP (x
, 0))
904 = get_reg_attrs (MEM_EXPR (mem
),
905 INTVAL (XEXP (x
, 1)));
910 /* Assign the RTX X to declaration T. */
912 set_decl_rtl (tree t
, rtx x
)
914 DECL_CHECK (t
)->decl
.rtl
= x
;
918 /* For register, we maintain the reverse information too. */
919 if (GET_CODE (x
) == REG
)
920 REG_ATTRS (x
) = get_reg_attrs (t
, 0);
921 else if (GET_CODE (x
) == SUBREG
)
922 REG_ATTRS (SUBREG_REG (x
))
923 = get_reg_attrs (t
, -SUBREG_BYTE (x
));
924 if (GET_CODE (x
) == CONCAT
)
926 if (REG_P (XEXP (x
, 0)))
927 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
928 if (REG_P (XEXP (x
, 1)))
929 REG_ATTRS (XEXP (x
, 1))
930 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
932 if (GET_CODE (x
) == PARALLEL
)
935 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
937 rtx y
= XVECEXP (x
, 0, i
);
938 if (REG_P (XEXP (y
, 0)))
939 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
944 /* Identify REG (which may be a CONCAT) as a user register. */
947 mark_user_reg (rtx reg
)
949 if (GET_CODE (reg
) == CONCAT
)
951 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
952 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
954 else if (GET_CODE (reg
) == REG
)
955 REG_USERVAR_P (reg
) = 1;
960 /* Identify REG as a probable pointer register and show its alignment
961 as ALIGN, if nonzero. */
964 mark_reg_pointer (rtx reg
, int align
)
966 if (! REG_POINTER (reg
))
968 REG_POINTER (reg
) = 1;
971 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
973 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
974 /* We can no-longer be sure just how aligned this pointer is. */
975 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
978 /* Return 1 plus largest pseudo reg number used in the current function. */
986 /* Return 1 + the largest label number used so far in the current function. */
991 if (last_label_num
&& label_num
== base_label_num
)
992 return last_label_num
;
996 /* Return first label number used in this function (if any were used). */
999 get_first_label_num (void)
1001 return first_label_num
;
1004 /* Return the final regno of X, which is a SUBREG of a hard
1007 subreg_hard_regno (rtx x
, int check_mode
)
1009 enum machine_mode mode
= GET_MODE (x
);
1010 unsigned int byte_offset
, base_regno
, final_regno
;
1011 rtx reg
= SUBREG_REG (x
);
1013 /* This is where we attempt to catch illegal subregs
1014 created by the compiler. */
1015 if (GET_CODE (x
) != SUBREG
1016 || GET_CODE (reg
) != REG
)
1018 base_regno
= REGNO (reg
);
1019 if (base_regno
>= FIRST_PSEUDO_REGISTER
)
1021 if (check_mode
&& ! HARD_REGNO_MODE_OK (base_regno
, GET_MODE (reg
)))
1023 #ifdef ENABLE_CHECKING
1024 if (!subreg_offset_representable_p (REGNO (reg
), GET_MODE (reg
),
1025 SUBREG_BYTE (x
), mode
))
1028 /* Catch non-congruent offsets too. */
1029 byte_offset
= SUBREG_BYTE (x
);
1030 if ((byte_offset
% GET_MODE_SIZE (mode
)) != 0)
1033 final_regno
= subreg_regno (x
);
1038 /* Return a value representing some low-order bits of X, where the number
1039 of low-order bits is given by MODE. Note that no conversion is done
1040 between floating-point and fixed-point values, rather, the bit
1041 representation is returned.
1043 This function handles the cases in common between gen_lowpart, below,
1044 and two variants in cse.c and combine.c. These are the cases that can
1045 be safely handled at all points in the compilation.
1047 If this is not a case we can handle, return 0. */
1050 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1052 int msize
= GET_MODE_SIZE (mode
);
1055 enum machine_mode innermode
;
1057 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1058 so we have to make one up. Yuk. */
1059 innermode
= GET_MODE (x
);
1060 if (GET_CODE (x
) == CONST_INT
&& msize
<= HOST_BITS_PER_WIDE_INT
)
1061 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1062 else if (innermode
== VOIDmode
)
1063 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
* 2, MODE_INT
, 0);
1065 xsize
= GET_MODE_SIZE (innermode
);
1067 if (innermode
== VOIDmode
|| innermode
== BLKmode
)
1070 if (innermode
== mode
)
1073 /* MODE must occupy no more words than the mode of X. */
1074 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1075 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1078 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1079 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& msize
> xsize
)
1082 offset
= subreg_lowpart_offset (mode
, innermode
);
1084 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1085 && (GET_MODE_CLASS (mode
) == MODE_INT
1086 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1088 /* If we are getting the low-order part of something that has been
1089 sign- or zero-extended, we can either just use the object being
1090 extended or make a narrower extension. If we want an even smaller
1091 piece than the size of the object being extended, call ourselves
1094 This case is used mostly by combine and cse. */
1096 if (GET_MODE (XEXP (x
, 0)) == mode
)
1098 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1099 return gen_lowpart_common (mode
, XEXP (x
, 0));
1100 else if (msize
< xsize
)
1101 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1103 else if (GET_CODE (x
) == SUBREG
|| GET_CODE (x
) == REG
1104 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1105 || GET_CODE (x
) == CONST_DOUBLE
|| GET_CODE (x
) == CONST_INT
)
1106 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1108 /* Otherwise, we can't do this. */
1112 /* Return the constant real or imaginary part (which has mode MODE)
1113 of a complex value X. The IMAGPART_P argument determines whether
1114 the real or complex component should be returned. This function
1115 returns NULL_RTX if the component isn't a constant. */
1118 gen_complex_constant_part (enum machine_mode mode
, rtx x
, int imagpart_p
)
1122 if (GET_CODE (x
) == MEM
1123 && GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
)
1125 decl
= SYMBOL_REF_DECL (XEXP (x
, 0));
1126 if (decl
!= NULL_TREE
&& TREE_CODE (decl
) == COMPLEX_CST
)
1128 part
= imagpart_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
1129 if (TREE_CODE (part
) == REAL_CST
1130 || TREE_CODE (part
) == INTEGER_CST
)
1131 return expand_expr (part
, NULL_RTX
, mode
, 0);
1137 /* Return the real part (which has mode MODE) of a complex value X.
1138 This always comes at the low address in memory. */
1141 gen_realpart (enum machine_mode mode
, rtx x
)
1145 /* Handle complex constants. */
1146 part
= gen_complex_constant_part (mode
, x
, 0);
1147 if (part
!= NULL_RTX
)
1150 if (WORDS_BIG_ENDIAN
1151 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1153 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1155 ("can't access real part of complex value in hard register");
1156 else if (WORDS_BIG_ENDIAN
)
1157 return gen_highpart (mode
, x
);
1159 return gen_lowpart (mode
, x
);
1162 /* Return the imaginary part (which has mode MODE) of a complex value X.
1163 This always comes at the high address in memory. */
1166 gen_imagpart (enum machine_mode mode
, rtx x
)
1170 /* Handle complex constants. */
1171 part
= gen_complex_constant_part (mode
, x
, 1);
1172 if (part
!= NULL_RTX
)
1175 if (WORDS_BIG_ENDIAN
)
1176 return gen_lowpart (mode
, x
);
1177 else if (! WORDS_BIG_ENDIAN
1178 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1180 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1182 ("can't access imaginary part of complex value in hard register");
1184 return gen_highpart (mode
, x
);
1187 /* Return 1 iff X, assumed to be a SUBREG,
1188 refers to the real part of the complex value in its containing reg.
1189 Complex values are always stored with the real part in the first word,
1190 regardless of WORDS_BIG_ENDIAN. */
1193 subreg_realpart_p (rtx x
)
1195 if (GET_CODE (x
) != SUBREG
)
1198 return ((unsigned int) SUBREG_BYTE (x
)
1199 < (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
))));
1202 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1203 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1204 least-significant part of X.
1205 MODE specifies how big a part of X to return;
1206 it usually should not be larger than a word.
1207 If X is a MEM whose address is a QUEUED, the value may be so also. */
1210 gen_lowpart (enum machine_mode mode
, rtx x
)
1212 rtx result
= gen_lowpart_common (mode
, x
);
1216 else if (GET_CODE (x
) == REG
)
1218 /* Must be a hard reg that's not valid in MODE. */
1219 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
1224 else if (GET_CODE (x
) == MEM
)
1226 /* The only additional case we can do is MEM. */
1229 /* The following exposes the use of "x" to CSE. */
1230 if (GET_MODE_SIZE (GET_MODE (x
)) <= UNITS_PER_WORD
1231 && SCALAR_INT_MODE_P (GET_MODE (x
))
1232 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode
),
1233 GET_MODE_BITSIZE (GET_MODE (x
)))
1234 && ! no_new_pseudos
)
1235 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1237 if (WORDS_BIG_ENDIAN
)
1238 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1239 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1241 if (BYTES_BIG_ENDIAN
)
1242 /* Adjust the address so that the address-after-the-data
1244 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1245 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
1247 return adjust_address (x
, mode
, offset
);
1249 else if (GET_CODE (x
) == ADDRESSOF
)
1250 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1255 /* Like `gen_lowpart', but refer to the most significant part.
1256 This is used to access the imaginary part of a complex number. */
1259 gen_highpart (enum machine_mode mode
, rtx x
)
1261 unsigned int msize
= GET_MODE_SIZE (mode
);
1264 /* This case loses if X is a subreg. To catch bugs early,
1265 complain if an invalid MODE is used even in other cases. */
1266 if (msize
> UNITS_PER_WORD
1267 && msize
!= (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1270 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1271 subreg_highpart_offset (mode
, GET_MODE (x
)));
1273 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1274 the target if we have a MEM. gen_highpart must return a valid operand,
1275 emitting code if necessary to do so. */
1276 if (result
!= NULL_RTX
&& GET_CODE (result
) == MEM
)
1277 result
= validize_mem (result
);
1284 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1285 be VOIDmode constant. */
1287 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1289 if (GET_MODE (exp
) != VOIDmode
)
1291 if (GET_MODE (exp
) != innermode
)
1293 return gen_highpart (outermode
, exp
);
1295 return simplify_gen_subreg (outermode
, exp
, innermode
,
1296 subreg_highpart_offset (outermode
, innermode
));
1299 /* Return offset in bytes to get OUTERMODE low part
1300 of the value in mode INNERMODE stored in memory in target format. */
1303 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1305 unsigned int offset
= 0;
1306 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1310 if (WORDS_BIG_ENDIAN
)
1311 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1312 if (BYTES_BIG_ENDIAN
)
1313 offset
+= difference
% UNITS_PER_WORD
;
1319 /* Return offset in bytes to get OUTERMODE high part
1320 of the value in mode INNERMODE stored in memory in target format. */
1322 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1324 unsigned int offset
= 0;
1325 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1327 if (GET_MODE_SIZE (innermode
) < GET_MODE_SIZE (outermode
))
1332 if (! WORDS_BIG_ENDIAN
)
1333 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1334 if (! BYTES_BIG_ENDIAN
)
1335 offset
+= difference
% UNITS_PER_WORD
;
1341 /* Return 1 iff X, assumed to be a SUBREG,
1342 refers to the least significant part of its containing reg.
1343 If X is not a SUBREG, always return 1 (it is its own low part!). */
1346 subreg_lowpart_p (rtx x
)
1348 if (GET_CODE (x
) != SUBREG
)
1350 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1353 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1354 == SUBREG_BYTE (x
));
1357 /* Return subword OFFSET of operand OP.
1358 The word number, OFFSET, is interpreted as the word number starting
1359 at the low-order address. OFFSET 0 is the low-order word if not
1360 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1362 If we cannot extract the required word, we return zero. Otherwise,
1363 an rtx corresponding to the requested word will be returned.
1365 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1366 reload has completed, a valid address will always be returned. After
1367 reload, if a valid address cannot be returned, we return zero.
1369 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1370 it is the responsibility of the caller.
1372 MODE is the mode of OP in case it is a CONST_INT.
1374 ??? This is still rather broken for some cases. The problem for the
1375 moment is that all callers of this thing provide no 'goal mode' to
1376 tell us to work with. This exists because all callers were written
1377 in a word based SUBREG world.
1378 Now use of this function can be deprecated by simplify_subreg in most
1383 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1385 if (mode
== VOIDmode
)
1386 mode
= GET_MODE (op
);
1388 if (mode
== VOIDmode
)
1391 /* If OP is narrower than a word, fail. */
1393 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1396 /* If we want a word outside OP, return zero. */
1398 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1401 /* Form a new MEM at the requested address. */
1402 if (GET_CODE (op
) == MEM
)
1404 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1406 if (! validate_address
)
1409 else if (reload_completed
)
1411 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1415 return replace_equiv_address (new, XEXP (new, 0));
1418 /* Rest can be handled by simplify_subreg. */
1419 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1422 /* Similar to `operand_subword', but never return 0. If we can't extract
1423 the required subword, put OP into a register and try again. If that fails,
1424 abort. We always validate the address in this case.
1426 MODE is the mode of OP, in case it is CONST_INT. */
1429 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1431 rtx result
= operand_subword (op
, offset
, 1, mode
);
1436 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1438 /* If this is a register which can not be accessed by words, copy it
1439 to a pseudo register. */
1440 if (GET_CODE (op
) == REG
)
1441 op
= copy_to_reg (op
);
1443 op
= force_reg (mode
, op
);
1446 result
= operand_subword (op
, offset
, 1, mode
);
1453 /* Given a compare instruction, swap the operands.
1454 A test instruction is changed into a compare of 0 against the operand. */
1457 reverse_comparison (rtx insn
)
1459 rtx body
= PATTERN (insn
);
1462 if (GET_CODE (body
) == SET
)
1463 comp
= SET_SRC (body
);
1465 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1467 if (GET_CODE (comp
) == COMPARE
)
1469 rtx op0
= XEXP (comp
, 0);
1470 rtx op1
= XEXP (comp
, 1);
1471 XEXP (comp
, 0) = op1
;
1472 XEXP (comp
, 1) = op0
;
1476 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1477 CONST0_RTX (GET_MODE (comp
)), comp
);
1478 if (GET_CODE (body
) == SET
)
1479 SET_SRC (body
) = new;
1481 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1485 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1486 or (2) a component ref of something variable. Represent the later with
1487 a NULL expression. */
1490 component_ref_for_mem_expr (tree ref
)
1492 tree inner
= TREE_OPERAND (ref
, 0);
1494 if (TREE_CODE (inner
) == COMPONENT_REF
)
1495 inner
= component_ref_for_mem_expr (inner
);
1498 tree placeholder_ptr
= 0;
1500 /* Now remove any conversions: they don't change what the underlying
1501 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1502 while (TREE_CODE (inner
) == NOP_EXPR
|| TREE_CODE (inner
) == CONVERT_EXPR
1503 || TREE_CODE (inner
) == NON_LVALUE_EXPR
1504 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1505 || TREE_CODE (inner
) == SAVE_EXPR
1506 || TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1507 if (TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1508 inner
= find_placeholder (inner
, &placeholder_ptr
);
1510 inner
= TREE_OPERAND (inner
, 0);
1512 if (! DECL_P (inner
))
1516 if (inner
== TREE_OPERAND (ref
, 0))
1519 return build (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1520 TREE_OPERAND (ref
, 1));
1523 /* Given REF, a MEM, and T, either the type of X or the expression
1524 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1525 if we are making a new object of this type. BITPOS is nonzero if
1526 there is an offset outstanding on T that will be applied later. */
1529 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1530 HOST_WIDE_INT bitpos
)
1532 HOST_WIDE_INT alias
= MEM_ALIAS_SET (ref
);
1533 tree expr
= MEM_EXPR (ref
);
1534 rtx offset
= MEM_OFFSET (ref
);
1535 rtx size
= MEM_SIZE (ref
);
1536 unsigned int align
= MEM_ALIGN (ref
);
1537 HOST_WIDE_INT apply_bitpos
= 0;
1540 /* It can happen that type_for_mode was given a mode for which there
1541 is no language-level type. In which case it returns NULL, which
1546 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1547 if (type
== error_mark_node
)
1550 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1551 wrong answer, as it assumes that DECL_RTL already has the right alias
1552 info. Callers should not set DECL_RTL until after the call to
1553 set_mem_attributes. */
1554 if (DECL_P (t
) && ref
== DECL_RTL_IF_SET (t
))
1557 /* Get the alias set from the expression or type (perhaps using a
1558 front-end routine) and use it. */
1559 alias
= get_alias_set (t
);
1561 MEM_VOLATILE_P (ref
) = TYPE_VOLATILE (type
);
1562 MEM_IN_STRUCT_P (ref
) = AGGREGATE_TYPE_P (type
);
1563 RTX_UNCHANGING_P (ref
)
1564 |= ((lang_hooks
.honor_readonly
1565 && (TYPE_READONLY (type
) || TREE_READONLY (t
)))
1566 || (! TYPE_P (t
) && TREE_CONSTANT (t
)));
1568 /* If we are making an object of this type, or if this is a DECL, we know
1569 that it is a scalar if the type is not an aggregate. */
1570 if ((objectp
|| DECL_P (t
)) && ! AGGREGATE_TYPE_P (type
))
1571 MEM_SCALAR_P (ref
) = 1;
1573 /* We can set the alignment from the type if we are making an object,
1574 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1575 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1576 align
= MAX (align
, TYPE_ALIGN (type
));
1578 /* If the size is known, we can set that. */
1579 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1580 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1582 /* If T is not a type, we may be able to deduce some more information about
1586 maybe_set_unchanging (ref
, t
);
1587 if (TREE_THIS_VOLATILE (t
))
1588 MEM_VOLATILE_P (ref
) = 1;
1590 /* Now remove any conversions: they don't change what the underlying
1591 object is. Likewise for SAVE_EXPR. */
1592 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1593 || TREE_CODE (t
) == NON_LVALUE_EXPR
1594 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1595 || TREE_CODE (t
) == SAVE_EXPR
)
1596 t
= TREE_OPERAND (t
, 0);
1598 /* If this expression can't be addressed (e.g., it contains a reference
1599 to a non-addressable field), show we don't change its alias set. */
1600 if (! can_address_p (t
))
1601 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1603 /* If this is a decl, set the attributes of the MEM from it. */
1607 offset
= const0_rtx
;
1608 apply_bitpos
= bitpos
;
1609 size
= (DECL_SIZE_UNIT (t
)
1610 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1611 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1612 align
= DECL_ALIGN (t
);
1615 /* If this is a constant, we know the alignment. */
1616 else if (TREE_CODE_CLASS (TREE_CODE (t
)) == 'c')
1618 align
= TYPE_ALIGN (type
);
1619 #ifdef CONSTANT_ALIGNMENT
1620 align
= CONSTANT_ALIGNMENT (t
, align
);
1624 /* If this is a field reference and not a bit-field, record it. */
1625 /* ??? There is some information that can be gleened from bit-fields,
1626 such as the word offset in the structure that might be modified.
1627 But skip it for now. */
1628 else if (TREE_CODE (t
) == COMPONENT_REF
1629 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1631 expr
= component_ref_for_mem_expr (t
);
1632 offset
= const0_rtx
;
1633 apply_bitpos
= bitpos
;
1634 /* ??? Any reason the field size would be different than
1635 the size we got from the type? */
1638 /* If this is an array reference, look for an outer field reference. */
1639 else if (TREE_CODE (t
) == ARRAY_REF
)
1641 tree off_tree
= size_zero_node
;
1642 /* We can't modify t, because we use it at the end of the
1648 tree index
= TREE_OPERAND (t2
, 1);
1649 tree array
= TREE_OPERAND (t2
, 0);
1650 tree domain
= TYPE_DOMAIN (TREE_TYPE (array
));
1651 tree low_bound
= (domain
? TYPE_MIN_VALUE (domain
) : 0);
1652 tree unit_size
= TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array
)));
1654 /* We assume all arrays have sizes that are a multiple of a byte.
1655 First subtract the lower bound, if any, in the type of the
1656 index, then convert to sizetype and multiply by the size of the
1658 if (low_bound
!= 0 && ! integer_zerop (low_bound
))
1659 index
= fold (build (MINUS_EXPR
, TREE_TYPE (index
),
1662 /* If the index has a self-referential type, pass it to a
1663 WITH_RECORD_EXPR; if the component size is, pass our
1664 component to one. */
1665 if (CONTAINS_PLACEHOLDER_P (index
))
1666 index
= build (WITH_RECORD_EXPR
, TREE_TYPE (index
), index
, t2
);
1667 if (CONTAINS_PLACEHOLDER_P (unit_size
))
1668 unit_size
= build (WITH_RECORD_EXPR
, sizetype
,
1672 = fold (build (PLUS_EXPR
, sizetype
,
1673 fold (build (MULT_EXPR
, sizetype
,
1677 t2
= TREE_OPERAND (t2
, 0);
1679 while (TREE_CODE (t2
) == ARRAY_REF
);
1685 if (host_integerp (off_tree
, 1))
1687 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1688 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1689 align
= DECL_ALIGN (t2
);
1690 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< align
)
1692 offset
= GEN_INT (ioff
);
1693 apply_bitpos
= bitpos
;
1696 else if (TREE_CODE (t2
) == COMPONENT_REF
)
1698 expr
= component_ref_for_mem_expr (t2
);
1699 if (host_integerp (off_tree
, 1))
1701 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
1702 apply_bitpos
= bitpos
;
1704 /* ??? Any reason the field size would be different than
1705 the size we got from the type? */
1707 else if (flag_argument_noalias
> 1
1708 && TREE_CODE (t2
) == INDIRECT_REF
1709 && TREE_CODE (TREE_OPERAND (t2
, 0)) == PARM_DECL
)
1716 /* If this is a Fortran indirect argument reference, record the
1718 else if (flag_argument_noalias
> 1
1719 && TREE_CODE (t
) == INDIRECT_REF
1720 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
1727 /* If we modified OFFSET based on T, then subtract the outstanding
1728 bit position offset. Similarly, increase the size of the accessed
1729 object to contain the negative offset. */
1732 offset
= plus_constant (offset
, -(apply_bitpos
/ BITS_PER_UNIT
));
1734 size
= plus_constant (size
, apply_bitpos
/ BITS_PER_UNIT
);
1737 /* Now set the attributes we computed above. */
1739 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
1741 /* If this is already known to be a scalar or aggregate, we are done. */
1742 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
1745 /* If it is a reference into an aggregate, this is part of an aggregate.
1746 Otherwise we don't know. */
1747 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
1748 || TREE_CODE (t
) == ARRAY_RANGE_REF
1749 || TREE_CODE (t
) == BIT_FIELD_REF
)
1750 MEM_IN_STRUCT_P (ref
) = 1;
1754 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1756 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1759 /* Set the decl for MEM to DECL. */
1762 set_mem_attrs_from_reg (rtx mem
, rtx reg
)
1765 = get_mem_attrs (MEM_ALIAS_SET (mem
), REG_EXPR (reg
),
1766 GEN_INT (REG_OFFSET (reg
)),
1767 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1770 /* Set the alias set of MEM to SET. */
1773 set_mem_alias_set (rtx mem
, HOST_WIDE_INT set
)
1775 #ifdef ENABLE_CHECKING
1776 /* If the new and old alias sets don't conflict, something is wrong. */
1777 if (!alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)))
1781 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
1782 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1786 /* Set the alignment of MEM to ALIGN bits. */
1789 set_mem_align (rtx mem
, unsigned int align
)
1791 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1792 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
1796 /* Set the expr for MEM to EXPR. */
1799 set_mem_expr (rtx mem
, tree expr
)
1802 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
1803 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1806 /* Set the offset of MEM to OFFSET. */
1809 set_mem_offset (rtx mem
, rtx offset
)
1811 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1812 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
1816 /* Set the size of MEM to SIZE. */
1819 set_mem_size (rtx mem
, rtx size
)
1821 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1822 MEM_OFFSET (mem
), size
, MEM_ALIGN (mem
),
1826 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1827 and its address changed to ADDR. (VOIDmode means don't change the mode.
1828 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1829 returned memory location is required to be valid. The memory
1830 attributes are not changed. */
1833 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
1837 if (GET_CODE (memref
) != MEM
)
1839 if (mode
== VOIDmode
)
1840 mode
= GET_MODE (memref
);
1842 addr
= XEXP (memref
, 0);
1843 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
1844 && (!validate
|| memory_address_p (mode
, addr
)))
1849 if (reload_in_progress
|| reload_completed
)
1851 if (! memory_address_p (mode
, addr
))
1855 addr
= memory_address (mode
, addr
);
1858 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1861 new = gen_rtx_MEM (mode
, addr
);
1862 MEM_COPY_ATTRIBUTES (new, memref
);
1866 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1867 way we are changing MEMREF, so we only preserve the alias set. */
1870 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
1872 rtx
new = change_address_1 (memref
, mode
, addr
, 1), size
;
1873 enum machine_mode mmode
= GET_MODE (new);
1876 size
= mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
));
1877 align
= mmode
== BLKmode
? BITS_PER_UNIT
: GET_MODE_ALIGNMENT (mmode
);
1879 /* If there are no changes, just return the original memory reference. */
1882 if (MEM_ATTRS (memref
) == 0
1883 || (MEM_EXPR (memref
) == NULL
1884 && MEM_OFFSET (memref
) == NULL
1885 && MEM_SIZE (memref
) == size
1886 && MEM_ALIGN (memref
) == align
))
1889 new = gen_rtx_MEM (mmode
, XEXP (memref
, 0));
1890 MEM_COPY_ATTRIBUTES (new, memref
);
1894 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0, size
, align
, mmode
);
1899 /* Return a memory reference like MEMREF, but with its mode changed
1900 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1901 nonzero, the memory address is forced to be valid.
1902 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1903 and caller is responsible for adjusting MEMREF base register. */
1906 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
1907 int validate
, int adjust
)
1909 rtx addr
= XEXP (memref
, 0);
1911 rtx memoffset
= MEM_OFFSET (memref
);
1913 unsigned int memalign
= MEM_ALIGN (memref
);
1915 /* If there are no changes, just return the original memory reference. */
1916 if (mode
== GET_MODE (memref
) && !offset
1917 && (!validate
|| memory_address_p (mode
, addr
)))
1920 /* ??? Prefer to create garbage instead of creating shared rtl.
1921 This may happen even if offset is nonzero -- consider
1922 (plus (plus reg reg) const_int) -- so do this always. */
1923 addr
= copy_rtx (addr
);
1927 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1928 object, we can merge it into the LO_SUM. */
1929 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
1931 && (unsigned HOST_WIDE_INT
) offset
1932 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
1933 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
1934 plus_constant (XEXP (addr
, 1), offset
));
1936 addr
= plus_constant (addr
, offset
);
1939 new = change_address_1 (memref
, mode
, addr
, validate
);
1941 /* Compute the new values of the memory attributes due to this adjustment.
1942 We add the offsets and update the alignment. */
1944 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
1946 /* Compute the new alignment by taking the MIN of the alignment and the
1947 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1952 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
1954 /* We can compute the size in a number of ways. */
1955 if (GET_MODE (new) != BLKmode
)
1956 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1957 else if (MEM_SIZE (memref
))
1958 size
= plus_constant (MEM_SIZE (memref
), -offset
);
1960 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
1961 memoffset
, size
, memalign
, GET_MODE (new));
1963 /* At some point, we should validate that this offset is within the object,
1964 if all the appropriate values are known. */
1968 /* Return a memory reference like MEMREF, but with its mode changed
1969 to MODE and its address changed to ADDR, which is assumed to be
1970 MEMREF offseted by OFFSET bytes. If VALIDATE is
1971 nonzero, the memory address is forced to be valid. */
1974 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
1975 HOST_WIDE_INT offset
, int validate
)
1977 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
1978 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
1981 /* Return a memory reference like MEMREF, but whose address is changed by
1982 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1983 known to be in OFFSET (possibly 1). */
1986 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
1988 rtx
new, addr
= XEXP (memref
, 0);
1990 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
1992 /* At this point we don't know _why_ the address is invalid. It
1993 could have secondary memory references, multiplies or anything.
1995 However, if we did go and rearrange things, we can wind up not
1996 being able to recognize the magic around pic_offset_table_rtx.
1997 This stuff is fragile, and is yet another example of why it is
1998 bad to expose PIC machinery too early. */
1999 if (! memory_address_p (GET_MODE (memref
), new)
2000 && GET_CODE (addr
) == PLUS
2001 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2003 addr
= force_reg (GET_MODE (addr
), addr
);
2004 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2007 update_temp_slot_address (XEXP (memref
, 0), new);
2008 new = change_address_1 (memref
, VOIDmode
, new, 1);
2010 /* If there are no changes, just return the original memory reference. */
2014 /* Update the alignment to reflect the offset. Reset the offset, which
2017 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
2018 MIN (MEM_ALIGN (memref
), pow2
* BITS_PER_UNIT
),
2023 /* Return a memory reference like MEMREF, but with its address changed to
2024 ADDR. The caller is asserting that the actual piece of memory pointed
2025 to is the same, just the form of the address is being changed, such as
2026 by putting something into a register. */
2029 replace_equiv_address (rtx memref
, rtx addr
)
2031 /* change_address_1 copies the memory attribute structure without change
2032 and that's exactly what we want here. */
2033 update_temp_slot_address (XEXP (memref
, 0), addr
);
2034 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2037 /* Likewise, but the reference is not required to be valid. */
2040 replace_equiv_address_nv (rtx memref
, rtx addr
)
2042 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2045 /* Return a memory reference like MEMREF, but with its mode widened to
2046 MODE and offset by OFFSET. This would be used by targets that e.g.
2047 cannot issue QImode memory operations and have to use SImode memory
2048 operations plus masking logic. */
2051 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2053 rtx
new = adjust_address_1 (memref
, mode
, offset
, 1, 1);
2054 tree expr
= MEM_EXPR (new);
2055 rtx memoffset
= MEM_OFFSET (new);
2056 unsigned int size
= GET_MODE_SIZE (mode
);
2058 /* If there are no changes, just return the original memory reference. */
2062 /* If we don't know what offset we were at within the expression, then
2063 we can't know if we've overstepped the bounds. */
2069 if (TREE_CODE (expr
) == COMPONENT_REF
)
2071 tree field
= TREE_OPERAND (expr
, 1);
2073 if (! DECL_SIZE_UNIT (field
))
2079 /* Is the field at least as large as the access? If so, ok,
2080 otherwise strip back to the containing structure. */
2081 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2082 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2083 && INTVAL (memoffset
) >= 0)
2086 if (! host_integerp (DECL_FIELD_OFFSET (field
), 1))
2092 expr
= TREE_OPERAND (expr
, 0);
2093 memoffset
= (GEN_INT (INTVAL (memoffset
)
2094 + tree_low_cst (DECL_FIELD_OFFSET (field
), 1)
2095 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2098 /* Similarly for the decl. */
2099 else if (DECL_P (expr
)
2100 && DECL_SIZE_UNIT (expr
)
2101 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
2102 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2103 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2107 /* The widened memory access overflows the expression, which means
2108 that it could alias another expression. Zap it. */
2115 memoffset
= NULL_RTX
;
2117 /* The widened memory may alias other stuff, so zap the alias set. */
2118 /* ??? Maybe use get_alias_set on any remaining expression. */
2120 MEM_ATTRS (new) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2121 MEM_ALIGN (new), mode
);
2126 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2129 gen_label_rtx (void)
2131 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2132 NULL
, label_num
++, NULL
);
2135 /* For procedure integration. */
2137 /* Install new pointers to the first and last insns in the chain.
2138 Also, set cur_insn_uid to one higher than the last in use.
2139 Used for an inline-procedure after copying the insn chain. */
2142 set_new_first_and_last_insn (rtx first
, rtx last
)
2150 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2151 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2156 /* Set the last label number found in the current function.
2157 This is used when belatedly compiling an inline function. */
2160 set_new_last_label_num (int last
)
2162 base_label_num
= label_num
;
2163 last_label_num
= last
;
2166 /* Restore all variables describing the current status from the structure *P.
2167 This is used after a nested function. */
2170 restore_emit_status (struct function
*p ATTRIBUTE_UNUSED
)
2175 /* Go through all the RTL insn bodies and copy any invalid shared
2176 structure. This routine should only be called once. */
2179 unshare_all_rtl (tree fndecl
, rtx insn
)
2183 /* Make sure that virtual parameters are not shared. */
2184 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
2185 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
2187 /* Make sure that virtual stack slots are not shared. */
2188 unshare_all_decls (DECL_INITIAL (fndecl
));
2190 /* Unshare just about everything else. */
2191 unshare_all_rtl_in_chain (insn
);
2193 /* Make sure the addresses of stack slots found outside the insn chain
2194 (such as, in DECL_RTL of a variable) are not shared
2195 with the insn chain.
2197 This special care is necessary when the stack slot MEM does not
2198 actually appear in the insn chain. If it does appear, its address
2199 is unshared from all else at that point. */
2200 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2203 /* Go through all the RTL insn bodies and copy any invalid shared
2204 structure, again. This is a fairly expensive thing to do so it
2205 should be done sparingly. */
2208 unshare_all_rtl_again (rtx insn
)
2213 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2216 reset_used_flags (PATTERN (p
));
2217 reset_used_flags (REG_NOTES (p
));
2218 reset_used_flags (LOG_LINKS (p
));
2221 /* Make sure that virtual stack slots are not shared. */
2222 reset_used_decls (DECL_INITIAL (cfun
->decl
));
2224 /* Make sure that virtual parameters are not shared. */
2225 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2226 reset_used_flags (DECL_RTL (decl
));
2228 reset_used_flags (stack_slot_list
);
2230 unshare_all_rtl (cfun
->decl
, insn
);
2233 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2234 Recursively does the same for subexpressions. */
2237 verify_rtx_sharing (rtx orig
, rtx insn
)
2242 const char *format_ptr
;
2247 code
= GET_CODE (x
);
2249 /* These types may be freely shared. */
2265 /* SCRATCH must be shared because they represent distinct values. */
2267 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2272 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2273 a LABEL_REF, it isn't sharable. */
2274 if (GET_CODE (XEXP (x
, 0)) == PLUS
2275 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2276 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2281 /* A MEM is allowed to be shared if its address is constant. */
2282 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2283 || reload_completed
|| reload_in_progress
)
2292 /* This rtx may not be shared. If it has already been seen,
2293 replace it with a copy of itself. */
2295 if (RTX_FLAG (x
, used
))
2297 error ("Invalid rtl sharing found in the insn");
2299 error ("Shared rtx");
2303 RTX_FLAG (x
, used
) = 1;
2305 /* Now scan the subexpressions recursively. */
2307 format_ptr
= GET_RTX_FORMAT (code
);
2309 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2311 switch (*format_ptr
++)
2314 verify_rtx_sharing (XEXP (x
, i
), insn
);
2318 if (XVEC (x
, i
) != NULL
)
2321 int len
= XVECLEN (x
, i
);
2323 for (j
= 0; j
< len
; j
++)
2325 /* We allow sharing of ASM_OPERANDS inside single instruction. */
2326 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2327 && GET_CODE (SET_SRC (XVECEXP (x
, i
, j
))) == ASM_OPERANDS
)
2328 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2330 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2339 /* Go through all the RTL insn bodies and check that there is no unexpected
2340 sharing in between the subexpressions. */
2343 verify_rtl_sharing (void)
2347 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2350 reset_used_flags (PATTERN (p
));
2351 reset_used_flags (REG_NOTES (p
));
2352 reset_used_flags (LOG_LINKS (p
));
2355 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2358 verify_rtx_sharing (PATTERN (p
), p
);
2359 verify_rtx_sharing (REG_NOTES (p
), p
);
2360 verify_rtx_sharing (LOG_LINKS (p
), p
);
2364 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2365 Assumes the mark bits are cleared at entry. */
2368 unshare_all_rtl_in_chain (rtx insn
)
2370 for (; insn
; insn
= NEXT_INSN (insn
))
2373 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2374 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2375 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
2379 /* Go through all virtual stack slots of a function and copy any
2380 shared structure. */
2382 unshare_all_decls (tree blk
)
2386 /* Copy shared decls. */
2387 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2388 if (DECL_RTL_SET_P (t
))
2389 SET_DECL_RTL (t
, copy_rtx_if_shared (DECL_RTL (t
)));
2391 /* Now process sub-blocks. */
2392 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2393 unshare_all_decls (t
);
2396 /* Go through all virtual stack slots of a function and mark them as
2399 reset_used_decls (tree blk
)
2404 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2405 if (DECL_RTL_SET_P (t
))
2406 reset_used_flags (DECL_RTL (t
));
2408 /* Now process sub-blocks. */
2409 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2410 reset_used_decls (t
);
2413 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2414 placed in the result directly, rather than being copied. MAY_SHARE is
2415 either a MEM of an EXPR_LIST of MEMs. */
2418 copy_most_rtx (rtx orig
, rtx may_share
)
2423 const char *format_ptr
;
2425 if (orig
== may_share
2426 || (GET_CODE (may_share
) == EXPR_LIST
2427 && in_expr_list_p (may_share
, orig
)))
2430 code
= GET_CODE (orig
);
2448 copy
= rtx_alloc (code
);
2449 PUT_MODE (copy
, GET_MODE (orig
));
2450 RTX_FLAG (copy
, in_struct
) = RTX_FLAG (orig
, in_struct
);
2451 RTX_FLAG (copy
, volatil
) = RTX_FLAG (orig
, volatil
);
2452 RTX_FLAG (copy
, unchanging
) = RTX_FLAG (orig
, unchanging
);
2453 RTX_FLAG (copy
, integrated
) = RTX_FLAG (orig
, integrated
);
2454 RTX_FLAG (copy
, frame_related
) = RTX_FLAG (orig
, frame_related
);
2456 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
2458 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
2460 switch (*format_ptr
++)
2463 XEXP (copy
, i
) = XEXP (orig
, i
);
2464 if (XEXP (orig
, i
) != NULL
&& XEXP (orig
, i
) != may_share
)
2465 XEXP (copy
, i
) = copy_most_rtx (XEXP (orig
, i
), may_share
);
2469 XEXP (copy
, i
) = XEXP (orig
, i
);
2474 XVEC (copy
, i
) = XVEC (orig
, i
);
2475 if (XVEC (orig
, i
) != NULL
)
2477 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
2478 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
2479 XVECEXP (copy
, i
, j
)
2480 = copy_most_rtx (XVECEXP (orig
, i
, j
), may_share
);
2485 XWINT (copy
, i
) = XWINT (orig
, i
);
2490 XINT (copy
, i
) = XINT (orig
, i
);
2494 XTREE (copy
, i
) = XTREE (orig
, i
);
2499 XSTR (copy
, i
) = XSTR (orig
, i
);
2503 X0ANY (copy
, i
) = X0ANY (orig
, i
);
2513 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2514 Recursively does the same for subexpressions. Uses
2515 copy_rtx_if_shared_1 to reduce stack space. */
2518 copy_rtx_if_shared (rtx orig
)
2520 copy_rtx_if_shared_1 (&orig
);
2524 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2525 use. Recursively does the same for subexpressions. */
2528 copy_rtx_if_shared_1 (rtx
*orig1
)
2534 const char *format_ptr
;
2538 /* Repeat is used to turn tail-recursion into iteration. */
2545 code
= GET_CODE (x
);
2547 /* These types may be freely shared. */
2562 /* SCRATCH must be shared because they represent distinct values. */
2565 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2570 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2571 a LABEL_REF, it isn't sharable. */
2572 if (GET_CODE (XEXP (x
, 0)) == PLUS
2573 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2574 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2583 /* The chain of insns is not being copied. */
2590 /* This rtx may not be shared. If it has already been seen,
2591 replace it with a copy of itself. */
2593 if (RTX_FLAG (x
, used
))
2597 copy
= rtx_alloc (code
);
2598 memcpy (copy
, x
, RTX_SIZE (code
));
2602 RTX_FLAG (x
, used
) = 1;
2604 /* Now scan the subexpressions recursively.
2605 We can store any replaced subexpressions directly into X
2606 since we know X is not shared! Any vectors in X
2607 must be copied if X was copied. */
2609 format_ptr
= GET_RTX_FORMAT (code
);
2610 length
= GET_RTX_LENGTH (code
);
2613 for (i
= 0; i
< length
; i
++)
2615 switch (*format_ptr
++)
2619 copy_rtx_if_shared_1 (last_ptr
);
2620 last_ptr
= &XEXP (x
, i
);
2624 if (XVEC (x
, i
) != NULL
)
2627 int len
= XVECLEN (x
, i
);
2629 /* Copy the vector iff I copied the rtx and the length
2631 if (copied
&& len
> 0)
2632 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2634 /* Call recursively on all inside the vector. */
2635 for (j
= 0; j
< len
; j
++)
2638 copy_rtx_if_shared_1 (last_ptr
);
2639 last_ptr
= &XVECEXP (x
, i
, j
);
2654 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2655 to look for shared sub-parts. */
2658 reset_used_flags (rtx x
)
2662 const char *format_ptr
;
2665 /* Repeat is used to turn tail-recursion into iteration. */
2670 code
= GET_CODE (x
);
2672 /* These types may be freely shared so we needn't do any resetting
2694 /* The chain of insns is not being copied. */
2701 RTX_FLAG (x
, used
) = 0;
2703 format_ptr
= GET_RTX_FORMAT (code
);
2704 length
= GET_RTX_LENGTH (code
);
2706 for (i
= 0; i
< length
; i
++)
2708 switch (*format_ptr
++)
2716 reset_used_flags (XEXP (x
, i
));
2720 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2721 reset_used_flags (XVECEXP (x
, i
, j
));
2727 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2728 to look for shared sub-parts. */
2731 set_used_flags (rtx x
)
2735 const char *format_ptr
;
2740 code
= GET_CODE (x
);
2742 /* These types may be freely shared so we needn't do any resetting
2764 /* The chain of insns is not being copied. */
2771 RTX_FLAG (x
, used
) = 1;
2773 format_ptr
= GET_RTX_FORMAT (code
);
2774 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2776 switch (*format_ptr
++)
2779 set_used_flags (XEXP (x
, i
));
2783 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2784 set_used_flags (XVECEXP (x
, i
, j
));
2790 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2791 Return X or the rtx for the pseudo reg the value of X was copied into.
2792 OTHER must be valid as a SET_DEST. */
2795 make_safe_from (rtx x
, rtx other
)
2798 switch (GET_CODE (other
))
2801 other
= SUBREG_REG (other
);
2803 case STRICT_LOW_PART
:
2806 other
= XEXP (other
, 0);
2812 if ((GET_CODE (other
) == MEM
2814 && GET_CODE (x
) != REG
2815 && GET_CODE (x
) != SUBREG
)
2816 || (GET_CODE (other
) == REG
2817 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2818 || reg_mentioned_p (other
, x
))))
2820 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2821 emit_move_insn (temp
, x
);
2827 /* Emission of insns (adding them to the doubly-linked list). */
2829 /* Return the first insn of the current sequence or current function. */
2837 /* Specify a new insn as the first in the chain. */
2840 set_first_insn (rtx insn
)
2842 if (PREV_INSN (insn
) != 0)
2847 /* Return the last insn emitted in current sequence or current function. */
2850 get_last_insn (void)
2855 /* Specify a new insn as the last in the chain. */
2858 set_last_insn (rtx insn
)
2860 if (NEXT_INSN (insn
) != 0)
2865 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2868 get_last_insn_anywhere (void)
2870 struct sequence_stack
*stack
;
2873 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2874 if (stack
->last
!= 0)
2879 /* Return the first nonnote insn emitted in current sequence or current
2880 function. This routine looks inside SEQUENCEs. */
2883 get_first_nonnote_insn (void)
2885 rtx insn
= first_insn
;
2889 insn
= next_insn (insn
);
2890 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2897 /* Return the last nonnote insn emitted in current sequence or current
2898 function. This routine looks inside SEQUENCEs. */
2901 get_last_nonnote_insn (void)
2903 rtx insn
= last_insn
;
2907 insn
= previous_insn (insn
);
2908 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2915 /* Return a number larger than any instruction's uid in this function. */
2920 return cur_insn_uid
;
2923 /* Renumber instructions so that no instruction UIDs are wasted. */
2926 renumber_insns (FILE *stream
)
2930 /* If we're not supposed to renumber instructions, don't. */
2931 if (!flag_renumber_insns
)
2934 /* If there aren't that many instructions, then it's not really
2935 worth renumbering them. */
2936 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
2941 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2944 fprintf (stream
, "Renumbering insn %d to %d\n",
2945 INSN_UID (insn
), cur_insn_uid
);
2946 INSN_UID (insn
) = cur_insn_uid
++;
2950 /* Return the next insn. If it is a SEQUENCE, return the first insn
2954 next_insn (rtx insn
)
2958 insn
= NEXT_INSN (insn
);
2959 if (insn
&& GET_CODE (insn
) == INSN
2960 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2961 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2967 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2971 previous_insn (rtx insn
)
2975 insn
= PREV_INSN (insn
);
2976 if (insn
&& GET_CODE (insn
) == INSN
2977 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2978 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2984 /* Return the next insn after INSN that is not a NOTE. This routine does not
2985 look inside SEQUENCEs. */
2988 next_nonnote_insn (rtx insn
)
2992 insn
= NEXT_INSN (insn
);
2993 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
3000 /* Return the previous insn before INSN that is not a NOTE. This routine does
3001 not look inside SEQUENCEs. */
3004 prev_nonnote_insn (rtx insn
)
3008 insn
= PREV_INSN (insn
);
3009 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
3016 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3017 or 0, if there is none. This routine does not look inside
3021 next_real_insn (rtx insn
)
3025 insn
= NEXT_INSN (insn
);
3026 if (insn
== 0 || GET_CODE (insn
) == INSN
3027 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
3034 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3035 or 0, if there is none. This routine does not look inside
3039 prev_real_insn (rtx insn
)
3043 insn
= PREV_INSN (insn
);
3044 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
3045 || GET_CODE (insn
) == JUMP_INSN
)
3052 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3053 This routine does not look inside SEQUENCEs. */
3056 last_call_insn (void)
3060 for (insn
= get_last_insn ();
3061 insn
&& GET_CODE (insn
) != CALL_INSN
;
3062 insn
= PREV_INSN (insn
))
3068 /* Find the next insn after INSN that really does something. This routine
3069 does not look inside SEQUENCEs. Until reload has completed, this is the
3070 same as next_real_insn. */
3073 active_insn_p (rtx insn
)
3075 return (GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
3076 || (GET_CODE (insn
) == INSN
3077 && (! reload_completed
3078 || (GET_CODE (PATTERN (insn
)) != USE
3079 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3083 next_active_insn (rtx insn
)
3087 insn
= NEXT_INSN (insn
);
3088 if (insn
== 0 || active_insn_p (insn
))
3095 /* Find the last insn before INSN that really does something. This routine
3096 does not look inside SEQUENCEs. Until reload has completed, this is the
3097 same as prev_real_insn. */
3100 prev_active_insn (rtx insn
)
3104 insn
= PREV_INSN (insn
);
3105 if (insn
== 0 || active_insn_p (insn
))
3112 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3115 next_label (rtx insn
)
3119 insn
= NEXT_INSN (insn
);
3120 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3127 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3130 prev_label (rtx insn
)
3134 insn
= PREV_INSN (insn
);
3135 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3143 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3144 and REG_CC_USER notes so we can find it. */
3147 link_cc0_insns (rtx insn
)
3149 rtx user
= next_nonnote_insn (insn
);
3151 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
3152 user
= XVECEXP (PATTERN (user
), 0, 0);
3154 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
3156 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
3159 /* Return the next insn that uses CC0 after INSN, which is assumed to
3160 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3161 applied to the result of this function should yield INSN).
3163 Normally, this is simply the next insn. However, if a REG_CC_USER note
3164 is present, it contains the insn that uses CC0.
3166 Return 0 if we can't find the insn. */
3169 next_cc0_user (rtx insn
)
3171 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3174 return XEXP (note
, 0);
3176 insn
= next_nonnote_insn (insn
);
3177 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3178 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3180 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3186 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3187 note, it is the previous insn. */
3190 prev_cc0_setter (rtx insn
)
3192 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3195 return XEXP (note
, 0);
3197 insn
= prev_nonnote_insn (insn
);
3198 if (! sets_cc0_p (PATTERN (insn
)))
3205 /* Increment the label uses for all labels present in rtx. */
3208 mark_label_nuses (rtx x
)
3214 code
= GET_CODE (x
);
3215 if (code
== LABEL_REF
)
3216 LABEL_NUSES (XEXP (x
, 0))++;
3218 fmt
= GET_RTX_FORMAT (code
);
3219 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3222 mark_label_nuses (XEXP (x
, i
));
3223 else if (fmt
[i
] == 'E')
3224 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3225 mark_label_nuses (XVECEXP (x
, i
, j
));
3230 /* Try splitting insns that can be split for better scheduling.
3231 PAT is the pattern which might split.
3232 TRIAL is the insn providing PAT.
3233 LAST is nonzero if we should return the last insn of the sequence produced.
3235 If this routine succeeds in splitting, it returns the first or last
3236 replacement insn depending on the value of LAST. Otherwise, it
3237 returns TRIAL. If the insn to be returned can be split, it will be. */
3240 try_split (rtx pat
, rtx trial
, int last
)
3242 rtx before
= PREV_INSN (trial
);
3243 rtx after
= NEXT_INSN (trial
);
3244 int has_barrier
= 0;
3248 rtx insn_last
, insn
;
3251 if (any_condjump_p (trial
)
3252 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3253 split_branch_probability
= INTVAL (XEXP (note
, 0));
3254 probability
= split_branch_probability
;
3256 seq
= split_insns (pat
, trial
);
3258 split_branch_probability
= -1;
3260 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3261 We may need to handle this specially. */
3262 if (after
&& GET_CODE (after
) == BARRIER
)
3265 after
= NEXT_INSN (after
);
3271 /* Avoid infinite loop if any insn of the result matches
3272 the original pattern. */
3276 if (INSN_P (insn_last
)
3277 && rtx_equal_p (PATTERN (insn_last
), pat
))
3279 if (!NEXT_INSN (insn_last
))
3281 insn_last
= NEXT_INSN (insn_last
);
3285 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3287 if (GET_CODE (insn
) == JUMP_INSN
)
3289 mark_jump_label (PATTERN (insn
), insn
, 0);
3291 if (probability
!= -1
3292 && any_condjump_p (insn
)
3293 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3295 /* We can preserve the REG_BR_PROB notes only if exactly
3296 one jump is created, otherwise the machine description
3297 is responsible for this step using
3298 split_branch_probability variable. */
3302 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
3303 GEN_INT (probability
),
3309 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3310 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3311 if (GET_CODE (trial
) == CALL_INSN
)
3313 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3314 if (GET_CODE (insn
) == CALL_INSN
)
3316 rtx
*p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3319 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3320 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3324 /* Copy notes, particularly those related to the CFG. */
3325 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3327 switch (REG_NOTE_KIND (note
))
3331 while (insn
!= NULL_RTX
)
3333 if (GET_CODE (insn
) == CALL_INSN
3334 || (flag_non_call_exceptions
3335 && may_trap_p (PATTERN (insn
))))
3337 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
3340 insn
= PREV_INSN (insn
);
3346 case REG_ALWAYS_RETURN
:
3348 while (insn
!= NULL_RTX
)
3350 if (GET_CODE (insn
) == CALL_INSN
)
3352 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3355 insn
= PREV_INSN (insn
);
3359 case REG_NON_LOCAL_GOTO
:
3361 while (insn
!= NULL_RTX
)
3363 if (GET_CODE (insn
) == JUMP_INSN
)
3365 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3368 insn
= PREV_INSN (insn
);
3377 /* If there are LABELS inside the split insns increment the
3378 usage count so we don't delete the label. */
3379 if (GET_CODE (trial
) == INSN
)
3382 while (insn
!= NULL_RTX
)
3384 if (GET_CODE (insn
) == INSN
)
3385 mark_label_nuses (PATTERN (insn
));
3387 insn
= PREV_INSN (insn
);
3391 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATOR (trial
));
3393 delete_insn (trial
);
3395 emit_barrier_after (tem
);
3397 /* Recursively call try_split for each new insn created; by the
3398 time control returns here that insn will be fully split, so
3399 set LAST and continue from the insn after the one returned.
3400 We can't use next_active_insn here since AFTER may be a note.
3401 Ignore deleted insns, which can be occur if not optimizing. */
3402 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3403 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3404 tem
= try_split (PATTERN (tem
), tem
, 1);
3406 /* Return either the first or the last insn, depending on which was
3409 ? (after
? PREV_INSN (after
) : last_insn
)
3410 : NEXT_INSN (before
);
3413 /* Make and return an INSN rtx, initializing all its slots.
3414 Store PATTERN in the pattern slots. */
3417 make_insn_raw (rtx pattern
)
3421 insn
= rtx_alloc (INSN
);
3423 INSN_UID (insn
) = cur_insn_uid
++;
3424 PATTERN (insn
) = pattern
;
3425 INSN_CODE (insn
) = -1;
3426 LOG_LINKS (insn
) = NULL
;
3427 REG_NOTES (insn
) = NULL
;
3428 INSN_LOCATOR (insn
) = 0;
3429 BLOCK_FOR_INSN (insn
) = NULL
;
3431 #ifdef ENABLE_RTL_CHECKING
3434 && (returnjump_p (insn
)
3435 || (GET_CODE (insn
) == SET
3436 && SET_DEST (insn
) == pc_rtx
)))
3438 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3446 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3449 make_jump_insn_raw (rtx pattern
)
3453 insn
= rtx_alloc (JUMP_INSN
);
3454 INSN_UID (insn
) = cur_insn_uid
++;
3456 PATTERN (insn
) = pattern
;
3457 INSN_CODE (insn
) = -1;
3458 LOG_LINKS (insn
) = NULL
;
3459 REG_NOTES (insn
) = NULL
;
3460 JUMP_LABEL (insn
) = NULL
;
3461 INSN_LOCATOR (insn
) = 0;
3462 BLOCK_FOR_INSN (insn
) = NULL
;
3467 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3470 make_call_insn_raw (rtx pattern
)
3474 insn
= rtx_alloc (CALL_INSN
);
3475 INSN_UID (insn
) = cur_insn_uid
++;
3477 PATTERN (insn
) = pattern
;
3478 INSN_CODE (insn
) = -1;
3479 LOG_LINKS (insn
) = NULL
;
3480 REG_NOTES (insn
) = NULL
;
3481 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3482 INSN_LOCATOR (insn
) = 0;
3483 BLOCK_FOR_INSN (insn
) = NULL
;
3488 /* Add INSN to the end of the doubly-linked list.
3489 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3494 PREV_INSN (insn
) = last_insn
;
3495 NEXT_INSN (insn
) = 0;
3497 if (NULL
!= last_insn
)
3498 NEXT_INSN (last_insn
) = insn
;
3500 if (NULL
== first_insn
)
3506 /* Add INSN into the doubly-linked list after insn AFTER. This and
3507 the next should be the only functions called to insert an insn once
3508 delay slots have been filled since only they know how to update a
3512 add_insn_after (rtx insn
, rtx after
)
3514 rtx next
= NEXT_INSN (after
);
3517 if (optimize
&& INSN_DELETED_P (after
))
3520 NEXT_INSN (insn
) = next
;
3521 PREV_INSN (insn
) = after
;
3525 PREV_INSN (next
) = insn
;
3526 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3527 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3529 else if (last_insn
== after
)
3533 struct sequence_stack
*stack
= seq_stack
;
3534 /* Scan all pending sequences too. */
3535 for (; stack
; stack
= stack
->next
)
3536 if (after
== stack
->last
)
3546 if (GET_CODE (after
) != BARRIER
3547 && GET_CODE (insn
) != BARRIER
3548 && (bb
= BLOCK_FOR_INSN (after
)))
3550 set_block_for_insn (insn
, bb
);
3552 bb
->flags
|= BB_DIRTY
;
3553 /* Should not happen as first in the BB is always
3554 either NOTE or LABEL. */
3555 if (BB_END (bb
) == after
3556 /* Avoid clobbering of structure when creating new BB. */
3557 && GET_CODE (insn
) != BARRIER
3558 && (GET_CODE (insn
) != NOTE
3559 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3563 NEXT_INSN (after
) = insn
;
3564 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
3566 rtx sequence
= PATTERN (after
);
3567 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3571 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3572 the previous should be the only functions called to insert an insn once
3573 delay slots have been filled since only they know how to update a
3577 add_insn_before (rtx insn
, rtx before
)
3579 rtx prev
= PREV_INSN (before
);
3582 if (optimize
&& INSN_DELETED_P (before
))
3585 PREV_INSN (insn
) = prev
;
3586 NEXT_INSN (insn
) = before
;
3590 NEXT_INSN (prev
) = insn
;
3591 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3593 rtx sequence
= PATTERN (prev
);
3594 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3597 else if (first_insn
== before
)
3601 struct sequence_stack
*stack
= seq_stack
;
3602 /* Scan all pending sequences too. */
3603 for (; stack
; stack
= stack
->next
)
3604 if (before
== stack
->first
)
3606 stack
->first
= insn
;
3614 if (GET_CODE (before
) != BARRIER
3615 && GET_CODE (insn
) != BARRIER
3616 && (bb
= BLOCK_FOR_INSN (before
)))
3618 set_block_for_insn (insn
, bb
);
3620 bb
->flags
|= BB_DIRTY
;
3621 /* Should not happen as first in the BB is always
3622 either NOTE or LABEl. */
3623 if (BB_HEAD (bb
) == insn
3624 /* Avoid clobbering of structure when creating new BB. */
3625 && GET_CODE (insn
) != BARRIER
3626 && (GET_CODE (insn
) != NOTE
3627 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3631 PREV_INSN (before
) = insn
;
3632 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
3633 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3636 /* Remove an insn from its doubly-linked list. This function knows how
3637 to handle sequences. */
3639 remove_insn (rtx insn
)
3641 rtx next
= NEXT_INSN (insn
);
3642 rtx prev
= PREV_INSN (insn
);
3647 NEXT_INSN (prev
) = next
;
3648 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3650 rtx sequence
= PATTERN (prev
);
3651 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3654 else if (first_insn
== insn
)
3658 struct sequence_stack
*stack
= seq_stack
;
3659 /* Scan all pending sequences too. */
3660 for (; stack
; stack
= stack
->next
)
3661 if (insn
== stack
->first
)
3663 stack
->first
= next
;
3673 PREV_INSN (next
) = prev
;
3674 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3675 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3677 else if (last_insn
== insn
)
3681 struct sequence_stack
*stack
= seq_stack
;
3682 /* Scan all pending sequences too. */
3683 for (; stack
; stack
= stack
->next
)
3684 if (insn
== stack
->last
)
3693 if (GET_CODE (insn
) != BARRIER
3694 && (bb
= BLOCK_FOR_INSN (insn
)))
3697 bb
->flags
|= BB_DIRTY
;
3698 if (BB_HEAD (bb
) == insn
)
3700 /* Never ever delete the basic block note without deleting whole
3702 if (GET_CODE (insn
) == NOTE
)
3704 BB_HEAD (bb
) = next
;
3706 if (BB_END (bb
) == insn
)
3711 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3714 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
3716 if (! call_insn
|| GET_CODE (call_insn
) != CALL_INSN
)
3719 /* Put the register usage information on the CALL. If there is already
3720 some usage information, put ours at the end. */
3721 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
3725 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
3726 link
= XEXP (link
, 1))
3729 XEXP (link
, 1) = call_fusage
;
3732 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
3735 /* Delete all insns made since FROM.
3736 FROM becomes the new last instruction. */
3739 delete_insns_since (rtx from
)
3744 NEXT_INSN (from
) = 0;
3748 /* This function is deprecated, please use sequences instead.
3750 Move a consecutive bunch of insns to a different place in the chain.
3751 The insns to be moved are those between FROM and TO.
3752 They are moved to a new position after the insn AFTER.
3753 AFTER must not be FROM or TO or any insn in between.
3755 This function does not know about SEQUENCEs and hence should not be
3756 called after delay-slot filling has been done. */
3759 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
3761 /* Splice this bunch out of where it is now. */
3762 if (PREV_INSN (from
))
3763 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3765 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3766 if (last_insn
== to
)
3767 last_insn
= PREV_INSN (from
);
3768 if (first_insn
== from
)
3769 first_insn
= NEXT_INSN (to
);
3771 /* Make the new neighbors point to it and it to them. */
3772 if (NEXT_INSN (after
))
3773 PREV_INSN (NEXT_INSN (after
)) = to
;
3775 NEXT_INSN (to
) = NEXT_INSN (after
);
3776 PREV_INSN (from
) = after
;
3777 NEXT_INSN (after
) = from
;
3778 if (after
== last_insn
)
3782 /* Same as function above, but take care to update BB boundaries. */
3784 reorder_insns (rtx from
, rtx to
, rtx after
)
3786 rtx prev
= PREV_INSN (from
);
3787 basic_block bb
, bb2
;
3789 reorder_insns_nobb (from
, to
, after
);
3791 if (GET_CODE (after
) != BARRIER
3792 && (bb
= BLOCK_FOR_INSN (after
)))
3795 bb
->flags
|= BB_DIRTY
;
3797 if (GET_CODE (from
) != BARRIER
3798 && (bb2
= BLOCK_FOR_INSN (from
)))
3800 if (BB_END (bb2
) == to
)
3801 BB_END (bb2
) = prev
;
3802 bb2
->flags
|= BB_DIRTY
;
3805 if (BB_END (bb
) == after
)
3808 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3809 set_block_for_insn (x
, bb
);
3813 /* Return the line note insn preceding INSN. */
3816 find_line_note (rtx insn
)
3818 if (no_line_numbers
)
3821 for (; insn
; insn
= PREV_INSN (insn
))
3822 if (GET_CODE (insn
) == NOTE
3823 && NOTE_LINE_NUMBER (insn
) >= 0)
3829 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3830 of the moved insns when debugging. This may insert a note between AFTER
3831 and FROM, and another one after TO. */
3834 reorder_insns_with_line_notes (rtx from
, rtx to
, rtx after
)
3836 rtx from_line
= find_line_note (from
);
3837 rtx after_line
= find_line_note (after
);
3839 reorder_insns (from
, to
, after
);
3841 if (from_line
== after_line
)
3845 emit_note_copy_after (from_line
, after
);
3847 emit_note_copy_after (after_line
, to
);
3850 /* Remove unnecessary notes from the instruction stream. */
3853 remove_unnecessary_notes (void)
3855 rtx block_stack
= NULL_RTX
;
3856 rtx eh_stack
= NULL_RTX
;
3861 /* We must not remove the first instruction in the function because
3862 the compiler depends on the first instruction being a note. */
3863 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
3865 /* Remember what's next. */
3866 next
= NEXT_INSN (insn
);
3868 /* We're only interested in notes. */
3869 if (GET_CODE (insn
) != NOTE
)
3872 switch (NOTE_LINE_NUMBER (insn
))
3874 case NOTE_INSN_DELETED
:
3875 case NOTE_INSN_LOOP_END_TOP_COND
:
3879 case NOTE_INSN_EH_REGION_BEG
:
3880 eh_stack
= alloc_INSN_LIST (insn
, eh_stack
);
3883 case NOTE_INSN_EH_REGION_END
:
3884 /* Too many end notes. */
3885 if (eh_stack
== NULL_RTX
)
3887 /* Mismatched nesting. */
3888 if (NOTE_EH_HANDLER (XEXP (eh_stack
, 0)) != NOTE_EH_HANDLER (insn
))
3891 eh_stack
= XEXP (eh_stack
, 1);
3892 free_INSN_LIST_node (tmp
);
3895 case NOTE_INSN_BLOCK_BEG
:
3896 /* By now, all notes indicating lexical blocks should have
3897 NOTE_BLOCK filled in. */
3898 if (NOTE_BLOCK (insn
) == NULL_TREE
)
3900 block_stack
= alloc_INSN_LIST (insn
, block_stack
);
3903 case NOTE_INSN_BLOCK_END
:
3904 /* Too many end notes. */
3905 if (block_stack
== NULL_RTX
)
3907 /* Mismatched nesting. */
3908 if (NOTE_BLOCK (XEXP (block_stack
, 0)) != NOTE_BLOCK (insn
))
3911 block_stack
= XEXP (block_stack
, 1);
3912 free_INSN_LIST_node (tmp
);
3914 /* Scan back to see if there are any non-note instructions
3915 between INSN and the beginning of this block. If not,
3916 then there is no PC range in the generated code that will
3917 actually be in this block, so there's no point in
3918 remembering the existence of the block. */
3919 for (tmp
= PREV_INSN (insn
); tmp
; tmp
= PREV_INSN (tmp
))
3921 /* This block contains a real instruction. Note that we
3922 don't include labels; if the only thing in the block
3923 is a label, then there are still no PC values that
3924 lie within the block. */
3928 /* We're only interested in NOTEs. */
3929 if (GET_CODE (tmp
) != NOTE
)
3932 if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_BEG
)
3934 /* We just verified that this BLOCK matches us with
3935 the block_stack check above. Never delete the
3936 BLOCK for the outermost scope of the function; we
3937 can refer to names from that scope even if the
3938 block notes are messed up. */
3939 if (! is_body_block (NOTE_BLOCK (insn
))
3940 && (*debug_hooks
->ignore_block
) (NOTE_BLOCK (insn
)))
3947 else if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_END
)
3948 /* There's a nested block. We need to leave the
3949 current block in place since otherwise the debugger
3950 wouldn't be able to show symbols from our block in
3951 the nested block. */
3957 /* Too many begin notes. */
3958 if (block_stack
|| eh_stack
)
3963 /* Emit insn(s) of given code and pattern
3964 at a specified place within the doubly-linked list.
3966 All of the emit_foo global entry points accept an object
3967 X which is either an insn list or a PATTERN of a single
3970 There are thus a few canonical ways to generate code and
3971 emit it at a specific place in the instruction stream. For
3972 example, consider the instruction named SPOT and the fact that
3973 we would like to emit some instructions before SPOT. We might
3977 ... emit the new instructions ...
3978 insns_head = get_insns ();
3981 emit_insn_before (insns_head, SPOT);
3983 It used to be common to generate SEQUENCE rtl instead, but that
3984 is a relic of the past which no longer occurs. The reason is that
3985 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3986 generated would almost certainly die right after it was created. */
3988 /* Make X be output before the instruction BEFORE. */
3991 emit_insn_before (rtx x
, rtx before
)
3996 #ifdef ENABLE_RTL_CHECKING
3997 if (before
== NULL_RTX
)
4004 switch (GET_CODE (x
))
4015 rtx next
= NEXT_INSN (insn
);
4016 add_insn_before (insn
, before
);
4022 #ifdef ENABLE_RTL_CHECKING
4029 last
= make_insn_raw (x
);
4030 add_insn_before (last
, before
);
4037 /* Make an instruction with body X and code JUMP_INSN
4038 and output it before the instruction BEFORE. */
4041 emit_jump_insn_before (rtx x
, rtx before
)
4043 rtx insn
, last
= NULL_RTX
;
4045 #ifdef ENABLE_RTL_CHECKING
4046 if (before
== NULL_RTX
)
4050 switch (GET_CODE (x
))
4061 rtx next
= NEXT_INSN (insn
);
4062 add_insn_before (insn
, before
);
4068 #ifdef ENABLE_RTL_CHECKING
4075 last
= make_jump_insn_raw (x
);
4076 add_insn_before (last
, before
);
4083 /* Make an instruction with body X and code CALL_INSN
4084 and output it before the instruction BEFORE. */
4087 emit_call_insn_before (rtx x
, rtx before
)
4089 rtx last
= NULL_RTX
, insn
;
4091 #ifdef ENABLE_RTL_CHECKING
4092 if (before
== NULL_RTX
)
4096 switch (GET_CODE (x
))
4107 rtx next
= NEXT_INSN (insn
);
4108 add_insn_before (insn
, before
);
4114 #ifdef ENABLE_RTL_CHECKING
4121 last
= make_call_insn_raw (x
);
4122 add_insn_before (last
, before
);
4129 /* Make an insn of code BARRIER
4130 and output it before the insn BEFORE. */
4133 emit_barrier_before (rtx before
)
4135 rtx insn
= rtx_alloc (BARRIER
);
4137 INSN_UID (insn
) = cur_insn_uid
++;
4139 add_insn_before (insn
, before
);
4143 /* Emit the label LABEL before the insn BEFORE. */
4146 emit_label_before (rtx label
, rtx before
)
4148 /* This can be called twice for the same label as a result of the
4149 confusion that follows a syntax error! So make it harmless. */
4150 if (INSN_UID (label
) == 0)
4152 INSN_UID (label
) = cur_insn_uid
++;
4153 add_insn_before (label
, before
);
4159 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4162 emit_note_before (int subtype
, rtx before
)
4164 rtx note
= rtx_alloc (NOTE
);
4165 INSN_UID (note
) = cur_insn_uid
++;
4166 NOTE_SOURCE_FILE (note
) = 0;
4167 NOTE_LINE_NUMBER (note
) = subtype
;
4168 BLOCK_FOR_INSN (note
) = NULL
;
4170 add_insn_before (note
, before
);
4174 /* Helper for emit_insn_after, handles lists of instructions
4177 static rtx
emit_insn_after_1 (rtx
, rtx
);
4180 emit_insn_after_1 (rtx first
, rtx after
)
4186 if (GET_CODE (after
) != BARRIER
4187 && (bb
= BLOCK_FOR_INSN (after
)))
4189 bb
->flags
|= BB_DIRTY
;
4190 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4191 if (GET_CODE (last
) != BARRIER
)
4192 set_block_for_insn (last
, bb
);
4193 if (GET_CODE (last
) != BARRIER
)
4194 set_block_for_insn (last
, bb
);
4195 if (BB_END (bb
) == after
)
4199 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4202 after_after
= NEXT_INSN (after
);
4204 NEXT_INSN (after
) = first
;
4205 PREV_INSN (first
) = after
;
4206 NEXT_INSN (last
) = after_after
;
4208 PREV_INSN (after_after
) = last
;
4210 if (after
== last_insn
)
4215 /* Make X be output after the insn AFTER. */
4218 emit_insn_after (rtx x
, rtx after
)
4222 #ifdef ENABLE_RTL_CHECKING
4223 if (after
== NULL_RTX
)
4230 switch (GET_CODE (x
))
4238 last
= emit_insn_after_1 (x
, after
);
4241 #ifdef ENABLE_RTL_CHECKING
4248 last
= make_insn_raw (x
);
4249 add_insn_after (last
, after
);
4256 /* Similar to emit_insn_after, except that line notes are to be inserted so
4257 as to act as if this insn were at FROM. */
4260 emit_insn_after_with_line_notes (rtx x
, rtx after
, rtx from
)
4262 rtx from_line
= find_line_note (from
);
4263 rtx after_line
= find_line_note (after
);
4264 rtx insn
= emit_insn_after (x
, after
);
4267 emit_note_copy_after (from_line
, after
);
4270 emit_note_copy_after (after_line
, insn
);
4273 /* Make an insn of code JUMP_INSN with body X
4274 and output it after the insn AFTER. */
4277 emit_jump_insn_after (rtx x
, rtx after
)
4281 #ifdef ENABLE_RTL_CHECKING
4282 if (after
== NULL_RTX
)
4286 switch (GET_CODE (x
))
4294 last
= emit_insn_after_1 (x
, after
);
4297 #ifdef ENABLE_RTL_CHECKING
4304 last
= make_jump_insn_raw (x
);
4305 add_insn_after (last
, after
);
4312 /* Make an instruction with body X and code CALL_INSN
4313 and output it after the instruction AFTER. */
4316 emit_call_insn_after (rtx x
, rtx after
)
4320 #ifdef ENABLE_RTL_CHECKING
4321 if (after
== NULL_RTX
)
4325 switch (GET_CODE (x
))
4333 last
= emit_insn_after_1 (x
, after
);
4336 #ifdef ENABLE_RTL_CHECKING
4343 last
= make_call_insn_raw (x
);
4344 add_insn_after (last
, after
);
4351 /* Make an insn of code BARRIER
4352 and output it after the insn AFTER. */
4355 emit_barrier_after (rtx after
)
4357 rtx insn
= rtx_alloc (BARRIER
);
4359 INSN_UID (insn
) = cur_insn_uid
++;
4361 add_insn_after (insn
, after
);
4365 /* Emit the label LABEL after the insn AFTER. */
4368 emit_label_after (rtx label
, rtx after
)
4370 /* This can be called twice for the same label
4371 as a result of the confusion that follows a syntax error!
4372 So make it harmless. */
4373 if (INSN_UID (label
) == 0)
4375 INSN_UID (label
) = cur_insn_uid
++;
4376 add_insn_after (label
, after
);
4382 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4385 emit_note_after (int subtype
, rtx after
)
4387 rtx note
= rtx_alloc (NOTE
);
4388 INSN_UID (note
) = cur_insn_uid
++;
4389 NOTE_SOURCE_FILE (note
) = 0;
4390 NOTE_LINE_NUMBER (note
) = subtype
;
4391 BLOCK_FOR_INSN (note
) = NULL
;
4392 add_insn_after (note
, after
);
4396 /* Emit a copy of note ORIG after the insn AFTER. */
4399 emit_note_copy_after (rtx orig
, rtx after
)
4403 if (NOTE_LINE_NUMBER (orig
) >= 0 && no_line_numbers
)
4409 note
= rtx_alloc (NOTE
);
4410 INSN_UID (note
) = cur_insn_uid
++;
4411 NOTE_LINE_NUMBER (note
) = NOTE_LINE_NUMBER (orig
);
4412 NOTE_DATA (note
) = NOTE_DATA (orig
);
4413 BLOCK_FOR_INSN (note
) = NULL
;
4414 add_insn_after (note
, after
);
4418 /* Like emit_insn_after, but set INSN_LOCATOR according to SCOPE. */
4420 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4422 rtx last
= emit_insn_after (pattern
, after
);
4424 if (pattern
== NULL_RTX
)
4427 after
= NEXT_INSN (after
);
4430 if (active_insn_p (after
))
4431 INSN_LOCATOR (after
) = loc
;
4434 after
= NEXT_INSN (after
);
4439 /* Like emit_jump_insn_after, but set INSN_LOCATOR according to SCOPE. */
4441 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4443 rtx last
= emit_jump_insn_after (pattern
, after
);
4445 if (pattern
== NULL_RTX
)
4448 after
= NEXT_INSN (after
);
4451 if (active_insn_p (after
))
4452 INSN_LOCATOR (after
) = loc
;
4455 after
= NEXT_INSN (after
);
4460 /* Like emit_call_insn_after, but set INSN_LOCATOR according to SCOPE. */
4462 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4464 rtx last
= emit_call_insn_after (pattern
, after
);
4466 if (pattern
== NULL_RTX
)
4469 after
= NEXT_INSN (after
);
4472 if (active_insn_p (after
))
4473 INSN_LOCATOR (after
) = loc
;
4476 after
= NEXT_INSN (after
);
4481 /* Like emit_insn_before, but set INSN_LOCATOR according to SCOPE. */
4483 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4485 rtx first
= PREV_INSN (before
);
4486 rtx last
= emit_insn_before (pattern
, before
);
4488 if (pattern
== NULL_RTX
)
4491 first
= NEXT_INSN (first
);
4494 if (active_insn_p (first
))
4495 INSN_LOCATOR (first
) = loc
;
4498 first
= NEXT_INSN (first
);
4503 /* Take X and emit it at the end of the doubly-linked
4506 Returns the last insn emitted. */
4511 rtx last
= last_insn
;
4517 switch (GET_CODE (x
))
4528 rtx next
= NEXT_INSN (insn
);
4535 #ifdef ENABLE_RTL_CHECKING
4542 last
= make_insn_raw (x
);
4550 /* Make an insn of code JUMP_INSN with pattern X
4551 and add it to the end of the doubly-linked list. */
4554 emit_jump_insn (rtx x
)
4556 rtx last
= NULL_RTX
, insn
;
4558 switch (GET_CODE (x
))
4569 rtx next
= NEXT_INSN (insn
);
4576 #ifdef ENABLE_RTL_CHECKING
4583 last
= make_jump_insn_raw (x
);
4591 /* Make an insn of code CALL_INSN with pattern X
4592 and add it to the end of the doubly-linked list. */
4595 emit_call_insn (rtx x
)
4599 switch (GET_CODE (x
))
4607 insn
= emit_insn (x
);
4610 #ifdef ENABLE_RTL_CHECKING
4617 insn
= make_call_insn_raw (x
);
4625 /* Add the label LABEL to the end of the doubly-linked list. */
4628 emit_label (rtx label
)
4630 /* This can be called twice for the same label
4631 as a result of the confusion that follows a syntax error!
4632 So make it harmless. */
4633 if (INSN_UID (label
) == 0)
4635 INSN_UID (label
) = cur_insn_uid
++;
4641 /* Make an insn of code BARRIER
4642 and add it to the end of the doubly-linked list. */
4647 rtx barrier
= rtx_alloc (BARRIER
);
4648 INSN_UID (barrier
) = cur_insn_uid
++;
4653 /* Make line numbering NOTE insn for LOCATION add it to the end
4654 of the doubly-linked list, but only if line-numbers are desired for
4655 debugging info and it doesn't match the previous one. */
4658 emit_line_note (location_t location
)
4662 set_file_and_line_for_stmt (location
);
4664 if (location
.file
&& last_location
.file
4665 && !strcmp (location
.file
, last_location
.file
)
4666 && location
.line
== last_location
.line
)
4668 last_location
= location
;
4670 if (no_line_numbers
)
4676 note
= emit_note (location
.line
);
4677 NOTE_SOURCE_FILE (note
) = location
.file
;
4682 /* Emit a copy of note ORIG. */
4685 emit_note_copy (rtx orig
)
4689 if (NOTE_LINE_NUMBER (orig
) >= 0 && no_line_numbers
)
4695 note
= rtx_alloc (NOTE
);
4697 INSN_UID (note
) = cur_insn_uid
++;
4698 NOTE_DATA (note
) = NOTE_DATA (orig
);
4699 NOTE_LINE_NUMBER (note
) = NOTE_LINE_NUMBER (orig
);
4700 BLOCK_FOR_INSN (note
) = NULL
;
4706 /* Make an insn of code NOTE or type NOTE_NO
4707 and add it to the end of the doubly-linked list. */
4710 emit_note (int note_no
)
4714 note
= rtx_alloc (NOTE
);
4715 INSN_UID (note
) = cur_insn_uid
++;
4716 NOTE_LINE_NUMBER (note
) = note_no
;
4717 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4718 BLOCK_FOR_INSN (note
) = NULL
;
4723 /* Cause next statement to emit a line note even if the line number
4727 force_next_line_note (void)
4729 last_location
.line
= -1;
4732 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4733 note of this type already exists, remove it first. */
4736 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
4738 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4744 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4745 has multiple sets (some callers assume single_set
4746 means the insn only has one set, when in fact it
4747 means the insn only has one * useful * set). */
4748 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4755 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4756 It serves no useful purpose and breaks eliminate_regs. */
4757 if (GET_CODE (datum
) == ASM_OPERANDS
)
4767 XEXP (note
, 0) = datum
;
4771 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
4772 return REG_NOTES (insn
);
4775 /* Return an indication of which type of insn should have X as a body.
4776 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4779 classify_insn (rtx x
)
4781 if (GET_CODE (x
) == CODE_LABEL
)
4783 if (GET_CODE (x
) == CALL
)
4785 if (GET_CODE (x
) == RETURN
)
4787 if (GET_CODE (x
) == SET
)
4789 if (SET_DEST (x
) == pc_rtx
)
4791 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4796 if (GET_CODE (x
) == PARALLEL
)
4799 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
4800 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
4802 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4803 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
4805 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4806 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
4812 /* Emit the rtl pattern X as an appropriate kind of insn.
4813 If X is a label, it is simply added into the insn chain. */
4818 enum rtx_code code
= classify_insn (x
);
4820 if (code
== CODE_LABEL
)
4821 return emit_label (x
);
4822 else if (code
== INSN
)
4823 return emit_insn (x
);
4824 else if (code
== JUMP_INSN
)
4826 rtx insn
= emit_jump_insn (x
);
4827 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4828 return emit_barrier ();
4831 else if (code
== CALL_INSN
)
4832 return emit_call_insn (x
);
4837 /* Space for free sequence stack entries. */
4838 static GTY ((deletable (""))) struct sequence_stack
*free_sequence_stack
;
4840 /* Begin emitting insns to a sequence which can be packaged in an
4841 RTL_EXPR. If this sequence will contain something that might cause
4842 the compiler to pop arguments to function calls (because those
4843 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4844 details), use do_pending_stack_adjust before calling this function.
4845 That will ensure that the deferred pops are not accidentally
4846 emitted in the middle of this sequence. */
4849 start_sequence (void)
4851 struct sequence_stack
*tem
;
4853 if (free_sequence_stack
!= NULL
)
4855 tem
= free_sequence_stack
;
4856 free_sequence_stack
= tem
->next
;
4859 tem
= ggc_alloc (sizeof (struct sequence_stack
));
4861 tem
->next
= seq_stack
;
4862 tem
->first
= first_insn
;
4863 tem
->last
= last_insn
;
4864 tem
->sequence_rtl_expr
= seq_rtl_expr
;
4872 /* Similarly, but indicate that this sequence will be placed in T, an
4873 RTL_EXPR. See the documentation for start_sequence for more
4874 information about how to use this function. */
4877 start_sequence_for_rtl_expr (tree t
)
4884 /* Set up the insn chain starting with FIRST as the current sequence,
4885 saving the previously current one. See the documentation for
4886 start_sequence for more information about how to use this function. */
4889 push_to_sequence (rtx first
)
4895 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
4901 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4904 push_to_full_sequence (rtx first
, rtx last
)
4909 /* We really should have the end of the insn chain here. */
4910 if (last
&& NEXT_INSN (last
))
4914 /* Set up the outer-level insn chain
4915 as the current sequence, saving the previously current one. */
4918 push_topmost_sequence (void)
4920 struct sequence_stack
*stack
, *top
= NULL
;
4924 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4927 first_insn
= top
->first
;
4928 last_insn
= top
->last
;
4929 seq_rtl_expr
= top
->sequence_rtl_expr
;
4932 /* After emitting to the outer-level insn chain, update the outer-level
4933 insn chain, and restore the previous saved state. */
4936 pop_topmost_sequence (void)
4938 struct sequence_stack
*stack
, *top
= NULL
;
4940 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4943 top
->first
= first_insn
;
4944 top
->last
= last_insn
;
4945 /* ??? Why don't we save seq_rtl_expr here? */
4950 /* After emitting to a sequence, restore previous saved state.
4952 To get the contents of the sequence just made, you must call
4953 `get_insns' *before* calling here.
4955 If the compiler might have deferred popping arguments while
4956 generating this sequence, and this sequence will not be immediately
4957 inserted into the instruction stream, use do_pending_stack_adjust
4958 before calling get_insns. That will ensure that the deferred
4959 pops are inserted into this sequence, and not into some random
4960 location in the instruction stream. See INHIBIT_DEFER_POP for more
4961 information about deferred popping of arguments. */
4966 struct sequence_stack
*tem
= seq_stack
;
4968 first_insn
= tem
->first
;
4969 last_insn
= tem
->last
;
4970 seq_rtl_expr
= tem
->sequence_rtl_expr
;
4971 seq_stack
= tem
->next
;
4973 memset (tem
, 0, sizeof (*tem
));
4974 tem
->next
= free_sequence_stack
;
4975 free_sequence_stack
= tem
;
4978 /* This works like end_sequence, but records the old sequence in FIRST
4982 end_full_sequence (rtx
*first
, rtx
*last
)
4984 *first
= first_insn
;
4989 /* Return 1 if currently emitting into a sequence. */
4992 in_sequence_p (void)
4994 return seq_stack
!= 0;
4997 /* Put the various virtual registers into REGNO_REG_RTX. */
5000 init_virtual_regs (struct emit_status
*es
)
5002 rtx
*ptr
= es
->x_regno_reg_rtx
;
5003 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5004 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5005 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5006 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5007 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5011 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5012 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5013 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5014 static int copy_insn_n_scratches
;
5016 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5017 copied an ASM_OPERANDS.
5018 In that case, it is the original input-operand vector. */
5019 static rtvec orig_asm_operands_vector
;
5021 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5022 copied an ASM_OPERANDS.
5023 In that case, it is the copied input-operand vector. */
5024 static rtvec copy_asm_operands_vector
;
5026 /* Likewise for the constraints vector. */
5027 static rtvec orig_asm_constraints_vector
;
5028 static rtvec copy_asm_constraints_vector
;
5030 /* Recursively create a new copy of an rtx for copy_insn.
5031 This function differs from copy_rtx in that it handles SCRATCHes and
5032 ASM_OPERANDs properly.
5033 Normally, this function is not used directly; use copy_insn as front end.
5034 However, you could first copy an insn pattern with copy_insn and then use
5035 this function afterwards to properly copy any REG_NOTEs containing
5039 copy_insn_1 (rtx orig
)
5044 const char *format_ptr
;
5046 code
= GET_CODE (orig
);
5062 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
)
5067 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5068 if (copy_insn_scratch_in
[i
] == orig
)
5069 return copy_insn_scratch_out
[i
];
5073 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5074 a LABEL_REF, it isn't sharable. */
5075 if (GET_CODE (XEXP (orig
, 0)) == PLUS
5076 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
5077 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
5081 /* A MEM with a constant address is not sharable. The problem is that
5082 the constant address may need to be reloaded. If the mem is shared,
5083 then reloading one copy of this mem will cause all copies to appear
5084 to have been reloaded. */
5090 copy
= rtx_alloc (code
);
5092 /* Copy the various flags, and other information. We assume that
5093 all fields need copying, and then clear the fields that should
5094 not be copied. That is the sensible default behavior, and forces
5095 us to explicitly document why we are *not* copying a flag. */
5096 memcpy (copy
, orig
, RTX_HDR_SIZE
);
5098 /* We do not copy the USED flag, which is used as a mark bit during
5099 walks over the RTL. */
5100 RTX_FLAG (copy
, used
) = 0;
5102 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5103 if (GET_RTX_CLASS (code
) == 'i')
5105 RTX_FLAG (copy
, jump
) = 0;
5106 RTX_FLAG (copy
, call
) = 0;
5107 RTX_FLAG (copy
, frame_related
) = 0;
5110 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5112 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5114 copy
->u
.fld
[i
] = orig
->u
.fld
[i
];
5115 switch (*format_ptr
++)
5118 if (XEXP (orig
, i
) != NULL
)
5119 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5124 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5125 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5126 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5127 XVEC (copy
, i
) = copy_asm_operands_vector
;
5128 else if (XVEC (orig
, i
) != NULL
)
5130 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5131 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5132 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5143 /* These are left unchanged. */
5151 if (code
== SCRATCH
)
5153 i
= copy_insn_n_scratches
++;
5154 if (i
>= MAX_RECOG_OPERANDS
)
5156 copy_insn_scratch_in
[i
] = orig
;
5157 copy_insn_scratch_out
[i
] = copy
;
5159 else if (code
== ASM_OPERANDS
)
5161 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5162 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5163 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5164 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5170 /* Create a new copy of an rtx.
5171 This function differs from copy_rtx in that it handles SCRATCHes and
5172 ASM_OPERANDs properly.
5173 INSN doesn't really have to be a full INSN; it could be just the
5176 copy_insn (rtx insn
)
5178 copy_insn_n_scratches
= 0;
5179 orig_asm_operands_vector
= 0;
5180 orig_asm_constraints_vector
= 0;
5181 copy_asm_operands_vector
= 0;
5182 copy_asm_constraints_vector
= 0;
5183 return copy_insn_1 (insn
);
5186 /* Initialize data structures and variables in this file
5187 before generating rtl for each function. */
5192 struct function
*f
= cfun
;
5194 f
->emit
= ggc_alloc (sizeof (struct emit_status
));
5197 seq_rtl_expr
= NULL
;
5199 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5200 last_location
.line
= 0;
5201 last_location
.file
= 0;
5202 first_label_num
= label_num
;
5206 /* Init the tables that describe all the pseudo regs. */
5208 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5210 f
->emit
->regno_pointer_align
5211 = ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5212 * sizeof (unsigned char));
5215 = ggc_alloc (f
->emit
->regno_pointer_align_length
* sizeof (rtx
));
5217 /* Put copies of all the hard registers into regno_reg_rtx. */
5218 memcpy (regno_reg_rtx
,
5219 static_regno_reg_rtx
,
5220 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5222 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5223 init_virtual_regs (f
->emit
);
5225 /* Indicate that the virtual registers and stack locations are
5227 REG_POINTER (stack_pointer_rtx
) = 1;
5228 REG_POINTER (frame_pointer_rtx
) = 1;
5229 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5230 REG_POINTER (arg_pointer_rtx
) = 1;
5232 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5233 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5234 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5235 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5236 REG_POINTER (virtual_cfa_rtx
) = 1;
5238 #ifdef STACK_BOUNDARY
5239 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5240 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5241 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5242 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5244 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5245 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5246 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5247 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5248 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5251 #ifdef INIT_EXPANDERS
5256 /* Generate the constant 0. */
5259 gen_const_vector_0 (enum machine_mode mode
)
5264 enum machine_mode inner
;
5266 units
= GET_MODE_NUNITS (mode
);
5267 inner
= GET_MODE_INNER (mode
);
5269 v
= rtvec_alloc (units
);
5271 /* We need to call this function after we to set CONST0_RTX first. */
5272 if (!CONST0_RTX (inner
))
5275 for (i
= 0; i
< units
; ++i
)
5276 RTVEC_ELT (v
, i
) = CONST0_RTX (inner
);
5278 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5282 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5283 all elements are zero. */
5285 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5287 rtx inner_zero
= CONST0_RTX (GET_MODE_INNER (mode
));
5290 for (i
= GET_MODE_NUNITS (mode
) - 1; i
>= 0; i
--)
5291 if (RTVEC_ELT (v
, i
) != inner_zero
)
5292 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5293 return CONST0_RTX (mode
);
5296 /* Create some permanent unique rtl objects shared between all functions.
5297 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5300 init_emit_once (int line_numbers
)
5303 enum machine_mode mode
;
5304 enum machine_mode double_mode
;
5306 /* We need reg_raw_mode, so initialize the modes now. */
5307 init_reg_modes_once ();
5309 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5311 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5312 const_int_htab_eq
, NULL
);
5314 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5315 const_double_htab_eq
, NULL
);
5317 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5318 mem_attrs_htab_eq
, NULL
);
5319 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5320 reg_attrs_htab_eq
, NULL
);
5322 no_line_numbers
= ! line_numbers
;
5324 /* Compute the word and byte modes. */
5326 byte_mode
= VOIDmode
;
5327 word_mode
= VOIDmode
;
5328 double_mode
= VOIDmode
;
5330 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5331 mode
= GET_MODE_WIDER_MODE (mode
))
5333 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5334 && byte_mode
== VOIDmode
)
5337 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5338 && word_mode
== VOIDmode
)
5342 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5343 mode
= GET_MODE_WIDER_MODE (mode
))
5345 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5346 && double_mode
== VOIDmode
)
5350 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5352 /* Assign register numbers to the globally defined register rtx.
5353 This must be done at runtime because the register number field
5354 is in a union and some compilers can't initialize unions. */
5356 pc_rtx
= gen_rtx (PC
, VOIDmode
);
5357 cc0_rtx
= gen_rtx (CC0
, VOIDmode
);
5358 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5359 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5360 if (hard_frame_pointer_rtx
== 0)
5361 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
5362 HARD_FRAME_POINTER_REGNUM
);
5363 if (arg_pointer_rtx
== 0)
5364 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5365 virtual_incoming_args_rtx
=
5366 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5367 virtual_stack_vars_rtx
=
5368 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5369 virtual_stack_dynamic_rtx
=
5370 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5371 virtual_outgoing_args_rtx
=
5372 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5373 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5375 /* Initialize RTL for commonly used hard registers. These are
5376 copied into regno_reg_rtx as we begin to compile each function. */
5377 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5378 static_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5380 #ifdef INIT_EXPANDERS
5381 /* This is to initialize {init|mark|free}_machine_status before the first
5382 call to push_function_context_to. This is needed by the Chill front
5383 end which calls push_function_context_to before the first call to
5384 init_function_start. */
5388 /* Create the unique rtx's for certain rtx codes and operand values. */
5390 /* Don't use gen_rtx here since gen_rtx in this case
5391 tries to use these variables. */
5392 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5393 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5394 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5396 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5397 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5398 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5400 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5402 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5403 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5404 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5405 REAL_VALUE_FROM_INT (dconst3
, 3, 0, double_mode
);
5406 REAL_VALUE_FROM_INT (dconst10
, 10, 0, double_mode
);
5407 REAL_VALUE_FROM_INT (dconstm1
, -1, -1, double_mode
);
5408 REAL_VALUE_FROM_INT (dconstm2
, -2, -1, double_mode
);
5410 dconsthalf
= dconst1
;
5413 real_arithmetic (&dconstthird
, RDIV_EXPR
, &dconst1
, &dconst3
);
5415 /* Initialize mathematical constants for constant folding builtins.
5416 These constants need to be given to at least 160 bits precision. */
5417 real_from_string (&dconstpi
,
5418 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5419 real_from_string (&dconste
,
5420 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5422 for (i
= 0; i
< (int) ARRAY_SIZE (const_tiny_rtx
); i
++)
5424 REAL_VALUE_TYPE
*r
=
5425 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5427 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5428 mode
= GET_MODE_WIDER_MODE (mode
))
5429 const_tiny_rtx
[i
][(int) mode
] =
5430 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5432 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5434 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5435 mode
= GET_MODE_WIDER_MODE (mode
))
5436 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5438 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5440 mode
= GET_MODE_WIDER_MODE (mode
))
5441 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5444 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5446 mode
= GET_MODE_WIDER_MODE (mode
))
5447 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5449 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5451 mode
= GET_MODE_WIDER_MODE (mode
))
5452 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5454 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5455 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5456 const_tiny_rtx
[0][i
] = const0_rtx
;
5458 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5459 if (STORE_FLAG_VALUE
== 1)
5460 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5462 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5463 return_address_pointer_rtx
5464 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5467 #ifdef STATIC_CHAIN_REGNUM
5468 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
5470 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5471 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
5472 static_chain_incoming_rtx
5473 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
5476 static_chain_incoming_rtx
= static_chain_rtx
;
5480 static_chain_rtx
= STATIC_CHAIN
;
5482 #ifdef STATIC_CHAIN_INCOMING
5483 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
5485 static_chain_incoming_rtx
= static_chain_rtx
;
5489 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5490 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5493 /* Query and clear/ restore no_line_numbers. This is used by the
5494 switch / case handling in stmt.c to give proper line numbers in
5495 warnings about unreachable code. */
5498 force_line_numbers (void)
5500 int old
= no_line_numbers
;
5502 no_line_numbers
= 0;
5504 force_next_line_note ();
5509 restore_line_number_status (int old_value
)
5511 no_line_numbers
= old_value
;
5514 /* Produce exact duplicate of insn INSN after AFTER.
5515 Care updating of libcall regions if present. */
5518 emit_copy_of_insn_after (rtx insn
, rtx after
)
5521 rtx note1
, note2
, link
;
5523 switch (GET_CODE (insn
))
5526 new = emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5530 new = emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5534 new = emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5535 if (CALL_INSN_FUNCTION_USAGE (insn
))
5536 CALL_INSN_FUNCTION_USAGE (new)
5537 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5538 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn
);
5539 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn
);
5546 /* Update LABEL_NUSES. */
5547 mark_jump_label (PATTERN (new), new, 0);
5549 INSN_LOCATOR (new) = INSN_LOCATOR (insn
);
5551 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5553 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5554 if (REG_NOTE_KIND (link
) != REG_LABEL
)
5556 if (GET_CODE (link
) == EXPR_LIST
)
5558 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link
),
5563 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link
),
5568 /* Fix the libcall sequences. */
5569 if ((note1
= find_reg_note (new, REG_RETVAL
, NULL_RTX
)) != NULL
)
5572 while ((note2
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)) == NULL
)
5574 XEXP (note1
, 0) = p
;
5575 XEXP (note2
, 0) = new;
5577 INSN_CODE (new) = INSN_CODE (insn
);
5581 static GTY((deletable(""))) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
5583 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
5585 if (hard_reg_clobbers
[mode
][regno
])
5586 return hard_reg_clobbers
[mode
][regno
];
5588 return (hard_reg_clobbers
[mode
][regno
] =
5589 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
5592 #include "gt-emit-rtl.h"