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1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
4 2010, 2011
5 Free Software Foundation, Inc.
6
7 This file is part of GCC.
8
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 3, or (at your option) any later
12 version.
13
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
22
23 /* This is the final pass of the compiler.
24 It looks at the rtl code for a function and outputs assembler code.
25
26 Call `final_start_function' to output the assembler code for function entry,
27 `final' to output assembler code for some RTL code,
28 `final_end_function' to output assembler code for function exit.
29 If a function is compiled in several pieces, each piece is
30 output separately with `final'.
31
32 Some optimizations are also done at this level.
33 Move instructions that were made unnecessary by good register allocation
34 are detected and omitted from the output. (Though most of these
35 are removed by the last jump pass.)
36
37 Instructions to set the condition codes are omitted when it can be
38 seen that the condition codes already had the desired values.
39
40 In some cases it is sufficient if the inherited condition codes
41 have related values, but this may require the following insn
42 (the one that tests the condition codes) to be modified.
43
44 The code for the function prologue and epilogue are generated
45 directly in assembler by the target functions function_prologue and
46 function_epilogue. Those instructions never exist as rtl. */
47
48 #include "config.h"
49 #include "system.h"
50 #include "coretypes.h"
51 #include "tm.h"
52
53 #include "tree.h"
54 #include "rtl.h"
55 #include "tm_p.h"
56 #include "regs.h"
57 #include "insn-config.h"
58 #include "insn-attr.h"
59 #include "recog.h"
60 #include "conditions.h"
61 #include "flags.h"
62 #include "hard-reg-set.h"
63 #include "output.h"
64 #include "except.h"
65 #include "function.h"
66 #include "rtl-error.h"
67 #include "toplev.h" /* exact_log2, floor_log2 */
68 #include "reload.h"
69 #include "intl.h"
70 #include "basic-block.h"
71 #include "target.h"
72 #include "targhooks.h"
73 #include "debug.h"
74 #include "expr.h"
75 #include "tree-pass.h"
76 #include "tree-flow.h"
77 #include "timevar.h"
78 #include "cgraph.h"
79 #include "coverage.h"
80 #include "df.h"
81 #include "vecprim.h"
82 #include "ggc.h"
83 #include "cfgloop.h"
84 #include "params.h"
85 #include "tree-pretty-print.h" /* for dump_function_header */
86
87 #ifdef XCOFF_DEBUGGING_INFO
88 #include "xcoffout.h" /* Needed for external data
89 declarations for e.g. AIX 4.x. */
90 #endif
91
92 #include "dwarf2out.h"
93
94 #ifdef DBX_DEBUGGING_INFO
95 #include "dbxout.h"
96 #endif
97
98 #ifdef SDB_DEBUGGING_INFO
99 #include "sdbout.h"
100 #endif
101
102 /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT.
103 So define a null default for it to save conditionalization later. */
104 #ifndef CC_STATUS_INIT
105 #define CC_STATUS_INIT
106 #endif
107
108 /* Is the given character a logical line separator for the assembler? */
109 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
110 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
111 #endif
112
113 #ifndef JUMP_TABLES_IN_TEXT_SECTION
114 #define JUMP_TABLES_IN_TEXT_SECTION 0
115 #endif
116
117 /* Bitflags used by final_scan_insn. */
118 #define SEEN_BB 1
119 #define SEEN_NOTE 2
120 #define SEEN_EMITTED 4
121
122 /* Last insn processed by final_scan_insn. */
123 static rtx debug_insn;
124 rtx current_output_insn;
125
126 /* Line number of last NOTE. */
127 static int last_linenum;
128
129 /* Last discriminator written to assembly. */
130 static int last_discriminator;
131
132 /* Discriminator of current block. */
133 static int discriminator;
134
135 /* Highest line number in current block. */
136 static int high_block_linenum;
137
138 /* Likewise for function. */
139 static int high_function_linenum;
140
141 /* Filename of last NOTE. */
142 static const char *last_filename;
143
144 /* Override filename and line number. */
145 static const char *override_filename;
146 static int override_linenum;
147
148 /* Whether to force emission of a line note before the next insn. */
149 static bool force_source_line = false;
150
151 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
152
153 /* Nonzero while outputting an `asm' with operands.
154 This means that inconsistencies are the user's fault, so don't die.
155 The precise value is the insn being output, to pass to error_for_asm. */
156 rtx this_is_asm_operands;
157
158 /* Number of operands of this insn, for an `asm' with operands. */
159 static unsigned int insn_noperands;
160
161 /* Compare optimization flag. */
162
163 static rtx last_ignored_compare = 0;
164
165 /* Assign a unique number to each insn that is output.
166 This can be used to generate unique local labels. */
167
168 static int insn_counter = 0;
169
170 #ifdef HAVE_cc0
171 /* This variable contains machine-dependent flags (defined in tm.h)
172 set and examined by output routines
173 that describe how to interpret the condition codes properly. */
174
175 CC_STATUS cc_status;
176
177 /* During output of an insn, this contains a copy of cc_status
178 from before the insn. */
179
180 CC_STATUS cc_prev_status;
181 #endif
182
183 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
184
185 static int block_depth;
186
187 /* Nonzero if have enabled APP processing of our assembler output. */
188
189 static int app_on;
190
191 /* If we are outputting an insn sequence, this contains the sequence rtx.
192 Zero otherwise. */
193
194 rtx final_sequence;
195
196 #ifdef ASSEMBLER_DIALECT
197
198 /* Number of the assembler dialect to use, starting at 0. */
199 static int dialect_number;
200 #endif
201
202 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
203 rtx current_insn_predicate;
204
205 /* True if printing into -fdump-final-insns= dump. */
206 bool final_insns_dump_p;
207
208 #ifdef HAVE_ATTR_length
209 static int asm_insn_count (rtx);
210 #endif
211 static void profile_function (FILE *);
212 static void profile_after_prologue (FILE *);
213 static bool notice_source_line (rtx, bool *);
214 static rtx walk_alter_subreg (rtx *, bool *);
215 static void output_asm_name (void);
216 static void output_alternate_entry_point (FILE *, rtx);
217 static tree get_mem_expr_from_op (rtx, int *);
218 static void output_asm_operand_names (rtx *, int *, int);
219 #ifdef LEAF_REGISTERS
220 static void leaf_renumber_regs (rtx);
221 #endif
222 #ifdef HAVE_cc0
223 static int alter_cond (rtx);
224 #endif
225 #ifndef ADDR_VEC_ALIGN
226 static int final_addr_vec_align (rtx);
227 #endif
228 #ifdef HAVE_ATTR_length
229 static int align_fuzz (rtx, rtx, int, unsigned);
230 #endif
231 \f
232 /* Initialize data in final at the beginning of a compilation. */
233
234 void
235 init_final (const char *filename ATTRIBUTE_UNUSED)
236 {
237 app_on = 0;
238 final_sequence = 0;
239
240 #ifdef ASSEMBLER_DIALECT
241 dialect_number = ASSEMBLER_DIALECT;
242 #endif
243 }
244
245 /* Default target function prologue and epilogue assembler output.
246
247 If not overridden for epilogue code, then the function body itself
248 contains return instructions wherever needed. */
249 void
250 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
251 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
252 {
253 }
254
255 void
256 default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED,
257 tree decl ATTRIBUTE_UNUSED,
258 bool new_is_cold ATTRIBUTE_UNUSED)
259 {
260 }
261
262 /* Default target hook that outputs nothing to a stream. */
263 void
264 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
265 {
266 }
267
268 /* Enable APP processing of subsequent output.
269 Used before the output from an `asm' statement. */
270
271 void
272 app_enable (void)
273 {
274 if (! app_on)
275 {
276 fputs (ASM_APP_ON, asm_out_file);
277 app_on = 1;
278 }
279 }
280
281 /* Disable APP processing of subsequent output.
282 Called from varasm.c before most kinds of output. */
283
284 void
285 app_disable (void)
286 {
287 if (app_on)
288 {
289 fputs (ASM_APP_OFF, asm_out_file);
290 app_on = 0;
291 }
292 }
293 \f
294 /* Return the number of slots filled in the current
295 delayed branch sequence (we don't count the insn needing the
296 delay slot). Zero if not in a delayed branch sequence. */
297
298 #ifdef DELAY_SLOTS
299 int
300 dbr_sequence_length (void)
301 {
302 if (final_sequence != 0)
303 return XVECLEN (final_sequence, 0) - 1;
304 else
305 return 0;
306 }
307 #endif
308 \f
309 /* The next two pages contain routines used to compute the length of an insn
310 and to shorten branches. */
311
312 /* Arrays for insn lengths, and addresses. The latter is referenced by
313 `insn_current_length'. */
314
315 static int *insn_lengths;
316
317 VEC(int,heap) *insn_addresses_;
318
319 /* Max uid for which the above arrays are valid. */
320 static int insn_lengths_max_uid;
321
322 /* Address of insn being processed. Used by `insn_current_length'. */
323 int insn_current_address;
324
325 /* Address of insn being processed in previous iteration. */
326 int insn_last_address;
327
328 /* known invariant alignment of insn being processed. */
329 int insn_current_align;
330
331 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
332 gives the next following alignment insn that increases the known
333 alignment, or NULL_RTX if there is no such insn.
334 For any alignment obtained this way, we can again index uid_align with
335 its uid to obtain the next following align that in turn increases the
336 alignment, till we reach NULL_RTX; the sequence obtained this way
337 for each insn we'll call the alignment chain of this insn in the following
338 comments. */
339
340 struct label_alignment
341 {
342 short alignment;
343 short max_skip;
344 };
345
346 static rtx *uid_align;
347 static int *uid_shuid;
348 static struct label_alignment *label_align;
349
350 /* Indicate that branch shortening hasn't yet been done. */
351
352 void
353 init_insn_lengths (void)
354 {
355 if (uid_shuid)
356 {
357 free (uid_shuid);
358 uid_shuid = 0;
359 }
360 if (insn_lengths)
361 {
362 free (insn_lengths);
363 insn_lengths = 0;
364 insn_lengths_max_uid = 0;
365 }
366 #ifdef HAVE_ATTR_length
367 INSN_ADDRESSES_FREE ();
368 #endif
369 if (uid_align)
370 {
371 free (uid_align);
372 uid_align = 0;
373 }
374 }
375
376 /* Obtain the current length of an insn. If branch shortening has been done,
377 get its actual length. Otherwise, use FALLBACK_FN to calculate the
378 length. */
379 static inline int
380 get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED,
381 int (*fallback_fn) (rtx) ATTRIBUTE_UNUSED)
382 {
383 #ifdef HAVE_ATTR_length
384 rtx body;
385 int i;
386 int length = 0;
387
388 if (insn_lengths_max_uid > INSN_UID (insn))
389 return insn_lengths[INSN_UID (insn)];
390 else
391 switch (GET_CODE (insn))
392 {
393 case NOTE:
394 case BARRIER:
395 case CODE_LABEL:
396 case DEBUG_INSN:
397 return 0;
398
399 case CALL_INSN:
400 length = fallback_fn (insn);
401 break;
402
403 case JUMP_INSN:
404 body = PATTERN (insn);
405 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
406 {
407 /* Alignment is machine-dependent and should be handled by
408 ADDR_VEC_ALIGN. */
409 }
410 else
411 length = fallback_fn (insn);
412 break;
413
414 case INSN:
415 body = PATTERN (insn);
416 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
417 return 0;
418
419 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
420 length = asm_insn_count (body) * fallback_fn (insn);
421 else if (GET_CODE (body) == SEQUENCE)
422 for (i = 0; i < XVECLEN (body, 0); i++)
423 length += get_attr_length_1 (XVECEXP (body, 0, i), fallback_fn);
424 else
425 length = fallback_fn (insn);
426 break;
427
428 default:
429 break;
430 }
431
432 #ifdef ADJUST_INSN_LENGTH
433 ADJUST_INSN_LENGTH (insn, length);
434 #endif
435 return length;
436 #else /* not HAVE_ATTR_length */
437 return 0;
438 #define insn_default_length 0
439 #define insn_min_length 0
440 #endif /* not HAVE_ATTR_length */
441 }
442
443 /* Obtain the current length of an insn. If branch shortening has been done,
444 get its actual length. Otherwise, get its maximum length. */
445 int
446 get_attr_length (rtx insn)
447 {
448 return get_attr_length_1 (insn, insn_default_length);
449 }
450
451 /* Obtain the current length of an insn. If branch shortening has been done,
452 get its actual length. Otherwise, get its minimum length. */
453 int
454 get_attr_min_length (rtx insn)
455 {
456 return get_attr_length_1 (insn, insn_min_length);
457 }
458 \f
459 /* Code to handle alignment inside shorten_branches. */
460
461 /* Here is an explanation how the algorithm in align_fuzz can give
462 proper results:
463
464 Call a sequence of instructions beginning with alignment point X
465 and continuing until the next alignment point `block X'. When `X'
466 is used in an expression, it means the alignment value of the
467 alignment point.
468
469 Call the distance between the start of the first insn of block X, and
470 the end of the last insn of block X `IX', for the `inner size of X'.
471 This is clearly the sum of the instruction lengths.
472
473 Likewise with the next alignment-delimited block following X, which we
474 shall call block Y.
475
476 Call the distance between the start of the first insn of block X, and
477 the start of the first insn of block Y `OX', for the `outer size of X'.
478
479 The estimated padding is then OX - IX.
480
481 OX can be safely estimated as
482
483 if (X >= Y)
484 OX = round_up(IX, Y)
485 else
486 OX = round_up(IX, X) + Y - X
487
488 Clearly est(IX) >= real(IX), because that only depends on the
489 instruction lengths, and those being overestimated is a given.
490
491 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
492 we needn't worry about that when thinking about OX.
493
494 When X >= Y, the alignment provided by Y adds no uncertainty factor
495 for branch ranges starting before X, so we can just round what we have.
496 But when X < Y, we don't know anything about the, so to speak,
497 `middle bits', so we have to assume the worst when aligning up from an
498 address mod X to one mod Y, which is Y - X. */
499
500 #ifndef LABEL_ALIGN
501 #define LABEL_ALIGN(LABEL) align_labels_log
502 #endif
503
504 #ifndef LOOP_ALIGN
505 #define LOOP_ALIGN(LABEL) align_loops_log
506 #endif
507
508 #ifndef LABEL_ALIGN_AFTER_BARRIER
509 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
510 #endif
511
512 #ifndef JUMP_ALIGN
513 #define JUMP_ALIGN(LABEL) align_jumps_log
514 #endif
515
516 int
517 default_label_align_after_barrier_max_skip (rtx insn ATTRIBUTE_UNUSED)
518 {
519 return 0;
520 }
521
522 int
523 default_loop_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
524 {
525 return align_loops_max_skip;
526 }
527
528 int
529 default_label_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
530 {
531 return align_labels_max_skip;
532 }
533
534 int
535 default_jump_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
536 {
537 return align_jumps_max_skip;
538 }
539
540 #ifndef ADDR_VEC_ALIGN
541 static int
542 final_addr_vec_align (rtx addr_vec)
543 {
544 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
545
546 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
547 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
548 return exact_log2 (align);
549
550 }
551
552 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
553 #endif
554
555 #ifndef INSN_LENGTH_ALIGNMENT
556 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
557 #endif
558
559 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
560
561 static int min_labelno, max_labelno;
562
563 #define LABEL_TO_ALIGNMENT(LABEL) \
564 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
565
566 #define LABEL_TO_MAX_SKIP(LABEL) \
567 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
568
569 /* For the benefit of port specific code do this also as a function. */
570
571 int
572 label_to_alignment (rtx label)
573 {
574 if (CODE_LABEL_NUMBER (label) <= max_labelno)
575 return LABEL_TO_ALIGNMENT (label);
576 return 0;
577 }
578
579 int
580 label_to_max_skip (rtx label)
581 {
582 if (CODE_LABEL_NUMBER (label) <= max_labelno)
583 return LABEL_TO_MAX_SKIP (label);
584 return 0;
585 }
586
587 #ifdef HAVE_ATTR_length
588 /* The differences in addresses
589 between a branch and its target might grow or shrink depending on
590 the alignment the start insn of the range (the branch for a forward
591 branch or the label for a backward branch) starts out on; if these
592 differences are used naively, they can even oscillate infinitely.
593 We therefore want to compute a 'worst case' address difference that
594 is independent of the alignment the start insn of the range end
595 up on, and that is at least as large as the actual difference.
596 The function align_fuzz calculates the amount we have to add to the
597 naively computed difference, by traversing the part of the alignment
598 chain of the start insn of the range that is in front of the end insn
599 of the range, and considering for each alignment the maximum amount
600 that it might contribute to a size increase.
601
602 For casesi tables, we also want to know worst case minimum amounts of
603 address difference, in case a machine description wants to introduce
604 some common offset that is added to all offsets in a table.
605 For this purpose, align_fuzz with a growth argument of 0 computes the
606 appropriate adjustment. */
607
608 /* Compute the maximum delta by which the difference of the addresses of
609 START and END might grow / shrink due to a different address for start
610 which changes the size of alignment insns between START and END.
611 KNOWN_ALIGN_LOG is the alignment known for START.
612 GROWTH should be ~0 if the objective is to compute potential code size
613 increase, and 0 if the objective is to compute potential shrink.
614 The return value is undefined for any other value of GROWTH. */
615
616 static int
617 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
618 {
619 int uid = INSN_UID (start);
620 rtx align_label;
621 int known_align = 1 << known_align_log;
622 int end_shuid = INSN_SHUID (end);
623 int fuzz = 0;
624
625 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
626 {
627 int align_addr, new_align;
628
629 uid = INSN_UID (align_label);
630 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
631 if (uid_shuid[uid] > end_shuid)
632 break;
633 known_align_log = LABEL_TO_ALIGNMENT (align_label);
634 new_align = 1 << known_align_log;
635 if (new_align < known_align)
636 continue;
637 fuzz += (-align_addr ^ growth) & (new_align - known_align);
638 known_align = new_align;
639 }
640 return fuzz;
641 }
642
643 /* Compute a worst-case reference address of a branch so that it
644 can be safely used in the presence of aligned labels. Since the
645 size of the branch itself is unknown, the size of the branch is
646 not included in the range. I.e. for a forward branch, the reference
647 address is the end address of the branch as known from the previous
648 branch shortening pass, minus a value to account for possible size
649 increase due to alignment. For a backward branch, it is the start
650 address of the branch as known from the current pass, plus a value
651 to account for possible size increase due to alignment.
652 NB.: Therefore, the maximum offset allowed for backward branches needs
653 to exclude the branch size. */
654
655 int
656 insn_current_reference_address (rtx branch)
657 {
658 rtx dest, seq;
659 int seq_uid;
660
661 if (! INSN_ADDRESSES_SET_P ())
662 return 0;
663
664 seq = NEXT_INSN (PREV_INSN (branch));
665 seq_uid = INSN_UID (seq);
666 if (!JUMP_P (branch))
667 /* This can happen for example on the PA; the objective is to know the
668 offset to address something in front of the start of the function.
669 Thus, we can treat it like a backward branch.
670 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
671 any alignment we'd encounter, so we skip the call to align_fuzz. */
672 return insn_current_address;
673 dest = JUMP_LABEL (branch);
674
675 /* BRANCH has no proper alignment chain set, so use SEQ.
676 BRANCH also has no INSN_SHUID. */
677 if (INSN_SHUID (seq) < INSN_SHUID (dest))
678 {
679 /* Forward branch. */
680 return (insn_last_address + insn_lengths[seq_uid]
681 - align_fuzz (seq, dest, length_unit_log, ~0));
682 }
683 else
684 {
685 /* Backward branch. */
686 return (insn_current_address
687 + align_fuzz (dest, seq, length_unit_log, ~0));
688 }
689 }
690 #endif /* HAVE_ATTR_length */
691 \f
692 /* Compute branch alignments based on frequency information in the
693 CFG. */
694
695 unsigned int
696 compute_alignments (void)
697 {
698 int log, max_skip, max_log;
699 basic_block bb;
700 int freq_max = 0;
701 int freq_threshold = 0;
702
703 if (label_align)
704 {
705 free (label_align);
706 label_align = 0;
707 }
708
709 max_labelno = max_label_num ();
710 min_labelno = get_first_label_num ();
711 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
712
713 /* If not optimizing or optimizing for size, don't assign any alignments. */
714 if (! optimize || optimize_function_for_size_p (cfun))
715 return 0;
716
717 if (dump_file)
718 {
719 dump_flow_info (dump_file, TDF_DETAILS);
720 flow_loops_dump (dump_file, NULL, 1);
721 }
722 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
723 FOR_EACH_BB (bb)
724 if (bb->frequency > freq_max)
725 freq_max = bb->frequency;
726 freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD);
727
728 if (dump_file)
729 fprintf(dump_file, "freq_max: %i\n",freq_max);
730 FOR_EACH_BB (bb)
731 {
732 rtx label = BB_HEAD (bb);
733 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
734 edge e;
735 edge_iterator ei;
736
737 if (!LABEL_P (label)
738 || optimize_bb_for_size_p (bb))
739 {
740 if (dump_file)
741 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
742 bb->index, bb->frequency, bb->loop_father->num, bb->loop_depth);
743 continue;
744 }
745 max_log = LABEL_ALIGN (label);
746 max_skip = targetm.asm_out.label_align_max_skip (label);
747
748 FOR_EACH_EDGE (e, ei, bb->preds)
749 {
750 if (e->flags & EDGE_FALLTHRU)
751 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
752 else
753 branch_frequency += EDGE_FREQUENCY (e);
754 }
755 if (dump_file)
756 {
757 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i fall %4i branch %4i",
758 bb->index, bb->frequency, bb->loop_father->num,
759 bb->loop_depth,
760 fallthru_frequency, branch_frequency);
761 if (!bb->loop_father->inner && bb->loop_father->num)
762 fprintf (dump_file, " inner_loop");
763 if (bb->loop_father->header == bb)
764 fprintf (dump_file, " loop_header");
765 fprintf (dump_file, "\n");
766 }
767
768 /* There are two purposes to align block with no fallthru incoming edge:
769 1) to avoid fetch stalls when branch destination is near cache boundary
770 2) to improve cache efficiency in case the previous block is not executed
771 (so it does not need to be in the cache).
772
773 We to catch first case, we align frequently executed blocks.
774 To catch the second, we align blocks that are executed more frequently
775 than the predecessor and the predecessor is likely to not be executed
776 when function is called. */
777
778 if (!has_fallthru
779 && (branch_frequency > freq_threshold
780 || (bb->frequency > bb->prev_bb->frequency * 10
781 && (bb->prev_bb->frequency
782 <= ENTRY_BLOCK_PTR->frequency / 2))))
783 {
784 log = JUMP_ALIGN (label);
785 if (dump_file)
786 fprintf(dump_file, " jump alignment added.\n");
787 if (max_log < log)
788 {
789 max_log = log;
790 max_skip = targetm.asm_out.jump_align_max_skip (label);
791 }
792 }
793 /* In case block is frequent and reached mostly by non-fallthru edge,
794 align it. It is most likely a first block of loop. */
795 if (has_fallthru
796 && optimize_bb_for_speed_p (bb)
797 && branch_frequency + fallthru_frequency > freq_threshold
798 && (branch_frequency
799 > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS)))
800 {
801 log = LOOP_ALIGN (label);
802 if (dump_file)
803 fprintf(dump_file, " internal loop alignment added.\n");
804 if (max_log < log)
805 {
806 max_log = log;
807 max_skip = targetm.asm_out.loop_align_max_skip (label);
808 }
809 }
810 LABEL_TO_ALIGNMENT (label) = max_log;
811 LABEL_TO_MAX_SKIP (label) = max_skip;
812 }
813
814 loop_optimizer_finalize ();
815 free_dominance_info (CDI_DOMINATORS);
816 return 0;
817 }
818
819 struct rtl_opt_pass pass_compute_alignments =
820 {
821 {
822 RTL_PASS,
823 "alignments", /* name */
824 NULL, /* gate */
825 compute_alignments, /* execute */
826 NULL, /* sub */
827 NULL, /* next */
828 0, /* static_pass_number */
829 TV_NONE, /* tv_id */
830 0, /* properties_required */
831 0, /* properties_provided */
832 0, /* properties_destroyed */
833 0, /* todo_flags_start */
834 TODO_verify_rtl_sharing
835 | TODO_ggc_collect /* todo_flags_finish */
836 }
837 };
838
839 \f
840 /* Make a pass over all insns and compute their actual lengths by shortening
841 any branches of variable length if possible. */
842
843 /* shorten_branches might be called multiple times: for example, the SH
844 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
845 In order to do this, it needs proper length information, which it obtains
846 by calling shorten_branches. This cannot be collapsed with
847 shorten_branches itself into a single pass unless we also want to integrate
848 reorg.c, since the branch splitting exposes new instructions with delay
849 slots. */
850
851 void
852 shorten_branches (rtx first ATTRIBUTE_UNUSED)
853 {
854 rtx insn;
855 int max_uid;
856 int i;
857 int max_log;
858 int max_skip;
859 #ifdef HAVE_ATTR_length
860 #define MAX_CODE_ALIGN 16
861 rtx seq;
862 int something_changed = 1;
863 char *varying_length;
864 rtx body;
865 int uid;
866 rtx align_tab[MAX_CODE_ALIGN];
867
868 #endif
869
870 /* Compute maximum UID and allocate label_align / uid_shuid. */
871 max_uid = get_max_uid ();
872
873 /* Free uid_shuid before reallocating it. */
874 free (uid_shuid);
875
876 uid_shuid = XNEWVEC (int, max_uid);
877
878 if (max_labelno != max_label_num ())
879 {
880 int old = max_labelno;
881 int n_labels;
882 int n_old_labels;
883
884 max_labelno = max_label_num ();
885
886 n_labels = max_labelno - min_labelno + 1;
887 n_old_labels = old - min_labelno + 1;
888
889 label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels);
890
891 /* Range of labels grows monotonically in the function. Failing here
892 means that the initialization of array got lost. */
893 gcc_assert (n_old_labels <= n_labels);
894
895 memset (label_align + n_old_labels, 0,
896 (n_labels - n_old_labels) * sizeof (struct label_alignment));
897 }
898
899 /* Initialize label_align and set up uid_shuid to be strictly
900 monotonically rising with insn order. */
901 /* We use max_log here to keep track of the maximum alignment we want to
902 impose on the next CODE_LABEL (or the current one if we are processing
903 the CODE_LABEL itself). */
904
905 max_log = 0;
906 max_skip = 0;
907
908 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
909 {
910 int log;
911
912 INSN_SHUID (insn) = i++;
913 if (INSN_P (insn))
914 continue;
915
916 if (LABEL_P (insn))
917 {
918 rtx next;
919 bool next_is_jumptable;
920
921 /* Merge in alignments computed by compute_alignments. */
922 log = LABEL_TO_ALIGNMENT (insn);
923 if (max_log < log)
924 {
925 max_log = log;
926 max_skip = LABEL_TO_MAX_SKIP (insn);
927 }
928
929 next = next_nonnote_insn (insn);
930 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
931 if (!next_is_jumptable)
932 {
933 log = LABEL_ALIGN (insn);
934 if (max_log < log)
935 {
936 max_log = log;
937 max_skip = targetm.asm_out.label_align_max_skip (insn);
938 }
939 }
940 /* ADDR_VECs only take room if read-only data goes into the text
941 section. */
942 if ((JUMP_TABLES_IN_TEXT_SECTION
943 || readonly_data_section == text_section)
944 && next_is_jumptable)
945 {
946 log = ADDR_VEC_ALIGN (next);
947 if (max_log < log)
948 {
949 max_log = log;
950 max_skip = targetm.asm_out.label_align_max_skip (insn);
951 }
952 }
953 LABEL_TO_ALIGNMENT (insn) = max_log;
954 LABEL_TO_MAX_SKIP (insn) = max_skip;
955 max_log = 0;
956 max_skip = 0;
957 }
958 else if (BARRIER_P (insn))
959 {
960 rtx label;
961
962 for (label = insn; label && ! INSN_P (label);
963 label = NEXT_INSN (label))
964 if (LABEL_P (label))
965 {
966 log = LABEL_ALIGN_AFTER_BARRIER (insn);
967 if (max_log < log)
968 {
969 max_log = log;
970 max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label);
971 }
972 break;
973 }
974 }
975 }
976 #ifdef HAVE_ATTR_length
977
978 /* Allocate the rest of the arrays. */
979 insn_lengths = XNEWVEC (int, max_uid);
980 insn_lengths_max_uid = max_uid;
981 /* Syntax errors can lead to labels being outside of the main insn stream.
982 Initialize insn_addresses, so that we get reproducible results. */
983 INSN_ADDRESSES_ALLOC (max_uid);
984
985 varying_length = XCNEWVEC (char, max_uid);
986
987 /* Initialize uid_align. We scan instructions
988 from end to start, and keep in align_tab[n] the last seen insn
989 that does an alignment of at least n+1, i.e. the successor
990 in the alignment chain for an insn that does / has a known
991 alignment of n. */
992 uid_align = XCNEWVEC (rtx, max_uid);
993
994 for (i = MAX_CODE_ALIGN; --i >= 0;)
995 align_tab[i] = NULL_RTX;
996 seq = get_last_insn ();
997 for (; seq; seq = PREV_INSN (seq))
998 {
999 int uid = INSN_UID (seq);
1000 int log;
1001 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
1002 uid_align[uid] = align_tab[0];
1003 if (log)
1004 {
1005 /* Found an alignment label. */
1006 uid_align[uid] = align_tab[log];
1007 for (i = log - 1; i >= 0; i--)
1008 align_tab[i] = seq;
1009 }
1010 }
1011 #ifdef CASE_VECTOR_SHORTEN_MODE
1012 if (optimize)
1013 {
1014 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1015 label fields. */
1016
1017 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1018 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1019 int rel;
1020
1021 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1022 {
1023 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1024 int len, i, min, max, insn_shuid;
1025 int min_align;
1026 addr_diff_vec_flags flags;
1027
1028 if (!JUMP_P (insn)
1029 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1030 continue;
1031 pat = PATTERN (insn);
1032 len = XVECLEN (pat, 1);
1033 gcc_assert (len > 0);
1034 min_align = MAX_CODE_ALIGN;
1035 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1036 {
1037 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1038 int shuid = INSN_SHUID (lab);
1039 if (shuid < min)
1040 {
1041 min = shuid;
1042 min_lab = lab;
1043 }
1044 if (shuid > max)
1045 {
1046 max = shuid;
1047 max_lab = lab;
1048 }
1049 if (min_align > LABEL_TO_ALIGNMENT (lab))
1050 min_align = LABEL_TO_ALIGNMENT (lab);
1051 }
1052 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1053 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
1054 insn_shuid = INSN_SHUID (insn);
1055 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1056 memset (&flags, 0, sizeof (flags));
1057 flags.min_align = min_align;
1058 flags.base_after_vec = rel > insn_shuid;
1059 flags.min_after_vec = min > insn_shuid;
1060 flags.max_after_vec = max > insn_shuid;
1061 flags.min_after_base = min > rel;
1062 flags.max_after_base = max > rel;
1063 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1064 }
1065 }
1066 #endif /* CASE_VECTOR_SHORTEN_MODE */
1067
1068 /* Compute initial lengths, addresses, and varying flags for each insn. */
1069 for (insn_current_address = 0, insn = first;
1070 insn != 0;
1071 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1072 {
1073 uid = INSN_UID (insn);
1074
1075 insn_lengths[uid] = 0;
1076
1077 if (LABEL_P (insn))
1078 {
1079 int log = LABEL_TO_ALIGNMENT (insn);
1080 if (log)
1081 {
1082 int align = 1 << log;
1083 int new_address = (insn_current_address + align - 1) & -align;
1084 insn_lengths[uid] = new_address - insn_current_address;
1085 }
1086 }
1087
1088 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1089
1090 if (NOTE_P (insn) || BARRIER_P (insn)
1091 || LABEL_P (insn) || DEBUG_INSN_P(insn))
1092 continue;
1093 if (INSN_DELETED_P (insn))
1094 continue;
1095
1096 body = PATTERN (insn);
1097 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1098 {
1099 /* This only takes room if read-only data goes into the text
1100 section. */
1101 if (JUMP_TABLES_IN_TEXT_SECTION
1102 || readonly_data_section == text_section)
1103 insn_lengths[uid] = (XVECLEN (body,
1104 GET_CODE (body) == ADDR_DIFF_VEC)
1105 * GET_MODE_SIZE (GET_MODE (body)));
1106 /* Alignment is handled by ADDR_VEC_ALIGN. */
1107 }
1108 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1109 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1110 else if (GET_CODE (body) == SEQUENCE)
1111 {
1112 int i;
1113 int const_delay_slots;
1114 #ifdef DELAY_SLOTS
1115 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1116 #else
1117 const_delay_slots = 0;
1118 #endif
1119 /* Inside a delay slot sequence, we do not do any branch shortening
1120 if the shortening could change the number of delay slots
1121 of the branch. */
1122 for (i = 0; i < XVECLEN (body, 0); i++)
1123 {
1124 rtx inner_insn = XVECEXP (body, 0, i);
1125 int inner_uid = INSN_UID (inner_insn);
1126 int inner_length;
1127
1128 if (GET_CODE (body) == ASM_INPUT
1129 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1130 inner_length = (asm_insn_count (PATTERN (inner_insn))
1131 * insn_default_length (inner_insn));
1132 else
1133 inner_length = insn_default_length (inner_insn);
1134
1135 insn_lengths[inner_uid] = inner_length;
1136 if (const_delay_slots)
1137 {
1138 if ((varying_length[inner_uid]
1139 = insn_variable_length_p (inner_insn)) != 0)
1140 varying_length[uid] = 1;
1141 INSN_ADDRESSES (inner_uid) = (insn_current_address
1142 + insn_lengths[uid]);
1143 }
1144 else
1145 varying_length[inner_uid] = 0;
1146 insn_lengths[uid] += inner_length;
1147 }
1148 }
1149 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1150 {
1151 insn_lengths[uid] = insn_default_length (insn);
1152 varying_length[uid] = insn_variable_length_p (insn);
1153 }
1154
1155 /* If needed, do any adjustment. */
1156 #ifdef ADJUST_INSN_LENGTH
1157 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1158 if (insn_lengths[uid] < 0)
1159 fatal_insn ("negative insn length", insn);
1160 #endif
1161 }
1162
1163 /* Now loop over all the insns finding varying length insns. For each,
1164 get the current insn length. If it has changed, reflect the change.
1165 When nothing changes for a full pass, we are done. */
1166
1167 while (something_changed)
1168 {
1169 something_changed = 0;
1170 insn_current_align = MAX_CODE_ALIGN - 1;
1171 for (insn_current_address = 0, insn = first;
1172 insn != 0;
1173 insn = NEXT_INSN (insn))
1174 {
1175 int new_length;
1176 #ifdef ADJUST_INSN_LENGTH
1177 int tmp_length;
1178 #endif
1179 int length_align;
1180
1181 uid = INSN_UID (insn);
1182
1183 if (LABEL_P (insn))
1184 {
1185 int log = LABEL_TO_ALIGNMENT (insn);
1186 if (log > insn_current_align)
1187 {
1188 int align = 1 << log;
1189 int new_address= (insn_current_address + align - 1) & -align;
1190 insn_lengths[uid] = new_address - insn_current_address;
1191 insn_current_align = log;
1192 insn_current_address = new_address;
1193 }
1194 else
1195 insn_lengths[uid] = 0;
1196 INSN_ADDRESSES (uid) = insn_current_address;
1197 continue;
1198 }
1199
1200 length_align = INSN_LENGTH_ALIGNMENT (insn);
1201 if (length_align < insn_current_align)
1202 insn_current_align = length_align;
1203
1204 insn_last_address = INSN_ADDRESSES (uid);
1205 INSN_ADDRESSES (uid) = insn_current_address;
1206
1207 #ifdef CASE_VECTOR_SHORTEN_MODE
1208 if (optimize && JUMP_P (insn)
1209 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1210 {
1211 rtx body = PATTERN (insn);
1212 int old_length = insn_lengths[uid];
1213 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1214 rtx min_lab = XEXP (XEXP (body, 2), 0);
1215 rtx max_lab = XEXP (XEXP (body, 3), 0);
1216 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1217 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1218 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1219 rtx prev;
1220 int rel_align = 0;
1221 addr_diff_vec_flags flags;
1222
1223 /* Avoid automatic aggregate initialization. */
1224 flags = ADDR_DIFF_VEC_FLAGS (body);
1225
1226 /* Try to find a known alignment for rel_lab. */
1227 for (prev = rel_lab;
1228 prev
1229 && ! insn_lengths[INSN_UID (prev)]
1230 && ! (varying_length[INSN_UID (prev)] & 1);
1231 prev = PREV_INSN (prev))
1232 if (varying_length[INSN_UID (prev)] & 2)
1233 {
1234 rel_align = LABEL_TO_ALIGNMENT (prev);
1235 break;
1236 }
1237
1238 /* See the comment on addr_diff_vec_flags in rtl.h for the
1239 meaning of the flags values. base: REL_LAB vec: INSN */
1240 /* Anything after INSN has still addresses from the last
1241 pass; adjust these so that they reflect our current
1242 estimate for this pass. */
1243 if (flags.base_after_vec)
1244 rel_addr += insn_current_address - insn_last_address;
1245 if (flags.min_after_vec)
1246 min_addr += insn_current_address - insn_last_address;
1247 if (flags.max_after_vec)
1248 max_addr += insn_current_address - insn_last_address;
1249 /* We want to know the worst case, i.e. lowest possible value
1250 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1251 its offset is positive, and we have to be wary of code shrink;
1252 otherwise, it is negative, and we have to be vary of code
1253 size increase. */
1254 if (flags.min_after_base)
1255 {
1256 /* If INSN is between REL_LAB and MIN_LAB, the size
1257 changes we are about to make can change the alignment
1258 within the observed offset, therefore we have to break
1259 it up into two parts that are independent. */
1260 if (! flags.base_after_vec && flags.min_after_vec)
1261 {
1262 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1263 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1264 }
1265 else
1266 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1267 }
1268 else
1269 {
1270 if (flags.base_after_vec && ! flags.min_after_vec)
1271 {
1272 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1273 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1274 }
1275 else
1276 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1277 }
1278 /* Likewise, determine the highest lowest possible value
1279 for the offset of MAX_LAB. */
1280 if (flags.max_after_base)
1281 {
1282 if (! flags.base_after_vec && flags.max_after_vec)
1283 {
1284 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1285 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1286 }
1287 else
1288 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1289 }
1290 else
1291 {
1292 if (flags.base_after_vec && ! flags.max_after_vec)
1293 {
1294 max_addr += align_fuzz (max_lab, insn, 0, 0);
1295 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1296 }
1297 else
1298 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1299 }
1300 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1301 max_addr - rel_addr,
1302 body));
1303 if (JUMP_TABLES_IN_TEXT_SECTION
1304 || readonly_data_section == text_section)
1305 {
1306 insn_lengths[uid]
1307 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1308 insn_current_address += insn_lengths[uid];
1309 if (insn_lengths[uid] != old_length)
1310 something_changed = 1;
1311 }
1312
1313 continue;
1314 }
1315 #endif /* CASE_VECTOR_SHORTEN_MODE */
1316
1317 if (! (varying_length[uid]))
1318 {
1319 if (NONJUMP_INSN_P (insn)
1320 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1321 {
1322 int i;
1323
1324 body = PATTERN (insn);
1325 for (i = 0; i < XVECLEN (body, 0); i++)
1326 {
1327 rtx inner_insn = XVECEXP (body, 0, i);
1328 int inner_uid = INSN_UID (inner_insn);
1329
1330 INSN_ADDRESSES (inner_uid) = insn_current_address;
1331
1332 insn_current_address += insn_lengths[inner_uid];
1333 }
1334 }
1335 else
1336 insn_current_address += insn_lengths[uid];
1337
1338 continue;
1339 }
1340
1341 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1342 {
1343 int i;
1344
1345 body = PATTERN (insn);
1346 new_length = 0;
1347 for (i = 0; i < XVECLEN (body, 0); i++)
1348 {
1349 rtx inner_insn = XVECEXP (body, 0, i);
1350 int inner_uid = INSN_UID (inner_insn);
1351 int inner_length;
1352
1353 INSN_ADDRESSES (inner_uid) = insn_current_address;
1354
1355 /* insn_current_length returns 0 for insns with a
1356 non-varying length. */
1357 if (! varying_length[inner_uid])
1358 inner_length = insn_lengths[inner_uid];
1359 else
1360 inner_length = insn_current_length (inner_insn);
1361
1362 if (inner_length != insn_lengths[inner_uid])
1363 {
1364 insn_lengths[inner_uid] = inner_length;
1365 something_changed = 1;
1366 }
1367 insn_current_address += insn_lengths[inner_uid];
1368 new_length += inner_length;
1369 }
1370 }
1371 else
1372 {
1373 new_length = insn_current_length (insn);
1374 insn_current_address += new_length;
1375 }
1376
1377 #ifdef ADJUST_INSN_LENGTH
1378 /* If needed, do any adjustment. */
1379 tmp_length = new_length;
1380 ADJUST_INSN_LENGTH (insn, new_length);
1381 insn_current_address += (new_length - tmp_length);
1382 #endif
1383
1384 if (new_length != insn_lengths[uid])
1385 {
1386 insn_lengths[uid] = new_length;
1387 something_changed = 1;
1388 }
1389 }
1390 /* For a non-optimizing compile, do only a single pass. */
1391 if (!optimize)
1392 break;
1393 }
1394
1395 free (varying_length);
1396
1397 #endif /* HAVE_ATTR_length */
1398 }
1399
1400 #ifdef HAVE_ATTR_length
1401 /* Given the body of an INSN known to be generated by an ASM statement, return
1402 the number of machine instructions likely to be generated for this insn.
1403 This is used to compute its length. */
1404
1405 static int
1406 asm_insn_count (rtx body)
1407 {
1408 const char *templ;
1409
1410 if (GET_CODE (body) == ASM_INPUT)
1411 templ = XSTR (body, 0);
1412 else
1413 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
1414
1415 return asm_str_count (templ);
1416 }
1417 #endif
1418
1419 /* Return the number of machine instructions likely to be generated for the
1420 inline-asm template. */
1421 int
1422 asm_str_count (const char *templ)
1423 {
1424 int count = 1;
1425
1426 if (!*templ)
1427 return 0;
1428
1429 for (; *templ; templ++)
1430 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
1431 || *templ == '\n')
1432 count++;
1433
1434 return count;
1435 }
1436 \f
1437 /* ??? This is probably the wrong place for these. */
1438 /* Structure recording the mapping from source file and directory
1439 names at compile time to those to be embedded in debug
1440 information. */
1441 typedef struct debug_prefix_map
1442 {
1443 const char *old_prefix;
1444 const char *new_prefix;
1445 size_t old_len;
1446 size_t new_len;
1447 struct debug_prefix_map *next;
1448 } debug_prefix_map;
1449
1450 /* Linked list of such structures. */
1451 debug_prefix_map *debug_prefix_maps;
1452
1453
1454 /* Record a debug file prefix mapping. ARG is the argument to
1455 -fdebug-prefix-map and must be of the form OLD=NEW. */
1456
1457 void
1458 add_debug_prefix_map (const char *arg)
1459 {
1460 debug_prefix_map *map;
1461 const char *p;
1462
1463 p = strchr (arg, '=');
1464 if (!p)
1465 {
1466 error ("invalid argument %qs to -fdebug-prefix-map", arg);
1467 return;
1468 }
1469 map = XNEW (debug_prefix_map);
1470 map->old_prefix = xstrndup (arg, p - arg);
1471 map->old_len = p - arg;
1472 p++;
1473 map->new_prefix = xstrdup (p);
1474 map->new_len = strlen (p);
1475 map->next = debug_prefix_maps;
1476 debug_prefix_maps = map;
1477 }
1478
1479 /* Perform user-specified mapping of debug filename prefixes. Return
1480 the new name corresponding to FILENAME. */
1481
1482 const char *
1483 remap_debug_filename (const char *filename)
1484 {
1485 debug_prefix_map *map;
1486 char *s;
1487 const char *name;
1488 size_t name_len;
1489
1490 for (map = debug_prefix_maps; map; map = map->next)
1491 if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0)
1492 break;
1493 if (!map)
1494 return filename;
1495 name = filename + map->old_len;
1496 name_len = strlen (name) + 1;
1497 s = (char *) alloca (name_len + map->new_len);
1498 memcpy (s, map->new_prefix, map->new_len);
1499 memcpy (s + map->new_len, name, name_len);
1500 return ggc_strdup (s);
1501 }
1502 \f
1503 /* Return true if DWARF2 debug info can be emitted for DECL. */
1504
1505 static bool
1506 dwarf2_debug_info_emitted_p (tree decl)
1507 {
1508 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1509 return false;
1510
1511 if (DECL_IGNORED_P (decl))
1512 return false;
1513
1514 return true;
1515 }
1516
1517 /* Return scope resulting from combination of S1 and S2. */
1518 static tree
1519 choose_inner_scope (tree s1, tree s2)
1520 {
1521 if (!s1)
1522 return s2;
1523 if (!s2)
1524 return s1;
1525 if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2))
1526 return s1;
1527 return s2;
1528 }
1529
1530 /* Emit lexical block notes needed to change scope from S1 to S2. */
1531
1532 static void
1533 change_scope (rtx orig_insn, tree s1, tree s2)
1534 {
1535 rtx insn = orig_insn;
1536 tree com = NULL_TREE;
1537 tree ts1 = s1, ts2 = s2;
1538 tree s;
1539
1540 while (ts1 != ts2)
1541 {
1542 gcc_assert (ts1 && ts2);
1543 if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2))
1544 ts1 = BLOCK_SUPERCONTEXT (ts1);
1545 else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2))
1546 ts2 = BLOCK_SUPERCONTEXT (ts2);
1547 else
1548 {
1549 ts1 = BLOCK_SUPERCONTEXT (ts1);
1550 ts2 = BLOCK_SUPERCONTEXT (ts2);
1551 }
1552 }
1553 com = ts1;
1554
1555 /* Close scopes. */
1556 s = s1;
1557 while (s != com)
1558 {
1559 rtx note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1560 NOTE_BLOCK (note) = s;
1561 s = BLOCK_SUPERCONTEXT (s);
1562 }
1563
1564 /* Open scopes. */
1565 s = s2;
1566 while (s != com)
1567 {
1568 insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn);
1569 NOTE_BLOCK (insn) = s;
1570 s = BLOCK_SUPERCONTEXT (s);
1571 }
1572 }
1573
1574 /* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based
1575 on the scope tree and the newly reordered instructions. */
1576
1577 static void
1578 reemit_insn_block_notes (void)
1579 {
1580 tree cur_block = DECL_INITIAL (cfun->decl);
1581 rtx insn, note;
1582
1583 insn = get_insns ();
1584 if (!active_insn_p (insn))
1585 insn = next_active_insn (insn);
1586 for (; insn; insn = next_active_insn (insn))
1587 {
1588 tree this_block;
1589
1590 /* Avoid putting scope notes between jump table and its label. */
1591 if (JUMP_TABLE_DATA_P (insn))
1592 continue;
1593
1594 this_block = insn_scope (insn);
1595 /* For sequences compute scope resulting from merging all scopes
1596 of instructions nested inside. */
1597 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
1598 {
1599 int i;
1600 rtx body = PATTERN (insn);
1601
1602 this_block = NULL;
1603 for (i = 0; i < XVECLEN (body, 0); i++)
1604 this_block = choose_inner_scope (this_block,
1605 insn_scope (XVECEXP (body, 0, i)));
1606 }
1607 if (! this_block)
1608 continue;
1609
1610 if (this_block != cur_block)
1611 {
1612 change_scope (insn, cur_block, this_block);
1613 cur_block = this_block;
1614 }
1615 }
1616
1617 /* change_scope emits before the insn, not after. */
1618 note = emit_note (NOTE_INSN_DELETED);
1619 change_scope (note, cur_block, DECL_INITIAL (cfun->decl));
1620 delete_insn (note);
1621
1622 reorder_blocks ();
1623 }
1624
1625 /* Output assembler code for the start of a function,
1626 and initialize some of the variables in this file
1627 for the new function. The label for the function and associated
1628 assembler pseudo-ops have already been output in `assemble_start_function'.
1629
1630 FIRST is the first insn of the rtl for the function being compiled.
1631 FILE is the file to write assembler code to.
1632 OPTIMIZE_P is nonzero if we should eliminate redundant
1633 test and compare insns. */
1634
1635 void
1636 final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file,
1637 int optimize_p ATTRIBUTE_UNUSED)
1638 {
1639 block_depth = 0;
1640
1641 this_is_asm_operands = 0;
1642
1643 last_filename = locator_file (prologue_locator);
1644 last_linenum = locator_line (prologue_locator);
1645 last_discriminator = discriminator = 0;
1646
1647 high_block_linenum = high_function_linenum = last_linenum;
1648
1649 if (!DECL_IGNORED_P (current_function_decl))
1650 debug_hooks->begin_prologue (last_linenum, last_filename);
1651
1652 if (!dwarf2_debug_info_emitted_p (current_function_decl))
1653 dwarf2out_begin_prologue (0, NULL);
1654
1655 #ifdef LEAF_REG_REMAP
1656 if (crtl->uses_only_leaf_regs)
1657 leaf_renumber_regs (first);
1658 #endif
1659
1660 /* The Sun386i and perhaps other machines don't work right
1661 if the profiling code comes after the prologue. */
1662 if (targetm.profile_before_prologue () && crtl->profile)
1663 profile_function (file);
1664
1665 /* If debugging, assign block numbers to all of the blocks in this
1666 function. */
1667 if (write_symbols)
1668 {
1669 reemit_insn_block_notes ();
1670 number_blocks (current_function_decl);
1671 /* We never actually put out begin/end notes for the top-level
1672 block in the function. But, conceptually, that block is
1673 always needed. */
1674 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1675 }
1676
1677 if (warn_frame_larger_than
1678 && get_frame_size () > frame_larger_than_size)
1679 {
1680 /* Issue a warning */
1681 warning (OPT_Wframe_larger_than_,
1682 "the frame size of %wd bytes is larger than %wd bytes",
1683 get_frame_size (), frame_larger_than_size);
1684 }
1685
1686 /* First output the function prologue: code to set up the stack frame. */
1687 targetm.asm_out.function_prologue (file, get_frame_size ());
1688
1689 /* If the machine represents the prologue as RTL, the profiling code must
1690 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1691 #ifdef HAVE_prologue
1692 if (! HAVE_prologue)
1693 #endif
1694 profile_after_prologue (file);
1695 }
1696
1697 static void
1698 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1699 {
1700 if (!targetm.profile_before_prologue () && crtl->profile)
1701 profile_function (file);
1702 }
1703
1704 static void
1705 profile_function (FILE *file ATTRIBUTE_UNUSED)
1706 {
1707 #ifndef NO_PROFILE_COUNTERS
1708 # define NO_PROFILE_COUNTERS 0
1709 #endif
1710 #ifdef ASM_OUTPUT_REG_PUSH
1711 rtx sval = NULL, chain = NULL;
1712
1713 if (cfun->returns_struct)
1714 sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl),
1715 true);
1716 if (cfun->static_chain_decl)
1717 chain = targetm.calls.static_chain (current_function_decl, true);
1718 #endif /* ASM_OUTPUT_REG_PUSH */
1719
1720 if (! NO_PROFILE_COUNTERS)
1721 {
1722 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1723 switch_to_section (data_section);
1724 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1725 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1726 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1727 }
1728
1729 switch_to_section (current_function_section ());
1730
1731 #ifdef ASM_OUTPUT_REG_PUSH
1732 if (sval && REG_P (sval))
1733 ASM_OUTPUT_REG_PUSH (file, REGNO (sval));
1734 if (chain && REG_P (chain))
1735 ASM_OUTPUT_REG_PUSH (file, REGNO (chain));
1736 #endif
1737
1738 FUNCTION_PROFILER (file, current_function_funcdef_no);
1739
1740 #ifdef ASM_OUTPUT_REG_PUSH
1741 if (chain && REG_P (chain))
1742 ASM_OUTPUT_REG_POP (file, REGNO (chain));
1743 if (sval && REG_P (sval))
1744 ASM_OUTPUT_REG_POP (file, REGNO (sval));
1745 #endif
1746 }
1747
1748 /* Output assembler code for the end of a function.
1749 For clarity, args are same as those of `final_start_function'
1750 even though not all of them are needed. */
1751
1752 void
1753 final_end_function (void)
1754 {
1755 app_disable ();
1756
1757 if (!DECL_IGNORED_P (current_function_decl))
1758 debug_hooks->end_function (high_function_linenum);
1759
1760 /* Finally, output the function epilogue:
1761 code to restore the stack frame and return to the caller. */
1762 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1763
1764 /* And debug output. */
1765 if (!DECL_IGNORED_P (current_function_decl))
1766 debug_hooks->end_epilogue (last_linenum, last_filename);
1767
1768 if (!dwarf2_debug_info_emitted_p (current_function_decl)
1769 && dwarf2out_do_frame ())
1770 dwarf2out_end_epilogue (last_linenum, last_filename);
1771 }
1772 \f
1773
1774 /* Dumper helper for basic block information. FILE is the assembly
1775 output file, and INSN is the instruction being emitted. */
1776
1777 static void
1778 dump_basic_block_info (FILE *file, rtx insn, basic_block *start_to_bb,
1779 basic_block *end_to_bb, int bb_map_size, int *bb_seqn)
1780 {
1781 basic_block bb;
1782
1783 if (!flag_debug_asm)
1784 return;
1785
1786 if (INSN_UID (insn) < bb_map_size
1787 && (bb = start_to_bb[INSN_UID (insn)]) != NULL)
1788 {
1789 edge e;
1790 edge_iterator ei;
1791
1792 fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index);
1793 if (bb->frequency)
1794 fprintf (file, " freq:%d", bb->frequency);
1795 if (bb->count)
1796 fprintf (file, " count:" HOST_WIDEST_INT_PRINT_DEC,
1797 bb->count);
1798 fprintf (file, " seq:%d", (*bb_seqn)++);
1799 fprintf (file, "\n%s PRED:", ASM_COMMENT_START);
1800 FOR_EACH_EDGE (e, ei, bb->preds)
1801 {
1802 dump_edge_info (file, e, 0);
1803 }
1804 fprintf (file, "\n");
1805 }
1806 if (INSN_UID (insn) < bb_map_size
1807 && (bb = end_to_bb[INSN_UID (insn)]) != NULL)
1808 {
1809 edge e;
1810 edge_iterator ei;
1811
1812 fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START);
1813 FOR_EACH_EDGE (e, ei, bb->succs)
1814 {
1815 dump_edge_info (asm_out_file, e, 1);
1816 }
1817 fprintf (file, "\n");
1818 }
1819 }
1820
1821 /* Output assembler code for some insns: all or part of a function.
1822 For description of args, see `final_start_function', above. */
1823
1824 void
1825 final (rtx first, FILE *file, int optimize_p)
1826 {
1827 rtx insn, next;
1828 int max_uid = 0;
1829 int seen = 0;
1830
1831 /* Used for -dA dump. */
1832 basic_block *start_to_bb = NULL;
1833 basic_block *end_to_bb = NULL;
1834 int bb_map_size = 0;
1835 int bb_seqn = 0;
1836
1837 last_ignored_compare = 0;
1838
1839 for (insn = first; insn; insn = NEXT_INSN (insn))
1840 {
1841 if (INSN_UID (insn) > max_uid) /* Find largest UID. */
1842 max_uid = INSN_UID (insn);
1843 #ifdef HAVE_cc0
1844 /* If CC tracking across branches is enabled, record the insn which
1845 jumps to each branch only reached from one place. */
1846 if (optimize_p && JUMP_P (insn))
1847 {
1848 rtx lab = JUMP_LABEL (insn);
1849 if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1)
1850 {
1851 LABEL_REFS (lab) = insn;
1852 }
1853 }
1854 #endif
1855 }
1856
1857 init_recog ();
1858
1859 CC_STATUS_INIT;
1860
1861 if (flag_debug_asm)
1862 {
1863 basic_block bb;
1864
1865 bb_map_size = get_max_uid () + 1;
1866 start_to_bb = XCNEWVEC (basic_block, bb_map_size);
1867 end_to_bb = XCNEWVEC (basic_block, bb_map_size);
1868
1869 FOR_EACH_BB_REVERSE (bb)
1870 {
1871 start_to_bb[INSN_UID (BB_HEAD (bb))] = bb;
1872 end_to_bb[INSN_UID (BB_END (bb))] = bb;
1873 }
1874 }
1875
1876 /* Output the insns. */
1877 for (insn = first; insn;)
1878 {
1879 #ifdef HAVE_ATTR_length
1880 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1881 {
1882 /* This can be triggered by bugs elsewhere in the compiler if
1883 new insns are created after init_insn_lengths is called. */
1884 gcc_assert (NOTE_P (insn));
1885 insn_current_address = -1;
1886 }
1887 else
1888 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1889 #endif /* HAVE_ATTR_length */
1890
1891 dump_basic_block_info (file, insn, start_to_bb, end_to_bb,
1892 bb_map_size, &bb_seqn);
1893 insn = final_scan_insn (insn, file, optimize_p, 0, &seen);
1894 }
1895
1896 if (flag_debug_asm)
1897 {
1898 free (start_to_bb);
1899 free (end_to_bb);
1900 }
1901
1902 /* Remove CFI notes, to avoid compare-debug failures. */
1903 for (insn = first; insn; insn = next)
1904 {
1905 next = NEXT_INSN (insn);
1906 if (NOTE_P (insn)
1907 && (NOTE_KIND (insn) == NOTE_INSN_CFI
1908 || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL))
1909 delete_insn (insn);
1910 }
1911 }
1912 \f
1913 const char *
1914 get_insn_template (int code, rtx insn)
1915 {
1916 switch (insn_data[code].output_format)
1917 {
1918 case INSN_OUTPUT_FORMAT_SINGLE:
1919 return insn_data[code].output.single;
1920 case INSN_OUTPUT_FORMAT_MULTI:
1921 return insn_data[code].output.multi[which_alternative];
1922 case INSN_OUTPUT_FORMAT_FUNCTION:
1923 gcc_assert (insn);
1924 return (*insn_data[code].output.function) (recog_data.operand, insn);
1925
1926 default:
1927 gcc_unreachable ();
1928 }
1929 }
1930
1931 /* Emit the appropriate declaration for an alternate-entry-point
1932 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1933 LABEL_KIND != LABEL_NORMAL.
1934
1935 The case fall-through in this function is intentional. */
1936 static void
1937 output_alternate_entry_point (FILE *file, rtx insn)
1938 {
1939 const char *name = LABEL_NAME (insn);
1940
1941 switch (LABEL_KIND (insn))
1942 {
1943 case LABEL_WEAK_ENTRY:
1944 #ifdef ASM_WEAKEN_LABEL
1945 ASM_WEAKEN_LABEL (file, name);
1946 #endif
1947 case LABEL_GLOBAL_ENTRY:
1948 targetm.asm_out.globalize_label (file, name);
1949 case LABEL_STATIC_ENTRY:
1950 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1951 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
1952 #endif
1953 ASM_OUTPUT_LABEL (file, name);
1954 break;
1955
1956 case LABEL_NORMAL:
1957 default:
1958 gcc_unreachable ();
1959 }
1960 }
1961
1962 /* Given a CALL_INSN, find and return the nested CALL. */
1963 static rtx
1964 call_from_call_insn (rtx insn)
1965 {
1966 rtx x;
1967 gcc_assert (CALL_P (insn));
1968 x = PATTERN (insn);
1969
1970 while (GET_CODE (x) != CALL)
1971 {
1972 switch (GET_CODE (x))
1973 {
1974 default:
1975 gcc_unreachable ();
1976 case COND_EXEC:
1977 x = COND_EXEC_CODE (x);
1978 break;
1979 case PARALLEL:
1980 x = XVECEXP (x, 0, 0);
1981 break;
1982 case SET:
1983 x = XEXP (x, 1);
1984 break;
1985 }
1986 }
1987 return x;
1988 }
1989
1990 /* The final scan for one insn, INSN.
1991 Args are same as in `final', except that INSN
1992 is the insn being scanned.
1993 Value returned is the next insn to be scanned.
1994
1995 NOPEEPHOLES is the flag to disallow peephole processing (currently
1996 used for within delayed branch sequence output).
1997
1998 SEEN is used to track the end of the prologue, for emitting
1999 debug information. We force the emission of a line note after
2000 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
2001 at the beginning of the second basic block, whichever comes
2002 first. */
2003
2004 rtx
2005 final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
2006 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
2007 {
2008 #ifdef HAVE_cc0
2009 rtx set;
2010 #endif
2011 rtx next;
2012
2013 insn_counter++;
2014
2015 /* Ignore deleted insns. These can occur when we split insns (due to a
2016 template of "#") while not optimizing. */
2017 if (INSN_DELETED_P (insn))
2018 return NEXT_INSN (insn);
2019
2020 switch (GET_CODE (insn))
2021 {
2022 case NOTE:
2023 switch (NOTE_KIND (insn))
2024 {
2025 case NOTE_INSN_DELETED:
2026 break;
2027
2028 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
2029 in_cold_section_p = !in_cold_section_p;
2030
2031 if (dwarf2out_do_frame ())
2032 dwarf2out_switch_text_section ();
2033 else if (!DECL_IGNORED_P (current_function_decl))
2034 debug_hooks->switch_text_section ();
2035
2036 switch_to_section (current_function_section ());
2037 targetm.asm_out.function_switched_text_sections (asm_out_file,
2038 current_function_decl,
2039 in_cold_section_p);
2040 break;
2041
2042 case NOTE_INSN_BASIC_BLOCK:
2043 if (targetm.asm_out.unwind_emit)
2044 targetm.asm_out.unwind_emit (asm_out_file, insn);
2045
2046 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB)
2047 {
2048 *seen |= SEEN_EMITTED;
2049 force_source_line = true;
2050 }
2051 else
2052 *seen |= SEEN_BB;
2053
2054 discriminator = NOTE_BASIC_BLOCK (insn)->discriminator;
2055
2056 break;
2057
2058 case NOTE_INSN_EH_REGION_BEG:
2059 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
2060 NOTE_EH_HANDLER (insn));
2061 break;
2062
2063 case NOTE_INSN_EH_REGION_END:
2064 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
2065 NOTE_EH_HANDLER (insn));
2066 break;
2067
2068 case NOTE_INSN_PROLOGUE_END:
2069 targetm.asm_out.function_end_prologue (file);
2070 profile_after_prologue (file);
2071
2072 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2073 {
2074 *seen |= SEEN_EMITTED;
2075 force_source_line = true;
2076 }
2077 else
2078 *seen |= SEEN_NOTE;
2079
2080 break;
2081
2082 case NOTE_INSN_EPILOGUE_BEG:
2083 if (!DECL_IGNORED_P (current_function_decl))
2084 (*debug_hooks->begin_epilogue) (last_linenum, last_filename);
2085 targetm.asm_out.function_begin_epilogue (file);
2086 break;
2087
2088 case NOTE_INSN_CFI:
2089 dwarf2out_emit_cfi (NOTE_CFI (insn));
2090 break;
2091
2092 case NOTE_INSN_CFI_LABEL:
2093 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI",
2094 NOTE_LABEL_NUMBER (insn));
2095 break;
2096
2097 case NOTE_INSN_FUNCTION_BEG:
2098 app_disable ();
2099 if (!DECL_IGNORED_P (current_function_decl))
2100 debug_hooks->end_prologue (last_linenum, last_filename);
2101
2102 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2103 {
2104 *seen |= SEEN_EMITTED;
2105 force_source_line = true;
2106 }
2107 else
2108 *seen |= SEEN_NOTE;
2109
2110 break;
2111
2112 case NOTE_INSN_BLOCK_BEG:
2113 if (debug_info_level == DINFO_LEVEL_NORMAL
2114 || debug_info_level == DINFO_LEVEL_VERBOSE
2115 || write_symbols == DWARF2_DEBUG
2116 || write_symbols == VMS_AND_DWARF2_DEBUG
2117 || write_symbols == VMS_DEBUG)
2118 {
2119 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2120
2121 app_disable ();
2122 ++block_depth;
2123 high_block_linenum = last_linenum;
2124
2125 /* Output debugging info about the symbol-block beginning. */
2126 if (!DECL_IGNORED_P (current_function_decl))
2127 debug_hooks->begin_block (last_linenum, n);
2128
2129 /* Mark this block as output. */
2130 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
2131 }
2132 if (write_symbols == DBX_DEBUG
2133 || write_symbols == SDB_DEBUG)
2134 {
2135 location_t *locus_ptr
2136 = block_nonartificial_location (NOTE_BLOCK (insn));
2137
2138 if (locus_ptr != NULL)
2139 {
2140 override_filename = LOCATION_FILE (*locus_ptr);
2141 override_linenum = LOCATION_LINE (*locus_ptr);
2142 }
2143 }
2144 break;
2145
2146 case NOTE_INSN_BLOCK_END:
2147 if (debug_info_level == DINFO_LEVEL_NORMAL
2148 || debug_info_level == DINFO_LEVEL_VERBOSE
2149 || write_symbols == DWARF2_DEBUG
2150 || write_symbols == VMS_AND_DWARF2_DEBUG
2151 || write_symbols == VMS_DEBUG)
2152 {
2153 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2154
2155 app_disable ();
2156
2157 /* End of a symbol-block. */
2158 --block_depth;
2159 gcc_assert (block_depth >= 0);
2160
2161 if (!DECL_IGNORED_P (current_function_decl))
2162 debug_hooks->end_block (high_block_linenum, n);
2163 }
2164 if (write_symbols == DBX_DEBUG
2165 || write_symbols == SDB_DEBUG)
2166 {
2167 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
2168 location_t *locus_ptr
2169 = block_nonartificial_location (outer_block);
2170
2171 if (locus_ptr != NULL)
2172 {
2173 override_filename = LOCATION_FILE (*locus_ptr);
2174 override_linenum = LOCATION_LINE (*locus_ptr);
2175 }
2176 else
2177 {
2178 override_filename = NULL;
2179 override_linenum = 0;
2180 }
2181 }
2182 break;
2183
2184 case NOTE_INSN_DELETED_LABEL:
2185 /* Emit the label. We may have deleted the CODE_LABEL because
2186 the label could be proved to be unreachable, though still
2187 referenced (in the form of having its address taken. */
2188 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2189 break;
2190
2191 case NOTE_INSN_DELETED_DEBUG_LABEL:
2192 /* Similarly, but need to use different namespace for it. */
2193 if (CODE_LABEL_NUMBER (insn) != -1)
2194 ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn));
2195 break;
2196
2197 case NOTE_INSN_VAR_LOCATION:
2198 case NOTE_INSN_CALL_ARG_LOCATION:
2199 if (!DECL_IGNORED_P (current_function_decl))
2200 debug_hooks->var_location (insn);
2201 break;
2202
2203 default:
2204 gcc_unreachable ();
2205 break;
2206 }
2207 break;
2208
2209 case BARRIER:
2210 break;
2211
2212 case CODE_LABEL:
2213 /* The target port might emit labels in the output function for
2214 some insn, e.g. sh.c output_branchy_insn. */
2215 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2216 {
2217 int align = LABEL_TO_ALIGNMENT (insn);
2218 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2219 int max_skip = LABEL_TO_MAX_SKIP (insn);
2220 #endif
2221
2222 if (align && NEXT_INSN (insn))
2223 {
2224 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2225 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2226 #else
2227 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2228 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
2229 #else
2230 ASM_OUTPUT_ALIGN (file, align);
2231 #endif
2232 #endif
2233 }
2234 }
2235 CC_STATUS_INIT;
2236
2237 if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn))
2238 debug_hooks->label (insn);
2239
2240 app_disable ();
2241
2242 next = next_nonnote_insn (insn);
2243 /* If this label is followed by a jump-table, make sure we put
2244 the label in the read-only section. Also possibly write the
2245 label and jump table together. */
2246 if (next != 0 && JUMP_TABLE_DATA_P (next))
2247 {
2248 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2249 /* In this case, the case vector is being moved by the
2250 target, so don't output the label at all. Leave that
2251 to the back end macros. */
2252 #else
2253 if (! JUMP_TABLES_IN_TEXT_SECTION)
2254 {
2255 int log_align;
2256
2257 switch_to_section (targetm.asm_out.function_rodata_section
2258 (current_function_decl));
2259
2260 #ifdef ADDR_VEC_ALIGN
2261 log_align = ADDR_VEC_ALIGN (next);
2262 #else
2263 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2264 #endif
2265 ASM_OUTPUT_ALIGN (file, log_align);
2266 }
2267 else
2268 switch_to_section (current_function_section ());
2269
2270 #ifdef ASM_OUTPUT_CASE_LABEL
2271 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2272 next);
2273 #else
2274 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2275 #endif
2276 #endif
2277 break;
2278 }
2279 if (LABEL_ALT_ENTRY_P (insn))
2280 output_alternate_entry_point (file, insn);
2281 else
2282 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2283 break;
2284
2285 default:
2286 {
2287 rtx body = PATTERN (insn);
2288 int insn_code_number;
2289 const char *templ;
2290 bool is_stmt;
2291
2292 /* Reset this early so it is correct for ASM statements. */
2293 current_insn_predicate = NULL_RTX;
2294
2295 /* An INSN, JUMP_INSN or CALL_INSN.
2296 First check for special kinds that recog doesn't recognize. */
2297
2298 if (GET_CODE (body) == USE /* These are just declarations. */
2299 || GET_CODE (body) == CLOBBER)
2300 break;
2301
2302 #ifdef HAVE_cc0
2303 {
2304 /* If there is a REG_CC_SETTER note on this insn, it means that
2305 the setting of the condition code was done in the delay slot
2306 of the insn that branched here. So recover the cc status
2307 from the insn that set it. */
2308
2309 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2310 if (note)
2311 {
2312 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2313 cc_prev_status = cc_status;
2314 }
2315 }
2316 #endif
2317
2318 /* Detect insns that are really jump-tables
2319 and output them as such. */
2320
2321 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2322 {
2323 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2324 int vlen, idx;
2325 #endif
2326
2327 if (! JUMP_TABLES_IN_TEXT_SECTION)
2328 switch_to_section (targetm.asm_out.function_rodata_section
2329 (current_function_decl));
2330 else
2331 switch_to_section (current_function_section ());
2332
2333 app_disable ();
2334
2335 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2336 if (GET_CODE (body) == ADDR_VEC)
2337 {
2338 #ifdef ASM_OUTPUT_ADDR_VEC
2339 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2340 #else
2341 gcc_unreachable ();
2342 #endif
2343 }
2344 else
2345 {
2346 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2347 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2348 #else
2349 gcc_unreachable ();
2350 #endif
2351 }
2352 #else
2353 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2354 for (idx = 0; idx < vlen; idx++)
2355 {
2356 if (GET_CODE (body) == ADDR_VEC)
2357 {
2358 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2359 ASM_OUTPUT_ADDR_VEC_ELT
2360 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2361 #else
2362 gcc_unreachable ();
2363 #endif
2364 }
2365 else
2366 {
2367 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2368 ASM_OUTPUT_ADDR_DIFF_ELT
2369 (file,
2370 body,
2371 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2372 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2373 #else
2374 gcc_unreachable ();
2375 #endif
2376 }
2377 }
2378 #ifdef ASM_OUTPUT_CASE_END
2379 ASM_OUTPUT_CASE_END (file,
2380 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2381 insn);
2382 #endif
2383 #endif
2384
2385 switch_to_section (current_function_section ());
2386
2387 break;
2388 }
2389 /* Output this line note if it is the first or the last line
2390 note in a row. */
2391 if (!DECL_IGNORED_P (current_function_decl)
2392 && notice_source_line (insn, &is_stmt))
2393 (*debug_hooks->source_line) (last_linenum, last_filename,
2394 last_discriminator, is_stmt);
2395
2396 if (GET_CODE (body) == ASM_INPUT)
2397 {
2398 const char *string = XSTR (body, 0);
2399
2400 /* There's no telling what that did to the condition codes. */
2401 CC_STATUS_INIT;
2402
2403 if (string[0])
2404 {
2405 expanded_location loc;
2406
2407 app_enable ();
2408 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
2409 if (*loc.file && loc.line)
2410 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2411 ASM_COMMENT_START, loc.line, loc.file);
2412 fprintf (asm_out_file, "\t%s\n", string);
2413 #if HAVE_AS_LINE_ZERO
2414 if (*loc.file && loc.line)
2415 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2416 #endif
2417 }
2418 break;
2419 }
2420
2421 /* Detect `asm' construct with operands. */
2422 if (asm_noperands (body) >= 0)
2423 {
2424 unsigned int noperands = asm_noperands (body);
2425 rtx *ops = XALLOCAVEC (rtx, noperands);
2426 const char *string;
2427 location_t loc;
2428 expanded_location expanded;
2429
2430 /* There's no telling what that did to the condition codes. */
2431 CC_STATUS_INIT;
2432
2433 /* Get out the operand values. */
2434 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
2435 /* Inhibit dying on what would otherwise be compiler bugs. */
2436 insn_noperands = noperands;
2437 this_is_asm_operands = insn;
2438 expanded = expand_location (loc);
2439
2440 #ifdef FINAL_PRESCAN_INSN
2441 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2442 #endif
2443
2444 /* Output the insn using them. */
2445 if (string[0])
2446 {
2447 app_enable ();
2448 if (expanded.file && expanded.line)
2449 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2450 ASM_COMMENT_START, expanded.line, expanded.file);
2451 output_asm_insn (string, ops);
2452 #if HAVE_AS_LINE_ZERO
2453 if (expanded.file && expanded.line)
2454 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2455 #endif
2456 }
2457
2458 if (targetm.asm_out.final_postscan_insn)
2459 targetm.asm_out.final_postscan_insn (file, insn, ops,
2460 insn_noperands);
2461
2462 this_is_asm_operands = 0;
2463 break;
2464 }
2465
2466 app_disable ();
2467
2468 if (GET_CODE (body) == SEQUENCE)
2469 {
2470 /* A delayed-branch sequence */
2471 int i;
2472
2473 final_sequence = body;
2474
2475 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2476 force the restoration of a comparison that was previously
2477 thought unnecessary. If that happens, cancel this sequence
2478 and cause that insn to be restored. */
2479
2480 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen);
2481 if (next != XVECEXP (body, 0, 1))
2482 {
2483 final_sequence = 0;
2484 return next;
2485 }
2486
2487 for (i = 1; i < XVECLEN (body, 0); i++)
2488 {
2489 rtx insn = XVECEXP (body, 0, i);
2490 rtx next = NEXT_INSN (insn);
2491 /* We loop in case any instruction in a delay slot gets
2492 split. */
2493 do
2494 insn = final_scan_insn (insn, file, 0, 1, seen);
2495 while (insn != next);
2496 }
2497 #ifdef DBR_OUTPUT_SEQEND
2498 DBR_OUTPUT_SEQEND (file);
2499 #endif
2500 final_sequence = 0;
2501
2502 /* If the insn requiring the delay slot was a CALL_INSN, the
2503 insns in the delay slot are actually executed before the
2504 called function. Hence we don't preserve any CC-setting
2505 actions in these insns and the CC must be marked as being
2506 clobbered by the function. */
2507 if (CALL_P (XVECEXP (body, 0, 0)))
2508 {
2509 CC_STATUS_INIT;
2510 }
2511 break;
2512 }
2513
2514 /* We have a real machine instruction as rtl. */
2515
2516 body = PATTERN (insn);
2517
2518 #ifdef HAVE_cc0
2519 set = single_set (insn);
2520
2521 /* Check for redundant test and compare instructions
2522 (when the condition codes are already set up as desired).
2523 This is done only when optimizing; if not optimizing,
2524 it should be possible for the user to alter a variable
2525 with the debugger in between statements
2526 and the next statement should reexamine the variable
2527 to compute the condition codes. */
2528
2529 if (optimize_p)
2530 {
2531 if (set
2532 && GET_CODE (SET_DEST (set)) == CC0
2533 && insn != last_ignored_compare)
2534 {
2535 rtx src1, src2;
2536 if (GET_CODE (SET_SRC (set)) == SUBREG)
2537 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2538
2539 src1 = SET_SRC (set);
2540 src2 = NULL_RTX;
2541 if (GET_CODE (SET_SRC (set)) == COMPARE)
2542 {
2543 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2544 XEXP (SET_SRC (set), 0)
2545 = alter_subreg (&XEXP (SET_SRC (set), 0));
2546 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2547 XEXP (SET_SRC (set), 1)
2548 = alter_subreg (&XEXP (SET_SRC (set), 1));
2549 if (XEXP (SET_SRC (set), 1)
2550 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0))))
2551 src2 = XEXP (SET_SRC (set), 0);
2552 }
2553 if ((cc_status.value1 != 0
2554 && rtx_equal_p (src1, cc_status.value1))
2555 || (cc_status.value2 != 0
2556 && rtx_equal_p (src1, cc_status.value2))
2557 || (src2 != 0 && cc_status.value1 != 0
2558 && rtx_equal_p (src2, cc_status.value1))
2559 || (src2 != 0 && cc_status.value2 != 0
2560 && rtx_equal_p (src2, cc_status.value2)))
2561 {
2562 /* Don't delete insn if it has an addressing side-effect. */
2563 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2564 /* or if anything in it is volatile. */
2565 && ! volatile_refs_p (PATTERN (insn)))
2566 {
2567 /* We don't really delete the insn; just ignore it. */
2568 last_ignored_compare = insn;
2569 break;
2570 }
2571 }
2572 }
2573 }
2574
2575 /* If this is a conditional branch, maybe modify it
2576 if the cc's are in a nonstandard state
2577 so that it accomplishes the same thing that it would
2578 do straightforwardly if the cc's were set up normally. */
2579
2580 if (cc_status.flags != 0
2581 && JUMP_P (insn)
2582 && GET_CODE (body) == SET
2583 && SET_DEST (body) == pc_rtx
2584 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2585 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2586 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2587 {
2588 /* This function may alter the contents of its argument
2589 and clear some of the cc_status.flags bits.
2590 It may also return 1 meaning condition now always true
2591 or -1 meaning condition now always false
2592 or 2 meaning condition nontrivial but altered. */
2593 int result = alter_cond (XEXP (SET_SRC (body), 0));
2594 /* If condition now has fixed value, replace the IF_THEN_ELSE
2595 with its then-operand or its else-operand. */
2596 if (result == 1)
2597 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2598 if (result == -1)
2599 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2600
2601 /* The jump is now either unconditional or a no-op.
2602 If it has become a no-op, don't try to output it.
2603 (It would not be recognized.) */
2604 if (SET_SRC (body) == pc_rtx)
2605 {
2606 delete_insn (insn);
2607 break;
2608 }
2609 else if (ANY_RETURN_P (SET_SRC (body)))
2610 /* Replace (set (pc) (return)) with (return). */
2611 PATTERN (insn) = body = SET_SRC (body);
2612
2613 /* Rerecognize the instruction if it has changed. */
2614 if (result != 0)
2615 INSN_CODE (insn) = -1;
2616 }
2617
2618 /* If this is a conditional trap, maybe modify it if the cc's
2619 are in a nonstandard state so that it accomplishes the same
2620 thing that it would do straightforwardly if the cc's were
2621 set up normally. */
2622 if (cc_status.flags != 0
2623 && NONJUMP_INSN_P (insn)
2624 && GET_CODE (body) == TRAP_IF
2625 && COMPARISON_P (TRAP_CONDITION (body))
2626 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2627 {
2628 /* This function may alter the contents of its argument
2629 and clear some of the cc_status.flags bits.
2630 It may also return 1 meaning condition now always true
2631 or -1 meaning condition now always false
2632 or 2 meaning condition nontrivial but altered. */
2633 int result = alter_cond (TRAP_CONDITION (body));
2634
2635 /* If TRAP_CONDITION has become always false, delete the
2636 instruction. */
2637 if (result == -1)
2638 {
2639 delete_insn (insn);
2640 break;
2641 }
2642
2643 /* If TRAP_CONDITION has become always true, replace
2644 TRAP_CONDITION with const_true_rtx. */
2645 if (result == 1)
2646 TRAP_CONDITION (body) = const_true_rtx;
2647
2648 /* Rerecognize the instruction if it has changed. */
2649 if (result != 0)
2650 INSN_CODE (insn) = -1;
2651 }
2652
2653 /* Make same adjustments to instructions that examine the
2654 condition codes without jumping and instructions that
2655 handle conditional moves (if this machine has either one). */
2656
2657 if (cc_status.flags != 0
2658 && set != 0)
2659 {
2660 rtx cond_rtx, then_rtx, else_rtx;
2661
2662 if (!JUMP_P (insn)
2663 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2664 {
2665 cond_rtx = XEXP (SET_SRC (set), 0);
2666 then_rtx = XEXP (SET_SRC (set), 1);
2667 else_rtx = XEXP (SET_SRC (set), 2);
2668 }
2669 else
2670 {
2671 cond_rtx = SET_SRC (set);
2672 then_rtx = const_true_rtx;
2673 else_rtx = const0_rtx;
2674 }
2675
2676 switch (GET_CODE (cond_rtx))
2677 {
2678 case GTU:
2679 case GT:
2680 case LTU:
2681 case LT:
2682 case GEU:
2683 case GE:
2684 case LEU:
2685 case LE:
2686 case EQ:
2687 case NE:
2688 {
2689 int result;
2690 if (XEXP (cond_rtx, 0) != cc0_rtx)
2691 break;
2692 result = alter_cond (cond_rtx);
2693 if (result == 1)
2694 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2695 else if (result == -1)
2696 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2697 else if (result == 2)
2698 INSN_CODE (insn) = -1;
2699 if (SET_DEST (set) == SET_SRC (set))
2700 delete_insn (insn);
2701 }
2702 break;
2703
2704 default:
2705 break;
2706 }
2707 }
2708
2709 #endif
2710
2711 #ifdef HAVE_peephole
2712 /* Do machine-specific peephole optimizations if desired. */
2713
2714 if (optimize_p && !flag_no_peephole && !nopeepholes)
2715 {
2716 rtx next = peephole (insn);
2717 /* When peepholing, if there were notes within the peephole,
2718 emit them before the peephole. */
2719 if (next != 0 && next != NEXT_INSN (insn))
2720 {
2721 rtx note, prev = PREV_INSN (insn);
2722
2723 for (note = NEXT_INSN (insn); note != next;
2724 note = NEXT_INSN (note))
2725 final_scan_insn (note, file, optimize_p, nopeepholes, seen);
2726
2727 /* Put the notes in the proper position for a later
2728 rescan. For example, the SH target can do this
2729 when generating a far jump in a delayed branch
2730 sequence. */
2731 note = NEXT_INSN (insn);
2732 PREV_INSN (note) = prev;
2733 NEXT_INSN (prev) = note;
2734 NEXT_INSN (PREV_INSN (next)) = insn;
2735 PREV_INSN (insn) = PREV_INSN (next);
2736 NEXT_INSN (insn) = next;
2737 PREV_INSN (next) = insn;
2738 }
2739
2740 /* PEEPHOLE might have changed this. */
2741 body = PATTERN (insn);
2742 }
2743 #endif
2744
2745 /* Try to recognize the instruction.
2746 If successful, verify that the operands satisfy the
2747 constraints for the instruction. Crash if they don't,
2748 since `reload' should have changed them so that they do. */
2749
2750 insn_code_number = recog_memoized (insn);
2751 cleanup_subreg_operands (insn);
2752
2753 /* Dump the insn in the assembly for debugging. */
2754 if (flag_dump_rtl_in_asm)
2755 {
2756 print_rtx_head = ASM_COMMENT_START;
2757 print_rtl_single (asm_out_file, insn);
2758 print_rtx_head = "";
2759 }
2760
2761 if (! constrain_operands_cached (1))
2762 fatal_insn_not_found (insn);
2763
2764 /* Some target machines need to prescan each insn before
2765 it is output. */
2766
2767 #ifdef FINAL_PRESCAN_INSN
2768 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2769 #endif
2770
2771 if (targetm.have_conditional_execution ()
2772 && GET_CODE (PATTERN (insn)) == COND_EXEC)
2773 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2774
2775 #ifdef HAVE_cc0
2776 cc_prev_status = cc_status;
2777
2778 /* Update `cc_status' for this instruction.
2779 The instruction's output routine may change it further.
2780 If the output routine for a jump insn needs to depend
2781 on the cc status, it should look at cc_prev_status. */
2782
2783 NOTICE_UPDATE_CC (body, insn);
2784 #endif
2785
2786 current_output_insn = debug_insn = insn;
2787
2788 /* Find the proper template for this insn. */
2789 templ = get_insn_template (insn_code_number, insn);
2790
2791 /* If the C code returns 0, it means that it is a jump insn
2792 which follows a deleted test insn, and that test insn
2793 needs to be reinserted. */
2794 if (templ == 0)
2795 {
2796 rtx prev;
2797
2798 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
2799
2800 /* We have already processed the notes between the setter and
2801 the user. Make sure we don't process them again, this is
2802 particularly important if one of the notes is a block
2803 scope note or an EH note. */
2804 for (prev = insn;
2805 prev != last_ignored_compare;
2806 prev = PREV_INSN (prev))
2807 {
2808 if (NOTE_P (prev))
2809 delete_insn (prev); /* Use delete_note. */
2810 }
2811
2812 return prev;
2813 }
2814
2815 /* If the template is the string "#", it means that this insn must
2816 be split. */
2817 if (templ[0] == '#' && templ[1] == '\0')
2818 {
2819 rtx new_rtx = try_split (body, insn, 0);
2820
2821 /* If we didn't split the insn, go away. */
2822 if (new_rtx == insn && PATTERN (new_rtx) == body)
2823 fatal_insn ("could not split insn", insn);
2824
2825 #ifdef HAVE_ATTR_length
2826 /* This instruction should have been split in shorten_branches,
2827 to ensure that we would have valid length info for the
2828 splitees. */
2829 gcc_unreachable ();
2830 #endif
2831
2832 return new_rtx;
2833 }
2834
2835 /* ??? This will put the directives in the wrong place if
2836 get_insn_template outputs assembly directly. However calling it
2837 before get_insn_template breaks if the insns is split. */
2838 if (targetm.asm_out.unwind_emit_before_insn
2839 && targetm.asm_out.unwind_emit)
2840 targetm.asm_out.unwind_emit (asm_out_file, insn);
2841
2842 if (CALL_P (insn))
2843 {
2844 rtx x = call_from_call_insn (insn);
2845 x = XEXP (x, 0);
2846 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
2847 {
2848 tree t;
2849 x = XEXP (x, 0);
2850 t = SYMBOL_REF_DECL (x);
2851 if (t)
2852 assemble_external (t);
2853 }
2854 if (!DECL_IGNORED_P (current_function_decl))
2855 debug_hooks->var_location (insn);
2856 }
2857
2858 /* Output assembler code from the template. */
2859 output_asm_insn (templ, recog_data.operand);
2860
2861 /* Some target machines need to postscan each insn after
2862 it is output. */
2863 if (targetm.asm_out.final_postscan_insn)
2864 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand,
2865 recog_data.n_operands);
2866
2867 if (!targetm.asm_out.unwind_emit_before_insn
2868 && targetm.asm_out.unwind_emit)
2869 targetm.asm_out.unwind_emit (asm_out_file, insn);
2870
2871 current_output_insn = debug_insn = 0;
2872 }
2873 }
2874 return NEXT_INSN (insn);
2875 }
2876 \f
2877 /* Return whether a source line note needs to be emitted before INSN.
2878 Sets IS_STMT to TRUE if the line should be marked as a possible
2879 breakpoint location. */
2880
2881 static bool
2882 notice_source_line (rtx insn, bool *is_stmt)
2883 {
2884 const char *filename;
2885 int linenum;
2886
2887 if (override_filename)
2888 {
2889 filename = override_filename;
2890 linenum = override_linenum;
2891 }
2892 else
2893 {
2894 filename = insn_file (insn);
2895 linenum = insn_line (insn);
2896 }
2897
2898 if (filename == NULL)
2899 return false;
2900
2901 if (force_source_line
2902 || filename != last_filename
2903 || last_linenum != linenum)
2904 {
2905 force_source_line = false;
2906 last_filename = filename;
2907 last_linenum = linenum;
2908 last_discriminator = discriminator;
2909 *is_stmt = true;
2910 high_block_linenum = MAX (last_linenum, high_block_linenum);
2911 high_function_linenum = MAX (last_linenum, high_function_linenum);
2912 return true;
2913 }
2914
2915 if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator)
2916 {
2917 /* If the discriminator changed, but the line number did not,
2918 output the line table entry with is_stmt false so the
2919 debugger does not treat this as a breakpoint location. */
2920 last_discriminator = discriminator;
2921 *is_stmt = false;
2922 return true;
2923 }
2924
2925 return false;
2926 }
2927 \f
2928 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2929 directly to the desired hard register. */
2930
2931 void
2932 cleanup_subreg_operands (rtx insn)
2933 {
2934 int i;
2935 bool changed = false;
2936 extract_insn_cached (insn);
2937 for (i = 0; i < recog_data.n_operands; i++)
2938 {
2939 /* The following test cannot use recog_data.operand when testing
2940 for a SUBREG: the underlying object might have been changed
2941 already if we are inside a match_operator expression that
2942 matches the else clause. Instead we test the underlying
2943 expression directly. */
2944 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2945 {
2946 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2947 changed = true;
2948 }
2949 else if (GET_CODE (recog_data.operand[i]) == PLUS
2950 || GET_CODE (recog_data.operand[i]) == MULT
2951 || MEM_P (recog_data.operand[i]))
2952 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
2953 }
2954
2955 for (i = 0; i < recog_data.n_dups; i++)
2956 {
2957 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2958 {
2959 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]);
2960 changed = true;
2961 }
2962 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2963 || GET_CODE (*recog_data.dup_loc[i]) == MULT
2964 || MEM_P (*recog_data.dup_loc[i]))
2965 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
2966 }
2967 if (changed)
2968 df_insn_rescan (insn);
2969 }
2970
2971 /* If X is a SUBREG, replace it with a REG or a MEM,
2972 based on the thing it is a subreg of. */
2973
2974 rtx
2975 alter_subreg (rtx *xp)
2976 {
2977 rtx x = *xp;
2978 rtx y = SUBREG_REG (x);
2979
2980 /* simplify_subreg does not remove subreg from volatile references.
2981 We are required to. */
2982 if (MEM_P (y))
2983 {
2984 int offset = SUBREG_BYTE (x);
2985
2986 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2987 contains 0 instead of the proper offset. See simplify_subreg. */
2988 if (offset == 0
2989 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
2990 {
2991 int difference = GET_MODE_SIZE (GET_MODE (y))
2992 - GET_MODE_SIZE (GET_MODE (x));
2993 if (WORDS_BIG_ENDIAN)
2994 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2995 if (BYTES_BIG_ENDIAN)
2996 offset += difference % UNITS_PER_WORD;
2997 }
2998
2999 *xp = adjust_address (y, GET_MODE (x), offset);
3000 }
3001 else
3002 {
3003 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
3004 SUBREG_BYTE (x));
3005
3006 if (new_rtx != 0)
3007 *xp = new_rtx;
3008 else if (REG_P (y))
3009 {
3010 /* Simplify_subreg can't handle some REG cases, but we have to. */
3011 unsigned int regno;
3012 HOST_WIDE_INT offset;
3013
3014 regno = subreg_regno (x);
3015 if (subreg_lowpart_p (x))
3016 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
3017 else
3018 offset = SUBREG_BYTE (x);
3019 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
3020 }
3021 }
3022
3023 return *xp;
3024 }
3025
3026 /* Do alter_subreg on all the SUBREGs contained in X. */
3027
3028 static rtx
3029 walk_alter_subreg (rtx *xp, bool *changed)
3030 {
3031 rtx x = *xp;
3032 switch (GET_CODE (x))
3033 {
3034 case PLUS:
3035 case MULT:
3036 case AND:
3037 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3038 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
3039 break;
3040
3041 case MEM:
3042 case ZERO_EXTEND:
3043 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3044 break;
3045
3046 case SUBREG:
3047 *changed = true;
3048 return alter_subreg (xp);
3049
3050 default:
3051 break;
3052 }
3053
3054 return *xp;
3055 }
3056 \f
3057 #ifdef HAVE_cc0
3058
3059 /* Given BODY, the body of a jump instruction, alter the jump condition
3060 as required by the bits that are set in cc_status.flags.
3061 Not all of the bits there can be handled at this level in all cases.
3062
3063 The value is normally 0.
3064 1 means that the condition has become always true.
3065 -1 means that the condition has become always false.
3066 2 means that COND has been altered. */
3067
3068 static int
3069 alter_cond (rtx cond)
3070 {
3071 int value = 0;
3072
3073 if (cc_status.flags & CC_REVERSED)
3074 {
3075 value = 2;
3076 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3077 }
3078
3079 if (cc_status.flags & CC_INVERTED)
3080 {
3081 value = 2;
3082 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3083 }
3084
3085 if (cc_status.flags & CC_NOT_POSITIVE)
3086 switch (GET_CODE (cond))
3087 {
3088 case LE:
3089 case LEU:
3090 case GEU:
3091 /* Jump becomes unconditional. */
3092 return 1;
3093
3094 case GT:
3095 case GTU:
3096 case LTU:
3097 /* Jump becomes no-op. */
3098 return -1;
3099
3100 case GE:
3101 PUT_CODE (cond, EQ);
3102 value = 2;
3103 break;
3104
3105 case LT:
3106 PUT_CODE (cond, NE);
3107 value = 2;
3108 break;
3109
3110 default:
3111 break;
3112 }
3113
3114 if (cc_status.flags & CC_NOT_NEGATIVE)
3115 switch (GET_CODE (cond))
3116 {
3117 case GE:
3118 case GEU:
3119 /* Jump becomes unconditional. */
3120 return 1;
3121
3122 case LT:
3123 case LTU:
3124 /* Jump becomes no-op. */
3125 return -1;
3126
3127 case LE:
3128 case LEU:
3129 PUT_CODE (cond, EQ);
3130 value = 2;
3131 break;
3132
3133 case GT:
3134 case GTU:
3135 PUT_CODE (cond, NE);
3136 value = 2;
3137 break;
3138
3139 default:
3140 break;
3141 }
3142
3143 if (cc_status.flags & CC_NO_OVERFLOW)
3144 switch (GET_CODE (cond))
3145 {
3146 case GEU:
3147 /* Jump becomes unconditional. */
3148 return 1;
3149
3150 case LEU:
3151 PUT_CODE (cond, EQ);
3152 value = 2;
3153 break;
3154
3155 case GTU:
3156 PUT_CODE (cond, NE);
3157 value = 2;
3158 break;
3159
3160 case LTU:
3161 /* Jump becomes no-op. */
3162 return -1;
3163
3164 default:
3165 break;
3166 }
3167
3168 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3169 switch (GET_CODE (cond))
3170 {
3171 default:
3172 gcc_unreachable ();
3173
3174 case NE:
3175 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3176 value = 2;
3177 break;
3178
3179 case EQ:
3180 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3181 value = 2;
3182 break;
3183 }
3184
3185 if (cc_status.flags & CC_NOT_SIGNED)
3186 /* The flags are valid if signed condition operators are converted
3187 to unsigned. */
3188 switch (GET_CODE (cond))
3189 {
3190 case LE:
3191 PUT_CODE (cond, LEU);
3192 value = 2;
3193 break;
3194
3195 case LT:
3196 PUT_CODE (cond, LTU);
3197 value = 2;
3198 break;
3199
3200 case GT:
3201 PUT_CODE (cond, GTU);
3202 value = 2;
3203 break;
3204
3205 case GE:
3206 PUT_CODE (cond, GEU);
3207 value = 2;
3208 break;
3209
3210 default:
3211 break;
3212 }
3213
3214 return value;
3215 }
3216 #endif
3217 \f
3218 /* Report inconsistency between the assembler template and the operands.
3219 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3220
3221 void
3222 output_operand_lossage (const char *cmsgid, ...)
3223 {
3224 char *fmt_string;
3225 char *new_message;
3226 const char *pfx_str;
3227 va_list ap;
3228
3229 va_start (ap, cmsgid);
3230
3231 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
3232 asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid));
3233 vasprintf (&new_message, fmt_string, ap);
3234
3235 if (this_is_asm_operands)
3236 error_for_asm (this_is_asm_operands, "%s", new_message);
3237 else
3238 internal_error ("%s", new_message);
3239
3240 free (fmt_string);
3241 free (new_message);
3242 va_end (ap);
3243 }
3244 \f
3245 /* Output of assembler code from a template, and its subroutines. */
3246
3247 /* Annotate the assembly with a comment describing the pattern and
3248 alternative used. */
3249
3250 static void
3251 output_asm_name (void)
3252 {
3253 if (debug_insn)
3254 {
3255 int num = INSN_CODE (debug_insn);
3256 fprintf (asm_out_file, "\t%s %d\t%s",
3257 ASM_COMMENT_START, INSN_UID (debug_insn),
3258 insn_data[num].name);
3259 if (insn_data[num].n_alternatives > 1)
3260 fprintf (asm_out_file, "/%d", which_alternative + 1);
3261 #ifdef HAVE_ATTR_length
3262 fprintf (asm_out_file, "\t[length = %d]",
3263 get_attr_length (debug_insn));
3264 #endif
3265 /* Clear this so only the first assembler insn
3266 of any rtl insn will get the special comment for -dp. */
3267 debug_insn = 0;
3268 }
3269 }
3270
3271 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3272 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3273 corresponds to the address of the object and 0 if to the object. */
3274
3275 static tree
3276 get_mem_expr_from_op (rtx op, int *paddressp)
3277 {
3278 tree expr;
3279 int inner_addressp;
3280
3281 *paddressp = 0;
3282
3283 if (REG_P (op))
3284 return REG_EXPR (op);
3285 else if (!MEM_P (op))
3286 return 0;
3287
3288 if (MEM_EXPR (op) != 0)
3289 return MEM_EXPR (op);
3290
3291 /* Otherwise we have an address, so indicate it and look at the address. */
3292 *paddressp = 1;
3293 op = XEXP (op, 0);
3294
3295 /* First check if we have a decl for the address, then look at the right side
3296 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3297 But don't allow the address to itself be indirect. */
3298 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3299 return expr;
3300 else if (GET_CODE (op) == PLUS
3301 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3302 return expr;
3303
3304 while (UNARY_P (op)
3305 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
3306 op = XEXP (op, 0);
3307
3308 expr = get_mem_expr_from_op (op, &inner_addressp);
3309 return inner_addressp ? 0 : expr;
3310 }
3311
3312 /* Output operand names for assembler instructions. OPERANDS is the
3313 operand vector, OPORDER is the order to write the operands, and NOPS
3314 is the number of operands to write. */
3315
3316 static void
3317 output_asm_operand_names (rtx *operands, int *oporder, int nops)
3318 {
3319 int wrote = 0;
3320 int i;
3321
3322 for (i = 0; i < nops; i++)
3323 {
3324 int addressp;
3325 rtx op = operands[oporder[i]];
3326 tree expr = get_mem_expr_from_op (op, &addressp);
3327
3328 fprintf (asm_out_file, "%c%s",
3329 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
3330 wrote = 1;
3331 if (expr)
3332 {
3333 fprintf (asm_out_file, "%s",
3334 addressp ? "*" : "");
3335 print_mem_expr (asm_out_file, expr);
3336 wrote = 1;
3337 }
3338 else if (REG_P (op) && ORIGINAL_REGNO (op)
3339 && ORIGINAL_REGNO (op) != REGNO (op))
3340 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
3341 }
3342 }
3343
3344 /* Output text from TEMPLATE to the assembler output file,
3345 obeying %-directions to substitute operands taken from
3346 the vector OPERANDS.
3347
3348 %N (for N a digit) means print operand N in usual manner.
3349 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3350 and print the label name with no punctuation.
3351 %cN means require operand N to be a constant
3352 and print the constant expression with no punctuation.
3353 %aN means expect operand N to be a memory address
3354 (not a memory reference!) and print a reference
3355 to that address.
3356 %nN means expect operand N to be a constant
3357 and print a constant expression for minus the value
3358 of the operand, with no other punctuation. */
3359
3360 void
3361 output_asm_insn (const char *templ, rtx *operands)
3362 {
3363 const char *p;
3364 int c;
3365 #ifdef ASSEMBLER_DIALECT
3366 int dialect = 0;
3367 #endif
3368 int oporder[MAX_RECOG_OPERANDS];
3369 char opoutput[MAX_RECOG_OPERANDS];
3370 int ops = 0;
3371
3372 /* An insn may return a null string template
3373 in a case where no assembler code is needed. */
3374 if (*templ == 0)
3375 return;
3376
3377 memset (opoutput, 0, sizeof opoutput);
3378 p = templ;
3379 putc ('\t', asm_out_file);
3380
3381 #ifdef ASM_OUTPUT_OPCODE
3382 ASM_OUTPUT_OPCODE (asm_out_file, p);
3383 #endif
3384
3385 while ((c = *p++))
3386 switch (c)
3387 {
3388 case '\n':
3389 if (flag_verbose_asm)
3390 output_asm_operand_names (operands, oporder, ops);
3391 if (flag_print_asm_name)
3392 output_asm_name ();
3393
3394 ops = 0;
3395 memset (opoutput, 0, sizeof opoutput);
3396
3397 putc (c, asm_out_file);
3398 #ifdef ASM_OUTPUT_OPCODE
3399 while ((c = *p) == '\t')
3400 {
3401 putc (c, asm_out_file);
3402 p++;
3403 }
3404 ASM_OUTPUT_OPCODE (asm_out_file, p);
3405 #endif
3406 break;
3407
3408 #ifdef ASSEMBLER_DIALECT
3409 case '{':
3410 {
3411 int i;
3412
3413 if (dialect)
3414 output_operand_lossage ("nested assembly dialect alternatives");
3415 else
3416 dialect = 1;
3417
3418 /* If we want the first dialect, do nothing. Otherwise, skip
3419 DIALECT_NUMBER of strings ending with '|'. */
3420 for (i = 0; i < dialect_number; i++)
3421 {
3422 while (*p && *p != '}' && *p++ != '|')
3423 ;
3424 if (*p == '}')
3425 break;
3426 if (*p == '|')
3427 p++;
3428 }
3429
3430 if (*p == '\0')
3431 output_operand_lossage ("unterminated assembly dialect alternative");
3432 }
3433 break;
3434
3435 case '|':
3436 if (dialect)
3437 {
3438 /* Skip to close brace. */
3439 do
3440 {
3441 if (*p == '\0')
3442 {
3443 output_operand_lossage ("unterminated assembly dialect alternative");
3444 break;
3445 }
3446 }
3447 while (*p++ != '}');
3448 dialect = 0;
3449 }
3450 else
3451 putc (c, asm_out_file);
3452 break;
3453
3454 case '}':
3455 if (! dialect)
3456 putc (c, asm_out_file);
3457 dialect = 0;
3458 break;
3459 #endif
3460
3461 case '%':
3462 /* %% outputs a single %. */
3463 if (*p == '%')
3464 {
3465 p++;
3466 putc (c, asm_out_file);
3467 }
3468 /* %= outputs a number which is unique to each insn in the entire
3469 compilation. This is useful for making local labels that are
3470 referred to more than once in a given insn. */
3471 else if (*p == '=')
3472 {
3473 p++;
3474 fprintf (asm_out_file, "%d", insn_counter);
3475 }
3476 /* % followed by a letter and some digits
3477 outputs an operand in a special way depending on the letter.
3478 Letters `acln' are implemented directly.
3479 Other letters are passed to `output_operand' so that
3480 the TARGET_PRINT_OPERAND hook can define them. */
3481 else if (ISALPHA (*p))
3482 {
3483 int letter = *p++;
3484 unsigned long opnum;
3485 char *endptr;
3486
3487 opnum = strtoul (p, &endptr, 10);
3488
3489 if (endptr == p)
3490 output_operand_lossage ("operand number missing "
3491 "after %%-letter");
3492 else if (this_is_asm_operands && opnum >= insn_noperands)
3493 output_operand_lossage ("operand number out of range");
3494 else if (letter == 'l')
3495 output_asm_label (operands[opnum]);
3496 else if (letter == 'a')
3497 output_address (operands[opnum]);
3498 else if (letter == 'c')
3499 {
3500 if (CONSTANT_ADDRESS_P (operands[opnum]))
3501 output_addr_const (asm_out_file, operands[opnum]);
3502 else
3503 output_operand (operands[opnum], 'c');
3504 }
3505 else if (letter == 'n')
3506 {
3507 if (CONST_INT_P (operands[opnum]))
3508 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3509 - INTVAL (operands[opnum]));
3510 else
3511 {
3512 putc ('-', asm_out_file);
3513 output_addr_const (asm_out_file, operands[opnum]);
3514 }
3515 }
3516 else
3517 output_operand (operands[opnum], letter);
3518
3519 if (!opoutput[opnum])
3520 oporder[ops++] = opnum;
3521 opoutput[opnum] = 1;
3522
3523 p = endptr;
3524 c = *p;
3525 }
3526 /* % followed by a digit outputs an operand the default way. */
3527 else if (ISDIGIT (*p))
3528 {
3529 unsigned long opnum;
3530 char *endptr;
3531
3532 opnum = strtoul (p, &endptr, 10);
3533 if (this_is_asm_operands && opnum >= insn_noperands)
3534 output_operand_lossage ("operand number out of range");
3535 else
3536 output_operand (operands[opnum], 0);
3537
3538 if (!opoutput[opnum])
3539 oporder[ops++] = opnum;
3540 opoutput[opnum] = 1;
3541
3542 p = endptr;
3543 c = *p;
3544 }
3545 /* % followed by punctuation: output something for that
3546 punctuation character alone, with no operand. The
3547 TARGET_PRINT_OPERAND hook decides what is actually done. */
3548 else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p))
3549 output_operand (NULL_RTX, *p++);
3550 else
3551 output_operand_lossage ("invalid %%-code");
3552 break;
3553
3554 default:
3555 putc (c, asm_out_file);
3556 }
3557
3558 /* Write out the variable names for operands, if we know them. */
3559 if (flag_verbose_asm)
3560 output_asm_operand_names (operands, oporder, ops);
3561 if (flag_print_asm_name)
3562 output_asm_name ();
3563
3564 putc ('\n', asm_out_file);
3565 }
3566 \f
3567 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3568
3569 void
3570 output_asm_label (rtx x)
3571 {
3572 char buf[256];
3573
3574 if (GET_CODE (x) == LABEL_REF)
3575 x = XEXP (x, 0);
3576 if (LABEL_P (x)
3577 || (NOTE_P (x)
3578 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
3579 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3580 else
3581 output_operand_lossage ("'%%l' operand isn't a label");
3582
3583 assemble_name (asm_out_file, buf);
3584 }
3585
3586 /* Helper rtx-iteration-function for mark_symbol_refs_as_used and
3587 output_operand. Marks SYMBOL_REFs as referenced through use of
3588 assemble_external. */
3589
3590 static int
3591 mark_symbol_ref_as_used (rtx *xp, void *dummy ATTRIBUTE_UNUSED)
3592 {
3593 rtx x = *xp;
3594
3595 /* If we have a used symbol, we may have to emit assembly
3596 annotations corresponding to whether the symbol is external, weak
3597 or has non-default visibility. */
3598 if (GET_CODE (x) == SYMBOL_REF)
3599 {
3600 tree t;
3601
3602 t = SYMBOL_REF_DECL (x);
3603 if (t)
3604 assemble_external (t);
3605
3606 return -1;
3607 }
3608
3609 return 0;
3610 }
3611
3612 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
3613
3614 void
3615 mark_symbol_refs_as_used (rtx x)
3616 {
3617 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3618 }
3619
3620 /* Print operand X using machine-dependent assembler syntax.
3621 CODE is a non-digit that preceded the operand-number in the % spec,
3622 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3623 between the % and the digits.
3624 When CODE is a non-letter, X is 0.
3625
3626 The meanings of the letters are machine-dependent and controlled
3627 by TARGET_PRINT_OPERAND. */
3628
3629 void
3630 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3631 {
3632 if (x && GET_CODE (x) == SUBREG)
3633 x = alter_subreg (&x);
3634
3635 /* X must not be a pseudo reg. */
3636 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3637
3638 targetm.asm_out.print_operand (asm_out_file, x, code);
3639
3640 if (x == NULL_RTX)
3641 return;
3642
3643 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3644 }
3645
3646 /* Print a memory reference operand for address X using
3647 machine-dependent assembler syntax. */
3648
3649 void
3650 output_address (rtx x)
3651 {
3652 bool changed = false;
3653 walk_alter_subreg (&x, &changed);
3654 targetm.asm_out.print_operand_address (asm_out_file, x);
3655 }
3656 \f
3657 /* Print an integer constant expression in assembler syntax.
3658 Addition and subtraction are the only arithmetic
3659 that may appear in these expressions. */
3660
3661 void
3662 output_addr_const (FILE *file, rtx x)
3663 {
3664 char buf[256];
3665
3666 restart:
3667 switch (GET_CODE (x))
3668 {
3669 case PC:
3670 putc ('.', file);
3671 break;
3672
3673 case SYMBOL_REF:
3674 if (SYMBOL_REF_DECL (x))
3675 assemble_external (SYMBOL_REF_DECL (x));
3676 #ifdef ASM_OUTPUT_SYMBOL_REF
3677 ASM_OUTPUT_SYMBOL_REF (file, x);
3678 #else
3679 assemble_name (file, XSTR (x, 0));
3680 #endif
3681 break;
3682
3683 case LABEL_REF:
3684 x = XEXP (x, 0);
3685 /* Fall through. */
3686 case CODE_LABEL:
3687 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3688 #ifdef ASM_OUTPUT_LABEL_REF
3689 ASM_OUTPUT_LABEL_REF (file, buf);
3690 #else
3691 assemble_name (file, buf);
3692 #endif
3693 break;
3694
3695 case CONST_INT:
3696 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3697 break;
3698
3699 case CONST:
3700 /* This used to output parentheses around the expression,
3701 but that does not work on the 386 (either ATT or BSD assembler). */
3702 output_addr_const (file, XEXP (x, 0));
3703 break;
3704
3705 case CONST_DOUBLE:
3706 if (GET_MODE (x) == VOIDmode)
3707 {
3708 /* We can use %d if the number is one word and positive. */
3709 if (CONST_DOUBLE_HIGH (x))
3710 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3711 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
3712 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3713 else if (CONST_DOUBLE_LOW (x) < 0)
3714 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3715 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3716 else
3717 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3718 }
3719 else
3720 /* We can't handle floating point constants;
3721 PRINT_OPERAND must handle them. */
3722 output_operand_lossage ("floating constant misused");
3723 break;
3724
3725 case CONST_FIXED:
3726 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x));
3727 break;
3728
3729 case PLUS:
3730 /* Some assemblers need integer constants to appear last (eg masm). */
3731 if (CONST_INT_P (XEXP (x, 0)))
3732 {
3733 output_addr_const (file, XEXP (x, 1));
3734 if (INTVAL (XEXP (x, 0)) >= 0)
3735 fprintf (file, "+");
3736 output_addr_const (file, XEXP (x, 0));
3737 }
3738 else
3739 {
3740 output_addr_const (file, XEXP (x, 0));
3741 if (!CONST_INT_P (XEXP (x, 1))
3742 || INTVAL (XEXP (x, 1)) >= 0)
3743 fprintf (file, "+");
3744 output_addr_const (file, XEXP (x, 1));
3745 }
3746 break;
3747
3748 case MINUS:
3749 /* Avoid outputting things like x-x or x+5-x,
3750 since some assemblers can't handle that. */
3751 x = simplify_subtraction (x);
3752 if (GET_CODE (x) != MINUS)
3753 goto restart;
3754
3755 output_addr_const (file, XEXP (x, 0));
3756 fprintf (file, "-");
3757 if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0)
3758 || GET_CODE (XEXP (x, 1)) == PC
3759 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3760 output_addr_const (file, XEXP (x, 1));
3761 else
3762 {
3763 fputs (targetm.asm_out.open_paren, file);
3764 output_addr_const (file, XEXP (x, 1));
3765 fputs (targetm.asm_out.close_paren, file);
3766 }
3767 break;
3768
3769 case ZERO_EXTEND:
3770 case SIGN_EXTEND:
3771 case SUBREG:
3772 case TRUNCATE:
3773 output_addr_const (file, XEXP (x, 0));
3774 break;
3775
3776 default:
3777 if (targetm.asm_out.output_addr_const_extra (file, x))
3778 break;
3779
3780 output_operand_lossage ("invalid expression as operand");
3781 }
3782 }
3783 \f
3784 /* Output a quoted string. */
3785
3786 void
3787 output_quoted_string (FILE *asm_file, const char *string)
3788 {
3789 #ifdef OUTPUT_QUOTED_STRING
3790 OUTPUT_QUOTED_STRING (asm_file, string);
3791 #else
3792 char c;
3793
3794 putc ('\"', asm_file);
3795 while ((c = *string++) != 0)
3796 {
3797 if (ISPRINT (c))
3798 {
3799 if (c == '\"' || c == '\\')
3800 putc ('\\', asm_file);
3801 putc (c, asm_file);
3802 }
3803 else
3804 fprintf (asm_file, "\\%03o", (unsigned char) c);
3805 }
3806 putc ('\"', asm_file);
3807 #endif
3808 }
3809 \f
3810 /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */
3811
3812 void
3813 fprint_whex (FILE *f, unsigned HOST_WIDE_INT value)
3814 {
3815 char buf[2 + CHAR_BIT * sizeof (value) / 4];
3816 if (value == 0)
3817 putc ('0', f);
3818 else
3819 {
3820 char *p = buf + sizeof (buf);
3821 do
3822 *--p = "0123456789abcdef"[value % 16];
3823 while ((value /= 16) != 0);
3824 *--p = 'x';
3825 *--p = '0';
3826 fwrite (p, 1, buf + sizeof (buf) - p, f);
3827 }
3828 }
3829
3830 /* Internal function that prints an unsigned long in decimal in reverse.
3831 The output string IS NOT null-terminated. */
3832
3833 static int
3834 sprint_ul_rev (char *s, unsigned long value)
3835 {
3836 int i = 0;
3837 do
3838 {
3839 s[i] = "0123456789"[value % 10];
3840 value /= 10;
3841 i++;
3842 /* alternate version, without modulo */
3843 /* oldval = value; */
3844 /* value /= 10; */
3845 /* s[i] = "0123456789" [oldval - 10*value]; */
3846 /* i++ */
3847 }
3848 while (value != 0);
3849 return i;
3850 }
3851
3852 /* Write an unsigned long as decimal to a file, fast. */
3853
3854 void
3855 fprint_ul (FILE *f, unsigned long value)
3856 {
3857 /* python says: len(str(2**64)) == 20 */
3858 char s[20];
3859 int i;
3860
3861 i = sprint_ul_rev (s, value);
3862
3863 /* It's probably too small to bother with string reversal and fputs. */
3864 do
3865 {
3866 i--;
3867 putc (s[i], f);
3868 }
3869 while (i != 0);
3870 }
3871
3872 /* Write an unsigned long as decimal to a string, fast.
3873 s must be wide enough to not overflow, at least 21 chars.
3874 Returns the length of the string (without terminating '\0'). */
3875
3876 int
3877 sprint_ul (char *s, unsigned long value)
3878 {
3879 int len;
3880 char tmp_c;
3881 int i;
3882 int j;
3883
3884 len = sprint_ul_rev (s, value);
3885 s[len] = '\0';
3886
3887 /* Reverse the string. */
3888 i = 0;
3889 j = len - 1;
3890 while (i < j)
3891 {
3892 tmp_c = s[i];
3893 s[i] = s[j];
3894 s[j] = tmp_c;
3895 i++; j--;
3896 }
3897
3898 return len;
3899 }
3900
3901 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3902 %R prints the value of REGISTER_PREFIX.
3903 %L prints the value of LOCAL_LABEL_PREFIX.
3904 %U prints the value of USER_LABEL_PREFIX.
3905 %I prints the value of IMMEDIATE_PREFIX.
3906 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3907 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3908
3909 We handle alternate assembler dialects here, just like output_asm_insn. */
3910
3911 void
3912 asm_fprintf (FILE *file, const char *p, ...)
3913 {
3914 char buf[10];
3915 char *q, c;
3916 va_list argptr;
3917
3918 va_start (argptr, p);
3919
3920 buf[0] = '%';
3921
3922 while ((c = *p++))
3923 switch (c)
3924 {
3925 #ifdef ASSEMBLER_DIALECT
3926 case '{':
3927 {
3928 int i;
3929
3930 /* If we want the first dialect, do nothing. Otherwise, skip
3931 DIALECT_NUMBER of strings ending with '|'. */
3932 for (i = 0; i < dialect_number; i++)
3933 {
3934 while (*p && *p++ != '|')
3935 ;
3936
3937 if (*p == '|')
3938 p++;
3939 }
3940 }
3941 break;
3942
3943 case '|':
3944 /* Skip to close brace. */
3945 while (*p && *p++ != '}')
3946 ;
3947 break;
3948
3949 case '}':
3950 break;
3951 #endif
3952
3953 case '%':
3954 c = *p++;
3955 q = &buf[1];
3956 while (strchr ("-+ #0", c))
3957 {
3958 *q++ = c;
3959 c = *p++;
3960 }
3961 while (ISDIGIT (c) || c == '.')
3962 {
3963 *q++ = c;
3964 c = *p++;
3965 }
3966 switch (c)
3967 {
3968 case '%':
3969 putc ('%', file);
3970 break;
3971
3972 case 'd': case 'i': case 'u':
3973 case 'x': case 'X': case 'o':
3974 case 'c':
3975 *q++ = c;
3976 *q = 0;
3977 fprintf (file, buf, va_arg (argptr, int));
3978 break;
3979
3980 case 'w':
3981 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3982 'o' cases, but we do not check for those cases. It
3983 means that the value is a HOST_WIDE_INT, which may be
3984 either `long' or `long long'. */
3985 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
3986 q += strlen (HOST_WIDE_INT_PRINT);
3987 *q++ = *p++;
3988 *q = 0;
3989 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3990 break;
3991
3992 case 'l':
3993 *q++ = c;
3994 #ifdef HAVE_LONG_LONG
3995 if (*p == 'l')
3996 {
3997 *q++ = *p++;
3998 *q++ = *p++;
3999 *q = 0;
4000 fprintf (file, buf, va_arg (argptr, long long));
4001 }
4002 else
4003 #endif
4004 {
4005 *q++ = *p++;
4006 *q = 0;
4007 fprintf (file, buf, va_arg (argptr, long));
4008 }
4009
4010 break;
4011
4012 case 's':
4013 *q++ = c;
4014 *q = 0;
4015 fprintf (file, buf, va_arg (argptr, char *));
4016 break;
4017
4018 case 'O':
4019 #ifdef ASM_OUTPUT_OPCODE
4020 ASM_OUTPUT_OPCODE (asm_out_file, p);
4021 #endif
4022 break;
4023
4024 case 'R':
4025 #ifdef REGISTER_PREFIX
4026 fprintf (file, "%s", REGISTER_PREFIX);
4027 #endif
4028 break;
4029
4030 case 'I':
4031 #ifdef IMMEDIATE_PREFIX
4032 fprintf (file, "%s", IMMEDIATE_PREFIX);
4033 #endif
4034 break;
4035
4036 case 'L':
4037 #ifdef LOCAL_LABEL_PREFIX
4038 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
4039 #endif
4040 break;
4041
4042 case 'U':
4043 fputs (user_label_prefix, file);
4044 break;
4045
4046 #ifdef ASM_FPRINTF_EXTENSIONS
4047 /* Uppercase letters are reserved for general use by asm_fprintf
4048 and so are not available to target specific code. In order to
4049 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
4050 they are defined here. As they get turned into real extensions
4051 to asm_fprintf they should be removed from this list. */
4052 case 'A': case 'B': case 'C': case 'D': case 'E':
4053 case 'F': case 'G': case 'H': case 'J': case 'K':
4054 case 'M': case 'N': case 'P': case 'Q': case 'S':
4055 case 'T': case 'V': case 'W': case 'Y': case 'Z':
4056 break;
4057
4058 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
4059 #endif
4060 default:
4061 gcc_unreachable ();
4062 }
4063 break;
4064
4065 default:
4066 putc (c, file);
4067 }
4068 va_end (argptr);
4069 }
4070 \f
4071 /* Return nonzero if this function has no function calls. */
4072
4073 int
4074 leaf_function_p (void)
4075 {
4076 rtx insn;
4077 rtx link;
4078
4079 if (crtl->profile || profile_arc_flag)
4080 return 0;
4081
4082 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4083 {
4084 if (CALL_P (insn)
4085 && ! SIBLING_CALL_P (insn))
4086 return 0;
4087 if (NONJUMP_INSN_P (insn)
4088 && GET_CODE (PATTERN (insn)) == SEQUENCE
4089 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
4090 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4091 return 0;
4092 }
4093 for (link = crtl->epilogue_delay_list;
4094 link;
4095 link = XEXP (link, 1))
4096 {
4097 insn = XEXP (link, 0);
4098
4099 if (CALL_P (insn)
4100 && ! SIBLING_CALL_P (insn))
4101 return 0;
4102 if (NONJUMP_INSN_P (insn)
4103 && GET_CODE (PATTERN (insn)) == SEQUENCE
4104 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
4105 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4106 return 0;
4107 }
4108
4109 return 1;
4110 }
4111
4112 /* Return 1 if branch is a forward branch.
4113 Uses insn_shuid array, so it works only in the final pass. May be used by
4114 output templates to customary add branch prediction hints.
4115 */
4116 int
4117 final_forward_branch_p (rtx insn)
4118 {
4119 int insn_id, label_id;
4120
4121 gcc_assert (uid_shuid);
4122 insn_id = INSN_SHUID (insn);
4123 label_id = INSN_SHUID (JUMP_LABEL (insn));
4124 /* We've hit some insns that does not have id information available. */
4125 gcc_assert (insn_id && label_id);
4126 return insn_id < label_id;
4127 }
4128
4129 /* On some machines, a function with no call insns
4130 can run faster if it doesn't create its own register window.
4131 When output, the leaf function should use only the "output"
4132 registers. Ordinarily, the function would be compiled to use
4133 the "input" registers to find its arguments; it is a candidate
4134 for leaf treatment if it uses only the "input" registers.
4135 Leaf function treatment means renumbering so the function
4136 uses the "output" registers instead. */
4137
4138 #ifdef LEAF_REGISTERS
4139
4140 /* Return 1 if this function uses only the registers that can be
4141 safely renumbered. */
4142
4143 int
4144 only_leaf_regs_used (void)
4145 {
4146 int i;
4147 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
4148
4149 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4150 if ((df_regs_ever_live_p (i) || global_regs[i])
4151 && ! permitted_reg_in_leaf_functions[i])
4152 return 0;
4153
4154 if (crtl->uses_pic_offset_table
4155 && pic_offset_table_rtx != 0
4156 && REG_P (pic_offset_table_rtx)
4157 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4158 return 0;
4159
4160 return 1;
4161 }
4162
4163 /* Scan all instructions and renumber all registers into those
4164 available in leaf functions. */
4165
4166 static void
4167 leaf_renumber_regs (rtx first)
4168 {
4169 rtx insn;
4170
4171 /* Renumber only the actual patterns.
4172 The reg-notes can contain frame pointer refs,
4173 and renumbering them could crash, and should not be needed. */
4174 for (insn = first; insn; insn = NEXT_INSN (insn))
4175 if (INSN_P (insn))
4176 leaf_renumber_regs_insn (PATTERN (insn));
4177 for (insn = crtl->epilogue_delay_list;
4178 insn;
4179 insn = XEXP (insn, 1))
4180 if (INSN_P (XEXP (insn, 0)))
4181 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
4182 }
4183
4184 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4185 available in leaf functions. */
4186
4187 void
4188 leaf_renumber_regs_insn (rtx in_rtx)
4189 {
4190 int i, j;
4191 const char *format_ptr;
4192
4193 if (in_rtx == 0)
4194 return;
4195
4196 /* Renumber all input-registers into output-registers.
4197 renumbered_regs would be 1 for an output-register;
4198 they */
4199
4200 if (REG_P (in_rtx))
4201 {
4202 int newreg;
4203
4204 /* Don't renumber the same reg twice. */
4205 if (in_rtx->used)
4206 return;
4207
4208 newreg = REGNO (in_rtx);
4209 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4210 to reach here as part of a REG_NOTE. */
4211 if (newreg >= FIRST_PSEUDO_REGISTER)
4212 {
4213 in_rtx->used = 1;
4214 return;
4215 }
4216 newreg = LEAF_REG_REMAP (newreg);
4217 gcc_assert (newreg >= 0);
4218 df_set_regs_ever_live (REGNO (in_rtx), false);
4219 df_set_regs_ever_live (newreg, true);
4220 SET_REGNO (in_rtx, newreg);
4221 in_rtx->used = 1;
4222 }
4223
4224 if (INSN_P (in_rtx))
4225 {
4226 /* Inside a SEQUENCE, we find insns.
4227 Renumber just the patterns of these insns,
4228 just as we do for the top-level insns. */
4229 leaf_renumber_regs_insn (PATTERN (in_rtx));
4230 return;
4231 }
4232
4233 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4234
4235 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4236 switch (*format_ptr++)
4237 {
4238 case 'e':
4239 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4240 break;
4241
4242 case 'E':
4243 if (NULL != XVEC (in_rtx, i))
4244 {
4245 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4246 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4247 }
4248 break;
4249
4250 case 'S':
4251 case 's':
4252 case '0':
4253 case 'i':
4254 case 'w':
4255 case 'n':
4256 case 'u':
4257 break;
4258
4259 default:
4260 gcc_unreachable ();
4261 }
4262 }
4263 #endif
4264 \f
4265 /* Turn the RTL into assembly. */
4266 static unsigned int
4267 rest_of_handle_final (void)
4268 {
4269 rtx x;
4270 const char *fnname;
4271
4272 /* Get the function's name, as described by its RTL. This may be
4273 different from the DECL_NAME name used in the source file. */
4274
4275 x = DECL_RTL (current_function_decl);
4276 gcc_assert (MEM_P (x));
4277 x = XEXP (x, 0);
4278 gcc_assert (GET_CODE (x) == SYMBOL_REF);
4279 fnname = XSTR (x, 0);
4280
4281 assemble_start_function (current_function_decl, fnname);
4282 final_start_function (get_insns (), asm_out_file, optimize);
4283 final (get_insns (), asm_out_file, optimize);
4284 final_end_function ();
4285
4286 /* The IA-64 ".handlerdata" directive must be issued before the ".endp"
4287 directive that closes the procedure descriptor. Similarly, for x64 SEH.
4288 Otherwise it's not strictly necessary, but it doesn't hurt either. */
4289 output_function_exception_table (fnname);
4290
4291 assemble_end_function (current_function_decl, fnname);
4292
4293 user_defined_section_attribute = false;
4294
4295 /* Free up reg info memory. */
4296 free_reg_info ();
4297
4298 if (! quiet_flag)
4299 fflush (asm_out_file);
4300
4301 /* Write DBX symbols if requested. */
4302
4303 /* Note that for those inline functions where we don't initially
4304 know for certain that we will be generating an out-of-line copy,
4305 the first invocation of this routine (rest_of_compilation) will
4306 skip over this code by doing a `goto exit_rest_of_compilation;'.
4307 Later on, wrapup_global_declarations will (indirectly) call
4308 rest_of_compilation again for those inline functions that need
4309 to have out-of-line copies generated. During that call, we
4310 *will* be routed past here. */
4311
4312 timevar_push (TV_SYMOUT);
4313 if (!DECL_IGNORED_P (current_function_decl))
4314 debug_hooks->function_decl (current_function_decl);
4315 timevar_pop (TV_SYMOUT);
4316
4317 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4318 DECL_INITIAL (current_function_decl) = error_mark_node;
4319
4320 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4321 && targetm.have_ctors_dtors)
4322 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4323 decl_init_priority_lookup
4324 (current_function_decl));
4325 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4326 && targetm.have_ctors_dtors)
4327 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4328 decl_fini_priority_lookup
4329 (current_function_decl));
4330 return 0;
4331 }
4332
4333 struct rtl_opt_pass pass_final =
4334 {
4335 {
4336 RTL_PASS,
4337 "final", /* name */
4338 NULL, /* gate */
4339 rest_of_handle_final, /* execute */
4340 NULL, /* sub */
4341 NULL, /* next */
4342 0, /* static_pass_number */
4343 TV_FINAL, /* tv_id */
4344 0, /* properties_required */
4345 0, /* properties_provided */
4346 0, /* properties_destroyed */
4347 0, /* todo_flags_start */
4348 TODO_ggc_collect /* todo_flags_finish */
4349 }
4350 };
4351
4352
4353 static unsigned int
4354 rest_of_handle_shorten_branches (void)
4355 {
4356 /* Shorten branches. */
4357 shorten_branches (get_insns ());
4358 return 0;
4359 }
4360
4361 struct rtl_opt_pass pass_shorten_branches =
4362 {
4363 {
4364 RTL_PASS,
4365 "shorten", /* name */
4366 NULL, /* gate */
4367 rest_of_handle_shorten_branches, /* execute */
4368 NULL, /* sub */
4369 NULL, /* next */
4370 0, /* static_pass_number */
4371 TV_FINAL, /* tv_id */
4372 0, /* properties_required */
4373 0, /* properties_provided */
4374 0, /* properties_destroyed */
4375 0, /* todo_flags_start */
4376 0 /* todo_flags_finish */
4377 }
4378 };
4379
4380
4381 static unsigned int
4382 rest_of_clean_state (void)
4383 {
4384 rtx insn, next;
4385 FILE *final_output = NULL;
4386 int save_unnumbered = flag_dump_unnumbered;
4387 int save_noaddr = flag_dump_noaddr;
4388
4389 if (flag_dump_final_insns)
4390 {
4391 final_output = fopen (flag_dump_final_insns, "a");
4392 if (!final_output)
4393 {
4394 error ("could not open final insn dump file %qs: %m",
4395 flag_dump_final_insns);
4396 flag_dump_final_insns = NULL;
4397 }
4398 else
4399 {
4400 flag_dump_noaddr = flag_dump_unnumbered = 1;
4401 if (flag_compare_debug_opt || flag_compare_debug)
4402 dump_flags |= TDF_NOUID;
4403 dump_function_header (final_output, current_function_decl,
4404 dump_flags);
4405 final_insns_dump_p = true;
4406
4407 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4408 if (LABEL_P (insn))
4409 INSN_UID (insn) = CODE_LABEL_NUMBER (insn);
4410 else
4411 {
4412 if (NOTE_P (insn))
4413 set_block_for_insn (insn, NULL);
4414 INSN_UID (insn) = 0;
4415 }
4416 }
4417 }
4418
4419 /* It is very important to decompose the RTL instruction chain here:
4420 debug information keeps pointing into CODE_LABEL insns inside the function
4421 body. If these remain pointing to the other insns, we end up preserving
4422 whole RTL chain and attached detailed debug info in memory. */
4423 for (insn = get_insns (); insn; insn = next)
4424 {
4425 next = NEXT_INSN (insn);
4426 NEXT_INSN (insn) = NULL;
4427 PREV_INSN (insn) = NULL;
4428
4429 if (final_output
4430 && (!NOTE_P (insn) ||
4431 (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION
4432 && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION
4433 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG
4434 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END
4435 && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL)))
4436 print_rtl_single (final_output, insn);
4437 }
4438
4439 if (final_output)
4440 {
4441 flag_dump_noaddr = save_noaddr;
4442 flag_dump_unnumbered = save_unnumbered;
4443 final_insns_dump_p = false;
4444
4445 if (fclose (final_output))
4446 {
4447 error ("could not close final insn dump file %qs: %m",
4448 flag_dump_final_insns);
4449 flag_dump_final_insns = NULL;
4450 }
4451 }
4452
4453 /* In case the function was not output,
4454 don't leave any temporary anonymous types
4455 queued up for sdb output. */
4456 #ifdef SDB_DEBUGGING_INFO
4457 if (write_symbols == SDB_DEBUG)
4458 sdbout_types (NULL_TREE);
4459 #endif
4460
4461 flag_rerun_cse_after_global_opts = 0;
4462 reload_completed = 0;
4463 epilogue_completed = 0;
4464 #ifdef STACK_REGS
4465 regstack_completed = 0;
4466 #endif
4467
4468 /* Clear out the insn_length contents now that they are no
4469 longer valid. */
4470 init_insn_lengths ();
4471
4472 /* Show no temporary slots allocated. */
4473 init_temp_slots ();
4474
4475 free_bb_for_insn ();
4476
4477 delete_tree_ssa ();
4478
4479 /* We can reduce stack alignment on call site only when we are sure that
4480 the function body just produced will be actually used in the final
4481 executable. */
4482 if (decl_binds_to_current_def_p (current_function_decl))
4483 {
4484 unsigned int pref = crtl->preferred_stack_boundary;
4485 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
4486 pref = crtl->stack_alignment_needed;
4487 cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary
4488 = pref;
4489 }
4490
4491 /* Make sure volatile mem refs aren't considered valid operands for
4492 arithmetic insns. We must call this here if this is a nested inline
4493 function, since the above code leaves us in the init_recog state,
4494 and the function context push/pop code does not save/restore volatile_ok.
4495
4496 ??? Maybe it isn't necessary for expand_start_function to call this
4497 anymore if we do it here? */
4498
4499 init_recog_no_volatile ();
4500
4501 /* We're done with this function. Free up memory if we can. */
4502 free_after_parsing (cfun);
4503 free_after_compilation (cfun);
4504 return 0;
4505 }
4506
4507 struct rtl_opt_pass pass_clean_state =
4508 {
4509 {
4510 RTL_PASS,
4511 "*clean_state", /* name */
4512 NULL, /* gate */
4513 rest_of_clean_state, /* execute */
4514 NULL, /* sub */
4515 NULL, /* next */
4516 0, /* static_pass_number */
4517 TV_FINAL, /* tv_id */
4518 0, /* properties_required */
4519 0, /* properties_provided */
4520 PROP_rtl, /* properties_destroyed */
4521 0, /* todo_flags_start */
4522 0 /* todo_flags_finish */
4523 }
4524 };