1 /* Rtl-level induction variable analysis.
2 Copyright (C) 2004-2014 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the
8 Free Software Foundation; either version 3, or (at your option) any
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 /* This is a simple analysis of induction variables of the loop. The major use
21 is for determining the number of iterations of a loop for loop unrolling,
22 doloop optimization and branch prediction. The iv information is computed
25 Induction variables are analyzed by walking the use-def chains. When
26 a basic induction variable (biv) is found, it is cached in the bivs
27 hash table. When register is proved to be a biv, its description
28 is stored to DF_REF_DATA of the def reference.
30 The analysis works always with one loop -- you must call
31 iv_analysis_loop_init (loop) for it. All the other functions then work with
32 this loop. When you need to work with another loop, just call
33 iv_analysis_loop_init for it. When you no longer need iv analysis, call
34 iv_analysis_done () to clean up the memory.
36 The available functions are:
38 iv_analyze (insn, reg, iv): Stores the description of the induction variable
39 corresponding to the use of register REG in INSN to IV. Returns true if
40 REG is an induction variable in INSN. false otherwise.
41 If use of REG is not found in INSN, following insns are scanned (so that
42 we may call this function on insn returned by get_condition).
43 iv_analyze_result (insn, def, iv): Stores to IV the description of the iv
44 corresponding to DEF, which is a register defined in INSN.
45 iv_analyze_expr (insn, rhs, mode, iv): Stores to IV the description of iv
46 corresponding to expression EXPR evaluated at INSN. All registers used bu
47 EXPR must also be used in INSN.
52 #include "coretypes.h"
55 #include "hard-reg-set.h"
57 #include "basic-block.h"
61 #include "diagnostic-core.h"
63 #include "hash-table.h"
66 /* Possible return values of iv_get_reaching_def. */
70 /* More than one reaching def, or reaching def that does not
74 /* The use is trivial invariant of the loop, i.e. is not changed
78 /* The use is reached by initial value and a value from the
79 previous iteration. */
82 /* The use has single dominating def. */
86 /* Information about a biv. */
90 unsigned regno
; /* The register of the biv. */
91 struct rtx_iv iv
; /* Value of the biv. */
94 static bool clean_slate
= true;
96 static unsigned int iv_ref_table_size
= 0;
98 /* Table of rtx_ivs indexed by the df_ref uid field. */
99 static struct rtx_iv
** iv_ref_table
;
101 /* Induction variable stored at the reference. */
102 #define DF_REF_IV(REF) iv_ref_table[DF_REF_ID (REF)]
103 #define DF_REF_IV_SET(REF, IV) iv_ref_table[DF_REF_ID (REF)] = (IV)
105 /* The current loop. */
107 static struct loop
*current_loop
;
109 /* Hashtable helper. */
111 struct biv_entry_hasher
: typed_free_remove
<biv_entry
>
113 typedef biv_entry value_type
;
114 typedef rtx_def compare_type
;
115 static inline hashval_t
hash (const value_type
*);
116 static inline bool equal (const value_type
*, const compare_type
*);
119 /* Returns hash value for biv B. */
122 biv_entry_hasher::hash (const value_type
*b
)
127 /* Compares biv B and register R. */
130 biv_entry_hasher::equal (const value_type
*b
, const compare_type
*r
)
132 return b
->regno
== REGNO (r
);
135 /* Bivs of the current loop. */
137 static hash_table
<biv_entry_hasher
> *bivs
;
139 static bool iv_analyze_op (rtx_insn
*, rtx
, struct rtx_iv
*);
141 /* Return the RTX code corresponding to the IV extend code EXTEND. */
142 static inline enum rtx_code
143 iv_extend_to_rtx_code (enum iv_extend_code extend
)
151 case IV_UNKNOWN_EXTEND
:
157 /* Dumps information about IV to FILE. */
159 extern void dump_iv_info (FILE *, struct rtx_iv
*);
161 dump_iv_info (FILE *file
, struct rtx_iv
*iv
)
165 fprintf (file
, "not simple");
169 if (iv
->step
== const0_rtx
170 && !iv
->first_special
)
171 fprintf (file
, "invariant ");
173 print_rtl (file
, iv
->base
);
174 if (iv
->step
!= const0_rtx
)
176 fprintf (file
, " + ");
177 print_rtl (file
, iv
->step
);
178 fprintf (file
, " * iteration");
180 fprintf (file
, " (in %s)", GET_MODE_NAME (iv
->mode
));
182 if (iv
->mode
!= iv
->extend_mode
)
183 fprintf (file
, " %s to %s",
184 rtx_name
[iv_extend_to_rtx_code (iv
->extend
)],
185 GET_MODE_NAME (iv
->extend_mode
));
187 if (iv
->mult
!= const1_rtx
)
189 fprintf (file
, " * ");
190 print_rtl (file
, iv
->mult
);
192 if (iv
->delta
!= const0_rtx
)
194 fprintf (file
, " + ");
195 print_rtl (file
, iv
->delta
);
197 if (iv
->first_special
)
198 fprintf (file
, " (first special)");
201 /* Generates a subreg to get the least significant part of EXPR (in mode
202 INNER_MODE) to OUTER_MODE. */
205 lowpart_subreg (enum machine_mode outer_mode
, rtx expr
,
206 enum machine_mode inner_mode
)
208 return simplify_gen_subreg (outer_mode
, expr
, inner_mode
,
209 subreg_lowpart_offset (outer_mode
, inner_mode
));
213 check_iv_ref_table_size (void)
215 if (iv_ref_table_size
< DF_DEFS_TABLE_SIZE ())
217 unsigned int new_size
= DF_DEFS_TABLE_SIZE () + (DF_DEFS_TABLE_SIZE () / 4);
218 iv_ref_table
= XRESIZEVEC (struct rtx_iv
*, iv_ref_table
, new_size
);
219 memset (&iv_ref_table
[iv_ref_table_size
], 0,
220 (new_size
- iv_ref_table_size
) * sizeof (struct rtx_iv
*));
221 iv_ref_table_size
= new_size
;
226 /* Checks whether REG is a well-behaved register. */
229 simple_reg_p (rtx reg
)
233 if (GET_CODE (reg
) == SUBREG
)
235 if (!subreg_lowpart_p (reg
))
237 reg
= SUBREG_REG (reg
);
244 if (HARD_REGISTER_NUM_P (r
))
247 if (GET_MODE_CLASS (GET_MODE (reg
)) != MODE_INT
)
253 /* Clears the information about ivs stored in df. */
258 unsigned i
, n_defs
= DF_DEFS_TABLE_SIZE ();
261 check_iv_ref_table_size ();
262 for (i
= 0; i
< n_defs
; i
++)
264 iv
= iv_ref_table
[i
];
268 iv_ref_table
[i
] = NULL
;
276 /* Prepare the data for an induction variable analysis of a LOOP. */
279 iv_analysis_loop_init (struct loop
*loop
)
283 /* Clear the information from the analysis of the previous loop. */
286 df_set_flags (DF_EQ_NOTES
+ DF_DEFER_INSN_RESCAN
);
287 bivs
= new hash_table
<biv_entry_hasher
> (10);
293 /* Get rid of the ud chains before processing the rescans. Then add
295 df_remove_problem (df_chain
);
296 df_process_deferred_rescans ();
297 df_set_flags (DF_RD_PRUNE_DEAD_DEFS
);
298 df_chain_add_problem (DF_UD_CHAIN
);
299 df_note_add_problem ();
300 df_analyze_loop (loop
);
302 df_dump_region (dump_file
);
304 check_iv_ref_table_size ();
307 /* Finds the definition of REG that dominates loop latch and stores
308 it to DEF. Returns false if there is not a single definition
309 dominating the latch. If REG has no definition in loop, DEF
310 is set to NULL and true is returned. */
313 latch_dominating_def (rtx reg
, df_ref
*def
)
315 df_ref single_rd
= NULL
, adef
;
316 unsigned regno
= REGNO (reg
);
317 struct df_rd_bb_info
*bb_info
= DF_RD_BB_INFO (current_loop
->latch
);
319 for (adef
= DF_REG_DEF_CHAIN (regno
); adef
; adef
= DF_REF_NEXT_REG (adef
))
321 if (!bitmap_bit_p (df
->blocks_to_analyze
, DF_REF_BBNO (adef
))
322 || !bitmap_bit_p (&bb_info
->out
, DF_REF_ID (adef
)))
325 /* More than one reaching definition. */
329 if (!just_once_each_iteration_p (current_loop
, DF_REF_BB (adef
)))
339 /* Gets definition of REG reaching its use in INSN and stores it to DEF. */
341 static enum iv_grd_result
342 iv_get_reaching_def (rtx_insn
*insn
, rtx reg
, df_ref
*def
)
345 basic_block def_bb
, use_bb
;
350 if (!simple_reg_p (reg
))
352 if (GET_CODE (reg
) == SUBREG
)
353 reg
= SUBREG_REG (reg
);
354 gcc_assert (REG_P (reg
));
356 use
= df_find_use (insn
, reg
);
357 gcc_assert (use
!= NULL
);
359 if (!DF_REF_CHAIN (use
))
360 return GRD_INVARIANT
;
362 /* More than one reaching def. */
363 if (DF_REF_CHAIN (use
)->next
)
366 adef
= DF_REF_CHAIN (use
)->ref
;
368 /* We do not handle setting only part of the register. */
369 if (DF_REF_FLAGS (adef
) & DF_REF_READ_WRITE
)
372 def_insn
= DF_REF_INSN (adef
);
373 def_bb
= DF_REF_BB (adef
);
374 use_bb
= BLOCK_FOR_INSN (insn
);
376 if (use_bb
== def_bb
)
377 dom_p
= (DF_INSN_LUID (def_insn
) < DF_INSN_LUID (insn
));
379 dom_p
= dominated_by_p (CDI_DOMINATORS
, use_bb
, def_bb
);
384 return GRD_SINGLE_DOM
;
387 /* The definition does not dominate the use. This is still OK if
388 this may be a use of a biv, i.e. if the def_bb dominates loop
390 if (just_once_each_iteration_p (current_loop
, def_bb
))
391 return GRD_MAYBE_BIV
;
396 /* Sets IV to invariant CST in MODE. Always returns true (just for
397 consistency with other iv manipulation functions that may fail). */
400 iv_constant (struct rtx_iv
*iv
, rtx cst
, enum machine_mode mode
)
402 if (mode
== VOIDmode
)
403 mode
= GET_MODE (cst
);
407 iv
->step
= const0_rtx
;
408 iv
->first_special
= false;
409 iv
->extend
= IV_UNKNOWN_EXTEND
;
410 iv
->extend_mode
= iv
->mode
;
411 iv
->delta
= const0_rtx
;
412 iv
->mult
= const1_rtx
;
417 /* Evaluates application of subreg to MODE on IV. */
420 iv_subreg (struct rtx_iv
*iv
, enum machine_mode mode
)
422 /* If iv is invariant, just calculate the new value. */
423 if (iv
->step
== const0_rtx
424 && !iv
->first_special
)
426 rtx val
= get_iv_value (iv
, const0_rtx
);
427 val
= lowpart_subreg (mode
, val
,
428 iv
->extend
== IV_UNKNOWN_EXTEND
429 ? iv
->mode
: iv
->extend_mode
);
432 iv
->extend
= IV_UNKNOWN_EXTEND
;
433 iv
->mode
= iv
->extend_mode
= mode
;
434 iv
->delta
= const0_rtx
;
435 iv
->mult
= const1_rtx
;
439 if (iv
->extend_mode
== mode
)
442 if (GET_MODE_BITSIZE (mode
) > GET_MODE_BITSIZE (iv
->mode
))
445 iv
->extend
= IV_UNKNOWN_EXTEND
;
448 iv
->base
= simplify_gen_binary (PLUS
, iv
->extend_mode
, iv
->delta
,
449 simplify_gen_binary (MULT
, iv
->extend_mode
,
450 iv
->base
, iv
->mult
));
451 iv
->step
= simplify_gen_binary (MULT
, iv
->extend_mode
, iv
->step
, iv
->mult
);
452 iv
->mult
= const1_rtx
;
453 iv
->delta
= const0_rtx
;
454 iv
->first_special
= false;
459 /* Evaluates application of EXTEND to MODE on IV. */
462 iv_extend (struct rtx_iv
*iv
, enum iv_extend_code extend
, enum machine_mode mode
)
464 /* If iv is invariant, just calculate the new value. */
465 if (iv
->step
== const0_rtx
466 && !iv
->first_special
)
468 rtx val
= get_iv_value (iv
, const0_rtx
);
469 if (iv
->extend_mode
!= iv
->mode
470 && iv
->extend
!= IV_UNKNOWN_EXTEND
471 && iv
->extend
!= extend
)
472 val
= lowpart_subreg (iv
->mode
, val
, iv
->extend_mode
);
473 val
= simplify_gen_unary (iv_extend_to_rtx_code (extend
), mode
,
476 ? iv
->extend_mode
: iv
->mode
);
478 iv
->extend
= IV_UNKNOWN_EXTEND
;
479 iv
->mode
= iv
->extend_mode
= mode
;
480 iv
->delta
= const0_rtx
;
481 iv
->mult
= const1_rtx
;
485 if (mode
!= iv
->extend_mode
)
488 if (iv
->extend
!= IV_UNKNOWN_EXTEND
489 && iv
->extend
!= extend
)
497 /* Evaluates negation of IV. */
500 iv_neg (struct rtx_iv
*iv
)
502 if (iv
->extend
== IV_UNKNOWN_EXTEND
)
504 iv
->base
= simplify_gen_unary (NEG
, iv
->extend_mode
,
505 iv
->base
, iv
->extend_mode
);
506 iv
->step
= simplify_gen_unary (NEG
, iv
->extend_mode
,
507 iv
->step
, iv
->extend_mode
);
511 iv
->delta
= simplify_gen_unary (NEG
, iv
->extend_mode
,
512 iv
->delta
, iv
->extend_mode
);
513 iv
->mult
= simplify_gen_unary (NEG
, iv
->extend_mode
,
514 iv
->mult
, iv
->extend_mode
);
520 /* Evaluates addition or subtraction (according to OP) of IV1 to IV0. */
523 iv_add (struct rtx_iv
*iv0
, struct rtx_iv
*iv1
, enum rtx_code op
)
525 enum machine_mode mode
;
528 /* Extend the constant to extend_mode of the other operand if necessary. */
529 if (iv0
->extend
== IV_UNKNOWN_EXTEND
530 && iv0
->mode
== iv0
->extend_mode
531 && iv0
->step
== const0_rtx
532 && GET_MODE_SIZE (iv0
->extend_mode
) < GET_MODE_SIZE (iv1
->extend_mode
))
534 iv0
->extend_mode
= iv1
->extend_mode
;
535 iv0
->base
= simplify_gen_unary (ZERO_EXTEND
, iv0
->extend_mode
,
536 iv0
->base
, iv0
->mode
);
538 if (iv1
->extend
== IV_UNKNOWN_EXTEND
539 && iv1
->mode
== iv1
->extend_mode
540 && iv1
->step
== const0_rtx
541 && GET_MODE_SIZE (iv1
->extend_mode
) < GET_MODE_SIZE (iv0
->extend_mode
))
543 iv1
->extend_mode
= iv0
->extend_mode
;
544 iv1
->base
= simplify_gen_unary (ZERO_EXTEND
, iv1
->extend_mode
,
545 iv1
->base
, iv1
->mode
);
548 mode
= iv0
->extend_mode
;
549 if (mode
!= iv1
->extend_mode
)
552 if (iv0
->extend
== IV_UNKNOWN_EXTEND
553 && iv1
->extend
== IV_UNKNOWN_EXTEND
)
555 if (iv0
->mode
!= iv1
->mode
)
558 iv0
->base
= simplify_gen_binary (op
, mode
, iv0
->base
, iv1
->base
);
559 iv0
->step
= simplify_gen_binary (op
, mode
, iv0
->step
, iv1
->step
);
564 /* Handle addition of constant. */
565 if (iv1
->extend
== IV_UNKNOWN_EXTEND
567 && iv1
->step
== const0_rtx
)
569 iv0
->delta
= simplify_gen_binary (op
, mode
, iv0
->delta
, iv1
->base
);
573 if (iv0
->extend
== IV_UNKNOWN_EXTEND
575 && iv0
->step
== const0_rtx
)
583 iv0
->delta
= simplify_gen_binary (PLUS
, mode
, iv0
->delta
, arg
);
590 /* Evaluates multiplication of IV by constant CST. */
593 iv_mult (struct rtx_iv
*iv
, rtx mby
)
595 enum machine_mode mode
= iv
->extend_mode
;
597 if (GET_MODE (mby
) != VOIDmode
598 && GET_MODE (mby
) != mode
)
601 if (iv
->extend
== IV_UNKNOWN_EXTEND
)
603 iv
->base
= simplify_gen_binary (MULT
, mode
, iv
->base
, mby
);
604 iv
->step
= simplify_gen_binary (MULT
, mode
, iv
->step
, mby
);
608 iv
->delta
= simplify_gen_binary (MULT
, mode
, iv
->delta
, mby
);
609 iv
->mult
= simplify_gen_binary (MULT
, mode
, iv
->mult
, mby
);
615 /* Evaluates shift of IV by constant CST. */
618 iv_shift (struct rtx_iv
*iv
, rtx mby
)
620 enum machine_mode mode
= iv
->extend_mode
;
622 if (GET_MODE (mby
) != VOIDmode
623 && GET_MODE (mby
) != mode
)
626 if (iv
->extend
== IV_UNKNOWN_EXTEND
)
628 iv
->base
= simplify_gen_binary (ASHIFT
, mode
, iv
->base
, mby
);
629 iv
->step
= simplify_gen_binary (ASHIFT
, mode
, iv
->step
, mby
);
633 iv
->delta
= simplify_gen_binary (ASHIFT
, mode
, iv
->delta
, mby
);
634 iv
->mult
= simplify_gen_binary (ASHIFT
, mode
, iv
->mult
, mby
);
640 /* The recursive part of get_biv_step. Gets the value of the single value
641 defined by DEF wrto initial value of REG inside loop, in shape described
645 get_biv_step_1 (df_ref def
, rtx reg
,
646 rtx
*inner_step
, enum machine_mode
*inner_mode
,
647 enum iv_extend_code
*extend
, enum machine_mode outer_mode
,
650 rtx set
, rhs
, op0
= NULL_RTX
, op1
= NULL_RTX
;
651 rtx next
, nextr
, tmp
;
653 rtx_insn
*insn
= DF_REF_INSN (def
);
655 enum iv_grd_result res
;
657 set
= single_set (insn
);
661 rhs
= find_reg_equal_equiv_note (insn
);
667 code
= GET_CODE (rhs
);
680 if (code
== PLUS
&& CONSTANT_P (op0
))
682 tmp
= op0
; op0
= op1
; op1
= tmp
;
685 if (!simple_reg_p (op0
)
686 || !CONSTANT_P (op1
))
689 if (GET_MODE (rhs
) != outer_mode
)
691 /* ppc64 uses expressions like
693 (set x:SI (plus:SI (subreg:SI y:DI) 1)).
695 this is equivalent to
697 (set x':DI (plus:DI y:DI 1))
698 (set x:SI (subreg:SI (x':DI)). */
699 if (GET_CODE (op0
) != SUBREG
)
701 if (GET_MODE (SUBREG_REG (op0
)) != outer_mode
)
710 if (GET_MODE (rhs
) != outer_mode
)
714 if (!simple_reg_p (op0
))
724 if (GET_CODE (next
) == SUBREG
)
726 if (!subreg_lowpart_p (next
))
729 nextr
= SUBREG_REG (next
);
730 if (GET_MODE (nextr
) != outer_mode
)
736 res
= iv_get_reaching_def (insn
, nextr
, &next_def
);
738 if (res
== GRD_INVALID
|| res
== GRD_INVARIANT
)
741 if (res
== GRD_MAYBE_BIV
)
743 if (!rtx_equal_p (nextr
, reg
))
746 *inner_step
= const0_rtx
;
747 *extend
= IV_UNKNOWN_EXTEND
;
748 *inner_mode
= outer_mode
;
749 *outer_step
= const0_rtx
;
751 else if (!get_biv_step_1 (next_def
, reg
,
752 inner_step
, inner_mode
, extend
, outer_mode
,
756 if (GET_CODE (next
) == SUBREG
)
758 enum machine_mode amode
= GET_MODE (next
);
760 if (GET_MODE_SIZE (amode
) > GET_MODE_SIZE (*inner_mode
))
764 *inner_step
= simplify_gen_binary (PLUS
, outer_mode
,
765 *inner_step
, *outer_step
);
766 *outer_step
= const0_rtx
;
767 *extend
= IV_UNKNOWN_EXTEND
;
778 if (*inner_mode
== outer_mode
779 /* See comment in previous switch. */
780 || GET_MODE (rhs
) != outer_mode
)
781 *inner_step
= simplify_gen_binary (code
, outer_mode
,
784 *outer_step
= simplify_gen_binary (code
, outer_mode
,
790 gcc_assert (GET_MODE (op0
) == *inner_mode
791 && *extend
== IV_UNKNOWN_EXTEND
792 && *outer_step
== const0_rtx
);
794 *extend
= (code
== SIGN_EXTEND
) ? IV_SIGN_EXTEND
: IV_ZERO_EXTEND
;
804 /* Gets the operation on register REG inside loop, in shape
806 OUTER_STEP + EXTEND_{OUTER_MODE} (SUBREG_{INNER_MODE} (REG + INNER_STEP))
808 If the operation cannot be described in this shape, return false.
809 LAST_DEF is the definition of REG that dominates loop latch. */
812 get_biv_step (df_ref last_def
, rtx reg
, rtx
*inner_step
,
813 enum machine_mode
*inner_mode
, enum iv_extend_code
*extend
,
814 enum machine_mode
*outer_mode
, rtx
*outer_step
)
816 *outer_mode
= GET_MODE (reg
);
818 if (!get_biv_step_1 (last_def
, reg
,
819 inner_step
, inner_mode
, extend
, *outer_mode
,
823 gcc_assert ((*inner_mode
== *outer_mode
) != (*extend
!= IV_UNKNOWN_EXTEND
));
824 gcc_assert (*inner_mode
!= *outer_mode
|| *outer_step
== const0_rtx
);
829 /* Records information that DEF is induction variable IV. */
832 record_iv (df_ref def
, struct rtx_iv
*iv
)
834 struct rtx_iv
*recorded_iv
= XNEW (struct rtx_iv
);
837 check_iv_ref_table_size ();
838 DF_REF_IV_SET (def
, recorded_iv
);
841 /* If DEF was already analyzed for bivness, store the description of the biv to
842 IV and return true. Otherwise return false. */
845 analyzed_for_bivness_p (rtx def
, struct rtx_iv
*iv
)
847 struct biv_entry
*biv
= bivs
->find_with_hash (def
, REGNO (def
));
857 record_biv (rtx def
, struct rtx_iv
*iv
)
859 struct biv_entry
*biv
= XNEW (struct biv_entry
);
860 biv_entry
**slot
= bivs
->find_slot_with_hash (def
, REGNO (def
), INSERT
);
862 biv
->regno
= REGNO (def
);
868 /* Determines whether DEF is a biv and if so, stores its description
872 iv_analyze_biv (rtx def
, struct rtx_iv
*iv
)
874 rtx inner_step
, outer_step
;
875 enum machine_mode inner_mode
, outer_mode
;
876 enum iv_extend_code extend
;
881 fprintf (dump_file
, "Analyzing ");
882 print_rtl (dump_file
, def
);
883 fprintf (dump_file
, " for bivness.\n");
888 if (!CONSTANT_P (def
))
891 return iv_constant (iv
, def
, VOIDmode
);
894 if (!latch_dominating_def (def
, &last_def
))
897 fprintf (dump_file
, " not simple.\n");
902 return iv_constant (iv
, def
, VOIDmode
);
904 if (analyzed_for_bivness_p (def
, iv
))
907 fprintf (dump_file
, " already analysed.\n");
908 return iv
->base
!= NULL_RTX
;
911 if (!get_biv_step (last_def
, def
, &inner_step
, &inner_mode
, &extend
,
912 &outer_mode
, &outer_step
))
918 /* Loop transforms base to es (base + inner_step) + outer_step,
919 where es means extend of subreg between inner_mode and outer_mode.
920 The corresponding induction variable is
922 es ((base - outer_step) + i * (inner_step + outer_step)) + outer_step */
924 iv
->base
= simplify_gen_binary (MINUS
, outer_mode
, def
, outer_step
);
925 iv
->step
= simplify_gen_binary (PLUS
, outer_mode
, inner_step
, outer_step
);
926 iv
->mode
= inner_mode
;
927 iv
->extend_mode
= outer_mode
;
929 iv
->mult
= const1_rtx
;
930 iv
->delta
= outer_step
;
931 iv
->first_special
= inner_mode
!= outer_mode
;
936 fprintf (dump_file
, " ");
937 dump_iv_info (dump_file
, iv
);
938 fprintf (dump_file
, "\n");
941 record_biv (def
, iv
);
942 return iv
->base
!= NULL_RTX
;
945 /* Analyzes expression RHS used at INSN and stores the result to *IV.
946 The mode of the induction variable is MODE. */
949 iv_analyze_expr (rtx_insn
*insn
, rtx rhs
, enum machine_mode mode
,
952 rtx mby
= NULL_RTX
, tmp
;
953 rtx op0
= NULL_RTX
, op1
= NULL_RTX
;
954 struct rtx_iv iv0
, iv1
;
955 enum rtx_code code
= GET_CODE (rhs
);
956 enum machine_mode omode
= mode
;
962 gcc_assert (GET_MODE (rhs
) == mode
|| GET_MODE (rhs
) == VOIDmode
);
968 if (!iv_analyze_op (insn
, rhs
, iv
))
971 if (iv
->mode
== VOIDmode
)
974 iv
->extend_mode
= mode
;
990 omode
= GET_MODE (op0
);
1000 op0
= XEXP (rhs
, 0);
1001 mby
= XEXP (rhs
, 1);
1002 if (!CONSTANT_P (mby
))
1008 if (!CONSTANT_P (mby
))
1013 op0
= XEXP (rhs
, 0);
1014 mby
= XEXP (rhs
, 1);
1015 if (!CONSTANT_P (mby
))
1024 && !iv_analyze_expr (insn
, op0
, omode
, &iv0
))
1028 && !iv_analyze_expr (insn
, op1
, omode
, &iv1
))
1034 if (!iv_extend (&iv0
, IV_SIGN_EXTEND
, mode
))
1039 if (!iv_extend (&iv0
, IV_ZERO_EXTEND
, mode
))
1050 if (!iv_add (&iv0
, &iv1
, code
))
1055 if (!iv_mult (&iv0
, mby
))
1060 if (!iv_shift (&iv0
, mby
))
1069 return iv
->base
!= NULL_RTX
;
1072 /* Analyzes iv DEF and stores the result to *IV. */
1075 iv_analyze_def (df_ref def
, struct rtx_iv
*iv
)
1077 rtx_insn
*insn
= DF_REF_INSN (def
);
1078 rtx reg
= DF_REF_REG (def
);
1083 fprintf (dump_file
, "Analyzing def of ");
1084 print_rtl (dump_file
, reg
);
1085 fprintf (dump_file
, " in insn ");
1086 print_rtl_single (dump_file
, insn
);
1089 check_iv_ref_table_size ();
1090 if (DF_REF_IV (def
))
1093 fprintf (dump_file
, " already analysed.\n");
1094 *iv
= *DF_REF_IV (def
);
1095 return iv
->base
!= NULL_RTX
;
1098 iv
->mode
= VOIDmode
;
1099 iv
->base
= NULL_RTX
;
1100 iv
->step
= NULL_RTX
;
1105 set
= single_set (insn
);
1109 if (!REG_P (SET_DEST (set
)))
1112 gcc_assert (SET_DEST (set
) == reg
);
1113 rhs
= find_reg_equal_equiv_note (insn
);
1115 rhs
= XEXP (rhs
, 0);
1117 rhs
= SET_SRC (set
);
1119 iv_analyze_expr (insn
, rhs
, GET_MODE (reg
), iv
);
1120 record_iv (def
, iv
);
1124 print_rtl (dump_file
, reg
);
1125 fprintf (dump_file
, " in insn ");
1126 print_rtl_single (dump_file
, insn
);
1127 fprintf (dump_file
, " is ");
1128 dump_iv_info (dump_file
, iv
);
1129 fprintf (dump_file
, "\n");
1132 return iv
->base
!= NULL_RTX
;
1135 /* Analyzes operand OP of INSN and stores the result to *IV. */
1138 iv_analyze_op (rtx_insn
*insn
, rtx op
, struct rtx_iv
*iv
)
1141 enum iv_grd_result res
;
1145 fprintf (dump_file
, "Analyzing operand ");
1146 print_rtl (dump_file
, op
);
1147 fprintf (dump_file
, " of insn ");
1148 print_rtl_single (dump_file
, insn
);
1151 if (function_invariant_p (op
))
1152 res
= GRD_INVARIANT
;
1153 else if (GET_CODE (op
) == SUBREG
)
1155 if (!subreg_lowpart_p (op
))
1158 if (!iv_analyze_op (insn
, SUBREG_REG (op
), iv
))
1161 return iv_subreg (iv
, GET_MODE (op
));
1165 res
= iv_get_reaching_def (insn
, op
, &def
);
1166 if (res
== GRD_INVALID
)
1169 fprintf (dump_file
, " not simple.\n");
1174 if (res
== GRD_INVARIANT
)
1176 iv_constant (iv
, op
, VOIDmode
);
1180 fprintf (dump_file
, " ");
1181 dump_iv_info (dump_file
, iv
);
1182 fprintf (dump_file
, "\n");
1187 if (res
== GRD_MAYBE_BIV
)
1188 return iv_analyze_biv (op
, iv
);
1190 return iv_analyze_def (def
, iv
);
1193 /* Analyzes value VAL at INSN and stores the result to *IV. */
1196 iv_analyze (rtx_insn
*insn
, rtx val
, struct rtx_iv
*iv
)
1200 /* We must find the insn in that val is used, so that we get to UD chains.
1201 Since the function is sometimes called on result of get_condition,
1202 this does not necessarily have to be directly INSN; scan also the
1204 if (simple_reg_p (val
))
1206 if (GET_CODE (val
) == SUBREG
)
1207 reg
= SUBREG_REG (val
);
1211 while (!df_find_use (insn
, reg
))
1212 insn
= NEXT_INSN (insn
);
1215 return iv_analyze_op (insn
, val
, iv
);
1218 /* Analyzes definition of DEF in INSN and stores the result to IV. */
1221 iv_analyze_result (rtx_insn
*insn
, rtx def
, struct rtx_iv
*iv
)
1225 adef
= df_find_def (insn
, def
);
1229 return iv_analyze_def (adef
, iv
);
1232 /* Checks whether definition of register REG in INSN is a basic induction
1233 variable. IV analysis must have been initialized (via a call to
1234 iv_analysis_loop_init) for this function to produce a result. */
1237 biv_p (rtx_insn
*insn
, rtx reg
)
1240 df_ref def
, last_def
;
1242 if (!simple_reg_p (reg
))
1245 def
= df_find_def (insn
, reg
);
1246 gcc_assert (def
!= NULL
);
1247 if (!latch_dominating_def (reg
, &last_def
))
1249 if (last_def
!= def
)
1252 if (!iv_analyze_biv (reg
, &iv
))
1255 return iv
.step
!= const0_rtx
;
1258 /* Calculates value of IV at ITERATION-th iteration. */
1261 get_iv_value (struct rtx_iv
*iv
, rtx iteration
)
1265 /* We would need to generate some if_then_else patterns, and so far
1266 it is not needed anywhere. */
1267 gcc_assert (!iv
->first_special
);
1269 if (iv
->step
!= const0_rtx
&& iteration
!= const0_rtx
)
1270 val
= simplify_gen_binary (PLUS
, iv
->extend_mode
, iv
->base
,
1271 simplify_gen_binary (MULT
, iv
->extend_mode
,
1272 iv
->step
, iteration
));
1276 if (iv
->extend_mode
== iv
->mode
)
1279 val
= lowpart_subreg (iv
->mode
, val
, iv
->extend_mode
);
1281 if (iv
->extend
== IV_UNKNOWN_EXTEND
)
1284 val
= simplify_gen_unary (iv_extend_to_rtx_code (iv
->extend
),
1285 iv
->extend_mode
, val
, iv
->mode
);
1286 val
= simplify_gen_binary (PLUS
, iv
->extend_mode
, iv
->delta
,
1287 simplify_gen_binary (MULT
, iv
->extend_mode
,
1293 /* Free the data for an induction variable analysis. */
1296 iv_analysis_done (void)
1302 df_finish_pass (true);
1305 free (iv_ref_table
);
1306 iv_ref_table
= NULL
;
1307 iv_ref_table_size
= 0;
1311 /* Computes inverse to X modulo (1 << MOD). */
1314 inverse (uint64_t x
, int mod
)
1317 ((uint64_t) 1 << (mod
- 1) << 1) - 1;
1321 for (i
= 0; i
< mod
- 1; i
++)
1323 rslt
= (rslt
* x
) & mask
;
1330 /* Checks whether register *REG is in set ALT. Callback for for_each_rtx. */
1333 altered_reg_used (rtx
*reg
, void *alt
)
1338 return REGNO_REG_SET_P ((bitmap
) alt
, REGNO (*reg
));
1341 /* Marks registers altered by EXPR in set ALT. */
1344 mark_altered (rtx expr
, const_rtx by ATTRIBUTE_UNUSED
, void *alt
)
1346 if (GET_CODE (expr
) == SUBREG
)
1347 expr
= SUBREG_REG (expr
);
1351 SET_REGNO_REG_SET ((bitmap
) alt
, REGNO (expr
));
1354 /* Checks whether RHS is simple enough to process. */
1357 simple_rhs_p (rtx rhs
)
1361 if (function_invariant_p (rhs
)
1362 || (REG_P (rhs
) && !HARD_REGISTER_P (rhs
)))
1365 switch (GET_CODE (rhs
))
1370 op0
= XEXP (rhs
, 0);
1371 op1
= XEXP (rhs
, 1);
1372 /* Allow reg OP const and reg OP reg. */
1373 if (!(REG_P (op0
) && !HARD_REGISTER_P (op0
))
1374 && !function_invariant_p (op0
))
1376 if (!(REG_P (op1
) && !HARD_REGISTER_P (op1
))
1377 && !function_invariant_p (op1
))
1386 op0
= XEXP (rhs
, 0);
1387 op1
= XEXP (rhs
, 1);
1388 /* Allow reg OP const. */
1389 if (!(REG_P (op0
) && !HARD_REGISTER_P (op0
)))
1391 if (!function_invariant_p (op1
))
1401 /* If REG has a single definition, replace it with its known value in EXPR.
1402 Callback for for_each_rtx. */
1405 replace_single_def_regs (rtx
*reg
, void *expr1
)
1410 rtx
*expr
= (rtx
*)expr1
;
1415 regno
= REGNO (*reg
);
1419 adef
= DF_REG_DEF_CHAIN (regno
);
1420 if (adef
== NULL
|| DF_REF_NEXT_REG (adef
) != NULL
1421 || DF_REF_IS_ARTIFICIAL (adef
))
1424 set
= single_set (DF_REF_INSN (adef
));
1425 if (set
== NULL
|| !REG_P (SET_DEST (set
))
1426 || REGNO (SET_DEST (set
)) != regno
)
1429 note
= find_reg_equal_equiv_note (DF_REF_INSN (adef
));
1431 if (note
&& function_invariant_p (XEXP (note
, 0)))
1433 src
= XEXP (note
, 0);
1436 src
= SET_SRC (set
);
1440 regno
= REGNO (src
);
1445 if (!function_invariant_p (src
))
1448 *expr
= simplify_replace_rtx (*expr
, *reg
, src
);
1452 /* A subroutine of simplify_using_initial_values, this function examines INSN
1453 to see if it contains a suitable set that we can use to make a replacement.
1454 If it is suitable, return true and set DEST and SRC to the lhs and rhs of
1455 the set; return false otherwise. */
1458 suitable_set_for_replacement (rtx_insn
*insn
, rtx
*dest
, rtx
*src
)
1460 rtx set
= single_set (insn
);
1461 rtx lhs
= NULL_RTX
, rhs
;
1466 lhs
= SET_DEST (set
);
1470 rhs
= find_reg_equal_equiv_note (insn
);
1472 rhs
= XEXP (rhs
, 0);
1474 rhs
= SET_SRC (set
);
1476 if (!simple_rhs_p (rhs
))
1484 /* Using the data returned by suitable_set_for_replacement, replace DEST
1485 with SRC in *EXPR and return the new expression. Also call
1486 replace_single_def_regs if the replacement changed something. */
1488 replace_in_expr (rtx
*expr
, rtx dest
, rtx src
)
1491 *expr
= simplify_replace_rtx (*expr
, dest
, src
);
1494 while (for_each_rtx (expr
, replace_single_def_regs
, expr
) != 0)
1498 /* Checks whether A implies B. */
1501 implies_p (rtx a
, rtx b
)
1503 rtx op0
, op1
, opb0
, opb1
, r
;
1504 enum machine_mode mode
;
1506 if (rtx_equal_p (a
, b
))
1509 if (GET_CODE (a
) == EQ
)
1515 || (GET_CODE (op0
) == SUBREG
1516 && REG_P (SUBREG_REG (op0
))))
1518 r
= simplify_replace_rtx (b
, op0
, op1
);
1519 if (r
== const_true_rtx
)
1524 || (GET_CODE (op1
) == SUBREG
1525 && REG_P (SUBREG_REG (op1
))))
1527 r
= simplify_replace_rtx (b
, op1
, op0
);
1528 if (r
== const_true_rtx
)
1533 if (b
== const_true_rtx
)
1536 if ((GET_RTX_CLASS (GET_CODE (a
)) != RTX_COMM_COMPARE
1537 && GET_RTX_CLASS (GET_CODE (a
)) != RTX_COMPARE
)
1538 || (GET_RTX_CLASS (GET_CODE (b
)) != RTX_COMM_COMPARE
1539 && GET_RTX_CLASS (GET_CODE (b
)) != RTX_COMPARE
))
1547 mode
= GET_MODE (op0
);
1548 if (mode
!= GET_MODE (opb0
))
1550 else if (mode
== VOIDmode
)
1552 mode
= GET_MODE (op1
);
1553 if (mode
!= GET_MODE (opb1
))
1557 /* A < B implies A + 1 <= B. */
1558 if ((GET_CODE (a
) == GT
|| GET_CODE (a
) == LT
)
1559 && (GET_CODE (b
) == GE
|| GET_CODE (b
) == LE
))
1562 if (GET_CODE (a
) == GT
)
1569 if (GET_CODE (b
) == GE
)
1576 if (SCALAR_INT_MODE_P (mode
)
1577 && rtx_equal_p (op1
, opb1
)
1578 && simplify_gen_binary (MINUS
, mode
, opb0
, op0
) == const1_rtx
)
1583 /* A < B or A > B imply A != B. TODO: Likewise
1584 A + n < B implies A != B + n if neither wraps. */
1585 if (GET_CODE (b
) == NE
1586 && (GET_CODE (a
) == GT
|| GET_CODE (a
) == GTU
1587 || GET_CODE (a
) == LT
|| GET_CODE (a
) == LTU
))
1589 if (rtx_equal_p (op0
, opb0
)
1590 && rtx_equal_p (op1
, opb1
))
1594 /* For unsigned comparisons, A != 0 implies A > 0 and A >= 1. */
1595 if (GET_CODE (a
) == NE
1596 && op1
== const0_rtx
)
1598 if ((GET_CODE (b
) == GTU
1599 && opb1
== const0_rtx
)
1600 || (GET_CODE (b
) == GEU
1601 && opb1
== const1_rtx
))
1602 return rtx_equal_p (op0
, opb0
);
1605 /* A != N is equivalent to A - (N + 1) <u -1. */
1606 if (GET_CODE (a
) == NE
1607 && CONST_INT_P (op1
)
1608 && GET_CODE (b
) == LTU
1609 && opb1
== constm1_rtx
1610 && GET_CODE (opb0
) == PLUS
1611 && CONST_INT_P (XEXP (opb0
, 1))
1612 /* Avoid overflows. */
1613 && ((unsigned HOST_WIDE_INT
) INTVAL (XEXP (opb0
, 1))
1614 != ((unsigned HOST_WIDE_INT
)1
1615 << (HOST_BITS_PER_WIDE_INT
- 1)) - 1)
1616 && INTVAL (XEXP (opb0
, 1)) + 1 == -INTVAL (op1
))
1617 return rtx_equal_p (op0
, XEXP (opb0
, 0));
1619 /* Likewise, A != N implies A - N > 0. */
1620 if (GET_CODE (a
) == NE
1621 && CONST_INT_P (op1
))
1623 if (GET_CODE (b
) == GTU
1624 && GET_CODE (opb0
) == PLUS
1625 && opb1
== const0_rtx
1626 && CONST_INT_P (XEXP (opb0
, 1))
1627 /* Avoid overflows. */
1628 && ((unsigned HOST_WIDE_INT
) INTVAL (XEXP (opb0
, 1))
1629 != ((unsigned HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
- 1)))
1630 && rtx_equal_p (XEXP (opb0
, 0), op0
))
1631 return INTVAL (op1
) == -INTVAL (XEXP (opb0
, 1));
1632 if (GET_CODE (b
) == GEU
1633 && GET_CODE (opb0
) == PLUS
1634 && opb1
== const1_rtx
1635 && CONST_INT_P (XEXP (opb0
, 1))
1636 /* Avoid overflows. */
1637 && ((unsigned HOST_WIDE_INT
) INTVAL (XEXP (opb0
, 1))
1638 != ((unsigned HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
- 1)))
1639 && rtx_equal_p (XEXP (opb0
, 0), op0
))
1640 return INTVAL (op1
) == -INTVAL (XEXP (opb0
, 1));
1643 /* A >s X, where X is positive, implies A <u Y, if Y is negative. */
1644 if ((GET_CODE (a
) == GT
|| GET_CODE (a
) == GE
)
1645 && CONST_INT_P (op1
)
1646 && ((GET_CODE (a
) == GT
&& op1
== constm1_rtx
)
1647 || INTVAL (op1
) >= 0)
1648 && GET_CODE (b
) == LTU
1649 && CONST_INT_P (opb1
)
1650 && rtx_equal_p (op0
, opb0
))
1651 return INTVAL (opb1
) < 0;
1656 /* Canonicalizes COND so that
1658 (1) Ensure that operands are ordered according to
1659 swap_commutative_operands_p.
1660 (2) (LE x const) will be replaced with (LT x <const+1>) and similarly
1661 for GE, GEU, and LEU. */
1664 canon_condition (rtx cond
)
1669 enum machine_mode mode
;
1671 code
= GET_CODE (cond
);
1672 op0
= XEXP (cond
, 0);
1673 op1
= XEXP (cond
, 1);
1675 if (swap_commutative_operands_p (op0
, op1
))
1677 code
= swap_condition (code
);
1683 mode
= GET_MODE (op0
);
1684 if (mode
== VOIDmode
)
1685 mode
= GET_MODE (op1
);
1686 gcc_assert (mode
!= VOIDmode
);
1688 if (CONST_INT_P (op1
)
1689 && GET_MODE_CLASS (mode
) != MODE_CC
1690 && GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
1692 HOST_WIDE_INT const_val
= INTVAL (op1
);
1693 unsigned HOST_WIDE_INT uconst_val
= const_val
;
1694 unsigned HOST_WIDE_INT max_val
1695 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (mode
);
1700 if ((unsigned HOST_WIDE_INT
) const_val
!= max_val
>> 1)
1701 code
= LT
, op1
= gen_int_mode (const_val
+ 1, GET_MODE (op0
));
1704 /* When cross-compiling, const_val might be sign-extended from
1705 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
1707 if ((HOST_WIDE_INT
) (const_val
& max_val
)
1708 != (((HOST_WIDE_INT
) 1
1709 << (GET_MODE_BITSIZE (GET_MODE (op0
)) - 1))))
1710 code
= GT
, op1
= gen_int_mode (const_val
- 1, mode
);
1714 if (uconst_val
< max_val
)
1715 code
= LTU
, op1
= gen_int_mode (uconst_val
+ 1, mode
);
1719 if (uconst_val
!= 0)
1720 code
= GTU
, op1
= gen_int_mode (uconst_val
- 1, mode
);
1728 if (op0
!= XEXP (cond
, 0)
1729 || op1
!= XEXP (cond
, 1)
1730 || code
!= GET_CODE (cond
)
1731 || GET_MODE (cond
) != SImode
)
1732 cond
= gen_rtx_fmt_ee (code
, SImode
, op0
, op1
);
1737 /* Reverses CONDition; returns NULL if we cannot. */
1740 reversed_condition (rtx cond
)
1742 enum rtx_code reversed
;
1743 reversed
= reversed_comparison_code (cond
, NULL
);
1744 if (reversed
== UNKNOWN
)
1747 return gen_rtx_fmt_ee (reversed
,
1748 GET_MODE (cond
), XEXP (cond
, 0),
1752 /* Tries to use the fact that COND holds to simplify EXPR. ALTERED is the
1753 set of altered regs. */
1756 simplify_using_condition (rtx cond
, rtx
*expr
, regset altered
)
1758 rtx rev
, reve
, exp
= *expr
;
1760 /* If some register gets altered later, we do not really speak about its
1761 value at the time of comparison. */
1763 && for_each_rtx (&cond
, altered_reg_used
, altered
))
1766 if (GET_CODE (cond
) == EQ
1767 && REG_P (XEXP (cond
, 0)) && CONSTANT_P (XEXP (cond
, 1)))
1769 *expr
= simplify_replace_rtx (*expr
, XEXP (cond
, 0), XEXP (cond
, 1));
1773 if (!COMPARISON_P (exp
))
1776 rev
= reversed_condition (cond
);
1777 reve
= reversed_condition (exp
);
1779 cond
= canon_condition (cond
);
1780 exp
= canon_condition (exp
);
1782 rev
= canon_condition (rev
);
1784 reve
= canon_condition (reve
);
1786 if (rtx_equal_p (exp
, cond
))
1788 *expr
= const_true_rtx
;
1792 if (rev
&& rtx_equal_p (exp
, rev
))
1798 if (implies_p (cond
, exp
))
1800 *expr
= const_true_rtx
;
1804 if (reve
&& implies_p (cond
, reve
))
1810 /* A proof by contradiction. If *EXPR implies (not cond), *EXPR must
1812 if (rev
&& implies_p (exp
, rev
))
1818 /* Similarly, If (not *EXPR) implies (not cond), *EXPR must be true. */
1819 if (rev
&& reve
&& implies_p (reve
, rev
))
1821 *expr
= const_true_rtx
;
1825 /* We would like to have some other tests here. TODO. */
1830 /* Use relationship between A and *B to eventually eliminate *B.
1831 OP is the operation we consider. */
1834 eliminate_implied_condition (enum rtx_code op
, rtx a
, rtx
*b
)
1839 /* If A implies *B, we may replace *B by true. */
1840 if (implies_p (a
, *b
))
1841 *b
= const_true_rtx
;
1845 /* If *B implies A, we may replace *B by false. */
1846 if (implies_p (*b
, a
))
1855 /* Eliminates the conditions in TAIL that are implied by HEAD. OP is the
1856 operation we consider. */
1859 eliminate_implied_conditions (enum rtx_code op
, rtx
*head
, rtx tail
)
1863 for (elt
= tail
; elt
; elt
= XEXP (elt
, 1))
1864 eliminate_implied_condition (op
, *head
, &XEXP (elt
, 0));
1865 for (elt
= tail
; elt
; elt
= XEXP (elt
, 1))
1866 eliminate_implied_condition (op
, XEXP (elt
, 0), head
);
1869 /* Simplifies *EXPR using initial values at the start of the LOOP. If *EXPR
1870 is a list, its elements are assumed to be combined using OP. */
1873 simplify_using_initial_values (struct loop
*loop
, enum rtx_code op
, rtx
*expr
)
1875 bool expression_valid
;
1876 rtx head
, tail
, cond_list
, last_valid_expr
;
1879 regset altered
, this_altered
;
1885 if (CONSTANT_P (*expr
))
1888 if (GET_CODE (*expr
) == EXPR_LIST
)
1890 head
= XEXP (*expr
, 0);
1891 tail
= XEXP (*expr
, 1);
1893 eliminate_implied_conditions (op
, &head
, tail
);
1898 neutral
= const_true_rtx
;
1903 neutral
= const0_rtx
;
1904 aggr
= const_true_rtx
;
1911 simplify_using_initial_values (loop
, UNKNOWN
, &head
);
1914 XEXP (*expr
, 0) = aggr
;
1915 XEXP (*expr
, 1) = NULL_RTX
;
1918 else if (head
== neutral
)
1921 simplify_using_initial_values (loop
, op
, expr
);
1924 simplify_using_initial_values (loop
, op
, &tail
);
1926 if (tail
&& XEXP (tail
, 0) == aggr
)
1932 XEXP (*expr
, 0) = head
;
1933 XEXP (*expr
, 1) = tail
;
1937 gcc_assert (op
== UNKNOWN
);
1940 if (for_each_rtx (expr
, replace_single_def_regs
, expr
) == 0)
1942 if (CONSTANT_P (*expr
))
1945 e
= loop_preheader_edge (loop
);
1946 if (e
->src
== ENTRY_BLOCK_PTR_FOR_FN (cfun
))
1949 altered
= ALLOC_REG_SET (®_obstack
);
1950 this_altered
= ALLOC_REG_SET (®_obstack
);
1952 expression_valid
= true;
1953 last_valid_expr
= *expr
;
1954 cond_list
= NULL_RTX
;
1957 insn
= BB_END (e
->src
);
1958 if (any_condjump_p (insn
))
1960 rtx cond
= get_condition (BB_END (e
->src
), NULL
, false, true);
1962 if (cond
&& (e
->flags
& EDGE_FALLTHRU
))
1963 cond
= reversed_condition (cond
);
1967 simplify_using_condition (cond
, expr
, altered
);
1971 if (CONSTANT_P (*expr
))
1973 for (note
= cond_list
; note
; note
= XEXP (note
, 1))
1975 simplify_using_condition (XEXP (note
, 0), expr
, altered
);
1976 if (CONSTANT_P (*expr
))
1980 cond_list
= alloc_EXPR_LIST (0, cond
, cond_list
);
1984 FOR_BB_INSNS_REVERSE (e
->src
, insn
)
1992 CLEAR_REG_SET (this_altered
);
1993 note_stores (PATTERN (insn
), mark_altered
, this_altered
);
1996 /* Kill all call clobbered registers. */
1998 hard_reg_set_iterator hrsi
;
1999 EXECUTE_IF_SET_IN_HARD_REG_SET (regs_invalidated_by_call
,
2001 SET_REGNO_REG_SET (this_altered
, i
);
2004 if (suitable_set_for_replacement (insn
, &dest
, &src
))
2006 rtx
*pnote
, *pnote_next
;
2008 replace_in_expr (expr
, dest
, src
);
2009 if (CONSTANT_P (*expr
))
2012 for (pnote
= &cond_list
; *pnote
; pnote
= pnote_next
)
2015 rtx old_cond
= XEXP (note
, 0);
2017 pnote_next
= &XEXP (note
, 1);
2018 replace_in_expr (&XEXP (note
, 0), dest
, src
);
2020 /* We can no longer use a condition that has been simplified
2021 to a constant, and simplify_using_condition will abort if
2023 if (CONSTANT_P (XEXP (note
, 0)))
2025 *pnote
= *pnote_next
;
2027 free_EXPR_LIST_node (note
);
2029 /* Retry simplifications with this condition if either the
2030 expression or the condition changed. */
2031 else if (old_cond
!= XEXP (note
, 0) || old
!= *expr
)
2032 simplify_using_condition (XEXP (note
, 0), expr
, altered
);
2037 rtx
*pnote
, *pnote_next
;
2039 /* If we did not use this insn to make a replacement, any overlap
2040 between stores in this insn and our expression will cause the
2041 expression to become invalid. */
2042 if (for_each_rtx (expr
, altered_reg_used
, this_altered
))
2045 /* Likewise for the conditions. */
2046 for (pnote
= &cond_list
; *pnote
; pnote
= pnote_next
)
2049 rtx old_cond
= XEXP (note
, 0);
2051 pnote_next
= &XEXP (note
, 1);
2052 if (for_each_rtx (&old_cond
, altered_reg_used
, this_altered
))
2054 *pnote
= *pnote_next
;
2056 free_EXPR_LIST_node (note
);
2061 if (CONSTANT_P (*expr
))
2064 IOR_REG_SET (altered
, this_altered
);
2066 /* If the expression now contains regs that have been altered, we
2067 can't return it to the caller. However, it is still valid for
2068 further simplification, so keep searching to see if we can
2069 eventually turn it into a constant. */
2070 if (for_each_rtx (expr
, altered_reg_used
, altered
))
2071 expression_valid
= false;
2072 if (expression_valid
)
2073 last_valid_expr
= *expr
;
2076 if (!single_pred_p (e
->src
)
2077 || single_pred (e
->src
) == ENTRY_BLOCK_PTR_FOR_FN (cfun
))
2079 e
= single_pred_edge (e
->src
);
2083 free_EXPR_LIST_list (&cond_list
);
2084 if (!CONSTANT_P (*expr
))
2085 *expr
= last_valid_expr
;
2086 FREE_REG_SET (altered
);
2087 FREE_REG_SET (this_altered
);
2090 /* Transforms invariant IV into MODE. Adds assumptions based on the fact
2091 that IV occurs as left operands of comparison COND and its signedness
2092 is SIGNED_P to DESC. */
2095 shorten_into_mode (struct rtx_iv
*iv
, enum machine_mode mode
,
2096 enum rtx_code cond
, bool signed_p
, struct niter_desc
*desc
)
2098 rtx mmin
, mmax
, cond_over
, cond_under
;
2100 get_mode_bounds (mode
, signed_p
, iv
->extend_mode
, &mmin
, &mmax
);
2101 cond_under
= simplify_gen_relational (LT
, SImode
, iv
->extend_mode
,
2103 cond_over
= simplify_gen_relational (GT
, SImode
, iv
->extend_mode
,
2112 if (cond_under
!= const0_rtx
)
2114 alloc_EXPR_LIST (0, cond_under
, desc
->infinite
);
2115 if (cond_over
!= const0_rtx
)
2116 desc
->noloop_assumptions
=
2117 alloc_EXPR_LIST (0, cond_over
, desc
->noloop_assumptions
);
2124 if (cond_over
!= const0_rtx
)
2126 alloc_EXPR_LIST (0, cond_over
, desc
->infinite
);
2127 if (cond_under
!= const0_rtx
)
2128 desc
->noloop_assumptions
=
2129 alloc_EXPR_LIST (0, cond_under
, desc
->noloop_assumptions
);
2133 if (cond_over
!= const0_rtx
)
2135 alloc_EXPR_LIST (0, cond_over
, desc
->infinite
);
2136 if (cond_under
!= const0_rtx
)
2138 alloc_EXPR_LIST (0, cond_under
, desc
->infinite
);
2146 iv
->extend
= signed_p
? IV_SIGN_EXTEND
: IV_ZERO_EXTEND
;
2149 /* Transforms IV0 and IV1 compared by COND so that they are both compared as
2150 subregs of the same mode if possible (sometimes it is necessary to add
2151 some assumptions to DESC). */
2154 canonicalize_iv_subregs (struct rtx_iv
*iv0
, struct rtx_iv
*iv1
,
2155 enum rtx_code cond
, struct niter_desc
*desc
)
2157 enum machine_mode comp_mode
;
2160 /* If the ivs behave specially in the first iteration, or are
2161 added/multiplied after extending, we ignore them. */
2162 if (iv0
->first_special
|| iv0
->mult
!= const1_rtx
|| iv0
->delta
!= const0_rtx
)
2164 if (iv1
->first_special
|| iv1
->mult
!= const1_rtx
|| iv1
->delta
!= const0_rtx
)
2167 /* If there is some extend, it must match signedness of the comparison. */
2172 if (iv0
->extend
== IV_ZERO_EXTEND
2173 || iv1
->extend
== IV_ZERO_EXTEND
)
2180 if (iv0
->extend
== IV_SIGN_EXTEND
2181 || iv1
->extend
== IV_SIGN_EXTEND
)
2187 if (iv0
->extend
!= IV_UNKNOWN_EXTEND
2188 && iv1
->extend
!= IV_UNKNOWN_EXTEND
2189 && iv0
->extend
!= iv1
->extend
)
2193 if (iv0
->extend
!= IV_UNKNOWN_EXTEND
)
2194 signed_p
= iv0
->extend
== IV_SIGN_EXTEND
;
2195 if (iv1
->extend
!= IV_UNKNOWN_EXTEND
)
2196 signed_p
= iv1
->extend
== IV_SIGN_EXTEND
;
2203 /* Values of both variables should be computed in the same mode. These
2204 might indeed be different, if we have comparison like
2206 (compare (subreg:SI (iv0)) (subreg:SI (iv1)))
2208 and iv0 and iv1 are both ivs iterating in SI mode, but calculated
2209 in different modes. This does not seem impossible to handle, but
2210 it hardly ever occurs in practice.
2212 The only exception is the case when one of operands is invariant.
2213 For example pentium 3 generates comparisons like
2214 (lt (subreg:HI (reg:SI)) 100). Here we assign HImode to 100, but we
2215 definitely do not want this prevent the optimization. */
2216 comp_mode
= iv0
->extend_mode
;
2217 if (GET_MODE_BITSIZE (comp_mode
) < GET_MODE_BITSIZE (iv1
->extend_mode
))
2218 comp_mode
= iv1
->extend_mode
;
2220 if (iv0
->extend_mode
!= comp_mode
)
2222 if (iv0
->mode
!= iv0
->extend_mode
2223 || iv0
->step
!= const0_rtx
)
2226 iv0
->base
= simplify_gen_unary (signed_p
? SIGN_EXTEND
: ZERO_EXTEND
,
2227 comp_mode
, iv0
->base
, iv0
->mode
);
2228 iv0
->extend_mode
= comp_mode
;
2231 if (iv1
->extend_mode
!= comp_mode
)
2233 if (iv1
->mode
!= iv1
->extend_mode
2234 || iv1
->step
!= const0_rtx
)
2237 iv1
->base
= simplify_gen_unary (signed_p
? SIGN_EXTEND
: ZERO_EXTEND
,
2238 comp_mode
, iv1
->base
, iv1
->mode
);
2239 iv1
->extend_mode
= comp_mode
;
2242 /* Check that both ivs belong to a range of a single mode. If one of the
2243 operands is an invariant, we may need to shorten it into the common
2245 if (iv0
->mode
== iv0
->extend_mode
2246 && iv0
->step
== const0_rtx
2247 && iv0
->mode
!= iv1
->mode
)
2248 shorten_into_mode (iv0
, iv1
->mode
, cond
, signed_p
, desc
);
2250 if (iv1
->mode
== iv1
->extend_mode
2251 && iv1
->step
== const0_rtx
2252 && iv0
->mode
!= iv1
->mode
)
2253 shorten_into_mode (iv1
, iv0
->mode
, swap_condition (cond
), signed_p
, desc
);
2255 if (iv0
->mode
!= iv1
->mode
)
2258 desc
->mode
= iv0
->mode
;
2259 desc
->signed_p
= signed_p
;
2264 /* Tries to estimate the maximum number of iterations in LOOP, and return the
2265 result. This function is called from iv_number_of_iterations with
2266 a number of fields in DESC already filled in. OLD_NITER is the original
2267 expression for the number of iterations, before we tried to simplify it. */
2270 determine_max_iter (struct loop
*loop
, struct niter_desc
*desc
, rtx old_niter
)
2272 rtx niter
= desc
->niter_expr
;
2273 rtx mmin
, mmax
, cmp
;
2275 uint64_t andmax
= 0;
2277 /* We used to look for constant operand 0 of AND,
2278 but canonicalization should always make this impossible. */
2279 gcc_checking_assert (GET_CODE (niter
) != AND
2280 || !CONST_INT_P (XEXP (niter
, 0)));
2282 if (GET_CODE (niter
) == AND
2283 && CONST_INT_P (XEXP (niter
, 1)))
2285 andmax
= UINTVAL (XEXP (niter
, 1));
2286 niter
= XEXP (niter
, 0);
2289 get_mode_bounds (desc
->mode
, desc
->signed_p
, desc
->mode
, &mmin
, &mmax
);
2290 nmax
= INTVAL (mmax
) - INTVAL (mmin
);
2292 if (GET_CODE (niter
) == UDIV
)
2294 if (!CONST_INT_P (XEXP (niter
, 1)))
2296 inc
= INTVAL (XEXP (niter
, 1));
2297 niter
= XEXP (niter
, 0);
2302 /* We could use a binary search here, but for now improving the upper
2303 bound by just one eliminates one important corner case. */
2304 cmp
= simplify_gen_relational (desc
->signed_p
? LT
: LTU
, VOIDmode
,
2305 desc
->mode
, old_niter
, mmax
);
2306 simplify_using_initial_values (loop
, UNKNOWN
, &cmp
);
2307 if (cmp
== const_true_rtx
)
2312 fprintf (dump_file
, ";; improved upper bound by one.\n");
2316 nmax
= MIN (nmax
, andmax
);
2318 fprintf (dump_file
, ";; Determined upper bound %"PRId64
".\n",
2323 /* Computes number of iterations of the CONDITION in INSN in LOOP and stores
2324 the result into DESC. Very similar to determine_number_of_iterations
2325 (basically its rtl version), complicated by things like subregs. */
2328 iv_number_of_iterations (struct loop
*loop
, rtx_insn
*insn
, rtx condition
,
2329 struct niter_desc
*desc
)
2331 rtx op0
, op1
, delta
, step
, bound
, may_xform
, tmp
, tmp0
, tmp1
;
2332 struct rtx_iv iv0
, iv1
, tmp_iv
;
2333 rtx assumption
, may_not_xform
;
2335 enum machine_mode mode
, comp_mode
;
2336 rtx mmin
, mmax
, mode_mmin
, mode_mmax
;
2337 uint64_t s
, size
, d
, inv
, max
;
2338 int64_t up
, down
, inc
, step_val
;
2339 int was_sharp
= false;
2343 /* The meaning of these assumptions is this:
2345 then the rest of information does not have to be valid
2346 if noloop_assumptions then the loop does not roll
2347 if infinite then this exit is never used */
2349 desc
->assumptions
= NULL_RTX
;
2350 desc
->noloop_assumptions
= NULL_RTX
;
2351 desc
->infinite
= NULL_RTX
;
2352 desc
->simple_p
= true;
2354 desc
->const_iter
= false;
2355 desc
->niter_expr
= NULL_RTX
;
2357 cond
= GET_CODE (condition
);
2358 gcc_assert (COMPARISON_P (condition
));
2360 mode
= GET_MODE (XEXP (condition
, 0));
2361 if (mode
== VOIDmode
)
2362 mode
= GET_MODE (XEXP (condition
, 1));
2363 /* The constant comparisons should be folded. */
2364 gcc_assert (mode
!= VOIDmode
);
2366 /* We only handle integers or pointers. */
2367 if (GET_MODE_CLASS (mode
) != MODE_INT
2368 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
)
2371 op0
= XEXP (condition
, 0);
2372 if (!iv_analyze (insn
, op0
, &iv0
))
2374 if (iv0
.extend_mode
== VOIDmode
)
2375 iv0
.mode
= iv0
.extend_mode
= mode
;
2377 op1
= XEXP (condition
, 1);
2378 if (!iv_analyze (insn
, op1
, &iv1
))
2380 if (iv1
.extend_mode
== VOIDmode
)
2381 iv1
.mode
= iv1
.extend_mode
= mode
;
2383 if (GET_MODE_BITSIZE (iv0
.extend_mode
) > HOST_BITS_PER_WIDE_INT
2384 || GET_MODE_BITSIZE (iv1
.extend_mode
) > HOST_BITS_PER_WIDE_INT
)
2387 /* Check condition and normalize it. */
2395 tmp_iv
= iv0
; iv0
= iv1
; iv1
= tmp_iv
;
2396 cond
= swap_condition (cond
);
2408 /* Handle extends. This is relatively nontrivial, so we only try in some
2409 easy cases, when we can canonicalize the ivs (possibly by adding some
2410 assumptions) to shape subreg (base + i * step). This function also fills
2411 in desc->mode and desc->signed_p. */
2413 if (!canonicalize_iv_subregs (&iv0
, &iv1
, cond
, desc
))
2416 comp_mode
= iv0
.extend_mode
;
2418 size
= GET_MODE_BITSIZE (mode
);
2419 get_mode_bounds (mode
, (cond
== LE
|| cond
== LT
), comp_mode
, &mmin
, &mmax
);
2420 mode_mmin
= lowpart_subreg (mode
, mmin
, comp_mode
);
2421 mode_mmax
= lowpart_subreg (mode
, mmax
, comp_mode
);
2423 if (!CONST_INT_P (iv0
.step
) || !CONST_INT_P (iv1
.step
))
2426 /* We can take care of the case of two induction variables chasing each other
2427 if the test is NE. I have never seen a loop using it, but still it is
2429 if (iv0
.step
!= const0_rtx
&& iv1
.step
!= const0_rtx
)
2434 iv0
.step
= simplify_gen_binary (MINUS
, comp_mode
, iv0
.step
, iv1
.step
);
2435 iv1
.step
= const0_rtx
;
2438 iv0
.step
= lowpart_subreg (mode
, iv0
.step
, comp_mode
);
2439 iv1
.step
= lowpart_subreg (mode
, iv1
.step
, comp_mode
);
2441 /* This is either infinite loop or the one that ends immediately, depending
2442 on initial values. Unswitching should remove this kind of conditions. */
2443 if (iv0
.step
== const0_rtx
&& iv1
.step
== const0_rtx
)
2448 if (iv0
.step
== const0_rtx
)
2449 step_val
= -INTVAL (iv1
.step
);
2451 step_val
= INTVAL (iv0
.step
);
2453 /* Ignore loops of while (i-- < 10) type. */
2457 step_is_pow2
= !(step_val
& (step_val
- 1));
2461 /* We do not care about whether the step is power of two in this
2463 step_is_pow2
= false;
2467 /* Some more condition normalization. We must record some assumptions
2468 due to overflows. */
2473 /* We want to take care only of non-sharp relationals; this is easy,
2474 as in cases the overflow would make the transformation unsafe
2475 the loop does not roll. Seemingly it would make more sense to want
2476 to take care of sharp relationals instead, as NE is more similar to
2477 them, but the problem is that here the transformation would be more
2478 difficult due to possibly infinite loops. */
2479 if (iv0
.step
== const0_rtx
)
2481 tmp
= lowpart_subreg (mode
, iv0
.base
, comp_mode
);
2482 assumption
= simplify_gen_relational (EQ
, SImode
, mode
, tmp
,
2484 if (assumption
== const_true_rtx
)
2485 goto zero_iter_simplify
;
2486 iv0
.base
= simplify_gen_binary (PLUS
, comp_mode
,
2487 iv0
.base
, const1_rtx
);
2491 tmp
= lowpart_subreg (mode
, iv1
.base
, comp_mode
);
2492 assumption
= simplify_gen_relational (EQ
, SImode
, mode
, tmp
,
2494 if (assumption
== const_true_rtx
)
2495 goto zero_iter_simplify
;
2496 iv1
.base
= simplify_gen_binary (PLUS
, comp_mode
,
2497 iv1
.base
, constm1_rtx
);
2500 if (assumption
!= const0_rtx
)
2501 desc
->noloop_assumptions
=
2502 alloc_EXPR_LIST (0, assumption
, desc
->noloop_assumptions
);
2503 cond
= (cond
== LT
) ? LE
: LEU
;
2505 /* It will be useful to be able to tell the difference once more in
2506 LE -> NE reduction. */
2512 /* Take care of trivially infinite loops. */
2515 if (iv0
.step
== const0_rtx
)
2517 tmp
= lowpart_subreg (mode
, iv0
.base
, comp_mode
);
2518 if (rtx_equal_p (tmp
, mode_mmin
))
2521 alloc_EXPR_LIST (0, const_true_rtx
, NULL_RTX
);
2522 /* Fill in the remaining fields somehow. */
2523 goto zero_iter_simplify
;
2528 tmp
= lowpart_subreg (mode
, iv1
.base
, comp_mode
);
2529 if (rtx_equal_p (tmp
, mode_mmax
))
2532 alloc_EXPR_LIST (0, const_true_rtx
, NULL_RTX
);
2533 /* Fill in the remaining fields somehow. */
2534 goto zero_iter_simplify
;
2539 /* If we can we want to take care of NE conditions instead of size
2540 comparisons, as they are much more friendly (most importantly
2541 this takes care of special handling of loops with step 1). We can
2542 do it if we first check that upper bound is greater or equal to
2543 lower bound, their difference is constant c modulo step and that
2544 there is not an overflow. */
2547 if (iv0
.step
== const0_rtx
)
2548 step
= simplify_gen_unary (NEG
, comp_mode
, iv1
.step
, comp_mode
);
2551 step
= lowpart_subreg (mode
, step
, comp_mode
);
2552 delta
= simplify_gen_binary (MINUS
, comp_mode
, iv1
.base
, iv0
.base
);
2553 delta
= lowpart_subreg (mode
, delta
, comp_mode
);
2554 delta
= simplify_gen_binary (UMOD
, mode
, delta
, step
);
2555 may_xform
= const0_rtx
;
2556 may_not_xform
= const_true_rtx
;
2558 if (CONST_INT_P (delta
))
2560 if (was_sharp
&& INTVAL (delta
) == INTVAL (step
) - 1)
2562 /* A special case. We have transformed condition of type
2563 for (i = 0; i < 4; i += 4)
2565 for (i = 0; i <= 3; i += 4)
2566 obviously if the test for overflow during that transformation
2567 passed, we cannot overflow here. Most importantly any
2568 loop with sharp end condition and step 1 falls into this
2569 category, so handling this case specially is definitely
2570 worth the troubles. */
2571 may_xform
= const_true_rtx
;
2573 else if (iv0
.step
== const0_rtx
)
2575 bound
= simplify_gen_binary (PLUS
, comp_mode
, mmin
, step
);
2576 bound
= simplify_gen_binary (MINUS
, comp_mode
, bound
, delta
);
2577 bound
= lowpart_subreg (mode
, bound
, comp_mode
);
2578 tmp
= lowpart_subreg (mode
, iv0
.base
, comp_mode
);
2579 may_xform
= simplify_gen_relational (cond
, SImode
, mode
,
2581 may_not_xform
= simplify_gen_relational (reverse_condition (cond
),
2587 bound
= simplify_gen_binary (MINUS
, comp_mode
, mmax
, step
);
2588 bound
= simplify_gen_binary (PLUS
, comp_mode
, bound
, delta
);
2589 bound
= lowpart_subreg (mode
, bound
, comp_mode
);
2590 tmp
= lowpart_subreg (mode
, iv1
.base
, comp_mode
);
2591 may_xform
= simplify_gen_relational (cond
, SImode
, mode
,
2593 may_not_xform
= simplify_gen_relational (reverse_condition (cond
),
2599 if (may_xform
!= const0_rtx
)
2601 /* We perform the transformation always provided that it is not
2602 completely senseless. This is OK, as we would need this assumption
2603 to determine the number of iterations anyway. */
2604 if (may_xform
!= const_true_rtx
)
2606 /* If the step is a power of two and the final value we have
2607 computed overflows, the cycle is infinite. Otherwise it
2608 is nontrivial to compute the number of iterations. */
2610 desc
->infinite
= alloc_EXPR_LIST (0, may_not_xform
,
2613 desc
->assumptions
= alloc_EXPR_LIST (0, may_xform
,
2617 /* We are going to lose some information about upper bound on
2618 number of iterations in this step, so record the information
2620 inc
= INTVAL (iv0
.step
) - INTVAL (iv1
.step
);
2621 if (CONST_INT_P (iv1
.base
))
2622 up
= INTVAL (iv1
.base
);
2624 up
= INTVAL (mode_mmax
) - inc
;
2625 down
= INTVAL (CONST_INT_P (iv0
.base
)
2628 max
= (up
- down
) / inc
+ 1;
2630 && !desc
->assumptions
)
2631 record_niter_bound (loop
, max
, false, true);
2633 if (iv0
.step
== const0_rtx
)
2635 iv0
.base
= simplify_gen_binary (PLUS
, comp_mode
, iv0
.base
, delta
);
2636 iv0
.base
= simplify_gen_binary (MINUS
, comp_mode
, iv0
.base
, step
);
2640 iv1
.base
= simplify_gen_binary (MINUS
, comp_mode
, iv1
.base
, delta
);
2641 iv1
.base
= simplify_gen_binary (PLUS
, comp_mode
, iv1
.base
, step
);
2644 tmp0
= lowpart_subreg (mode
, iv0
.base
, comp_mode
);
2645 tmp1
= lowpart_subreg (mode
, iv1
.base
, comp_mode
);
2646 assumption
= simplify_gen_relational (reverse_condition (cond
),
2647 SImode
, mode
, tmp0
, tmp1
);
2648 if (assumption
== const_true_rtx
)
2649 goto zero_iter_simplify
;
2650 else if (assumption
!= const0_rtx
)
2651 desc
->noloop_assumptions
=
2652 alloc_EXPR_LIST (0, assumption
, desc
->noloop_assumptions
);
2657 /* Count the number of iterations. */
2660 /* Everything we do here is just arithmetics modulo size of mode. This
2661 makes us able to do more involved computations of number of iterations
2662 than in other cases. First transform the condition into shape
2663 s * i <> c, with s positive. */
2664 iv1
.base
= simplify_gen_binary (MINUS
, comp_mode
, iv1
.base
, iv0
.base
);
2665 iv0
.base
= const0_rtx
;
2666 iv0
.step
= simplify_gen_binary (MINUS
, comp_mode
, iv0
.step
, iv1
.step
);
2667 iv1
.step
= const0_rtx
;
2668 if (INTVAL (iv0
.step
) < 0)
2670 iv0
.step
= simplify_gen_unary (NEG
, comp_mode
, iv0
.step
, comp_mode
);
2671 iv1
.base
= simplify_gen_unary (NEG
, comp_mode
, iv1
.base
, comp_mode
);
2673 iv0
.step
= lowpart_subreg (mode
, iv0
.step
, comp_mode
);
2675 /* Let nsd (s, size of mode) = d. If d does not divide c, the loop
2676 is infinite. Otherwise, the number of iterations is
2677 (inverse(s/d) * (c/d)) mod (size of mode/d). */
2678 s
= INTVAL (iv0
.step
); d
= 1;
2685 bound
= GEN_INT (((uint64_t) 1 << (size
- 1 ) << 1) - 1);
2687 tmp1
= lowpart_subreg (mode
, iv1
.base
, comp_mode
);
2688 tmp
= simplify_gen_binary (UMOD
, mode
, tmp1
, gen_int_mode (d
, mode
));
2689 assumption
= simplify_gen_relational (NE
, SImode
, mode
, tmp
, const0_rtx
);
2690 desc
->infinite
= alloc_EXPR_LIST (0, assumption
, desc
->infinite
);
2692 tmp
= simplify_gen_binary (UDIV
, mode
, tmp1
, gen_int_mode (d
, mode
));
2693 inv
= inverse (s
, size
);
2694 tmp
= simplify_gen_binary (MULT
, mode
, tmp
, gen_int_mode (inv
, mode
));
2695 desc
->niter_expr
= simplify_gen_binary (AND
, mode
, tmp
, bound
);
2699 if (iv1
.step
== const0_rtx
)
2700 /* Condition in shape a + s * i <= b
2701 We must know that b + s does not overflow and a <= b + s and then we
2702 can compute number of iterations as (b + s - a) / s. (It might
2703 seem that we in fact could be more clever about testing the b + s
2704 overflow condition using some information about b - a mod s,
2705 but it was already taken into account during LE -> NE transform). */
2708 tmp0
= lowpart_subreg (mode
, iv0
.base
, comp_mode
);
2709 tmp1
= lowpart_subreg (mode
, iv1
.base
, comp_mode
);
2711 bound
= simplify_gen_binary (MINUS
, mode
, mode_mmax
,
2712 lowpart_subreg (mode
, step
,
2718 /* If s is power of 2, we know that the loop is infinite if
2719 a % s <= b % s and b + s overflows. */
2720 assumption
= simplify_gen_relational (reverse_condition (cond
),
2724 t0
= simplify_gen_binary (UMOD
, mode
, copy_rtx (tmp0
), step
);
2725 t1
= simplify_gen_binary (UMOD
, mode
, copy_rtx (tmp1
), step
);
2726 tmp
= simplify_gen_relational (cond
, SImode
, mode
, t0
, t1
);
2727 assumption
= simplify_gen_binary (AND
, SImode
, assumption
, tmp
);
2729 alloc_EXPR_LIST (0, assumption
, desc
->infinite
);
2733 assumption
= simplify_gen_relational (cond
, SImode
, mode
,
2736 alloc_EXPR_LIST (0, assumption
, desc
->assumptions
);
2739 tmp
= simplify_gen_binary (PLUS
, comp_mode
, iv1
.base
, iv0
.step
);
2740 tmp
= lowpart_subreg (mode
, tmp
, comp_mode
);
2741 assumption
= simplify_gen_relational (reverse_condition (cond
),
2742 SImode
, mode
, tmp0
, tmp
);
2744 delta
= simplify_gen_binary (PLUS
, mode
, tmp1
, step
);
2745 delta
= simplify_gen_binary (MINUS
, mode
, delta
, tmp0
);
2749 /* Condition in shape a <= b - s * i
2750 We must know that a - s does not overflow and a - s <= b and then
2751 we can again compute number of iterations as (b - (a - s)) / s. */
2752 step
= simplify_gen_unary (NEG
, mode
, iv1
.step
, mode
);
2753 tmp0
= lowpart_subreg (mode
, iv0
.base
, comp_mode
);
2754 tmp1
= lowpart_subreg (mode
, iv1
.base
, comp_mode
);
2756 bound
= simplify_gen_binary (PLUS
, mode
, mode_mmin
,
2757 lowpart_subreg (mode
, step
, comp_mode
));
2762 /* If s is power of 2, we know that the loop is infinite if
2763 a % s <= b % s and a - s overflows. */
2764 assumption
= simplify_gen_relational (reverse_condition (cond
),
2768 t0
= simplify_gen_binary (UMOD
, mode
, copy_rtx (tmp0
), step
);
2769 t1
= simplify_gen_binary (UMOD
, mode
, copy_rtx (tmp1
), step
);
2770 tmp
= simplify_gen_relational (cond
, SImode
, mode
, t0
, t1
);
2771 assumption
= simplify_gen_binary (AND
, SImode
, assumption
, tmp
);
2773 alloc_EXPR_LIST (0, assumption
, desc
->infinite
);
2777 assumption
= simplify_gen_relational (cond
, SImode
, mode
,
2780 alloc_EXPR_LIST (0, assumption
, desc
->assumptions
);
2783 tmp
= simplify_gen_binary (PLUS
, comp_mode
, iv0
.base
, iv1
.step
);
2784 tmp
= lowpart_subreg (mode
, tmp
, comp_mode
);
2785 assumption
= simplify_gen_relational (reverse_condition (cond
),
2788 delta
= simplify_gen_binary (MINUS
, mode
, tmp0
, step
);
2789 delta
= simplify_gen_binary (MINUS
, mode
, tmp1
, delta
);
2791 if (assumption
== const_true_rtx
)
2792 goto zero_iter_simplify
;
2793 else if (assumption
!= const0_rtx
)
2794 desc
->noloop_assumptions
=
2795 alloc_EXPR_LIST (0, assumption
, desc
->noloop_assumptions
);
2796 delta
= simplify_gen_binary (UDIV
, mode
, delta
, step
);
2797 desc
->niter_expr
= delta
;
2800 old_niter
= desc
->niter_expr
;
2802 simplify_using_initial_values (loop
, AND
, &desc
->assumptions
);
2803 if (desc
->assumptions
2804 && XEXP (desc
->assumptions
, 0) == const0_rtx
)
2806 simplify_using_initial_values (loop
, IOR
, &desc
->noloop_assumptions
);
2807 simplify_using_initial_values (loop
, IOR
, &desc
->infinite
);
2808 simplify_using_initial_values (loop
, UNKNOWN
, &desc
->niter_expr
);
2810 /* Rerun the simplification. Consider code (created by copying loop headers)
2822 The first pass determines that i = 0, the second pass uses it to eliminate
2823 noloop assumption. */
2825 simplify_using_initial_values (loop
, AND
, &desc
->assumptions
);
2826 if (desc
->assumptions
2827 && XEXP (desc
->assumptions
, 0) == const0_rtx
)
2829 simplify_using_initial_values (loop
, IOR
, &desc
->noloop_assumptions
);
2830 simplify_using_initial_values (loop
, IOR
, &desc
->infinite
);
2831 simplify_using_initial_values (loop
, UNKNOWN
, &desc
->niter_expr
);
2833 if (desc
->noloop_assumptions
2834 && XEXP (desc
->noloop_assumptions
, 0) == const_true_rtx
)
2837 if (CONST_INT_P (desc
->niter_expr
))
2839 uint64_t val
= INTVAL (desc
->niter_expr
);
2841 desc
->const_iter
= true;
2842 desc
->niter
= val
& GET_MODE_MASK (desc
->mode
);
2844 && !desc
->assumptions
)
2845 record_niter_bound (loop
, desc
->niter
, false, true);
2849 max
= determine_max_iter (loop
, desc
, old_niter
);
2851 goto zero_iter_simplify
;
2853 && !desc
->assumptions
)
2854 record_niter_bound (loop
, max
, false, true);
2856 /* simplify_using_initial_values does a copy propagation on the registers
2857 in the expression for the number of iterations. This prolongs life
2858 ranges of registers and increases register pressure, and usually
2859 brings no gain (and if it happens to do, the cse pass will take care
2860 of it anyway). So prevent this behavior, unless it enabled us to
2861 derive that the number of iterations is a constant. */
2862 desc
->niter_expr
= old_niter
;
2868 /* Simplify the assumptions. */
2869 simplify_using_initial_values (loop
, AND
, &desc
->assumptions
);
2870 if (desc
->assumptions
2871 && XEXP (desc
->assumptions
, 0) == const0_rtx
)
2873 simplify_using_initial_values (loop
, IOR
, &desc
->infinite
);
2877 desc
->const_iter
= true;
2879 record_niter_bound (loop
, 0, true, true);
2880 desc
->noloop_assumptions
= NULL_RTX
;
2881 desc
->niter_expr
= const0_rtx
;
2885 desc
->simple_p
= false;
2889 /* Checks whether E is a simple exit from LOOP and stores its description
2893 check_simple_exit (struct loop
*loop
, edge e
, struct niter_desc
*desc
)
2895 basic_block exit_bb
;
2901 desc
->simple_p
= false;
2903 /* It must belong directly to the loop. */
2904 if (exit_bb
->loop_father
!= loop
)
2907 /* It must be tested (at least) once during any iteration. */
2908 if (!dominated_by_p (CDI_DOMINATORS
, loop
->latch
, exit_bb
))
2911 /* It must end in a simple conditional jump. */
2912 if (!any_condjump_p (BB_END (exit_bb
)))
2915 ein
= EDGE_SUCC (exit_bb
, 0);
2917 ein
= EDGE_SUCC (exit_bb
, 1);
2920 desc
->in_edge
= ein
;
2922 /* Test whether the condition is suitable. */
2923 if (!(condition
= get_condition (BB_END (ein
->src
), &at
, false, false)))
2926 if (ein
->flags
& EDGE_FALLTHRU
)
2928 condition
= reversed_condition (condition
);
2933 /* Check that we are able to determine number of iterations and fill
2934 in information about it. */
2935 iv_number_of_iterations (loop
, at
, condition
, desc
);
2938 /* Finds a simple exit of LOOP and stores its description into DESC. */
2941 find_simple_exit (struct loop
*loop
, struct niter_desc
*desc
)
2946 struct niter_desc act
;
2950 desc
->simple_p
= false;
2951 body
= get_loop_body (loop
);
2953 for (i
= 0; i
< loop
->num_nodes
; i
++)
2955 FOR_EACH_EDGE (e
, ei
, body
[i
]->succs
)
2957 if (flow_bb_inside_loop_p (loop
, e
->dest
))
2960 check_simple_exit (loop
, e
, &act
);
2968 /* Prefer constant iterations; the less the better. */
2970 || (desc
->const_iter
&& act
.niter
>= desc
->niter
))
2973 /* Also if the actual exit may be infinite, while the old one
2974 not, prefer the old one. */
2975 if (act
.infinite
&& !desc
->infinite
)
2987 fprintf (dump_file
, "Loop %d is simple:\n", loop
->num
);
2988 fprintf (dump_file
, " simple exit %d -> %d\n",
2989 desc
->out_edge
->src
->index
,
2990 desc
->out_edge
->dest
->index
);
2991 if (desc
->assumptions
)
2993 fprintf (dump_file
, " assumptions: ");
2994 print_rtl (dump_file
, desc
->assumptions
);
2995 fprintf (dump_file
, "\n");
2997 if (desc
->noloop_assumptions
)
2999 fprintf (dump_file
, " does not roll if: ");
3000 print_rtl (dump_file
, desc
->noloop_assumptions
);
3001 fprintf (dump_file
, "\n");
3005 fprintf (dump_file
, " infinite if: ");
3006 print_rtl (dump_file
, desc
->infinite
);
3007 fprintf (dump_file
, "\n");
3010 fprintf (dump_file
, " number of iterations: ");
3011 print_rtl (dump_file
, desc
->niter_expr
);
3012 fprintf (dump_file
, "\n");
3014 fprintf (dump_file
, " upper bound: %li\n",
3015 (long)get_max_loop_iterations_int (loop
));
3016 fprintf (dump_file
, " realistic bound: %li\n",
3017 (long)get_estimated_loop_iterations_int (loop
));
3020 fprintf (dump_file
, "Loop %d is not simple.\n", loop
->num
);
3026 /* Creates a simple loop description of LOOP if it was not computed
3030 get_simple_loop_desc (struct loop
*loop
)
3032 struct niter_desc
*desc
= simple_loop_desc (loop
);
3037 /* At least desc->infinite is not always initialized by
3038 find_simple_loop_exit. */
3039 desc
= ggc_cleared_alloc
<niter_desc
> ();
3040 iv_analysis_loop_init (loop
);
3041 find_simple_exit (loop
, desc
);
3042 loop
->simple_loop_desc
= desc
;
3044 if (desc
->simple_p
&& (desc
->assumptions
|| desc
->infinite
))
3046 const char *wording
;
3048 /* Assume that no overflow happens and that the loop is finite.
3049 We already warned at the tree level if we ran optimizations there. */
3050 if (!flag_tree_loop_optimize
&& warn_unsafe_loop_optimizations
)
3055 flag_unsafe_loop_optimizations
3056 ? N_("assuming that the loop is not infinite")
3057 : N_("cannot optimize possibly infinite loops");
3058 warning (OPT_Wunsafe_loop_optimizations
, "%s",
3061 if (desc
->assumptions
)
3064 flag_unsafe_loop_optimizations
3065 ? N_("assuming that the loop counter does not overflow")
3066 : N_("cannot optimize loop, the loop counter may overflow");
3067 warning (OPT_Wunsafe_loop_optimizations
, "%s",
3072 if (flag_unsafe_loop_optimizations
)
3074 desc
->assumptions
= NULL_RTX
;
3075 desc
->infinite
= NULL_RTX
;
3082 /* Releases simple loop description for LOOP. */
3085 free_simple_loop_desc (struct loop
*loop
)
3087 struct niter_desc
*desc
= simple_loop_desc (loop
);
3093 loop
->simple_loop_desc
= NULL
;