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1 /* CPU mode switching
2 Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008,
3 2009 Free Software Foundation, Inc.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
10 version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20
21 #include "config.h"
22 #include "system.h"
23 #include "coretypes.h"
24 #include "tm.h"
25 #include "target.h"
26 #include "rtl.h"
27 #include "regs.h"
28 #include "hard-reg-set.h"
29 #include "flags.h"
30 #include "insn-config.h"
31 #include "recog.h"
32 #include "basic-block.h"
33 #include "output.h"
34 #include "tm_p.h"
35 #include "function.h"
36 #include "tree-pass.h"
37 #include "timevar.h"
38 #include "df.h"
39
40 /* We want target macros for the mode switching code to be able to refer
41 to instruction attribute values. */
42 #include "insn-attr.h"
43
44 #ifdef OPTIMIZE_MODE_SWITCHING
45
46 /* The algorithm for setting the modes consists of scanning the insn list
47 and finding all the insns which require a specific mode. Each insn gets
48 a unique struct seginfo element. These structures are inserted into a list
49 for each basic block. For each entity, there is an array of bb_info over
50 the flow graph basic blocks (local var 'bb_info'), and contains a list
51 of all insns within that basic block, in the order they are encountered.
52
53 For each entity, any basic block WITHOUT any insns requiring a specific
54 mode are given a single entry, without a mode. (Each basic block
55 in the flow graph must have at least one entry in the segment table.)
56
57 The LCM algorithm is then run over the flow graph to determine where to
58 place the sets to the highest-priority value in respect of first the first
59 insn in any one block. Any adjustments required to the transparency
60 vectors are made, then the next iteration starts for the next-lower
61 priority mode, till for each entity all modes are exhausted.
62
63 More details are located in the code for optimize_mode_switching(). */
64 \f
65 /* This structure contains the information for each insn which requires
66 either single or double mode to be set.
67 MODE is the mode this insn must be executed in.
68 INSN_PTR is the insn to be executed (may be the note that marks the
69 beginning of a basic block).
70 BBNUM is the flow graph basic block this insn occurs in.
71 NEXT is the next insn in the same basic block. */
72 struct seginfo
73 {
74 int mode;
75 rtx insn_ptr;
76 int bbnum;
77 struct seginfo *next;
78 HARD_REG_SET regs_live;
79 };
80
81 struct bb_info
82 {
83 struct seginfo *seginfo;
84 int computing;
85 };
86
87 /* These bitmaps are used for the LCM algorithm. */
88
89 static sbitmap *antic;
90 static sbitmap *transp;
91 static sbitmap *comp;
92
93 static struct seginfo * new_seginfo (int, rtx, int, HARD_REG_SET);
94 static void add_seginfo (struct bb_info *, struct seginfo *);
95 static void reg_dies (rtx, HARD_REG_SET *);
96 static void reg_becomes_live (rtx, const_rtx, void *);
97 static void make_preds_opaque (basic_block, int);
98 \f
99
100 /* This function will allocate a new BBINFO structure, initialized
101 with the MODE, INSN, and basic block BB parameters. */
102
103 static struct seginfo *
104 new_seginfo (int mode, rtx insn, int bb, HARD_REG_SET regs_live)
105 {
106 struct seginfo *ptr;
107 ptr = XNEW (struct seginfo);
108 ptr->mode = mode;
109 ptr->insn_ptr = insn;
110 ptr->bbnum = bb;
111 ptr->next = NULL;
112 COPY_HARD_REG_SET (ptr->regs_live, regs_live);
113 return ptr;
114 }
115
116 /* Add a seginfo element to the end of a list.
117 HEAD is a pointer to the list beginning.
118 INFO is the structure to be linked in. */
119
120 static void
121 add_seginfo (struct bb_info *head, struct seginfo *info)
122 {
123 struct seginfo *ptr;
124
125 if (head->seginfo == NULL)
126 head->seginfo = info;
127 else
128 {
129 ptr = head->seginfo;
130 while (ptr->next != NULL)
131 ptr = ptr->next;
132 ptr->next = info;
133 }
134 }
135
136 /* Make all predecessors of basic block B opaque, recursively, till we hit
137 some that are already non-transparent, or an edge where aux is set; that
138 denotes that a mode set is to be done on that edge.
139 J is the bit number in the bitmaps that corresponds to the entity that
140 we are currently handling mode-switching for. */
141
142 static void
143 make_preds_opaque (basic_block b, int j)
144 {
145 edge e;
146 edge_iterator ei;
147
148 FOR_EACH_EDGE (e, ei, b->preds)
149 {
150 basic_block pb = e->src;
151
152 if (e->aux || ! TEST_BIT (transp[pb->index], j))
153 continue;
154
155 RESET_BIT (transp[pb->index], j);
156 make_preds_opaque (pb, j);
157 }
158 }
159
160 /* Record in LIVE that register REG died. */
161
162 static void
163 reg_dies (rtx reg, HARD_REG_SET *live)
164 {
165 int regno;
166
167 if (!REG_P (reg))
168 return;
169
170 regno = REGNO (reg);
171 if (regno < FIRST_PSEUDO_REGISTER)
172 remove_from_hard_reg_set (live, GET_MODE (reg), regno);
173 }
174
175 /* Record in LIVE that register REG became live.
176 This is called via note_stores. */
177
178 static void
179 reg_becomes_live (rtx reg, const_rtx setter ATTRIBUTE_UNUSED, void *live)
180 {
181 int regno;
182
183 if (GET_CODE (reg) == SUBREG)
184 reg = SUBREG_REG (reg);
185
186 if (!REG_P (reg))
187 return;
188
189 regno = REGNO (reg);
190 if (regno < FIRST_PSEUDO_REGISTER)
191 add_to_hard_reg_set ((HARD_REG_SET *) live, GET_MODE (reg), regno);
192 }
193
194 /* Make sure if MODE_ENTRY is defined the MODE_EXIT is defined
195 and vice versa. */
196 #if defined (MODE_ENTRY) != defined (MODE_EXIT)
197 #error "Both MODE_ENTRY and MODE_EXIT must be defined"
198 #endif
199
200 #if defined (MODE_ENTRY) && defined (MODE_EXIT)
201 /* Split the fallthrough edge to the exit block, so that we can note
202 that there NORMAL_MODE is required. Return the new block if it's
203 inserted before the exit block. Otherwise return null. */
204
205 static basic_block
206 create_pre_exit (int n_entities, int *entity_map, const int *num_modes)
207 {
208 edge eg;
209 edge_iterator ei;
210 basic_block pre_exit;
211
212 /* The only non-call predecessor at this stage is a block with a
213 fallthrough edge; there can be at most one, but there could be
214 none at all, e.g. when exit is called. */
215 pre_exit = 0;
216 FOR_EACH_EDGE (eg, ei, EXIT_BLOCK_PTR->preds)
217 if (eg->flags & EDGE_FALLTHRU)
218 {
219 basic_block src_bb = eg->src;
220 rtx last_insn, ret_reg;
221
222 gcc_assert (!pre_exit);
223 /* If this function returns a value at the end, we have to
224 insert the final mode switch before the return value copy
225 to its hard register. */
226 if (EDGE_COUNT (EXIT_BLOCK_PTR->preds) == 1
227 && NONJUMP_INSN_P ((last_insn = BB_END (src_bb)))
228 && GET_CODE (PATTERN (last_insn)) == USE
229 && GET_CODE ((ret_reg = XEXP (PATTERN (last_insn), 0))) == REG)
230 {
231 int ret_start = REGNO (ret_reg);
232 int nregs = hard_regno_nregs[ret_start][GET_MODE (ret_reg)];
233 int ret_end = ret_start + nregs;
234 int short_block = 0;
235 int maybe_builtin_apply = 0;
236 int forced_late_switch = 0;
237 rtx before_return_copy;
238
239 do
240 {
241 rtx return_copy = PREV_INSN (last_insn);
242 rtx return_copy_pat, copy_reg;
243 int copy_start, copy_num;
244 int j;
245
246 if (INSN_P (return_copy))
247 {
248 /* When using SJLJ exceptions, the call to the
249 unregister function is inserted between the
250 clobber of the return value and the copy.
251 We do not want to split the block before this
252 or any other call; if we have not found the
253 copy yet, the copy must have been deleted. */
254 if (CALL_P (return_copy))
255 {
256 short_block = 1;
257 break;
258 }
259 return_copy_pat = PATTERN (return_copy);
260 switch (GET_CODE (return_copy_pat))
261 {
262 case USE:
263 /* Skip __builtin_apply pattern. */
264 if (GET_CODE (XEXP (return_copy_pat, 0)) == REG
265 && (targetm.calls.function_value_regno_p
266 (REGNO (XEXP (return_copy_pat, 0)))))
267 {
268 maybe_builtin_apply = 1;
269 last_insn = return_copy;
270 continue;
271 }
272 break;
273
274 case ASM_OPERANDS:
275 /* Skip barrier insns. */
276 if (!MEM_VOLATILE_P (return_copy_pat))
277 break;
278
279 /* Fall through. */
280
281 case ASM_INPUT:
282 case UNSPEC_VOLATILE:
283 last_insn = return_copy;
284 continue;
285
286 default:
287 break;
288 }
289
290 /* If the return register is not (in its entirety)
291 likely spilled, the return copy might be
292 partially or completely optimized away. */
293 return_copy_pat = single_set (return_copy);
294 if (!return_copy_pat)
295 {
296 return_copy_pat = PATTERN (return_copy);
297 if (GET_CODE (return_copy_pat) != CLOBBER)
298 break;
299 else if (!optimize)
300 {
301 /* This might be (clobber (reg [<result>]))
302 when not optimizing. Then check if
303 the previous insn is the clobber for
304 the return register. */
305 copy_reg = SET_DEST (return_copy_pat);
306 if (GET_CODE (copy_reg) == REG
307 && !HARD_REGISTER_NUM_P (REGNO (copy_reg)))
308 {
309 if (INSN_P (PREV_INSN (return_copy)))
310 {
311 return_copy = PREV_INSN (return_copy);
312 return_copy_pat = PATTERN (return_copy);
313 if (GET_CODE (return_copy_pat) != CLOBBER)
314 break;
315 }
316 }
317 }
318 }
319 copy_reg = SET_DEST (return_copy_pat);
320 if (GET_CODE (copy_reg) == REG)
321 copy_start = REGNO (copy_reg);
322 else if (GET_CODE (copy_reg) == SUBREG
323 && GET_CODE (SUBREG_REG (copy_reg)) == REG)
324 copy_start = REGNO (SUBREG_REG (copy_reg));
325 else
326 break;
327 if (copy_start >= FIRST_PSEUDO_REGISTER)
328 break;
329 copy_num
330 = hard_regno_nregs[copy_start][GET_MODE (copy_reg)];
331
332 /* If the return register is not likely spilled, - as is
333 the case for floating point on SH4 - then it might
334 be set by an arithmetic operation that needs a
335 different mode than the exit block. */
336 for (j = n_entities - 1; j >= 0; j--)
337 {
338 int e = entity_map[j];
339 int mode = MODE_NEEDED (e, return_copy);
340
341 if (mode != num_modes[e] && mode != MODE_EXIT (e))
342 break;
343 }
344 if (j >= 0)
345 {
346 /* For the SH4, floating point loads depend on fpscr,
347 thus we might need to put the final mode switch
348 after the return value copy. That is still OK,
349 because a floating point return value does not
350 conflict with address reloads. */
351 if (copy_start >= ret_start
352 && copy_start + copy_num <= ret_end
353 && OBJECT_P (SET_SRC (return_copy_pat)))
354 forced_late_switch = 1;
355 break;
356 }
357
358 if (copy_start >= ret_start
359 && copy_start + copy_num <= ret_end)
360 nregs -= copy_num;
361 else if (!maybe_builtin_apply
362 || !targetm.calls.function_value_regno_p
363 (copy_start))
364 break;
365 last_insn = return_copy;
366 }
367 /* ??? Exception handling can lead to the return value
368 copy being already separated from the return value use,
369 as in unwind-dw2.c .
370 Similarly, conditionally returning without a value,
371 and conditionally using builtin_return can lead to an
372 isolated use. */
373 if (return_copy == BB_HEAD (src_bb))
374 {
375 short_block = 1;
376 break;
377 }
378 last_insn = return_copy;
379 }
380 while (nregs);
381
382 /* If we didn't see a full return value copy, verify that there
383 is a plausible reason for this. If some, but not all of the
384 return register is likely spilled, we can expect that there
385 is a copy for the likely spilled part. */
386 gcc_assert (!nregs
387 || forced_late_switch
388 || short_block
389 || !(CLASS_LIKELY_SPILLED_P
390 (REGNO_REG_CLASS (ret_start)))
391 || (nregs
392 != hard_regno_nregs[ret_start][GET_MODE (ret_reg)])
393 /* For multi-hard-register floating point
394 values, sometimes the likely-spilled part
395 is ordinarily copied first, then the other
396 part is set with an arithmetic operation.
397 This doesn't actually cause reload
398 failures, so let it pass. */
399 || (GET_MODE_CLASS (GET_MODE (ret_reg)) != MODE_INT
400 && nregs != 1));
401
402 if (INSN_P (last_insn))
403 {
404 before_return_copy
405 = emit_note_before (NOTE_INSN_DELETED, last_insn);
406 /* Instructions preceding LAST_INSN in the same block might
407 require a different mode than MODE_EXIT, so if we might
408 have such instructions, keep them in a separate block
409 from pre_exit. */
410 if (last_insn != BB_HEAD (src_bb))
411 src_bb = split_block (src_bb,
412 PREV_INSN (before_return_copy))->dest;
413 }
414 else
415 before_return_copy = last_insn;
416 pre_exit = split_block (src_bb, before_return_copy)->src;
417 }
418 else
419 {
420 pre_exit = split_edge (eg);
421 }
422 }
423
424 return pre_exit;
425 }
426 #endif
427
428 /* Find all insns that need a particular mode setting, and insert the
429 necessary mode switches. Return true if we did work. */
430
431 static int
432 optimize_mode_switching (void)
433 {
434 rtx insn;
435 int e;
436 basic_block bb;
437 int need_commit = 0;
438 sbitmap *kill;
439 struct edge_list *edge_list;
440 static const int num_modes[] = NUM_MODES_FOR_MODE_SWITCHING;
441 #define N_ENTITIES ARRAY_SIZE (num_modes)
442 int entity_map[N_ENTITIES];
443 struct bb_info *bb_info[N_ENTITIES];
444 int i, j;
445 int n_entities;
446 int max_num_modes = 0;
447 bool emited = false;
448 basic_block post_entry ATTRIBUTE_UNUSED, pre_exit ATTRIBUTE_UNUSED;
449
450 for (e = N_ENTITIES - 1, n_entities = 0; e >= 0; e--)
451 if (OPTIMIZE_MODE_SWITCHING (e))
452 {
453 int entry_exit_extra = 0;
454
455 /* Create the list of segments within each basic block.
456 If NORMAL_MODE is defined, allow for two extra
457 blocks split from the entry and exit block. */
458 #if defined (MODE_ENTRY) && defined (MODE_EXIT)
459 entry_exit_extra = 3;
460 #endif
461 bb_info[n_entities]
462 = XCNEWVEC (struct bb_info, last_basic_block + entry_exit_extra);
463 entity_map[n_entities++] = e;
464 if (num_modes[e] > max_num_modes)
465 max_num_modes = num_modes[e];
466 }
467
468 if (! n_entities)
469 return 0;
470
471 #if defined (MODE_ENTRY) && defined (MODE_EXIT)
472 /* Split the edge from the entry block, so that we can note that
473 there NORMAL_MODE is supplied. */
474 post_entry = split_edge (single_succ_edge (ENTRY_BLOCK_PTR));
475 pre_exit = create_pre_exit (n_entities, entity_map, num_modes);
476 #endif
477
478 df_analyze ();
479
480 /* Create the bitmap vectors. */
481
482 antic = sbitmap_vector_alloc (last_basic_block, n_entities);
483 transp = sbitmap_vector_alloc (last_basic_block, n_entities);
484 comp = sbitmap_vector_alloc (last_basic_block, n_entities);
485
486 sbitmap_vector_ones (transp, last_basic_block);
487
488 for (j = n_entities - 1; j >= 0; j--)
489 {
490 int e = entity_map[j];
491 int no_mode = num_modes[e];
492 struct bb_info *info = bb_info[j];
493
494 /* Determine what the first use (if any) need for a mode of entity E is.
495 This will be the mode that is anticipatable for this block.
496 Also compute the initial transparency settings. */
497 FOR_EACH_BB (bb)
498 {
499 struct seginfo *ptr;
500 int last_mode = no_mode;
501 HARD_REG_SET live_now;
502
503 REG_SET_TO_HARD_REG_SET (live_now, df_get_live_in (bb));
504
505 /* Pretend the mode is clobbered across abnormal edges. */
506 {
507 edge_iterator ei;
508 edge e;
509 FOR_EACH_EDGE (e, ei, bb->preds)
510 if (e->flags & EDGE_COMPLEX)
511 break;
512 if (e)
513 {
514 ptr = new_seginfo (no_mode, BB_HEAD (bb), bb->index, live_now);
515 add_seginfo (info + bb->index, ptr);
516 RESET_BIT (transp[bb->index], j);
517 }
518 }
519
520 for (insn = BB_HEAD (bb);
521 insn != NULL && insn != NEXT_INSN (BB_END (bb));
522 insn = NEXT_INSN (insn))
523 {
524 if (INSN_P (insn))
525 {
526 int mode = MODE_NEEDED (e, insn);
527 rtx link;
528
529 if (mode != no_mode && mode != last_mode)
530 {
531 last_mode = mode;
532 ptr = new_seginfo (mode, insn, bb->index, live_now);
533 add_seginfo (info + bb->index, ptr);
534 RESET_BIT (transp[bb->index], j);
535 }
536 #ifdef MODE_AFTER
537 last_mode = MODE_AFTER (last_mode, insn);
538 #endif
539 /* Update LIVE_NOW. */
540 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
541 if (REG_NOTE_KIND (link) == REG_DEAD)
542 reg_dies (XEXP (link, 0), &live_now);
543
544 note_stores (PATTERN (insn), reg_becomes_live, &live_now);
545 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
546 if (REG_NOTE_KIND (link) == REG_UNUSED)
547 reg_dies (XEXP (link, 0), &live_now);
548 }
549 }
550
551 info[bb->index].computing = last_mode;
552 /* Check for blocks without ANY mode requirements. */
553 if (last_mode == no_mode)
554 {
555 ptr = new_seginfo (no_mode, BB_END (bb), bb->index, live_now);
556 add_seginfo (info + bb->index, ptr);
557 }
558 }
559 #if defined (MODE_ENTRY) && defined (MODE_EXIT)
560 {
561 int mode = MODE_ENTRY (e);
562
563 if (mode != no_mode)
564 {
565 bb = post_entry;
566
567 /* By always making this nontransparent, we save
568 an extra check in make_preds_opaque. We also
569 need this to avoid confusing pre_edge_lcm when
570 antic is cleared but transp and comp are set. */
571 RESET_BIT (transp[bb->index], j);
572
573 /* Insert a fake computing definition of MODE into entry
574 blocks which compute no mode. This represents the mode on
575 entry. */
576 info[bb->index].computing = mode;
577
578 if (pre_exit)
579 info[pre_exit->index].seginfo->mode = MODE_EXIT (e);
580 }
581 }
582 #endif /* NORMAL_MODE */
583 }
584
585 kill = sbitmap_vector_alloc (last_basic_block, n_entities);
586 for (i = 0; i < max_num_modes; i++)
587 {
588 int current_mode[N_ENTITIES];
589 sbitmap *del;
590 sbitmap *insert;
591
592 /* Set the anticipatable and computing arrays. */
593 sbitmap_vector_zero (antic, last_basic_block);
594 sbitmap_vector_zero (comp, last_basic_block);
595 for (j = n_entities - 1; j >= 0; j--)
596 {
597 int m = current_mode[j] = MODE_PRIORITY_TO_MODE (entity_map[j], i);
598 struct bb_info *info = bb_info[j];
599
600 FOR_EACH_BB (bb)
601 {
602 if (info[bb->index].seginfo->mode == m)
603 SET_BIT (antic[bb->index], j);
604
605 if (info[bb->index].computing == m)
606 SET_BIT (comp[bb->index], j);
607 }
608 }
609
610 /* Calculate the optimal locations for the
611 placement mode switches to modes with priority I. */
612
613 FOR_EACH_BB (bb)
614 sbitmap_not (kill[bb->index], transp[bb->index]);
615 edge_list = pre_edge_lcm (n_entities, transp, comp, antic,
616 kill, &insert, &del);
617
618 for (j = n_entities - 1; j >= 0; j--)
619 {
620 /* Insert all mode sets that have been inserted by lcm. */
621 int no_mode = num_modes[entity_map[j]];
622
623 /* Wherever we have moved a mode setting upwards in the flow graph,
624 the blocks between the new setting site and the now redundant
625 computation ceases to be transparent for any lower-priority
626 mode of the same entity. First set the aux field of each
627 insertion site edge non-transparent, then propagate the new
628 non-transparency from the redundant computation upwards till
629 we hit an insertion site or an already non-transparent block. */
630 for (e = NUM_EDGES (edge_list) - 1; e >= 0; e--)
631 {
632 edge eg = INDEX_EDGE (edge_list, e);
633 int mode;
634 basic_block src_bb;
635 HARD_REG_SET live_at_edge;
636 rtx mode_set;
637
638 eg->aux = 0;
639
640 if (! TEST_BIT (insert[e], j))
641 continue;
642
643 eg->aux = (void *)1;
644
645 mode = current_mode[j];
646 src_bb = eg->src;
647
648 REG_SET_TO_HARD_REG_SET (live_at_edge, df_get_live_out (src_bb));
649
650 start_sequence ();
651 EMIT_MODE_SET (entity_map[j], mode, live_at_edge);
652 mode_set = get_insns ();
653 end_sequence ();
654
655 /* Do not bother to insert empty sequence. */
656 if (mode_set == NULL_RTX)
657 continue;
658
659 /* We should not get an abnormal edge here. */
660 gcc_assert (! (eg->flags & EDGE_ABNORMAL));
661
662 need_commit = 1;
663 insert_insn_on_edge (mode_set, eg);
664 }
665
666 FOR_EACH_BB_REVERSE (bb)
667 if (TEST_BIT (del[bb->index], j))
668 {
669 make_preds_opaque (bb, j);
670 /* Cancel the 'deleted' mode set. */
671 bb_info[j][bb->index].seginfo->mode = no_mode;
672 }
673 }
674
675 sbitmap_vector_free (del);
676 sbitmap_vector_free (insert);
677 clear_aux_for_edges ();
678 free_edge_list (edge_list);
679 }
680
681 /* Now output the remaining mode sets in all the segments. */
682 for (j = n_entities - 1; j >= 0; j--)
683 {
684 int no_mode = num_modes[entity_map[j]];
685
686 FOR_EACH_BB_REVERSE (bb)
687 {
688 struct seginfo *ptr, *next;
689 for (ptr = bb_info[j][bb->index].seginfo; ptr; ptr = next)
690 {
691 next = ptr->next;
692 if (ptr->mode != no_mode)
693 {
694 rtx mode_set;
695
696 start_sequence ();
697 EMIT_MODE_SET (entity_map[j], ptr->mode, ptr->regs_live);
698 mode_set = get_insns ();
699 end_sequence ();
700
701 /* Insert MODE_SET only if it is nonempty. */
702 if (mode_set != NULL_RTX)
703 {
704 emited = true;
705 if (NOTE_INSN_BASIC_BLOCK_P (ptr->insn_ptr))
706 emit_insn_after (mode_set, ptr->insn_ptr);
707 else
708 emit_insn_before (mode_set, ptr->insn_ptr);
709 }
710 }
711
712 free (ptr);
713 }
714 }
715
716 free (bb_info[j]);
717 }
718
719 /* Finished. Free up all the things we've allocated. */
720 sbitmap_vector_free (kill);
721 sbitmap_vector_free (antic);
722 sbitmap_vector_free (transp);
723 sbitmap_vector_free (comp);
724
725 if (need_commit)
726 commit_edge_insertions ();
727
728 #if defined (MODE_ENTRY) && defined (MODE_EXIT)
729 cleanup_cfg (CLEANUP_NO_INSN_DEL);
730 #else
731 if (!need_commit && !emited)
732 return 0;
733 #endif
734
735 return 1;
736 }
737
738 #endif /* OPTIMIZE_MODE_SWITCHING */
739 \f
740 static bool
741 gate_mode_switching (void)
742 {
743 #ifdef OPTIMIZE_MODE_SWITCHING
744 return true;
745 #else
746 return false;
747 #endif
748 }
749
750 static unsigned int
751 rest_of_handle_mode_switching (void)
752 {
753 #ifdef OPTIMIZE_MODE_SWITCHING
754 optimize_mode_switching ();
755 #endif /* OPTIMIZE_MODE_SWITCHING */
756 return 0;
757 }
758
759
760 struct rtl_opt_pass pass_mode_switching =
761 {
762 {
763 RTL_PASS,
764 "mode_sw", /* name */
765 gate_mode_switching, /* gate */
766 rest_of_handle_mode_switching, /* execute */
767 NULL, /* sub */
768 NULL, /* next */
769 0, /* static_pass_number */
770 TV_MODE_SWITCH, /* tv_id */
771 0, /* properties_required */
772 0, /* properties_provided */
773 0, /* properties_destroyed */
774 0, /* todo_flags_start */
775 TODO_df_finish | TODO_verify_rtl_sharing |
776 TODO_dump_func /* todo_flags_finish */
777 }
778 };