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1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 93-98, 1999 Free Software Foundation, Inc.
3
4 This file is part of GNU CC.
5
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21 /* This pass converts stack-like registers from the "flat register
22 file" model that gcc uses, to a stack convention that the 387 uses.
23
24 * The form of the input:
25
26 On input, the function consists of insn that have had their
27 registers fully allocated to a set of "virtual" registers. Note that
28 the word "virtual" is used differently here than elsewhere in gcc: for
29 each virtual stack reg, there is a hard reg, but the mapping between
30 them is not known until this pass is run. On output, hard register
31 numbers have been substituted, and various pop and exchange insns have
32 been emitted. The hard register numbers and the virtual register
33 numbers completely overlap - before this pass, all stack register
34 numbers are virtual, and afterward they are all hard.
35
36 The virtual registers can be manipulated normally by gcc, and their
37 semantics are the same as for normal registers. After the hard
38 register numbers are substituted, the semantics of an insn containing
39 stack-like regs are not the same as for an insn with normal regs: for
40 instance, it is not safe to delete an insn that appears to be a no-op
41 move. In general, no insn containing hard regs should be changed
42 after this pass is done.
43
44 * The form of the output:
45
46 After this pass, hard register numbers represent the distance from
47 the current top of stack to the desired register. A reference to
48 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
49 represents the register just below that, and so forth. Also, REG_DEAD
50 notes indicate whether or not a stack register should be popped.
51
52 A "swap" insn looks like a parallel of two patterns, where each
53 pattern is a SET: one sets A to B, the other B to A.
54
55 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
56 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
57 will replace the existing stack top, not push a new value.
58
59 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
60 SET_SRC is REG or MEM.
61
62 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
63 appears ambiguous. As a special case, the presence of a REG_DEAD note
64 for FIRST_STACK_REG differentiates between a load insn and a pop.
65
66 If a REG_DEAD is present, the insn represents a "pop" that discards
67 the top of the register stack. If there is no REG_DEAD note, then the
68 insn represents a "dup" or a push of the current top of stack onto the
69 stack.
70
71 * Methodology:
72
73 Existing REG_DEAD and REG_UNUSED notes for stack registers are
74 deleted and recreated from scratch. REG_DEAD is never created for a
75 SET_DEST, only REG_UNUSED.
76
77 * asm_operands:
78
79 There are several rules on the usage of stack-like regs in
80 asm_operands insns. These rules apply only to the operands that are
81 stack-like regs:
82
83 1. Given a set of input regs that die in an asm_operands, it is
84 necessary to know which are implicitly popped by the asm, and
85 which must be explicitly popped by gcc.
86
87 An input reg that is implicitly popped by the asm must be
88 explicitly clobbered, unless it is constrained to match an
89 output operand.
90
91 2. For any input reg that is implicitly popped by an asm, it is
92 necessary to know how to adjust the stack to compensate for the pop.
93 If any non-popped input is closer to the top of the reg-stack than
94 the implicitly popped reg, it would not be possible to know what the
95 stack looked like - it's not clear how the rest of the stack "slides
96 up".
97
98 All implicitly popped input regs must be closer to the top of
99 the reg-stack than any input that is not implicitly popped.
100
101 3. It is possible that if an input dies in an insn, reload might
102 use the input reg for an output reload. Consider this example:
103
104 asm ("foo" : "=t" (a) : "f" (b));
105
106 This asm says that input B is not popped by the asm, and that
107 the asm pushes a result onto the reg-stack, ie, the stack is one
108 deeper after the asm than it was before. But, it is possible that
109 reload will think that it can use the same reg for both the input and
110 the output, if input B dies in this insn.
111
112 If any input operand uses the "f" constraint, all output reg
113 constraints must use the "&" earlyclobber.
114
115 The asm above would be written as
116
117 asm ("foo" : "=&t" (a) : "f" (b));
118
119 4. Some operands need to be in particular places on the stack. All
120 output operands fall in this category - there is no other way to
121 know which regs the outputs appear in unless the user indicates
122 this in the constraints.
123
124 Output operands must specifically indicate which reg an output
125 appears in after an asm. "=f" is not allowed: the operand
126 constraints must select a class with a single reg.
127
128 5. Output operands may not be "inserted" between existing stack regs.
129 Since no 387 opcode uses a read/write operand, all output operands
130 are dead before the asm_operands, and are pushed by the asm_operands.
131 It makes no sense to push anywhere but the top of the reg-stack.
132
133 Output operands must start at the top of the reg-stack: output
134 operands may not "skip" a reg.
135
136 6. Some asm statements may need extra stack space for internal
137 calculations. This can be guaranteed by clobbering stack registers
138 unrelated to the inputs and outputs.
139
140 Here are a couple of reasonable asms to want to write. This asm
141 takes one input, which is internally popped, and produces two outputs.
142
143 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
144
145 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
146 and replaces them with one output. The user must code the "st(1)"
147 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
148
149 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
150
151 */
152 \f
153 #include "config.h"
154 #include "system.h"
155 #include "tree.h"
156 #include "rtl.h"
157 #include "function.h"
158 #include "insn-config.h"
159 #include "regs.h"
160 #include "hard-reg-set.h"
161 #include "flags.h"
162 #include "insn-flags.h"
163 #include "toplev.h"
164 #include "recog.h"
165 #include "varray.h"
166
167 #ifdef STACK_REGS
168
169 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
170
171 /* This is the basic stack record. TOP is an index into REG[] such
172 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
173
174 If TOP is -2, REG[] is not yet initialized. Stack initialization
175 consists of placing each live reg in array `reg' and setting `top'
176 appropriately.
177
178 REG_SET indicates which registers are live. */
179
180 typedef struct stack_def
181 {
182 int top; /* index to top stack element */
183 HARD_REG_SET reg_set; /* set of live registers */
184 char reg[REG_STACK_SIZE]; /* register - stack mapping */
185 } *stack;
186
187 /* highest instruction uid */
188 static int max_uid = 0;
189
190 /* Number of basic blocks in the current function. */
191 static int blocks;
192
193 /* Element N is first insn in basic block N.
194 This info lasts until we finish compiling the function. */
195 static rtx *block_begin;
196
197 /* Element N is last insn in basic block N.
198 This info lasts until we finish compiling the function. */
199 static rtx *block_end;
200
201 /* Element N is nonzero if control can drop into basic block N */
202 static char *block_drops_in;
203
204 /* Element N says all about the stack at entry block N */
205 static stack block_stack_in;
206
207 /* Element N says all about the stack life at the end of block N */
208 static HARD_REG_SET *block_out_reg_set;
209
210 /* This is where the BLOCK_NUM values are really stored. This is set
211 up by find_blocks and used there and in life_analysis. It can be used
212 later, but only to look up an insn that is the head or tail of some
213 block. life_analysis and the stack register conversion process can
214 add insns within a block. */
215 static int *block_number;
216
217 /* We use this array to cache info about insns, because otherwise we
218 spend too much time in stack_regs_mentioned_p.
219
220 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
221 the insn uses stack registers, two indicates the insn does not use
222 stack registers. */
223 static varray_type stack_regs_mentioned_data;
224
225 /* This is the register file for all register after conversion */
226 static rtx
227 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
228
229 #define FP_MODE_REG(regno,mode) \
230 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)])
231
232 /* Get the basic block number of an insn. See note at block_number
233 definition are validity of this information. */
234
235 #define BLOCK_NUM(INSN) \
236 ((INSN_UID (INSN) > max_uid) \
237 ? (abort() , -1) : block_number[INSN_UID (INSN)])
238
239 /* Forward declarations */
240
241 static int stack_regs_mentioned_p PROTO((rtx pat));
242 static void mark_regs_pat PROTO((rtx, HARD_REG_SET *));
243 static void straighten_stack PROTO((rtx, stack));
244 static void pop_stack PROTO((stack, int));
245 static void record_label_references PROTO((rtx, rtx));
246 static rtx *get_true_reg PROTO((rtx *));
247
248 static void record_asm_reg_life PROTO((rtx, stack));
249 static void record_reg_life_pat PROTO((rtx, HARD_REG_SET *,
250 HARD_REG_SET *, int));
251 static int get_asm_operand_n_inputs PROTO((rtx));
252 static void record_reg_life PROTO((rtx, int, stack));
253 static void find_blocks PROTO((rtx));
254 static rtx stack_result PROTO((tree));
255 static void stack_reg_life_analysis PROTO((rtx, HARD_REG_SET *));
256 static void replace_reg PROTO((rtx *, int));
257 static void remove_regno_note PROTO((rtx, enum reg_note, int));
258 static int get_hard_regnum PROTO((stack, rtx));
259 static void delete_insn_for_stacker PROTO((rtx));
260 static rtx emit_pop_insn PROTO((rtx, stack, rtx, rtx (*) ()));
261 static void emit_swap_insn PROTO((rtx, stack, rtx));
262 static void move_for_stack_reg PROTO((rtx, stack, rtx));
263 static int swap_rtx_condition_1 PROTO((rtx));
264 static int swap_rtx_condition PROTO((rtx));
265 static void compare_for_stack_reg PROTO((rtx, stack, rtx));
266 static void subst_stack_regs_pat PROTO((rtx, stack, rtx));
267 static void subst_asm_stack_regs PROTO((rtx, stack));
268 static void subst_stack_regs PROTO((rtx, stack));
269 static void change_stack PROTO((rtx, stack, stack, rtx (*) ()));
270
271 static void goto_block_pat PROTO((rtx, stack, rtx));
272 static void convert_regs PROTO((void));
273 static void print_blocks PROTO((FILE *, rtx, rtx));
274 static void dump_stack_info PROTO((FILE *));
275 \f
276 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
277
278 static int
279 stack_regs_mentioned_p (pat)
280 rtx pat;
281 {
282 register const char *fmt;
283 register int i;
284
285 if (STACK_REG_P (pat))
286 return 1;
287
288 fmt = GET_RTX_FORMAT (GET_CODE (pat));
289 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
290 {
291 if (fmt[i] == 'E')
292 {
293 register int j;
294
295 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
296 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
297 return 1;
298 }
299 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
300 return 1;
301 }
302
303 return 0;
304 }
305
306 /* Return nonzero if INSN mentions stacked registers, else return zero. */
307
308 int
309 stack_regs_mentioned (insn)
310 rtx insn;
311 {
312 unsigned int uid, max;
313 int test;
314
315 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
316 return 0;
317
318 uid = INSN_UID (insn);
319 max = VARRAY_SIZE (stack_regs_mentioned_data);
320 if (uid >= max)
321 {
322 /* Allocate some extra size to avoid too many reallocs, but
323 do not grow too quickly. */
324 max = uid + uid / 20;
325 VARRAY_GROW (stack_regs_mentioned_data, max);
326 }
327
328 test = VARRAY_CHAR (stack_regs_mentioned_data, uid);
329 if (test == 0)
330 {
331 /* This insn has yet to be examined. Do so now. */
332 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
333 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test;
334 }
335
336 return test == 1;
337 }
338 \f
339 static rtx ix86_flags_rtx;
340
341 static rtx
342 next_flags_user (insn)
343 rtx insn;
344 {
345 /* Search forward looking for the first use of this value.
346 Stop at block boundaries. */
347 /* ??? This really cries for BLOCK_END! */
348
349 while (1)
350 {
351 insn = NEXT_INSN (insn);
352 if (!insn)
353 return NULL_RTX;
354
355 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
356 && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
357 return insn;
358
359 if (GET_CODE (insn) == JUMP_INSN
360 || GET_CODE (insn) == CODE_LABEL
361 || GET_CODE (insn) == CALL_INSN)
362 return NULL_RTX;
363 }
364 }
365 \f
366 /* Mark all registers needed for this pattern. */
367
368 static void
369 mark_regs_pat (pat, set)
370 rtx pat;
371 HARD_REG_SET *set;
372 {
373 enum machine_mode mode;
374 register int regno;
375 register int count;
376
377 if (GET_CODE (pat) == SUBREG)
378 {
379 mode = GET_MODE (pat);
380 regno = SUBREG_WORD (pat);
381 regno += REGNO (SUBREG_REG (pat));
382 }
383 else
384 regno = REGNO (pat), mode = GET_MODE (pat);
385
386 for (count = HARD_REGNO_NREGS (regno, mode);
387 count; count--, regno++)
388 SET_HARD_REG_BIT (*set, regno);
389 }
390 \f
391 /* Reorganise the stack into ascending numbers,
392 after this insn. */
393
394 static void
395 straighten_stack (insn, regstack)
396 rtx insn;
397 stack regstack;
398 {
399 struct stack_def temp_stack;
400 int top;
401
402 /* If there is only a single register on the stack, then the stack is
403 already in increasing order and no reorganization is needed.
404
405 Similarly if the stack is empty. */
406 if (regstack->top <= 0)
407 return;
408
409 temp_stack.reg_set = regstack->reg_set;
410
411 for (top = temp_stack.top = regstack->top; top >= 0; top--)
412 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
413
414 change_stack (insn, regstack, &temp_stack, emit_insn_after);
415 }
416
417 /* Pop a register from the stack */
418
419 static void
420 pop_stack (regstack, regno)
421 stack regstack;
422 int regno;
423 {
424 int top = regstack->top;
425
426 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
427 regstack->top--;
428 /* If regno was not at the top of stack then adjust stack */
429 if (regstack->reg [top] != regno)
430 {
431 int i;
432 for (i = regstack->top; i >= 0; i--)
433 if (regstack->reg [i] == regno)
434 {
435 int j;
436 for (j = i; j < top; j++)
437 regstack->reg [j] = regstack->reg [j + 1];
438 break;
439 }
440 }
441 }
442 \f
443 /* Convert register usage from "flat" register file usage to a "stack
444 register file. FIRST is the first insn in the function, FILE is the
445 dump file, if used.
446
447 First compute the beginning and end of each basic block. Do a
448 register life analysis on the stack registers, recording the result
449 for the head and tail of each basic block. The convert each insn one
450 by one. Run a last jump_optimize() pass, if optimizing, to eliminate
451 any cross-jumping created when the converter inserts pop insns.*/
452
453 void
454 reg_to_stack (first, file)
455 rtx first;
456 FILE *file;
457 {
458 register rtx insn;
459 register int i;
460 int stack_reg_seen = 0;
461 enum machine_mode mode;
462 HARD_REG_SET stackentry;
463
464 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
465
466 max_uid = get_max_uid ();
467 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1,
468 "stack_regs_mentioned cache");
469
470 CLEAR_HARD_REG_SET (stackentry);
471
472 {
473 static int initialised;
474 if (!initialised)
475 {
476 #if 0
477 initialised = 1; /* This array can not have been previously
478 initialised, because the rtx's are
479 thrown away between compilations of
480 functions. */
481 #endif
482 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
483 {
484 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
485 mode = GET_MODE_WIDER_MODE (mode))
486 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
487 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT); mode != VOIDmode;
488 mode = GET_MODE_WIDER_MODE (mode))
489 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
490 }
491 }
492 }
493
494 /* Count the basic blocks. Also find maximum insn uid. */
495 {
496 register RTX_CODE prev_code = BARRIER;
497 register RTX_CODE code;
498 register int before_function_beg = 1;
499
500 max_uid = 0;
501 blocks = 0;
502 for (insn = first; insn; insn = NEXT_INSN (insn))
503 {
504 /* Note that this loop must select the same block boundaries
505 as code in find_blocks. Also note that this code is not the
506 same as that used in flow.c. */
507
508 if (INSN_UID (insn) > max_uid)
509 max_uid = INSN_UID (insn);
510
511 code = GET_CODE (insn);
512
513 if (code == CODE_LABEL
514 || (prev_code != INSN
515 && prev_code != CALL_INSN
516 && prev_code != CODE_LABEL
517 && GET_RTX_CLASS (code) == 'i'))
518 blocks++;
519
520 if (code == NOTE && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG)
521 before_function_beg = 0;
522
523 /* Remember whether or not this insn mentions an FP regs.
524 Check JUMP_INSNs too, in case someone creates a funny PARALLEL. */
525
526 if (GET_RTX_CLASS (code) == 'i'
527 && stack_regs_mentioned_p (PATTERN (insn)))
528 {
529 stack_reg_seen = 1;
530 VARRAY_CHAR (stack_regs_mentioned_data, INSN_UID (insn)) = 1;
531
532 /* Note any register passing parameters. */
533
534 if (before_function_beg && code == INSN
535 && GET_CODE (PATTERN (insn)) == USE)
536 record_reg_life_pat (PATTERN (insn), (HARD_REG_SET *) 0,
537 &stackentry, 1);
538 }
539 else
540 VARRAY_CHAR (stack_regs_mentioned_data, INSN_UID (insn)) = 2;
541
542 if (code == CODE_LABEL)
543 LABEL_REFS (insn) = insn; /* delete old chain */
544
545 if (code != NOTE)
546 prev_code = code;
547 }
548 }
549
550 /* If no stack register reference exists in this insn, there isn't
551 anything to convert. */
552
553 if (! stack_reg_seen)
554 {
555 VARRAY_FREE (stack_regs_mentioned_data);
556 return;
557 }
558
559 /* If there are stack registers, there must be at least one block. */
560
561 if (! blocks)
562 abort ();
563
564 /* Allocate some tables that last till end of compiling this function
565 and some needed only in find_blocks and life_analysis. */
566
567 block_begin = (rtx *) alloca (blocks * sizeof (rtx));
568 block_end = (rtx *) alloca (blocks * sizeof (rtx));
569 block_drops_in = (char *) alloca (blocks);
570
571 block_stack_in = (stack) alloca (blocks * sizeof (struct stack_def));
572 block_out_reg_set = (HARD_REG_SET *) alloca (blocks * sizeof (HARD_REG_SET));
573 bzero ((char *) block_stack_in, blocks * sizeof (struct stack_def));
574 bzero ((char *) block_out_reg_set, blocks * sizeof (HARD_REG_SET));
575
576 block_number = (int *) alloca ((max_uid + 1) * sizeof (int));
577
578 find_blocks (first);
579 stack_reg_life_analysis (first, &stackentry);
580
581 /* Dump the life analysis debug information before jump
582 optimization, as that will destroy the LABEL_REFS we keep the
583 information in. */
584
585 if (file)
586 dump_stack_info (file);
587
588 convert_regs ();
589
590 if (optimize)
591 jump_optimize (first, 2, 0, 0);
592
593 VARRAY_FREE (stack_regs_mentioned_data);
594 }
595 \f
596 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
597 label's chain of references, and note which insn contains each
598 reference. */
599
600 static void
601 record_label_references (insn, pat)
602 rtx insn, pat;
603 {
604 register enum rtx_code code = GET_CODE (pat);
605 register int i;
606 register const char *fmt;
607
608 if (code == LABEL_REF)
609 {
610 register rtx label = XEXP (pat, 0);
611 register rtx ref;
612
613 if (GET_CODE (label) != CODE_LABEL)
614 abort ();
615
616 /* If this is an undefined label, LABEL_REFS (label) contains
617 garbage. */
618 if (INSN_UID (label) == 0)
619 return;
620
621 /* Don't make a duplicate in the code_label's chain. */
622
623 for (ref = LABEL_REFS (label);
624 ref && ref != label;
625 ref = LABEL_NEXTREF (ref))
626 if (CONTAINING_INSN (ref) == insn)
627 return;
628
629 CONTAINING_INSN (pat) = insn;
630 LABEL_NEXTREF (pat) = LABEL_REFS (label);
631 LABEL_REFS (label) = pat;
632
633 return;
634 }
635
636 fmt = GET_RTX_FORMAT (code);
637 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
638 {
639 if (fmt[i] == 'e')
640 record_label_references (insn, XEXP (pat, i));
641 if (fmt[i] == 'E')
642 {
643 register int j;
644 for (j = 0; j < XVECLEN (pat, i); j++)
645 record_label_references (insn, XVECEXP (pat, i, j));
646 }
647 }
648 }
649 \f
650 /* Return a pointer to the REG expression within PAT. If PAT is not a
651 REG, possible enclosed by a conversion rtx, return the inner part of
652 PAT that stopped the search. */
653
654 static rtx *
655 get_true_reg (pat)
656 rtx *pat;
657 {
658 for (;;)
659 switch (GET_CODE (*pat))
660 {
661 case SUBREG:
662 /* Eliminate FP subregister accesses in favour of the
663 actual FP register in use. */
664 {
665 rtx subreg;
666 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
667 {
668 *pat = FP_MODE_REG (REGNO (subreg) + SUBREG_WORD (*pat),
669 GET_MODE (subreg));
670 default:
671 return pat;
672 }
673 }
674 case FLOAT:
675 case FIX:
676 case FLOAT_EXTEND:
677 pat = & XEXP (*pat, 0);
678 }
679 }
680 \f
681 /* Record the life info of each stack reg in INSN, updating REGSTACK.
682 N_INPUTS is the number of inputs; N_OUTPUTS the outputs.
683
684 There are many rules that an asm statement for stack-like regs must
685 follow. Those rules are explained at the top of this file: the rule
686 numbers below refer to that explanation. */
687
688 static void
689 record_asm_reg_life (insn, regstack)
690 rtx insn;
691 stack regstack;
692 {
693 int i;
694 int n_clobbers;
695 int malformed_asm = 0;
696 rtx body = PATTERN (insn);
697
698 int reg_used_as_output[FIRST_PSEUDO_REGISTER];
699 int implicitly_dies[FIRST_PSEUDO_REGISTER];
700 int alt;
701
702 rtx *clobber_reg;
703 int n_inputs, n_outputs;
704
705 /* Find out what the constraints require. If no constraint
706 alternative matches, this asm is malformed. */
707 extract_insn (insn);
708 constrain_operands (1);
709 alt = which_alternative;
710
711 preprocess_constraints ();
712
713 n_inputs = get_asm_operand_n_inputs (body);
714 n_outputs = recog_n_operands - n_inputs;
715
716 if (alt < 0)
717 {
718 malformed_asm = 1;
719 /* Avoid further trouble with this insn. */
720 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
721 PUT_MODE (insn, VOIDmode);
722 return;
723 }
724
725 /* Strip SUBREGs here to make the following code simpler. */
726 for (i = 0; i < recog_n_operands; i++)
727 if (GET_CODE (recog_operand[i]) == SUBREG
728 && GET_CODE (SUBREG_REG (recog_operand[i])) == REG)
729 recog_operand[i] = SUBREG_REG (recog_operand[i]);
730
731 /* Set up CLOBBER_REG. */
732
733 n_clobbers = 0;
734
735 if (GET_CODE (body) == PARALLEL)
736 {
737 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
738
739 for (i = 0; i < XVECLEN (body, 0); i++)
740 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
741 {
742 rtx clobber = XVECEXP (body, 0, i);
743 rtx reg = XEXP (clobber, 0);
744
745 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
746 reg = SUBREG_REG (reg);
747
748 if (STACK_REG_P (reg))
749 {
750 clobber_reg[n_clobbers] = reg;
751 n_clobbers++;
752 }
753 }
754 }
755
756 /* Enforce rule #4: Output operands must specifically indicate which
757 reg an output appears in after an asm. "=f" is not allowed: the
758 operand constraints must select a class with a single reg.
759
760 Also enforce rule #5: Output operands must start at the top of
761 the reg-stack: output operands may not "skip" a reg. */
762
763 bzero ((char *) reg_used_as_output, sizeof (reg_used_as_output));
764 for (i = 0; i < n_outputs; i++)
765 if (STACK_REG_P (recog_operand[i]))
766 {
767 if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1)
768 {
769 error_for_asm (insn, "Output constraint %d must specify a single register", i);
770 malformed_asm = 1;
771 }
772 else
773 reg_used_as_output[REGNO (recog_operand[i])] = 1;
774 }
775
776
777 /* Search for first non-popped reg. */
778 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
779 if (! reg_used_as_output[i])
780 break;
781
782 /* If there are any other popped regs, that's an error. */
783 for (; i < LAST_STACK_REG + 1; i++)
784 if (reg_used_as_output[i])
785 break;
786
787 if (i != LAST_STACK_REG + 1)
788 {
789 error_for_asm (insn, "Output regs must be grouped at top of stack");
790 malformed_asm = 1;
791 }
792
793 /* Enforce rule #2: All implicitly popped input regs must be closer
794 to the top of the reg-stack than any input that is not implicitly
795 popped. */
796
797 bzero ((char *) implicitly_dies, sizeof (implicitly_dies));
798 for (i = n_outputs; i < n_outputs + n_inputs; i++)
799 if (STACK_REG_P (recog_operand[i]))
800 {
801 /* An input reg is implicitly popped if it is tied to an
802 output, or if there is a CLOBBER for it. */
803 int j;
804
805 for (j = 0; j < n_clobbers; j++)
806 if (operands_match_p (clobber_reg[j], recog_operand[i]))
807 break;
808
809 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
810 implicitly_dies[REGNO (recog_operand[i])] = 1;
811 }
812
813 /* Search for first non-popped reg. */
814 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
815 if (! implicitly_dies[i])
816 break;
817
818 /* If there are any other popped regs, that's an error. */
819 for (; i < LAST_STACK_REG + 1; i++)
820 if (implicitly_dies[i])
821 break;
822
823 if (i != LAST_STACK_REG + 1)
824 {
825 error_for_asm (insn,
826 "Implicitly popped regs must be grouped at top of stack");
827 malformed_asm = 1;
828 }
829
830 /* Enfore rule #3: If any input operand uses the "f" constraint, all
831 output constraints must use the "&" earlyclobber.
832
833 ??? Detect this more deterministically by having constraint_asm_operands
834 record any earlyclobber. */
835
836 for (i = n_outputs; i < n_outputs + n_inputs; i++)
837 if (recog_op_alt[i][alt].matches == -1)
838 {
839 int j;
840
841 for (j = 0; j < n_outputs; j++)
842 if (operands_match_p (recog_operand[j], recog_operand[i]))
843 {
844 error_for_asm (insn,
845 "Output operand %d must use `&' constraint", j);
846 malformed_asm = 1;
847 }
848 }
849
850 if (malformed_asm)
851 {
852 /* Avoid further trouble with this insn. */
853 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
854 VARRAY_CHAR (stack_regs_mentioned_data, INSN_UID (insn)) = 2;
855 return;
856 }
857
858 /* Process all outputs */
859 for (i = 0; i < n_outputs; i++)
860 {
861 rtx op = recog_operand[i];
862
863 if (! STACK_REG_P (op))
864 {
865 if (stack_regs_mentioned_p (op))
866 abort ();
867 else
868 continue;
869 }
870
871 /* Each destination is dead before this insn. If the
872 destination is not used after this insn, record this with
873 REG_UNUSED. */
874
875 if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (op)))
876 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_UNUSED, op,
877 REG_NOTES (insn));
878
879 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (op));
880 }
881
882 /* Process all inputs */
883 for (i = n_outputs; i < n_outputs + n_inputs; i++)
884 {
885 rtx op = recog_operand[i];
886 if (! STACK_REG_P (op))
887 {
888 if (stack_regs_mentioned_p (op))
889 abort ();
890 else
891 continue;
892 }
893
894 /* If an input is dead after the insn, record a death note.
895 But don't record a death note if there is already a death note,
896 or if the input is also an output. */
897
898 if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (op))
899 && recog_op_alt[i][alt].matches == -1
900 && find_regno_note (insn, REG_DEAD, REGNO (op)) == NULL_RTX)
901 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, op, REG_NOTES (insn));
902
903 SET_HARD_REG_BIT (regstack->reg_set, REGNO (op));
904 }
905 }
906
907 /* Scan PAT, which is part of INSN, and record registers appearing in
908 a SET_DEST in DEST, and other registers in SRC.
909
910 This function does not know about SET_DESTs that are both input and
911 output (such as ZERO_EXTRACT) - this cannot happen on a 387. */
912
913 static void
914 record_reg_life_pat (pat, src, dest, douse)
915 rtx pat;
916 HARD_REG_SET *src, *dest;
917 int douse;
918 {
919 register const char *fmt;
920 register int i;
921
922 if (STACK_REG_P (pat)
923 || (GET_CODE (pat) == SUBREG && STACK_REG_P (SUBREG_REG (pat))))
924 {
925 if (src)
926 mark_regs_pat (pat, src);
927
928 if (dest)
929 mark_regs_pat (pat, dest);
930
931 return;
932 }
933
934 if (GET_CODE (pat) == SET)
935 {
936 record_reg_life_pat (XEXP (pat, 0), NULL_PTR, dest, 0);
937 record_reg_life_pat (XEXP (pat, 1), src, NULL_PTR, 0);
938 return;
939 }
940
941 /* We don't need to consider either of these cases. */
942 if ((GET_CODE (pat) == USE && !douse) || GET_CODE (pat) == CLOBBER)
943 return;
944
945 fmt = GET_RTX_FORMAT (GET_CODE (pat));
946 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
947 {
948 if (fmt[i] == 'E')
949 {
950 register int j;
951
952 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
953 record_reg_life_pat (XVECEXP (pat, i, j), src, dest, 0);
954 }
955 else if (fmt[i] == 'e')
956 record_reg_life_pat (XEXP (pat, i), src, dest, 0);
957 }
958 }
959 \f
960 /* Calculate the number of inputs and outputs in BODY, an
961 asm_operands. N_OPERANDS is the total number of operands, and
962 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
963 placed. */
964
965 static int
966 get_asm_operand_n_inputs (body)
967 rtx body;
968 {
969 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
970 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
971
972 else if (GET_CODE (body) == ASM_OPERANDS)
973 return ASM_OPERANDS_INPUT_LENGTH (body);
974
975 else if (GET_CODE (body) == PARALLEL
976 && GET_CODE (XVECEXP (body, 0, 0)) == SET)
977 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
978
979 else if (GET_CODE (body) == PARALLEL
980 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
981 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
982
983 abort ();
984 }
985 \f
986 /* Scan INSN, which is in BLOCK, and record the life & death of stack
987 registers in REGSTACK. This function is called to process insns from
988 the last insn in a block to the first. The actual scanning is done in
989 record_reg_life_pat.
990
991 If a register is live after a CALL_INSN, but is not a value return
992 register for that CALL_INSN, then code is emitted to initialize that
993 register. The block_end[] data is kept accurate.
994
995 Existing death and unset notes for stack registers are deleted
996 before processing the insn. */
997
998 static void
999 record_reg_life (insn, block, regstack)
1000 rtx insn;
1001 int block;
1002 stack regstack;
1003 {
1004 rtx note, *note_link;
1005 int n_operands;
1006
1007 if ((GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN)
1008 || INSN_DELETED_P (insn))
1009 return;
1010
1011 /* Strip death notes for stack regs from this insn */
1012
1013 note_link = &REG_NOTES(insn);
1014 for (note = *note_link; note; note = XEXP (note, 1))
1015 if (STACK_REG_P (XEXP (note, 0))
1016 && (REG_NOTE_KIND (note) == REG_DEAD
1017 || REG_NOTE_KIND (note) == REG_UNUSED))
1018 *note_link = XEXP (note, 1);
1019 else
1020 note_link = &XEXP (note, 1);
1021
1022 /* Process all patterns in the insn. */
1023
1024 n_operands = asm_noperands (PATTERN (insn));
1025 if (n_operands >= 0)
1026 {
1027 record_asm_reg_life (insn, regstack);
1028 return;
1029 }
1030
1031 {
1032 HARD_REG_SET src, dest;
1033 int regno;
1034
1035 CLEAR_HARD_REG_SET (src);
1036 CLEAR_HARD_REG_SET (dest);
1037
1038 if (GET_CODE (insn) == CALL_INSN)
1039 for (note = CALL_INSN_FUNCTION_USAGE (insn);
1040 note;
1041 note = XEXP (note, 1))
1042 if (GET_CODE (XEXP (note, 0)) == USE)
1043 record_reg_life_pat (SET_DEST (XEXP (note, 0)), &src, NULL_PTR, 0);
1044
1045 record_reg_life_pat (PATTERN (insn), &src, &dest, 0);
1046 for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++)
1047 if (! TEST_HARD_REG_BIT (regstack->reg_set, regno))
1048 {
1049 if (TEST_HARD_REG_BIT (src, regno)
1050 && ! TEST_HARD_REG_BIT (dest, regno))
1051 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD,
1052 FP_MODE_REG (regno, DFmode),
1053 REG_NOTES (insn));
1054 else if (TEST_HARD_REG_BIT (dest, regno))
1055 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_UNUSED,
1056 FP_MODE_REG (regno, DFmode),
1057 REG_NOTES (insn));
1058 }
1059
1060 if (GET_CODE (insn) == CALL_INSN)
1061 {
1062 int reg;
1063
1064 /* There might be a reg that is live after a function call.
1065 Initialize it to zero so that the program does not crash. See
1066 comment towards the end of stack_reg_life_analysis(). */
1067
1068 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
1069 if (! TEST_HARD_REG_BIT (dest, reg)
1070 && TEST_HARD_REG_BIT (regstack->reg_set, reg))
1071 {
1072 rtx init, pat;
1073
1074 /* The insn will use virtual register numbers, and so
1075 convert_regs is expected to process these. But BLOCK_NUM
1076 cannot be used on these insns, because they do not appear in
1077 block_number[]. */
1078
1079 pat = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, DFmode),
1080 CONST0_RTX (DFmode));
1081 init = emit_insn_after (pat, insn);
1082
1083 CLEAR_HARD_REG_BIT (regstack->reg_set, reg);
1084
1085 /* If the CALL_INSN was the end of a block, move the
1086 block_end to point to the new insn. */
1087
1088 if (block_end[block] == insn)
1089 block_end[block] = init;
1090 }
1091
1092 /* Some regs do not survive a CALL */
1093 AND_COMPL_HARD_REG_SET (regstack->reg_set, call_used_reg_set);
1094 }
1095
1096 AND_COMPL_HARD_REG_SET (regstack->reg_set, dest);
1097 IOR_HARD_REG_SET (regstack->reg_set, src);
1098 }
1099 }
1100 \f
1101 /* Find all basic blocks of the function, which starts with FIRST.
1102 For each JUMP_INSN, build the chain of LABEL_REFS on each CODE_LABEL. */
1103
1104 static void
1105 find_blocks (first)
1106 rtx first;
1107 {
1108 register rtx insn;
1109 register int block;
1110 register RTX_CODE prev_code = BARRIER;
1111 register RTX_CODE code;
1112 rtx label_value_list = 0;
1113
1114 /* Record where all the blocks start and end.
1115 Record which basic blocks control can drop in to. */
1116
1117 block = -1;
1118 for (insn = first; insn; insn = NEXT_INSN (insn))
1119 {
1120 /* Note that this loop must select the same block boundaries
1121 as code in reg_to_stack, but that these are not the same
1122 as those selected in flow.c. */
1123
1124 code = GET_CODE (insn);
1125
1126 if (code == CODE_LABEL
1127 || (prev_code != INSN
1128 && prev_code != CALL_INSN
1129 && prev_code != CODE_LABEL
1130 && GET_RTX_CLASS (code) == 'i'))
1131 {
1132 block_begin[++block] = insn;
1133 block_end[block] = insn;
1134 block_drops_in[block] = prev_code != BARRIER;
1135 }
1136 else if (GET_RTX_CLASS (code) == 'i')
1137 block_end[block] = insn;
1138
1139 if (GET_RTX_CLASS (code) == 'i')
1140 {
1141 rtx note;
1142
1143 /* Make a list of all labels referred to other than by jumps. */
1144 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1145 if (REG_NOTE_KIND (note) == REG_LABEL)
1146 label_value_list = gen_rtx_EXPR_LIST (VOIDmode, XEXP (note, 0),
1147 label_value_list);
1148 }
1149
1150 block_number[INSN_UID (insn)] = block;
1151
1152 if (code != NOTE)
1153 prev_code = code;
1154 }
1155
1156 if (block + 1 != blocks)
1157 abort ();
1158
1159 /* generate all label references to the corresponding jump insn */
1160 for (block = 0; block < blocks; block++)
1161 {
1162 insn = block_end[block];
1163
1164 if (GET_CODE (insn) == JUMP_INSN)
1165 {
1166 rtx pat = PATTERN (insn);
1167 rtx x;
1168
1169 if (computed_jump_p (insn))
1170 {
1171 for (x = label_value_list; x; x = XEXP (x, 1))
1172 record_label_references (insn,
1173 gen_rtx_LABEL_REF (VOIDmode,
1174 XEXP (x, 0)));
1175
1176 for (x = forced_labels; x; x = XEXP (x, 1))
1177 record_label_references (insn,
1178 gen_rtx_LABEL_REF (VOIDmode,
1179 XEXP (x, 0)));
1180 }
1181
1182 record_label_references (insn, pat);
1183 }
1184 }
1185 }
1186
1187 /* If current function returns its result in an fp stack register,
1188 return the REG. Otherwise, return 0. */
1189
1190 static rtx
1191 stack_result (decl)
1192 tree decl;
1193 {
1194 rtx result = DECL_RTL (DECL_RESULT (decl));
1195
1196 if (result != 0
1197 && ! (GET_CODE (result) == REG
1198 && REGNO (result) < FIRST_PSEUDO_REGISTER))
1199 {
1200 #ifdef FUNCTION_OUTGOING_VALUE
1201 result
1202 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
1203 #else
1204 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
1205 #endif
1206 }
1207
1208 return result != 0 && STACK_REG_P (result) ? result : 0;
1209 }
1210 \f
1211 /* Determine the which registers are live at the start of each basic
1212 block of the function whose first insn is FIRST.
1213
1214 First, if the function returns a real_type, mark the function
1215 return type as live at each return point, as the RTL may not give any
1216 hint that the register is live.
1217
1218 Then, start with the last block and work back to the first block.
1219 Similarly, work backwards within each block, insn by insn, recording
1220 which regs are dead and which are used (and therefore live) in the
1221 hard reg set of block_stack_in[].
1222
1223 After processing each basic block, if there is a label at the start
1224 of the block, propagate the live registers to all jumps to this block.
1225
1226 As a special case, if there are regs live in this block, that are
1227 not live in a block containing a jump to this label, and the block
1228 containing the jump has already been processed, we must propagate this
1229 block's entry register life back to the block containing the jump, and
1230 restart life analysis from there.
1231
1232 In the worst case, this function may traverse the insns
1233 REG_STACK_SIZE times. This is necessary, since a jump towards the end
1234 of the insns may not know that a reg is live at a target that is early
1235 in the insns. So we back up and start over with the new reg live.
1236
1237 If there are registers that are live at the start of the function,
1238 insns are emitted to initialize these registers. Something similar is
1239 done after CALL_INSNs in record_reg_life. */
1240
1241 static void
1242 stack_reg_life_analysis (first, stackentry)
1243 rtx first;
1244 HARD_REG_SET *stackentry;
1245 {
1246 int reg, block;
1247 struct stack_def regstack;
1248
1249 {
1250 rtx retvalue;
1251
1252 if ((retvalue = stack_result (current_function_decl)))
1253 {
1254 /* Find all RETURN insns and mark them. */
1255
1256 for (block = blocks - 1; --block >= 0;)
1257 if (GET_CODE (block_end[block]) == JUMP_INSN
1258 && returnjump_p (block_end[block]))
1259 mark_regs_pat (retvalue, block_out_reg_set+block);
1260
1261 /* Mark off the end of last block if we "fall off" the end of the
1262 function into the epilogue. */
1263
1264 if (GET_CODE (block_end[blocks-1]) != JUMP_INSN
1265 || GET_CODE (PATTERN (block_end[blocks-1])) == RETURN)
1266 mark_regs_pat (retvalue, block_out_reg_set+blocks-1);
1267 }
1268 }
1269
1270 /* now scan all blocks backward for stack register use */
1271
1272 block = blocks - 1;
1273 while (block >= 0)
1274 {
1275 register rtx insn, prev;
1276
1277 /* current register status at last instruction */
1278
1279 COPY_HARD_REG_SET (regstack.reg_set, block_out_reg_set[block]);
1280
1281 prev = block_end[block];
1282 do
1283 {
1284 insn = prev;
1285 prev = PREV_INSN (insn);
1286
1287 /* If the insn is a CALL_INSN, we need to ensure that
1288 everything dies. But otherwise don't process unless there
1289 are some stack regs present. */
1290
1291 if (stack_regs_mentioned (insn) || GET_CODE (insn) == CALL_INSN)
1292 record_reg_life (insn, block, &regstack);
1293
1294 } while (insn != block_begin[block]);
1295
1296 /* Set the state at the start of the block. Mark that no
1297 register mapping information known yet. */
1298
1299 COPY_HARD_REG_SET (block_stack_in[block].reg_set, regstack.reg_set);
1300 block_stack_in[block].top = -2;
1301
1302 /* If there is a label, propagate our register life to all jumps
1303 to this label. */
1304
1305 if (GET_CODE (insn) == CODE_LABEL)
1306 {
1307 register rtx label;
1308 int must_restart = 0;
1309
1310 for (label = LABEL_REFS (insn); label != insn;
1311 label = LABEL_NEXTREF (label))
1312 {
1313 int jump_block = BLOCK_NUM (CONTAINING_INSN (label));
1314
1315 if (jump_block < block)
1316 IOR_HARD_REG_SET (block_out_reg_set[jump_block],
1317 block_stack_in[block].reg_set);
1318 else
1319 {
1320 /* The block containing the jump has already been
1321 processed. If there are registers that were not known
1322 to be live then, but are live now, we must back up
1323 and restart life analysis from that point with the new
1324 life information. */
1325
1326 GO_IF_HARD_REG_SUBSET (block_stack_in[block].reg_set,
1327 block_out_reg_set[jump_block],
1328 win);
1329
1330 IOR_HARD_REG_SET (block_out_reg_set[jump_block],
1331 block_stack_in[block].reg_set);
1332
1333 block = jump_block;
1334 must_restart = 1;
1335 break;
1336
1337 win:
1338 ;
1339 }
1340 }
1341 if (must_restart)
1342 continue;
1343 }
1344
1345 if (block_drops_in[block])
1346 IOR_HARD_REG_SET (block_out_reg_set[block-1],
1347 block_stack_in[block].reg_set);
1348
1349 block -= 1;
1350 }
1351
1352 /* If any reg is live at the start of the first block of a
1353 function, then we must guarantee that the reg holds some value by
1354 generating our own "load" of that register. Otherwise a 387 would
1355 fault trying to access an empty register. */
1356
1357 /* Load zero into each live register. The fact that a register
1358 appears live at the function start necessarily implies an error
1359 in the user program: it means that (unless the offending code is *never*
1360 executed) this program is using uninitialised floating point
1361 variables. In order to keep broken code like this happy, we initialise
1362 those variables with zero.
1363
1364 Note that we are inserting virtual register references here:
1365 these insns must be processed by convert_regs later. Also, these
1366 insns will not be in block_number, so BLOCK_NUM() will fail for them. */
1367
1368 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; reg--)
1369 if (TEST_HARD_REG_BIT (block_stack_in[0].reg_set, reg)
1370 && ! TEST_HARD_REG_BIT (*stackentry, reg))
1371 {
1372 rtx init_rtx;
1373
1374 init_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG(reg, DFmode),
1375 CONST0_RTX (DFmode));
1376 block_begin[0] = emit_insn_after (init_rtx, first);
1377
1378 CLEAR_HARD_REG_BIT (block_stack_in[0].reg_set, reg);
1379 }
1380 }
1381 \f
1382 /*
1383 * This section deals with stack register substitution, and forms the second
1384 * pass over the RTL.
1385 */
1386
1387 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
1388 the desired hard REGNO. */
1389
1390 static void
1391 replace_reg (reg, regno)
1392 rtx *reg;
1393 int regno;
1394 {
1395 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
1396 || ! STACK_REG_P (*reg))
1397 abort ();
1398
1399 switch (GET_MODE_CLASS (GET_MODE (*reg)))
1400 {
1401 default: abort ();
1402 case MODE_FLOAT:
1403 case MODE_COMPLEX_FLOAT:;
1404 }
1405
1406 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
1407 }
1408
1409 /* Remove a note of type NOTE, which must be found, for register
1410 number REGNO from INSN. Remove only one such note. */
1411
1412 static void
1413 remove_regno_note (insn, note, regno)
1414 rtx insn;
1415 enum reg_note note;
1416 int regno;
1417 {
1418 register rtx *note_link, this;
1419
1420 note_link = &REG_NOTES(insn);
1421 for (this = *note_link; this; this = XEXP (this, 1))
1422 if (REG_NOTE_KIND (this) == note
1423 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
1424 {
1425 *note_link = XEXP (this, 1);
1426 return;
1427 }
1428 else
1429 note_link = &XEXP (this, 1);
1430
1431 abort ();
1432 }
1433
1434 /* Find the hard register number of virtual register REG in REGSTACK.
1435 The hard register number is relative to the top of the stack. -1 is
1436 returned if the register is not found. */
1437
1438 static int
1439 get_hard_regnum (regstack, reg)
1440 stack regstack;
1441 rtx reg;
1442 {
1443 int i;
1444
1445 if (! STACK_REG_P (reg))
1446 abort ();
1447
1448 for (i = regstack->top; i >= 0; i--)
1449 if (regstack->reg[i] == REGNO (reg))
1450 break;
1451
1452 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
1453 }
1454
1455 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
1456 the chain of insns. Doing so could confuse block_begin and block_end
1457 if this were the only insn in the block. */
1458
1459 static void
1460 delete_insn_for_stacker (insn)
1461 rtx insn;
1462 {
1463 PUT_CODE (insn, NOTE);
1464 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1465 NOTE_SOURCE_FILE (insn) = 0;
1466 }
1467 \f
1468 /* Emit an insn to pop virtual register REG before or after INSN.
1469 REGSTACK is the stack state after INSN and is updated to reflect this
1470 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
1471 is represented as a SET whose destination is the register to be popped
1472 and source is the top of stack. A death note for the top of stack
1473 cases the movdf pattern to pop. */
1474
1475 static rtx
1476 emit_pop_insn (insn, regstack, reg, when)
1477 rtx insn;
1478 stack regstack;
1479 rtx reg;
1480 rtx (*when)();
1481 {
1482 rtx pop_insn, pop_rtx;
1483 int hard_regno;
1484
1485 hard_regno = get_hard_regnum (regstack, reg);
1486
1487 if (hard_regno < FIRST_STACK_REG)
1488 abort ();
1489
1490 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
1491 FP_MODE_REG (FIRST_STACK_REG, DFmode));
1492
1493 pop_insn = (*when) (pop_rtx, insn);
1494
1495 REG_NOTES (pop_insn) = gen_rtx_EXPR_LIST (REG_DEAD,
1496 FP_MODE_REG (FIRST_STACK_REG, DFmode),
1497 REG_NOTES (pop_insn));
1498
1499 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
1500 = regstack->reg[regstack->top];
1501 regstack->top -= 1;
1502 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
1503
1504 return pop_insn;
1505 }
1506 \f
1507 /* Emit an insn before or after INSN to swap virtual register REG with the
1508 top of stack. WHEN should be `emit_insn_before' or `emit_insn_before'
1509 REGSTACK is the stack state before the swap, and is updated to reflect
1510 the swap. A swap insn is represented as a PARALLEL of two patterns:
1511 each pattern moves one reg to the other.
1512
1513 If REG is already at the top of the stack, no insn is emitted. */
1514
1515 static void
1516 emit_swap_insn (insn, regstack, reg)
1517 rtx insn;
1518 stack regstack;
1519 rtx reg;
1520 {
1521 int hard_regno;
1522 rtx swap_rtx, swap_insn;
1523 int tmp, other_reg; /* swap regno temps */
1524 rtx i1; /* the stack-reg insn prior to INSN */
1525 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
1526
1527 hard_regno = get_hard_regnum (regstack, reg);
1528
1529 if (hard_regno < FIRST_STACK_REG)
1530 abort ();
1531 if (hard_regno == FIRST_STACK_REG)
1532 return;
1533
1534 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
1535
1536 tmp = regstack->reg[other_reg];
1537 regstack->reg[other_reg] = regstack->reg[regstack->top];
1538 regstack->reg[regstack->top] = tmp;
1539
1540 /* Find the previous insn involving stack regs, but don't go past
1541 any labels, calls or jumps. */
1542 i1 = prev_nonnote_insn (insn);
1543 while (i1 && GET_CODE (i1) == INSN && !stack_regs_mentioned (i1))
1544 i1 = prev_nonnote_insn (i1);
1545
1546 if (i1)
1547 i1set = single_set (i1);
1548
1549 if (i1set)
1550 {
1551 rtx i1src = *get_true_reg (&SET_SRC (i1set));
1552 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
1553
1554 /* If the previous register stack push was from the reg we are to
1555 swap with, omit the swap. */
1556
1557 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG
1558 && GET_CODE (i1src) == REG && REGNO (i1src) == hard_regno - 1
1559 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1560 return;
1561
1562 /* If the previous insn wrote to the reg we are to swap with,
1563 omit the swap. */
1564
1565 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == hard_regno
1566 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG
1567 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1568 return;
1569 }
1570
1571 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
1572 FP_MODE_REG (FIRST_STACK_REG, XFmode));
1573 swap_insn = emit_insn_after (swap_rtx, i1);
1574 }
1575 \f
1576 /* Handle a move to or from a stack register in PAT, which is in INSN.
1577 REGSTACK is the current stack. */
1578
1579 static void
1580 move_for_stack_reg (insn, regstack, pat)
1581 rtx insn;
1582 stack regstack;
1583 rtx pat;
1584 {
1585 rtx *psrc = get_true_reg (&SET_SRC (pat));
1586 rtx *pdest = get_true_reg (&SET_DEST (pat));
1587 rtx src, dest;
1588 rtx note;
1589
1590 src = *psrc; dest = *pdest;
1591
1592 if (STACK_REG_P (src) && STACK_REG_P (dest))
1593 {
1594 /* Write from one stack reg to another. If SRC dies here, then
1595 just change the register mapping and delete the insn. */
1596
1597 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1598 if (note)
1599 {
1600 int i;
1601
1602 /* If this is a no-op move, there must not be a REG_DEAD note. */
1603 if (REGNO (src) == REGNO (dest))
1604 abort ();
1605
1606 for (i = regstack->top; i >= 0; i--)
1607 if (regstack->reg[i] == REGNO (src))
1608 break;
1609
1610 /* The source must be live, and the dest must be dead. */
1611 if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1612 abort ();
1613
1614 /* It is possible that the dest is unused after this insn.
1615 If so, just pop the src. */
1616
1617 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1618 {
1619 emit_pop_insn (insn, regstack, src, emit_insn_after);
1620
1621 delete_insn_for_stacker (insn);
1622 return;
1623 }
1624
1625 regstack->reg[i] = REGNO (dest);
1626
1627 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1628 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1629
1630 delete_insn_for_stacker (insn);
1631
1632 return;
1633 }
1634
1635 /* The source reg does not die. */
1636
1637 /* If this appears to be a no-op move, delete it, or else it
1638 will confuse the machine description output patterns. But if
1639 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1640 for REG_UNUSED will not work for deleted insns. */
1641
1642 if (REGNO (src) == REGNO (dest))
1643 {
1644 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1645 emit_pop_insn (insn, regstack, dest, emit_insn_after);
1646
1647 delete_insn_for_stacker (insn);
1648 return;
1649 }
1650
1651 /* The destination ought to be dead */
1652 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1653 abort ();
1654
1655 replace_reg (psrc, get_hard_regnum (regstack, src));
1656
1657 regstack->reg[++regstack->top] = REGNO (dest);
1658 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1659 replace_reg (pdest, FIRST_STACK_REG);
1660 }
1661 else if (STACK_REG_P (src))
1662 {
1663 /* Save from a stack reg to MEM, or possibly integer reg. Since
1664 only top of stack may be saved, emit an exchange first if
1665 needs be. */
1666
1667 emit_swap_insn (insn, regstack, src);
1668
1669 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1670 if (note)
1671 {
1672 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1673 regstack->top--;
1674 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1675 }
1676 else if (GET_MODE (src) == XFmode && regstack->top < REG_STACK_SIZE - 1)
1677 {
1678 /* A 387 cannot write an XFmode value to a MEM without
1679 clobbering the source reg. The output code can handle
1680 this by reading back the value from the MEM.
1681 But it is more efficient to use a temp register if one is
1682 available. Push the source value here if the register
1683 stack is not full, and then write the value to memory via
1684 a pop. */
1685 rtx push_rtx, push_insn;
1686 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, XFmode);
1687
1688 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1689 push_insn = emit_insn_before (push_rtx, insn);
1690 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1691 REG_NOTES (insn));
1692 }
1693
1694 replace_reg (psrc, FIRST_STACK_REG);
1695 }
1696 else if (STACK_REG_P (dest))
1697 {
1698 /* Load from MEM, or possibly integer REG or constant, into the
1699 stack regs. The actual target is always the top of the
1700 stack. The stack mapping is changed to reflect that DEST is
1701 now at top of stack. */
1702
1703 /* The destination ought to be dead */
1704 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1705 abort ();
1706
1707 if (regstack->top >= REG_STACK_SIZE)
1708 abort ();
1709
1710 regstack->reg[++regstack->top] = REGNO (dest);
1711 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1712 replace_reg (pdest, FIRST_STACK_REG);
1713 }
1714 else
1715 abort ();
1716 }
1717 \f
1718 /* Swap the condition on a branch, if there is one. Return true if we
1719 found a condition to swap. False if the condition was not used as
1720 such. */
1721
1722 static int
1723 swap_rtx_condition_1 (pat)
1724 rtx pat;
1725 {
1726 register const char *fmt;
1727 register int i, r = 0;
1728
1729 if (GET_RTX_CLASS (GET_CODE (pat)) == '<')
1730 {
1731 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1732 r = 1;
1733 }
1734 else
1735 {
1736 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1737 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1738 {
1739 if (fmt[i] == 'E')
1740 {
1741 register int j;
1742
1743 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1744 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1745 }
1746 else if (fmt[i] == 'e')
1747 r |= swap_rtx_condition_1 (XEXP (pat, i));
1748 }
1749 }
1750
1751 return r;
1752 }
1753
1754 static int
1755 swap_rtx_condition (insn)
1756 rtx insn;
1757 {
1758 rtx pat = PATTERN (insn);
1759
1760 /* We're looking for a single set to cc0 or an HImode temporary. */
1761
1762 if (GET_CODE (pat) == SET
1763 && GET_CODE (SET_DEST (pat)) == REG
1764 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1765 {
1766 insn = next_flags_user (insn);
1767 if (insn == NULL_RTX)
1768 return 0;
1769 pat = PATTERN (insn);
1770 }
1771
1772 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're
1773 not doing anything with the cc value right now. We may be able to
1774 search for one though. */
1775
1776 if (GET_CODE (pat) == SET
1777 && GET_CODE (SET_SRC (pat)) == UNSPEC
1778 && XINT (SET_SRC (pat), 1) == 9)
1779 {
1780 rtx dest = SET_DEST (pat);
1781
1782 /* Search forward looking for the first use of this value.
1783 Stop at block boundaries. */
1784 /* ??? This really cries for BLOCK_END! */
1785 while (1)
1786 {
1787 insn = NEXT_INSN (insn);
1788 if (insn == NULL_RTX)
1789 return 0;
1790 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
1791 && reg_mentioned_p (dest, insn))
1792 break;
1793 if (GET_CODE (insn) == JUMP_INSN)
1794 return 0;
1795 if (GET_CODE (insn) == CODE_LABEL)
1796 return 0;
1797 }
1798
1799 /* So we've found the insn using this value. If it is anything
1800 other than sahf, aka unspec 10, or the value does not die
1801 (meaning we'd have to search further), then we must give up. */
1802 pat = PATTERN (insn);
1803 if (GET_CODE (pat) != SET
1804 || GET_CODE (SET_SRC (pat)) != UNSPEC
1805 || XINT (SET_SRC (pat), 1) != 10
1806 || ! dead_or_set_p (insn, dest))
1807 return 0;
1808
1809 /* Now we are prepared to handle this as a normal cc0 setter. */
1810 insn = next_flags_user (insn);
1811 if (insn == NULL_RTX)
1812 return 0;
1813 pat = PATTERN (insn);
1814 }
1815
1816 return swap_rtx_condition_1 (pat);
1817 }
1818
1819 /* Handle a comparison. Special care needs to be taken to avoid
1820 causing comparisons that a 387 cannot do correctly, such as EQ.
1821
1822 Also, a pop insn may need to be emitted. The 387 does have an
1823 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1824 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1825 set up. */
1826
1827 static void
1828 compare_for_stack_reg (insn, regstack, pat_src)
1829 rtx insn;
1830 stack regstack;
1831 rtx pat_src;
1832 {
1833 rtx *src1, *src2;
1834 rtx src1_note, src2_note;
1835 rtx flags_user;
1836
1837 src1 = get_true_reg (&XEXP (pat_src, 0));
1838 src2 = get_true_reg (&XEXP (pat_src, 1));
1839 flags_user = next_flags_user (insn);
1840
1841 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1842 registers that die in this insn - move those to stack top first. */
1843 if ((! STACK_REG_P (*src1)
1844 || (STACK_REG_P (*src2)
1845 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1846 && swap_rtx_condition (insn))
1847 {
1848 rtx temp;
1849 temp = XEXP (pat_src, 0);
1850 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1851 XEXP (pat_src, 1) = temp;
1852
1853 src1 = get_true_reg (&XEXP (pat_src, 0));
1854 src2 = get_true_reg (&XEXP (pat_src, 1));
1855
1856 INSN_CODE (insn) = -1;
1857 }
1858
1859 /* We will fix any death note later. */
1860
1861 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1862
1863 if (STACK_REG_P (*src2))
1864 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1865 else
1866 src2_note = NULL_RTX;
1867
1868 emit_swap_insn (insn, regstack, *src1);
1869
1870 replace_reg (src1, FIRST_STACK_REG);
1871
1872 if (STACK_REG_P (*src2))
1873 replace_reg (src2, get_hard_regnum (regstack, *src2));
1874
1875 if (src1_note)
1876 {
1877 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1878 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1879 }
1880
1881 /* If the second operand dies, handle that. But if the operands are
1882 the same stack register, don't bother, because only one death is
1883 needed, and it was just handled. */
1884
1885 if (src2_note
1886 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1887 && REGNO (*src1) == REGNO (*src2)))
1888 {
1889 /* As a special case, two regs may die in this insn if src2 is
1890 next to top of stack and the top of stack also dies. Since
1891 we have already popped src1, "next to top of stack" is really
1892 at top (FIRST_STACK_REG) now. */
1893
1894 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1895 && src1_note)
1896 {
1897 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1898 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1899 }
1900 else
1901 {
1902 /* The 386 can only represent death of the first operand in
1903 the case handled above. In all other cases, emit a separate
1904 pop and remove the death note from here. */
1905
1906 /* link_cc0_insns (insn); */
1907
1908 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1909
1910 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1911 emit_insn_after);
1912 }
1913 }
1914 }
1915 \f
1916 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1917 is the current register layout. */
1918
1919 static void
1920 subst_stack_regs_pat (insn, regstack, pat)
1921 rtx insn;
1922 stack regstack;
1923 rtx pat;
1924 {
1925 rtx *dest, *src;
1926 rtx *src1 = (rtx *) NULL_PTR, *src2;
1927 rtx src1_note, src2_note;
1928 rtx pat_src;
1929
1930 if (GET_CODE (pat) != SET)
1931 return;
1932
1933 dest = get_true_reg (&SET_DEST (pat));
1934 src = get_true_reg (&SET_SRC (pat));
1935 pat_src = SET_SRC (pat);
1936
1937 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1938
1939 if (*dest != cc0_rtx
1940 && (STACK_REG_P (*src)
1941 || (STACK_REG_P (*dest)
1942 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM
1943 || GET_CODE (*src) == CONST_DOUBLE))))
1944 move_for_stack_reg (insn, regstack, pat);
1945 else
1946 switch (GET_CODE (pat_src))
1947 {
1948 case COMPARE:
1949 compare_for_stack_reg (insn, regstack, pat_src);
1950 break;
1951
1952 case CALL:
1953 {
1954 int count;
1955 for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest));
1956 --count >= 0;)
1957 {
1958 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1959 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1960 }
1961 }
1962 replace_reg (dest, FIRST_STACK_REG);
1963 break;
1964
1965 case REG:
1966 /* This is a `tstM2' case. */
1967 if (*dest != cc0_rtx)
1968 abort ();
1969
1970 src1 = src;
1971
1972 /* Fall through. */
1973
1974 case FLOAT_TRUNCATE:
1975 case SQRT:
1976 case ABS:
1977 case NEG:
1978 /* These insns only operate on the top of the stack. DEST might
1979 be cc0_rtx if we're processing a tstM pattern. Also, it's
1980 possible that the tstM case results in a REG_DEAD note on the
1981 source. */
1982
1983 if (src1 == 0)
1984 src1 = get_true_reg (&XEXP (pat_src, 0));
1985
1986 emit_swap_insn (insn, regstack, *src1);
1987
1988 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1989
1990 if (STACK_REG_P (*dest))
1991 replace_reg (dest, FIRST_STACK_REG);
1992
1993 if (src1_note)
1994 {
1995 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1996 regstack->top--;
1997 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1998 }
1999
2000 replace_reg (src1, FIRST_STACK_REG);
2001
2002 break;
2003
2004 case MINUS:
2005 case DIV:
2006 /* On i386, reversed forms of subM3 and divM3 exist for
2007 MODE_FLOAT, so the same code that works for addM3 and mulM3
2008 can be used. */
2009 case MULT:
2010 case PLUS:
2011 /* These insns can accept the top of stack as a destination
2012 from a stack reg or mem, or can use the top of stack as a
2013 source and some other stack register (possibly top of stack)
2014 as a destination. */
2015
2016 src1 = get_true_reg (&XEXP (pat_src, 0));
2017 src2 = get_true_reg (&XEXP (pat_src, 1));
2018
2019 /* We will fix any death note later. */
2020
2021 if (STACK_REG_P (*src1))
2022 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
2023 else
2024 src1_note = NULL_RTX;
2025 if (STACK_REG_P (*src2))
2026 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
2027 else
2028 src2_note = NULL_RTX;
2029
2030 /* If either operand is not a stack register, then the dest
2031 must be top of stack. */
2032
2033 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
2034 emit_swap_insn (insn, regstack, *dest);
2035 else
2036 {
2037 /* Both operands are REG. If neither operand is already
2038 at the top of stack, choose to make the one that is the dest
2039 the new top of stack. */
2040
2041 int src1_hard_regnum, src2_hard_regnum;
2042
2043 src1_hard_regnum = get_hard_regnum (regstack, *src1);
2044 src2_hard_regnum = get_hard_regnum (regstack, *src2);
2045 if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
2046 abort ();
2047
2048 if (src1_hard_regnum != FIRST_STACK_REG
2049 && src2_hard_regnum != FIRST_STACK_REG)
2050 emit_swap_insn (insn, regstack, *dest);
2051 }
2052
2053 if (STACK_REG_P (*src1))
2054 replace_reg (src1, get_hard_regnum (regstack, *src1));
2055 if (STACK_REG_P (*src2))
2056 replace_reg (src2, get_hard_regnum (regstack, *src2));
2057
2058 if (src1_note)
2059 {
2060 /* If the register that dies is at the top of stack, then
2061 the destination is somewhere else - merely substitute it.
2062 But if the reg that dies is not at top of stack, then
2063 move the top of stack to the dead reg, as though we had
2064 done the insn and then a store-with-pop. */
2065
2066 if (REGNO (XEXP (src1_note, 0)) == regstack->reg[regstack->top])
2067 {
2068 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2069 replace_reg (dest, get_hard_regnum (regstack, *dest));
2070 }
2071 else
2072 {
2073 int regno = get_hard_regnum (regstack, XEXP (src1_note, 0));
2074
2075 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2076 replace_reg (dest, regno);
2077
2078 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
2079 = regstack->reg[regstack->top];
2080 }
2081
2082 CLEAR_HARD_REG_BIT (regstack->reg_set,
2083 REGNO (XEXP (src1_note, 0)));
2084 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
2085 regstack->top--;
2086 }
2087 else if (src2_note)
2088 {
2089 if (REGNO (XEXP (src2_note, 0)) == regstack->reg[regstack->top])
2090 {
2091 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2092 replace_reg (dest, get_hard_regnum (regstack, *dest));
2093 }
2094 else
2095 {
2096 int regno = get_hard_regnum (regstack, XEXP (src2_note, 0));
2097
2098 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2099 replace_reg (dest, regno);
2100
2101 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
2102 = regstack->reg[regstack->top];
2103 }
2104
2105 CLEAR_HARD_REG_BIT (regstack->reg_set,
2106 REGNO (XEXP (src2_note, 0)));
2107 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
2108 regstack->top--;
2109 }
2110 else
2111 {
2112 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2113 replace_reg (dest, get_hard_regnum (regstack, *dest));
2114 }
2115
2116 break;
2117
2118 case UNSPEC:
2119 switch (XINT (pat_src, 1))
2120 {
2121 case 1: /* sin */
2122 case 2: /* cos */
2123 /* These insns only operate on the top of the stack. */
2124
2125 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
2126
2127 emit_swap_insn (insn, regstack, *src1);
2128
2129 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
2130
2131 if (STACK_REG_P (*dest))
2132 replace_reg (dest, FIRST_STACK_REG);
2133
2134 if (src1_note)
2135 {
2136 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
2137 regstack->top--;
2138 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
2139 }
2140
2141 replace_reg (src1, FIRST_STACK_REG);
2142
2143 break;
2144
2145 case 10:
2146 /* (unspec [(unspec [(compare ..)] 9)] 10)
2147 Unspec 9 is fnstsw; unspec 10 is sahf. The combination
2148 matches the PPRO fcomi instruction. */
2149
2150 pat_src = XVECEXP (pat_src, 0, 0);
2151 if (GET_CODE (pat_src) != UNSPEC
2152 || XINT (pat_src, 1) != 9)
2153 abort ();
2154 /* FALLTHRU */
2155
2156 case 9:
2157 /* (unspec [(compare ..)] 9)
2158 Combined fcomp+fnstsw generated for doing well with CSE.
2159 When optimizing this would have been broken up before now. */
2160
2161 pat_src = XVECEXP (pat_src, 0, 0);
2162 if (GET_CODE (pat_src) != COMPARE)
2163 abort ();
2164
2165 compare_for_stack_reg (insn, regstack, pat_src);
2166 break;
2167
2168 default:
2169 abort ();
2170 }
2171 break;
2172
2173 case IF_THEN_ELSE:
2174 /* This insn requires the top of stack to be the destination. */
2175
2176 /* If the comparison operator is an FP comparison operator,
2177 it is handled correctly by compare_for_stack_reg () who
2178 will move the destination to the top of stack. But if the
2179 comparison operator is not an FP comparison operator, we
2180 have to handle it here. */
2181 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
2182 && REGNO (*dest) != regstack->reg[regstack->top])
2183 emit_swap_insn (insn, regstack, *dest);
2184
2185 src1 = get_true_reg (&XEXP (pat_src, 1));
2186 src2 = get_true_reg (&XEXP (pat_src, 2));
2187
2188 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
2189 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
2190
2191 {
2192 rtx src_note [3];
2193 int i;
2194
2195 src_note[0] = 0;
2196 src_note[1] = src1_note;
2197 src_note[2] = src2_note;
2198
2199 if (STACK_REG_P (*src1))
2200 replace_reg (src1, get_hard_regnum (regstack, *src1));
2201 if (STACK_REG_P (*src2))
2202 replace_reg (src2, get_hard_regnum (regstack, *src2));
2203
2204 for (i = 1; i <= 2; i++)
2205 if (src_note [i])
2206 {
2207 /* If the register that dies is not at the top of stack, then
2208 move the top of stack to the dead reg */
2209 if (REGNO (XEXP (src_note[i], 0))
2210 != regstack->reg[regstack->top])
2211 {
2212 remove_regno_note (insn, REG_DEAD,
2213 REGNO (XEXP (src_note [i], 0)));
2214 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
2215 emit_insn_after);
2216 }
2217 else
2218 {
2219 CLEAR_HARD_REG_BIT (regstack->reg_set,
2220 REGNO (XEXP (src_note[i], 0)));
2221 replace_reg (&XEXP (src_note[i], 0), FIRST_STACK_REG);
2222 regstack->top--;
2223 }
2224 }
2225 }
2226
2227 /* Make dest the top of stack. Add dest to regstack if not present. */
2228 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
2229 regstack->reg[++regstack->top] = REGNO (*dest);
2230 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2231 replace_reg (dest, FIRST_STACK_REG);
2232
2233 break;
2234
2235 default:
2236 abort ();
2237 }
2238 }
2239 \f
2240 /* Substitute hard regnums for any stack regs in INSN, which has
2241 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
2242 before the insn, and is updated with changes made here.
2243
2244 There are several requirements and assumptions about the use of
2245 stack-like regs in asm statements. These rules are enforced by
2246 record_asm_stack_regs; see comments there for details. Any
2247 asm_operands left in the RTL at this point may be assume to meet the
2248 requirements, since record_asm_stack_regs removes any problem asm. */
2249
2250 static void
2251 subst_asm_stack_regs (insn, regstack)
2252 rtx insn;
2253 stack regstack;
2254 {
2255 rtx body = PATTERN (insn);
2256 int alt;
2257
2258 rtx *note_reg; /* Array of note contents */
2259 rtx **note_loc; /* Address of REG field of each note */
2260 enum reg_note *note_kind; /* The type of each note */
2261
2262 rtx *clobber_reg;
2263 rtx **clobber_loc;
2264
2265 struct stack_def temp_stack;
2266 int n_notes;
2267 int n_clobbers;
2268 rtx note;
2269 int i;
2270 int n_inputs, n_outputs;
2271
2272 /* Find out what the constraints required. If no constraint
2273 alternative matches, that is a compiler bug: we should have caught
2274 such an insn during the life analysis pass (and reload should have
2275 caught it regardless). */
2276 extract_insn (insn);
2277 constrain_operands (1);
2278 alt = which_alternative;
2279
2280 preprocess_constraints ();
2281
2282 n_inputs = get_asm_operand_n_inputs (body);
2283 n_outputs = recog_n_operands - n_inputs;
2284
2285 if (alt < 0)
2286 abort ();
2287
2288 /* Strip SUBREGs here to make the following code simpler. */
2289 for (i = 0; i < recog_n_operands; i++)
2290 if (GET_CODE (recog_operand[i]) == SUBREG
2291 && GET_CODE (SUBREG_REG (recog_operand[i])) == REG)
2292 {
2293 recog_operand_loc[i] = & SUBREG_REG (recog_operand[i]);
2294 recog_operand[i] = SUBREG_REG (recog_operand[i]);
2295 }
2296
2297 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2298
2299 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
2300 i++;
2301
2302 note_reg = (rtx *) alloca (i * sizeof (rtx));
2303 note_loc = (rtx **) alloca (i * sizeof (rtx *));
2304 note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note));
2305
2306 n_notes = 0;
2307 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
2308 {
2309 rtx reg = XEXP (note, 0);
2310 rtx *loc = & XEXP (note, 0);
2311
2312 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
2313 {
2314 loc = & SUBREG_REG (reg);
2315 reg = SUBREG_REG (reg);
2316 }
2317
2318 if (STACK_REG_P (reg)
2319 && (REG_NOTE_KIND (note) == REG_DEAD
2320 || REG_NOTE_KIND (note) == REG_UNUSED))
2321 {
2322 note_reg[n_notes] = reg;
2323 note_loc[n_notes] = loc;
2324 note_kind[n_notes] = REG_NOTE_KIND (note);
2325 n_notes++;
2326 }
2327 }
2328
2329 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2330
2331 n_clobbers = 0;
2332
2333 if (GET_CODE (body) == PARALLEL)
2334 {
2335 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
2336 clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx *));
2337
2338 for (i = 0; i < XVECLEN (body, 0); i++)
2339 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2340 {
2341 rtx clobber = XVECEXP (body, 0, i);
2342 rtx reg = XEXP (clobber, 0);
2343 rtx *loc = & XEXP (clobber, 0);
2344
2345 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
2346 {
2347 loc = & SUBREG_REG (reg);
2348 reg = SUBREG_REG (reg);
2349 }
2350
2351 if (STACK_REG_P (reg))
2352 {
2353 clobber_reg[n_clobbers] = reg;
2354 clobber_loc[n_clobbers] = loc;
2355 n_clobbers++;
2356 }
2357 }
2358 }
2359
2360 bcopy ((char *) regstack, (char *) &temp_stack, sizeof (temp_stack));
2361
2362 /* Put the input regs into the desired place in TEMP_STACK. */
2363
2364 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2365 if (STACK_REG_P (recog_operand[i])
2366 && reg_class_subset_p (recog_op_alt[i][alt].class,
2367 FLOAT_REGS)
2368 && recog_op_alt[i][alt].class != FLOAT_REGS)
2369 {
2370 /* If an operand needs to be in a particular reg in
2371 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2372 these constraints are for single register classes, and reload
2373 guaranteed that operand[i] is already in that class, we can
2374 just use REGNO (recog_operand[i]) to know which actual reg this
2375 operand needs to be in. */
2376
2377 int regno = get_hard_regnum (&temp_stack, recog_operand[i]);
2378
2379 if (regno < 0)
2380 abort ();
2381
2382 if (regno != REGNO (recog_operand[i]))
2383 {
2384 /* recog_operand[i] is not in the right place. Find it
2385 and swap it with whatever is already in I's place.
2386 K is where recog_operand[i] is now. J is where it should
2387 be. */
2388 int j, k, temp;
2389
2390 k = temp_stack.top - (regno - FIRST_STACK_REG);
2391 j = (temp_stack.top
2392 - (REGNO (recog_operand[i]) - FIRST_STACK_REG));
2393
2394 temp = temp_stack.reg[k];
2395 temp_stack.reg[k] = temp_stack.reg[j];
2396 temp_stack.reg[j] = temp;
2397 }
2398 }
2399
2400 /* emit insns before INSN to make sure the reg-stack is in the right
2401 order. */
2402
2403 change_stack (insn, regstack, &temp_stack, emit_insn_before);
2404
2405 /* Make the needed input register substitutions. Do death notes and
2406 clobbers too, because these are for inputs, not outputs. */
2407
2408 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2409 if (STACK_REG_P (recog_operand[i]))
2410 {
2411 int regnum = get_hard_regnum (regstack, recog_operand[i]);
2412
2413 if (regnum < 0)
2414 abort ();
2415
2416 replace_reg (recog_operand_loc[i], regnum);
2417 }
2418
2419 for (i = 0; i < n_notes; i++)
2420 if (note_kind[i] == REG_DEAD)
2421 {
2422 int regnum = get_hard_regnum (regstack, note_reg[i]);
2423
2424 if (regnum < 0)
2425 abort ();
2426
2427 replace_reg (note_loc[i], regnum);
2428 }
2429
2430 for (i = 0; i < n_clobbers; i++)
2431 {
2432 /* It's OK for a CLOBBER to reference a reg that is not live.
2433 Don't try to replace it in that case. */
2434 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2435
2436 if (regnum >= 0)
2437 {
2438 /* Sigh - clobbers always have QImode. But replace_reg knows
2439 that these regs can't be MODE_INT and will abort. Just put
2440 the right reg there without calling replace_reg. */
2441
2442 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2443 }
2444 }
2445
2446 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2447
2448 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2449 if (STACK_REG_P (recog_operand[i]))
2450 {
2451 /* An input reg is implicitly popped if it is tied to an
2452 output, or if there is a CLOBBER for it. */
2453 int j;
2454
2455 for (j = 0; j < n_clobbers; j++)
2456 if (operands_match_p (clobber_reg[j], recog_operand[i]))
2457 break;
2458
2459 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2460 {
2461 /* recog_operand[i] might not be at the top of stack. But that's
2462 OK, because all we need to do is pop the right number of regs
2463 off of the top of the reg-stack. record_asm_stack_regs
2464 guaranteed that all implicitly popped regs were grouped
2465 at the top of the reg-stack. */
2466
2467 CLEAR_HARD_REG_BIT (regstack->reg_set,
2468 regstack->reg[regstack->top]);
2469 regstack->top--;
2470 }
2471 }
2472
2473 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2474 Note that there isn't any need to substitute register numbers.
2475 ??? Explain why this is true. */
2476
2477 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2478 {
2479 /* See if there is an output for this hard reg. */
2480 int j;
2481
2482 for (j = 0; j < n_outputs; j++)
2483 if (STACK_REG_P (recog_operand[j]) && REGNO (recog_operand[j]) == i)
2484 {
2485 regstack->reg[++regstack->top] = i;
2486 SET_HARD_REG_BIT (regstack->reg_set, i);
2487 break;
2488 }
2489 }
2490
2491 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2492 input that the asm didn't implicitly pop. If the asm didn't
2493 implicitly pop an input reg, that reg will still be live.
2494
2495 Note that we can't use find_regno_note here: the register numbers
2496 in the death notes have already been substituted. */
2497
2498 for (i = 0; i < n_outputs; i++)
2499 if (STACK_REG_P (recog_operand[i]))
2500 {
2501 int j;
2502
2503 for (j = 0; j < n_notes; j++)
2504 if (REGNO (recog_operand[i]) == REGNO (note_reg[j])
2505 && note_kind[j] == REG_UNUSED)
2506 {
2507 insn = emit_pop_insn (insn, regstack, recog_operand[i],
2508 emit_insn_after);
2509 break;
2510 }
2511 }
2512
2513 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2514 if (STACK_REG_P (recog_operand[i]))
2515 {
2516 int j;
2517
2518 for (j = 0; j < n_notes; j++)
2519 if (REGNO (recog_operand[i]) == REGNO (note_reg[j])
2520 && note_kind[j] == REG_DEAD
2521 && TEST_HARD_REG_BIT (regstack->reg_set,
2522 REGNO (recog_operand[i])))
2523 {
2524 insn = emit_pop_insn (insn, regstack, recog_operand[i],
2525 emit_insn_after);
2526 break;
2527 }
2528 }
2529 }
2530 \f
2531 /* Substitute stack hard reg numbers for stack virtual registers in
2532 INSN. Non-stack register numbers are not changed. REGSTACK is the
2533 current stack content. Insns may be emitted as needed to arrange the
2534 stack for the 387 based on the contents of the insn. */
2535
2536 static void
2537 subst_stack_regs (insn, regstack)
2538 rtx insn;
2539 stack regstack;
2540 {
2541 register rtx *note_link, note;
2542 register int i;
2543
2544 if (GET_CODE (insn) == CALL_INSN)
2545 {
2546 int top = regstack->top;
2547
2548 /* If there are any floating point parameters to be passed in
2549 registers for this call, make sure they are in the right
2550 order. */
2551
2552 if (top >= 0)
2553 {
2554 straighten_stack (PREV_INSN (insn), regstack);
2555
2556 /* Now mark the arguments as dead after the call. */
2557
2558 while (regstack->top >= 0)
2559 {
2560 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2561 regstack->top--;
2562 }
2563 }
2564 }
2565
2566 /* Do the actual substitution if any stack regs are mentioned.
2567 Since we only record whether entire insn mentions stack regs, and
2568 subst_stack_regs_pat only works for patterns that contain stack regs,
2569 we must check each pattern in a parallel here. A call_value_pop could
2570 fail otherwise. */
2571
2572 if (stack_regs_mentioned (insn))
2573 {
2574 int n_operands = asm_noperands (PATTERN (insn));
2575 if (n_operands >= 0)
2576 {
2577 /* This insn is an `asm' with operands. Decode the operands,
2578 decide how many are inputs, and do register substitution.
2579 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2580
2581 subst_asm_stack_regs (insn, regstack);
2582 return;
2583 }
2584
2585 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2586 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2587 {
2588 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2589 subst_stack_regs_pat (insn, regstack,
2590 XVECEXP (PATTERN (insn), 0, i));
2591 }
2592 else
2593 subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2594 }
2595
2596 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2597 REG_UNUSED will already have been dealt with, so just return. */
2598
2599 if (GET_CODE (insn) == NOTE)
2600 return;
2601
2602 /* If there is a REG_UNUSED note on a stack register on this insn,
2603 the indicated reg must be popped. The REG_UNUSED note is removed,
2604 since the form of the newly emitted pop insn references the reg,
2605 making it no longer `unset'. */
2606
2607 note_link = &REG_NOTES(insn);
2608 for (note = *note_link; note; note = XEXP (note, 1))
2609 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2610 {
2611 *note_link = XEXP (note, 1);
2612 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), emit_insn_after);
2613 }
2614 else
2615 note_link = &XEXP (note, 1);
2616 }
2617 \f
2618 /* Change the organization of the stack so that it fits a new basic
2619 block. Some registers might have to be popped, but there can never be
2620 a register live in the new block that is not now live.
2621
2622 Insert any needed insns before or after INSN. WHEN is emit_insn_before
2623 or emit_insn_after. OLD is the original stack layout, and NEW is
2624 the desired form. OLD is updated to reflect the code emitted, ie, it
2625 will be the same as NEW upon return.
2626
2627 This function will not preserve block_end[]. But that information
2628 is no longer needed once this has executed. */
2629
2630 static void
2631 change_stack (insn, old, new, when)
2632 rtx insn;
2633 stack old;
2634 stack new;
2635 rtx (*when)();
2636 {
2637 int reg;
2638
2639 /* We will be inserting new insns "backwards", by calling emit_insn_before.
2640 If we are to insert after INSN, find the next insn, and insert before
2641 it. */
2642
2643 if (when == emit_insn_after)
2644 insn = NEXT_INSN (insn);
2645
2646 /* Pop any registers that are not needed in the new block. */
2647
2648 for (reg = old->top; reg >= 0; reg--)
2649 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2650 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode),
2651 emit_insn_before);
2652
2653 if (new->top == -2)
2654 {
2655 /* If the new block has never been processed, then it can inherit
2656 the old stack order. */
2657
2658 new->top = old->top;
2659 bcopy (old->reg, new->reg, sizeof (new->reg));
2660 }
2661 else
2662 {
2663 /* This block has been entered before, and we must match the
2664 previously selected stack order. */
2665
2666 /* By now, the only difference should be the order of the stack,
2667 not their depth or liveliness. */
2668
2669 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2670
2671 abort ();
2672
2673 win:
2674
2675 if (old->top != new->top)
2676 abort ();
2677
2678 /* If the stack is not empty (new->top != -1), loop here emitting
2679 swaps until the stack is correct.
2680
2681 The worst case number of swaps emitted is N + 2, where N is the
2682 depth of the stack. In some cases, the reg at the top of
2683 stack may be correct, but swapped anyway in order to fix
2684 other regs. But since we never swap any other reg away from
2685 its correct slot, this algorithm will converge. */
2686
2687 if (new->top != -1)
2688 do
2689 {
2690 /* Swap the reg at top of stack into the position it is
2691 supposed to be in, until the correct top of stack appears. */
2692
2693 while (old->reg[old->top] != new->reg[new->top])
2694 {
2695 for (reg = new->top; reg >= 0; reg--)
2696 if (new->reg[reg] == old->reg[old->top])
2697 break;
2698
2699 if (reg == -1)
2700 abort ();
2701
2702 emit_swap_insn (insn, old,
2703 FP_MODE_REG (old->reg[reg], DFmode));
2704 }
2705
2706 /* See if any regs remain incorrect. If so, bring an
2707 incorrect reg to the top of stack, and let the while loop
2708 above fix it. */
2709
2710 for (reg = new->top; reg >= 0; reg--)
2711 if (new->reg[reg] != old->reg[reg])
2712 {
2713 emit_swap_insn (insn, old,
2714 FP_MODE_REG (old->reg[reg], DFmode));
2715 break;
2716 }
2717 } while (reg >= 0);
2718
2719 /* At this point there must be no differences. */
2720
2721 for (reg = old->top; reg >= 0; reg--)
2722 if (old->reg[reg] != new->reg[reg])
2723 abort ();
2724 }
2725 }
2726 \f
2727 /* Check PAT, which points to RTL in INSN, for a LABEL_REF. If it is
2728 found, ensure that a jump from INSN to the code_label to which the
2729 label_ref points ends up with the same stack as that at the
2730 code_label. Do this by inserting insns just before the code_label to
2731 pop and rotate the stack until it is in the correct order. REGSTACK
2732 is the order of the register stack in INSN.
2733
2734 Any code that is emitted here must not be later processed as part
2735 of any block, as it will already contain hard register numbers. */
2736
2737 static void
2738 goto_block_pat (insn, regstack, pat)
2739 rtx insn;
2740 stack regstack;
2741 rtx pat;
2742 {
2743 rtx label;
2744 rtx new_jump, new_label, new_barrier;
2745 rtx *ref;
2746 stack label_stack;
2747 struct stack_def temp_stack;
2748 int reg;
2749
2750 switch (GET_CODE (pat))
2751 {
2752 case RETURN:
2753 straighten_stack (PREV_INSN (insn), regstack);
2754 return;
2755 default:
2756 {
2757 int i, j;
2758 const char *fmt = GET_RTX_FORMAT (GET_CODE (pat));
2759
2760 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
2761 {
2762 if (fmt[i] == 'e')
2763 goto_block_pat (insn, regstack, XEXP (pat, i));
2764 if (fmt[i] == 'E')
2765 for (j = 0; j < XVECLEN (pat, i); j++)
2766 goto_block_pat (insn, regstack, XVECEXP (pat, i, j));
2767 }
2768 return;
2769 }
2770 case LABEL_REF:;
2771 }
2772
2773 label = XEXP (pat, 0);
2774 if (GET_CODE (label) != CODE_LABEL)
2775 abort ();
2776
2777 /* First, see if in fact anything needs to be done to the stack at all. */
2778 if (INSN_UID (label) <= 0)
2779 return;
2780
2781 label_stack = &block_stack_in[BLOCK_NUM (label)];
2782
2783 if (label_stack->top == -2)
2784 {
2785 /* If the target block hasn't had a stack order selected, then
2786 we need merely ensure that no pops are needed. */
2787
2788 for (reg = regstack->top; reg >= 0; reg--)
2789 if (! TEST_HARD_REG_BIT (label_stack->reg_set, regstack->reg[reg]))
2790 break;
2791
2792 if (reg == -1)
2793 {
2794 /* change_stack will not emit any code in this case. */
2795
2796 change_stack (label, regstack, label_stack, emit_insn_after);
2797 return;
2798 }
2799 }
2800 else if (label_stack->top == regstack->top)
2801 {
2802 for (reg = label_stack->top; reg >= 0; reg--)
2803 if (label_stack->reg[reg] != regstack->reg[reg])
2804 break;
2805
2806 if (reg == -1)
2807 return;
2808 }
2809
2810 /* At least one insn will need to be inserted before label. Insert
2811 a jump around the code we are about to emit. Emit a label for the new
2812 code, and point the original insn at this new label. We can't use
2813 redirect_jump here, because we're using fld[4] of the code labels as
2814 LABEL_REF chains, no NUSES counters. */
2815
2816 new_jump = emit_jump_insn_before (gen_jump (label), label);
2817 record_label_references (new_jump, PATTERN (new_jump));
2818 JUMP_LABEL (new_jump) = label;
2819
2820 new_barrier = emit_barrier_after (new_jump);
2821
2822 new_label = gen_label_rtx ();
2823 emit_label_after (new_label, new_barrier);
2824 LABEL_REFS (new_label) = new_label;
2825
2826 /* The old label_ref will no longer point to the code_label if now uses,
2827 so strip the label_ref from the code_label's chain of references. */
2828
2829 for (ref = &LABEL_REFS (label); *ref != label; ref = &LABEL_NEXTREF (*ref))
2830 if (*ref == pat)
2831 break;
2832
2833 if (*ref == label)
2834 abort ();
2835
2836 *ref = LABEL_NEXTREF (*ref);
2837
2838 XEXP (pat, 0) = new_label;
2839 record_label_references (insn, PATTERN (insn));
2840
2841 if (JUMP_LABEL (insn) == label)
2842 JUMP_LABEL (insn) = new_label;
2843
2844 /* Now emit the needed code. */
2845
2846 temp_stack = *regstack;
2847
2848 change_stack (new_label, &temp_stack, label_stack, emit_insn_after);
2849 }
2850 \f
2851 /* Traverse all basic blocks in a function, converting the register
2852 references in each insn from the "flat" register file that gcc uses, to
2853 the stack-like registers the 387 uses. */
2854
2855 static void
2856 convert_regs ()
2857 {
2858 register int block, reg;
2859 register rtx insn, next;
2860 struct stack_def regstack;
2861
2862 for (block = 0; block < blocks; block++)
2863 {
2864 if (block_stack_in[block].top == -2)
2865 {
2866 /* This block has not been previously encountered. Choose a
2867 default mapping for any stack regs live on entry */
2868
2869 block_stack_in[block].top = -1;
2870
2871 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; reg--)
2872 if (TEST_HARD_REG_BIT (block_stack_in[block].reg_set, reg))
2873 block_stack_in[block].reg[++block_stack_in[block].top] = reg;
2874 }
2875
2876 /* Process all insns in this block. Keep track of `next' here,
2877 so that we don't process any insns emitted while making
2878 substitutions in INSN. */
2879
2880 next = block_begin[block];
2881 regstack = block_stack_in[block];
2882 do
2883 {
2884 insn = next;
2885 next = NEXT_INSN (insn);
2886
2887 /* Don't bother processing unless there is a stack reg
2888 mentioned or if it's a CALL_INSN (register passing of
2889 floating point values). */
2890
2891 if (stack_regs_mentioned (insn) || GET_CODE (insn) == CALL_INSN)
2892 subst_stack_regs (insn, &regstack);
2893
2894 } while (insn != block_end[block]);
2895
2896 /* For all further actions, INSN needs to be the last insn in
2897 this basic block. If subst_stack_regs inserted additional
2898 instructions after INSN, it is no longer the last one at
2899 this point. */
2900 next = PREV_INSN (next);
2901
2902 /* If subst_stack_regs inserted something after a JUMP_INSN, that
2903 is almost certainly a bug. */
2904 if (GET_CODE (insn) == JUMP_INSN && insn != next)
2905 abort ();
2906 insn = next;
2907
2908 /* Something failed if the stack life doesn't match. */
2909
2910 GO_IF_HARD_REG_EQUAL (regstack.reg_set, block_out_reg_set[block], win);
2911
2912 abort ();
2913
2914 win:
2915
2916 /* Adjust the stack of this block on exit to match the stack of
2917 the target block, or copy stack information into stack of
2918 jump target if the target block's stack order hasn't been set
2919 yet. */
2920
2921 if (GET_CODE (insn) == JUMP_INSN)
2922 goto_block_pat (insn, &regstack, PATTERN (insn));
2923
2924 /* Likewise handle the case where we fall into the next block. */
2925
2926 if ((block < blocks - 1) && block_drops_in[block+1])
2927 change_stack (insn, &regstack, &block_stack_in[block+1],
2928 emit_insn_after);
2929 }
2930
2931 /* If the last basic block is the end of a loop, and that loop has
2932 regs live at its start, then the last basic block will have regs live
2933 at its end that need to be popped before the function returns. */
2934
2935 {
2936 int value_reg_low, value_reg_high;
2937 value_reg_low = value_reg_high = -1;
2938 {
2939 rtx retvalue;
2940 if ((retvalue = stack_result (current_function_decl)))
2941 {
2942 value_reg_low = REGNO (retvalue);
2943 value_reg_high = value_reg_low +
2944 HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1;
2945 }
2946
2947 }
2948 for (reg = regstack.top; reg >= 0; reg--)
2949 if (regstack.reg[reg] < value_reg_low
2950 || regstack.reg[reg] > value_reg_high)
2951 insn = emit_pop_insn (insn, &regstack,
2952 FP_MODE_REG (regstack.reg[reg], DFmode),
2953 emit_insn_after);
2954 }
2955 straighten_stack (insn, &regstack);
2956 }
2957 \f
2958 /* Check expression PAT, which is in INSN, for label references. if
2959 one is found, print the block number of destination to FILE. */
2960
2961 static void
2962 print_blocks (file, insn, pat)
2963 FILE *file;
2964 rtx insn, pat;
2965 {
2966 register RTX_CODE code = GET_CODE (pat);
2967 register int i;
2968 register const char *fmt;
2969
2970 if (code == LABEL_REF)
2971 {
2972 register rtx label = XEXP (pat, 0);
2973
2974 if (GET_CODE (label) != CODE_LABEL)
2975 abort ();
2976
2977 fprintf (file, " %d", BLOCK_NUM (label));
2978
2979 return;
2980 }
2981
2982 fmt = GET_RTX_FORMAT (code);
2983 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2984 {
2985 if (fmt[i] == 'e')
2986 print_blocks (file, insn, XEXP (pat, i));
2987 if (fmt[i] == 'E')
2988 {
2989 register int j;
2990 for (j = 0; j < XVECLEN (pat, i); j++)
2991 print_blocks (file, insn, XVECEXP (pat, i, j));
2992 }
2993 }
2994 }
2995 \f
2996 /* Write information about stack registers and stack blocks into FILE.
2997 This is part of making a debugging dump. */
2998
2999 static void
3000 dump_stack_info (file)
3001 FILE *file;
3002 {
3003 register int block;
3004
3005 fprintf (file, "\n%d stack blocks.\n", blocks);
3006 for (block = 0; block < blocks; block++)
3007 {
3008 register rtx head, jump, end;
3009 register int regno;
3010
3011 fprintf (file, "\nStack block %d: first insn %d, last %d.\n",
3012 block, INSN_UID (block_begin[block]),
3013 INSN_UID (block_end[block]));
3014
3015 head = block_begin[block];
3016
3017 fprintf (file, "Reached from blocks: ");
3018 if (GET_CODE (head) == CODE_LABEL)
3019 for (jump = LABEL_REFS (head);
3020 jump != head;
3021 jump = LABEL_NEXTREF (jump))
3022 {
3023 register int from_block = BLOCK_NUM (CONTAINING_INSN (jump));
3024 fprintf (file, " %d", from_block);
3025 }
3026 if (block_drops_in[block])
3027 fprintf (file, " previous");
3028
3029 fprintf (file, "\nlive stack registers on block entry: ");
3030 for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++)
3031 {
3032 if (TEST_HARD_REG_BIT (block_stack_in[block].reg_set, regno))
3033 fprintf (file, "%d ", regno);
3034 }
3035
3036 fprintf (file, "\nlive stack registers on block exit: ");
3037 for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++)
3038 {
3039 if (TEST_HARD_REG_BIT (block_out_reg_set[block], regno))
3040 fprintf (file, "%d ", regno);
3041 }
3042
3043 end = block_end[block];
3044
3045 fprintf (file, "\nJumps to blocks: ");
3046 if (GET_CODE (end) == JUMP_INSN)
3047 print_blocks (file, end, PATTERN (end));
3048
3049 if (block + 1 < blocks && block_drops_in[block+1])
3050 fprintf (file, " next");
3051 else if (block + 1 == blocks
3052 || (GET_CODE (end) == JUMP_INSN
3053 && GET_CODE (PATTERN (end)) == RETURN))
3054 fprintf (file, " return");
3055
3056 fprintf (file, "\n");
3057 }
3058 }
3059 #endif /* STACK_REGS */