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1 /* Definitions for computing resource usage of specific insns.
2 Copyright (C) 1999-2014 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "tm.h"
24 #include "diagnostic-core.h"
25 #include "rtl.h"
26 #include "tm_p.h"
27 #include "hard-reg-set.h"
28 #include "function.h"
29 #include "regs.h"
30 #include "flags.h"
31 #include "output.h"
32 #include "resource.h"
33 #include "except.h"
34 #include "insn-attr.h"
35 #include "params.h"
36 #include "df.h"
37
38 /* This structure is used to record liveness information at the targets or
39 fallthrough insns of branches. We will most likely need the information
40 at targets again, so save them in a hash table rather than recomputing them
41 each time. */
42
43 struct target_info
44 {
45 int uid; /* INSN_UID of target. */
46 struct target_info *next; /* Next info for same hash bucket. */
47 HARD_REG_SET live_regs; /* Registers live at target. */
48 int block; /* Basic block number containing target. */
49 int bb_tick; /* Generation count of basic block info. */
50 };
51
52 #define TARGET_HASH_PRIME 257
53
54 /* Indicates what resources are required at the beginning of the epilogue. */
55 static struct resources start_of_epilogue_needs;
56
57 /* Indicates what resources are required at function end. */
58 static struct resources end_of_function_needs;
59
60 /* Define the hash table itself. */
61 static struct target_info **target_hash_table = NULL;
62
63 /* For each basic block, we maintain a generation number of its basic
64 block info, which is updated each time we move an insn from the
65 target of a jump. This is the generation number indexed by block
66 number. */
67
68 static int *bb_ticks;
69
70 /* Marks registers possibly live at the current place being scanned by
71 mark_target_live_regs. Also used by update_live_status. */
72
73 static HARD_REG_SET current_live_regs;
74
75 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
76 Also only used by the next two functions. */
77
78 static HARD_REG_SET pending_dead_regs;
79 \f
80 static void update_live_status (rtx, const_rtx, void *);
81 static int find_basic_block (rtx_insn *, int);
82 static rtx_insn *next_insn_no_annul (rtx_insn *);
83 static rtx_insn *find_dead_or_set_registers (rtx_insn *, struct resources*,
84 rtx *, int, struct resources,
85 struct resources);
86 \f
87 /* Utility function called from mark_target_live_regs via note_stores.
88 It deadens any CLOBBERed registers and livens any SET registers. */
89
90 static void
91 update_live_status (rtx dest, const_rtx x, void *data ATTRIBUTE_UNUSED)
92 {
93 int first_regno, last_regno;
94 int i;
95
96 if (!REG_P (dest)
97 && (GET_CODE (dest) != SUBREG || !REG_P (SUBREG_REG (dest))))
98 return;
99
100 if (GET_CODE (dest) == SUBREG)
101 {
102 first_regno = subreg_regno (dest);
103 last_regno = first_regno + subreg_nregs (dest);
104
105 }
106 else
107 {
108 first_regno = REGNO (dest);
109 last_regno = END_HARD_REGNO (dest);
110 }
111
112 if (GET_CODE (x) == CLOBBER)
113 for (i = first_regno; i < last_regno; i++)
114 CLEAR_HARD_REG_BIT (current_live_regs, i);
115 else
116 for (i = first_regno; i < last_regno; i++)
117 {
118 SET_HARD_REG_BIT (current_live_regs, i);
119 CLEAR_HARD_REG_BIT (pending_dead_regs, i);
120 }
121 }
122
123 /* Find the number of the basic block with correct live register
124 information that starts closest to INSN. Return -1 if we couldn't
125 find such a basic block or the beginning is more than
126 SEARCH_LIMIT instructions before INSN. Use SEARCH_LIMIT = -1 for
127 an unlimited search.
128
129 The delay slot filling code destroys the control-flow graph so,
130 instead of finding the basic block containing INSN, we search
131 backwards toward a BARRIER where the live register information is
132 correct. */
133
134 static int
135 find_basic_block (rtx_insn *insn, int search_limit)
136 {
137 /* Scan backwards to the previous BARRIER. Then see if we can find a
138 label that starts a basic block. Return the basic block number. */
139 for (insn = prev_nonnote_insn (insn);
140 insn && !BARRIER_P (insn) && search_limit != 0;
141 insn = prev_nonnote_insn (insn), --search_limit)
142 ;
143
144 /* The closest BARRIER is too far away. */
145 if (search_limit == 0)
146 return -1;
147
148 /* The start of the function. */
149 else if (insn == 0)
150 return ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb->index;
151
152 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach
153 anything other than a CODE_LABEL or note, we can't find this code. */
154 for (insn = next_nonnote_insn (insn);
155 insn && LABEL_P (insn);
156 insn = next_nonnote_insn (insn))
157 if (BLOCK_FOR_INSN (insn))
158 return BLOCK_FOR_INSN (insn)->index;
159
160 return -1;
161 }
162 \f
163 /* Similar to next_insn, but ignores insns in the delay slots of
164 an annulled branch. */
165
166 static rtx_insn *
167 next_insn_no_annul (rtx_insn *insn)
168 {
169 if (insn)
170 {
171 /* If INSN is an annulled branch, skip any insns from the target
172 of the branch. */
173 if (JUMP_P (insn)
174 && INSN_ANNULLED_BRANCH_P (insn)
175 && NEXT_INSN (PREV_INSN (insn)) != insn)
176 {
177 rtx_insn *next = NEXT_INSN (insn);
178
179 while ((NONJUMP_INSN_P (next) || JUMP_P (next) || CALL_P (next))
180 && INSN_FROM_TARGET_P (next))
181 {
182 insn = next;
183 next = NEXT_INSN (insn);
184 }
185 }
186
187 insn = NEXT_INSN (insn);
188 if (insn && NONJUMP_INSN_P (insn)
189 && GET_CODE (PATTERN (insn)) == SEQUENCE)
190 insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
191 }
192
193 return insn;
194 }
195 \f
196 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
197 which resources are referenced by the insn. If INCLUDE_DELAYED_EFFECTS
198 is TRUE, resources used by the called routine will be included for
199 CALL_INSNs. */
200
201 void
202 mark_referenced_resources (rtx x, struct resources *res,
203 bool include_delayed_effects)
204 {
205 enum rtx_code code = GET_CODE (x);
206 int i, j;
207 unsigned int r;
208 const char *format_ptr;
209
210 /* Handle leaf items for which we set resource flags. Also, special-case
211 CALL, SET and CLOBBER operators. */
212 switch (code)
213 {
214 case CONST:
215 CASE_CONST_ANY:
216 case PC:
217 case SYMBOL_REF:
218 case LABEL_REF:
219 return;
220
221 case SUBREG:
222 if (!REG_P (SUBREG_REG (x)))
223 mark_referenced_resources (SUBREG_REG (x), res, false);
224 else
225 {
226 unsigned int regno = subreg_regno (x);
227 unsigned int last_regno = regno + subreg_nregs (x);
228
229 gcc_assert (last_regno <= FIRST_PSEUDO_REGISTER);
230 for (r = regno; r < last_regno; r++)
231 SET_HARD_REG_BIT (res->regs, r);
232 }
233 return;
234
235 case REG:
236 gcc_assert (HARD_REGISTER_P (x));
237 add_to_hard_reg_set (&res->regs, GET_MODE (x), REGNO (x));
238 return;
239
240 case MEM:
241 /* If this memory shouldn't change, it really isn't referencing
242 memory. */
243 if (! MEM_READONLY_P (x))
244 res->memory = 1;
245 res->volatil |= MEM_VOLATILE_P (x);
246
247 /* Mark registers used to access memory. */
248 mark_referenced_resources (XEXP (x, 0), res, false);
249 return;
250
251 case CC0:
252 res->cc = 1;
253 return;
254
255 case UNSPEC_VOLATILE:
256 case TRAP_IF:
257 case ASM_INPUT:
258 /* Traditional asm's are always volatile. */
259 res->volatil = 1;
260 break;
261
262 case ASM_OPERANDS:
263 res->volatil |= MEM_VOLATILE_P (x);
264
265 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
266 We can not just fall through here since then we would be confused
267 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
268 traditional asms unlike their normal usage. */
269
270 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
271 mark_referenced_resources (ASM_OPERANDS_INPUT (x, i), res, false);
272 return;
273
274 case CALL:
275 /* The first operand will be a (MEM (xxx)) but doesn't really reference
276 memory. The second operand may be referenced, though. */
277 mark_referenced_resources (XEXP (XEXP (x, 0), 0), res, false);
278 mark_referenced_resources (XEXP (x, 1), res, false);
279 return;
280
281 case SET:
282 /* Usually, the first operand of SET is set, not referenced. But
283 registers used to access memory are referenced. SET_DEST is
284 also referenced if it is a ZERO_EXTRACT. */
285
286 mark_referenced_resources (SET_SRC (x), res, false);
287
288 x = SET_DEST (x);
289 if (GET_CODE (x) == ZERO_EXTRACT
290 || GET_CODE (x) == STRICT_LOW_PART)
291 mark_referenced_resources (x, res, false);
292 else if (GET_CODE (x) == SUBREG)
293 x = SUBREG_REG (x);
294 if (MEM_P (x))
295 mark_referenced_resources (XEXP (x, 0), res, false);
296 return;
297
298 case CLOBBER:
299 return;
300
301 case CALL_INSN:
302 if (include_delayed_effects)
303 {
304 /* A CALL references memory, the frame pointer if it exists, the
305 stack pointer, any global registers and any registers given in
306 USE insns immediately in front of the CALL.
307
308 However, we may have moved some of the parameter loading insns
309 into the delay slot of this CALL. If so, the USE's for them
310 don't count and should be skipped. */
311 rtx_insn *insn = PREV_INSN (as_a <rtx_insn *> (x));
312 rtx_sequence *sequence = 0;
313 int seq_size = 0;
314 int i;
315
316 /* If we are part of a delay slot sequence, point at the SEQUENCE. */
317 if (NEXT_INSN (insn) != x)
318 {
319 sequence = as_a <rtx_sequence *> (PATTERN (NEXT_INSN (insn)));
320 seq_size = sequence->len ();
321 gcc_assert (GET_CODE (sequence) == SEQUENCE);
322 }
323
324 res->memory = 1;
325 SET_HARD_REG_BIT (res->regs, STACK_POINTER_REGNUM);
326 if (frame_pointer_needed)
327 {
328 SET_HARD_REG_BIT (res->regs, FRAME_POINTER_REGNUM);
329 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
330 SET_HARD_REG_BIT (res->regs, HARD_FRAME_POINTER_REGNUM);
331 #endif
332 }
333
334 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
335 if (global_regs[i])
336 SET_HARD_REG_BIT (res->regs, i);
337
338 /* Check for a REG_SETJMP. If it exists, then we must
339 assume that this call can need any register.
340
341 This is done to be more conservative about how we handle setjmp.
342 We assume that they both use and set all registers. Using all
343 registers ensures that a register will not be considered dead
344 just because it crosses a setjmp call. A register should be
345 considered dead only if the setjmp call returns nonzero. */
346 if (find_reg_note (x, REG_SETJMP, NULL))
347 SET_HARD_REG_SET (res->regs);
348
349 {
350 rtx link;
351
352 for (link = CALL_INSN_FUNCTION_USAGE (x);
353 link;
354 link = XEXP (link, 1))
355 if (GET_CODE (XEXP (link, 0)) == USE)
356 {
357 for (i = 1; i < seq_size; i++)
358 {
359 rtx slot_pat = PATTERN (sequence->element (i));
360 if (GET_CODE (slot_pat) == SET
361 && rtx_equal_p (SET_DEST (slot_pat),
362 XEXP (XEXP (link, 0), 0)))
363 break;
364 }
365 if (i >= seq_size)
366 mark_referenced_resources (XEXP (XEXP (link, 0), 0),
367 res, false);
368 }
369 }
370 }
371
372 /* ... fall through to other INSN processing ... */
373
374 case INSN:
375 case JUMP_INSN:
376
377 if (GET_CODE (PATTERN (x)) == COND_EXEC)
378 /* In addition to the usual references, also consider all outputs
379 as referenced, to compensate for mark_set_resources treating
380 them as killed. This is similar to ZERO_EXTRACT / STRICT_LOW_PART
381 handling, execpt that we got a partial incidence instead of a partial
382 width. */
383 mark_set_resources (x, res, 0,
384 include_delayed_effects
385 ? MARK_SRC_DEST_CALL : MARK_SRC_DEST);
386
387 #ifdef INSN_REFERENCES_ARE_DELAYED
388 if (! include_delayed_effects
389 && INSN_REFERENCES_ARE_DELAYED (as_a <rtx_insn *> (x)))
390 return;
391 #endif
392
393 /* No special processing, just speed up. */
394 mark_referenced_resources (PATTERN (x), res, include_delayed_effects);
395 return;
396
397 default:
398 break;
399 }
400
401 /* Process each sub-expression and flag what it needs. */
402 format_ptr = GET_RTX_FORMAT (code);
403 for (i = 0; i < GET_RTX_LENGTH (code); i++)
404 switch (*format_ptr++)
405 {
406 case 'e':
407 mark_referenced_resources (XEXP (x, i), res, include_delayed_effects);
408 break;
409
410 case 'E':
411 for (j = 0; j < XVECLEN (x, i); j++)
412 mark_referenced_resources (XVECEXP (x, i, j), res,
413 include_delayed_effects);
414 break;
415 }
416 }
417 \f
418 /* A subroutine of mark_target_live_regs. Search forward from TARGET
419 looking for registers that are set before they are used. These are dead.
420 Stop after passing a few conditional jumps, and/or a small
421 number of unconditional branches. */
422
423 static rtx_insn *
424 find_dead_or_set_registers (rtx_insn *target, struct resources *res,
425 rtx *jump_target, int jump_count,
426 struct resources set, struct resources needed)
427 {
428 HARD_REG_SET scratch;
429 rtx_insn *insn;
430 rtx_insn *next_insn;
431 rtx_insn *jump_insn = 0;
432 int i;
433
434 for (insn = target; insn; insn = next_insn)
435 {
436 rtx_insn *this_jump_insn = insn;
437
438 next_insn = NEXT_INSN (insn);
439
440 /* If this instruction can throw an exception, then we don't
441 know where we might end up next. That means that we have to
442 assume that whatever we have already marked as live really is
443 live. */
444 if (can_throw_internal (insn))
445 break;
446
447 switch (GET_CODE (insn))
448 {
449 case CODE_LABEL:
450 /* After a label, any pending dead registers that weren't yet
451 used can be made dead. */
452 AND_COMPL_HARD_REG_SET (pending_dead_regs, needed.regs);
453 AND_COMPL_HARD_REG_SET (res->regs, pending_dead_regs);
454 CLEAR_HARD_REG_SET (pending_dead_regs);
455
456 continue;
457
458 case BARRIER:
459 case NOTE:
460 continue;
461
462 case INSN:
463 if (GET_CODE (PATTERN (insn)) == USE)
464 {
465 /* If INSN is a USE made by update_block, we care about the
466 underlying insn. Any registers set by the underlying insn
467 are live since the insn is being done somewhere else. */
468 if (INSN_P (XEXP (PATTERN (insn), 0)))
469 mark_set_resources (XEXP (PATTERN (insn), 0), res, 0,
470 MARK_SRC_DEST_CALL);
471
472 /* All other USE insns are to be ignored. */
473 continue;
474 }
475 else if (GET_CODE (PATTERN (insn)) == CLOBBER)
476 continue;
477 else if (rtx_sequence *seq =
478 dyn_cast <rtx_sequence *> (PATTERN (insn)))
479 {
480 /* An unconditional jump can be used to fill the delay slot
481 of a call, so search for a JUMP_INSN in any position. */
482 for (i = 0; i < seq->len (); i++)
483 {
484 this_jump_insn = seq->insn (i);
485 if (JUMP_P (this_jump_insn))
486 break;
487 }
488 }
489
490 default:
491 break;
492 }
493
494 if (JUMP_P (this_jump_insn))
495 {
496 if (jump_count++ < 10)
497 {
498 if (any_uncondjump_p (this_jump_insn)
499 || ANY_RETURN_P (PATTERN (this_jump_insn)))
500 {
501 rtx lab_or_return = JUMP_LABEL (this_jump_insn);
502 if (ANY_RETURN_P (lab_or_return))
503 next_insn = NULL;
504 else
505 next_insn = as_a <rtx_insn *> (lab_or_return);
506 if (jump_insn == 0)
507 {
508 jump_insn = insn;
509 if (jump_target)
510 *jump_target = JUMP_LABEL (this_jump_insn);
511 }
512 }
513 else if (any_condjump_p (this_jump_insn))
514 {
515 struct resources target_set, target_res;
516 struct resources fallthrough_res;
517
518 /* We can handle conditional branches here by following
519 both paths, and then IOR the results of the two paths
520 together, which will give us registers that are dead
521 on both paths. Since this is expensive, we give it
522 a much higher cost than unconditional branches. The
523 cost was chosen so that we will follow at most 1
524 conditional branch. */
525
526 jump_count += 4;
527 if (jump_count >= 10)
528 break;
529
530 mark_referenced_resources (insn, &needed, true);
531
532 /* For an annulled branch, mark_set_resources ignores slots
533 filled by instructions from the target. This is correct
534 if the branch is not taken. Since we are following both
535 paths from the branch, we must also compute correct info
536 if the branch is taken. We do this by inverting all of
537 the INSN_FROM_TARGET_P bits, calling mark_set_resources,
538 and then inverting the INSN_FROM_TARGET_P bits again. */
539
540 if (GET_CODE (PATTERN (insn)) == SEQUENCE
541 && INSN_ANNULLED_BRANCH_P (this_jump_insn))
542 {
543 rtx_sequence *seq = as_a <rtx_sequence *> (PATTERN (insn));
544 for (i = 1; i < seq->len (); i++)
545 INSN_FROM_TARGET_P (seq->element (i))
546 = ! INSN_FROM_TARGET_P (seq->element (i));
547
548 target_set = set;
549 mark_set_resources (insn, &target_set, 0,
550 MARK_SRC_DEST_CALL);
551
552 for (i = 1; i < seq->len (); i++)
553 INSN_FROM_TARGET_P (seq->element (i))
554 = ! INSN_FROM_TARGET_P (seq->element (i));
555
556 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
557 }
558 else
559 {
560 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
561 target_set = set;
562 }
563
564 target_res = *res;
565 COPY_HARD_REG_SET (scratch, target_set.regs);
566 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
567 AND_COMPL_HARD_REG_SET (target_res.regs, scratch);
568
569 fallthrough_res = *res;
570 COPY_HARD_REG_SET (scratch, set.regs);
571 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
572 AND_COMPL_HARD_REG_SET (fallthrough_res.regs, scratch);
573
574 if (!ANY_RETURN_P (JUMP_LABEL (this_jump_insn)))
575 find_dead_or_set_registers (JUMP_LABEL_AS_INSN (this_jump_insn),
576 &target_res, 0, jump_count,
577 target_set, needed);
578 find_dead_or_set_registers (next_insn,
579 &fallthrough_res, 0, jump_count,
580 set, needed);
581 IOR_HARD_REG_SET (fallthrough_res.regs, target_res.regs);
582 AND_HARD_REG_SET (res->regs, fallthrough_res.regs);
583 break;
584 }
585 else
586 break;
587 }
588 else
589 {
590 /* Don't try this optimization if we expired our jump count
591 above, since that would mean there may be an infinite loop
592 in the function being compiled. */
593 jump_insn = 0;
594 break;
595 }
596 }
597
598 mark_referenced_resources (insn, &needed, true);
599 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
600
601 COPY_HARD_REG_SET (scratch, set.regs);
602 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
603 AND_COMPL_HARD_REG_SET (res->regs, scratch);
604 }
605
606 return jump_insn;
607 }
608 \f
609 /* Given X, a part of an insn, and a pointer to a `struct resource',
610 RES, indicate which resources are modified by the insn. If
611 MARK_TYPE is MARK_SRC_DEST_CALL, also mark resources potentially
612 set by the called routine.
613
614 If IN_DEST is nonzero, it means we are inside a SET. Otherwise,
615 objects are being referenced instead of set.
616
617 We never mark the insn as modifying the condition code unless it explicitly
618 SETs CC0 even though this is not totally correct. The reason for this is
619 that we require a SET of CC0 to immediately precede the reference to CC0.
620 So if some other insn sets CC0 as a side-effect, we know it cannot affect
621 our computation and thus may be placed in a delay slot. */
622
623 void
624 mark_set_resources (rtx x, struct resources *res, int in_dest,
625 enum mark_resource_type mark_type)
626 {
627 enum rtx_code code;
628 int i, j;
629 unsigned int r;
630 const char *format_ptr;
631
632 restart:
633
634 code = GET_CODE (x);
635
636 switch (code)
637 {
638 case NOTE:
639 case BARRIER:
640 case CODE_LABEL:
641 case USE:
642 CASE_CONST_ANY:
643 case LABEL_REF:
644 case SYMBOL_REF:
645 case CONST:
646 case PC:
647 /* These don't set any resources. */
648 return;
649
650 case CC0:
651 if (in_dest)
652 res->cc = 1;
653 return;
654
655 case CALL_INSN:
656 /* Called routine modifies the condition code, memory, any registers
657 that aren't saved across calls, global registers and anything
658 explicitly CLOBBERed immediately after the CALL_INSN. */
659
660 if (mark_type == MARK_SRC_DEST_CALL)
661 {
662 rtx_call_insn *call_insn = as_a <rtx_call_insn *> (x);
663 rtx link;
664 HARD_REG_SET regs;
665
666 res->cc = res->memory = 1;
667
668 get_call_reg_set_usage (call_insn, &regs, regs_invalidated_by_call);
669 IOR_HARD_REG_SET (res->regs, regs);
670
671 for (link = CALL_INSN_FUNCTION_USAGE (call_insn);
672 link; link = XEXP (link, 1))
673 if (GET_CODE (XEXP (link, 0)) == CLOBBER)
674 mark_set_resources (SET_DEST (XEXP (link, 0)), res, 1,
675 MARK_SRC_DEST);
676
677 /* Check for a REG_SETJMP. If it exists, then we must
678 assume that this call can clobber any register. */
679 if (find_reg_note (call_insn, REG_SETJMP, NULL))
680 SET_HARD_REG_SET (res->regs);
681 }
682
683 /* ... and also what its RTL says it modifies, if anything. */
684
685 case JUMP_INSN:
686 case INSN:
687
688 /* An insn consisting of just a CLOBBER (or USE) is just for flow
689 and doesn't actually do anything, so we ignore it. */
690
691 #ifdef INSN_SETS_ARE_DELAYED
692 if (mark_type != MARK_SRC_DEST_CALL
693 && INSN_SETS_ARE_DELAYED (as_a <rtx_insn *> (x)))
694 return;
695 #endif
696
697 x = PATTERN (x);
698 if (GET_CODE (x) != USE && GET_CODE (x) != CLOBBER)
699 goto restart;
700 return;
701
702 case SET:
703 /* If the source of a SET is a CALL, this is actually done by
704 the called routine. So only include it if we are to include the
705 effects of the calling routine. */
706
707 mark_set_resources (SET_DEST (x), res,
708 (mark_type == MARK_SRC_DEST_CALL
709 || GET_CODE (SET_SRC (x)) != CALL),
710 mark_type);
711
712 mark_set_resources (SET_SRC (x), res, 0, MARK_SRC_DEST);
713 return;
714
715 case CLOBBER:
716 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
717 return;
718
719 case SEQUENCE:
720 {
721 rtx_sequence *seq = as_a <rtx_sequence *> (x);
722 rtx control = seq->element (0);
723 bool annul_p = JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control);
724
725 mark_set_resources (control, res, 0, mark_type);
726 for (i = seq->len () - 1; i >= 0; --i)
727 {
728 rtx elt = seq->element (i);
729 if (!annul_p && INSN_FROM_TARGET_P (elt))
730 mark_set_resources (elt, res, 0, mark_type);
731 }
732 }
733 return;
734
735 case POST_INC:
736 case PRE_INC:
737 case POST_DEC:
738 case PRE_DEC:
739 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
740 return;
741
742 case PRE_MODIFY:
743 case POST_MODIFY:
744 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
745 mark_set_resources (XEXP (XEXP (x, 1), 0), res, 0, MARK_SRC_DEST);
746 mark_set_resources (XEXP (XEXP (x, 1), 1), res, 0, MARK_SRC_DEST);
747 return;
748
749 case SIGN_EXTRACT:
750 case ZERO_EXTRACT:
751 mark_set_resources (XEXP (x, 0), res, in_dest, MARK_SRC_DEST);
752 mark_set_resources (XEXP (x, 1), res, 0, MARK_SRC_DEST);
753 mark_set_resources (XEXP (x, 2), res, 0, MARK_SRC_DEST);
754 return;
755
756 case MEM:
757 if (in_dest)
758 {
759 res->memory = 1;
760 res->volatil |= MEM_VOLATILE_P (x);
761 }
762
763 mark_set_resources (XEXP (x, 0), res, 0, MARK_SRC_DEST);
764 return;
765
766 case SUBREG:
767 if (in_dest)
768 {
769 if (!REG_P (SUBREG_REG (x)))
770 mark_set_resources (SUBREG_REG (x), res, in_dest, mark_type);
771 else
772 {
773 unsigned int regno = subreg_regno (x);
774 unsigned int last_regno = regno + subreg_nregs (x);
775
776 gcc_assert (last_regno <= FIRST_PSEUDO_REGISTER);
777 for (r = regno; r < last_regno; r++)
778 SET_HARD_REG_BIT (res->regs, r);
779 }
780 }
781 return;
782
783 case REG:
784 if (in_dest)
785 {
786 gcc_assert (HARD_REGISTER_P (x));
787 add_to_hard_reg_set (&res->regs, GET_MODE (x), REGNO (x));
788 }
789 return;
790
791 case UNSPEC_VOLATILE:
792 case ASM_INPUT:
793 /* Traditional asm's are always volatile. */
794 res->volatil = 1;
795 return;
796
797 case TRAP_IF:
798 res->volatil = 1;
799 break;
800
801 case ASM_OPERANDS:
802 res->volatil |= MEM_VOLATILE_P (x);
803
804 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
805 We can not just fall through here since then we would be confused
806 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
807 traditional asms unlike their normal usage. */
808
809 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
810 mark_set_resources (ASM_OPERANDS_INPUT (x, i), res, in_dest,
811 MARK_SRC_DEST);
812 return;
813
814 default:
815 break;
816 }
817
818 /* Process each sub-expression and flag what it needs. */
819 format_ptr = GET_RTX_FORMAT (code);
820 for (i = 0; i < GET_RTX_LENGTH (code); i++)
821 switch (*format_ptr++)
822 {
823 case 'e':
824 mark_set_resources (XEXP (x, i), res, in_dest, mark_type);
825 break;
826
827 case 'E':
828 for (j = 0; j < XVECLEN (x, i); j++)
829 mark_set_resources (XVECEXP (x, i, j), res, in_dest, mark_type);
830 break;
831 }
832 }
833 \f
834 /* Return TRUE if INSN is a return, possibly with a filled delay slot. */
835
836 static bool
837 return_insn_p (const_rtx insn)
838 {
839 if (JUMP_P (insn) && ANY_RETURN_P (PATTERN (insn)))
840 return true;
841
842 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
843 return return_insn_p (XVECEXP (PATTERN (insn), 0, 0));
844
845 return false;
846 }
847
848 /* Set the resources that are live at TARGET.
849
850 If TARGET is zero, we refer to the end of the current function and can
851 return our precomputed value.
852
853 Otherwise, we try to find out what is live by consulting the basic block
854 information. This is tricky, because we must consider the actions of
855 reload and jump optimization, which occur after the basic block information
856 has been computed.
857
858 Accordingly, we proceed as follows::
859
860 We find the previous BARRIER and look at all immediately following labels
861 (with no intervening active insns) to see if any of them start a basic
862 block. If we hit the start of the function first, we use block 0.
863
864 Once we have found a basic block and a corresponding first insn, we can
865 accurately compute the live status (by starting at a label following a
866 BARRIER, we are immune to actions taken by reload and jump.) Then we
867 scan all insns between that point and our target. For each CLOBBER (or
868 for call-clobbered regs when we pass a CALL_INSN), mark the appropriate
869 registers are dead. For a SET, mark them as live.
870
871 We have to be careful when using REG_DEAD notes because they are not
872 updated by such things as find_equiv_reg. So keep track of registers
873 marked as dead that haven't been assigned to, and mark them dead at the
874 next CODE_LABEL since reload and jump won't propagate values across labels.
875
876 If we cannot find the start of a basic block (should be a very rare
877 case, if it can happen at all), mark everything as potentially live.
878
879 Next, scan forward from TARGET looking for things set or clobbered
880 before they are used. These are not live.
881
882 Because we can be called many times on the same target, save our results
883 in a hash table indexed by INSN_UID. This is only done if the function
884 init_resource_info () was invoked before we are called. */
885
886 void
887 mark_target_live_regs (rtx_insn *insns, rtx target_maybe_return, struct resources *res)
888 {
889 int b = -1;
890 unsigned int i;
891 struct target_info *tinfo = NULL;
892 rtx_insn *insn;
893 rtx jump_insn = 0;
894 rtx jump_target;
895 HARD_REG_SET scratch;
896 struct resources set, needed;
897
898 /* Handle end of function. */
899 if (target_maybe_return == 0 || ANY_RETURN_P (target_maybe_return))
900 {
901 *res = end_of_function_needs;
902 return;
903 }
904
905 /* We've handled the case of RETURN/SIMPLE_RETURN; we should now have an
906 instruction. */
907 rtx_insn *target = as_a <rtx_insn *> (target_maybe_return);
908
909 /* Handle return insn. */
910 if (return_insn_p (target))
911 {
912 *res = end_of_function_needs;
913 mark_referenced_resources (target, res, false);
914 return;
915 }
916
917 /* We have to assume memory is needed, but the CC isn't. */
918 res->memory = 1;
919 res->volatil = 0;
920 res->cc = 0;
921
922 /* See if we have computed this value already. */
923 if (target_hash_table != NULL)
924 {
925 for (tinfo = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
926 tinfo; tinfo = tinfo->next)
927 if (tinfo->uid == INSN_UID (target))
928 break;
929
930 /* Start by getting the basic block number. If we have saved
931 information, we can get it from there unless the insn at the
932 start of the basic block has been deleted. */
933 if (tinfo && tinfo->block != -1
934 && ! BB_HEAD (BASIC_BLOCK_FOR_FN (cfun, tinfo->block))->deleted ())
935 b = tinfo->block;
936 }
937
938 if (b == -1)
939 b = find_basic_block (target, MAX_DELAY_SLOT_LIVE_SEARCH);
940
941 if (target_hash_table != NULL)
942 {
943 if (tinfo)
944 {
945 /* If the information is up-to-date, use it. Otherwise, we will
946 update it below. */
947 if (b == tinfo->block && b != -1 && tinfo->bb_tick == bb_ticks[b])
948 {
949 COPY_HARD_REG_SET (res->regs, tinfo->live_regs);
950 return;
951 }
952 }
953 else
954 {
955 /* Allocate a place to put our results and chain it into the
956 hash table. */
957 tinfo = XNEW (struct target_info);
958 tinfo->uid = INSN_UID (target);
959 tinfo->block = b;
960 tinfo->next
961 = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
962 target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME] = tinfo;
963 }
964 }
965
966 CLEAR_HARD_REG_SET (pending_dead_regs);
967
968 /* If we found a basic block, get the live registers from it and update
969 them with anything set or killed between its start and the insn before
970 TARGET; this custom life analysis is really about registers so we need
971 to use the LR problem. Otherwise, we must assume everything is live. */
972 if (b != -1)
973 {
974 regset regs_live = DF_LR_IN (BASIC_BLOCK_FOR_FN (cfun, b));
975 rtx_insn *start_insn, *stop_insn;
976
977 /* Compute hard regs live at start of block. */
978 REG_SET_TO_HARD_REG_SET (current_live_regs, regs_live);
979
980 /* Get starting and ending insn, handling the case where each might
981 be a SEQUENCE. */
982 start_insn = (b == ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb->index ?
983 insns : BB_HEAD (BASIC_BLOCK_FOR_FN (cfun, b)));
984 stop_insn = target;
985
986 if (NONJUMP_INSN_P (start_insn)
987 && GET_CODE (PATTERN (start_insn)) == SEQUENCE)
988 start_insn = as_a <rtx_sequence *> (PATTERN (start_insn))->insn (0);
989
990 if (NONJUMP_INSN_P (stop_insn)
991 && GET_CODE (PATTERN (stop_insn)) == SEQUENCE)
992 stop_insn = next_insn (PREV_INSN (stop_insn));
993
994 for (insn = start_insn; insn != stop_insn;
995 insn = next_insn_no_annul (insn))
996 {
997 rtx link;
998 rtx_insn *real_insn = insn;
999 enum rtx_code code = GET_CODE (insn);
1000
1001 if (DEBUG_INSN_P (insn))
1002 continue;
1003
1004 /* If this insn is from the target of a branch, it isn't going to
1005 be used in the sequel. If it is used in both cases, this
1006 test will not be true. */
1007 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
1008 && INSN_FROM_TARGET_P (insn))
1009 continue;
1010
1011 /* If this insn is a USE made by update_block, we care about the
1012 underlying insn. */
1013 if (code == INSN
1014 && GET_CODE (PATTERN (insn)) == USE
1015 && INSN_P (XEXP (PATTERN (insn), 0)))
1016 real_insn = as_a <rtx_insn *> (XEXP (PATTERN (insn), 0));
1017
1018 if (CALL_P (real_insn))
1019 {
1020 /* Values in call-clobbered registers survive a COND_EXEC CALL
1021 if that is not executed; this matters for resoure use because
1022 they may be used by a complementarily (or more strictly)
1023 predicated instruction, or if the CALL is NORETURN. */
1024 if (GET_CODE (PATTERN (real_insn)) != COND_EXEC)
1025 {
1026 HARD_REG_SET regs_invalidated_by_this_call;
1027 get_call_reg_set_usage (real_insn,
1028 &regs_invalidated_by_this_call,
1029 regs_invalidated_by_call);
1030 /* CALL clobbers all call-used regs that aren't fixed except
1031 sp, ap, and fp. Do this before setting the result of the
1032 call live. */
1033 AND_COMPL_HARD_REG_SET (current_live_regs,
1034 regs_invalidated_by_this_call);
1035 }
1036
1037 /* A CALL_INSN sets any global register live, since it may
1038 have been modified by the call. */
1039 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1040 if (global_regs[i])
1041 SET_HARD_REG_BIT (current_live_regs, i);
1042 }
1043
1044 /* Mark anything killed in an insn to be deadened at the next
1045 label. Ignore USE insns; the only REG_DEAD notes will be for
1046 parameters. But they might be early. A CALL_INSN will usually
1047 clobber registers used for parameters. It isn't worth bothering
1048 with the unlikely case when it won't. */
1049 if ((NONJUMP_INSN_P (real_insn)
1050 && GET_CODE (PATTERN (real_insn)) != USE
1051 && GET_CODE (PATTERN (real_insn)) != CLOBBER)
1052 || JUMP_P (real_insn)
1053 || CALL_P (real_insn))
1054 {
1055 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1056 if (REG_NOTE_KIND (link) == REG_DEAD
1057 && REG_P (XEXP (link, 0))
1058 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1059 add_to_hard_reg_set (&pending_dead_regs,
1060 GET_MODE (XEXP (link, 0)),
1061 REGNO (XEXP (link, 0)));
1062
1063 note_stores (PATTERN (real_insn), update_live_status, NULL);
1064
1065 /* If any registers were unused after this insn, kill them.
1066 These notes will always be accurate. */
1067 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1068 if (REG_NOTE_KIND (link) == REG_UNUSED
1069 && REG_P (XEXP (link, 0))
1070 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1071 remove_from_hard_reg_set (&current_live_regs,
1072 GET_MODE (XEXP (link, 0)),
1073 REGNO (XEXP (link, 0)));
1074 }
1075
1076 else if (LABEL_P (real_insn))
1077 {
1078 basic_block bb;
1079
1080 /* A label clobbers the pending dead registers since neither
1081 reload nor jump will propagate a value across a label. */
1082 AND_COMPL_HARD_REG_SET (current_live_regs, pending_dead_regs);
1083 CLEAR_HARD_REG_SET (pending_dead_regs);
1084
1085 /* We must conservatively assume that all registers that used
1086 to be live here still are. The fallthrough edge may have
1087 left a live register uninitialized. */
1088 bb = BLOCK_FOR_INSN (real_insn);
1089 if (bb)
1090 {
1091 HARD_REG_SET extra_live;
1092
1093 REG_SET_TO_HARD_REG_SET (extra_live, DF_LR_IN (bb));
1094 IOR_HARD_REG_SET (current_live_regs, extra_live);
1095 }
1096 }
1097
1098 /* The beginning of the epilogue corresponds to the end of the
1099 RTL chain when there are no epilogue insns. Certain resources
1100 are implicitly required at that point. */
1101 else if (NOTE_P (real_insn)
1102 && NOTE_KIND (real_insn) == NOTE_INSN_EPILOGUE_BEG)
1103 IOR_HARD_REG_SET (current_live_regs, start_of_epilogue_needs.regs);
1104 }
1105
1106 COPY_HARD_REG_SET (res->regs, current_live_regs);
1107 if (tinfo != NULL)
1108 {
1109 tinfo->block = b;
1110 tinfo->bb_tick = bb_ticks[b];
1111 }
1112 }
1113 else
1114 /* We didn't find the start of a basic block. Assume everything
1115 in use. This should happen only extremely rarely. */
1116 SET_HARD_REG_SET (res->regs);
1117
1118 CLEAR_RESOURCE (&set);
1119 CLEAR_RESOURCE (&needed);
1120
1121 jump_insn = find_dead_or_set_registers (target, res, &jump_target, 0,
1122 set, needed);
1123
1124 /* If we hit an unconditional branch, we have another way of finding out
1125 what is live: we can see what is live at the branch target and include
1126 anything used but not set before the branch. We add the live
1127 resources found using the test below to those found until now. */
1128
1129 if (jump_insn)
1130 {
1131 struct resources new_resources;
1132 rtx_insn *stop_insn = next_active_insn (jump_insn);
1133
1134 if (!ANY_RETURN_P (jump_target))
1135 jump_target = next_active_insn (jump_target);
1136 mark_target_live_regs (insns, jump_target, &new_resources);
1137 CLEAR_RESOURCE (&set);
1138 CLEAR_RESOURCE (&needed);
1139
1140 /* Include JUMP_INSN in the needed registers. */
1141 for (insn = target; insn != stop_insn; insn = next_active_insn (insn))
1142 {
1143 mark_referenced_resources (insn, &needed, true);
1144
1145 COPY_HARD_REG_SET (scratch, needed.regs);
1146 AND_COMPL_HARD_REG_SET (scratch, set.regs);
1147 IOR_HARD_REG_SET (new_resources.regs, scratch);
1148
1149 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1150 }
1151
1152 IOR_HARD_REG_SET (res->regs, new_resources.regs);
1153 }
1154
1155 if (tinfo != NULL)
1156 {
1157 COPY_HARD_REG_SET (tinfo->live_regs, res->regs);
1158 }
1159 }
1160 \f
1161 /* Initialize the resources required by mark_target_live_regs ().
1162 This should be invoked before the first call to mark_target_live_regs. */
1163
1164 void
1165 init_resource_info (rtx_insn *epilogue_insn)
1166 {
1167 int i;
1168 basic_block bb;
1169
1170 /* Indicate what resources are required to be valid at the end of the current
1171 function. The condition code never is and memory always is.
1172 The stack pointer is needed unless EXIT_IGNORE_STACK is true
1173 and there is an epilogue that restores the original stack pointer
1174 from the frame pointer. Registers used to return the function value
1175 are needed. Registers holding global variables are needed. */
1176
1177 end_of_function_needs.cc = 0;
1178 end_of_function_needs.memory = 1;
1179 CLEAR_HARD_REG_SET (end_of_function_needs.regs);
1180
1181 if (frame_pointer_needed)
1182 {
1183 SET_HARD_REG_BIT (end_of_function_needs.regs, FRAME_POINTER_REGNUM);
1184 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
1185 SET_HARD_REG_BIT (end_of_function_needs.regs, HARD_FRAME_POINTER_REGNUM);
1186 #endif
1187 }
1188 if (!(frame_pointer_needed
1189 && EXIT_IGNORE_STACK
1190 && epilogue_insn
1191 && !crtl->sp_is_unchanging))
1192 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1193
1194 if (crtl->return_rtx != 0)
1195 mark_referenced_resources (crtl->return_rtx,
1196 &end_of_function_needs, true);
1197
1198 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1199 if (global_regs[i]
1200 #ifdef EPILOGUE_USES
1201 || EPILOGUE_USES (i)
1202 #endif
1203 )
1204 SET_HARD_REG_BIT (end_of_function_needs.regs, i);
1205
1206 /* The registers required to be live at the end of the function are
1207 represented in the flow information as being dead just prior to
1208 reaching the end of the function. For example, the return of a value
1209 might be represented by a USE of the return register immediately
1210 followed by an unconditional jump to the return label where the
1211 return label is the end of the RTL chain. The end of the RTL chain
1212 is then taken to mean that the return register is live.
1213
1214 This sequence is no longer maintained when epilogue instructions are
1215 added to the RTL chain. To reconstruct the original meaning, the
1216 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
1217 point where these registers become live (start_of_epilogue_needs).
1218 If epilogue instructions are present, the registers set by those
1219 instructions won't have been processed by flow. Thus, those
1220 registers are additionally required at the end of the RTL chain
1221 (end_of_function_needs). */
1222
1223 start_of_epilogue_needs = end_of_function_needs;
1224
1225 while ((epilogue_insn = next_nonnote_insn (epilogue_insn)))
1226 {
1227 mark_set_resources (epilogue_insn, &end_of_function_needs, 0,
1228 MARK_SRC_DEST_CALL);
1229 if (return_insn_p (epilogue_insn))
1230 break;
1231 }
1232
1233 /* Allocate and initialize the tables used by mark_target_live_regs. */
1234 target_hash_table = XCNEWVEC (struct target_info *, TARGET_HASH_PRIME);
1235 bb_ticks = XCNEWVEC (int, last_basic_block_for_fn (cfun));
1236
1237 /* Set the BLOCK_FOR_INSN of each label that starts a basic block. */
1238 FOR_EACH_BB_FN (bb, cfun)
1239 if (LABEL_P (BB_HEAD (bb)))
1240 BLOCK_FOR_INSN (BB_HEAD (bb)) = bb;
1241 }
1242 \f
1243 /* Free up the resources allocated to mark_target_live_regs (). This
1244 should be invoked after the last call to mark_target_live_regs (). */
1245
1246 void
1247 free_resource_info (void)
1248 {
1249 basic_block bb;
1250
1251 if (target_hash_table != NULL)
1252 {
1253 int i;
1254
1255 for (i = 0; i < TARGET_HASH_PRIME; ++i)
1256 {
1257 struct target_info *ti = target_hash_table[i];
1258
1259 while (ti)
1260 {
1261 struct target_info *next = ti->next;
1262 free (ti);
1263 ti = next;
1264 }
1265 }
1266
1267 free (target_hash_table);
1268 target_hash_table = NULL;
1269 }
1270
1271 if (bb_ticks != NULL)
1272 {
1273 free (bb_ticks);
1274 bb_ticks = NULL;
1275 }
1276
1277 FOR_EACH_BB_FN (bb, cfun)
1278 if (LABEL_P (BB_HEAD (bb)))
1279 BLOCK_FOR_INSN (BB_HEAD (bb)) = NULL;
1280 }
1281 \f
1282 /* Clear any hashed information that we have stored for INSN. */
1283
1284 void
1285 clear_hashed_info_for_insn (rtx_insn *insn)
1286 {
1287 struct target_info *tinfo;
1288
1289 if (target_hash_table != NULL)
1290 {
1291 for (tinfo = target_hash_table[INSN_UID (insn) % TARGET_HASH_PRIME];
1292 tinfo; tinfo = tinfo->next)
1293 if (tinfo->uid == INSN_UID (insn))
1294 break;
1295
1296 if (tinfo)
1297 tinfo->block = -1;
1298 }
1299 }
1300 \f
1301 /* Increment the tick count for the basic block that contains INSN. */
1302
1303 void
1304 incr_ticks_for_insn (rtx_insn *insn)
1305 {
1306 int b = find_basic_block (insn, MAX_DELAY_SLOT_LIVE_SEARCH);
1307
1308 if (b != -1)
1309 bb_ticks[b]++;
1310 }
1311 \f
1312 /* Add TRIAL to the set of resources used at the end of the current
1313 function. */
1314 void
1315 mark_end_of_function_resources (rtx trial, bool include_delayed_effects)
1316 {
1317 mark_referenced_resources (trial, &end_of_function_needs,
1318 include_delayed_effects);
1319 }