1 /* Instruction scheduling pass. This file computes dependencies between
3 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998,
4 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
6 Free Software Foundation, Inc.
7 Contributed by Michael Tiemann (tiemann@cygnus.com) Enhanced by,
8 and currently maintained by, Jim Wilson (wilson@cygnus.com)
10 This file is part of GCC.
12 GCC is free software; you can redistribute it and/or modify it under
13 the terms of the GNU General Public License as published by the Free
14 Software Foundation; either version 3, or (at your option) any later
17 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
18 WARRANTY; without even the implied warranty of MERCHANTABILITY or
19 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
22 You should have received a copy of the GNU General Public License
23 along with GCC; see the file COPYING3. If not see
24 <http://www.gnu.org/licenses/>. */
28 #include "coretypes.h"
30 #include "diagnostic-core.h"
33 #include "hard-reg-set.h"
37 #include "insn-config.h"
38 #include "insn-attr.h"
41 #include "sched-int.h"
47 #ifdef INSN_SCHEDULING
49 #ifdef ENABLE_CHECKING
55 /* Holds current parameters for the dependency analyzer. */
56 struct sched_deps_info_def
*sched_deps_info
;
58 /* The data is specific to the Haifa scheduler. */
59 VEC(haifa_deps_insn_data_def
, heap
) *h_d_i_d
= NULL
;
61 /* Return the major type present in the DS. */
69 return REG_DEP_OUTPUT
;
72 return REG_DEP_CONTROL
;
74 gcc_assert (ds
& DEP_ANTI
);
79 /* Return equivalent dep_status. */
81 dk_to_ds (enum reg_note dk
)
95 gcc_assert (dk
== REG_DEP_ANTI
);
100 /* Functions to operate with dependence information container - dep_t. */
102 /* Init DEP with the arguments. */
104 init_dep_1 (dep_t dep
, rtx pro
, rtx con
, enum reg_note type
, ds_t ds
)
108 DEP_TYPE (dep
) = type
;
109 DEP_STATUS (dep
) = ds
;
110 DEP_COST (dep
) = UNKNOWN_DEP_COST
;
113 /* Init DEP with the arguments.
114 While most of the scheduler (including targets) only need the major type
115 of the dependency, it is convenient to hide full dep_status from them. */
117 init_dep (dep_t dep
, rtx pro
, rtx con
, enum reg_note kind
)
121 if ((current_sched_info
->flags
& USE_DEPS_LIST
))
122 ds
= dk_to_ds (kind
);
126 init_dep_1 (dep
, pro
, con
, kind
, ds
);
129 /* Make a copy of FROM in TO. */
131 copy_dep (dep_t to
, dep_t from
)
133 memcpy (to
, from
, sizeof (*to
));
136 static void dump_ds (FILE *, ds_t
);
138 /* Define flags for dump_dep (). */
140 /* Dump producer of the dependence. */
141 #define DUMP_DEP_PRO (2)
143 /* Dump consumer of the dependence. */
144 #define DUMP_DEP_CON (4)
146 /* Dump type of the dependence. */
147 #define DUMP_DEP_TYPE (8)
149 /* Dump status of the dependence. */
150 #define DUMP_DEP_STATUS (16)
152 /* Dump all information about the dependence. */
153 #define DUMP_DEP_ALL (DUMP_DEP_PRO | DUMP_DEP_CON | DUMP_DEP_TYPE \
157 FLAGS is a bit mask specifying what information about DEP needs
159 If FLAGS has the very first bit set, then dump all information about DEP
160 and propagate this bit into the callee dump functions. */
162 dump_dep (FILE *dump
, dep_t dep
, int flags
)
165 flags
|= DUMP_DEP_ALL
;
169 if (flags
& DUMP_DEP_PRO
)
170 fprintf (dump
, "%d; ", INSN_UID (DEP_PRO (dep
)));
172 if (flags
& DUMP_DEP_CON
)
173 fprintf (dump
, "%d; ", INSN_UID (DEP_CON (dep
)));
175 if (flags
& DUMP_DEP_TYPE
)
178 enum reg_note type
= DEP_TYPE (dep
);
190 case REG_DEP_CONTROL
:
203 fprintf (dump
, "%c; ", t
);
206 if (flags
& DUMP_DEP_STATUS
)
208 if (current_sched_info
->flags
& USE_DEPS_LIST
)
209 dump_ds (dump
, DEP_STATUS (dep
));
215 /* Default flags for dump_dep (). */
216 static int dump_dep_flags
= (DUMP_DEP_PRO
| DUMP_DEP_CON
);
218 /* Dump all fields of DEP to STDERR. */
220 sd_debug_dep (dep_t dep
)
222 dump_dep (stderr
, dep
, 1);
223 fprintf (stderr
, "\n");
226 /* Determine whether DEP is a dependency link of a non-debug insn on a
230 depl_on_debug_p (dep_link_t dep
)
232 return (DEBUG_INSN_P (DEP_LINK_PRO (dep
))
233 && !DEBUG_INSN_P (DEP_LINK_CON (dep
)));
236 /* Functions to operate with a single link from the dependencies lists -
239 /* Attach L to appear after link X whose &DEP_LINK_NEXT (X) is given by
242 attach_dep_link (dep_link_t l
, dep_link_t
*prev_nextp
)
244 dep_link_t next
= *prev_nextp
;
246 gcc_assert (DEP_LINK_PREV_NEXTP (l
) == NULL
247 && DEP_LINK_NEXT (l
) == NULL
);
249 /* Init node being inserted. */
250 DEP_LINK_PREV_NEXTP (l
) = prev_nextp
;
251 DEP_LINK_NEXT (l
) = next
;
256 gcc_assert (DEP_LINK_PREV_NEXTP (next
) == prev_nextp
);
258 DEP_LINK_PREV_NEXTP (next
) = &DEP_LINK_NEXT (l
);
265 /* Add dep_link LINK to deps_list L. */
267 add_to_deps_list (dep_link_t link
, deps_list_t l
)
269 attach_dep_link (link
, &DEPS_LIST_FIRST (l
));
271 /* Don't count debug deps. */
272 if (!depl_on_debug_p (link
))
273 ++DEPS_LIST_N_LINKS (l
);
276 /* Detach dep_link L from the list. */
278 detach_dep_link (dep_link_t l
)
280 dep_link_t
*prev_nextp
= DEP_LINK_PREV_NEXTP (l
);
281 dep_link_t next
= DEP_LINK_NEXT (l
);
286 DEP_LINK_PREV_NEXTP (next
) = prev_nextp
;
288 DEP_LINK_PREV_NEXTP (l
) = NULL
;
289 DEP_LINK_NEXT (l
) = NULL
;
292 /* Remove link LINK from list LIST. */
294 remove_from_deps_list (dep_link_t link
, deps_list_t list
)
296 detach_dep_link (link
);
298 /* Don't count debug deps. */
299 if (!depl_on_debug_p (link
))
300 --DEPS_LIST_N_LINKS (list
);
303 /* Move link LINK from list FROM to list TO. */
305 move_dep_link (dep_link_t link
, deps_list_t from
, deps_list_t to
)
307 remove_from_deps_list (link
, from
);
308 add_to_deps_list (link
, to
);
311 /* Return true of LINK is not attached to any list. */
313 dep_link_is_detached_p (dep_link_t link
)
315 return DEP_LINK_PREV_NEXTP (link
) == NULL
;
318 /* Pool to hold all dependency nodes (dep_node_t). */
319 static alloc_pool dn_pool
;
321 /* Number of dep_nodes out there. */
322 static int dn_pool_diff
= 0;
324 /* Create a dep_node. */
326 create_dep_node (void)
328 dep_node_t n
= (dep_node_t
) pool_alloc (dn_pool
);
329 dep_link_t back
= DEP_NODE_BACK (n
);
330 dep_link_t forw
= DEP_NODE_FORW (n
);
332 DEP_LINK_NODE (back
) = n
;
333 DEP_LINK_NEXT (back
) = NULL
;
334 DEP_LINK_PREV_NEXTP (back
) = NULL
;
336 DEP_LINK_NODE (forw
) = n
;
337 DEP_LINK_NEXT (forw
) = NULL
;
338 DEP_LINK_PREV_NEXTP (forw
) = NULL
;
345 /* Delete dep_node N. N must not be connected to any deps_list. */
347 delete_dep_node (dep_node_t n
)
349 gcc_assert (dep_link_is_detached_p (DEP_NODE_BACK (n
))
350 && dep_link_is_detached_p (DEP_NODE_FORW (n
)));
354 pool_free (dn_pool
, n
);
357 /* Pool to hold dependencies lists (deps_list_t). */
358 static alloc_pool dl_pool
;
360 /* Number of deps_lists out there. */
361 static int dl_pool_diff
= 0;
363 /* Functions to operate with dependences lists - deps_list_t. */
365 /* Return true if list L is empty. */
367 deps_list_empty_p (deps_list_t l
)
369 return DEPS_LIST_N_LINKS (l
) == 0;
372 /* Create a new deps_list. */
374 create_deps_list (void)
376 deps_list_t l
= (deps_list_t
) pool_alloc (dl_pool
);
378 DEPS_LIST_FIRST (l
) = NULL
;
379 DEPS_LIST_N_LINKS (l
) = 0;
385 /* Free deps_list L. */
387 free_deps_list (deps_list_t l
)
389 gcc_assert (deps_list_empty_p (l
));
393 pool_free (dl_pool
, l
);
396 /* Return true if there is no dep_nodes and deps_lists out there.
397 After the region is scheduled all the dependency nodes and lists
398 should [generally] be returned to pool. */
400 deps_pools_are_empty_p (void)
402 return dn_pool_diff
== 0 && dl_pool_diff
== 0;
405 /* Remove all elements from L. */
407 clear_deps_list (deps_list_t l
)
411 dep_link_t link
= DEPS_LIST_FIRST (l
);
416 remove_from_deps_list (link
, l
);
421 /* Decide whether a dependency should be treated as a hard or a speculative
424 dep_spec_p (dep_t dep
)
426 if (current_sched_info
->flags
& DO_SPECULATION
)
428 if (DEP_STATUS (dep
) & SPECULATIVE
)
431 if (current_sched_info
->flags
& DO_PREDICATION
)
433 if (DEP_TYPE (dep
) == REG_DEP_CONTROL
)
439 static regset reg_pending_sets
;
440 static regset reg_pending_clobbers
;
441 static regset reg_pending_uses
;
442 static regset reg_pending_control_uses
;
443 static enum reg_pending_barrier_mode reg_pending_barrier
;
445 /* Hard registers implicitly clobbered or used (or may be implicitly
446 clobbered or used) by the currently analyzed insn. For example,
447 insn in its constraint has one register class. Even if there is
448 currently no hard register in the insn, the particular hard
449 register will be in the insn after reload pass because the
450 constraint requires it. */
451 static HARD_REG_SET implicit_reg_pending_clobbers
;
452 static HARD_REG_SET implicit_reg_pending_uses
;
454 /* To speed up the test for duplicate dependency links we keep a
455 record of dependencies created by add_dependence when the average
456 number of instructions in a basic block is very large.
458 Studies have shown that there is typically around 5 instructions between
459 branches for typical C code. So we can make a guess that the average
460 basic block is approximately 5 instructions long; we will choose 100X
461 the average size as a very large basic block.
463 Each insn has associated bitmaps for its dependencies. Each bitmap
464 has enough entries to represent a dependency on any other insn in
465 the insn chain. All bitmap for true dependencies cache is
466 allocated then the rest two ones are also allocated. */
467 static bitmap_head
*true_dependency_cache
= NULL
;
468 static bitmap_head
*output_dependency_cache
= NULL
;
469 static bitmap_head
*anti_dependency_cache
= NULL
;
470 static bitmap_head
*control_dependency_cache
= NULL
;
471 static bitmap_head
*spec_dependency_cache
= NULL
;
472 static int cache_size
;
474 static int deps_may_trap_p (const_rtx
);
475 static void add_dependence_1 (rtx
, rtx
, enum reg_note
);
476 static void add_dependence_list (rtx
, rtx
, int, enum reg_note
);
477 static void add_dependence_list_and_free (struct deps_desc
*, rtx
,
478 rtx
*, int, enum reg_note
);
479 static void delete_all_dependences (rtx
);
480 static void chain_to_prev_insn (rtx
);
482 static void flush_pending_lists (struct deps_desc
*, rtx
, int, int);
483 static void sched_analyze_1 (struct deps_desc
*, rtx
, rtx
);
484 static void sched_analyze_2 (struct deps_desc
*, rtx
, rtx
);
485 static void sched_analyze_insn (struct deps_desc
*, rtx
, rtx
);
487 static bool sched_has_condition_p (const_rtx
);
488 static int conditions_mutex_p (const_rtx
, const_rtx
, bool, bool);
490 static enum DEPS_ADJUST_RESULT
maybe_add_or_update_dep_1 (dep_t
, bool,
492 static enum DEPS_ADJUST_RESULT
add_or_update_dep_1 (dep_t
, bool, rtx
, rtx
);
494 #ifdef ENABLE_CHECKING
495 static void check_dep (dep_t
, bool);
498 /* Return nonzero if a load of the memory reference MEM can cause a trap. */
501 deps_may_trap_p (const_rtx mem
)
503 const_rtx addr
= XEXP (mem
, 0);
505 if (REG_P (addr
) && REGNO (addr
) >= FIRST_PSEUDO_REGISTER
)
507 const_rtx t
= get_reg_known_value (REGNO (addr
));
511 return rtx_addr_can_trap_p (addr
);
515 /* Find the condition under which INSN is executed. If REV is not NULL,
516 it is set to TRUE when the returned comparison should be reversed
517 to get the actual condition. */
519 sched_get_condition_with_rev_uncached (const_rtx insn
, bool *rev
)
521 rtx pat
= PATTERN (insn
);
527 if (GET_CODE (pat
) == COND_EXEC
)
528 return COND_EXEC_TEST (pat
);
530 if (!any_condjump_p (insn
) || !onlyjump_p (insn
))
533 src
= SET_SRC (pc_set (insn
));
535 if (XEXP (src
, 2) == pc_rtx
)
536 return XEXP (src
, 0);
537 else if (XEXP (src
, 1) == pc_rtx
)
539 rtx cond
= XEXP (src
, 0);
540 enum rtx_code revcode
= reversed_comparison_code (cond
, insn
);
542 if (revcode
== UNKNOWN
)
553 /* Return the condition under which INSN does not execute (i.e. the
554 not-taken condition for a conditional branch), or NULL if we cannot
555 find such a condition. The caller should make a copy of the condition
558 sched_get_reverse_condition_uncached (const_rtx insn
)
561 rtx cond
= sched_get_condition_with_rev_uncached (insn
, &rev
);
562 if (cond
== NULL_RTX
)
566 enum rtx_code revcode
= reversed_comparison_code (cond
, insn
);
567 cond
= gen_rtx_fmt_ee (revcode
, GET_MODE (cond
),
574 /* Caching variant of sched_get_condition_with_rev_uncached.
575 We only do actual work the first time we come here for an insn; the
576 results are cached in INSN_CACHED_COND and INSN_REVERSE_COND. */
578 sched_get_condition_with_rev (const_rtx insn
, bool *rev
)
582 if (INSN_LUID (insn
) == 0)
583 return sched_get_condition_with_rev_uncached (insn
, rev
);
585 if (INSN_CACHED_COND (insn
) == const_true_rtx
)
588 if (INSN_CACHED_COND (insn
) != NULL_RTX
)
591 *rev
= INSN_REVERSE_COND (insn
);
592 return INSN_CACHED_COND (insn
);
595 INSN_CACHED_COND (insn
) = sched_get_condition_with_rev_uncached (insn
, &tmp
);
596 INSN_REVERSE_COND (insn
) = tmp
;
598 if (INSN_CACHED_COND (insn
) == NULL_RTX
)
600 INSN_CACHED_COND (insn
) = const_true_rtx
;
605 *rev
= INSN_REVERSE_COND (insn
);
606 return INSN_CACHED_COND (insn
);
609 /* True when we can find a condition under which INSN is executed. */
611 sched_has_condition_p (const_rtx insn
)
613 return !! sched_get_condition_with_rev (insn
, NULL
);
618 /* Return nonzero if conditions COND1 and COND2 can never be both true. */
620 conditions_mutex_p (const_rtx cond1
, const_rtx cond2
, bool rev1
, bool rev2
)
622 if (COMPARISON_P (cond1
)
623 && COMPARISON_P (cond2
)
624 && GET_CODE (cond1
) ==
626 ? reversed_comparison_code (cond2
, NULL
)
628 && rtx_equal_p (XEXP (cond1
, 0), XEXP (cond2
, 0))
629 && XEXP (cond1
, 1) == XEXP (cond2
, 1))
634 /* Return true if insn1 and insn2 can never depend on one another because
635 the conditions under which they are executed are mutually exclusive. */
637 sched_insns_conditions_mutex_p (const_rtx insn1
, const_rtx insn2
)
640 bool rev1
= false, rev2
= false;
642 /* df doesn't handle conditional lifetimes entirely correctly;
643 calls mess up the conditional lifetimes. */
644 if (!CALL_P (insn1
) && !CALL_P (insn2
))
646 cond1
= sched_get_condition_with_rev (insn1
, &rev1
);
647 cond2
= sched_get_condition_with_rev (insn2
, &rev2
);
649 && conditions_mutex_p (cond1
, cond2
, rev1
, rev2
)
650 /* Make sure first instruction doesn't affect condition of second
651 instruction if switched. */
652 && !modified_in_p (cond1
, insn2
)
653 /* Make sure second instruction doesn't affect condition of first
654 instruction if switched. */
655 && !modified_in_p (cond2
, insn1
))
662 /* Return true if INSN can potentially be speculated with type DS. */
664 sched_insn_is_legitimate_for_speculation_p (const_rtx insn
, ds_t ds
)
666 if (HAS_INTERNAL_DEP (insn
))
669 if (!NONJUMP_INSN_P (insn
))
672 if (SCHED_GROUP_P (insn
))
675 if (IS_SPECULATION_CHECK_P (CONST_CAST_RTX (insn
)))
678 if (side_effects_p (PATTERN (insn
)))
682 /* The following instructions, which depend on a speculatively scheduled
683 instruction, cannot be speculatively scheduled along. */
685 if (may_trap_or_fault_p (PATTERN (insn
)))
686 /* If instruction might fault, it cannot be speculatively scheduled.
687 For control speculation it's obvious why and for data speculation
688 it's because the insn might get wrong input if speculation
689 wasn't successful. */
692 if ((ds
& BE_IN_DATA
)
693 && sched_has_condition_p (insn
))
694 /* If this is a predicated instruction, then it cannot be
695 speculatively scheduled. See PR35659. */
702 /* Initialize LIST_PTR to point to one of the lists present in TYPES_PTR,
703 initialize RESOLVED_P_PTR with true if that list consists of resolved deps,
704 and remove the type of returned [through LIST_PTR] list from TYPES_PTR.
705 This function is used to switch sd_iterator to the next list.
706 !!! For internal use only. Might consider moving it to sched-int.h. */
708 sd_next_list (const_rtx insn
, sd_list_types_def
*types_ptr
,
709 deps_list_t
*list_ptr
, bool *resolved_p_ptr
)
711 sd_list_types_def types
= *types_ptr
;
713 if (types
& SD_LIST_HARD_BACK
)
715 *list_ptr
= INSN_HARD_BACK_DEPS (insn
);
716 *resolved_p_ptr
= false;
717 *types_ptr
= types
& ~SD_LIST_HARD_BACK
;
719 else if (types
& SD_LIST_SPEC_BACK
)
721 *list_ptr
= INSN_SPEC_BACK_DEPS (insn
);
722 *resolved_p_ptr
= false;
723 *types_ptr
= types
& ~SD_LIST_SPEC_BACK
;
725 else if (types
& SD_LIST_FORW
)
727 *list_ptr
= INSN_FORW_DEPS (insn
);
728 *resolved_p_ptr
= false;
729 *types_ptr
= types
& ~SD_LIST_FORW
;
731 else if (types
& SD_LIST_RES_BACK
)
733 *list_ptr
= INSN_RESOLVED_BACK_DEPS (insn
);
734 *resolved_p_ptr
= true;
735 *types_ptr
= types
& ~SD_LIST_RES_BACK
;
737 else if (types
& SD_LIST_RES_FORW
)
739 *list_ptr
= INSN_RESOLVED_FORW_DEPS (insn
);
740 *resolved_p_ptr
= true;
741 *types_ptr
= types
& ~SD_LIST_RES_FORW
;
746 *resolved_p_ptr
= false;
747 *types_ptr
= SD_LIST_NONE
;
751 /* Return the summary size of INSN's lists defined by LIST_TYPES. */
753 sd_lists_size (const_rtx insn
, sd_list_types_def list_types
)
757 while (list_types
!= SD_LIST_NONE
)
762 sd_next_list (insn
, &list_types
, &list
, &resolved_p
);
764 size
+= DEPS_LIST_N_LINKS (list
);
770 /* Return true if INSN's lists defined by LIST_TYPES are all empty. */
773 sd_lists_empty_p (const_rtx insn
, sd_list_types_def list_types
)
775 while (list_types
!= SD_LIST_NONE
)
780 sd_next_list (insn
, &list_types
, &list
, &resolved_p
);
781 if (!deps_list_empty_p (list
))
788 /* Initialize data for INSN. */
790 sd_init_insn (rtx insn
)
792 INSN_HARD_BACK_DEPS (insn
) = create_deps_list ();
793 INSN_SPEC_BACK_DEPS (insn
) = create_deps_list ();
794 INSN_RESOLVED_BACK_DEPS (insn
) = create_deps_list ();
795 INSN_FORW_DEPS (insn
) = create_deps_list ();
796 INSN_RESOLVED_FORW_DEPS (insn
) = create_deps_list ();
798 /* ??? It would be nice to allocate dependency caches here. */
801 /* Free data for INSN. */
803 sd_finish_insn (rtx insn
)
805 /* ??? It would be nice to deallocate dependency caches here. */
807 free_deps_list (INSN_HARD_BACK_DEPS (insn
));
808 INSN_HARD_BACK_DEPS (insn
) = NULL
;
810 free_deps_list (INSN_SPEC_BACK_DEPS (insn
));
811 INSN_SPEC_BACK_DEPS (insn
) = NULL
;
813 free_deps_list (INSN_RESOLVED_BACK_DEPS (insn
));
814 INSN_RESOLVED_BACK_DEPS (insn
) = NULL
;
816 free_deps_list (INSN_FORW_DEPS (insn
));
817 INSN_FORW_DEPS (insn
) = NULL
;
819 free_deps_list (INSN_RESOLVED_FORW_DEPS (insn
));
820 INSN_RESOLVED_FORW_DEPS (insn
) = NULL
;
823 /* Find a dependency between producer PRO and consumer CON.
824 Search through resolved dependency lists if RESOLVED_P is true.
825 If no such dependency is found return NULL,
826 otherwise return the dependency and initialize SD_IT_PTR [if it is nonnull]
827 with an iterator pointing to it. */
829 sd_find_dep_between_no_cache (rtx pro
, rtx con
, bool resolved_p
,
830 sd_iterator_def
*sd_it_ptr
)
832 sd_list_types_def pro_list_type
;
833 sd_list_types_def con_list_type
;
834 sd_iterator_def sd_it
;
836 bool found_p
= false;
840 pro_list_type
= SD_LIST_RES_FORW
;
841 con_list_type
= SD_LIST_RES_BACK
;
845 pro_list_type
= SD_LIST_FORW
;
846 con_list_type
= SD_LIST_BACK
;
849 /* Walk through either back list of INSN or forw list of ELEM
850 depending on which one is shorter. */
851 if (sd_lists_size (con
, con_list_type
) < sd_lists_size (pro
, pro_list_type
))
853 /* Find the dep_link with producer PRO in consumer's back_deps. */
854 FOR_EACH_DEP (con
, con_list_type
, sd_it
, dep
)
855 if (DEP_PRO (dep
) == pro
)
863 /* Find the dep_link with consumer CON in producer's forw_deps. */
864 FOR_EACH_DEP (pro
, pro_list_type
, sd_it
, dep
)
865 if (DEP_CON (dep
) == con
)
874 if (sd_it_ptr
!= NULL
)
883 /* Find a dependency between producer PRO and consumer CON.
884 Use dependency [if available] to check if dependency is present at all.
885 Search through resolved dependency lists if RESOLVED_P is true.
886 If the dependency or NULL if none found. */
888 sd_find_dep_between (rtx pro
, rtx con
, bool resolved_p
)
890 if (true_dependency_cache
!= NULL
)
891 /* Avoiding the list walk below can cut compile times dramatically
894 int elem_luid
= INSN_LUID (pro
);
895 int insn_luid
= INSN_LUID (con
);
897 if (!bitmap_bit_p (&true_dependency_cache
[insn_luid
], elem_luid
)
898 && !bitmap_bit_p (&output_dependency_cache
[insn_luid
], elem_luid
)
899 && !bitmap_bit_p (&anti_dependency_cache
[insn_luid
], elem_luid
)
900 && !bitmap_bit_p (&control_dependency_cache
[insn_luid
], elem_luid
))
904 return sd_find_dep_between_no_cache (pro
, con
, resolved_p
, NULL
);
907 /* Add or update a dependence described by DEP.
908 MEM1 and MEM2, if non-null, correspond to memory locations in case of
911 The function returns a value indicating if an old entry has been changed
912 or a new entry has been added to insn's backward deps.
914 This function merely checks if producer and consumer is the same insn
915 and doesn't create a dep in this case. Actual manipulation of
916 dependence data structures is performed in add_or_update_dep_1. */
917 static enum DEPS_ADJUST_RESULT
918 maybe_add_or_update_dep_1 (dep_t dep
, bool resolved_p
, rtx mem1
, rtx mem2
)
920 rtx elem
= DEP_PRO (dep
);
921 rtx insn
= DEP_CON (dep
);
923 gcc_assert (INSN_P (insn
) && INSN_P (elem
));
925 /* Don't depend an insn on itself. */
928 if (sched_deps_info
->generate_spec_deps
)
929 /* INSN has an internal dependence, which we can't overcome. */
930 HAS_INTERNAL_DEP (insn
) = 1;
935 return add_or_update_dep_1 (dep
, resolved_p
, mem1
, mem2
);
938 /* Ask dependency caches what needs to be done for dependence DEP.
939 Return DEP_CREATED if new dependence should be created and there is no
940 need to try to find one searching the dependencies lists.
941 Return DEP_PRESENT if there already is a dependence described by DEP and
942 hence nothing is to be done.
943 Return DEP_CHANGED if there already is a dependence, but it should be
944 updated to incorporate additional information from DEP. */
945 static enum DEPS_ADJUST_RESULT
946 ask_dependency_caches (dep_t dep
)
948 int elem_luid
= INSN_LUID (DEP_PRO (dep
));
949 int insn_luid
= INSN_LUID (DEP_CON (dep
));
951 gcc_assert (true_dependency_cache
!= NULL
952 && output_dependency_cache
!= NULL
953 && anti_dependency_cache
!= NULL
954 && control_dependency_cache
!= NULL
);
956 if (!(current_sched_info
->flags
& USE_DEPS_LIST
))
958 enum reg_note present_dep_type
;
960 if (bitmap_bit_p (&true_dependency_cache
[insn_luid
], elem_luid
))
961 present_dep_type
= REG_DEP_TRUE
;
962 else if (bitmap_bit_p (&output_dependency_cache
[insn_luid
], elem_luid
))
963 present_dep_type
= REG_DEP_OUTPUT
;
964 else if (bitmap_bit_p (&anti_dependency_cache
[insn_luid
], elem_luid
))
965 present_dep_type
= REG_DEP_ANTI
;
966 else if (bitmap_bit_p (&control_dependency_cache
[insn_luid
], elem_luid
))
967 present_dep_type
= REG_DEP_CONTROL
;
969 /* There is no existing dep so it should be created. */
972 if ((int) DEP_TYPE (dep
) >= (int) present_dep_type
)
973 /* DEP does not add anything to the existing dependence. */
978 ds_t present_dep_types
= 0;
980 if (bitmap_bit_p (&true_dependency_cache
[insn_luid
], elem_luid
))
981 present_dep_types
|= DEP_TRUE
;
982 if (bitmap_bit_p (&output_dependency_cache
[insn_luid
], elem_luid
))
983 present_dep_types
|= DEP_OUTPUT
;
984 if (bitmap_bit_p (&anti_dependency_cache
[insn_luid
], elem_luid
))
985 present_dep_types
|= DEP_ANTI
;
986 if (bitmap_bit_p (&control_dependency_cache
[insn_luid
], elem_luid
))
987 present_dep_types
|= DEP_CONTROL
;
989 if (present_dep_types
== 0)
990 /* There is no existing dep so it should be created. */
993 if (!(current_sched_info
->flags
& DO_SPECULATION
)
994 || !bitmap_bit_p (&spec_dependency_cache
[insn_luid
], elem_luid
))
996 if ((present_dep_types
| (DEP_STATUS (dep
) & DEP_TYPES
))
997 == present_dep_types
)
998 /* DEP does not add anything to the existing dependence. */
1003 /* Only true dependencies can be data speculative and
1004 only anti dependencies can be control speculative. */
1005 gcc_assert ((present_dep_types
& (DEP_TRUE
| DEP_ANTI
))
1006 == present_dep_types
);
1008 /* if (DEP is SPECULATIVE) then
1009 ..we should update DEP_STATUS
1011 ..we should reset existing dep to non-speculative. */
1018 /* Set dependency caches according to DEP. */
1020 set_dependency_caches (dep_t dep
)
1022 int elem_luid
= INSN_LUID (DEP_PRO (dep
));
1023 int insn_luid
= INSN_LUID (DEP_CON (dep
));
1025 if (!(current_sched_info
->flags
& USE_DEPS_LIST
))
1027 switch (DEP_TYPE (dep
))
1030 bitmap_set_bit (&true_dependency_cache
[insn_luid
], elem_luid
);
1033 case REG_DEP_OUTPUT
:
1034 bitmap_set_bit (&output_dependency_cache
[insn_luid
], elem_luid
);
1038 bitmap_set_bit (&anti_dependency_cache
[insn_luid
], elem_luid
);
1041 case REG_DEP_CONTROL
:
1042 bitmap_set_bit (&control_dependency_cache
[insn_luid
], elem_luid
);
1051 ds_t ds
= DEP_STATUS (dep
);
1054 bitmap_set_bit (&true_dependency_cache
[insn_luid
], elem_luid
);
1055 if (ds
& DEP_OUTPUT
)
1056 bitmap_set_bit (&output_dependency_cache
[insn_luid
], elem_luid
);
1058 bitmap_set_bit (&anti_dependency_cache
[insn_luid
], elem_luid
);
1059 if (ds
& DEP_CONTROL
)
1060 bitmap_set_bit (&control_dependency_cache
[insn_luid
], elem_luid
);
1062 if (ds
& SPECULATIVE
)
1064 gcc_assert (current_sched_info
->flags
& DO_SPECULATION
);
1065 bitmap_set_bit (&spec_dependency_cache
[insn_luid
], elem_luid
);
1070 /* Type of dependence DEP have changed from OLD_TYPE. Update dependency
1071 caches accordingly. */
1073 update_dependency_caches (dep_t dep
, enum reg_note old_type
)
1075 int elem_luid
= INSN_LUID (DEP_PRO (dep
));
1076 int insn_luid
= INSN_LUID (DEP_CON (dep
));
1078 /* Clear corresponding cache entry because type of the link
1079 may have changed. Keep them if we use_deps_list. */
1080 if (!(current_sched_info
->flags
& USE_DEPS_LIST
))
1084 case REG_DEP_OUTPUT
:
1085 bitmap_clear_bit (&output_dependency_cache
[insn_luid
], elem_luid
);
1089 bitmap_clear_bit (&anti_dependency_cache
[insn_luid
], elem_luid
);
1092 case REG_DEP_CONTROL
:
1093 bitmap_clear_bit (&control_dependency_cache
[insn_luid
], elem_luid
);
1101 set_dependency_caches (dep
);
1104 /* Convert a dependence pointed to by SD_IT to be non-speculative. */
1106 change_spec_dep_to_hard (sd_iterator_def sd_it
)
1108 dep_node_t node
= DEP_LINK_NODE (*sd_it
.linkp
);
1109 dep_link_t link
= DEP_NODE_BACK (node
);
1110 dep_t dep
= DEP_NODE_DEP (node
);
1111 rtx elem
= DEP_PRO (dep
);
1112 rtx insn
= DEP_CON (dep
);
1114 move_dep_link (link
, INSN_SPEC_BACK_DEPS (insn
), INSN_HARD_BACK_DEPS (insn
));
1116 DEP_STATUS (dep
) &= ~SPECULATIVE
;
1118 if (true_dependency_cache
!= NULL
)
1119 /* Clear the cache entry. */
1120 bitmap_clear_bit (&spec_dependency_cache
[INSN_LUID (insn
)],
1124 /* Update DEP to incorporate information from NEW_DEP.
1125 SD_IT points to DEP in case it should be moved to another list.
1126 MEM1 and MEM2, if nonnull, correspond to memory locations in case if
1127 data-speculative dependence should be updated. */
1128 static enum DEPS_ADJUST_RESULT
1129 update_dep (dep_t dep
, dep_t new_dep
,
1130 sd_iterator_def sd_it ATTRIBUTE_UNUSED
,
1131 rtx mem1 ATTRIBUTE_UNUSED
,
1132 rtx mem2 ATTRIBUTE_UNUSED
)
1134 enum DEPS_ADJUST_RESULT res
= DEP_PRESENT
;
1135 enum reg_note old_type
= DEP_TYPE (dep
);
1136 bool was_spec
= dep_spec_p (dep
);
1138 /* If this is a more restrictive type of dependence than the
1139 existing one, then change the existing dependence to this
1141 if ((int) DEP_TYPE (new_dep
) < (int) old_type
)
1143 DEP_TYPE (dep
) = DEP_TYPE (new_dep
);
1147 if (current_sched_info
->flags
& USE_DEPS_LIST
)
1148 /* Update DEP_STATUS. */
1150 ds_t dep_status
= DEP_STATUS (dep
);
1151 ds_t ds
= DEP_STATUS (new_dep
);
1152 ds_t new_status
= ds
| dep_status
;
1154 if (new_status
& SPECULATIVE
)
1156 /* Either existing dep or a dep we're adding or both are
1158 if (!(ds
& SPECULATIVE
)
1159 || !(dep_status
& SPECULATIVE
))
1160 /* The new dep can't be speculative. */
1161 new_status
&= ~SPECULATIVE
;
1164 /* Both are speculative. Merge probabilities. */
1169 dw
= estimate_dep_weak (mem1
, mem2
);
1170 ds
= set_dep_weak (ds
, BEGIN_DATA
, dw
);
1173 new_status
= ds_merge (dep_status
, ds
);
1179 if (dep_status
!= ds
)
1181 DEP_STATUS (dep
) = ds
;
1186 if (was_spec
&& !dep_spec_p (dep
))
1187 /* The old dep was speculative, but now it isn't. */
1188 change_spec_dep_to_hard (sd_it
);
1190 if (true_dependency_cache
!= NULL
1191 && res
== DEP_CHANGED
)
1192 update_dependency_caches (dep
, old_type
);
1197 /* Add or update a dependence described by DEP.
1198 MEM1 and MEM2, if non-null, correspond to memory locations in case of
1201 The function returns a value indicating if an old entry has been changed
1202 or a new entry has been added to insn's backward deps or nothing has
1203 been updated at all. */
1204 static enum DEPS_ADJUST_RESULT
1205 add_or_update_dep_1 (dep_t new_dep
, bool resolved_p
,
1206 rtx mem1 ATTRIBUTE_UNUSED
, rtx mem2 ATTRIBUTE_UNUSED
)
1208 bool maybe_present_p
= true;
1209 bool present_p
= false;
1211 gcc_assert (INSN_P (DEP_PRO (new_dep
)) && INSN_P (DEP_CON (new_dep
))
1212 && DEP_PRO (new_dep
) != DEP_CON (new_dep
));
1214 #ifdef ENABLE_CHECKING
1215 check_dep (new_dep
, mem1
!= NULL
);
1218 if (true_dependency_cache
!= NULL
)
1220 switch (ask_dependency_caches (new_dep
))
1226 maybe_present_p
= true;
1231 maybe_present_p
= false;
1241 /* Check that we don't already have this dependence. */
1242 if (maybe_present_p
)
1245 sd_iterator_def sd_it
;
1247 gcc_assert (true_dependency_cache
== NULL
|| present_p
);
1249 present_dep
= sd_find_dep_between_no_cache (DEP_PRO (new_dep
),
1251 resolved_p
, &sd_it
);
1253 if (present_dep
!= NULL
)
1254 /* We found an existing dependency between ELEM and INSN. */
1255 return update_dep (present_dep
, new_dep
, sd_it
, mem1
, mem2
);
1257 /* We didn't find a dep, it shouldn't present in the cache. */
1258 gcc_assert (!present_p
);
1261 /* Might want to check one level of transitivity to save conses.
1262 This check should be done in maybe_add_or_update_dep_1.
1263 Since we made it to add_or_update_dep_1, we must create
1264 (or update) a link. */
1266 if (mem1
!= NULL_RTX
)
1268 gcc_assert (sched_deps_info
->generate_spec_deps
);
1269 DEP_STATUS (new_dep
) = set_dep_weak (DEP_STATUS (new_dep
), BEGIN_DATA
,
1270 estimate_dep_weak (mem1
, mem2
));
1273 sd_add_dep (new_dep
, resolved_p
);
1278 /* Initialize BACK_LIST_PTR with consumer's backward list and
1279 FORW_LIST_PTR with producer's forward list. If RESOLVED_P is true
1280 initialize with lists that hold resolved deps. */
1282 get_back_and_forw_lists (dep_t dep
, bool resolved_p
,
1283 deps_list_t
*back_list_ptr
,
1284 deps_list_t
*forw_list_ptr
)
1286 rtx con
= DEP_CON (dep
);
1290 if (dep_spec_p (dep
))
1291 *back_list_ptr
= INSN_SPEC_BACK_DEPS (con
);
1293 *back_list_ptr
= INSN_HARD_BACK_DEPS (con
);
1295 *forw_list_ptr
= INSN_FORW_DEPS (DEP_PRO (dep
));
1299 *back_list_ptr
= INSN_RESOLVED_BACK_DEPS (con
);
1300 *forw_list_ptr
= INSN_RESOLVED_FORW_DEPS (DEP_PRO (dep
));
1304 /* Add dependence described by DEP.
1305 If RESOLVED_P is true treat the dependence as a resolved one. */
1307 sd_add_dep (dep_t dep
, bool resolved_p
)
1309 dep_node_t n
= create_dep_node ();
1310 deps_list_t con_back_deps
;
1311 deps_list_t pro_forw_deps
;
1312 rtx elem
= DEP_PRO (dep
);
1313 rtx insn
= DEP_CON (dep
);
1315 gcc_assert (INSN_P (insn
) && INSN_P (elem
) && insn
!= elem
);
1317 if ((current_sched_info
->flags
& DO_SPECULATION
) == 0
1318 || !sched_insn_is_legitimate_for_speculation_p (insn
, DEP_STATUS (dep
)))
1319 DEP_STATUS (dep
) &= ~SPECULATIVE
;
1321 copy_dep (DEP_NODE_DEP (n
), dep
);
1323 get_back_and_forw_lists (dep
, resolved_p
, &con_back_deps
, &pro_forw_deps
);
1325 add_to_deps_list (DEP_NODE_BACK (n
), con_back_deps
);
1327 #ifdef ENABLE_CHECKING
1328 check_dep (dep
, false);
1331 add_to_deps_list (DEP_NODE_FORW (n
), pro_forw_deps
);
1333 /* If we are adding a dependency to INSN's LOG_LINKs, then note that
1334 in the bitmap caches of dependency information. */
1335 if (true_dependency_cache
!= NULL
)
1336 set_dependency_caches (dep
);
1339 /* Add or update backward dependence between INSN and ELEM
1340 with given type DEP_TYPE and dep_status DS.
1341 This function is a convenience wrapper. */
1342 enum DEPS_ADJUST_RESULT
1343 sd_add_or_update_dep (dep_t dep
, bool resolved_p
)
1345 return add_or_update_dep_1 (dep
, resolved_p
, NULL_RTX
, NULL_RTX
);
1348 /* Resolved dependence pointed to by SD_IT.
1349 SD_IT will advance to the next element. */
1351 sd_resolve_dep (sd_iterator_def sd_it
)
1353 dep_node_t node
= DEP_LINK_NODE (*sd_it
.linkp
);
1354 dep_t dep
= DEP_NODE_DEP (node
);
1355 rtx pro
= DEP_PRO (dep
);
1356 rtx con
= DEP_CON (dep
);
1358 if (dep_spec_p (dep
))
1359 move_dep_link (DEP_NODE_BACK (node
), INSN_SPEC_BACK_DEPS (con
),
1360 INSN_RESOLVED_BACK_DEPS (con
));
1362 move_dep_link (DEP_NODE_BACK (node
), INSN_HARD_BACK_DEPS (con
),
1363 INSN_RESOLVED_BACK_DEPS (con
));
1365 move_dep_link (DEP_NODE_FORW (node
), INSN_FORW_DEPS (pro
),
1366 INSN_RESOLVED_FORW_DEPS (pro
));
1369 /* Perform the inverse operation of sd_resolve_dep. Restore the dependence
1370 pointed to by SD_IT to unresolved state. */
1372 sd_unresolve_dep (sd_iterator_def sd_it
)
1374 dep_node_t node
= DEP_LINK_NODE (*sd_it
.linkp
);
1375 dep_t dep
= DEP_NODE_DEP (node
);
1376 rtx pro
= DEP_PRO (dep
);
1377 rtx con
= DEP_CON (dep
);
1379 if (dep_spec_p (dep
))
1380 move_dep_link (DEP_NODE_BACK (node
), INSN_RESOLVED_BACK_DEPS (con
),
1381 INSN_SPEC_BACK_DEPS (con
));
1383 move_dep_link (DEP_NODE_BACK (node
), INSN_RESOLVED_BACK_DEPS (con
),
1384 INSN_HARD_BACK_DEPS (con
));
1386 move_dep_link (DEP_NODE_FORW (node
), INSN_RESOLVED_FORW_DEPS (pro
),
1387 INSN_FORW_DEPS (pro
));
1390 /* Make TO depend on all the FROM's producers.
1391 If RESOLVED_P is true add dependencies to the resolved lists. */
1393 sd_copy_back_deps (rtx to
, rtx from
, bool resolved_p
)
1395 sd_list_types_def list_type
;
1396 sd_iterator_def sd_it
;
1399 list_type
= resolved_p
? SD_LIST_RES_BACK
: SD_LIST_BACK
;
1401 FOR_EACH_DEP (from
, list_type
, sd_it
, dep
)
1403 dep_def _new_dep
, *new_dep
= &_new_dep
;
1405 copy_dep (new_dep
, dep
);
1406 DEP_CON (new_dep
) = to
;
1407 sd_add_dep (new_dep
, resolved_p
);
1411 /* Remove a dependency referred to by SD_IT.
1412 SD_IT will point to the next dependence after removal. */
1414 sd_delete_dep (sd_iterator_def sd_it
)
1416 dep_node_t n
= DEP_LINK_NODE (*sd_it
.linkp
);
1417 dep_t dep
= DEP_NODE_DEP (n
);
1418 rtx pro
= DEP_PRO (dep
);
1419 rtx con
= DEP_CON (dep
);
1420 deps_list_t con_back_deps
;
1421 deps_list_t pro_forw_deps
;
1423 if (true_dependency_cache
!= NULL
)
1425 int elem_luid
= INSN_LUID (pro
);
1426 int insn_luid
= INSN_LUID (con
);
1428 bitmap_clear_bit (&true_dependency_cache
[insn_luid
], elem_luid
);
1429 bitmap_clear_bit (&anti_dependency_cache
[insn_luid
], elem_luid
);
1430 bitmap_clear_bit (&control_dependency_cache
[insn_luid
], elem_luid
);
1431 bitmap_clear_bit (&output_dependency_cache
[insn_luid
], elem_luid
);
1433 if (current_sched_info
->flags
& DO_SPECULATION
)
1434 bitmap_clear_bit (&spec_dependency_cache
[insn_luid
], elem_luid
);
1437 get_back_and_forw_lists (dep
, sd_it
.resolved_p
,
1438 &con_back_deps
, &pro_forw_deps
);
1440 remove_from_deps_list (DEP_NODE_BACK (n
), con_back_deps
);
1441 remove_from_deps_list (DEP_NODE_FORW (n
), pro_forw_deps
);
1443 delete_dep_node (n
);
1446 /* Dump size of the lists. */
1447 #define DUMP_LISTS_SIZE (2)
1449 /* Dump dependencies of the lists. */
1450 #define DUMP_LISTS_DEPS (4)
1452 /* Dump all information about the lists. */
1453 #define DUMP_LISTS_ALL (DUMP_LISTS_SIZE | DUMP_LISTS_DEPS)
1455 /* Dump deps_lists of INSN specified by TYPES to DUMP.
1456 FLAGS is a bit mask specifying what information about the lists needs
1458 If FLAGS has the very first bit set, then dump all information about
1459 the lists and propagate this bit into the callee dump functions. */
1461 dump_lists (FILE *dump
, rtx insn
, sd_list_types_def types
, int flags
)
1463 sd_iterator_def sd_it
;
1470 flags
|= DUMP_LISTS_ALL
;
1472 fprintf (dump
, "[");
1474 if (flags
& DUMP_LISTS_SIZE
)
1475 fprintf (dump
, "%d; ", sd_lists_size (insn
, types
));
1477 if (flags
& DUMP_LISTS_DEPS
)
1479 FOR_EACH_DEP (insn
, types
, sd_it
, dep
)
1481 dump_dep (dump
, dep
, dump_dep_flags
| all
);
1482 fprintf (dump
, " ");
1487 /* Dump all information about deps_lists of INSN specified by TYPES
1490 sd_debug_lists (rtx insn
, sd_list_types_def types
)
1492 dump_lists (stderr
, insn
, types
, 1);
1493 fprintf (stderr
, "\n");
1496 /* A wrapper around add_dependence_1, to add a dependence of CON on
1497 PRO, with type DEP_TYPE. This function implements special handling
1498 for REG_DEP_CONTROL dependencies. For these, we optionally promote
1499 the type to REG_DEP_ANTI if we can determine that predication is
1500 impossible; otherwise we add additional true dependencies on the
1501 INSN_COND_DEPS list of the jump (which PRO must be). */
1503 add_dependence (rtx con
, rtx pro
, enum reg_note dep_type
)
1505 if (dep_type
== REG_DEP_CONTROL
1506 && !(current_sched_info
->flags
& DO_PREDICATION
))
1507 dep_type
= REG_DEP_ANTI
;
1509 /* A REG_DEP_CONTROL dependence may be eliminated through predication,
1510 so we must also make the insn dependent on the setter of the
1512 if (dep_type
== REG_DEP_CONTROL
)
1515 rtx other
= real_insn_for_shadow (real_pro
);
1518 if (other
!= NULL_RTX
)
1520 cond
= sched_get_reverse_condition_uncached (real_pro
);
1521 /* Verify that the insn does not use a different value in
1522 the condition register than the one that was present at
1524 if (cond
== NULL_RTX
)
1525 dep_type
= REG_DEP_ANTI
;
1526 else if (INSN_CACHED_COND (real_pro
) == const_true_rtx
)
1529 CLEAR_HARD_REG_SET (uses
);
1530 note_uses (&PATTERN (con
), record_hard_reg_uses
, &uses
);
1531 if (TEST_HARD_REG_BIT (uses
, REGNO (XEXP (cond
, 0))))
1532 dep_type
= REG_DEP_ANTI
;
1534 if (dep_type
== REG_DEP_CONTROL
)
1536 if (sched_verbose
>= 5)
1537 fprintf (sched_dump
, "making DEP_CONTROL for %d\n",
1538 INSN_UID (real_pro
));
1539 add_dependence_list (con
, INSN_COND_DEPS (real_pro
), 0,
1544 add_dependence_1 (con
, pro
, dep_type
);
1547 /* A convenience wrapper to operate on an entire list. */
1550 add_dependence_list (rtx insn
, rtx list
, int uncond
, enum reg_note dep_type
)
1552 for (; list
; list
= XEXP (list
, 1))
1554 if (uncond
|| ! sched_insns_conditions_mutex_p (insn
, XEXP (list
, 0)))
1555 add_dependence (insn
, XEXP (list
, 0), dep_type
);
1559 /* Similar, but free *LISTP at the same time, when the context
1563 add_dependence_list_and_free (struct deps_desc
*deps
, rtx insn
, rtx
*listp
,
1564 int uncond
, enum reg_note dep_type
)
1568 /* We don't want to short-circuit dependencies involving debug
1569 insns, because they may cause actual dependencies to be
1571 if (deps
->readonly
|| DEBUG_INSN_P (insn
))
1573 add_dependence_list (insn
, *listp
, uncond
, dep_type
);
1577 for (list
= *listp
, *listp
= NULL
; list
; list
= next
)
1579 next
= XEXP (list
, 1);
1580 if (uncond
|| ! sched_insns_conditions_mutex_p (insn
, XEXP (list
, 0)))
1581 add_dependence (insn
, XEXP (list
, 0), dep_type
);
1582 free_INSN_LIST_node (list
);
1586 /* Remove all occurrences of INSN from LIST. Return the number of
1587 occurrences removed. */
1590 remove_from_dependence_list (rtx insn
, rtx
* listp
)
1596 if (XEXP (*listp
, 0) == insn
)
1598 remove_free_INSN_LIST_node (listp
);
1603 listp
= &XEXP (*listp
, 1);
1609 /* Same as above, but process two lists at once. */
1611 remove_from_both_dependence_lists (rtx insn
, rtx
*listp
, rtx
*exprp
)
1617 if (XEXP (*listp
, 0) == insn
)
1619 remove_free_INSN_LIST_node (listp
);
1620 remove_free_EXPR_LIST_node (exprp
);
1625 listp
= &XEXP (*listp
, 1);
1626 exprp
= &XEXP (*exprp
, 1);
1632 /* Clear all dependencies for an insn. */
1634 delete_all_dependences (rtx insn
)
1636 sd_iterator_def sd_it
;
1639 /* The below cycle can be optimized to clear the caches and back_deps
1640 in one call but that would provoke duplication of code from
1643 for (sd_it
= sd_iterator_start (insn
, SD_LIST_BACK
);
1644 sd_iterator_cond (&sd_it
, &dep
);)
1645 sd_delete_dep (sd_it
);
1648 /* All insns in a scheduling group except the first should only have
1649 dependencies on the previous insn in the group. So we find the
1650 first instruction in the scheduling group by walking the dependence
1651 chains backwards. Then we add the dependencies for the group to
1652 the previous nonnote insn. */
1655 chain_to_prev_insn (rtx insn
)
1657 sd_iterator_def sd_it
;
1661 FOR_EACH_DEP (insn
, SD_LIST_BACK
, sd_it
, dep
)
1664 rtx pro
= DEP_PRO (dep
);
1668 i
= prev_nonnote_insn (i
);
1672 } while (SCHED_GROUP_P (i
) || DEBUG_INSN_P (i
));
1674 if (! sched_insns_conditions_mutex_p (i
, pro
))
1675 add_dependence (i
, pro
, DEP_TYPE (dep
));
1679 delete_all_dependences (insn
);
1681 prev_nonnote
= prev_nonnote_nondebug_insn (insn
);
1682 if (BLOCK_FOR_INSN (insn
) == BLOCK_FOR_INSN (prev_nonnote
)
1683 && ! sched_insns_conditions_mutex_p (insn
, prev_nonnote
))
1684 add_dependence (insn
, prev_nonnote
, REG_DEP_ANTI
);
1687 /* Process an insn's memory dependencies. There are four kinds of
1690 (0) read dependence: read follows read
1691 (1) true dependence: read follows write
1692 (2) output dependence: write follows write
1693 (3) anti dependence: write follows read
1695 We are careful to build only dependencies which actually exist, and
1696 use transitivity to avoid building too many links. */
1698 /* Add an INSN and MEM reference pair to a pending INSN_LIST and MEM_LIST.
1699 The MEM is a memory reference contained within INSN, which we are saving
1700 so that we can do memory aliasing on it. */
1703 add_insn_mem_dependence (struct deps_desc
*deps
, bool read_p
,
1710 gcc_assert (!deps
->readonly
);
1713 insn_list
= &deps
->pending_read_insns
;
1714 mem_list
= &deps
->pending_read_mems
;
1715 if (!DEBUG_INSN_P (insn
))
1716 deps
->pending_read_list_length
++;
1720 insn_list
= &deps
->pending_write_insns
;
1721 mem_list
= &deps
->pending_write_mems
;
1722 deps
->pending_write_list_length
++;
1725 link
= alloc_INSN_LIST (insn
, *insn_list
);
1728 if (sched_deps_info
->use_cselib
)
1730 mem
= shallow_copy_rtx (mem
);
1731 XEXP (mem
, 0) = cselib_subst_to_values_from_insn (XEXP (mem
, 0),
1732 GET_MODE (mem
), insn
);
1734 link
= alloc_EXPR_LIST (VOIDmode
, canon_rtx (mem
), *mem_list
);
1738 /* Make a dependency between every memory reference on the pending lists
1739 and INSN, thus flushing the pending lists. FOR_READ is true if emitting
1740 dependencies for a read operation, similarly with FOR_WRITE. */
1743 flush_pending_lists (struct deps_desc
*deps
, rtx insn
, int for_read
,
1748 add_dependence_list_and_free (deps
, insn
, &deps
->pending_read_insns
,
1750 if (!deps
->readonly
)
1752 free_EXPR_LIST_list (&deps
->pending_read_mems
);
1753 deps
->pending_read_list_length
= 0;
1757 add_dependence_list_and_free (deps
, insn
, &deps
->pending_write_insns
, 1,
1758 for_read
? REG_DEP_ANTI
: REG_DEP_OUTPUT
);
1760 add_dependence_list_and_free (deps
, insn
,
1761 &deps
->last_pending_memory_flush
, 1,
1762 for_read
? REG_DEP_ANTI
: REG_DEP_OUTPUT
);
1764 add_dependence_list_and_free (deps
, insn
, &deps
->pending_jump_insns
, 1,
1767 if (!deps
->readonly
)
1769 free_EXPR_LIST_list (&deps
->pending_write_mems
);
1770 deps
->pending_write_list_length
= 0;
1772 deps
->last_pending_memory_flush
= alloc_INSN_LIST (insn
, NULL_RTX
);
1773 deps
->pending_flush_length
= 1;
1777 /* Instruction which dependencies we are analyzing. */
1778 static rtx cur_insn
= NULL_RTX
;
1780 /* Implement hooks for haifa scheduler. */
1783 haifa_start_insn (rtx insn
)
1785 gcc_assert (insn
&& !cur_insn
);
1791 haifa_finish_insn (void)
1797 haifa_note_reg_set (int regno
)
1799 SET_REGNO_REG_SET (reg_pending_sets
, regno
);
1803 haifa_note_reg_clobber (int regno
)
1805 SET_REGNO_REG_SET (reg_pending_clobbers
, regno
);
1809 haifa_note_reg_use (int regno
)
1811 SET_REGNO_REG_SET (reg_pending_uses
, regno
);
1815 haifa_note_mem_dep (rtx mem
, rtx pending_mem
, rtx pending_insn
, ds_t ds
)
1817 if (!(ds
& SPECULATIVE
))
1820 pending_mem
= NULL_RTX
;
1823 gcc_assert (ds
& BEGIN_DATA
);
1826 dep_def _dep
, *dep
= &_dep
;
1828 init_dep_1 (dep
, pending_insn
, cur_insn
, ds_to_dt (ds
),
1829 current_sched_info
->flags
& USE_DEPS_LIST
? ds
: 0);
1830 maybe_add_or_update_dep_1 (dep
, false, pending_mem
, mem
);
1836 haifa_note_dep (rtx elem
, ds_t ds
)
1841 init_dep (dep
, elem
, cur_insn
, ds_to_dt (ds
));
1842 maybe_add_or_update_dep_1 (dep
, false, NULL_RTX
, NULL_RTX
);
1846 note_reg_use (int r
)
1848 if (sched_deps_info
->note_reg_use
)
1849 sched_deps_info
->note_reg_use (r
);
1853 note_reg_set (int r
)
1855 if (sched_deps_info
->note_reg_set
)
1856 sched_deps_info
->note_reg_set (r
);
1860 note_reg_clobber (int r
)
1862 if (sched_deps_info
->note_reg_clobber
)
1863 sched_deps_info
->note_reg_clobber (r
);
1867 note_mem_dep (rtx m1
, rtx m2
, rtx e
, ds_t ds
)
1869 if (sched_deps_info
->note_mem_dep
)
1870 sched_deps_info
->note_mem_dep (m1
, m2
, e
, ds
);
1874 note_dep (rtx e
, ds_t ds
)
1876 if (sched_deps_info
->note_dep
)
1877 sched_deps_info
->note_dep (e
, ds
);
1880 /* Return corresponding to DS reg_note. */
1885 return REG_DEP_TRUE
;
1886 else if (ds
& DEP_OUTPUT
)
1887 return REG_DEP_OUTPUT
;
1888 else if (ds
& DEP_ANTI
)
1889 return REG_DEP_ANTI
;
1892 gcc_assert (ds
& DEP_CONTROL
);
1893 return REG_DEP_CONTROL
;
1899 /* Functions for computation of info needed for register pressure
1900 sensitive insn scheduling. */
1903 /* Allocate and return reg_use_data structure for REGNO and INSN. */
1904 static struct reg_use_data
*
1905 create_insn_reg_use (int regno
, rtx insn
)
1907 struct reg_use_data
*use
;
1909 use
= (struct reg_use_data
*) xmalloc (sizeof (struct reg_use_data
));
1912 use
->next_insn_use
= INSN_REG_USE_LIST (insn
);
1913 INSN_REG_USE_LIST (insn
) = use
;
1917 /* Allocate and return reg_set_data structure for REGNO and INSN. */
1918 static struct reg_set_data
*
1919 create_insn_reg_set (int regno
, rtx insn
)
1921 struct reg_set_data
*set
;
1923 set
= (struct reg_set_data
*) xmalloc (sizeof (struct reg_set_data
));
1926 set
->next_insn_set
= INSN_REG_SET_LIST (insn
);
1927 INSN_REG_SET_LIST (insn
) = set
;
1931 /* Set up insn register uses for INSN and dependency context DEPS. */
1933 setup_insn_reg_uses (struct deps_desc
*deps
, rtx insn
)
1936 reg_set_iterator rsi
;
1938 struct reg_use_data
*use
, *use2
, *next
;
1939 struct deps_reg
*reg_last
;
1941 EXECUTE_IF_SET_IN_REG_SET (reg_pending_uses
, 0, i
, rsi
)
1943 if (i
< FIRST_PSEUDO_REGISTER
1944 && TEST_HARD_REG_BIT (ira_no_alloc_regs
, i
))
1947 if (find_regno_note (insn
, REG_DEAD
, i
) == NULL_RTX
1948 && ! REGNO_REG_SET_P (reg_pending_sets
, i
)
1949 && ! REGNO_REG_SET_P (reg_pending_clobbers
, i
))
1950 /* Ignore use which is not dying. */
1953 use
= create_insn_reg_use (i
, insn
);
1954 use
->next_regno_use
= use
;
1955 reg_last
= &deps
->reg_last
[i
];
1957 /* Create the cycle list of uses. */
1958 for (list
= reg_last
->uses
; list
; list
= XEXP (list
, 1))
1960 use2
= create_insn_reg_use (i
, XEXP (list
, 0));
1961 next
= use
->next_regno_use
;
1962 use
->next_regno_use
= use2
;
1963 use2
->next_regno_use
= next
;
1968 /* Register pressure info for the currently processed insn. */
1969 static struct reg_pressure_data reg_pressure_info
[N_REG_CLASSES
];
1971 /* Return TRUE if INSN has the use structure for REGNO. */
1973 insn_use_p (rtx insn
, int regno
)
1975 struct reg_use_data
*use
;
1977 for (use
= INSN_REG_USE_LIST (insn
); use
!= NULL
; use
= use
->next_insn_use
)
1978 if (use
->regno
== regno
)
1983 /* Update the register pressure info after birth of pseudo register REGNO
1984 in INSN. Arguments CLOBBER_P and UNUSED_P say correspondingly that
1985 the register is in clobber or unused after the insn. */
1987 mark_insn_pseudo_birth (rtx insn
, int regno
, bool clobber_p
, bool unused_p
)
1992 gcc_assert (regno
>= FIRST_PSEUDO_REGISTER
);
1993 cl
= sched_regno_pressure_class
[regno
];
1996 incr
= ira_reg_class_max_nregs
[cl
][PSEUDO_REGNO_MODE (regno
)];
1999 new_incr
= reg_pressure_info
[cl
].clobber_increase
+ incr
;
2000 reg_pressure_info
[cl
].clobber_increase
= new_incr
;
2004 new_incr
= reg_pressure_info
[cl
].unused_set_increase
+ incr
;
2005 reg_pressure_info
[cl
].unused_set_increase
= new_incr
;
2009 new_incr
= reg_pressure_info
[cl
].set_increase
+ incr
;
2010 reg_pressure_info
[cl
].set_increase
= new_incr
;
2011 if (! insn_use_p (insn
, regno
))
2012 reg_pressure_info
[cl
].change
+= incr
;
2013 create_insn_reg_set (regno
, insn
);
2015 gcc_assert (new_incr
< (1 << INCREASE_BITS
));
2019 /* Like mark_insn_pseudo_regno_birth except that NREGS saying how many
2020 hard registers involved in the birth. */
2022 mark_insn_hard_regno_birth (rtx insn
, int regno
, int nregs
,
2023 bool clobber_p
, bool unused_p
)
2026 int new_incr
, last
= regno
+ nregs
;
2028 while (regno
< last
)
2030 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
);
2031 if (! TEST_HARD_REG_BIT (ira_no_alloc_regs
, regno
))
2033 cl
= sched_regno_pressure_class
[regno
];
2038 new_incr
= reg_pressure_info
[cl
].clobber_increase
+ 1;
2039 reg_pressure_info
[cl
].clobber_increase
= new_incr
;
2043 new_incr
= reg_pressure_info
[cl
].unused_set_increase
+ 1;
2044 reg_pressure_info
[cl
].unused_set_increase
= new_incr
;
2048 new_incr
= reg_pressure_info
[cl
].set_increase
+ 1;
2049 reg_pressure_info
[cl
].set_increase
= new_incr
;
2050 if (! insn_use_p (insn
, regno
))
2051 reg_pressure_info
[cl
].change
+= 1;
2052 create_insn_reg_set (regno
, insn
);
2054 gcc_assert (new_incr
< (1 << INCREASE_BITS
));
2061 /* Update the register pressure info after birth of pseudo or hard
2062 register REG in INSN. Arguments CLOBBER_P and UNUSED_P say
2063 correspondingly that the register is in clobber or unused after the
2066 mark_insn_reg_birth (rtx insn
, rtx reg
, bool clobber_p
, bool unused_p
)
2070 if (GET_CODE (reg
) == SUBREG
)
2071 reg
= SUBREG_REG (reg
);
2076 regno
= REGNO (reg
);
2077 if (regno
< FIRST_PSEUDO_REGISTER
)
2078 mark_insn_hard_regno_birth (insn
, regno
,
2079 hard_regno_nregs
[regno
][GET_MODE (reg
)],
2080 clobber_p
, unused_p
);
2082 mark_insn_pseudo_birth (insn
, regno
, clobber_p
, unused_p
);
2085 /* Update the register pressure info after death of pseudo register
2088 mark_pseudo_death (int regno
)
2093 gcc_assert (regno
>= FIRST_PSEUDO_REGISTER
);
2094 cl
= sched_regno_pressure_class
[regno
];
2097 incr
= ira_reg_class_max_nregs
[cl
][PSEUDO_REGNO_MODE (regno
)];
2098 reg_pressure_info
[cl
].change
-= incr
;
2102 /* Like mark_pseudo_death except that NREGS saying how many hard
2103 registers involved in the death. */
2105 mark_hard_regno_death (int regno
, int nregs
)
2108 int last
= regno
+ nregs
;
2110 while (regno
< last
)
2112 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
);
2113 if (! TEST_HARD_REG_BIT (ira_no_alloc_regs
, regno
))
2115 cl
= sched_regno_pressure_class
[regno
];
2117 reg_pressure_info
[cl
].change
-= 1;
2123 /* Update the register pressure info after death of pseudo or hard
2126 mark_reg_death (rtx reg
)
2130 if (GET_CODE (reg
) == SUBREG
)
2131 reg
= SUBREG_REG (reg
);
2136 regno
= REGNO (reg
);
2137 if (regno
< FIRST_PSEUDO_REGISTER
)
2138 mark_hard_regno_death (regno
, hard_regno_nregs
[regno
][GET_MODE (reg
)]);
2140 mark_pseudo_death (regno
);
2143 /* Process SETTER of REG. DATA is an insn containing the setter. */
2145 mark_insn_reg_store (rtx reg
, const_rtx setter
, void *data
)
2147 if (setter
!= NULL_RTX
&& GET_CODE (setter
) != SET
)
2150 ((rtx
) data
, reg
, false,
2151 find_reg_note ((const_rtx
) data
, REG_UNUSED
, reg
) != NULL_RTX
);
2154 /* Like mark_insn_reg_store except notice just CLOBBERs; ignore SETs. */
2156 mark_insn_reg_clobber (rtx reg
, const_rtx setter
, void *data
)
2158 if (GET_CODE (setter
) == CLOBBER
)
2159 mark_insn_reg_birth ((rtx
) data
, reg
, true, false);
2162 /* Set up reg pressure info related to INSN. */
2164 init_insn_reg_pressure_info (rtx insn
)
2168 static struct reg_pressure_data
*pressure_info
;
2171 gcc_assert (sched_pressure
!= SCHED_PRESSURE_NONE
);
2173 if (! INSN_P (insn
))
2176 for (i
= 0; i
< ira_pressure_classes_num
; i
++)
2178 cl
= ira_pressure_classes
[i
];
2179 reg_pressure_info
[cl
].clobber_increase
= 0;
2180 reg_pressure_info
[cl
].set_increase
= 0;
2181 reg_pressure_info
[cl
].unused_set_increase
= 0;
2182 reg_pressure_info
[cl
].change
= 0;
2185 note_stores (PATTERN (insn
), mark_insn_reg_clobber
, insn
);
2187 note_stores (PATTERN (insn
), mark_insn_reg_store
, insn
);
2190 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
2191 if (REG_NOTE_KIND (link
) == REG_INC
)
2192 mark_insn_reg_store (XEXP (link
, 0), NULL_RTX
, insn
);
2195 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
2196 if (REG_NOTE_KIND (link
) == REG_DEAD
)
2197 mark_reg_death (XEXP (link
, 0));
2199 len
= sizeof (struct reg_pressure_data
) * ira_pressure_classes_num
;
2201 = INSN_REG_PRESSURE (insn
) = (struct reg_pressure_data
*) xmalloc (len
);
2202 if (sched_pressure
== SCHED_PRESSURE_WEIGHTED
)
2203 INSN_MAX_REG_PRESSURE (insn
) = (int *) xcalloc (ira_pressure_classes_num
2205 for (i
= 0; i
< ira_pressure_classes_num
; i
++)
2207 cl
= ira_pressure_classes
[i
];
2208 pressure_info
[i
].clobber_increase
2209 = reg_pressure_info
[cl
].clobber_increase
;
2210 pressure_info
[i
].set_increase
= reg_pressure_info
[cl
].set_increase
;
2211 pressure_info
[i
].unused_set_increase
2212 = reg_pressure_info
[cl
].unused_set_increase
;
2213 pressure_info
[i
].change
= reg_pressure_info
[cl
].change
;
2220 /* Internal variable for sched_analyze_[12] () functions.
2221 If it is nonzero, this means that sched_analyze_[12] looks
2222 at the most toplevel SET. */
2223 static bool can_start_lhs_rhs_p
;
2225 /* Extend reg info for the deps context DEPS given that
2226 we have just generated a register numbered REGNO. */
2228 extend_deps_reg_info (struct deps_desc
*deps
, int regno
)
2230 int max_regno
= regno
+ 1;
2232 gcc_assert (!reload_completed
);
2234 /* In a readonly context, it would not hurt to extend info,
2235 but it should not be needed. */
2236 if (reload_completed
&& deps
->readonly
)
2238 deps
->max_reg
= max_regno
;
2242 if (max_regno
> deps
->max_reg
)
2244 deps
->reg_last
= XRESIZEVEC (struct deps_reg
, deps
->reg_last
,
2246 memset (&deps
->reg_last
[deps
->max_reg
],
2247 0, (max_regno
- deps
->max_reg
)
2248 * sizeof (struct deps_reg
));
2249 deps
->max_reg
= max_regno
;
2253 /* Extends REG_INFO_P if needed. */
2255 maybe_extend_reg_info_p (void)
2257 /* Extend REG_INFO_P, if needed. */
2258 if ((unsigned int)max_regno
- 1 >= reg_info_p_size
)
2260 size_t new_reg_info_p_size
= max_regno
+ 128;
2262 gcc_assert (!reload_completed
&& sel_sched_p ());
2264 reg_info_p
= (struct reg_info_t
*) xrecalloc (reg_info_p
,
2265 new_reg_info_p_size
,
2267 sizeof (*reg_info_p
));
2268 reg_info_p_size
= new_reg_info_p_size
;
2272 /* Analyze a single reference to register (reg:MODE REGNO) in INSN.
2273 The type of the reference is specified by REF and can be SET,
2274 CLOBBER, PRE_DEC, POST_DEC, PRE_INC, POST_INC or USE. */
2277 sched_analyze_reg (struct deps_desc
*deps
, int regno
, enum machine_mode mode
,
2278 enum rtx_code ref
, rtx insn
)
2280 /* We could emit new pseudos in renaming. Extend the reg structures. */
2281 if (!reload_completed
&& sel_sched_p ()
2282 && (regno
>= max_reg_num () - 1 || regno
>= deps
->max_reg
))
2283 extend_deps_reg_info (deps
, regno
);
2285 maybe_extend_reg_info_p ();
2287 /* A hard reg in a wide mode may really be multiple registers.
2288 If so, mark all of them just like the first. */
2289 if (regno
< FIRST_PSEUDO_REGISTER
)
2291 int i
= hard_regno_nregs
[regno
][mode
];
2295 note_reg_set (regno
+ i
);
2297 else if (ref
== USE
)
2300 note_reg_use (regno
+ i
);
2305 note_reg_clobber (regno
+ i
);
2309 /* ??? Reload sometimes emits USEs and CLOBBERs of pseudos that
2310 it does not reload. Ignore these as they have served their
2312 else if (regno
>= deps
->max_reg
)
2314 enum rtx_code code
= GET_CODE (PATTERN (insn
));
2315 gcc_assert (code
== USE
|| code
== CLOBBER
);
2321 note_reg_set (regno
);
2322 else if (ref
== USE
)
2323 note_reg_use (regno
);
2325 note_reg_clobber (regno
);
2327 /* Pseudos that are REG_EQUIV to something may be replaced
2328 by that during reloading. We need only add dependencies for
2329 the address in the REG_EQUIV note. */
2330 if (!reload_completed
&& get_reg_known_equiv_p (regno
))
2332 rtx t
= get_reg_known_value (regno
);
2334 sched_analyze_2 (deps
, XEXP (t
, 0), insn
);
2337 /* Don't let it cross a call after scheduling if it doesn't
2338 already cross one. */
2339 if (REG_N_CALLS_CROSSED (regno
) == 0)
2341 if (!deps
->readonly
&& ref
== USE
&& !DEBUG_INSN_P (insn
))
2342 deps
->sched_before_next_call
2343 = alloc_INSN_LIST (insn
, deps
->sched_before_next_call
);
2345 add_dependence_list (insn
, deps
->last_function_call
, 1,
2351 /* Analyze a single SET, CLOBBER, PRE_DEC, POST_DEC, PRE_INC or POST_INC
2352 rtx, X, creating all dependencies generated by the write to the
2353 destination of X, and reads of everything mentioned. */
2356 sched_analyze_1 (struct deps_desc
*deps
, rtx x
, rtx insn
)
2358 rtx dest
= XEXP (x
, 0);
2359 enum rtx_code code
= GET_CODE (x
);
2360 bool cslr_p
= can_start_lhs_rhs_p
;
2362 can_start_lhs_rhs_p
= false;
2368 if (cslr_p
&& sched_deps_info
->start_lhs
)
2369 sched_deps_info
->start_lhs (dest
);
2371 if (GET_CODE (dest
) == PARALLEL
)
2375 for (i
= XVECLEN (dest
, 0) - 1; i
>= 0; i
--)
2376 if (XEXP (XVECEXP (dest
, 0, i
), 0) != 0)
2377 sched_analyze_1 (deps
,
2378 gen_rtx_CLOBBER (VOIDmode
,
2379 XEXP (XVECEXP (dest
, 0, i
), 0)),
2382 if (cslr_p
&& sched_deps_info
->finish_lhs
)
2383 sched_deps_info
->finish_lhs ();
2387 can_start_lhs_rhs_p
= cslr_p
;
2389 sched_analyze_2 (deps
, SET_SRC (x
), insn
);
2391 can_start_lhs_rhs_p
= false;
2397 while (GET_CODE (dest
) == STRICT_LOW_PART
|| GET_CODE (dest
) == SUBREG
2398 || GET_CODE (dest
) == ZERO_EXTRACT
)
2400 if (GET_CODE (dest
) == STRICT_LOW_PART
2401 || GET_CODE (dest
) == ZERO_EXTRACT
2402 || df_read_modify_subreg_p (dest
))
2404 /* These both read and modify the result. We must handle
2405 them as writes to get proper dependencies for following
2406 instructions. We must handle them as reads to get proper
2407 dependencies from this to previous instructions.
2408 Thus we need to call sched_analyze_2. */
2410 sched_analyze_2 (deps
, XEXP (dest
, 0), insn
);
2412 if (GET_CODE (dest
) == ZERO_EXTRACT
)
2414 /* The second and third arguments are values read by this insn. */
2415 sched_analyze_2 (deps
, XEXP (dest
, 1), insn
);
2416 sched_analyze_2 (deps
, XEXP (dest
, 2), insn
);
2418 dest
= XEXP (dest
, 0);
2423 int regno
= REGNO (dest
);
2424 enum machine_mode mode
= GET_MODE (dest
);
2426 sched_analyze_reg (deps
, regno
, mode
, code
, insn
);
2429 /* Treat all writes to a stack register as modifying the TOS. */
2430 if (regno
>= FIRST_STACK_REG
&& regno
<= LAST_STACK_REG
)
2432 /* Avoid analyzing the same register twice. */
2433 if (regno
!= FIRST_STACK_REG
)
2434 sched_analyze_reg (deps
, FIRST_STACK_REG
, mode
, code
, insn
);
2436 add_to_hard_reg_set (&implicit_reg_pending_uses
, mode
,
2441 else if (MEM_P (dest
))
2443 /* Writing memory. */
2446 if (sched_deps_info
->use_cselib
)
2448 enum machine_mode address_mode
= get_address_mode (dest
);
2450 t
= shallow_copy_rtx (dest
);
2451 cselib_lookup_from_insn (XEXP (t
, 0), address_mode
, 1,
2452 GET_MODE (t
), insn
);
2454 = cselib_subst_to_values_from_insn (XEXP (t
, 0), GET_MODE (t
),
2459 /* Pending lists can't get larger with a readonly context. */
2461 && ((deps
->pending_read_list_length
+ deps
->pending_write_list_length
)
2462 > MAX_PENDING_LIST_LENGTH
))
2464 /* Flush all pending reads and writes to prevent the pending lists
2465 from getting any larger. Insn scheduling runs too slowly when
2466 these lists get long. When compiling GCC with itself,
2467 this flush occurs 8 times for sparc, and 10 times for m88k using
2468 the default value of 32. */
2469 flush_pending_lists (deps
, insn
, false, true);
2473 rtx pending
, pending_mem
;
2475 pending
= deps
->pending_read_insns
;
2476 pending_mem
= deps
->pending_read_mems
;
2479 if (anti_dependence (XEXP (pending_mem
, 0), t
)
2480 && ! sched_insns_conditions_mutex_p (insn
, XEXP (pending
, 0)))
2481 note_mem_dep (t
, XEXP (pending_mem
, 0), XEXP (pending
, 0),
2484 pending
= XEXP (pending
, 1);
2485 pending_mem
= XEXP (pending_mem
, 1);
2488 pending
= deps
->pending_write_insns
;
2489 pending_mem
= deps
->pending_write_mems
;
2492 if (output_dependence (XEXP (pending_mem
, 0), t
)
2493 && ! sched_insns_conditions_mutex_p (insn
, XEXP (pending
, 0)))
2494 note_mem_dep (t
, XEXP (pending_mem
, 0), XEXP (pending
, 0),
2497 pending
= XEXP (pending
, 1);
2498 pending_mem
= XEXP (pending_mem
, 1);
2501 add_dependence_list (insn
, deps
->last_pending_memory_flush
, 1,
2503 add_dependence_list (insn
, deps
->pending_jump_insns
, 1,
2506 if (!deps
->readonly
)
2507 add_insn_mem_dependence (deps
, false, insn
, dest
);
2509 sched_analyze_2 (deps
, XEXP (dest
, 0), insn
);
2512 if (cslr_p
&& sched_deps_info
->finish_lhs
)
2513 sched_deps_info
->finish_lhs ();
2515 /* Analyze reads. */
2516 if (GET_CODE (x
) == SET
)
2518 can_start_lhs_rhs_p
= cslr_p
;
2520 sched_analyze_2 (deps
, SET_SRC (x
), insn
);
2522 can_start_lhs_rhs_p
= false;
2526 /* Analyze the uses of memory and registers in rtx X in INSN. */
2528 sched_analyze_2 (struct deps_desc
*deps
, rtx x
, rtx insn
)
2534 bool cslr_p
= can_start_lhs_rhs_p
;
2536 can_start_lhs_rhs_p
= false;
2542 if (cslr_p
&& sched_deps_info
->start_rhs
)
2543 sched_deps_info
->start_rhs (x
);
2545 code
= GET_CODE (x
);
2556 /* Ignore constants. */
2557 if (cslr_p
&& sched_deps_info
->finish_rhs
)
2558 sched_deps_info
->finish_rhs ();
2564 /* User of CC0 depends on immediately preceding insn. */
2565 SCHED_GROUP_P (insn
) = 1;
2566 /* Don't move CC0 setter to another block (it can set up the
2567 same flag for previous CC0 users which is safe). */
2568 CANT_MOVE (prev_nonnote_insn (insn
)) = 1;
2570 if (cslr_p
&& sched_deps_info
->finish_rhs
)
2571 sched_deps_info
->finish_rhs ();
2578 int regno
= REGNO (x
);
2579 enum machine_mode mode
= GET_MODE (x
);
2581 sched_analyze_reg (deps
, regno
, mode
, USE
, insn
);
2584 /* Treat all reads of a stack register as modifying the TOS. */
2585 if (regno
>= FIRST_STACK_REG
&& regno
<= LAST_STACK_REG
)
2587 /* Avoid analyzing the same register twice. */
2588 if (regno
!= FIRST_STACK_REG
)
2589 sched_analyze_reg (deps
, FIRST_STACK_REG
, mode
, USE
, insn
);
2590 sched_analyze_reg (deps
, FIRST_STACK_REG
, mode
, SET
, insn
);
2594 if (cslr_p
&& sched_deps_info
->finish_rhs
)
2595 sched_deps_info
->finish_rhs ();
2602 /* Reading memory. */
2604 rtx pending
, pending_mem
;
2607 if (sched_deps_info
->use_cselib
)
2609 enum machine_mode address_mode
= get_address_mode (t
);
2611 t
= shallow_copy_rtx (t
);
2612 cselib_lookup_from_insn (XEXP (t
, 0), address_mode
, 1,
2613 GET_MODE (t
), insn
);
2615 = cselib_subst_to_values_from_insn (XEXP (t
, 0), GET_MODE (t
),
2619 if (!DEBUG_INSN_P (insn
))
2622 pending
= deps
->pending_read_insns
;
2623 pending_mem
= deps
->pending_read_mems
;
2626 if (read_dependence (XEXP (pending_mem
, 0), t
)
2627 && ! sched_insns_conditions_mutex_p (insn
,
2629 note_mem_dep (t
, XEXP (pending_mem
, 0), XEXP (pending
, 0),
2632 pending
= XEXP (pending
, 1);
2633 pending_mem
= XEXP (pending_mem
, 1);
2636 pending
= deps
->pending_write_insns
;
2637 pending_mem
= deps
->pending_write_mems
;
2640 if (true_dependence (XEXP (pending_mem
, 0), VOIDmode
, t
)
2641 && ! sched_insns_conditions_mutex_p (insn
,
2643 note_mem_dep (t
, XEXP (pending_mem
, 0), XEXP (pending
, 0),
2644 sched_deps_info
->generate_spec_deps
2645 ? BEGIN_DATA
| DEP_TRUE
: DEP_TRUE
);
2647 pending
= XEXP (pending
, 1);
2648 pending_mem
= XEXP (pending_mem
, 1);
2651 for (u
= deps
->last_pending_memory_flush
; u
; u
= XEXP (u
, 1))
2652 add_dependence (insn
, XEXP (u
, 0), REG_DEP_ANTI
);
2654 for (u
= deps
->pending_jump_insns
; u
; u
= XEXP (u
, 1))
2655 if (deps_may_trap_p (x
))
2657 if ((sched_deps_info
->generate_spec_deps
)
2658 && sel_sched_p () && (spec_info
->mask
& BEGIN_CONTROL
))
2660 ds_t ds
= set_dep_weak (DEP_ANTI
, BEGIN_CONTROL
,
2663 note_dep (XEXP (u
, 0), ds
);
2666 add_dependence (insn
, XEXP (u
, 0), REG_DEP_CONTROL
);
2670 /* Always add these dependencies to pending_reads, since
2671 this insn may be followed by a write. */
2672 if (!deps
->readonly
)
2673 add_insn_mem_dependence (deps
, true, insn
, x
);
2675 sched_analyze_2 (deps
, XEXP (x
, 0), insn
);
2677 if (cslr_p
&& sched_deps_info
->finish_rhs
)
2678 sched_deps_info
->finish_rhs ();
2683 /* Force pending stores to memory in case a trap handler needs them. */
2685 flush_pending_lists (deps
, insn
, true, false);
2689 if (PREFETCH_SCHEDULE_BARRIER_P (x
))
2690 reg_pending_barrier
= TRUE_BARRIER
;
2693 case UNSPEC_VOLATILE
:
2694 flush_pending_lists (deps
, insn
, true, true);
2700 /* Traditional and volatile asm instructions must be considered to use
2701 and clobber all hard registers, all pseudo-registers and all of
2702 memory. So must TRAP_IF and UNSPEC_VOLATILE operations.
2704 Consider for instance a volatile asm that changes the fpu rounding
2705 mode. An insn should not be moved across this even if it only uses
2706 pseudo-regs because it might give an incorrectly rounded result. */
2707 if (code
!= ASM_OPERANDS
|| MEM_VOLATILE_P (x
))
2708 reg_pending_barrier
= TRUE_BARRIER
;
2710 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
2711 We can not just fall through here since then we would be confused
2712 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
2713 traditional asms unlike their normal usage. */
2715 if (code
== ASM_OPERANDS
)
2717 for (j
= 0; j
< ASM_OPERANDS_INPUT_LENGTH (x
); j
++)
2718 sched_analyze_2 (deps
, ASM_OPERANDS_INPUT (x
, j
), insn
);
2720 if (cslr_p
&& sched_deps_info
->finish_rhs
)
2721 sched_deps_info
->finish_rhs ();
2732 /* These both read and modify the result. We must handle them as writes
2733 to get proper dependencies for following instructions. We must handle
2734 them as reads to get proper dependencies from this to previous
2735 instructions. Thus we need to pass them to both sched_analyze_1
2736 and sched_analyze_2. We must call sched_analyze_2 first in order
2737 to get the proper antecedent for the read. */
2738 sched_analyze_2 (deps
, XEXP (x
, 0), insn
);
2739 sched_analyze_1 (deps
, x
, insn
);
2741 if (cslr_p
&& sched_deps_info
->finish_rhs
)
2742 sched_deps_info
->finish_rhs ();
2748 /* op0 = op0 + op1 */
2749 sched_analyze_2 (deps
, XEXP (x
, 0), insn
);
2750 sched_analyze_2 (deps
, XEXP (x
, 1), insn
);
2751 sched_analyze_1 (deps
, x
, insn
);
2753 if (cslr_p
&& sched_deps_info
->finish_rhs
)
2754 sched_deps_info
->finish_rhs ();
2762 /* Other cases: walk the insn. */
2763 fmt
= GET_RTX_FORMAT (code
);
2764 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2767 sched_analyze_2 (deps
, XEXP (x
, i
), insn
);
2768 else if (fmt
[i
] == 'E')
2769 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2770 sched_analyze_2 (deps
, XVECEXP (x
, i
, j
), insn
);
2773 if (cslr_p
&& sched_deps_info
->finish_rhs
)
2774 sched_deps_info
->finish_rhs ();
2777 /* Analyze an INSN with pattern X to find all dependencies. */
2779 sched_analyze_insn (struct deps_desc
*deps
, rtx x
, rtx insn
)
2781 RTX_CODE code
= GET_CODE (x
);
2784 reg_set_iterator rsi
;
2786 if (! reload_completed
)
2790 extract_insn (insn
);
2791 preprocess_constraints ();
2792 ira_implicitly_set_insn_hard_regs (&temp
);
2793 AND_COMPL_HARD_REG_SET (temp
, ira_no_alloc_regs
);
2794 IOR_HARD_REG_SET (implicit_reg_pending_clobbers
, temp
);
2797 can_start_lhs_rhs_p
= (NONJUMP_INSN_P (insn
)
2801 /* Avoid moving trapping instructions across function calls that might
2802 not always return. */
2803 add_dependence_list (insn
, deps
->last_function_call_may_noreturn
,
2806 /* We must avoid creating a situation in which two successors of the
2807 current block have different unwind info after scheduling. If at any
2808 point the two paths re-join this leads to incorrect unwind info. */
2809 /* ??? There are certain situations involving a forced frame pointer in
2810 which, with extra effort, we could fix up the unwind info at a later
2811 CFG join. However, it seems better to notice these cases earlier
2812 during prologue generation and avoid marking the frame pointer setup
2813 as frame-related at all. */
2814 if (RTX_FRAME_RELATED_P (insn
))
2816 /* Make sure prologue insn is scheduled before next jump. */
2817 deps
->sched_before_next_jump
2818 = alloc_INSN_LIST (insn
, deps
->sched_before_next_jump
);
2820 /* Make sure epilogue insn is scheduled after preceding jumps. */
2821 add_dependence_list (insn
, deps
->pending_jump_insns
, 1, REG_DEP_ANTI
);
2824 if (code
== COND_EXEC
)
2826 sched_analyze_2 (deps
, COND_EXEC_TEST (x
), insn
);
2828 /* ??? Should be recording conditions so we reduce the number of
2829 false dependencies. */
2830 x
= COND_EXEC_CODE (x
);
2831 code
= GET_CODE (x
);
2833 if (code
== SET
|| code
== CLOBBER
)
2835 sched_analyze_1 (deps
, x
, insn
);
2837 /* Bare clobber insns are used for letting life analysis, reg-stack
2838 and others know that a value is dead. Depend on the last call
2839 instruction so that reg-stack won't get confused. */
2840 if (code
== CLOBBER
)
2841 add_dependence_list (insn
, deps
->last_function_call
, 1,
2844 else if (code
== PARALLEL
)
2846 for (i
= XVECLEN (x
, 0); i
--;)
2848 rtx sub
= XVECEXP (x
, 0, i
);
2849 code
= GET_CODE (sub
);
2851 if (code
== COND_EXEC
)
2853 sched_analyze_2 (deps
, COND_EXEC_TEST (sub
), insn
);
2854 sub
= COND_EXEC_CODE (sub
);
2855 code
= GET_CODE (sub
);
2857 if (code
== SET
|| code
== CLOBBER
)
2858 sched_analyze_1 (deps
, sub
, insn
);
2860 sched_analyze_2 (deps
, sub
, insn
);
2864 sched_analyze_2 (deps
, x
, insn
);
2866 /* Mark registers CLOBBERED or used by called function. */
2869 for (link
= CALL_INSN_FUNCTION_USAGE (insn
); link
; link
= XEXP (link
, 1))
2871 if (GET_CODE (XEXP (link
, 0)) == CLOBBER
)
2872 sched_analyze_1 (deps
, XEXP (link
, 0), insn
);
2873 else if (GET_CODE (XEXP (link
, 0)) != SET
)
2874 sched_analyze_2 (deps
, XEXP (link
, 0), insn
);
2876 /* Don't schedule anything after a tail call, tail call needs
2877 to use at least all call-saved registers. */
2878 if (SIBLING_CALL_P (insn
))
2879 reg_pending_barrier
= TRUE_BARRIER
;
2880 else if (find_reg_note (insn
, REG_SETJMP
, NULL
))
2881 reg_pending_barrier
= MOVE_BARRIER
;
2887 next
= next_nonnote_nondebug_insn (insn
);
2888 if (next
&& BARRIER_P (next
))
2889 reg_pending_barrier
= MOVE_BARRIER
;
2892 rtx pending
, pending_mem
;
2894 if (sched_deps_info
->compute_jump_reg_dependencies
)
2896 (*sched_deps_info
->compute_jump_reg_dependencies
)
2897 (insn
, reg_pending_control_uses
);
2899 /* Make latency of jump equal to 0 by using anti-dependence. */
2900 EXECUTE_IF_SET_IN_REG_SET (reg_pending_control_uses
, 0, i
, rsi
)
2902 struct deps_reg
*reg_last
= &deps
->reg_last
[i
];
2903 add_dependence_list (insn
, reg_last
->sets
, 0, REG_DEP_ANTI
);
2904 add_dependence_list (insn
, reg_last
->implicit_sets
,
2906 add_dependence_list (insn
, reg_last
->clobbers
, 0,
2911 /* All memory writes and volatile reads must happen before the
2912 jump. Non-volatile reads must happen before the jump iff
2913 the result is needed by the above register used mask. */
2915 pending
= deps
->pending_write_insns
;
2916 pending_mem
= deps
->pending_write_mems
;
2919 if (! sched_insns_conditions_mutex_p (insn
, XEXP (pending
, 0)))
2920 add_dependence (insn
, XEXP (pending
, 0), REG_DEP_OUTPUT
);
2921 pending
= XEXP (pending
, 1);
2922 pending_mem
= XEXP (pending_mem
, 1);
2925 pending
= deps
->pending_read_insns
;
2926 pending_mem
= deps
->pending_read_mems
;
2929 if (MEM_VOLATILE_P (XEXP (pending_mem
, 0))
2930 && ! sched_insns_conditions_mutex_p (insn
, XEXP (pending
, 0)))
2931 add_dependence (insn
, XEXP (pending
, 0), REG_DEP_OUTPUT
);
2932 pending
= XEXP (pending
, 1);
2933 pending_mem
= XEXP (pending_mem
, 1);
2936 add_dependence_list (insn
, deps
->last_pending_memory_flush
, 1,
2938 add_dependence_list (insn
, deps
->pending_jump_insns
, 1,
2943 /* If this instruction can throw an exception, then moving it changes
2944 where block boundaries fall. This is mighty confusing elsewhere.
2945 Therefore, prevent such an instruction from being moved. Same for
2946 non-jump instructions that define block boundaries.
2947 ??? Unclear whether this is still necessary in EBB mode. If not,
2948 add_branch_dependences should be adjusted for RGN mode instead. */
2949 if (((CALL_P (insn
) || JUMP_P (insn
)) && can_throw_internal (insn
))
2950 || (NONJUMP_INSN_P (insn
) && control_flow_insn_p (insn
)))
2951 reg_pending_barrier
= MOVE_BARRIER
;
2953 if (sched_pressure
!= SCHED_PRESSURE_NONE
)
2955 setup_insn_reg_uses (deps
, insn
);
2956 init_insn_reg_pressure_info (insn
);
2959 /* Add register dependencies for insn. */
2960 if (DEBUG_INSN_P (insn
))
2962 rtx prev
= deps
->last_debug_insn
;
2965 if (!deps
->readonly
)
2966 deps
->last_debug_insn
= insn
;
2969 add_dependence (insn
, prev
, REG_DEP_ANTI
);
2971 add_dependence_list (insn
, deps
->last_function_call
, 1,
2974 for (u
= deps
->last_pending_memory_flush
; u
; u
= XEXP (u
, 1))
2975 if (!sel_sched_p ())
2976 add_dependence (insn
, XEXP (u
, 0), REG_DEP_ANTI
);
2978 EXECUTE_IF_SET_IN_REG_SET (reg_pending_uses
, 0, i
, rsi
)
2980 struct deps_reg
*reg_last
= &deps
->reg_last
[i
];
2981 add_dependence_list (insn
, reg_last
->sets
, 1, REG_DEP_ANTI
);
2982 /* There's no point in making REG_DEP_CONTROL dependencies for
2984 add_dependence_list (insn
, reg_last
->clobbers
, 1, REG_DEP_ANTI
);
2986 if (!deps
->readonly
)
2987 reg_last
->uses
= alloc_INSN_LIST (insn
, reg_last
->uses
);
2989 CLEAR_REG_SET (reg_pending_uses
);
2991 /* Quite often, a debug insn will refer to stuff in the
2992 previous instruction, but the reason we want this
2993 dependency here is to make sure the scheduler doesn't
2994 gratuitously move a debug insn ahead. This could dirty
2995 DF flags and cause additional analysis that wouldn't have
2996 occurred in compilation without debug insns, and such
2997 additional analysis can modify the generated code. */
2998 prev
= PREV_INSN (insn
);
3000 if (prev
&& NONDEBUG_INSN_P (prev
))
3001 add_dependence (insn
, prev
, REG_DEP_ANTI
);
3005 regset_head set_or_clobbered
;
3007 EXECUTE_IF_SET_IN_REG_SET (reg_pending_uses
, 0, i
, rsi
)
3009 struct deps_reg
*reg_last
= &deps
->reg_last
[i
];
3010 add_dependence_list (insn
, reg_last
->sets
, 0, REG_DEP_TRUE
);
3011 add_dependence_list (insn
, reg_last
->implicit_sets
, 0, REG_DEP_ANTI
);
3012 add_dependence_list (insn
, reg_last
->clobbers
, 0, REG_DEP_TRUE
);
3014 if (!deps
->readonly
)
3016 reg_last
->uses
= alloc_INSN_LIST (insn
, reg_last
->uses
);
3017 reg_last
->uses_length
++;
3021 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
3022 if (TEST_HARD_REG_BIT (implicit_reg_pending_uses
, i
))
3024 struct deps_reg
*reg_last
= &deps
->reg_last
[i
];
3025 add_dependence_list (insn
, reg_last
->sets
, 0, REG_DEP_TRUE
);
3026 add_dependence_list (insn
, reg_last
->implicit_sets
, 0,
3028 add_dependence_list (insn
, reg_last
->clobbers
, 0, REG_DEP_TRUE
);
3030 if (!deps
->readonly
)
3032 reg_last
->uses
= alloc_INSN_LIST (insn
, reg_last
->uses
);
3033 reg_last
->uses_length
++;
3037 if (targetm
.sched
.exposed_pipeline
)
3039 INIT_REG_SET (&set_or_clobbered
);
3040 bitmap_ior (&set_or_clobbered
, reg_pending_clobbers
,
3042 EXECUTE_IF_SET_IN_REG_SET (&set_or_clobbered
, 0, i
, rsi
)
3044 struct deps_reg
*reg_last
= &deps
->reg_last
[i
];
3046 for (list
= reg_last
->uses
; list
; list
= XEXP (list
, 1))
3048 rtx other
= XEXP (list
, 0);
3049 if (INSN_CACHED_COND (other
) != const_true_rtx
3050 && refers_to_regno_p (i
, i
+ 1, INSN_CACHED_COND (other
), NULL
))
3051 INSN_CACHED_COND (other
) = const_true_rtx
;
3056 /* If the current insn is conditional, we can't free any
3058 if (sched_has_condition_p (insn
))
3060 EXECUTE_IF_SET_IN_REG_SET (reg_pending_clobbers
, 0, i
, rsi
)
3062 struct deps_reg
*reg_last
= &deps
->reg_last
[i
];
3063 add_dependence_list (insn
, reg_last
->sets
, 0, REG_DEP_OUTPUT
);
3064 add_dependence_list (insn
, reg_last
->implicit_sets
, 0,
3066 add_dependence_list (insn
, reg_last
->uses
, 0, REG_DEP_ANTI
);
3067 add_dependence_list (insn
, reg_last
->control_uses
, 0,
3070 if (!deps
->readonly
)
3073 = alloc_INSN_LIST (insn
, reg_last
->clobbers
);
3074 reg_last
->clobbers_length
++;
3077 EXECUTE_IF_SET_IN_REG_SET (reg_pending_sets
, 0, i
, rsi
)
3079 struct deps_reg
*reg_last
= &deps
->reg_last
[i
];
3080 add_dependence_list (insn
, reg_last
->sets
, 0, REG_DEP_OUTPUT
);
3081 add_dependence_list (insn
, reg_last
->implicit_sets
, 0,
3083 add_dependence_list (insn
, reg_last
->clobbers
, 0, REG_DEP_OUTPUT
);
3084 add_dependence_list (insn
, reg_last
->uses
, 0, REG_DEP_ANTI
);
3085 add_dependence_list (insn
, reg_last
->control_uses
, 0,
3088 if (!deps
->readonly
)
3089 reg_last
->sets
= alloc_INSN_LIST (insn
, reg_last
->sets
);
3094 EXECUTE_IF_SET_IN_REG_SET (reg_pending_clobbers
, 0, i
, rsi
)
3096 struct deps_reg
*reg_last
= &deps
->reg_last
[i
];
3097 if (reg_last
->uses_length
> MAX_PENDING_LIST_LENGTH
3098 || reg_last
->clobbers_length
> MAX_PENDING_LIST_LENGTH
)
3100 add_dependence_list_and_free (deps
, insn
, ®_last
->sets
, 0,
3102 add_dependence_list_and_free (deps
, insn
,
3103 ®_last
->implicit_sets
, 0,
3105 add_dependence_list_and_free (deps
, insn
, ®_last
->uses
, 0,
3107 add_dependence_list_and_free (deps
, insn
,
3108 ®_last
->control_uses
, 0,
3110 add_dependence_list_and_free
3111 (deps
, insn
, ®_last
->clobbers
, 0, REG_DEP_OUTPUT
);
3113 if (!deps
->readonly
)
3115 reg_last
->sets
= alloc_INSN_LIST (insn
, reg_last
->sets
);
3116 reg_last
->clobbers_length
= 0;
3117 reg_last
->uses_length
= 0;
3122 add_dependence_list (insn
, reg_last
->sets
, 0, REG_DEP_OUTPUT
);
3123 add_dependence_list (insn
, reg_last
->implicit_sets
, 0,
3125 add_dependence_list (insn
, reg_last
->uses
, 0, REG_DEP_ANTI
);
3126 add_dependence_list (insn
, reg_last
->control_uses
, 0,
3130 if (!deps
->readonly
)
3132 reg_last
->clobbers_length
++;
3134 = alloc_INSN_LIST (insn
, reg_last
->clobbers
);
3137 EXECUTE_IF_SET_IN_REG_SET (reg_pending_sets
, 0, i
, rsi
)
3139 struct deps_reg
*reg_last
= &deps
->reg_last
[i
];
3141 add_dependence_list_and_free (deps
, insn
, ®_last
->sets
, 0,
3143 add_dependence_list_and_free (deps
, insn
,
3144 ®_last
->implicit_sets
,
3146 add_dependence_list_and_free (deps
, insn
, ®_last
->clobbers
, 0,
3148 add_dependence_list_and_free (deps
, insn
, ®_last
->uses
, 0,
3150 add_dependence_list (insn
, reg_last
->control_uses
, 0,
3153 if (!deps
->readonly
)
3155 reg_last
->sets
= alloc_INSN_LIST (insn
, reg_last
->sets
);
3156 reg_last
->uses_length
= 0;
3157 reg_last
->clobbers_length
= 0;
3161 if (!deps
->readonly
)
3163 EXECUTE_IF_SET_IN_REG_SET (reg_pending_control_uses
, 0, i
, rsi
)
3165 struct deps_reg
*reg_last
= &deps
->reg_last
[i
];
3166 reg_last
->control_uses
3167 = alloc_INSN_LIST (insn
, reg_last
->control_uses
);
3172 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
3173 if (TEST_HARD_REG_BIT (implicit_reg_pending_clobbers
, i
))
3175 struct deps_reg
*reg_last
= &deps
->reg_last
[i
];
3176 add_dependence_list (insn
, reg_last
->sets
, 0, REG_DEP_ANTI
);
3177 add_dependence_list (insn
, reg_last
->clobbers
, 0, REG_DEP_ANTI
);
3178 add_dependence_list (insn
, reg_last
->uses
, 0, REG_DEP_ANTI
);
3179 add_dependence_list (insn
, reg_last
->control_uses
, 0, REG_DEP_ANTI
);
3181 if (!deps
->readonly
)
3182 reg_last
->implicit_sets
3183 = alloc_INSN_LIST (insn
, reg_last
->implicit_sets
);
3186 if (!deps
->readonly
)
3188 IOR_REG_SET (&deps
->reg_last_in_use
, reg_pending_uses
);
3189 IOR_REG_SET (&deps
->reg_last_in_use
, reg_pending_clobbers
);
3190 IOR_REG_SET (&deps
->reg_last_in_use
, reg_pending_sets
);
3191 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
3192 if (TEST_HARD_REG_BIT (implicit_reg_pending_uses
, i
)
3193 || TEST_HARD_REG_BIT (implicit_reg_pending_clobbers
, i
))
3194 SET_REGNO_REG_SET (&deps
->reg_last_in_use
, i
);
3196 /* Set up the pending barrier found. */
3197 deps
->last_reg_pending_barrier
= reg_pending_barrier
;
3200 CLEAR_REG_SET (reg_pending_uses
);
3201 CLEAR_REG_SET (reg_pending_clobbers
);
3202 CLEAR_REG_SET (reg_pending_sets
);
3203 CLEAR_REG_SET (reg_pending_control_uses
);
3204 CLEAR_HARD_REG_SET (implicit_reg_pending_clobbers
);
3205 CLEAR_HARD_REG_SET (implicit_reg_pending_uses
);
3207 /* Add dependencies if a scheduling barrier was found. */
3208 if (reg_pending_barrier
)
3210 /* In the case of barrier the most added dependencies are not
3211 real, so we use anti-dependence here. */
3212 if (sched_has_condition_p (insn
))
3214 EXECUTE_IF_SET_IN_REG_SET (&deps
->reg_last_in_use
, 0, i
, rsi
)
3216 struct deps_reg
*reg_last
= &deps
->reg_last
[i
];
3217 add_dependence_list (insn
, reg_last
->uses
, 0, REG_DEP_ANTI
);
3218 add_dependence_list (insn
, reg_last
->sets
, 0,
3219 reg_pending_barrier
== TRUE_BARRIER
3220 ? REG_DEP_TRUE
: REG_DEP_ANTI
);
3221 add_dependence_list (insn
, reg_last
->implicit_sets
, 0,
3223 add_dependence_list (insn
, reg_last
->clobbers
, 0,
3224 reg_pending_barrier
== TRUE_BARRIER
3225 ? REG_DEP_TRUE
: REG_DEP_ANTI
);
3230 EXECUTE_IF_SET_IN_REG_SET (&deps
->reg_last_in_use
, 0, i
, rsi
)
3232 struct deps_reg
*reg_last
= &deps
->reg_last
[i
];
3233 add_dependence_list_and_free (deps
, insn
, ®_last
->uses
, 0,
3235 add_dependence_list_and_free (deps
, insn
,
3236 ®_last
->control_uses
, 0,
3238 add_dependence_list_and_free (deps
, insn
, ®_last
->sets
, 0,
3239 reg_pending_barrier
== TRUE_BARRIER
3240 ? REG_DEP_TRUE
: REG_DEP_ANTI
);
3241 add_dependence_list_and_free (deps
, insn
,
3242 ®_last
->implicit_sets
, 0,
3244 add_dependence_list_and_free (deps
, insn
, ®_last
->clobbers
, 0,
3245 reg_pending_barrier
== TRUE_BARRIER
3246 ? REG_DEP_TRUE
: REG_DEP_ANTI
);
3248 if (!deps
->readonly
)
3250 reg_last
->uses_length
= 0;
3251 reg_last
->clobbers_length
= 0;
3256 if (!deps
->readonly
)
3257 for (i
= 0; i
< (unsigned)deps
->max_reg
; i
++)
3259 struct deps_reg
*reg_last
= &deps
->reg_last
[i
];
3260 reg_last
->sets
= alloc_INSN_LIST (insn
, reg_last
->sets
);
3261 SET_REGNO_REG_SET (&deps
->reg_last_in_use
, i
);
3264 /* Flush pending lists on jumps, but not on speculative checks. */
3265 if (JUMP_P (insn
) && !(sel_sched_p ()
3266 && sel_insn_is_speculation_check (insn
)))
3267 flush_pending_lists (deps
, insn
, true, true);
3269 reg_pending_barrier
= NOT_A_BARRIER
;
3272 /* If a post-call group is still open, see if it should remain so.
3273 This insn must be a simple move of a hard reg to a pseudo or
3276 We must avoid moving these insns for correctness on targets
3277 with small register classes, and for special registers like
3278 PIC_OFFSET_TABLE_REGNUM. For simplicity, extend this to all
3279 hard regs for all targets. */
3281 if (deps
->in_post_call_group_p
)
3283 rtx tmp
, set
= single_set (insn
);
3284 int src_regno
, dest_regno
;
3288 if (DEBUG_INSN_P (insn
))
3289 /* We don't want to mark debug insns as part of the same
3290 sched group. We know they really aren't, but if we use
3291 debug insns to tell that a call group is over, we'll
3292 get different code if debug insns are not there and
3293 instructions that follow seem like they should be part
3296 Also, if we did, chain_to_prev_insn would move the
3297 deps of the debug insn to the call insn, modifying
3298 non-debug post-dependency counts of the debug insn
3299 dependencies and otherwise messing with the scheduling
3302 Instead, let such debug insns be scheduled freely, but
3303 keep the call group open in case there are insns that
3304 should be part of it afterwards. Since we grant debug
3305 insns higher priority than even sched group insns, it
3306 will all turn out all right. */
3307 goto debug_dont_end_call_group
;
3309 goto end_call_group
;
3312 tmp
= SET_DEST (set
);
3313 if (GET_CODE (tmp
) == SUBREG
)
3314 tmp
= SUBREG_REG (tmp
);
3316 dest_regno
= REGNO (tmp
);
3318 goto end_call_group
;
3320 tmp
= SET_SRC (set
);
3321 if (GET_CODE (tmp
) == SUBREG
)
3322 tmp
= SUBREG_REG (tmp
);
3323 if ((GET_CODE (tmp
) == PLUS
3324 || GET_CODE (tmp
) == MINUS
)
3325 && REG_P (XEXP (tmp
, 0))
3326 && REGNO (XEXP (tmp
, 0)) == STACK_POINTER_REGNUM
3327 && dest_regno
== STACK_POINTER_REGNUM
)
3328 src_regno
= STACK_POINTER_REGNUM
;
3329 else if (REG_P (tmp
))
3330 src_regno
= REGNO (tmp
);
3332 goto end_call_group
;
3334 if (src_regno
< FIRST_PSEUDO_REGISTER
3335 || dest_regno
< FIRST_PSEUDO_REGISTER
)
3338 && deps
->in_post_call_group_p
== post_call_initial
)
3339 deps
->in_post_call_group_p
= post_call
;
3341 if (!sel_sched_p () || sched_emulate_haifa_p
)
3343 SCHED_GROUP_P (insn
) = 1;
3344 CANT_MOVE (insn
) = 1;
3350 if (!deps
->readonly
)
3351 deps
->in_post_call_group_p
= not_post_call
;
3355 debug_dont_end_call_group
:
3356 if ((current_sched_info
->flags
& DO_SPECULATION
)
3357 && !sched_insn_is_legitimate_for_speculation_p (insn
, 0))
3358 /* INSN has an internal dependency (e.g. r14 = [r14]) and thus cannot
3362 sel_mark_hard_insn (insn
);
3365 sd_iterator_def sd_it
;
3368 for (sd_it
= sd_iterator_start (insn
, SD_LIST_SPEC_BACK
);
3369 sd_iterator_cond (&sd_it
, &dep
);)
3370 change_spec_dep_to_hard (sd_it
);
3375 /* Return TRUE if INSN might not always return normally (e.g. call exit,
3376 longjmp, loop forever, ...). */
3378 call_may_noreturn_p (rtx insn
)
3382 /* const or pure calls that aren't looping will always return. */
3383 if (RTL_CONST_OR_PURE_CALL_P (insn
)
3384 && !RTL_LOOPING_CONST_OR_PURE_CALL_P (insn
))
3387 call
= PATTERN (insn
);
3388 if (GET_CODE (call
) == PARALLEL
)
3389 call
= XVECEXP (call
, 0, 0);
3390 if (GET_CODE (call
) == SET
)
3391 call
= SET_SRC (call
);
3392 if (GET_CODE (call
) == CALL
3393 && MEM_P (XEXP (call
, 0))
3394 && GET_CODE (XEXP (XEXP (call
, 0), 0)) == SYMBOL_REF
)
3396 rtx symbol
= XEXP (XEXP (call
, 0), 0);
3397 if (SYMBOL_REF_DECL (symbol
)
3398 && TREE_CODE (SYMBOL_REF_DECL (symbol
)) == FUNCTION_DECL
)
3400 if (DECL_BUILT_IN_CLASS (SYMBOL_REF_DECL (symbol
))
3402 switch (DECL_FUNCTION_CODE (SYMBOL_REF_DECL (symbol
)))
3405 case BUILT_IN_BCOPY
:
3406 case BUILT_IN_BZERO
:
3407 case BUILT_IN_INDEX
:
3408 case BUILT_IN_MEMCHR
:
3409 case BUILT_IN_MEMCMP
:
3410 case BUILT_IN_MEMCPY
:
3411 case BUILT_IN_MEMMOVE
:
3412 case BUILT_IN_MEMPCPY
:
3413 case BUILT_IN_MEMSET
:
3414 case BUILT_IN_RINDEX
:
3415 case BUILT_IN_STPCPY
:
3416 case BUILT_IN_STPNCPY
:
3417 case BUILT_IN_STRCAT
:
3418 case BUILT_IN_STRCHR
:
3419 case BUILT_IN_STRCMP
:
3420 case BUILT_IN_STRCPY
:
3421 case BUILT_IN_STRCSPN
:
3422 case BUILT_IN_STRLEN
:
3423 case BUILT_IN_STRNCAT
:
3424 case BUILT_IN_STRNCMP
:
3425 case BUILT_IN_STRNCPY
:
3426 case BUILT_IN_STRPBRK
:
3427 case BUILT_IN_STRRCHR
:
3428 case BUILT_IN_STRSPN
:
3429 case BUILT_IN_STRSTR
:
3430 /* Assume certain string/memory builtins always return. */
3438 /* For all other calls assume that they might not always return. */
3442 /* Return true if INSN should be made dependent on the previous instruction
3443 group, and if all INSN's dependencies should be moved to the first
3444 instruction of that group. */
3447 chain_to_prev_insn_p (rtx insn
)
3451 /* INSN forms a group with the previous instruction. */
3452 if (SCHED_GROUP_P (insn
))
3455 /* If the previous instruction clobbers a register R and this one sets
3456 part of R, the clobber was added specifically to help us track the
3457 liveness of R. There's no point scheduling the clobber and leaving
3458 INSN behind, especially if we move the clobber to another block. */
3459 prev
= prev_nonnote_nondebug_insn (insn
);
3462 && BLOCK_FOR_INSN (prev
) == BLOCK_FOR_INSN (insn
)
3463 && GET_CODE (PATTERN (prev
)) == CLOBBER
)
3465 x
= XEXP (PATTERN (prev
), 0);
3466 if (set_of (x
, insn
))
3473 /* Analyze INSN with DEPS as a context. */
3475 deps_analyze_insn (struct deps_desc
*deps
, rtx insn
)
3477 if (sched_deps_info
->start_insn
)
3478 sched_deps_info
->start_insn (insn
);
3480 /* Record the condition for this insn. */
3481 if (NONDEBUG_INSN_P (insn
))
3484 sched_get_condition_with_rev (insn
, NULL
);
3485 t
= INSN_CACHED_COND (insn
);
3486 INSN_COND_DEPS (insn
) = NULL_RTX
;
3487 if (reload_completed
3488 && (current_sched_info
->flags
& DO_PREDICATION
)
3490 && REG_P (XEXP (t
, 0))
3491 && CONSTANT_P (XEXP (t
, 1)))
3497 nregs
= hard_regno_nregs
[regno
][GET_MODE (t
)];
3501 struct deps_reg
*reg_last
= &deps
->reg_last
[regno
+ nregs
];
3502 t
= concat_INSN_LIST (reg_last
->sets
, t
);
3503 t
= concat_INSN_LIST (reg_last
->clobbers
, t
);
3504 t
= concat_INSN_LIST (reg_last
->implicit_sets
, t
);
3506 INSN_COND_DEPS (insn
) = t
;
3512 /* Make each JUMP_INSN (but not a speculative check)
3513 a scheduling barrier for memory references. */
3516 && sel_insn_is_speculation_check (insn
)))
3518 /* Keep the list a reasonable size. */
3519 if (deps
->pending_flush_length
++ > MAX_PENDING_LIST_LENGTH
)
3520 flush_pending_lists (deps
, insn
, true, true);
3522 deps
->pending_jump_insns
3523 = alloc_INSN_LIST (insn
, deps
->pending_jump_insns
);
3526 /* For each insn which shouldn't cross a jump, add a dependence. */
3527 add_dependence_list_and_free (deps
, insn
,
3528 &deps
->sched_before_next_jump
, 1,
3531 sched_analyze_insn (deps
, PATTERN (insn
), insn
);
3533 else if (NONJUMP_INSN_P (insn
) || DEBUG_INSN_P (insn
))
3535 sched_analyze_insn (deps
, PATTERN (insn
), insn
);
3537 else if (CALL_P (insn
))
3541 CANT_MOVE (insn
) = 1;
3543 if (find_reg_note (insn
, REG_SETJMP
, NULL
))
3545 /* This is setjmp. Assume that all registers, not just
3546 hard registers, may be clobbered by this call. */
3547 reg_pending_barrier
= MOVE_BARRIER
;
3551 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
3552 /* A call may read and modify global register variables. */
3555 SET_REGNO_REG_SET (reg_pending_sets
, i
);
3556 SET_HARD_REG_BIT (implicit_reg_pending_uses
, i
);
3558 /* Other call-clobbered hard regs may be clobbered.
3559 Since we only have a choice between 'might be clobbered'
3560 and 'definitely not clobbered', we must include all
3561 partly call-clobbered registers here. */
3562 else if (HARD_REGNO_CALL_PART_CLOBBERED (i
, reg_raw_mode
[i
])
3563 || TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
3564 SET_REGNO_REG_SET (reg_pending_clobbers
, i
);
3565 /* We don't know what set of fixed registers might be used
3566 by the function, but it is certain that the stack pointer
3567 is among them, but be conservative. */
3568 else if (fixed_regs
[i
])
3569 SET_HARD_REG_BIT (implicit_reg_pending_uses
, i
);
3570 /* The frame pointer is normally not used by the function
3571 itself, but by the debugger. */
3572 /* ??? MIPS o32 is an exception. It uses the frame pointer
3573 in the macro expansion of jal but does not represent this
3574 fact in the call_insn rtl. */
3575 else if (i
== FRAME_POINTER_REGNUM
3576 || (i
== HARD_FRAME_POINTER_REGNUM
3577 && (! reload_completed
|| frame_pointer_needed
)))
3578 SET_HARD_REG_BIT (implicit_reg_pending_uses
, i
);
3581 /* For each insn which shouldn't cross a call, add a dependence
3582 between that insn and this call insn. */
3583 add_dependence_list_and_free (deps
, insn
,
3584 &deps
->sched_before_next_call
, 1,
3587 sched_analyze_insn (deps
, PATTERN (insn
), insn
);
3589 /* If CALL would be in a sched group, then this will violate
3590 convention that sched group insns have dependencies only on the
3591 previous instruction.
3593 Of course one can say: "Hey! What about head of the sched group?"
3594 And I will answer: "Basic principles (one dep per insn) are always
3596 gcc_assert (!SCHED_GROUP_P (insn
));
3598 /* In the absence of interprocedural alias analysis, we must flush
3599 all pending reads and writes, and start new dependencies starting
3600 from here. But only flush writes for constant calls (which may
3601 be passed a pointer to something we haven't written yet). */
3602 flush_pending_lists (deps
, insn
, true, ! RTL_CONST_OR_PURE_CALL_P (insn
));
3604 if (!deps
->readonly
)
3606 /* Remember the last function call for limiting lifetimes. */
3607 free_INSN_LIST_list (&deps
->last_function_call
);
3608 deps
->last_function_call
= alloc_INSN_LIST (insn
, NULL_RTX
);
3610 if (call_may_noreturn_p (insn
))
3612 /* Remember the last function call that might not always return
3613 normally for limiting moves of trapping insns. */
3614 free_INSN_LIST_list (&deps
->last_function_call_may_noreturn
);
3615 deps
->last_function_call_may_noreturn
3616 = alloc_INSN_LIST (insn
, NULL_RTX
);
3619 /* Before reload, begin a post-call group, so as to keep the
3620 lifetimes of hard registers correct. */
3621 if (! reload_completed
)
3622 deps
->in_post_call_group_p
= post_call
;
3626 if (sched_deps_info
->use_cselib
)
3627 cselib_process_insn (insn
);
3629 /* EH_REGION insn notes can not appear until well after we complete
3632 gcc_assert (NOTE_KIND (insn
) != NOTE_INSN_EH_REGION_BEG
3633 && NOTE_KIND (insn
) != NOTE_INSN_EH_REGION_END
);
3635 if (sched_deps_info
->finish_insn
)
3636 sched_deps_info
->finish_insn ();
3638 /* Fixup the dependencies in the sched group. */
3639 if ((NONJUMP_INSN_P (insn
) || JUMP_P (insn
))
3640 && chain_to_prev_insn_p (insn
)
3642 chain_to_prev_insn (insn
);
3645 /* Initialize DEPS for the new block beginning with HEAD. */
3647 deps_start_bb (struct deps_desc
*deps
, rtx head
)
3649 gcc_assert (!deps
->readonly
);
3651 /* Before reload, if the previous block ended in a call, show that
3652 we are inside a post-call group, so as to keep the lifetimes of
3653 hard registers correct. */
3654 if (! reload_completed
&& !LABEL_P (head
))
3656 rtx insn
= prev_nonnote_nondebug_insn (head
);
3658 if (insn
&& CALL_P (insn
))
3659 deps
->in_post_call_group_p
= post_call_initial
;
3663 /* Analyze every insn between HEAD and TAIL inclusive, creating backward
3664 dependencies for each insn. */
3666 sched_analyze (struct deps_desc
*deps
, rtx head
, rtx tail
)
3670 if (sched_deps_info
->use_cselib
)
3671 cselib_init (CSELIB_RECORD_MEMORY
);
3673 deps_start_bb (deps
, head
);
3675 for (insn
= head
;; insn
= NEXT_INSN (insn
))
3680 /* And initialize deps_lists. */
3681 sd_init_insn (insn
);
3684 deps_analyze_insn (deps
, insn
);
3688 if (sched_deps_info
->use_cselib
)
3696 /* Helper for sched_free_deps ().
3697 Delete INSN's (RESOLVED_P) backward dependencies. */
3699 delete_dep_nodes_in_back_deps (rtx insn
, bool resolved_p
)
3701 sd_iterator_def sd_it
;
3703 sd_list_types_def types
;
3706 types
= SD_LIST_RES_BACK
;
3708 types
= SD_LIST_BACK
;
3710 for (sd_it
= sd_iterator_start (insn
, types
);
3711 sd_iterator_cond (&sd_it
, &dep
);)
3713 dep_link_t link
= *sd_it
.linkp
;
3714 dep_node_t node
= DEP_LINK_NODE (link
);
3715 deps_list_t back_list
;
3716 deps_list_t forw_list
;
3718 get_back_and_forw_lists (dep
, resolved_p
, &back_list
, &forw_list
);
3719 remove_from_deps_list (link
, back_list
);
3720 delete_dep_node (node
);
3724 /* Delete (RESOLVED_P) dependencies between HEAD and TAIL together with
3727 sched_free_deps (rtx head
, rtx tail
, bool resolved_p
)
3730 rtx next_tail
= NEXT_INSN (tail
);
3732 /* We make two passes since some insns may be scheduled before their
3733 dependencies are resolved. */
3734 for (insn
= head
; insn
!= next_tail
; insn
= NEXT_INSN (insn
))
3735 if (INSN_P (insn
) && INSN_LUID (insn
) > 0)
3737 /* Clear forward deps and leave the dep_nodes to the
3738 corresponding back_deps list. */
3740 clear_deps_list (INSN_RESOLVED_FORW_DEPS (insn
));
3742 clear_deps_list (INSN_FORW_DEPS (insn
));
3744 for (insn
= head
; insn
!= next_tail
; insn
= NEXT_INSN (insn
))
3745 if (INSN_P (insn
) && INSN_LUID (insn
) > 0)
3747 /* Clear resolved back deps together with its dep_nodes. */
3748 delete_dep_nodes_in_back_deps (insn
, resolved_p
);
3750 sd_finish_insn (insn
);
3754 /* Initialize variables for region data dependence analysis.
3755 When LAZY_REG_LAST is true, do not allocate reg_last array
3756 of struct deps_desc immediately. */
3759 init_deps (struct deps_desc
*deps
, bool lazy_reg_last
)
3761 int max_reg
= (reload_completed
? FIRST_PSEUDO_REGISTER
: max_reg_num ());
3763 deps
->max_reg
= max_reg
;
3765 deps
->reg_last
= NULL
;
3767 deps
->reg_last
= XCNEWVEC (struct deps_reg
, max_reg
);
3768 INIT_REG_SET (&deps
->reg_last_in_use
);
3770 deps
->pending_read_insns
= 0;
3771 deps
->pending_read_mems
= 0;
3772 deps
->pending_write_insns
= 0;
3773 deps
->pending_write_mems
= 0;
3774 deps
->pending_jump_insns
= 0;
3775 deps
->pending_read_list_length
= 0;
3776 deps
->pending_write_list_length
= 0;
3777 deps
->pending_flush_length
= 0;
3778 deps
->last_pending_memory_flush
= 0;
3779 deps
->last_function_call
= 0;
3780 deps
->last_function_call_may_noreturn
= 0;
3781 deps
->sched_before_next_call
= 0;
3782 deps
->sched_before_next_jump
= 0;
3783 deps
->in_post_call_group_p
= not_post_call
;
3784 deps
->last_debug_insn
= 0;
3785 deps
->last_reg_pending_barrier
= NOT_A_BARRIER
;
3789 /* Init only reg_last field of DEPS, which was not allocated before as
3790 we inited DEPS lazily. */
3792 init_deps_reg_last (struct deps_desc
*deps
)
3794 gcc_assert (deps
&& deps
->max_reg
> 0);
3795 gcc_assert (deps
->reg_last
== NULL
);
3797 deps
->reg_last
= XCNEWVEC (struct deps_reg
, deps
->max_reg
);
3801 /* Free insn lists found in DEPS. */
3804 free_deps (struct deps_desc
*deps
)
3807 reg_set_iterator rsi
;
3809 /* We set max_reg to 0 when this context was already freed. */
3810 if (deps
->max_reg
== 0)
3812 gcc_assert (deps
->reg_last
== NULL
);
3817 free_INSN_LIST_list (&deps
->pending_read_insns
);
3818 free_EXPR_LIST_list (&deps
->pending_read_mems
);
3819 free_INSN_LIST_list (&deps
->pending_write_insns
);
3820 free_EXPR_LIST_list (&deps
->pending_write_mems
);
3821 free_INSN_LIST_list (&deps
->last_pending_memory_flush
);
3823 /* Without the EXECUTE_IF_SET, this loop is executed max_reg * nr_regions
3824 times. For a testcase with 42000 regs and 8000 small basic blocks,
3825 this loop accounted for nearly 60% (84 sec) of the total -O2 runtime. */
3826 EXECUTE_IF_SET_IN_REG_SET (&deps
->reg_last_in_use
, 0, i
, rsi
)
3828 struct deps_reg
*reg_last
= &deps
->reg_last
[i
];
3830 free_INSN_LIST_list (®_last
->uses
);
3832 free_INSN_LIST_list (®_last
->sets
);
3833 if (reg_last
->implicit_sets
)
3834 free_INSN_LIST_list (®_last
->implicit_sets
);
3835 if (reg_last
->control_uses
)
3836 free_INSN_LIST_list (®_last
->control_uses
);
3837 if (reg_last
->clobbers
)
3838 free_INSN_LIST_list (®_last
->clobbers
);
3840 CLEAR_REG_SET (&deps
->reg_last_in_use
);
3842 /* As we initialize reg_last lazily, it is possible that we didn't allocate
3844 free (deps
->reg_last
);
3845 deps
->reg_last
= NULL
;
3850 /* Remove INSN from dependence contexts DEPS. */
3852 remove_from_deps (struct deps_desc
*deps
, rtx insn
)
3856 reg_set_iterator rsi
;
3858 removed
= remove_from_both_dependence_lists (insn
, &deps
->pending_read_insns
,
3859 &deps
->pending_read_mems
);
3860 if (!DEBUG_INSN_P (insn
))
3861 deps
->pending_read_list_length
-= removed
;
3862 removed
= remove_from_both_dependence_lists (insn
, &deps
->pending_write_insns
,
3863 &deps
->pending_write_mems
);
3864 deps
->pending_write_list_length
-= removed
;
3866 removed
= remove_from_dependence_list (insn
, &deps
->pending_jump_insns
);
3867 deps
->pending_flush_length
-= removed
;
3868 removed
= remove_from_dependence_list (insn
, &deps
->last_pending_memory_flush
);
3869 deps
->pending_flush_length
-= removed
;
3871 EXECUTE_IF_SET_IN_REG_SET (&deps
->reg_last_in_use
, 0, i
, rsi
)
3873 struct deps_reg
*reg_last
= &deps
->reg_last
[i
];
3875 remove_from_dependence_list (insn
, ®_last
->uses
);
3877 remove_from_dependence_list (insn
, ®_last
->sets
);
3878 if (reg_last
->implicit_sets
)
3879 remove_from_dependence_list (insn
, ®_last
->implicit_sets
);
3880 if (reg_last
->clobbers
)
3881 remove_from_dependence_list (insn
, ®_last
->clobbers
);
3882 if (!reg_last
->uses
&& !reg_last
->sets
&& !reg_last
->implicit_sets
3883 && !reg_last
->clobbers
)
3884 CLEAR_REGNO_REG_SET (&deps
->reg_last_in_use
, i
);
3889 remove_from_dependence_list (insn
, &deps
->last_function_call
);
3890 remove_from_dependence_list (insn
,
3891 &deps
->last_function_call_may_noreturn
);
3893 remove_from_dependence_list (insn
, &deps
->sched_before_next_call
);
3896 /* Init deps data vector. */
3898 init_deps_data_vector (void)
3900 int reserve
= (sched_max_luid
+ 1
3901 - VEC_length (haifa_deps_insn_data_def
, h_d_i_d
));
3903 && ! VEC_space (haifa_deps_insn_data_def
, h_d_i_d
, reserve
))
3904 VEC_safe_grow_cleared (haifa_deps_insn_data_def
, heap
, h_d_i_d
,
3905 3 * sched_max_luid
/ 2);
3908 /* If it is profitable to use them, initialize or extend (depending on
3909 GLOBAL_P) dependency data. */
3911 sched_deps_init (bool global_p
)
3913 /* Average number of insns in the basic block.
3914 '+ 1' is used to make it nonzero. */
3915 int insns_in_block
= sched_max_luid
/ n_basic_blocks
+ 1;
3917 init_deps_data_vector ();
3919 /* We use another caching mechanism for selective scheduling, so
3920 we don't use this one. */
3921 if (!sel_sched_p () && global_p
&& insns_in_block
> 100 * 5)
3923 /* ?!? We could save some memory by computing a per-region luid mapping
3924 which could reduce both the number of vectors in the cache and the
3925 size of each vector. Instead we just avoid the cache entirely unless
3926 the average number of instructions in a basic block is very high. See
3927 the comment before the declaration of true_dependency_cache for
3928 what we consider "very high". */
3930 extend_dependency_caches (sched_max_luid
, true);
3935 dl_pool
= create_alloc_pool ("deps_list", sizeof (struct _deps_list
),
3936 /* Allocate lists for one block at a time. */
3938 dn_pool
= create_alloc_pool ("dep_node", sizeof (struct _dep_node
),
3939 /* Allocate nodes for one block at a time.
3940 We assume that average insn has
3942 5 * insns_in_block
);
3947 /* Create or extend (depending on CREATE_P) dependency caches to
3950 extend_dependency_caches (int n
, bool create_p
)
3952 if (create_p
|| true_dependency_cache
)
3954 int i
, luid
= cache_size
+ n
;
3956 true_dependency_cache
= XRESIZEVEC (bitmap_head
, true_dependency_cache
,
3958 output_dependency_cache
= XRESIZEVEC (bitmap_head
,
3959 output_dependency_cache
, luid
);
3960 anti_dependency_cache
= XRESIZEVEC (bitmap_head
, anti_dependency_cache
,
3962 control_dependency_cache
= XRESIZEVEC (bitmap_head
, control_dependency_cache
,
3965 if (current_sched_info
->flags
& DO_SPECULATION
)
3966 spec_dependency_cache
= XRESIZEVEC (bitmap_head
, spec_dependency_cache
,
3969 for (i
= cache_size
; i
< luid
; i
++)
3971 bitmap_initialize (&true_dependency_cache
[i
], 0);
3972 bitmap_initialize (&output_dependency_cache
[i
], 0);
3973 bitmap_initialize (&anti_dependency_cache
[i
], 0);
3974 bitmap_initialize (&control_dependency_cache
[i
], 0);
3976 if (current_sched_info
->flags
& DO_SPECULATION
)
3977 bitmap_initialize (&spec_dependency_cache
[i
], 0);
3983 /* Finalize dependency information for the whole function. */
3985 sched_deps_finish (void)
3987 gcc_assert (deps_pools_are_empty_p ());
3988 free_alloc_pool_if_empty (&dn_pool
);
3989 free_alloc_pool_if_empty (&dl_pool
);
3990 gcc_assert (dn_pool
== NULL
&& dl_pool
== NULL
);
3992 VEC_free (haifa_deps_insn_data_def
, heap
, h_d_i_d
);
3995 if (true_dependency_cache
)
3999 for (i
= 0; i
< cache_size
; i
++)
4001 bitmap_clear (&true_dependency_cache
[i
]);
4002 bitmap_clear (&output_dependency_cache
[i
]);
4003 bitmap_clear (&anti_dependency_cache
[i
]);
4004 bitmap_clear (&control_dependency_cache
[i
]);
4006 if (sched_deps_info
->generate_spec_deps
)
4007 bitmap_clear (&spec_dependency_cache
[i
]);
4009 free (true_dependency_cache
);
4010 true_dependency_cache
= NULL
;
4011 free (output_dependency_cache
);
4012 output_dependency_cache
= NULL
;
4013 free (anti_dependency_cache
);
4014 anti_dependency_cache
= NULL
;
4015 free (control_dependency_cache
);
4016 control_dependency_cache
= NULL
;
4018 if (sched_deps_info
->generate_spec_deps
)
4020 free (spec_dependency_cache
);
4021 spec_dependency_cache
= NULL
;
4027 /* Initialize some global variables needed by the dependency analysis
4031 init_deps_global (void)
4033 CLEAR_HARD_REG_SET (implicit_reg_pending_clobbers
);
4034 CLEAR_HARD_REG_SET (implicit_reg_pending_uses
);
4035 reg_pending_sets
= ALLOC_REG_SET (®_obstack
);
4036 reg_pending_clobbers
= ALLOC_REG_SET (®_obstack
);
4037 reg_pending_uses
= ALLOC_REG_SET (®_obstack
);
4038 reg_pending_control_uses
= ALLOC_REG_SET (®_obstack
);
4039 reg_pending_barrier
= NOT_A_BARRIER
;
4041 if (!sel_sched_p () || sched_emulate_haifa_p
)
4043 sched_deps_info
->start_insn
= haifa_start_insn
;
4044 sched_deps_info
->finish_insn
= haifa_finish_insn
;
4046 sched_deps_info
->note_reg_set
= haifa_note_reg_set
;
4047 sched_deps_info
->note_reg_clobber
= haifa_note_reg_clobber
;
4048 sched_deps_info
->note_reg_use
= haifa_note_reg_use
;
4050 sched_deps_info
->note_mem_dep
= haifa_note_mem_dep
;
4051 sched_deps_info
->note_dep
= haifa_note_dep
;
4055 /* Free everything used by the dependency analysis code. */
4058 finish_deps_global (void)
4060 FREE_REG_SET (reg_pending_sets
);
4061 FREE_REG_SET (reg_pending_clobbers
);
4062 FREE_REG_SET (reg_pending_uses
);
4063 FREE_REG_SET (reg_pending_control_uses
);
4066 /* Estimate the weakness of dependence between MEM1 and MEM2. */
4068 estimate_dep_weak (rtx mem1
, rtx mem2
)
4073 /* MEMs are the same - don't speculate. */
4074 return MIN_DEP_WEAK
;
4076 r1
= XEXP (mem1
, 0);
4077 r2
= XEXP (mem2
, 0);
4080 || (REG_P (r1
) && REG_P (r2
)
4081 && REGNO (r1
) == REGNO (r2
)))
4082 /* Again, MEMs are the same. */
4083 return MIN_DEP_WEAK
;
4084 else if ((REG_P (r1
) && !REG_P (r2
))
4085 || (!REG_P (r1
) && REG_P (r2
)))
4086 /* Different addressing modes - reason to be more speculative,
4088 return NO_DEP_WEAK
- (NO_DEP_WEAK
- UNCERTAIN_DEP_WEAK
) / 2;
4090 /* We can't say anything about the dependence. */
4091 return UNCERTAIN_DEP_WEAK
;
4094 /* Add or update backward dependence between INSN and ELEM with type DEP_TYPE.
4095 This function can handle same INSN and ELEM (INSN == ELEM).
4096 It is a convenience wrapper. */
4098 add_dependence_1 (rtx insn
, rtx elem
, enum reg_note dep_type
)
4103 if (dep_type
== REG_DEP_TRUE
)
4105 else if (dep_type
== REG_DEP_OUTPUT
)
4107 else if (dep_type
== REG_DEP_CONTROL
)
4111 gcc_assert (dep_type
== REG_DEP_ANTI
);
4115 /* When add_dependence is called from inside sched-deps.c, we expect
4116 cur_insn to be non-null. */
4117 internal
= cur_insn
!= NULL
;
4119 gcc_assert (insn
== cur_insn
);
4123 note_dep (elem
, ds
);
4128 /* Return weakness of speculative type TYPE in the dep_status DS. */
4130 get_dep_weak_1 (ds_t ds
, ds_t type
)
4136 case BEGIN_DATA
: ds
>>= BEGIN_DATA_BITS_OFFSET
; break;
4137 case BE_IN_DATA
: ds
>>= BE_IN_DATA_BITS_OFFSET
; break;
4138 case BEGIN_CONTROL
: ds
>>= BEGIN_CONTROL_BITS_OFFSET
; break;
4139 case BE_IN_CONTROL
: ds
>>= BE_IN_CONTROL_BITS_OFFSET
; break;
4140 default: gcc_unreachable ();
4147 get_dep_weak (ds_t ds
, ds_t type
)
4149 dw_t dw
= get_dep_weak_1 (ds
, type
);
4151 gcc_assert (MIN_DEP_WEAK
<= dw
&& dw
<= MAX_DEP_WEAK
);
4155 /* Return the dep_status, which has the same parameters as DS, except for
4156 speculative type TYPE, that will have weakness DW. */
4158 set_dep_weak (ds_t ds
, ds_t type
, dw_t dw
)
4160 gcc_assert (MIN_DEP_WEAK
<= dw
&& dw
<= MAX_DEP_WEAK
);
4165 case BEGIN_DATA
: ds
|= ((ds_t
) dw
) << BEGIN_DATA_BITS_OFFSET
; break;
4166 case BE_IN_DATA
: ds
|= ((ds_t
) dw
) << BE_IN_DATA_BITS_OFFSET
; break;
4167 case BEGIN_CONTROL
: ds
|= ((ds_t
) dw
) << BEGIN_CONTROL_BITS_OFFSET
; break;
4168 case BE_IN_CONTROL
: ds
|= ((ds_t
) dw
) << BE_IN_CONTROL_BITS_OFFSET
; break;
4169 default: gcc_unreachable ();
4174 /* Return the join of two dep_statuses DS1 and DS2.
4175 If MAX_P is true then choose the greater probability,
4176 otherwise multiply probabilities.
4177 This function assumes that both DS1 and DS2 contain speculative bits. */
4179 ds_merge_1 (ds_t ds1
, ds_t ds2
, bool max_p
)
4183 gcc_assert ((ds1
& SPECULATIVE
) && (ds2
& SPECULATIVE
));
4185 ds
= (ds1
& DEP_TYPES
) | (ds2
& DEP_TYPES
);
4187 t
= FIRST_SPEC_TYPE
;
4190 if ((ds1
& t
) && !(ds2
& t
))
4192 else if (!(ds1
& t
) && (ds2
& t
))
4194 else if ((ds1
& t
) && (ds2
& t
))
4196 dw_t dw1
= get_dep_weak (ds1
, t
);
4197 dw_t dw2
= get_dep_weak (ds2
, t
);
4202 dw
= ((ds_t
) dw1
) * ((ds_t
) dw2
);
4204 if (dw
< MIN_DEP_WEAK
)
4215 ds
= set_dep_weak (ds
, t
, (dw_t
) dw
);
4218 if (t
== LAST_SPEC_TYPE
)
4220 t
<<= SPEC_TYPE_SHIFT
;
4227 /* Return the join of two dep_statuses DS1 and DS2.
4228 This function assumes that both DS1 and DS2 contain speculative bits. */
4230 ds_merge (ds_t ds1
, ds_t ds2
)
4232 return ds_merge_1 (ds1
, ds2
, false);
4235 /* Return the join of two dep_statuses DS1 and DS2. */
4237 ds_full_merge (ds_t ds
, ds_t ds2
, rtx mem1
, rtx mem2
)
4239 ds_t new_status
= ds
| ds2
;
4241 if (new_status
& SPECULATIVE
)
4243 if ((ds
&& !(ds
& SPECULATIVE
))
4244 || (ds2
&& !(ds2
& SPECULATIVE
)))
4245 /* Then this dep can't be speculative. */
4246 new_status
&= ~SPECULATIVE
;
4249 /* Both are speculative. Merging probabilities. */
4254 dw
= estimate_dep_weak (mem1
, mem2
);
4255 ds
= set_dep_weak (ds
, BEGIN_DATA
, dw
);
4263 new_status
= ds_merge (ds2
, ds
);
4270 /* Return the join of DS1 and DS2. Use maximum instead of multiplying
4273 ds_max_merge (ds_t ds1
, ds_t ds2
)
4275 if (ds1
== 0 && ds2
== 0)
4278 if (ds1
== 0 && ds2
!= 0)
4281 if (ds1
!= 0 && ds2
== 0)
4284 return ds_merge_1 (ds1
, ds2
, true);
4287 /* Return the probability of speculation success for the speculation
4295 dt
= FIRST_SPEC_TYPE
;
4300 res
*= (ds_t
) get_dep_weak (ds
, dt
);
4304 if (dt
== LAST_SPEC_TYPE
)
4306 dt
<<= SPEC_TYPE_SHIFT
;
4312 res
/= MAX_DEP_WEAK
;
4314 if (res
< MIN_DEP_WEAK
)
4317 gcc_assert (res
<= MAX_DEP_WEAK
);
4322 /* Return a dep status that contains all speculation types of DS. */
4324 ds_get_speculation_types (ds_t ds
)
4326 if (ds
& BEGIN_DATA
)
4328 if (ds
& BE_IN_DATA
)
4330 if (ds
& BEGIN_CONTROL
)
4331 ds
|= BEGIN_CONTROL
;
4332 if (ds
& BE_IN_CONTROL
)
4333 ds
|= BE_IN_CONTROL
;
4335 return ds
& SPECULATIVE
;
4338 /* Return a dep status that contains maximal weakness for each speculation
4339 type present in DS. */
4341 ds_get_max_dep_weak (ds_t ds
)
4343 if (ds
& BEGIN_DATA
)
4344 ds
= set_dep_weak (ds
, BEGIN_DATA
, MAX_DEP_WEAK
);
4345 if (ds
& BE_IN_DATA
)
4346 ds
= set_dep_weak (ds
, BE_IN_DATA
, MAX_DEP_WEAK
);
4347 if (ds
& BEGIN_CONTROL
)
4348 ds
= set_dep_weak (ds
, BEGIN_CONTROL
, MAX_DEP_WEAK
);
4349 if (ds
& BE_IN_CONTROL
)
4350 ds
= set_dep_weak (ds
, BE_IN_CONTROL
, MAX_DEP_WEAK
);
4355 /* Dump information about the dependence status S. */
4357 dump_ds (FILE *f
, ds_t s
)
4362 fprintf (f
, "BEGIN_DATA: %d; ", get_dep_weak_1 (s
, BEGIN_DATA
));
4364 fprintf (f
, "BE_IN_DATA: %d; ", get_dep_weak_1 (s
, BE_IN_DATA
));
4365 if (s
& BEGIN_CONTROL
)
4366 fprintf (f
, "BEGIN_CONTROL: %d; ", get_dep_weak_1 (s
, BEGIN_CONTROL
));
4367 if (s
& BE_IN_CONTROL
)
4368 fprintf (f
, "BE_IN_CONTROL: %d; ", get_dep_weak_1 (s
, BE_IN_CONTROL
));
4371 fprintf (f
, "HARD_DEP; ");
4374 fprintf (f
, "DEP_TRUE; ");
4376 fprintf (f
, "DEP_OUTPUT; ");
4378 fprintf (f
, "DEP_ANTI; ");
4379 if (s
& DEP_CONTROL
)
4380 fprintf (f
, "DEP_CONTROL; ");
4388 dump_ds (stderr
, s
);
4389 fprintf (stderr
, "\n");
4392 #ifdef ENABLE_CHECKING
4393 /* Verify that dependence type and status are consistent.
4394 If RELAXED_P is true, then skip dep_weakness checks. */
4396 check_dep (dep_t dep
, bool relaxed_p
)
4398 enum reg_note dt
= DEP_TYPE (dep
);
4399 ds_t ds
= DEP_STATUS (dep
);
4401 gcc_assert (DEP_PRO (dep
) != DEP_CON (dep
));
4403 if (!(current_sched_info
->flags
& USE_DEPS_LIST
))
4405 gcc_assert (ds
== 0);
4409 /* Check that dependence type contains the same bits as the status. */
4410 if (dt
== REG_DEP_TRUE
)
4411 gcc_assert (ds
& DEP_TRUE
);
4412 else if (dt
== REG_DEP_OUTPUT
)
4413 gcc_assert ((ds
& DEP_OUTPUT
)
4414 && !(ds
& DEP_TRUE
));
4415 else if (dt
== REG_DEP_ANTI
)
4416 gcc_assert ((ds
& DEP_ANTI
)
4417 && !(ds
& (DEP_OUTPUT
| DEP_TRUE
)));
4419 gcc_assert (dt
== REG_DEP_CONTROL
4420 && (ds
& DEP_CONTROL
)
4421 && !(ds
& (DEP_OUTPUT
| DEP_ANTI
| DEP_TRUE
)));
4423 /* HARD_DEP can not appear in dep_status of a link. */
4424 gcc_assert (!(ds
& HARD_DEP
));
4426 /* Check that dependence status is set correctly when speculation is not
4428 if (!sched_deps_info
->generate_spec_deps
)
4429 gcc_assert (!(ds
& SPECULATIVE
));
4430 else if (ds
& SPECULATIVE
)
4434 ds_t type
= FIRST_SPEC_TYPE
;
4436 /* Check that dependence weakness is in proper range. */
4440 get_dep_weak (ds
, type
);
4442 if (type
== LAST_SPEC_TYPE
)
4444 type
<<= SPEC_TYPE_SHIFT
;
4449 if (ds
& BEGIN_SPEC
)
4451 /* Only true dependence can be data speculative. */
4452 if (ds
& BEGIN_DATA
)
4453 gcc_assert (ds
& DEP_TRUE
);
4455 /* Control dependencies in the insn scheduler are represented by
4456 anti-dependencies, therefore only anti dependence can be
4457 control speculative. */
4458 if (ds
& BEGIN_CONTROL
)
4459 gcc_assert (ds
& DEP_ANTI
);
4463 /* Subsequent speculations should resolve true dependencies. */
4464 gcc_assert ((ds
& DEP_TYPES
) == DEP_TRUE
);
4467 /* Check that true and anti dependencies can't have other speculative
4470 gcc_assert (ds
& (BEGIN_DATA
| BE_IN_SPEC
));
4471 /* An output dependence can't be speculative at all. */
4472 gcc_assert (!(ds
& DEP_OUTPUT
));
4474 gcc_assert (ds
& BEGIN_CONTROL
);
4477 #endif /* ENABLE_CHECKING */
4479 #endif /* INSN_SCHEDULING */