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1 /* Instruction scheduling pass.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010
4 Free Software Foundation, Inc.
5 Contributed by Michael Tiemann (tiemann@cygnus.com) Enhanced by,
6 and currently maintained by, Jim Wilson (wilson@cygnus.com)
7
8 This file is part of GCC.
9
10 GCC is free software; you can redistribute it and/or modify it under
11 the terms of the GNU General Public License as published by the Free
12 Software Foundation; either version 3, or (at your option) any later
13 version.
14
15 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
16 WARRANTY; without even the implied warranty of MERCHANTABILITY or
17 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with GCC; see the file COPYING3. If not see
22 <http://www.gnu.org/licenses/>. */
23
24 /* This pass implements list scheduling within basic blocks. It is
25 run twice: (1) after flow analysis, but before register allocation,
26 and (2) after register allocation.
27
28 The first run performs interblock scheduling, moving insns between
29 different blocks in the same "region", and the second runs only
30 basic block scheduling.
31
32 Interblock motions performed are useful motions and speculative
33 motions, including speculative loads. Motions requiring code
34 duplication are not supported. The identification of motion type
35 and the check for validity of speculative motions requires
36 construction and analysis of the function's control flow graph.
37
38 The main entry point for this pass is schedule_insns(), called for
39 each function. The work of the scheduler is organized in three
40 levels: (1) function level: insns are subject to splitting,
41 control-flow-graph is constructed, regions are computed (after
42 reload, each region is of one block), (2) region level: control
43 flow graph attributes required for interblock scheduling are
44 computed (dominators, reachability, etc.), data dependences and
45 priorities are computed, and (3) block level: insns in the block
46 are actually scheduled. */
47 \f
48 #include "config.h"
49 #include "system.h"
50 #include "coretypes.h"
51 #include "tm.h"
52 #include "diagnostic-core.h"
53 #include "toplev.h"
54 #include "rtl.h"
55 #include "tm_p.h"
56 #include "hard-reg-set.h"
57 #include "regs.h"
58 #include "function.h"
59 #include "flags.h"
60 #include "insn-config.h"
61 #include "insn-attr.h"
62 #include "except.h"
63 #include "toplev.h"
64 #include "recog.h"
65 #include "cfglayout.h"
66 #include "params.h"
67 #include "sched-int.h"
68 #include "sel-sched.h"
69 #include "target.h"
70 #include "timevar.h"
71 #include "tree-pass.h"
72 #include "dbgcnt.h"
73
74 #ifdef INSN_SCHEDULING
75
76 /* Some accessor macros for h_i_d members only used within this file. */
77 #define FED_BY_SPEC_LOAD(INSN) (HID (INSN)->fed_by_spec_load)
78 #define IS_LOAD_INSN(INSN) (HID (insn)->is_load_insn)
79
80 /* nr_inter/spec counts interblock/speculative motion for the function. */
81 static int nr_inter, nr_spec;
82
83 static int is_cfg_nonregular (void);
84
85 /* Number of regions in the procedure. */
86 int nr_regions = 0;
87
88 /* Table of region descriptions. */
89 region *rgn_table = NULL;
90
91 /* Array of lists of regions' blocks. */
92 int *rgn_bb_table = NULL;
93
94 /* Topological order of blocks in the region (if b2 is reachable from
95 b1, block_to_bb[b2] > block_to_bb[b1]). Note: A basic block is
96 always referred to by either block or b, while its topological
97 order name (in the region) is referred to by bb. */
98 int *block_to_bb = NULL;
99
100 /* The number of the region containing a block. */
101 int *containing_rgn = NULL;
102
103 /* ebb_head [i] - is index in rgn_bb_table of the head basic block of i'th ebb.
104 Currently we can get a ebb only through splitting of currently
105 scheduling block, therefore, we don't need ebb_head array for every region,
106 hence, its sufficient to hold it for current one only. */
107 int *ebb_head = NULL;
108
109 /* The minimum probability of reaching a source block so that it will be
110 considered for speculative scheduling. */
111 static int min_spec_prob;
112
113 static void find_single_block_region (bool);
114 static void find_rgns (void);
115 static bool too_large (int, int *, int *);
116
117 /* Blocks of the current region being scheduled. */
118 int current_nr_blocks;
119 int current_blocks;
120
121 /* A speculative motion requires checking live information on the path
122 from 'source' to 'target'. The split blocks are those to be checked.
123 After a speculative motion, live information should be modified in
124 the 'update' blocks.
125
126 Lists of split and update blocks for each candidate of the current
127 target are in array bblst_table. */
128 static basic_block *bblst_table;
129 static int bblst_size, bblst_last;
130
131 /* Target info declarations.
132
133 The block currently being scheduled is referred to as the "target" block,
134 while other blocks in the region from which insns can be moved to the
135 target are called "source" blocks. The candidate structure holds info
136 about such sources: are they valid? Speculative? Etc. */
137 typedef struct
138 {
139 basic_block *first_member;
140 int nr_members;
141 }
142 bblst;
143
144 typedef struct
145 {
146 char is_valid;
147 char is_speculative;
148 int src_prob;
149 bblst split_bbs;
150 bblst update_bbs;
151 }
152 candidate;
153
154 static candidate *candidate_table;
155 #define IS_VALID(src) (candidate_table[src].is_valid)
156 #define IS_SPECULATIVE(src) (candidate_table[src].is_speculative)
157 #define IS_SPECULATIVE_INSN(INSN) \
158 (IS_SPECULATIVE (BLOCK_TO_BB (BLOCK_NUM (INSN))))
159 #define SRC_PROB(src) ( candidate_table[src].src_prob )
160
161 /* The bb being currently scheduled. */
162 int target_bb;
163
164 /* List of edges. */
165 typedef struct
166 {
167 edge *first_member;
168 int nr_members;
169 }
170 edgelst;
171
172 static edge *edgelst_table;
173 static int edgelst_last;
174
175 static void extract_edgelst (sbitmap, edgelst *);
176
177 /* Target info functions. */
178 static void split_edges (int, int, edgelst *);
179 static void compute_trg_info (int);
180 void debug_candidate (int);
181 void debug_candidates (int);
182
183 /* Dominators array: dom[i] contains the sbitmap of dominators of
184 bb i in the region. */
185 static sbitmap *dom;
186
187 /* bb 0 is the only region entry. */
188 #define IS_RGN_ENTRY(bb) (!bb)
189
190 /* Is bb_src dominated by bb_trg. */
191 #define IS_DOMINATED(bb_src, bb_trg) \
192 ( TEST_BIT (dom[bb_src], bb_trg) )
193
194 /* Probability: Prob[i] is an int in [0, REG_BR_PROB_BASE] which is
195 the probability of bb i relative to the region entry. */
196 static int *prob;
197
198 /* Bit-set of edges, where bit i stands for edge i. */
199 typedef sbitmap edgeset;
200
201 /* Number of edges in the region. */
202 static int rgn_nr_edges;
203
204 /* Array of size rgn_nr_edges. */
205 static edge *rgn_edges;
206
207 /* Mapping from each edge in the graph to its number in the rgn. */
208 #define EDGE_TO_BIT(edge) ((int)(size_t)(edge)->aux)
209 #define SET_EDGE_TO_BIT(edge,nr) ((edge)->aux = (void *)(size_t)(nr))
210
211 /* The split edges of a source bb is different for each target
212 bb. In order to compute this efficiently, the 'potential-split edges'
213 are computed for each bb prior to scheduling a region. This is actually
214 the split edges of each bb relative to the region entry.
215
216 pot_split[bb] is the set of potential split edges of bb. */
217 static edgeset *pot_split;
218
219 /* For every bb, a set of its ancestor edges. */
220 static edgeset *ancestor_edges;
221
222 #define INSN_PROBABILITY(INSN) (SRC_PROB (BLOCK_TO_BB (BLOCK_NUM (INSN))))
223
224 /* Speculative scheduling functions. */
225 static int check_live_1 (int, rtx);
226 static void update_live_1 (int, rtx);
227 static int is_pfree (rtx, int, int);
228 static int find_conditional_protection (rtx, int);
229 static int is_conditionally_protected (rtx, int, int);
230 static int is_prisky (rtx, int, int);
231 static int is_exception_free (rtx, int, int);
232
233 static bool sets_likely_spilled (rtx);
234 static void sets_likely_spilled_1 (rtx, const_rtx, void *);
235 static void add_branch_dependences (rtx, rtx);
236 static void compute_block_dependences (int);
237
238 static void schedule_region (int);
239 static rtx concat_INSN_LIST (rtx, rtx);
240 static void concat_insn_mem_list (rtx, rtx, rtx *, rtx *);
241 static void propagate_deps (int, struct deps_desc *);
242 static void free_pending_lists (void);
243
244 /* Functions for construction of the control flow graph. */
245
246 /* Return 1 if control flow graph should not be constructed, 0 otherwise.
247
248 We decide not to build the control flow graph if there is possibly more
249 than one entry to the function, if computed branches exist, if we
250 have nonlocal gotos, or if we have an unreachable loop. */
251
252 static int
253 is_cfg_nonregular (void)
254 {
255 basic_block b;
256 rtx insn;
257
258 /* If we have a label that could be the target of a nonlocal goto, then
259 the cfg is not well structured. */
260 if (nonlocal_goto_handler_labels)
261 return 1;
262
263 /* If we have any forced labels, then the cfg is not well structured. */
264 if (forced_labels)
265 return 1;
266
267 /* If we have exception handlers, then we consider the cfg not well
268 structured. ?!? We should be able to handle this now that we
269 compute an accurate cfg for EH. */
270 if (current_function_has_exception_handlers ())
271 return 1;
272
273 /* If we have insns which refer to labels as non-jumped-to operands,
274 then we consider the cfg not well structured. */
275 FOR_EACH_BB (b)
276 FOR_BB_INSNS (b, insn)
277 {
278 rtx note, next, set, dest;
279
280 /* If this function has a computed jump, then we consider the cfg
281 not well structured. */
282 if (JUMP_P (insn) && computed_jump_p (insn))
283 return 1;
284
285 if (!INSN_P (insn))
286 continue;
287
288 note = find_reg_note (insn, REG_LABEL_OPERAND, NULL_RTX);
289 if (note == NULL_RTX)
290 continue;
291
292 /* For that label not to be seen as a referred-to label, this
293 must be a single-set which is feeding a jump *only*. This
294 could be a conditional jump with the label split off for
295 machine-specific reasons or a casesi/tablejump. */
296 next = next_nonnote_insn (insn);
297 if (next == NULL_RTX
298 || !JUMP_P (next)
299 || (JUMP_LABEL (next) != XEXP (note, 0)
300 && find_reg_note (next, REG_LABEL_TARGET,
301 XEXP (note, 0)) == NULL_RTX)
302 || BLOCK_FOR_INSN (insn) != BLOCK_FOR_INSN (next))
303 return 1;
304
305 set = single_set (insn);
306 if (set == NULL_RTX)
307 return 1;
308
309 dest = SET_DEST (set);
310 if (!REG_P (dest) || !dead_or_set_p (next, dest))
311 return 1;
312 }
313
314 /* Unreachable loops with more than one basic block are detected
315 during the DFS traversal in find_rgns.
316
317 Unreachable loops with a single block are detected here. This
318 test is redundant with the one in find_rgns, but it's much
319 cheaper to go ahead and catch the trivial case here. */
320 FOR_EACH_BB (b)
321 {
322 if (EDGE_COUNT (b->preds) == 0
323 || (single_pred_p (b)
324 && single_pred (b) == b))
325 return 1;
326 }
327
328 /* All the tests passed. Consider the cfg well structured. */
329 return 0;
330 }
331
332 /* Extract list of edges from a bitmap containing EDGE_TO_BIT bits. */
333
334 static void
335 extract_edgelst (sbitmap set, edgelst *el)
336 {
337 unsigned int i = 0;
338 sbitmap_iterator sbi;
339
340 /* edgelst table space is reused in each call to extract_edgelst. */
341 edgelst_last = 0;
342
343 el->first_member = &edgelst_table[edgelst_last];
344 el->nr_members = 0;
345
346 /* Iterate over each word in the bitset. */
347 EXECUTE_IF_SET_IN_SBITMAP (set, 0, i, sbi)
348 {
349 edgelst_table[edgelst_last++] = rgn_edges[i];
350 el->nr_members++;
351 }
352 }
353
354 /* Functions for the construction of regions. */
355
356 /* Print the regions, for debugging purposes. Callable from debugger. */
357
358 DEBUG_FUNCTION void
359 debug_regions (void)
360 {
361 int rgn, bb;
362
363 fprintf (sched_dump, "\n;; ------------ REGIONS ----------\n\n");
364 for (rgn = 0; rgn < nr_regions; rgn++)
365 {
366 fprintf (sched_dump, ";;\trgn %d nr_blocks %d:\n", rgn,
367 rgn_table[rgn].rgn_nr_blocks);
368 fprintf (sched_dump, ";;\tbb/block: ");
369
370 /* We don't have ebb_head initialized yet, so we can't use
371 BB_TO_BLOCK (). */
372 current_blocks = RGN_BLOCKS (rgn);
373
374 for (bb = 0; bb < rgn_table[rgn].rgn_nr_blocks; bb++)
375 fprintf (sched_dump, " %d/%d ", bb, rgn_bb_table[current_blocks + bb]);
376
377 fprintf (sched_dump, "\n\n");
378 }
379 }
380
381 /* Print the region's basic blocks. */
382
383 DEBUG_FUNCTION void
384 debug_region (int rgn)
385 {
386 int bb;
387
388 fprintf (stderr, "\n;; ------------ REGION %d ----------\n\n", rgn);
389 fprintf (stderr, ";;\trgn %d nr_blocks %d:\n", rgn,
390 rgn_table[rgn].rgn_nr_blocks);
391 fprintf (stderr, ";;\tbb/block: ");
392
393 /* We don't have ebb_head initialized yet, so we can't use
394 BB_TO_BLOCK (). */
395 current_blocks = RGN_BLOCKS (rgn);
396
397 for (bb = 0; bb < rgn_table[rgn].rgn_nr_blocks; bb++)
398 fprintf (stderr, " %d/%d ", bb, rgn_bb_table[current_blocks + bb]);
399
400 fprintf (stderr, "\n\n");
401
402 for (bb = 0; bb < rgn_table[rgn].rgn_nr_blocks; bb++)
403 {
404 debug_bb_n_slim (rgn_bb_table[current_blocks + bb]);
405 fprintf (stderr, "\n");
406 }
407
408 fprintf (stderr, "\n");
409
410 }
411
412 /* True when a bb with index BB_INDEX contained in region RGN. */
413 static bool
414 bb_in_region_p (int bb_index, int rgn)
415 {
416 int i;
417
418 for (i = 0; i < rgn_table[rgn].rgn_nr_blocks; i++)
419 if (rgn_bb_table[current_blocks + i] == bb_index)
420 return true;
421
422 return false;
423 }
424
425 /* Dump region RGN to file F using dot syntax. */
426 void
427 dump_region_dot (FILE *f, int rgn)
428 {
429 int i;
430
431 fprintf (f, "digraph Region_%d {\n", rgn);
432
433 /* We don't have ebb_head initialized yet, so we can't use
434 BB_TO_BLOCK (). */
435 current_blocks = RGN_BLOCKS (rgn);
436
437 for (i = 0; i < rgn_table[rgn].rgn_nr_blocks; i++)
438 {
439 edge e;
440 edge_iterator ei;
441 int src_bb_num = rgn_bb_table[current_blocks + i];
442 struct basic_block_def *bb = BASIC_BLOCK (src_bb_num);
443
444 FOR_EACH_EDGE (e, ei, bb->succs)
445 if (bb_in_region_p (e->dest->index, rgn))
446 fprintf (f, "\t%d -> %d\n", src_bb_num, e->dest->index);
447 }
448 fprintf (f, "}\n");
449 }
450
451 /* The same, but first open a file specified by FNAME. */
452 void
453 dump_region_dot_file (const char *fname, int rgn)
454 {
455 FILE *f = fopen (fname, "wt");
456 dump_region_dot (f, rgn);
457 fclose (f);
458 }
459
460 /* Build a single block region for each basic block in the function.
461 This allows for using the same code for interblock and basic block
462 scheduling. */
463
464 static void
465 find_single_block_region (bool ebbs_p)
466 {
467 basic_block bb, ebb_start;
468 int i = 0;
469
470 nr_regions = 0;
471
472 if (ebbs_p) {
473 int probability_cutoff;
474 if (profile_info && flag_branch_probabilities)
475 probability_cutoff = PARAM_VALUE (TRACER_MIN_BRANCH_PROBABILITY_FEEDBACK);
476 else
477 probability_cutoff = PARAM_VALUE (TRACER_MIN_BRANCH_PROBABILITY);
478 probability_cutoff = REG_BR_PROB_BASE / 100 * probability_cutoff;
479
480 FOR_EACH_BB (ebb_start)
481 {
482 RGN_NR_BLOCKS (nr_regions) = 0;
483 RGN_BLOCKS (nr_regions) = i;
484 RGN_DONT_CALC_DEPS (nr_regions) = 0;
485 RGN_HAS_REAL_EBB (nr_regions) = 0;
486
487 for (bb = ebb_start; ; bb = bb->next_bb)
488 {
489 edge e;
490 edge_iterator ei;
491
492 rgn_bb_table[i] = bb->index;
493 RGN_NR_BLOCKS (nr_regions)++;
494 CONTAINING_RGN (bb->index) = nr_regions;
495 BLOCK_TO_BB (bb->index) = i - RGN_BLOCKS (nr_regions);
496 i++;
497
498 if (bb->next_bb == EXIT_BLOCK_PTR
499 || LABEL_P (BB_HEAD (bb->next_bb)))
500 break;
501
502 FOR_EACH_EDGE (e, ei, bb->succs)
503 if ((e->flags & EDGE_FALLTHRU) != 0)
504 break;
505 if (! e)
506 break;
507 if (e->probability <= probability_cutoff)
508 break;
509 }
510
511 ebb_start = bb;
512 nr_regions++;
513 }
514 }
515 else
516 FOR_EACH_BB (bb)
517 {
518 rgn_bb_table[nr_regions] = bb->index;
519 RGN_NR_BLOCKS (nr_regions) = 1;
520 RGN_BLOCKS (nr_regions) = nr_regions;
521 RGN_DONT_CALC_DEPS (nr_regions) = 0;
522 RGN_HAS_REAL_EBB (nr_regions) = 0;
523
524 CONTAINING_RGN (bb->index) = nr_regions;
525 BLOCK_TO_BB (bb->index) = 0;
526 nr_regions++;
527 }
528 }
529
530 /* Estimate number of the insns in the BB. */
531 static int
532 rgn_estimate_number_of_insns (basic_block bb)
533 {
534 int count;
535
536 count = INSN_LUID (BB_END (bb)) - INSN_LUID (BB_HEAD (bb));
537
538 if (MAY_HAVE_DEBUG_INSNS)
539 {
540 rtx insn;
541
542 FOR_BB_INSNS (bb, insn)
543 if (DEBUG_INSN_P (insn))
544 count--;
545 }
546
547 return count;
548 }
549
550 /* Update number of blocks and the estimate for number of insns
551 in the region. Return true if the region is "too large" for interblock
552 scheduling (compile time considerations). */
553
554 static bool
555 too_large (int block, int *num_bbs, int *num_insns)
556 {
557 (*num_bbs)++;
558 (*num_insns) += (common_sched_info->estimate_number_of_insns
559 (BASIC_BLOCK (block)));
560
561 return ((*num_bbs > PARAM_VALUE (PARAM_MAX_SCHED_REGION_BLOCKS))
562 || (*num_insns > PARAM_VALUE (PARAM_MAX_SCHED_REGION_INSNS)));
563 }
564
565 /* Update_loop_relations(blk, hdr): Check if the loop headed by max_hdr[blk]
566 is still an inner loop. Put in max_hdr[blk] the header of the most inner
567 loop containing blk. */
568 #define UPDATE_LOOP_RELATIONS(blk, hdr) \
569 { \
570 if (max_hdr[blk] == -1) \
571 max_hdr[blk] = hdr; \
572 else if (dfs_nr[max_hdr[blk]] > dfs_nr[hdr]) \
573 RESET_BIT (inner, hdr); \
574 else if (dfs_nr[max_hdr[blk]] < dfs_nr[hdr]) \
575 { \
576 RESET_BIT (inner,max_hdr[blk]); \
577 max_hdr[blk] = hdr; \
578 } \
579 }
580
581 /* Find regions for interblock scheduling.
582
583 A region for scheduling can be:
584
585 * A loop-free procedure, or
586
587 * A reducible inner loop, or
588
589 * A basic block not contained in any other region.
590
591 ?!? In theory we could build other regions based on extended basic
592 blocks or reverse extended basic blocks. Is it worth the trouble?
593
594 Loop blocks that form a region are put into the region's block list
595 in topological order.
596
597 This procedure stores its results into the following global (ick) variables
598
599 * rgn_nr
600 * rgn_table
601 * rgn_bb_table
602 * block_to_bb
603 * containing region
604
605 We use dominator relationships to avoid making regions out of non-reducible
606 loops.
607
608 This procedure needs to be converted to work on pred/succ lists instead
609 of edge tables. That would simplify it somewhat. */
610
611 static void
612 haifa_find_rgns (void)
613 {
614 int *max_hdr, *dfs_nr, *degree;
615 char no_loops = 1;
616 int node, child, loop_head, i, head, tail;
617 int count = 0, sp, idx = 0;
618 edge_iterator current_edge;
619 edge_iterator *stack;
620 int num_bbs, num_insns, unreachable;
621 int too_large_failure;
622 basic_block bb;
623
624 /* Note if a block is a natural loop header. */
625 sbitmap header;
626
627 /* Note if a block is a natural inner loop header. */
628 sbitmap inner;
629
630 /* Note if a block is in the block queue. */
631 sbitmap in_queue;
632
633 /* Note if a block is in the block queue. */
634 sbitmap in_stack;
635
636 /* Perform a DFS traversal of the cfg. Identify loop headers, inner loops
637 and a mapping from block to its loop header (if the block is contained
638 in a loop, else -1).
639
640 Store results in HEADER, INNER, and MAX_HDR respectively, these will
641 be used as inputs to the second traversal.
642
643 STACK, SP and DFS_NR are only used during the first traversal. */
644
645 /* Allocate and initialize variables for the first traversal. */
646 max_hdr = XNEWVEC (int, last_basic_block);
647 dfs_nr = XCNEWVEC (int, last_basic_block);
648 stack = XNEWVEC (edge_iterator, n_edges);
649
650 inner = sbitmap_alloc (last_basic_block);
651 sbitmap_ones (inner);
652
653 header = sbitmap_alloc (last_basic_block);
654 sbitmap_zero (header);
655
656 in_queue = sbitmap_alloc (last_basic_block);
657 sbitmap_zero (in_queue);
658
659 in_stack = sbitmap_alloc (last_basic_block);
660 sbitmap_zero (in_stack);
661
662 for (i = 0; i < last_basic_block; i++)
663 max_hdr[i] = -1;
664
665 #define EDGE_PASSED(E) (ei_end_p ((E)) || ei_edge ((E))->aux)
666 #define SET_EDGE_PASSED(E) (ei_edge ((E))->aux = ei_edge ((E)))
667
668 /* DFS traversal to find inner loops in the cfg. */
669
670 current_edge = ei_start (single_succ (ENTRY_BLOCK_PTR)->succs);
671 sp = -1;
672
673 while (1)
674 {
675 if (EDGE_PASSED (current_edge))
676 {
677 /* We have reached a leaf node or a node that was already
678 processed. Pop edges off the stack until we find
679 an edge that has not yet been processed. */
680 while (sp >= 0 && EDGE_PASSED (current_edge))
681 {
682 /* Pop entry off the stack. */
683 current_edge = stack[sp--];
684 node = ei_edge (current_edge)->src->index;
685 gcc_assert (node != ENTRY_BLOCK);
686 child = ei_edge (current_edge)->dest->index;
687 gcc_assert (child != EXIT_BLOCK);
688 RESET_BIT (in_stack, child);
689 if (max_hdr[child] >= 0 && TEST_BIT (in_stack, max_hdr[child]))
690 UPDATE_LOOP_RELATIONS (node, max_hdr[child]);
691 ei_next (&current_edge);
692 }
693
694 /* See if have finished the DFS tree traversal. */
695 if (sp < 0 && EDGE_PASSED (current_edge))
696 break;
697
698 /* Nope, continue the traversal with the popped node. */
699 continue;
700 }
701
702 /* Process a node. */
703 node = ei_edge (current_edge)->src->index;
704 gcc_assert (node != ENTRY_BLOCK);
705 SET_BIT (in_stack, node);
706 dfs_nr[node] = ++count;
707
708 /* We don't traverse to the exit block. */
709 child = ei_edge (current_edge)->dest->index;
710 if (child == EXIT_BLOCK)
711 {
712 SET_EDGE_PASSED (current_edge);
713 ei_next (&current_edge);
714 continue;
715 }
716
717 /* If the successor is in the stack, then we've found a loop.
718 Mark the loop, if it is not a natural loop, then it will
719 be rejected during the second traversal. */
720 if (TEST_BIT (in_stack, child))
721 {
722 no_loops = 0;
723 SET_BIT (header, child);
724 UPDATE_LOOP_RELATIONS (node, child);
725 SET_EDGE_PASSED (current_edge);
726 ei_next (&current_edge);
727 continue;
728 }
729
730 /* If the child was already visited, then there is no need to visit
731 it again. Just update the loop relationships and restart
732 with a new edge. */
733 if (dfs_nr[child])
734 {
735 if (max_hdr[child] >= 0 && TEST_BIT (in_stack, max_hdr[child]))
736 UPDATE_LOOP_RELATIONS (node, max_hdr[child]);
737 SET_EDGE_PASSED (current_edge);
738 ei_next (&current_edge);
739 continue;
740 }
741
742 /* Push an entry on the stack and continue DFS traversal. */
743 stack[++sp] = current_edge;
744 SET_EDGE_PASSED (current_edge);
745 current_edge = ei_start (ei_edge (current_edge)->dest->succs);
746 }
747
748 /* Reset ->aux field used by EDGE_PASSED. */
749 FOR_ALL_BB (bb)
750 {
751 edge_iterator ei;
752 edge e;
753 FOR_EACH_EDGE (e, ei, bb->succs)
754 e->aux = NULL;
755 }
756
757
758 /* Another check for unreachable blocks. The earlier test in
759 is_cfg_nonregular only finds unreachable blocks that do not
760 form a loop.
761
762 The DFS traversal will mark every block that is reachable from
763 the entry node by placing a nonzero value in dfs_nr. Thus if
764 dfs_nr is zero for any block, then it must be unreachable. */
765 unreachable = 0;
766 FOR_EACH_BB (bb)
767 if (dfs_nr[bb->index] == 0)
768 {
769 unreachable = 1;
770 break;
771 }
772
773 /* Gross. To avoid wasting memory, the second pass uses the dfs_nr array
774 to hold degree counts. */
775 degree = dfs_nr;
776
777 FOR_EACH_BB (bb)
778 degree[bb->index] = EDGE_COUNT (bb->preds);
779
780 /* Do not perform region scheduling if there are any unreachable
781 blocks. */
782 if (!unreachable)
783 {
784 int *queue, *degree1 = NULL;
785 /* We use EXTENDED_RGN_HEADER as an addition to HEADER and put
786 there basic blocks, which are forced to be region heads.
787 This is done to try to assemble few smaller regions
788 from a too_large region. */
789 sbitmap extended_rgn_header = NULL;
790 bool extend_regions_p;
791
792 if (no_loops)
793 SET_BIT (header, 0);
794
795 /* Second traversal:find reducible inner loops and topologically sort
796 block of each region. */
797
798 queue = XNEWVEC (int, n_basic_blocks);
799
800 extend_regions_p = PARAM_VALUE (PARAM_MAX_SCHED_EXTEND_REGIONS_ITERS) > 0;
801 if (extend_regions_p)
802 {
803 degree1 = XNEWVEC (int, last_basic_block);
804 extended_rgn_header = sbitmap_alloc (last_basic_block);
805 sbitmap_zero (extended_rgn_header);
806 }
807
808 /* Find blocks which are inner loop headers. We still have non-reducible
809 loops to consider at this point. */
810 FOR_EACH_BB (bb)
811 {
812 if (TEST_BIT (header, bb->index) && TEST_BIT (inner, bb->index))
813 {
814 edge e;
815 edge_iterator ei;
816 basic_block jbb;
817
818 /* Now check that the loop is reducible. We do this separate
819 from finding inner loops so that we do not find a reducible
820 loop which contains an inner non-reducible loop.
821
822 A simple way to find reducible/natural loops is to verify
823 that each block in the loop is dominated by the loop
824 header.
825
826 If there exists a block that is not dominated by the loop
827 header, then the block is reachable from outside the loop
828 and thus the loop is not a natural loop. */
829 FOR_EACH_BB (jbb)
830 {
831 /* First identify blocks in the loop, except for the loop
832 entry block. */
833 if (bb->index == max_hdr[jbb->index] && bb != jbb)
834 {
835 /* Now verify that the block is dominated by the loop
836 header. */
837 if (!dominated_by_p (CDI_DOMINATORS, jbb, bb))
838 break;
839 }
840 }
841
842 /* If we exited the loop early, then I is the header of
843 a non-reducible loop and we should quit processing it
844 now. */
845 if (jbb != EXIT_BLOCK_PTR)
846 continue;
847
848 /* I is a header of an inner loop, or block 0 in a subroutine
849 with no loops at all. */
850 head = tail = -1;
851 too_large_failure = 0;
852 loop_head = max_hdr[bb->index];
853
854 if (extend_regions_p)
855 /* We save degree in case when we meet a too_large region
856 and cancel it. We need a correct degree later when
857 calling extend_rgns. */
858 memcpy (degree1, degree, last_basic_block * sizeof (int));
859
860 /* Decrease degree of all I's successors for topological
861 ordering. */
862 FOR_EACH_EDGE (e, ei, bb->succs)
863 if (e->dest != EXIT_BLOCK_PTR)
864 --degree[e->dest->index];
865
866 /* Estimate # insns, and count # blocks in the region. */
867 num_bbs = 1;
868 num_insns = common_sched_info->estimate_number_of_insns (bb);
869
870 /* Find all loop latches (blocks with back edges to the loop
871 header) or all the leaf blocks in the cfg has no loops.
872
873 Place those blocks into the queue. */
874 if (no_loops)
875 {
876 FOR_EACH_BB (jbb)
877 /* Leaf nodes have only a single successor which must
878 be EXIT_BLOCK. */
879 if (single_succ_p (jbb)
880 && single_succ (jbb) == EXIT_BLOCK_PTR)
881 {
882 queue[++tail] = jbb->index;
883 SET_BIT (in_queue, jbb->index);
884
885 if (too_large (jbb->index, &num_bbs, &num_insns))
886 {
887 too_large_failure = 1;
888 break;
889 }
890 }
891 }
892 else
893 {
894 edge e;
895
896 FOR_EACH_EDGE (e, ei, bb->preds)
897 {
898 if (e->src == ENTRY_BLOCK_PTR)
899 continue;
900
901 node = e->src->index;
902
903 if (max_hdr[node] == loop_head && node != bb->index)
904 {
905 /* This is a loop latch. */
906 queue[++tail] = node;
907 SET_BIT (in_queue, node);
908
909 if (too_large (node, &num_bbs, &num_insns))
910 {
911 too_large_failure = 1;
912 break;
913 }
914 }
915 }
916 }
917
918 /* Now add all the blocks in the loop to the queue.
919
920 We know the loop is a natural loop; however the algorithm
921 above will not always mark certain blocks as being in the
922 loop. Consider:
923 node children
924 a b,c
925 b c
926 c a,d
927 d b
928
929 The algorithm in the DFS traversal may not mark B & D as part
930 of the loop (i.e. they will not have max_hdr set to A).
931
932 We know they can not be loop latches (else they would have
933 had max_hdr set since they'd have a backedge to a dominator
934 block). So we don't need them on the initial queue.
935
936 We know they are part of the loop because they are dominated
937 by the loop header and can be reached by a backwards walk of
938 the edges starting with nodes on the initial queue.
939
940 It is safe and desirable to include those nodes in the
941 loop/scheduling region. To do so we would need to decrease
942 the degree of a node if it is the target of a backedge
943 within the loop itself as the node is placed in the queue.
944
945 We do not do this because I'm not sure that the actual
946 scheduling code will properly handle this case. ?!? */
947
948 while (head < tail && !too_large_failure)
949 {
950 edge e;
951 child = queue[++head];
952
953 FOR_EACH_EDGE (e, ei, BASIC_BLOCK (child)->preds)
954 {
955 node = e->src->index;
956
957 /* See discussion above about nodes not marked as in
958 this loop during the initial DFS traversal. */
959 if (e->src == ENTRY_BLOCK_PTR
960 || max_hdr[node] != loop_head)
961 {
962 tail = -1;
963 break;
964 }
965 else if (!TEST_BIT (in_queue, node) && node != bb->index)
966 {
967 queue[++tail] = node;
968 SET_BIT (in_queue, node);
969
970 if (too_large (node, &num_bbs, &num_insns))
971 {
972 too_large_failure = 1;
973 break;
974 }
975 }
976 }
977 }
978
979 if (tail >= 0 && !too_large_failure)
980 {
981 /* Place the loop header into list of region blocks. */
982 degree[bb->index] = -1;
983 rgn_bb_table[idx] = bb->index;
984 RGN_NR_BLOCKS (nr_regions) = num_bbs;
985 RGN_BLOCKS (nr_regions) = idx++;
986 RGN_DONT_CALC_DEPS (nr_regions) = 0;
987 RGN_HAS_REAL_EBB (nr_regions) = 0;
988 CONTAINING_RGN (bb->index) = nr_regions;
989 BLOCK_TO_BB (bb->index) = count = 0;
990
991 /* Remove blocks from queue[] when their in degree
992 becomes zero. Repeat until no blocks are left on the
993 list. This produces a topological list of blocks in
994 the region. */
995 while (tail >= 0)
996 {
997 if (head < 0)
998 head = tail;
999 child = queue[head];
1000 if (degree[child] == 0)
1001 {
1002 edge e;
1003
1004 degree[child] = -1;
1005 rgn_bb_table[idx++] = child;
1006 BLOCK_TO_BB (child) = ++count;
1007 CONTAINING_RGN (child) = nr_regions;
1008 queue[head] = queue[tail--];
1009
1010 FOR_EACH_EDGE (e, ei, BASIC_BLOCK (child)->succs)
1011 if (e->dest != EXIT_BLOCK_PTR)
1012 --degree[e->dest->index];
1013 }
1014 else
1015 --head;
1016 }
1017 ++nr_regions;
1018 }
1019 else if (extend_regions_p)
1020 {
1021 /* Restore DEGREE. */
1022 int *t = degree;
1023
1024 degree = degree1;
1025 degree1 = t;
1026
1027 /* And force successors of BB to be region heads.
1028 This may provide several smaller regions instead
1029 of one too_large region. */
1030 FOR_EACH_EDGE (e, ei, bb->succs)
1031 if (e->dest != EXIT_BLOCK_PTR)
1032 SET_BIT (extended_rgn_header, e->dest->index);
1033 }
1034 }
1035 }
1036 free (queue);
1037
1038 if (extend_regions_p)
1039 {
1040 free (degree1);
1041
1042 sbitmap_a_or_b (header, header, extended_rgn_header);
1043 sbitmap_free (extended_rgn_header);
1044
1045 extend_rgns (degree, &idx, header, max_hdr);
1046 }
1047 }
1048
1049 /* Any block that did not end up in a region is placed into a region
1050 by itself. */
1051 FOR_EACH_BB (bb)
1052 if (degree[bb->index] >= 0)
1053 {
1054 rgn_bb_table[idx] = bb->index;
1055 RGN_NR_BLOCKS (nr_regions) = 1;
1056 RGN_BLOCKS (nr_regions) = idx++;
1057 RGN_DONT_CALC_DEPS (nr_regions) = 0;
1058 RGN_HAS_REAL_EBB (nr_regions) = 0;
1059 CONTAINING_RGN (bb->index) = nr_regions++;
1060 BLOCK_TO_BB (bb->index) = 0;
1061 }
1062
1063 free (max_hdr);
1064 free (degree);
1065 free (stack);
1066 sbitmap_free (header);
1067 sbitmap_free (inner);
1068 sbitmap_free (in_queue);
1069 sbitmap_free (in_stack);
1070 }
1071
1072
1073 /* Wrapper function.
1074 If FLAG_SEL_SCHED_PIPELINING is set, then use custom function to form
1075 regions. Otherwise just call find_rgns_haifa. */
1076 static void
1077 find_rgns (void)
1078 {
1079 if (sel_sched_p () && flag_sel_sched_pipelining)
1080 sel_find_rgns ();
1081 else
1082 haifa_find_rgns ();
1083 }
1084
1085 static int gather_region_statistics (int **);
1086 static void print_region_statistics (int *, int, int *, int);
1087
1088 /* Calculate the histogram that shows the number of regions having the
1089 given number of basic blocks, and store it in the RSP array. Return
1090 the size of this array. */
1091 static int
1092 gather_region_statistics (int **rsp)
1093 {
1094 int i, *a = 0, a_sz = 0;
1095
1096 /* a[i] is the number of regions that have (i + 1) basic blocks. */
1097 for (i = 0; i < nr_regions; i++)
1098 {
1099 int nr_blocks = RGN_NR_BLOCKS (i);
1100
1101 gcc_assert (nr_blocks >= 1);
1102
1103 if (nr_blocks > a_sz)
1104 {
1105 a = XRESIZEVEC (int, a, nr_blocks);
1106 do
1107 a[a_sz++] = 0;
1108 while (a_sz != nr_blocks);
1109 }
1110
1111 a[nr_blocks - 1]++;
1112 }
1113
1114 *rsp = a;
1115 return a_sz;
1116 }
1117
1118 /* Print regions statistics. S1 and S2 denote the data before and after
1119 calling extend_rgns, respectively. */
1120 static void
1121 print_region_statistics (int *s1, int s1_sz, int *s2, int s2_sz)
1122 {
1123 int i;
1124
1125 /* We iterate until s2_sz because extend_rgns does not decrease
1126 the maximal region size. */
1127 for (i = 1; i < s2_sz; i++)
1128 {
1129 int n1, n2;
1130
1131 n2 = s2[i];
1132
1133 if (n2 == 0)
1134 continue;
1135
1136 if (i >= s1_sz)
1137 n1 = 0;
1138 else
1139 n1 = s1[i];
1140
1141 fprintf (sched_dump, ";; Region extension statistics: size %d: " \
1142 "was %d + %d more\n", i + 1, n1, n2 - n1);
1143 }
1144 }
1145
1146 /* Extend regions.
1147 DEGREE - Array of incoming edge count, considering only
1148 the edges, that don't have their sources in formed regions yet.
1149 IDXP - pointer to the next available index in rgn_bb_table.
1150 HEADER - set of all region heads.
1151 LOOP_HDR - mapping from block to the containing loop
1152 (two blocks can reside within one region if they have
1153 the same loop header). */
1154 void
1155 extend_rgns (int *degree, int *idxp, sbitmap header, int *loop_hdr)
1156 {
1157 int *order, i, rescan = 0, idx = *idxp, iter = 0, max_iter, *max_hdr;
1158 int nblocks = n_basic_blocks - NUM_FIXED_BLOCKS;
1159
1160 max_iter = PARAM_VALUE (PARAM_MAX_SCHED_EXTEND_REGIONS_ITERS);
1161
1162 max_hdr = XNEWVEC (int, last_basic_block);
1163
1164 order = XNEWVEC (int, last_basic_block);
1165 post_order_compute (order, false, false);
1166
1167 for (i = nblocks - 1; i >= 0; i--)
1168 {
1169 int bbn = order[i];
1170 if (degree[bbn] >= 0)
1171 {
1172 max_hdr[bbn] = bbn;
1173 rescan = 1;
1174 }
1175 else
1176 /* This block already was processed in find_rgns. */
1177 max_hdr[bbn] = -1;
1178 }
1179
1180 /* The idea is to topologically walk through CFG in top-down order.
1181 During the traversal, if all the predecessors of a node are
1182 marked to be in the same region (they all have the same max_hdr),
1183 then current node is also marked to be a part of that region.
1184 Otherwise the node starts its own region.
1185 CFG should be traversed until no further changes are made. On each
1186 iteration the set of the region heads is extended (the set of those
1187 blocks that have max_hdr[bbi] == bbi). This set is upper bounded by the
1188 set of all basic blocks, thus the algorithm is guaranteed to
1189 terminate. */
1190
1191 while (rescan && iter < max_iter)
1192 {
1193 rescan = 0;
1194
1195 for (i = nblocks - 1; i >= 0; i--)
1196 {
1197 edge e;
1198 edge_iterator ei;
1199 int bbn = order[i];
1200
1201 if (max_hdr[bbn] != -1 && !TEST_BIT (header, bbn))
1202 {
1203 int hdr = -1;
1204
1205 FOR_EACH_EDGE (e, ei, BASIC_BLOCK (bbn)->preds)
1206 {
1207 int predn = e->src->index;
1208
1209 if (predn != ENTRY_BLOCK
1210 /* If pred wasn't processed in find_rgns. */
1211 && max_hdr[predn] != -1
1212 /* And pred and bb reside in the same loop.
1213 (Or out of any loop). */
1214 && loop_hdr[bbn] == loop_hdr[predn])
1215 {
1216 if (hdr == -1)
1217 /* Then bb extends the containing region of pred. */
1218 hdr = max_hdr[predn];
1219 else if (hdr != max_hdr[predn])
1220 /* Too bad, there are at least two predecessors
1221 that reside in different regions. Thus, BB should
1222 begin its own region. */
1223 {
1224 hdr = bbn;
1225 break;
1226 }
1227 }
1228 else
1229 /* BB starts its own region. */
1230 {
1231 hdr = bbn;
1232 break;
1233 }
1234 }
1235
1236 if (hdr == bbn)
1237 {
1238 /* If BB start its own region,
1239 update set of headers with BB. */
1240 SET_BIT (header, bbn);
1241 rescan = 1;
1242 }
1243 else
1244 gcc_assert (hdr != -1);
1245
1246 max_hdr[bbn] = hdr;
1247 }
1248 }
1249
1250 iter++;
1251 }
1252
1253 /* Statistics were gathered on the SPEC2000 package of tests with
1254 mainline weekly snapshot gcc-4.1-20051015 on ia64.
1255
1256 Statistics for SPECint:
1257 1 iteration : 1751 cases (38.7%)
1258 2 iterations: 2770 cases (61.3%)
1259 Blocks wrapped in regions by find_rgns without extension: 18295 blocks
1260 Blocks wrapped in regions by 2 iterations in extend_rgns: 23821 blocks
1261 (We don't count single block regions here).
1262
1263 Statistics for SPECfp:
1264 1 iteration : 621 cases (35.9%)
1265 2 iterations: 1110 cases (64.1%)
1266 Blocks wrapped in regions by find_rgns without extension: 6476 blocks
1267 Blocks wrapped in regions by 2 iterations in extend_rgns: 11155 blocks
1268 (We don't count single block regions here).
1269
1270 By default we do at most 2 iterations.
1271 This can be overridden with max-sched-extend-regions-iters parameter:
1272 0 - disable region extension,
1273 N > 0 - do at most N iterations. */
1274
1275 if (sched_verbose && iter != 0)
1276 fprintf (sched_dump, ";; Region extension iterations: %d%s\n", iter,
1277 rescan ? "... failed" : "");
1278
1279 if (!rescan && iter != 0)
1280 {
1281 int *s1 = NULL, s1_sz = 0;
1282
1283 /* Save the old statistics for later printout. */
1284 if (sched_verbose >= 6)
1285 s1_sz = gather_region_statistics (&s1);
1286
1287 /* We have succeeded. Now assemble the regions. */
1288 for (i = nblocks - 1; i >= 0; i--)
1289 {
1290 int bbn = order[i];
1291
1292 if (max_hdr[bbn] == bbn)
1293 /* BBN is a region head. */
1294 {
1295 edge e;
1296 edge_iterator ei;
1297 int num_bbs = 0, j, num_insns = 0, large;
1298
1299 large = too_large (bbn, &num_bbs, &num_insns);
1300
1301 degree[bbn] = -1;
1302 rgn_bb_table[idx] = bbn;
1303 RGN_BLOCKS (nr_regions) = idx++;
1304 RGN_DONT_CALC_DEPS (nr_regions) = 0;
1305 RGN_HAS_REAL_EBB (nr_regions) = 0;
1306 CONTAINING_RGN (bbn) = nr_regions;
1307 BLOCK_TO_BB (bbn) = 0;
1308
1309 FOR_EACH_EDGE (e, ei, BASIC_BLOCK (bbn)->succs)
1310 if (e->dest != EXIT_BLOCK_PTR)
1311 degree[e->dest->index]--;
1312
1313 if (!large)
1314 /* Here we check whether the region is too_large. */
1315 for (j = i - 1; j >= 0; j--)
1316 {
1317 int succn = order[j];
1318 if (max_hdr[succn] == bbn)
1319 {
1320 if ((large = too_large (succn, &num_bbs, &num_insns)))
1321 break;
1322 }
1323 }
1324
1325 if (large)
1326 /* If the region is too_large, then wrap every block of
1327 the region into single block region.
1328 Here we wrap region head only. Other blocks are
1329 processed in the below cycle. */
1330 {
1331 RGN_NR_BLOCKS (nr_regions) = 1;
1332 nr_regions++;
1333 }
1334
1335 num_bbs = 1;
1336
1337 for (j = i - 1; j >= 0; j--)
1338 {
1339 int succn = order[j];
1340
1341 if (max_hdr[succn] == bbn)
1342 /* This cycle iterates over all basic blocks, that
1343 are supposed to be in the region with head BBN,
1344 and wraps them into that region (or in single
1345 block region). */
1346 {
1347 gcc_assert (degree[succn] == 0);
1348
1349 degree[succn] = -1;
1350 rgn_bb_table[idx] = succn;
1351 BLOCK_TO_BB (succn) = large ? 0 : num_bbs++;
1352 CONTAINING_RGN (succn) = nr_regions;
1353
1354 if (large)
1355 /* Wrap SUCCN into single block region. */
1356 {
1357 RGN_BLOCKS (nr_regions) = idx;
1358 RGN_NR_BLOCKS (nr_regions) = 1;
1359 RGN_DONT_CALC_DEPS (nr_regions) = 0;
1360 RGN_HAS_REAL_EBB (nr_regions) = 0;
1361 nr_regions++;
1362 }
1363
1364 idx++;
1365
1366 FOR_EACH_EDGE (e, ei, BASIC_BLOCK (succn)->succs)
1367 if (e->dest != EXIT_BLOCK_PTR)
1368 degree[e->dest->index]--;
1369 }
1370 }
1371
1372 if (!large)
1373 {
1374 RGN_NR_BLOCKS (nr_regions) = num_bbs;
1375 nr_regions++;
1376 }
1377 }
1378 }
1379
1380 if (sched_verbose >= 6)
1381 {
1382 int *s2, s2_sz;
1383
1384 /* Get the new statistics and print the comparison with the
1385 one before calling this function. */
1386 s2_sz = gather_region_statistics (&s2);
1387 print_region_statistics (s1, s1_sz, s2, s2_sz);
1388 free (s1);
1389 free (s2);
1390 }
1391 }
1392
1393 free (order);
1394 free (max_hdr);
1395
1396 *idxp = idx;
1397 }
1398
1399 /* Functions for regions scheduling information. */
1400
1401 /* Compute dominators, probability, and potential-split-edges of bb.
1402 Assume that these values were already computed for bb's predecessors. */
1403
1404 static void
1405 compute_dom_prob_ps (int bb)
1406 {
1407 edge_iterator in_ei;
1408 edge in_edge;
1409
1410 /* We shouldn't have any real ebbs yet. */
1411 gcc_assert (ebb_head [bb] == bb + current_blocks);
1412
1413 if (IS_RGN_ENTRY (bb))
1414 {
1415 SET_BIT (dom[bb], 0);
1416 prob[bb] = REG_BR_PROB_BASE;
1417 return;
1418 }
1419
1420 prob[bb] = 0;
1421
1422 /* Initialize dom[bb] to '111..1'. */
1423 sbitmap_ones (dom[bb]);
1424
1425 FOR_EACH_EDGE (in_edge, in_ei, BASIC_BLOCK (BB_TO_BLOCK (bb))->preds)
1426 {
1427 int pred_bb;
1428 edge out_edge;
1429 edge_iterator out_ei;
1430
1431 if (in_edge->src == ENTRY_BLOCK_PTR)
1432 continue;
1433
1434 pred_bb = BLOCK_TO_BB (in_edge->src->index);
1435 sbitmap_a_and_b (dom[bb], dom[bb], dom[pred_bb]);
1436 sbitmap_a_or_b (ancestor_edges[bb],
1437 ancestor_edges[bb], ancestor_edges[pred_bb]);
1438
1439 SET_BIT (ancestor_edges[bb], EDGE_TO_BIT (in_edge));
1440
1441 sbitmap_a_or_b (pot_split[bb], pot_split[bb], pot_split[pred_bb]);
1442
1443 FOR_EACH_EDGE (out_edge, out_ei, in_edge->src->succs)
1444 SET_BIT (pot_split[bb], EDGE_TO_BIT (out_edge));
1445
1446 prob[bb] += ((prob[pred_bb] * in_edge->probability) / REG_BR_PROB_BASE);
1447 }
1448
1449 SET_BIT (dom[bb], bb);
1450 sbitmap_difference (pot_split[bb], pot_split[bb], ancestor_edges[bb]);
1451
1452 if (sched_verbose >= 2)
1453 fprintf (sched_dump, ";; bb_prob(%d, %d) = %3d\n", bb, BB_TO_BLOCK (bb),
1454 (100 * prob[bb]) / REG_BR_PROB_BASE);
1455 }
1456
1457 /* Functions for target info. */
1458
1459 /* Compute in BL the list of split-edges of bb_src relatively to bb_trg.
1460 Note that bb_trg dominates bb_src. */
1461
1462 static void
1463 split_edges (int bb_src, int bb_trg, edgelst *bl)
1464 {
1465 sbitmap src = sbitmap_alloc (pot_split[bb_src]->n_bits);
1466 sbitmap_copy (src, pot_split[bb_src]);
1467
1468 sbitmap_difference (src, src, pot_split[bb_trg]);
1469 extract_edgelst (src, bl);
1470 sbitmap_free (src);
1471 }
1472
1473 /* Find the valid candidate-source-blocks for the target block TRG, compute
1474 their probability, and check if they are speculative or not.
1475 For speculative sources, compute their update-blocks and split-blocks. */
1476
1477 static void
1478 compute_trg_info (int trg)
1479 {
1480 candidate *sp;
1481 edgelst el = { NULL, 0 };
1482 int i, j, k, update_idx;
1483 basic_block block;
1484 sbitmap visited;
1485 edge_iterator ei;
1486 edge e;
1487
1488 candidate_table = XNEWVEC (candidate, current_nr_blocks);
1489
1490 bblst_last = 0;
1491 /* bblst_table holds split blocks and update blocks for each block after
1492 the current one in the region. split blocks and update blocks are
1493 the TO blocks of region edges, so there can be at most rgn_nr_edges
1494 of them. */
1495 bblst_size = (current_nr_blocks - target_bb) * rgn_nr_edges;
1496 bblst_table = XNEWVEC (basic_block, bblst_size);
1497
1498 edgelst_last = 0;
1499 edgelst_table = XNEWVEC (edge, rgn_nr_edges);
1500
1501 /* Define some of the fields for the target bb as well. */
1502 sp = candidate_table + trg;
1503 sp->is_valid = 1;
1504 sp->is_speculative = 0;
1505 sp->src_prob = REG_BR_PROB_BASE;
1506
1507 visited = sbitmap_alloc (last_basic_block);
1508
1509 for (i = trg + 1; i < current_nr_blocks; i++)
1510 {
1511 sp = candidate_table + i;
1512
1513 sp->is_valid = IS_DOMINATED (i, trg);
1514 if (sp->is_valid)
1515 {
1516 int tf = prob[trg], cf = prob[i];
1517
1518 /* In CFGs with low probability edges TF can possibly be zero. */
1519 sp->src_prob = (tf ? ((cf * REG_BR_PROB_BASE) / tf) : 0);
1520 sp->is_valid = (sp->src_prob >= min_spec_prob);
1521 }
1522
1523 if (sp->is_valid)
1524 {
1525 split_edges (i, trg, &el);
1526 sp->is_speculative = (el.nr_members) ? 1 : 0;
1527 if (sp->is_speculative && !flag_schedule_speculative)
1528 sp->is_valid = 0;
1529 }
1530
1531 if (sp->is_valid)
1532 {
1533 /* Compute split blocks and store them in bblst_table.
1534 The TO block of every split edge is a split block. */
1535 sp->split_bbs.first_member = &bblst_table[bblst_last];
1536 sp->split_bbs.nr_members = el.nr_members;
1537 for (j = 0; j < el.nr_members; bblst_last++, j++)
1538 bblst_table[bblst_last] = el.first_member[j]->dest;
1539 sp->update_bbs.first_member = &bblst_table[bblst_last];
1540
1541 /* Compute update blocks and store them in bblst_table.
1542 For every split edge, look at the FROM block, and check
1543 all out edges. For each out edge that is not a split edge,
1544 add the TO block to the update block list. This list can end
1545 up with a lot of duplicates. We need to weed them out to avoid
1546 overrunning the end of the bblst_table. */
1547
1548 update_idx = 0;
1549 sbitmap_zero (visited);
1550 for (j = 0; j < el.nr_members; j++)
1551 {
1552 block = el.first_member[j]->src;
1553 FOR_EACH_EDGE (e, ei, block->succs)
1554 {
1555 if (!TEST_BIT (visited, e->dest->index))
1556 {
1557 for (k = 0; k < el.nr_members; k++)
1558 if (e == el.first_member[k])
1559 break;
1560
1561 if (k >= el.nr_members)
1562 {
1563 bblst_table[bblst_last++] = e->dest;
1564 SET_BIT (visited, e->dest->index);
1565 update_idx++;
1566 }
1567 }
1568 }
1569 }
1570 sp->update_bbs.nr_members = update_idx;
1571
1572 /* Make sure we didn't overrun the end of bblst_table. */
1573 gcc_assert (bblst_last <= bblst_size);
1574 }
1575 else
1576 {
1577 sp->split_bbs.nr_members = sp->update_bbs.nr_members = 0;
1578
1579 sp->is_speculative = 0;
1580 sp->src_prob = 0;
1581 }
1582 }
1583
1584 sbitmap_free (visited);
1585 }
1586
1587 /* Free the computed target info. */
1588 static void
1589 free_trg_info (void)
1590 {
1591 free (candidate_table);
1592 free (bblst_table);
1593 free (edgelst_table);
1594 }
1595
1596 /* Print candidates info, for debugging purposes. Callable from debugger. */
1597
1598 DEBUG_FUNCTION void
1599 debug_candidate (int i)
1600 {
1601 if (!candidate_table[i].is_valid)
1602 return;
1603
1604 if (candidate_table[i].is_speculative)
1605 {
1606 int j;
1607 fprintf (sched_dump, "src b %d bb %d speculative \n", BB_TO_BLOCK (i), i);
1608
1609 fprintf (sched_dump, "split path: ");
1610 for (j = 0; j < candidate_table[i].split_bbs.nr_members; j++)
1611 {
1612 int b = candidate_table[i].split_bbs.first_member[j]->index;
1613
1614 fprintf (sched_dump, " %d ", b);
1615 }
1616 fprintf (sched_dump, "\n");
1617
1618 fprintf (sched_dump, "update path: ");
1619 for (j = 0; j < candidate_table[i].update_bbs.nr_members; j++)
1620 {
1621 int b = candidate_table[i].update_bbs.first_member[j]->index;
1622
1623 fprintf (sched_dump, " %d ", b);
1624 }
1625 fprintf (sched_dump, "\n");
1626 }
1627 else
1628 {
1629 fprintf (sched_dump, " src %d equivalent\n", BB_TO_BLOCK (i));
1630 }
1631 }
1632
1633 /* Print candidates info, for debugging purposes. Callable from debugger. */
1634
1635 DEBUG_FUNCTION void
1636 debug_candidates (int trg)
1637 {
1638 int i;
1639
1640 fprintf (sched_dump, "----------- candidate table: target: b=%d bb=%d ---\n",
1641 BB_TO_BLOCK (trg), trg);
1642 for (i = trg + 1; i < current_nr_blocks; i++)
1643 debug_candidate (i);
1644 }
1645
1646 /* Functions for speculative scheduling. */
1647
1648 static bitmap_head not_in_df;
1649
1650 /* Return 0 if x is a set of a register alive in the beginning of one
1651 of the split-blocks of src, otherwise return 1. */
1652
1653 static int
1654 check_live_1 (int src, rtx x)
1655 {
1656 int i;
1657 int regno;
1658 rtx reg = SET_DEST (x);
1659
1660 if (reg == 0)
1661 return 1;
1662
1663 while (GET_CODE (reg) == SUBREG
1664 || GET_CODE (reg) == ZERO_EXTRACT
1665 || GET_CODE (reg) == STRICT_LOW_PART)
1666 reg = XEXP (reg, 0);
1667
1668 if (GET_CODE (reg) == PARALLEL)
1669 {
1670 int i;
1671
1672 for (i = XVECLEN (reg, 0) - 1; i >= 0; i--)
1673 if (XEXP (XVECEXP (reg, 0, i), 0) != 0)
1674 if (check_live_1 (src, XEXP (XVECEXP (reg, 0, i), 0)))
1675 return 1;
1676
1677 return 0;
1678 }
1679
1680 if (!REG_P (reg))
1681 return 1;
1682
1683 regno = REGNO (reg);
1684
1685 if (regno < FIRST_PSEUDO_REGISTER && global_regs[regno])
1686 {
1687 /* Global registers are assumed live. */
1688 return 0;
1689 }
1690 else
1691 {
1692 if (regno < FIRST_PSEUDO_REGISTER)
1693 {
1694 /* Check for hard registers. */
1695 int j = hard_regno_nregs[regno][GET_MODE (reg)];
1696 while (--j >= 0)
1697 {
1698 for (i = 0; i < candidate_table[src].split_bbs.nr_members; i++)
1699 {
1700 basic_block b = candidate_table[src].split_bbs.first_member[i];
1701 int t = bitmap_bit_p (&not_in_df, b->index);
1702
1703 /* We can have split blocks, that were recently generated.
1704 Such blocks are always outside current region. */
1705 gcc_assert (!t || (CONTAINING_RGN (b->index)
1706 != CONTAINING_RGN (BB_TO_BLOCK (src))));
1707
1708 if (t || REGNO_REG_SET_P (df_get_live_in (b), regno + j))
1709 return 0;
1710 }
1711 }
1712 }
1713 else
1714 {
1715 /* Check for pseudo registers. */
1716 for (i = 0; i < candidate_table[src].split_bbs.nr_members; i++)
1717 {
1718 basic_block b = candidate_table[src].split_bbs.first_member[i];
1719 int t = bitmap_bit_p (&not_in_df, b->index);
1720
1721 gcc_assert (!t || (CONTAINING_RGN (b->index)
1722 != CONTAINING_RGN (BB_TO_BLOCK (src))));
1723
1724 if (t || REGNO_REG_SET_P (df_get_live_in (b), regno))
1725 return 0;
1726 }
1727 }
1728 }
1729
1730 return 1;
1731 }
1732
1733 /* If x is a set of a register R, mark that R is alive in the beginning
1734 of every update-block of src. */
1735
1736 static void
1737 update_live_1 (int src, rtx x)
1738 {
1739 int i;
1740 int regno;
1741 rtx reg = SET_DEST (x);
1742
1743 if (reg == 0)
1744 return;
1745
1746 while (GET_CODE (reg) == SUBREG
1747 || GET_CODE (reg) == ZERO_EXTRACT
1748 || GET_CODE (reg) == STRICT_LOW_PART)
1749 reg = XEXP (reg, 0);
1750
1751 if (GET_CODE (reg) == PARALLEL)
1752 {
1753 int i;
1754
1755 for (i = XVECLEN (reg, 0) - 1; i >= 0; i--)
1756 if (XEXP (XVECEXP (reg, 0, i), 0) != 0)
1757 update_live_1 (src, XEXP (XVECEXP (reg, 0, i), 0));
1758
1759 return;
1760 }
1761
1762 if (!REG_P (reg))
1763 return;
1764
1765 /* Global registers are always live, so the code below does not apply
1766 to them. */
1767
1768 regno = REGNO (reg);
1769
1770 if (regno >= FIRST_PSEUDO_REGISTER || !global_regs[regno])
1771 {
1772 if (regno < FIRST_PSEUDO_REGISTER)
1773 {
1774 int j = hard_regno_nregs[regno][GET_MODE (reg)];
1775 while (--j >= 0)
1776 {
1777 for (i = 0; i < candidate_table[src].update_bbs.nr_members; i++)
1778 {
1779 basic_block b = candidate_table[src].update_bbs.first_member[i];
1780
1781 SET_REGNO_REG_SET (df_get_live_in (b), regno + j);
1782 }
1783 }
1784 }
1785 else
1786 {
1787 for (i = 0; i < candidate_table[src].update_bbs.nr_members; i++)
1788 {
1789 basic_block b = candidate_table[src].update_bbs.first_member[i];
1790
1791 SET_REGNO_REG_SET (df_get_live_in (b), regno);
1792 }
1793 }
1794 }
1795 }
1796
1797 /* Return 1 if insn can be speculatively moved from block src to trg,
1798 otherwise return 0. Called before first insertion of insn to
1799 ready-list or before the scheduling. */
1800
1801 static int
1802 check_live (rtx insn, int src)
1803 {
1804 /* Find the registers set by instruction. */
1805 if (GET_CODE (PATTERN (insn)) == SET
1806 || GET_CODE (PATTERN (insn)) == CLOBBER)
1807 return check_live_1 (src, PATTERN (insn));
1808 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
1809 {
1810 int j;
1811 for (j = XVECLEN (PATTERN (insn), 0) - 1; j >= 0; j--)
1812 if ((GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == SET
1813 || GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == CLOBBER)
1814 && !check_live_1 (src, XVECEXP (PATTERN (insn), 0, j)))
1815 return 0;
1816
1817 return 1;
1818 }
1819
1820 return 1;
1821 }
1822
1823 /* Update the live registers info after insn was moved speculatively from
1824 block src to trg. */
1825
1826 static void
1827 update_live (rtx insn, int src)
1828 {
1829 /* Find the registers set by instruction. */
1830 if (GET_CODE (PATTERN (insn)) == SET
1831 || GET_CODE (PATTERN (insn)) == CLOBBER)
1832 update_live_1 (src, PATTERN (insn));
1833 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
1834 {
1835 int j;
1836 for (j = XVECLEN (PATTERN (insn), 0) - 1; j >= 0; j--)
1837 if (GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == SET
1838 || GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == CLOBBER)
1839 update_live_1 (src, XVECEXP (PATTERN (insn), 0, j));
1840 }
1841 }
1842
1843 /* Nonzero if block bb_to is equal to, or reachable from block bb_from. */
1844 #define IS_REACHABLE(bb_from, bb_to) \
1845 (bb_from == bb_to \
1846 || IS_RGN_ENTRY (bb_from) \
1847 || (TEST_BIT (ancestor_edges[bb_to], \
1848 EDGE_TO_BIT (single_pred_edge (BASIC_BLOCK (BB_TO_BLOCK (bb_from)))))))
1849
1850 /* Turns on the fed_by_spec_load flag for insns fed by load_insn. */
1851
1852 static void
1853 set_spec_fed (rtx load_insn)
1854 {
1855 sd_iterator_def sd_it;
1856 dep_t dep;
1857
1858 FOR_EACH_DEP (load_insn, SD_LIST_FORW, sd_it, dep)
1859 if (DEP_TYPE (dep) == REG_DEP_TRUE)
1860 FED_BY_SPEC_LOAD (DEP_CON (dep)) = 1;
1861 }
1862
1863 /* On the path from the insn to load_insn_bb, find a conditional
1864 branch depending on insn, that guards the speculative load. */
1865
1866 static int
1867 find_conditional_protection (rtx insn, int load_insn_bb)
1868 {
1869 sd_iterator_def sd_it;
1870 dep_t dep;
1871
1872 /* Iterate through DEF-USE forward dependences. */
1873 FOR_EACH_DEP (insn, SD_LIST_FORW, sd_it, dep)
1874 {
1875 rtx next = DEP_CON (dep);
1876
1877 if ((CONTAINING_RGN (BLOCK_NUM (next)) ==
1878 CONTAINING_RGN (BB_TO_BLOCK (load_insn_bb)))
1879 && IS_REACHABLE (INSN_BB (next), load_insn_bb)
1880 && load_insn_bb != INSN_BB (next)
1881 && DEP_TYPE (dep) == REG_DEP_TRUE
1882 && (JUMP_P (next)
1883 || find_conditional_protection (next, load_insn_bb)))
1884 return 1;
1885 }
1886 return 0;
1887 } /* find_conditional_protection */
1888
1889 /* Returns 1 if the same insn1 that participates in the computation
1890 of load_insn's address is feeding a conditional branch that is
1891 guarding on load_insn. This is true if we find two DEF-USE
1892 chains:
1893 insn1 -> ... -> conditional-branch
1894 insn1 -> ... -> load_insn,
1895 and if a flow path exists:
1896 insn1 -> ... -> conditional-branch -> ... -> load_insn,
1897 and if insn1 is on the path
1898 region-entry -> ... -> bb_trg -> ... load_insn.
1899
1900 Locate insn1 by climbing on INSN_BACK_DEPS from load_insn.
1901 Locate the branch by following INSN_FORW_DEPS from insn1. */
1902
1903 static int
1904 is_conditionally_protected (rtx load_insn, int bb_src, int bb_trg)
1905 {
1906 sd_iterator_def sd_it;
1907 dep_t dep;
1908
1909 FOR_EACH_DEP (load_insn, SD_LIST_BACK, sd_it, dep)
1910 {
1911 rtx insn1 = DEP_PRO (dep);
1912
1913 /* Must be a DEF-USE dependence upon non-branch. */
1914 if (DEP_TYPE (dep) != REG_DEP_TRUE
1915 || JUMP_P (insn1))
1916 continue;
1917
1918 /* Must exist a path: region-entry -> ... -> bb_trg -> ... load_insn. */
1919 if (INSN_BB (insn1) == bb_src
1920 || (CONTAINING_RGN (BLOCK_NUM (insn1))
1921 != CONTAINING_RGN (BB_TO_BLOCK (bb_src)))
1922 || (!IS_REACHABLE (bb_trg, INSN_BB (insn1))
1923 && !IS_REACHABLE (INSN_BB (insn1), bb_trg)))
1924 continue;
1925
1926 /* Now search for the conditional-branch. */
1927 if (find_conditional_protection (insn1, bb_src))
1928 return 1;
1929
1930 /* Recursive step: search another insn1, "above" current insn1. */
1931 return is_conditionally_protected (insn1, bb_src, bb_trg);
1932 }
1933
1934 /* The chain does not exist. */
1935 return 0;
1936 } /* is_conditionally_protected */
1937
1938 /* Returns 1 if a clue for "similar load" 'insn2' is found, and hence
1939 load_insn can move speculatively from bb_src to bb_trg. All the
1940 following must hold:
1941
1942 (1) both loads have 1 base register (PFREE_CANDIDATEs).
1943 (2) load_insn and load1 have a def-use dependence upon
1944 the same insn 'insn1'.
1945 (3) either load2 is in bb_trg, or:
1946 - there's only one split-block, and
1947 - load1 is on the escape path, and
1948
1949 From all these we can conclude that the two loads access memory
1950 addresses that differ at most by a constant, and hence if moving
1951 load_insn would cause an exception, it would have been caused by
1952 load2 anyhow. */
1953
1954 static int
1955 is_pfree (rtx load_insn, int bb_src, int bb_trg)
1956 {
1957 sd_iterator_def back_sd_it;
1958 dep_t back_dep;
1959 candidate *candp = candidate_table + bb_src;
1960
1961 if (candp->split_bbs.nr_members != 1)
1962 /* Must have exactly one escape block. */
1963 return 0;
1964
1965 FOR_EACH_DEP (load_insn, SD_LIST_BACK, back_sd_it, back_dep)
1966 {
1967 rtx insn1 = DEP_PRO (back_dep);
1968
1969 if (DEP_TYPE (back_dep) == REG_DEP_TRUE)
1970 /* Found a DEF-USE dependence (insn1, load_insn). */
1971 {
1972 sd_iterator_def fore_sd_it;
1973 dep_t fore_dep;
1974
1975 FOR_EACH_DEP (insn1, SD_LIST_FORW, fore_sd_it, fore_dep)
1976 {
1977 rtx insn2 = DEP_CON (fore_dep);
1978
1979 if (DEP_TYPE (fore_dep) == REG_DEP_TRUE)
1980 {
1981 /* Found a DEF-USE dependence (insn1, insn2). */
1982 if (haifa_classify_insn (insn2) != PFREE_CANDIDATE)
1983 /* insn2 not guaranteed to be a 1 base reg load. */
1984 continue;
1985
1986 if (INSN_BB (insn2) == bb_trg)
1987 /* insn2 is the similar load, in the target block. */
1988 return 1;
1989
1990 if (*(candp->split_bbs.first_member) == BLOCK_FOR_INSN (insn2))
1991 /* insn2 is a similar load, in a split-block. */
1992 return 1;
1993 }
1994 }
1995 }
1996 }
1997
1998 /* Couldn't find a similar load. */
1999 return 0;
2000 } /* is_pfree */
2001
2002 /* Return 1 if load_insn is prisky (i.e. if load_insn is fed by
2003 a load moved speculatively, or if load_insn is protected by
2004 a compare on load_insn's address). */
2005
2006 static int
2007 is_prisky (rtx load_insn, int bb_src, int bb_trg)
2008 {
2009 if (FED_BY_SPEC_LOAD (load_insn))
2010 return 1;
2011
2012 if (sd_lists_empty_p (load_insn, SD_LIST_BACK))
2013 /* Dependence may 'hide' out of the region. */
2014 return 1;
2015
2016 if (is_conditionally_protected (load_insn, bb_src, bb_trg))
2017 return 1;
2018
2019 return 0;
2020 }
2021
2022 /* Insn is a candidate to be moved speculatively from bb_src to bb_trg.
2023 Return 1 if insn is exception-free (and the motion is valid)
2024 and 0 otherwise. */
2025
2026 static int
2027 is_exception_free (rtx insn, int bb_src, int bb_trg)
2028 {
2029 int insn_class = haifa_classify_insn (insn);
2030
2031 /* Handle non-load insns. */
2032 switch (insn_class)
2033 {
2034 case TRAP_FREE:
2035 return 1;
2036 case TRAP_RISKY:
2037 return 0;
2038 default:;
2039 }
2040
2041 /* Handle loads. */
2042 if (!flag_schedule_speculative_load)
2043 return 0;
2044 IS_LOAD_INSN (insn) = 1;
2045 switch (insn_class)
2046 {
2047 case IFREE:
2048 return (1);
2049 case IRISKY:
2050 return 0;
2051 case PFREE_CANDIDATE:
2052 if (is_pfree (insn, bb_src, bb_trg))
2053 return 1;
2054 /* Don't 'break' here: PFREE-candidate is also PRISKY-candidate. */
2055 case PRISKY_CANDIDATE:
2056 if (!flag_schedule_speculative_load_dangerous
2057 || is_prisky (insn, bb_src, bb_trg))
2058 return 0;
2059 break;
2060 default:;
2061 }
2062
2063 return flag_schedule_speculative_load_dangerous;
2064 }
2065 \f
2066 /* The number of insns from the current block scheduled so far. */
2067 static int sched_target_n_insns;
2068 /* The number of insns from the current block to be scheduled in total. */
2069 static int target_n_insns;
2070 /* The number of insns from the entire region scheduled so far. */
2071 static int sched_n_insns;
2072
2073 /* Implementations of the sched_info functions for region scheduling. */
2074 static void init_ready_list (void);
2075 static int can_schedule_ready_p (rtx);
2076 static void begin_schedule_ready (rtx, rtx);
2077 static ds_t new_ready (rtx, ds_t);
2078 static int schedule_more_p (void);
2079 static const char *rgn_print_insn (const_rtx, int);
2080 static int rgn_rank (rtx, rtx);
2081 static void compute_jump_reg_dependencies (rtx, regset, regset, regset);
2082
2083 /* Functions for speculative scheduling. */
2084 static void rgn_add_remove_insn (rtx, int);
2085 static void rgn_add_block (basic_block, basic_block);
2086 static void rgn_fix_recovery_cfg (int, int, int);
2087 static basic_block advance_target_bb (basic_block, rtx);
2088
2089 /* Return nonzero if there are more insns that should be scheduled. */
2090
2091 static int
2092 schedule_more_p (void)
2093 {
2094 return sched_target_n_insns < target_n_insns;
2095 }
2096
2097 /* Add all insns that are initially ready to the ready list READY. Called
2098 once before scheduling a set of insns. */
2099
2100 static void
2101 init_ready_list (void)
2102 {
2103 rtx prev_head = current_sched_info->prev_head;
2104 rtx next_tail = current_sched_info->next_tail;
2105 int bb_src;
2106 rtx insn;
2107
2108 target_n_insns = 0;
2109 sched_target_n_insns = 0;
2110 sched_n_insns = 0;
2111
2112 /* Print debugging information. */
2113 if (sched_verbose >= 5)
2114 debug_rgn_dependencies (target_bb);
2115
2116 /* Prepare current target block info. */
2117 if (current_nr_blocks > 1)
2118 compute_trg_info (target_bb);
2119
2120 /* Initialize ready list with all 'ready' insns in target block.
2121 Count number of insns in the target block being scheduled. */
2122 for (insn = NEXT_INSN (prev_head); insn != next_tail; insn = NEXT_INSN (insn))
2123 {
2124 try_ready (insn);
2125 target_n_insns++;
2126
2127 gcc_assert (!(TODO_SPEC (insn) & BEGIN_CONTROL));
2128 }
2129
2130 /* Add to ready list all 'ready' insns in valid source blocks.
2131 For speculative insns, check-live, exception-free, and
2132 issue-delay. */
2133 for (bb_src = target_bb + 1; bb_src < current_nr_blocks; bb_src++)
2134 if (IS_VALID (bb_src))
2135 {
2136 rtx src_head;
2137 rtx src_next_tail;
2138 rtx tail, head;
2139
2140 get_ebb_head_tail (EBB_FIRST_BB (bb_src), EBB_LAST_BB (bb_src),
2141 &head, &tail);
2142 src_next_tail = NEXT_INSN (tail);
2143 src_head = head;
2144
2145 for (insn = src_head; insn != src_next_tail; insn = NEXT_INSN (insn))
2146 if (INSN_P (insn) && !BOUNDARY_DEBUG_INSN_P (insn))
2147 try_ready (insn);
2148 }
2149 }
2150
2151 /* Called after taking INSN from the ready list. Returns nonzero if this
2152 insn can be scheduled, nonzero if we should silently discard it. */
2153
2154 static int
2155 can_schedule_ready_p (rtx insn)
2156 {
2157 /* An interblock motion? */
2158 if (INSN_BB (insn) != target_bb
2159 && IS_SPECULATIVE_INSN (insn)
2160 && !check_live (insn, INSN_BB (insn)))
2161 return 0;
2162 else
2163 return 1;
2164 }
2165
2166 /* Updates counter and other information. Split from can_schedule_ready_p ()
2167 because when we schedule insn speculatively then insn passed to
2168 can_schedule_ready_p () differs from the one passed to
2169 begin_schedule_ready (). */
2170 static void
2171 begin_schedule_ready (rtx insn, rtx last ATTRIBUTE_UNUSED)
2172 {
2173 /* An interblock motion? */
2174 if (INSN_BB (insn) != target_bb)
2175 {
2176 if (IS_SPECULATIVE_INSN (insn))
2177 {
2178 gcc_assert (check_live (insn, INSN_BB (insn)));
2179
2180 update_live (insn, INSN_BB (insn));
2181
2182 /* For speculative load, mark insns fed by it. */
2183 if (IS_LOAD_INSN (insn) || FED_BY_SPEC_LOAD (insn))
2184 set_spec_fed (insn);
2185
2186 nr_spec++;
2187 }
2188 nr_inter++;
2189 }
2190 else
2191 {
2192 /* In block motion. */
2193 sched_target_n_insns++;
2194 }
2195 sched_n_insns++;
2196 }
2197
2198 /* Called after INSN has all its hard dependencies resolved and the speculation
2199 of type TS is enough to overcome them all.
2200 Return nonzero if it should be moved to the ready list or the queue, or zero
2201 if we should silently discard it. */
2202 static ds_t
2203 new_ready (rtx next, ds_t ts)
2204 {
2205 if (INSN_BB (next) != target_bb)
2206 {
2207 int not_ex_free = 0;
2208
2209 /* For speculative insns, before inserting to ready/queue,
2210 check live, exception-free, and issue-delay. */
2211 if (!IS_VALID (INSN_BB (next))
2212 || CANT_MOVE (next)
2213 || (IS_SPECULATIVE_INSN (next)
2214 && ((recog_memoized (next) >= 0
2215 && min_insn_conflict_delay (curr_state, next, next)
2216 > PARAM_VALUE (PARAM_MAX_SCHED_INSN_CONFLICT_DELAY))
2217 || IS_SPECULATION_CHECK_P (next)
2218 || !check_live (next, INSN_BB (next))
2219 || (not_ex_free = !is_exception_free (next, INSN_BB (next),
2220 target_bb)))))
2221 {
2222 if (not_ex_free
2223 /* We are here because is_exception_free () == false.
2224 But we possibly can handle that with control speculation. */
2225 && sched_deps_info->generate_spec_deps
2226 && spec_info->mask & BEGIN_CONTROL)
2227 {
2228 ds_t new_ds;
2229
2230 /* Add control speculation to NEXT's dependency type. */
2231 new_ds = set_dep_weak (ts, BEGIN_CONTROL, MAX_DEP_WEAK);
2232
2233 /* Check if NEXT can be speculated with new dependency type. */
2234 if (sched_insn_is_legitimate_for_speculation_p (next, new_ds))
2235 /* Here we got new control-speculative instruction. */
2236 ts = new_ds;
2237 else
2238 /* NEXT isn't ready yet. */
2239 ts = (ts & ~SPECULATIVE) | HARD_DEP;
2240 }
2241 else
2242 /* NEXT isn't ready yet. */
2243 ts = (ts & ~SPECULATIVE) | HARD_DEP;
2244 }
2245 }
2246
2247 return ts;
2248 }
2249
2250 /* Return a string that contains the insn uid and optionally anything else
2251 necessary to identify this insn in an output. It's valid to use a
2252 static buffer for this. The ALIGNED parameter should cause the string
2253 to be formatted so that multiple output lines will line up nicely. */
2254
2255 static const char *
2256 rgn_print_insn (const_rtx insn, int aligned)
2257 {
2258 static char tmp[80];
2259
2260 if (aligned)
2261 sprintf (tmp, "b%3d: i%4d", INSN_BB (insn), INSN_UID (insn));
2262 else
2263 {
2264 if (current_nr_blocks > 1 && INSN_BB (insn) != target_bb)
2265 sprintf (tmp, "%d/b%d", INSN_UID (insn), INSN_BB (insn));
2266 else
2267 sprintf (tmp, "%d", INSN_UID (insn));
2268 }
2269 return tmp;
2270 }
2271
2272 /* Compare priority of two insns. Return a positive number if the second
2273 insn is to be preferred for scheduling, and a negative one if the first
2274 is to be preferred. Zero if they are equally good. */
2275
2276 static int
2277 rgn_rank (rtx insn1, rtx insn2)
2278 {
2279 /* Some comparison make sense in interblock scheduling only. */
2280 if (INSN_BB (insn1) != INSN_BB (insn2))
2281 {
2282 int spec_val, prob_val;
2283
2284 /* Prefer an inblock motion on an interblock motion. */
2285 if ((INSN_BB (insn2) == target_bb) && (INSN_BB (insn1) != target_bb))
2286 return 1;
2287 if ((INSN_BB (insn1) == target_bb) && (INSN_BB (insn2) != target_bb))
2288 return -1;
2289
2290 /* Prefer a useful motion on a speculative one. */
2291 spec_val = IS_SPECULATIVE_INSN (insn1) - IS_SPECULATIVE_INSN (insn2);
2292 if (spec_val)
2293 return spec_val;
2294
2295 /* Prefer a more probable (speculative) insn. */
2296 prob_val = INSN_PROBABILITY (insn2) - INSN_PROBABILITY (insn1);
2297 if (prob_val)
2298 return prob_val;
2299 }
2300 return 0;
2301 }
2302
2303 /* NEXT is an instruction that depends on INSN (a backward dependence);
2304 return nonzero if we should include this dependence in priority
2305 calculations. */
2306
2307 int
2308 contributes_to_priority (rtx next, rtx insn)
2309 {
2310 /* NEXT and INSN reside in one ebb. */
2311 return BLOCK_TO_BB (BLOCK_NUM (next)) == BLOCK_TO_BB (BLOCK_NUM (insn));
2312 }
2313
2314 /* INSN is a JUMP_INSN, COND_SET is the set of registers that are
2315 conditionally set before INSN. Store the set of registers that
2316 must be considered as used by this jump in USED and that of
2317 registers that must be considered as set in SET. */
2318
2319 static void
2320 compute_jump_reg_dependencies (rtx insn ATTRIBUTE_UNUSED,
2321 regset cond_exec ATTRIBUTE_UNUSED,
2322 regset used ATTRIBUTE_UNUSED,
2323 regset set ATTRIBUTE_UNUSED)
2324 {
2325 /* Nothing to do here, since we postprocess jumps in
2326 add_branch_dependences. */
2327 }
2328
2329 /* This variable holds common_sched_info hooks and data relevant to
2330 the interblock scheduler. */
2331 static struct common_sched_info_def rgn_common_sched_info;
2332
2333
2334 /* This holds data for the dependence analysis relevant to
2335 the interblock scheduler. */
2336 static struct sched_deps_info_def rgn_sched_deps_info;
2337
2338 /* This holds constant data used for initializing the above structure
2339 for the Haifa scheduler. */
2340 static const struct sched_deps_info_def rgn_const_sched_deps_info =
2341 {
2342 compute_jump_reg_dependencies,
2343 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2344 0, 0, 0
2345 };
2346
2347 /* Same as above, but for the selective scheduler. */
2348 static const struct sched_deps_info_def rgn_const_sel_sched_deps_info =
2349 {
2350 compute_jump_reg_dependencies,
2351 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2352 0, 0, 0
2353 };
2354
2355 /* Return true if scheduling INSN will trigger finish of scheduling
2356 current block. */
2357 static bool
2358 rgn_insn_finishes_block_p (rtx insn)
2359 {
2360 if (INSN_BB (insn) == target_bb
2361 && sched_target_n_insns + 1 == target_n_insns)
2362 /* INSN is the last not-scheduled instruction in the current block. */
2363 return true;
2364
2365 return false;
2366 }
2367
2368 /* Used in schedule_insns to initialize current_sched_info for scheduling
2369 regions (or single basic blocks). */
2370
2371 static const struct haifa_sched_info rgn_const_sched_info =
2372 {
2373 init_ready_list,
2374 can_schedule_ready_p,
2375 schedule_more_p,
2376 new_ready,
2377 rgn_rank,
2378 rgn_print_insn,
2379 contributes_to_priority,
2380 rgn_insn_finishes_block_p,
2381
2382 NULL, NULL,
2383 NULL, NULL,
2384 0, 0,
2385
2386 rgn_add_remove_insn,
2387 begin_schedule_ready,
2388 advance_target_bb,
2389 SCHED_RGN
2390 };
2391
2392 /* This variable holds the data and hooks needed to the Haifa scheduler backend
2393 for the interblock scheduler frontend. */
2394 static struct haifa_sched_info rgn_sched_info;
2395
2396 /* Returns maximum priority that an insn was assigned to. */
2397
2398 int
2399 get_rgn_sched_max_insns_priority (void)
2400 {
2401 return rgn_sched_info.sched_max_insns_priority;
2402 }
2403
2404 /* Determine if PAT sets a CLASS_LIKELY_SPILLED_P register. */
2405
2406 static bool
2407 sets_likely_spilled (rtx pat)
2408 {
2409 bool ret = false;
2410 note_stores (pat, sets_likely_spilled_1, &ret);
2411 return ret;
2412 }
2413
2414 static void
2415 sets_likely_spilled_1 (rtx x, const_rtx pat, void *data)
2416 {
2417 bool *ret = (bool *) data;
2418
2419 if (GET_CODE (pat) == SET
2420 && REG_P (x)
2421 && REGNO (x) < FIRST_PSEUDO_REGISTER
2422 && CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (REGNO (x))))
2423 *ret = true;
2424 }
2425
2426 /* A bitmap to note insns that participate in any dependency. Used in
2427 add_branch_dependences. */
2428 static sbitmap insn_referenced;
2429
2430 /* Add dependences so that branches are scheduled to run last in their
2431 block. */
2432 static void
2433 add_branch_dependences (rtx head, rtx tail)
2434 {
2435 rtx insn, last;
2436
2437 /* For all branches, calls, uses, clobbers, cc0 setters, and instructions
2438 that can throw exceptions, force them to remain in order at the end of
2439 the block by adding dependencies and giving the last a high priority.
2440 There may be notes present, and prev_head may also be a note.
2441
2442 Branches must obviously remain at the end. Calls should remain at the
2443 end since moving them results in worse register allocation. Uses remain
2444 at the end to ensure proper register allocation.
2445
2446 cc0 setters remain at the end because they can't be moved away from
2447 their cc0 user.
2448
2449 COND_EXEC insns cannot be moved past a branch (see e.g. PR17808).
2450
2451 Insns setting CLASS_LIKELY_SPILLED_P registers (usually return values)
2452 are not moved before reload because we can wind up with register
2453 allocation failures. */
2454
2455 while (tail != head && DEBUG_INSN_P (tail))
2456 tail = PREV_INSN (tail);
2457
2458 insn = tail;
2459 last = 0;
2460 while (CALL_P (insn)
2461 || JUMP_P (insn)
2462 || (NONJUMP_INSN_P (insn)
2463 && (GET_CODE (PATTERN (insn)) == USE
2464 || GET_CODE (PATTERN (insn)) == CLOBBER
2465 || can_throw_internal (insn)
2466 #ifdef HAVE_cc0
2467 || sets_cc0_p (PATTERN (insn))
2468 #endif
2469 || (!reload_completed
2470 && sets_likely_spilled (PATTERN (insn)))))
2471 || NOTE_P (insn))
2472 {
2473 if (!NOTE_P (insn))
2474 {
2475 if (last != 0
2476 && sd_find_dep_between (insn, last, false) == NULL)
2477 {
2478 if (! sched_insns_conditions_mutex_p (last, insn))
2479 add_dependence (last, insn, REG_DEP_ANTI);
2480 SET_BIT (insn_referenced, INSN_LUID (insn));
2481 }
2482
2483 CANT_MOVE (insn) = 1;
2484
2485 last = insn;
2486 }
2487
2488 /* Don't overrun the bounds of the basic block. */
2489 if (insn == head)
2490 break;
2491
2492 do
2493 insn = PREV_INSN (insn);
2494 while (insn != head && DEBUG_INSN_P (insn));
2495 }
2496
2497 /* Make sure these insns are scheduled last in their block. */
2498 insn = last;
2499 if (insn != 0)
2500 while (insn != head)
2501 {
2502 insn = prev_nonnote_insn (insn);
2503
2504 if (TEST_BIT (insn_referenced, INSN_LUID (insn))
2505 || DEBUG_INSN_P (insn))
2506 continue;
2507
2508 if (! sched_insns_conditions_mutex_p (last, insn))
2509 add_dependence (last, insn, REG_DEP_ANTI);
2510 }
2511
2512 if (!targetm.have_conditional_execution ())
2513 return;
2514
2515 /* Finally, if the block ends in a jump, and we are doing intra-block
2516 scheduling, make sure that the branch depends on any COND_EXEC insns
2517 inside the block to avoid moving the COND_EXECs past the branch insn.
2518
2519 We only have to do this after reload, because (1) before reload there
2520 are no COND_EXEC insns, and (2) the region scheduler is an intra-block
2521 scheduler after reload.
2522
2523 FIXME: We could in some cases move COND_EXEC insns past the branch if
2524 this scheduler would be a little smarter. Consider this code:
2525
2526 T = [addr]
2527 C ? addr += 4
2528 !C ? X += 12
2529 C ? T += 1
2530 C ? jump foo
2531
2532 On a target with a one cycle stall on a memory access the optimal
2533 sequence would be:
2534
2535 T = [addr]
2536 C ? addr += 4
2537 C ? T += 1
2538 C ? jump foo
2539 !C ? X += 12
2540
2541 We don't want to put the 'X += 12' before the branch because it just
2542 wastes a cycle of execution time when the branch is taken.
2543
2544 Note that in the example "!C" will always be true. That is another
2545 possible improvement for handling COND_EXECs in this scheduler: it
2546 could remove always-true predicates. */
2547
2548 if (!reload_completed || ! JUMP_P (tail))
2549 return;
2550
2551 insn = tail;
2552 while (insn != head)
2553 {
2554 insn = PREV_INSN (insn);
2555
2556 /* Note that we want to add this dependency even when
2557 sched_insns_conditions_mutex_p returns true. The whole point
2558 is that we _want_ this dependency, even if these insns really
2559 are independent. */
2560 if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == COND_EXEC)
2561 add_dependence (tail, insn, REG_DEP_ANTI);
2562 }
2563 }
2564
2565 /* Data structures for the computation of data dependences in a regions. We
2566 keep one `deps' structure for every basic block. Before analyzing the
2567 data dependences for a bb, its variables are initialized as a function of
2568 the variables of its predecessors. When the analysis for a bb completes,
2569 we save the contents to the corresponding bb_deps[bb] variable. */
2570
2571 static struct deps_desc *bb_deps;
2572
2573 /* Duplicate the INSN_LIST elements of COPY and prepend them to OLD. */
2574
2575 static rtx
2576 concat_INSN_LIST (rtx copy, rtx old)
2577 {
2578 rtx new_rtx = old;
2579 for (; copy ; copy = XEXP (copy, 1))
2580 new_rtx = alloc_INSN_LIST (XEXP (copy, 0), new_rtx);
2581 return new_rtx;
2582 }
2583
2584 static void
2585 concat_insn_mem_list (rtx copy_insns, rtx copy_mems, rtx *old_insns_p,
2586 rtx *old_mems_p)
2587 {
2588 rtx new_insns = *old_insns_p;
2589 rtx new_mems = *old_mems_p;
2590
2591 while (copy_insns)
2592 {
2593 new_insns = alloc_INSN_LIST (XEXP (copy_insns, 0), new_insns);
2594 new_mems = alloc_EXPR_LIST (VOIDmode, XEXP (copy_mems, 0), new_mems);
2595 copy_insns = XEXP (copy_insns, 1);
2596 copy_mems = XEXP (copy_mems, 1);
2597 }
2598
2599 *old_insns_p = new_insns;
2600 *old_mems_p = new_mems;
2601 }
2602
2603 /* Join PRED_DEPS to the SUCC_DEPS. */
2604 void
2605 deps_join (struct deps_desc *succ_deps, struct deps_desc *pred_deps)
2606 {
2607 unsigned reg;
2608 reg_set_iterator rsi;
2609
2610 /* The reg_last lists are inherited by successor. */
2611 EXECUTE_IF_SET_IN_REG_SET (&pred_deps->reg_last_in_use, 0, reg, rsi)
2612 {
2613 struct deps_reg *pred_rl = &pred_deps->reg_last[reg];
2614 struct deps_reg *succ_rl = &succ_deps->reg_last[reg];
2615
2616 succ_rl->uses = concat_INSN_LIST (pred_rl->uses, succ_rl->uses);
2617 succ_rl->sets = concat_INSN_LIST (pred_rl->sets, succ_rl->sets);
2618 succ_rl->implicit_sets
2619 = concat_INSN_LIST (pred_rl->implicit_sets, succ_rl->implicit_sets);
2620 succ_rl->clobbers = concat_INSN_LIST (pred_rl->clobbers,
2621 succ_rl->clobbers);
2622 succ_rl->uses_length += pred_rl->uses_length;
2623 succ_rl->clobbers_length += pred_rl->clobbers_length;
2624 }
2625 IOR_REG_SET (&succ_deps->reg_last_in_use, &pred_deps->reg_last_in_use);
2626
2627 /* Mem read/write lists are inherited by successor. */
2628 concat_insn_mem_list (pred_deps->pending_read_insns,
2629 pred_deps->pending_read_mems,
2630 &succ_deps->pending_read_insns,
2631 &succ_deps->pending_read_mems);
2632 concat_insn_mem_list (pred_deps->pending_write_insns,
2633 pred_deps->pending_write_mems,
2634 &succ_deps->pending_write_insns,
2635 &succ_deps->pending_write_mems);
2636
2637 succ_deps->last_pending_memory_flush
2638 = concat_INSN_LIST (pred_deps->last_pending_memory_flush,
2639 succ_deps->last_pending_memory_flush);
2640
2641 succ_deps->pending_read_list_length += pred_deps->pending_read_list_length;
2642 succ_deps->pending_write_list_length += pred_deps->pending_write_list_length;
2643 succ_deps->pending_flush_length += pred_deps->pending_flush_length;
2644
2645 /* last_function_call is inherited by successor. */
2646 succ_deps->last_function_call
2647 = concat_INSN_LIST (pred_deps->last_function_call,
2648 succ_deps->last_function_call);
2649
2650 /* last_function_call_may_noreturn is inherited by successor. */
2651 succ_deps->last_function_call_may_noreturn
2652 = concat_INSN_LIST (pred_deps->last_function_call_may_noreturn,
2653 succ_deps->last_function_call_may_noreturn);
2654
2655 /* sched_before_next_call is inherited by successor. */
2656 succ_deps->sched_before_next_call
2657 = concat_INSN_LIST (pred_deps->sched_before_next_call,
2658 succ_deps->sched_before_next_call);
2659 }
2660
2661 /* After computing the dependencies for block BB, propagate the dependencies
2662 found in TMP_DEPS to the successors of the block. */
2663 static void
2664 propagate_deps (int bb, struct deps_desc *pred_deps)
2665 {
2666 basic_block block = BASIC_BLOCK (BB_TO_BLOCK (bb));
2667 edge_iterator ei;
2668 edge e;
2669
2670 /* bb's structures are inherited by its successors. */
2671 FOR_EACH_EDGE (e, ei, block->succs)
2672 {
2673 /* Only bbs "below" bb, in the same region, are interesting. */
2674 if (e->dest == EXIT_BLOCK_PTR
2675 || CONTAINING_RGN (block->index) != CONTAINING_RGN (e->dest->index)
2676 || BLOCK_TO_BB (e->dest->index) <= bb)
2677 continue;
2678
2679 deps_join (bb_deps + BLOCK_TO_BB (e->dest->index), pred_deps);
2680 }
2681
2682 /* These lists should point to the right place, for correct
2683 freeing later. */
2684 bb_deps[bb].pending_read_insns = pred_deps->pending_read_insns;
2685 bb_deps[bb].pending_read_mems = pred_deps->pending_read_mems;
2686 bb_deps[bb].pending_write_insns = pred_deps->pending_write_insns;
2687 bb_deps[bb].pending_write_mems = pred_deps->pending_write_mems;
2688
2689 /* Can't allow these to be freed twice. */
2690 pred_deps->pending_read_insns = 0;
2691 pred_deps->pending_read_mems = 0;
2692 pred_deps->pending_write_insns = 0;
2693 pred_deps->pending_write_mems = 0;
2694 }
2695
2696 /* Compute dependences inside bb. In a multiple blocks region:
2697 (1) a bb is analyzed after its predecessors, and (2) the lists in
2698 effect at the end of bb (after analyzing for bb) are inherited by
2699 bb's successors.
2700
2701 Specifically for reg-reg data dependences, the block insns are
2702 scanned by sched_analyze () top-to-bottom. Three lists are
2703 maintained by sched_analyze (): reg_last[].sets for register DEFs,
2704 reg_last[].implicit_sets for implicit hard register DEFs, and
2705 reg_last[].uses for register USEs.
2706
2707 When analysis is completed for bb, we update for its successors:
2708 ; - DEFS[succ] = Union (DEFS [succ], DEFS [bb])
2709 ; - IMPLICIT_DEFS[succ] = Union (IMPLICIT_DEFS [succ], IMPLICIT_DEFS [bb])
2710 ; - USES[succ] = Union (USES [succ], DEFS [bb])
2711
2712 The mechanism for computing mem-mem data dependence is very
2713 similar, and the result is interblock dependences in the region. */
2714
2715 static void
2716 compute_block_dependences (int bb)
2717 {
2718 rtx head, tail;
2719 struct deps_desc tmp_deps;
2720
2721 tmp_deps = bb_deps[bb];
2722
2723 /* Do the analysis for this block. */
2724 gcc_assert (EBB_FIRST_BB (bb) == EBB_LAST_BB (bb));
2725 get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
2726
2727 sched_analyze (&tmp_deps, head, tail);
2728
2729 /* Selective scheduling handles control dependencies by itself. */
2730 if (!sel_sched_p ())
2731 add_branch_dependences (head, tail);
2732
2733 if (current_nr_blocks > 1)
2734 propagate_deps (bb, &tmp_deps);
2735
2736 /* Free up the INSN_LISTs. */
2737 free_deps (&tmp_deps);
2738
2739 if (targetm.sched.dependencies_evaluation_hook)
2740 targetm.sched.dependencies_evaluation_hook (head, tail);
2741 }
2742
2743 /* Free dependencies of instructions inside BB. */
2744 static void
2745 free_block_dependencies (int bb)
2746 {
2747 rtx head;
2748 rtx tail;
2749
2750 get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
2751
2752 if (no_real_insns_p (head, tail))
2753 return;
2754
2755 sched_free_deps (head, tail, true);
2756 }
2757
2758 /* Remove all INSN_LISTs and EXPR_LISTs from the pending lists and add
2759 them to the unused_*_list variables, so that they can be reused. */
2760
2761 static void
2762 free_pending_lists (void)
2763 {
2764 int bb;
2765
2766 for (bb = 0; bb < current_nr_blocks; bb++)
2767 {
2768 free_INSN_LIST_list (&bb_deps[bb].pending_read_insns);
2769 free_INSN_LIST_list (&bb_deps[bb].pending_write_insns);
2770 free_EXPR_LIST_list (&bb_deps[bb].pending_read_mems);
2771 free_EXPR_LIST_list (&bb_deps[bb].pending_write_mems);
2772 }
2773 }
2774 \f
2775 /* Print dependences for debugging starting from FROM_BB.
2776 Callable from debugger. */
2777 /* Print dependences for debugging starting from FROM_BB.
2778 Callable from debugger. */
2779 DEBUG_FUNCTION void
2780 debug_rgn_dependencies (int from_bb)
2781 {
2782 int bb;
2783
2784 fprintf (sched_dump,
2785 ";; --------------- forward dependences: ------------ \n");
2786
2787 for (bb = from_bb; bb < current_nr_blocks; bb++)
2788 {
2789 rtx head, tail;
2790
2791 get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
2792 fprintf (sched_dump, "\n;; --- Region Dependences --- b %d bb %d \n",
2793 BB_TO_BLOCK (bb), bb);
2794
2795 debug_dependencies (head, tail);
2796 }
2797 }
2798
2799 /* Print dependencies information for instructions between HEAD and TAIL.
2800 ??? This function would probably fit best in haifa-sched.c. */
2801 void debug_dependencies (rtx head, rtx tail)
2802 {
2803 rtx insn;
2804 rtx next_tail = NEXT_INSN (tail);
2805
2806 fprintf (sched_dump, ";; %7s%6s%6s%6s%6s%6s%14s\n",
2807 "insn", "code", "bb", "dep", "prio", "cost",
2808 "reservation");
2809 fprintf (sched_dump, ";; %7s%6s%6s%6s%6s%6s%14s\n",
2810 "----", "----", "--", "---", "----", "----",
2811 "-----------");
2812
2813 for (insn = head; insn != next_tail; insn = NEXT_INSN (insn))
2814 {
2815 if (! INSN_P (insn))
2816 {
2817 int n;
2818 fprintf (sched_dump, ";; %6d ", INSN_UID (insn));
2819 if (NOTE_P (insn))
2820 {
2821 n = NOTE_KIND (insn);
2822 fprintf (sched_dump, "%s\n", GET_NOTE_INSN_NAME (n));
2823 }
2824 else
2825 fprintf (sched_dump, " {%s}\n", GET_RTX_NAME (GET_CODE (insn)));
2826 continue;
2827 }
2828
2829 fprintf (sched_dump,
2830 ";; %s%5d%6d%6d%6d%6d%6d ",
2831 (SCHED_GROUP_P (insn) ? "+" : " "),
2832 INSN_UID (insn),
2833 INSN_CODE (insn),
2834 BLOCK_NUM (insn),
2835 sched_emulate_haifa_p ? -1 : sd_lists_size (insn, SD_LIST_BACK),
2836 (sel_sched_p () ? (sched_emulate_haifa_p ? -1
2837 : INSN_PRIORITY (insn))
2838 : INSN_PRIORITY (insn)),
2839 (sel_sched_p () ? (sched_emulate_haifa_p ? -1
2840 : insn_cost (insn))
2841 : insn_cost (insn)));
2842
2843 if (recog_memoized (insn) < 0)
2844 fprintf (sched_dump, "nothing");
2845 else
2846 print_reservation (sched_dump, insn);
2847
2848 fprintf (sched_dump, "\t: ");
2849 {
2850 sd_iterator_def sd_it;
2851 dep_t dep;
2852
2853 FOR_EACH_DEP (insn, SD_LIST_FORW, sd_it, dep)
2854 fprintf (sched_dump, "%d ", INSN_UID (DEP_CON (dep)));
2855 }
2856 fprintf (sched_dump, "\n");
2857 }
2858
2859 fprintf (sched_dump, "\n");
2860 }
2861 \f
2862 /* Returns true if all the basic blocks of the current region have
2863 NOTE_DISABLE_SCHED_OF_BLOCK which means not to schedule that region. */
2864 bool
2865 sched_is_disabled_for_current_region_p (void)
2866 {
2867 int bb;
2868
2869 for (bb = 0; bb < current_nr_blocks; bb++)
2870 if (!(BASIC_BLOCK (BB_TO_BLOCK (bb))->flags & BB_DISABLE_SCHEDULE))
2871 return false;
2872
2873 return true;
2874 }
2875
2876 /* Free all region dependencies saved in INSN_BACK_DEPS and
2877 INSN_RESOLVED_BACK_DEPS. The Haifa scheduler does this on the fly
2878 when scheduling, so this function is supposed to be called from
2879 the selective scheduling only. */
2880 void
2881 free_rgn_deps (void)
2882 {
2883 int bb;
2884
2885 for (bb = 0; bb < current_nr_blocks; bb++)
2886 {
2887 rtx head, tail;
2888
2889 gcc_assert (EBB_FIRST_BB (bb) == EBB_LAST_BB (bb));
2890 get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
2891
2892 sched_free_deps (head, tail, false);
2893 }
2894 }
2895
2896 static int rgn_n_insns;
2897
2898 /* Compute insn priority for a current region. */
2899 void
2900 compute_priorities (void)
2901 {
2902 int bb;
2903
2904 current_sched_info->sched_max_insns_priority = 0;
2905 for (bb = 0; bb < current_nr_blocks; bb++)
2906 {
2907 rtx head, tail;
2908
2909 gcc_assert (EBB_FIRST_BB (bb) == EBB_LAST_BB (bb));
2910 get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
2911
2912 if (no_real_insns_p (head, tail))
2913 continue;
2914
2915 rgn_n_insns += set_priorities (head, tail);
2916 }
2917 current_sched_info->sched_max_insns_priority++;
2918 }
2919
2920 /* Schedule a region. A region is either an inner loop, a loop-free
2921 subroutine, or a single basic block. Each bb in the region is
2922 scheduled after its flow predecessors. */
2923
2924 static void
2925 schedule_region (int rgn)
2926 {
2927 int bb;
2928 int sched_rgn_n_insns = 0;
2929
2930 rgn_n_insns = 0;
2931
2932 rgn_setup_region (rgn);
2933
2934 /* Don't schedule region that is marked by
2935 NOTE_DISABLE_SCHED_OF_BLOCK. */
2936 if (sched_is_disabled_for_current_region_p ())
2937 return;
2938
2939 sched_rgn_compute_dependencies (rgn);
2940
2941 sched_rgn_local_init (rgn);
2942
2943 /* Set priorities. */
2944 compute_priorities ();
2945
2946 sched_extend_ready_list (rgn_n_insns);
2947
2948 if (sched_pressure_p)
2949 {
2950 sched_init_region_reg_pressure_info ();
2951 for (bb = 0; bb < current_nr_blocks; bb++)
2952 {
2953 basic_block first_bb, last_bb;
2954 rtx head, tail;
2955
2956 first_bb = EBB_FIRST_BB (bb);
2957 last_bb = EBB_LAST_BB (bb);
2958
2959 get_ebb_head_tail (first_bb, last_bb, &head, &tail);
2960
2961 if (no_real_insns_p (head, tail))
2962 {
2963 gcc_assert (first_bb == last_bb);
2964 continue;
2965 }
2966 sched_setup_bb_reg_pressure_info (first_bb, PREV_INSN (head));
2967 }
2968 }
2969
2970 /* Now we can schedule all blocks. */
2971 for (bb = 0; bb < current_nr_blocks; bb++)
2972 {
2973 basic_block first_bb, last_bb, curr_bb;
2974 rtx head, tail;
2975
2976 first_bb = EBB_FIRST_BB (bb);
2977 last_bb = EBB_LAST_BB (bb);
2978
2979 get_ebb_head_tail (first_bb, last_bb, &head, &tail);
2980
2981 if (no_real_insns_p (head, tail))
2982 {
2983 gcc_assert (first_bb == last_bb);
2984 continue;
2985 }
2986
2987 current_sched_info->prev_head = PREV_INSN (head);
2988 current_sched_info->next_tail = NEXT_INSN (tail);
2989
2990 remove_notes (head, tail);
2991
2992 unlink_bb_notes (first_bb, last_bb);
2993
2994 target_bb = bb;
2995
2996 gcc_assert (flag_schedule_interblock || current_nr_blocks == 1);
2997 current_sched_info->queue_must_finish_empty = current_nr_blocks == 1;
2998
2999 curr_bb = first_bb;
3000 if (dbg_cnt (sched_block))
3001 {
3002 schedule_block (&curr_bb);
3003 gcc_assert (EBB_FIRST_BB (bb) == first_bb);
3004 sched_rgn_n_insns += sched_n_insns;
3005 }
3006 else
3007 {
3008 sched_rgn_n_insns += rgn_n_insns;
3009 }
3010
3011 /* Clean up. */
3012 if (current_nr_blocks > 1)
3013 free_trg_info ();
3014 }
3015
3016 /* Sanity check: verify that all region insns were scheduled. */
3017 gcc_assert (sched_rgn_n_insns == rgn_n_insns);
3018
3019 sched_finish_ready_list ();
3020
3021 /* Done with this region. */
3022 sched_rgn_local_finish ();
3023
3024 /* Free dependencies. */
3025 for (bb = 0; bb < current_nr_blocks; ++bb)
3026 free_block_dependencies (bb);
3027
3028 gcc_assert (haifa_recovery_bb_ever_added_p
3029 || deps_pools_are_empty_p ());
3030 }
3031
3032 /* Initialize data structures for region scheduling. */
3033
3034 void
3035 sched_rgn_init (bool single_blocks_p)
3036 {
3037 min_spec_prob = ((PARAM_VALUE (PARAM_MIN_SPEC_PROB) * REG_BR_PROB_BASE)
3038 / 100);
3039
3040 nr_inter = 0;
3041 nr_spec = 0;
3042
3043 extend_regions ();
3044
3045 CONTAINING_RGN (ENTRY_BLOCK) = -1;
3046 CONTAINING_RGN (EXIT_BLOCK) = -1;
3047
3048 /* Compute regions for scheduling. */
3049 if (single_blocks_p
3050 || n_basic_blocks == NUM_FIXED_BLOCKS + 1
3051 || !flag_schedule_interblock
3052 || is_cfg_nonregular ())
3053 {
3054 find_single_block_region (sel_sched_p ());
3055 }
3056 else
3057 {
3058 /* Compute the dominators and post dominators. */
3059 if (!sel_sched_p ())
3060 calculate_dominance_info (CDI_DOMINATORS);
3061
3062 /* Find regions. */
3063 find_rgns ();
3064
3065 if (sched_verbose >= 3)
3066 debug_regions ();
3067
3068 /* For now. This will move as more and more of haifa is converted
3069 to using the cfg code. */
3070 if (!sel_sched_p ())
3071 free_dominance_info (CDI_DOMINATORS);
3072 }
3073
3074 gcc_assert (0 < nr_regions && nr_regions <= n_basic_blocks);
3075
3076 RGN_BLOCKS (nr_regions) = (RGN_BLOCKS (nr_regions - 1) +
3077 RGN_NR_BLOCKS (nr_regions - 1));
3078 }
3079
3080 /* Free data structures for region scheduling. */
3081 void
3082 sched_rgn_finish (void)
3083 {
3084 /* Reposition the prologue and epilogue notes in case we moved the
3085 prologue/epilogue insns. */
3086 if (reload_completed)
3087 reposition_prologue_and_epilogue_notes ();
3088
3089 if (sched_verbose)
3090 {
3091 if (reload_completed == 0
3092 && flag_schedule_interblock)
3093 {
3094 fprintf (sched_dump,
3095 "\n;; Procedure interblock/speculative motions == %d/%d \n",
3096 nr_inter, nr_spec);
3097 }
3098 else
3099 gcc_assert (nr_inter <= 0);
3100 fprintf (sched_dump, "\n\n");
3101 }
3102
3103 nr_regions = 0;
3104
3105 free (rgn_table);
3106 rgn_table = NULL;
3107
3108 free (rgn_bb_table);
3109 rgn_bb_table = NULL;
3110
3111 free (block_to_bb);
3112 block_to_bb = NULL;
3113
3114 free (containing_rgn);
3115 containing_rgn = NULL;
3116
3117 free (ebb_head);
3118 ebb_head = NULL;
3119 }
3120
3121 /* Setup global variables like CURRENT_BLOCKS and CURRENT_NR_BLOCK to
3122 point to the region RGN. */
3123 void
3124 rgn_setup_region (int rgn)
3125 {
3126 int bb;
3127
3128 /* Set variables for the current region. */
3129 current_nr_blocks = RGN_NR_BLOCKS (rgn);
3130 current_blocks = RGN_BLOCKS (rgn);
3131
3132 /* EBB_HEAD is a region-scope structure. But we realloc it for
3133 each region to save time/memory/something else.
3134 See comments in add_block1, for what reasons we allocate +1 element. */
3135 ebb_head = XRESIZEVEC (int, ebb_head, current_nr_blocks + 1);
3136 for (bb = 0; bb <= current_nr_blocks; bb++)
3137 ebb_head[bb] = current_blocks + bb;
3138 }
3139
3140 /* Compute instruction dependencies in region RGN. */
3141 void
3142 sched_rgn_compute_dependencies (int rgn)
3143 {
3144 if (!RGN_DONT_CALC_DEPS (rgn))
3145 {
3146 int bb;
3147
3148 if (sel_sched_p ())
3149 sched_emulate_haifa_p = 1;
3150
3151 init_deps_global ();
3152
3153 /* Initializations for region data dependence analysis. */
3154 bb_deps = XNEWVEC (struct deps_desc, current_nr_blocks);
3155 for (bb = 0; bb < current_nr_blocks; bb++)
3156 init_deps (bb_deps + bb, false);
3157
3158 /* Initialize bitmap used in add_branch_dependences. */
3159 insn_referenced = sbitmap_alloc (sched_max_luid);
3160 sbitmap_zero (insn_referenced);
3161
3162 /* Compute backward dependencies. */
3163 for (bb = 0; bb < current_nr_blocks; bb++)
3164 compute_block_dependences (bb);
3165
3166 sbitmap_free (insn_referenced);
3167 free_pending_lists ();
3168 finish_deps_global ();
3169 free (bb_deps);
3170
3171 /* We don't want to recalculate this twice. */
3172 RGN_DONT_CALC_DEPS (rgn) = 1;
3173
3174 if (sel_sched_p ())
3175 sched_emulate_haifa_p = 0;
3176 }
3177 else
3178 /* (This is a recovery block. It is always a single block region.)
3179 OR (We use selective scheduling.) */
3180 gcc_assert (current_nr_blocks == 1 || sel_sched_p ());
3181 }
3182
3183 /* Init region data structures. Returns true if this region should
3184 not be scheduled. */
3185 void
3186 sched_rgn_local_init (int rgn)
3187 {
3188 int bb;
3189
3190 /* Compute interblock info: probabilities, split-edges, dominators, etc. */
3191 if (current_nr_blocks > 1)
3192 {
3193 basic_block block;
3194 edge e;
3195 edge_iterator ei;
3196
3197 prob = XNEWVEC (int, current_nr_blocks);
3198
3199 dom = sbitmap_vector_alloc (current_nr_blocks, current_nr_blocks);
3200 sbitmap_vector_zero (dom, current_nr_blocks);
3201
3202 /* Use ->aux to implement EDGE_TO_BIT mapping. */
3203 rgn_nr_edges = 0;
3204 FOR_EACH_BB (block)
3205 {
3206 if (CONTAINING_RGN (block->index) != rgn)
3207 continue;
3208 FOR_EACH_EDGE (e, ei, block->succs)
3209 SET_EDGE_TO_BIT (e, rgn_nr_edges++);
3210 }
3211
3212 rgn_edges = XNEWVEC (edge, rgn_nr_edges);
3213 rgn_nr_edges = 0;
3214 FOR_EACH_BB (block)
3215 {
3216 if (CONTAINING_RGN (block->index) != rgn)
3217 continue;
3218 FOR_EACH_EDGE (e, ei, block->succs)
3219 rgn_edges[rgn_nr_edges++] = e;
3220 }
3221
3222 /* Split edges. */
3223 pot_split = sbitmap_vector_alloc (current_nr_blocks, rgn_nr_edges);
3224 sbitmap_vector_zero (pot_split, current_nr_blocks);
3225 ancestor_edges = sbitmap_vector_alloc (current_nr_blocks, rgn_nr_edges);
3226 sbitmap_vector_zero (ancestor_edges, current_nr_blocks);
3227
3228 /* Compute probabilities, dominators, split_edges. */
3229 for (bb = 0; bb < current_nr_blocks; bb++)
3230 compute_dom_prob_ps (bb);
3231
3232 /* Cleanup ->aux used for EDGE_TO_BIT mapping. */
3233 /* We don't need them anymore. But we want to avoid duplication of
3234 aux fields in the newly created edges. */
3235 FOR_EACH_BB (block)
3236 {
3237 if (CONTAINING_RGN (block->index) != rgn)
3238 continue;
3239 FOR_EACH_EDGE (e, ei, block->succs)
3240 e->aux = NULL;
3241 }
3242 }
3243 }
3244
3245 /* Free data computed for the finished region. */
3246 void
3247 sched_rgn_local_free (void)
3248 {
3249 free (prob);
3250 sbitmap_vector_free (dom);
3251 sbitmap_vector_free (pot_split);
3252 sbitmap_vector_free (ancestor_edges);
3253 free (rgn_edges);
3254 }
3255
3256 /* Free data computed for the finished region. */
3257 void
3258 sched_rgn_local_finish (void)
3259 {
3260 if (current_nr_blocks > 1 && !sel_sched_p ())
3261 {
3262 sched_rgn_local_free ();
3263 }
3264 }
3265
3266 /* Setup scheduler infos. */
3267 void
3268 rgn_setup_common_sched_info (void)
3269 {
3270 memcpy (&rgn_common_sched_info, &haifa_common_sched_info,
3271 sizeof (rgn_common_sched_info));
3272
3273 rgn_common_sched_info.fix_recovery_cfg = rgn_fix_recovery_cfg;
3274 rgn_common_sched_info.add_block = rgn_add_block;
3275 rgn_common_sched_info.estimate_number_of_insns
3276 = rgn_estimate_number_of_insns;
3277 rgn_common_sched_info.sched_pass_id = SCHED_RGN_PASS;
3278
3279 common_sched_info = &rgn_common_sched_info;
3280 }
3281
3282 /* Setup all *_sched_info structures (for the Haifa frontend
3283 and for the dependence analysis) in the interblock scheduler. */
3284 void
3285 rgn_setup_sched_infos (void)
3286 {
3287 if (!sel_sched_p ())
3288 memcpy (&rgn_sched_deps_info, &rgn_const_sched_deps_info,
3289 sizeof (rgn_sched_deps_info));
3290 else
3291 memcpy (&rgn_sched_deps_info, &rgn_const_sel_sched_deps_info,
3292 sizeof (rgn_sched_deps_info));
3293
3294 sched_deps_info = &rgn_sched_deps_info;
3295
3296 memcpy (&rgn_sched_info, &rgn_const_sched_info, sizeof (rgn_sched_info));
3297 current_sched_info = &rgn_sched_info;
3298 }
3299
3300 /* The one entry point in this file. */
3301 void
3302 schedule_insns (void)
3303 {
3304 int rgn;
3305
3306 /* Taking care of this degenerate case makes the rest of
3307 this code simpler. */
3308 if (n_basic_blocks == NUM_FIXED_BLOCKS)
3309 return;
3310
3311 rgn_setup_common_sched_info ();
3312 rgn_setup_sched_infos ();
3313
3314 haifa_sched_init ();
3315 sched_rgn_init (reload_completed);
3316
3317 bitmap_initialize (&not_in_df, 0);
3318 bitmap_clear (&not_in_df);
3319
3320 /* Schedule every region in the subroutine. */
3321 for (rgn = 0; rgn < nr_regions; rgn++)
3322 if (dbg_cnt (sched_region))
3323 schedule_region (rgn);
3324
3325 /* Clean up. */
3326 sched_rgn_finish ();
3327 bitmap_clear (&not_in_df);
3328
3329 haifa_sched_finish ();
3330 }
3331
3332 /* INSN has been added to/removed from current region. */
3333 static void
3334 rgn_add_remove_insn (rtx insn, int remove_p)
3335 {
3336 if (!remove_p)
3337 rgn_n_insns++;
3338 else
3339 rgn_n_insns--;
3340
3341 if (INSN_BB (insn) == target_bb)
3342 {
3343 if (!remove_p)
3344 target_n_insns++;
3345 else
3346 target_n_insns--;
3347 }
3348 }
3349
3350 /* Extend internal data structures. */
3351 void
3352 extend_regions (void)
3353 {
3354 rgn_table = XRESIZEVEC (region, rgn_table, n_basic_blocks);
3355 rgn_bb_table = XRESIZEVEC (int, rgn_bb_table, n_basic_blocks);
3356 block_to_bb = XRESIZEVEC (int, block_to_bb, last_basic_block);
3357 containing_rgn = XRESIZEVEC (int, containing_rgn, last_basic_block);
3358 }
3359
3360 void
3361 rgn_make_new_region_out_of_new_block (basic_block bb)
3362 {
3363 int i;
3364
3365 i = RGN_BLOCKS (nr_regions);
3366 /* I - first free position in rgn_bb_table. */
3367
3368 rgn_bb_table[i] = bb->index;
3369 RGN_NR_BLOCKS (nr_regions) = 1;
3370 RGN_HAS_REAL_EBB (nr_regions) = 0;
3371 RGN_DONT_CALC_DEPS (nr_regions) = 0;
3372 CONTAINING_RGN (bb->index) = nr_regions;
3373 BLOCK_TO_BB (bb->index) = 0;
3374
3375 nr_regions++;
3376
3377 RGN_BLOCKS (nr_regions) = i + 1;
3378 }
3379
3380 /* BB was added to ebb after AFTER. */
3381 static void
3382 rgn_add_block (basic_block bb, basic_block after)
3383 {
3384 extend_regions ();
3385 bitmap_set_bit (&not_in_df, bb->index);
3386
3387 if (after == 0 || after == EXIT_BLOCK_PTR)
3388 {
3389 rgn_make_new_region_out_of_new_block (bb);
3390 RGN_DONT_CALC_DEPS (nr_regions - 1) = (after == EXIT_BLOCK_PTR);
3391 }
3392 else
3393 {
3394 int i, pos;
3395
3396 /* We need to fix rgn_table, block_to_bb, containing_rgn
3397 and ebb_head. */
3398
3399 BLOCK_TO_BB (bb->index) = BLOCK_TO_BB (after->index);
3400
3401 /* We extend ebb_head to one more position to
3402 easily find the last position of the last ebb in
3403 the current region. Thus, ebb_head[BLOCK_TO_BB (after) + 1]
3404 is _always_ valid for access. */
3405
3406 i = BLOCK_TO_BB (after->index) + 1;
3407 pos = ebb_head[i] - 1;
3408 /* Now POS is the index of the last block in the region. */
3409
3410 /* Find index of basic block AFTER. */
3411 for (; rgn_bb_table[pos] != after->index; pos--);
3412
3413 pos++;
3414 gcc_assert (pos > ebb_head[i - 1]);
3415
3416 /* i - ebb right after "AFTER". */
3417 /* ebb_head[i] - VALID. */
3418
3419 /* Source position: ebb_head[i]
3420 Destination position: ebb_head[i] + 1
3421 Last position:
3422 RGN_BLOCKS (nr_regions) - 1
3423 Number of elements to copy: (last_position) - (source_position) + 1
3424 */
3425
3426 memmove (rgn_bb_table + pos + 1,
3427 rgn_bb_table + pos,
3428 ((RGN_BLOCKS (nr_regions) - 1) - (pos) + 1)
3429 * sizeof (*rgn_bb_table));
3430
3431 rgn_bb_table[pos] = bb->index;
3432
3433 for (; i <= current_nr_blocks; i++)
3434 ebb_head [i]++;
3435
3436 i = CONTAINING_RGN (after->index);
3437 CONTAINING_RGN (bb->index) = i;
3438
3439 RGN_HAS_REAL_EBB (i) = 1;
3440
3441 for (++i; i <= nr_regions; i++)
3442 RGN_BLOCKS (i)++;
3443 }
3444 }
3445
3446 /* Fix internal data after interblock movement of jump instruction.
3447 For parameter meaning please refer to
3448 sched-int.h: struct sched_info: fix_recovery_cfg. */
3449 static void
3450 rgn_fix_recovery_cfg (int bbi, int check_bbi, int check_bb_nexti)
3451 {
3452 int old_pos, new_pos, i;
3453
3454 BLOCK_TO_BB (check_bb_nexti) = BLOCK_TO_BB (bbi);
3455
3456 for (old_pos = ebb_head[BLOCK_TO_BB (check_bbi) + 1] - 1;
3457 rgn_bb_table[old_pos] != check_bb_nexti;
3458 old_pos--);
3459 gcc_assert (old_pos > ebb_head[BLOCK_TO_BB (check_bbi)]);
3460
3461 for (new_pos = ebb_head[BLOCK_TO_BB (bbi) + 1] - 1;
3462 rgn_bb_table[new_pos] != bbi;
3463 new_pos--);
3464 new_pos++;
3465 gcc_assert (new_pos > ebb_head[BLOCK_TO_BB (bbi)]);
3466
3467 gcc_assert (new_pos < old_pos);
3468
3469 memmove (rgn_bb_table + new_pos + 1,
3470 rgn_bb_table + new_pos,
3471 (old_pos - new_pos) * sizeof (*rgn_bb_table));
3472
3473 rgn_bb_table[new_pos] = check_bb_nexti;
3474
3475 for (i = BLOCK_TO_BB (bbi) + 1; i <= BLOCK_TO_BB (check_bbi); i++)
3476 ebb_head[i]++;
3477 }
3478
3479 /* Return next block in ebb chain. For parameter meaning please refer to
3480 sched-int.h: struct sched_info: advance_target_bb. */
3481 static basic_block
3482 advance_target_bb (basic_block bb, rtx insn)
3483 {
3484 if (insn)
3485 return 0;
3486
3487 gcc_assert (BLOCK_TO_BB (bb->index) == target_bb
3488 && BLOCK_TO_BB (bb->next_bb->index) == target_bb);
3489 return bb->next_bb;
3490 }
3491
3492 #endif
3493 \f
3494 static bool
3495 gate_handle_sched (void)
3496 {
3497 #ifdef INSN_SCHEDULING
3498 return flag_schedule_insns && dbg_cnt (sched_func);
3499 #else
3500 return 0;
3501 #endif
3502 }
3503
3504 /* Run instruction scheduler. */
3505 static unsigned int
3506 rest_of_handle_sched (void)
3507 {
3508 #ifdef INSN_SCHEDULING
3509 if (flag_selective_scheduling
3510 && ! maybe_skip_selective_scheduling ())
3511 run_selective_scheduling ();
3512 else
3513 schedule_insns ();
3514 #endif
3515 return 0;
3516 }
3517
3518 static bool
3519 gate_handle_sched2 (void)
3520 {
3521 #ifdef INSN_SCHEDULING
3522 return optimize > 0 && flag_schedule_insns_after_reload
3523 && dbg_cnt (sched2_func);
3524 #else
3525 return 0;
3526 #endif
3527 }
3528
3529 /* Run second scheduling pass after reload. */
3530 static unsigned int
3531 rest_of_handle_sched2 (void)
3532 {
3533 #ifdef INSN_SCHEDULING
3534 if (flag_selective_scheduling2
3535 && ! maybe_skip_selective_scheduling ())
3536 run_selective_scheduling ();
3537 else
3538 {
3539 /* Do control and data sched analysis again,
3540 and write some more of the results to dump file. */
3541 if (flag_sched2_use_superblocks)
3542 schedule_ebbs ();
3543 else
3544 schedule_insns ();
3545 }
3546 #endif
3547 return 0;
3548 }
3549
3550 struct rtl_opt_pass pass_sched =
3551 {
3552 {
3553 RTL_PASS,
3554 "sched1", /* name */
3555 gate_handle_sched, /* gate */
3556 rest_of_handle_sched, /* execute */
3557 NULL, /* sub */
3558 NULL, /* next */
3559 0, /* static_pass_number */
3560 TV_SCHED, /* tv_id */
3561 0, /* properties_required */
3562 0, /* properties_provided */
3563 0, /* properties_destroyed */
3564 0, /* todo_flags_start */
3565 TODO_df_finish | TODO_verify_rtl_sharing |
3566 TODO_dump_func |
3567 TODO_verify_flow |
3568 TODO_ggc_collect /* todo_flags_finish */
3569 }
3570 };
3571
3572 struct rtl_opt_pass pass_sched2 =
3573 {
3574 {
3575 RTL_PASS,
3576 "sched2", /* name */
3577 gate_handle_sched2, /* gate */
3578 rest_of_handle_sched2, /* execute */
3579 NULL, /* sub */
3580 NULL, /* next */
3581 0, /* static_pass_number */
3582 TV_SCHED2, /* tv_id */
3583 0, /* properties_required */
3584 0, /* properties_provided */
3585 0, /* properties_destroyed */
3586 0, /* todo_flags_start */
3587 TODO_df_finish | TODO_verify_rtl_sharing |
3588 TODO_dump_func |
3589 TODO_verify_flow |
3590 TODO_ggc_collect /* todo_flags_finish */
3591 }
3592 };