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1 /* Instruction scheduling pass.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010, 2011
4 Free Software Foundation, Inc.
5 Contributed by Michael Tiemann (tiemann@cygnus.com) Enhanced by,
6 and currently maintained by, Jim Wilson (wilson@cygnus.com)
7
8 This file is part of GCC.
9
10 GCC is free software; you can redistribute it and/or modify it under
11 the terms of the GNU General Public License as published by the Free
12 Software Foundation; either version 3, or (at your option) any later
13 version.
14
15 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
16 WARRANTY; without even the implied warranty of MERCHANTABILITY or
17 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with GCC; see the file COPYING3. If not see
22 <http://www.gnu.org/licenses/>. */
23
24 /* This pass implements list scheduling within basic blocks. It is
25 run twice: (1) after flow analysis, but before register allocation,
26 and (2) after register allocation.
27
28 The first run performs interblock scheduling, moving insns between
29 different blocks in the same "region", and the second runs only
30 basic block scheduling.
31
32 Interblock motions performed are useful motions and speculative
33 motions, including speculative loads. Motions requiring code
34 duplication are not supported. The identification of motion type
35 and the check for validity of speculative motions requires
36 construction and analysis of the function's control flow graph.
37
38 The main entry point for this pass is schedule_insns(), called for
39 each function. The work of the scheduler is organized in three
40 levels: (1) function level: insns are subject to splitting,
41 control-flow-graph is constructed, regions are computed (after
42 reload, each region is of one block), (2) region level: control
43 flow graph attributes required for interblock scheduling are
44 computed (dominators, reachability, etc.), data dependences and
45 priorities are computed, and (3) block level: insns in the block
46 are actually scheduled. */
47 \f
48 #include "config.h"
49 #include "system.h"
50 #include "coretypes.h"
51 #include "tm.h"
52 #include "diagnostic-core.h"
53 #include "rtl.h"
54 #include "tm_p.h"
55 #include "hard-reg-set.h"
56 #include "regs.h"
57 #include "function.h"
58 #include "flags.h"
59 #include "insn-config.h"
60 #include "insn-attr.h"
61 #include "except.h"
62 #include "recog.h"
63 #include "params.h"
64 #include "sched-int.h"
65 #include "sel-sched.h"
66 #include "target.h"
67 #include "tree-pass.h"
68 #include "dbgcnt.h"
69
70 #ifdef INSN_SCHEDULING
71
72 /* Some accessor macros for h_i_d members only used within this file. */
73 #define FED_BY_SPEC_LOAD(INSN) (HID (INSN)->fed_by_spec_load)
74 #define IS_LOAD_INSN(INSN) (HID (insn)->is_load_insn)
75
76 /* nr_inter/spec counts interblock/speculative motion for the function. */
77 static int nr_inter, nr_spec;
78
79 static int is_cfg_nonregular (void);
80
81 /* Number of regions in the procedure. */
82 int nr_regions = 0;
83
84 /* Table of region descriptions. */
85 region *rgn_table = NULL;
86
87 /* Array of lists of regions' blocks. */
88 int *rgn_bb_table = NULL;
89
90 /* Topological order of blocks in the region (if b2 is reachable from
91 b1, block_to_bb[b2] > block_to_bb[b1]). Note: A basic block is
92 always referred to by either block or b, while its topological
93 order name (in the region) is referred to by bb. */
94 int *block_to_bb = NULL;
95
96 /* The number of the region containing a block. */
97 int *containing_rgn = NULL;
98
99 /* ebb_head [i] - is index in rgn_bb_table of the head basic block of i'th ebb.
100 Currently we can get a ebb only through splitting of currently
101 scheduling block, therefore, we don't need ebb_head array for every region,
102 hence, its sufficient to hold it for current one only. */
103 int *ebb_head = NULL;
104
105 /* The minimum probability of reaching a source block so that it will be
106 considered for speculative scheduling. */
107 static int min_spec_prob;
108
109 static void find_single_block_region (bool);
110 static void find_rgns (void);
111 static bool too_large (int, int *, int *);
112
113 /* Blocks of the current region being scheduled. */
114 int current_nr_blocks;
115 int current_blocks;
116
117 /* A speculative motion requires checking live information on the path
118 from 'source' to 'target'. The split blocks are those to be checked.
119 After a speculative motion, live information should be modified in
120 the 'update' blocks.
121
122 Lists of split and update blocks for each candidate of the current
123 target are in array bblst_table. */
124 static basic_block *bblst_table;
125 static int bblst_size, bblst_last;
126
127 static char *bb_state_array;
128 static state_t *bb_state;
129
130 /* Target info declarations.
131
132 The block currently being scheduled is referred to as the "target" block,
133 while other blocks in the region from which insns can be moved to the
134 target are called "source" blocks. The candidate structure holds info
135 about such sources: are they valid? Speculative? Etc. */
136 typedef struct
137 {
138 basic_block *first_member;
139 int nr_members;
140 }
141 bblst;
142
143 typedef struct
144 {
145 char is_valid;
146 char is_speculative;
147 int src_prob;
148 bblst split_bbs;
149 bblst update_bbs;
150 }
151 candidate;
152
153 static candidate *candidate_table;
154 #define IS_VALID(src) (candidate_table[src].is_valid)
155 #define IS_SPECULATIVE(src) (candidate_table[src].is_speculative)
156 #define IS_SPECULATIVE_INSN(INSN) \
157 (IS_SPECULATIVE (BLOCK_TO_BB (BLOCK_NUM (INSN))))
158 #define SRC_PROB(src) ( candidate_table[src].src_prob )
159
160 /* The bb being currently scheduled. */
161 int target_bb;
162
163 /* List of edges. */
164 typedef struct
165 {
166 edge *first_member;
167 int nr_members;
168 }
169 edgelst;
170
171 static edge *edgelst_table;
172 static int edgelst_last;
173
174 static void extract_edgelst (sbitmap, edgelst *);
175
176 /* Target info functions. */
177 static void split_edges (int, int, edgelst *);
178 static void compute_trg_info (int);
179 void debug_candidate (int);
180 void debug_candidates (int);
181
182 /* Dominators array: dom[i] contains the sbitmap of dominators of
183 bb i in the region. */
184 static sbitmap *dom;
185
186 /* bb 0 is the only region entry. */
187 #define IS_RGN_ENTRY(bb) (!bb)
188
189 /* Is bb_src dominated by bb_trg. */
190 #define IS_DOMINATED(bb_src, bb_trg) \
191 ( TEST_BIT (dom[bb_src], bb_trg) )
192
193 /* Probability: Prob[i] is an int in [0, REG_BR_PROB_BASE] which is
194 the probability of bb i relative to the region entry. */
195 static int *prob;
196
197 /* Bit-set of edges, where bit i stands for edge i. */
198 typedef sbitmap edgeset;
199
200 /* Number of edges in the region. */
201 static int rgn_nr_edges;
202
203 /* Array of size rgn_nr_edges. */
204 static edge *rgn_edges;
205
206 /* Mapping from each edge in the graph to its number in the rgn. */
207 #define EDGE_TO_BIT(edge) ((int)(size_t)(edge)->aux)
208 #define SET_EDGE_TO_BIT(edge,nr) ((edge)->aux = (void *)(size_t)(nr))
209
210 /* The split edges of a source bb is different for each target
211 bb. In order to compute this efficiently, the 'potential-split edges'
212 are computed for each bb prior to scheduling a region. This is actually
213 the split edges of each bb relative to the region entry.
214
215 pot_split[bb] is the set of potential split edges of bb. */
216 static edgeset *pot_split;
217
218 /* For every bb, a set of its ancestor edges. */
219 static edgeset *ancestor_edges;
220
221 #define INSN_PROBABILITY(INSN) (SRC_PROB (BLOCK_TO_BB (BLOCK_NUM (INSN))))
222
223 /* Speculative scheduling functions. */
224 static int check_live_1 (int, rtx);
225 static void update_live_1 (int, rtx);
226 static int is_pfree (rtx, int, int);
227 static int find_conditional_protection (rtx, int);
228 static int is_conditionally_protected (rtx, int, int);
229 static int is_prisky (rtx, int, int);
230 static int is_exception_free (rtx, int, int);
231
232 static bool sets_likely_spilled (rtx);
233 static void sets_likely_spilled_1 (rtx, const_rtx, void *);
234 static void add_branch_dependences (rtx, rtx);
235 static void compute_block_dependences (int);
236
237 static void schedule_region (int);
238 static void concat_insn_mem_list (rtx, rtx, rtx *, rtx *);
239 static void propagate_deps (int, struct deps_desc *);
240 static void free_pending_lists (void);
241
242 /* Functions for construction of the control flow graph. */
243
244 /* Return 1 if control flow graph should not be constructed, 0 otherwise.
245
246 We decide not to build the control flow graph if there is possibly more
247 than one entry to the function, if computed branches exist, if we
248 have nonlocal gotos, or if we have an unreachable loop. */
249
250 static int
251 is_cfg_nonregular (void)
252 {
253 basic_block b;
254 rtx insn;
255
256 /* If we have a label that could be the target of a nonlocal goto, then
257 the cfg is not well structured. */
258 if (nonlocal_goto_handler_labels)
259 return 1;
260
261 /* If we have any forced labels, then the cfg is not well structured. */
262 if (forced_labels)
263 return 1;
264
265 /* If we have exception handlers, then we consider the cfg not well
266 structured. ?!? We should be able to handle this now that we
267 compute an accurate cfg for EH. */
268 if (current_function_has_exception_handlers ())
269 return 1;
270
271 /* If we have insns which refer to labels as non-jumped-to operands,
272 then we consider the cfg not well structured. */
273 FOR_EACH_BB (b)
274 FOR_BB_INSNS (b, insn)
275 {
276 rtx note, next, set, dest;
277
278 /* If this function has a computed jump, then we consider the cfg
279 not well structured. */
280 if (JUMP_P (insn) && computed_jump_p (insn))
281 return 1;
282
283 if (!INSN_P (insn))
284 continue;
285
286 note = find_reg_note (insn, REG_LABEL_OPERAND, NULL_RTX);
287 if (note == NULL_RTX)
288 continue;
289
290 /* For that label not to be seen as a referred-to label, this
291 must be a single-set which is feeding a jump *only*. This
292 could be a conditional jump with the label split off for
293 machine-specific reasons or a casesi/tablejump. */
294 next = next_nonnote_insn (insn);
295 if (next == NULL_RTX
296 || !JUMP_P (next)
297 || (JUMP_LABEL (next) != XEXP (note, 0)
298 && find_reg_note (next, REG_LABEL_TARGET,
299 XEXP (note, 0)) == NULL_RTX)
300 || BLOCK_FOR_INSN (insn) != BLOCK_FOR_INSN (next))
301 return 1;
302
303 set = single_set (insn);
304 if (set == NULL_RTX)
305 return 1;
306
307 dest = SET_DEST (set);
308 if (!REG_P (dest) || !dead_or_set_p (next, dest))
309 return 1;
310 }
311
312 /* Unreachable loops with more than one basic block are detected
313 during the DFS traversal in find_rgns.
314
315 Unreachable loops with a single block are detected here. This
316 test is redundant with the one in find_rgns, but it's much
317 cheaper to go ahead and catch the trivial case here. */
318 FOR_EACH_BB (b)
319 {
320 if (EDGE_COUNT (b->preds) == 0
321 || (single_pred_p (b)
322 && single_pred (b) == b))
323 return 1;
324 }
325
326 /* All the tests passed. Consider the cfg well structured. */
327 return 0;
328 }
329
330 /* Extract list of edges from a bitmap containing EDGE_TO_BIT bits. */
331
332 static void
333 extract_edgelst (sbitmap set, edgelst *el)
334 {
335 unsigned int i = 0;
336 sbitmap_iterator sbi;
337
338 /* edgelst table space is reused in each call to extract_edgelst. */
339 edgelst_last = 0;
340
341 el->first_member = &edgelst_table[edgelst_last];
342 el->nr_members = 0;
343
344 /* Iterate over each word in the bitset. */
345 EXECUTE_IF_SET_IN_SBITMAP (set, 0, i, sbi)
346 {
347 edgelst_table[edgelst_last++] = rgn_edges[i];
348 el->nr_members++;
349 }
350 }
351
352 /* Functions for the construction of regions. */
353
354 /* Print the regions, for debugging purposes. Callable from debugger. */
355
356 DEBUG_FUNCTION void
357 debug_regions (void)
358 {
359 int rgn, bb;
360
361 fprintf (sched_dump, "\n;; ------------ REGIONS ----------\n\n");
362 for (rgn = 0; rgn < nr_regions; rgn++)
363 {
364 fprintf (sched_dump, ";;\trgn %d nr_blocks %d:\n", rgn,
365 rgn_table[rgn].rgn_nr_blocks);
366 fprintf (sched_dump, ";;\tbb/block: ");
367
368 /* We don't have ebb_head initialized yet, so we can't use
369 BB_TO_BLOCK (). */
370 current_blocks = RGN_BLOCKS (rgn);
371
372 for (bb = 0; bb < rgn_table[rgn].rgn_nr_blocks; bb++)
373 fprintf (sched_dump, " %d/%d ", bb, rgn_bb_table[current_blocks + bb]);
374
375 fprintf (sched_dump, "\n\n");
376 }
377 }
378
379 /* Print the region's basic blocks. */
380
381 DEBUG_FUNCTION void
382 debug_region (int rgn)
383 {
384 int bb;
385
386 fprintf (stderr, "\n;; ------------ REGION %d ----------\n\n", rgn);
387 fprintf (stderr, ";;\trgn %d nr_blocks %d:\n", rgn,
388 rgn_table[rgn].rgn_nr_blocks);
389 fprintf (stderr, ";;\tbb/block: ");
390
391 /* We don't have ebb_head initialized yet, so we can't use
392 BB_TO_BLOCK (). */
393 current_blocks = RGN_BLOCKS (rgn);
394
395 for (bb = 0; bb < rgn_table[rgn].rgn_nr_blocks; bb++)
396 fprintf (stderr, " %d/%d ", bb, rgn_bb_table[current_blocks + bb]);
397
398 fprintf (stderr, "\n\n");
399
400 for (bb = 0; bb < rgn_table[rgn].rgn_nr_blocks; bb++)
401 {
402 dump_bb (stderr, BASIC_BLOCK (rgn_bb_table[current_blocks + bb]),
403 0, TDF_SLIM | TDF_BLOCKS);
404 fprintf (stderr, "\n");
405 }
406
407 fprintf (stderr, "\n");
408
409 }
410
411 /* True when a bb with index BB_INDEX contained in region RGN. */
412 static bool
413 bb_in_region_p (int bb_index, int rgn)
414 {
415 int i;
416
417 for (i = 0; i < rgn_table[rgn].rgn_nr_blocks; i++)
418 if (rgn_bb_table[current_blocks + i] == bb_index)
419 return true;
420
421 return false;
422 }
423
424 /* Dump region RGN to file F using dot syntax. */
425 void
426 dump_region_dot (FILE *f, int rgn)
427 {
428 int i;
429
430 fprintf (f, "digraph Region_%d {\n", rgn);
431
432 /* We don't have ebb_head initialized yet, so we can't use
433 BB_TO_BLOCK (). */
434 current_blocks = RGN_BLOCKS (rgn);
435
436 for (i = 0; i < rgn_table[rgn].rgn_nr_blocks; i++)
437 {
438 edge e;
439 edge_iterator ei;
440 int src_bb_num = rgn_bb_table[current_blocks + i];
441 basic_block bb = BASIC_BLOCK (src_bb_num);
442
443 FOR_EACH_EDGE (e, ei, bb->succs)
444 if (bb_in_region_p (e->dest->index, rgn))
445 fprintf (f, "\t%d -> %d\n", src_bb_num, e->dest->index);
446 }
447 fprintf (f, "}\n");
448 }
449
450 /* The same, but first open a file specified by FNAME. */
451 void
452 dump_region_dot_file (const char *fname, int rgn)
453 {
454 FILE *f = fopen (fname, "wt");
455 dump_region_dot (f, rgn);
456 fclose (f);
457 }
458
459 /* Build a single block region for each basic block in the function.
460 This allows for using the same code for interblock and basic block
461 scheduling. */
462
463 static void
464 find_single_block_region (bool ebbs_p)
465 {
466 basic_block bb, ebb_start;
467 int i = 0;
468
469 nr_regions = 0;
470
471 if (ebbs_p) {
472 int probability_cutoff;
473 if (profile_info && flag_branch_probabilities)
474 probability_cutoff = PARAM_VALUE (TRACER_MIN_BRANCH_PROBABILITY_FEEDBACK);
475 else
476 probability_cutoff = PARAM_VALUE (TRACER_MIN_BRANCH_PROBABILITY);
477 probability_cutoff = REG_BR_PROB_BASE / 100 * probability_cutoff;
478
479 FOR_EACH_BB (ebb_start)
480 {
481 RGN_NR_BLOCKS (nr_regions) = 0;
482 RGN_BLOCKS (nr_regions) = i;
483 RGN_DONT_CALC_DEPS (nr_regions) = 0;
484 RGN_HAS_REAL_EBB (nr_regions) = 0;
485
486 for (bb = ebb_start; ; bb = bb->next_bb)
487 {
488 edge e;
489
490 rgn_bb_table[i] = bb->index;
491 RGN_NR_BLOCKS (nr_regions)++;
492 CONTAINING_RGN (bb->index) = nr_regions;
493 BLOCK_TO_BB (bb->index) = i - RGN_BLOCKS (nr_regions);
494 i++;
495
496 if (bb->next_bb == EXIT_BLOCK_PTR
497 || LABEL_P (BB_HEAD (bb->next_bb)))
498 break;
499
500 e = find_fallthru_edge (bb->succs);
501 if (! e)
502 break;
503 if (e->probability <= probability_cutoff)
504 break;
505 }
506
507 ebb_start = bb;
508 nr_regions++;
509 }
510 }
511 else
512 FOR_EACH_BB (bb)
513 {
514 rgn_bb_table[nr_regions] = bb->index;
515 RGN_NR_BLOCKS (nr_regions) = 1;
516 RGN_BLOCKS (nr_regions) = nr_regions;
517 RGN_DONT_CALC_DEPS (nr_regions) = 0;
518 RGN_HAS_REAL_EBB (nr_regions) = 0;
519
520 CONTAINING_RGN (bb->index) = nr_regions;
521 BLOCK_TO_BB (bb->index) = 0;
522 nr_regions++;
523 }
524 }
525
526 /* Estimate number of the insns in the BB. */
527 static int
528 rgn_estimate_number_of_insns (basic_block bb)
529 {
530 int count;
531
532 count = INSN_LUID (BB_END (bb)) - INSN_LUID (BB_HEAD (bb));
533
534 if (MAY_HAVE_DEBUG_INSNS)
535 {
536 rtx insn;
537
538 FOR_BB_INSNS (bb, insn)
539 if (DEBUG_INSN_P (insn))
540 count--;
541 }
542
543 return count;
544 }
545
546 /* Update number of blocks and the estimate for number of insns
547 in the region. Return true if the region is "too large" for interblock
548 scheduling (compile time considerations). */
549
550 static bool
551 too_large (int block, int *num_bbs, int *num_insns)
552 {
553 (*num_bbs)++;
554 (*num_insns) += (common_sched_info->estimate_number_of_insns
555 (BASIC_BLOCK (block)));
556
557 return ((*num_bbs > PARAM_VALUE (PARAM_MAX_SCHED_REGION_BLOCKS))
558 || (*num_insns > PARAM_VALUE (PARAM_MAX_SCHED_REGION_INSNS)));
559 }
560
561 /* Update_loop_relations(blk, hdr): Check if the loop headed by max_hdr[blk]
562 is still an inner loop. Put in max_hdr[blk] the header of the most inner
563 loop containing blk. */
564 #define UPDATE_LOOP_RELATIONS(blk, hdr) \
565 { \
566 if (max_hdr[blk] == -1) \
567 max_hdr[blk] = hdr; \
568 else if (dfs_nr[max_hdr[blk]] > dfs_nr[hdr]) \
569 RESET_BIT (inner, hdr); \
570 else if (dfs_nr[max_hdr[blk]] < dfs_nr[hdr]) \
571 { \
572 RESET_BIT (inner,max_hdr[blk]); \
573 max_hdr[blk] = hdr; \
574 } \
575 }
576
577 /* Find regions for interblock scheduling.
578
579 A region for scheduling can be:
580
581 * A loop-free procedure, or
582
583 * A reducible inner loop, or
584
585 * A basic block not contained in any other region.
586
587 ?!? In theory we could build other regions based on extended basic
588 blocks or reverse extended basic blocks. Is it worth the trouble?
589
590 Loop blocks that form a region are put into the region's block list
591 in topological order.
592
593 This procedure stores its results into the following global (ick) variables
594
595 * rgn_nr
596 * rgn_table
597 * rgn_bb_table
598 * block_to_bb
599 * containing region
600
601 We use dominator relationships to avoid making regions out of non-reducible
602 loops.
603
604 This procedure needs to be converted to work on pred/succ lists instead
605 of edge tables. That would simplify it somewhat. */
606
607 static void
608 haifa_find_rgns (void)
609 {
610 int *max_hdr, *dfs_nr, *degree;
611 char no_loops = 1;
612 int node, child, loop_head, i, head, tail;
613 int count = 0, sp, idx = 0;
614 edge_iterator current_edge;
615 edge_iterator *stack;
616 int num_bbs, num_insns, unreachable;
617 int too_large_failure;
618 basic_block bb;
619
620 /* Note if a block is a natural loop header. */
621 sbitmap header;
622
623 /* Note if a block is a natural inner loop header. */
624 sbitmap inner;
625
626 /* Note if a block is in the block queue. */
627 sbitmap in_queue;
628
629 /* Note if a block is in the block queue. */
630 sbitmap in_stack;
631
632 /* Perform a DFS traversal of the cfg. Identify loop headers, inner loops
633 and a mapping from block to its loop header (if the block is contained
634 in a loop, else -1).
635
636 Store results in HEADER, INNER, and MAX_HDR respectively, these will
637 be used as inputs to the second traversal.
638
639 STACK, SP and DFS_NR are only used during the first traversal. */
640
641 /* Allocate and initialize variables for the first traversal. */
642 max_hdr = XNEWVEC (int, last_basic_block);
643 dfs_nr = XCNEWVEC (int, last_basic_block);
644 stack = XNEWVEC (edge_iterator, n_edges);
645
646 inner = sbitmap_alloc (last_basic_block);
647 sbitmap_ones (inner);
648
649 header = sbitmap_alloc (last_basic_block);
650 sbitmap_zero (header);
651
652 in_queue = sbitmap_alloc (last_basic_block);
653 sbitmap_zero (in_queue);
654
655 in_stack = sbitmap_alloc (last_basic_block);
656 sbitmap_zero (in_stack);
657
658 for (i = 0; i < last_basic_block; i++)
659 max_hdr[i] = -1;
660
661 #define EDGE_PASSED(E) (ei_end_p ((E)) || ei_edge ((E))->aux)
662 #define SET_EDGE_PASSED(E) (ei_edge ((E))->aux = ei_edge ((E)))
663
664 /* DFS traversal to find inner loops in the cfg. */
665
666 current_edge = ei_start (single_succ (ENTRY_BLOCK_PTR)->succs);
667 sp = -1;
668
669 while (1)
670 {
671 if (EDGE_PASSED (current_edge))
672 {
673 /* We have reached a leaf node or a node that was already
674 processed. Pop edges off the stack until we find
675 an edge that has not yet been processed. */
676 while (sp >= 0 && EDGE_PASSED (current_edge))
677 {
678 /* Pop entry off the stack. */
679 current_edge = stack[sp--];
680 node = ei_edge (current_edge)->src->index;
681 gcc_assert (node != ENTRY_BLOCK);
682 child = ei_edge (current_edge)->dest->index;
683 gcc_assert (child != EXIT_BLOCK);
684 RESET_BIT (in_stack, child);
685 if (max_hdr[child] >= 0 && TEST_BIT (in_stack, max_hdr[child]))
686 UPDATE_LOOP_RELATIONS (node, max_hdr[child]);
687 ei_next (&current_edge);
688 }
689
690 /* See if have finished the DFS tree traversal. */
691 if (sp < 0 && EDGE_PASSED (current_edge))
692 break;
693
694 /* Nope, continue the traversal with the popped node. */
695 continue;
696 }
697
698 /* Process a node. */
699 node = ei_edge (current_edge)->src->index;
700 gcc_assert (node != ENTRY_BLOCK);
701 SET_BIT (in_stack, node);
702 dfs_nr[node] = ++count;
703
704 /* We don't traverse to the exit block. */
705 child = ei_edge (current_edge)->dest->index;
706 if (child == EXIT_BLOCK)
707 {
708 SET_EDGE_PASSED (current_edge);
709 ei_next (&current_edge);
710 continue;
711 }
712
713 /* If the successor is in the stack, then we've found a loop.
714 Mark the loop, if it is not a natural loop, then it will
715 be rejected during the second traversal. */
716 if (TEST_BIT (in_stack, child))
717 {
718 no_loops = 0;
719 SET_BIT (header, child);
720 UPDATE_LOOP_RELATIONS (node, child);
721 SET_EDGE_PASSED (current_edge);
722 ei_next (&current_edge);
723 continue;
724 }
725
726 /* If the child was already visited, then there is no need to visit
727 it again. Just update the loop relationships and restart
728 with a new edge. */
729 if (dfs_nr[child])
730 {
731 if (max_hdr[child] >= 0 && TEST_BIT (in_stack, max_hdr[child]))
732 UPDATE_LOOP_RELATIONS (node, max_hdr[child]);
733 SET_EDGE_PASSED (current_edge);
734 ei_next (&current_edge);
735 continue;
736 }
737
738 /* Push an entry on the stack and continue DFS traversal. */
739 stack[++sp] = current_edge;
740 SET_EDGE_PASSED (current_edge);
741 current_edge = ei_start (ei_edge (current_edge)->dest->succs);
742 }
743
744 /* Reset ->aux field used by EDGE_PASSED. */
745 FOR_ALL_BB (bb)
746 {
747 edge_iterator ei;
748 edge e;
749 FOR_EACH_EDGE (e, ei, bb->succs)
750 e->aux = NULL;
751 }
752
753
754 /* Another check for unreachable blocks. The earlier test in
755 is_cfg_nonregular only finds unreachable blocks that do not
756 form a loop.
757
758 The DFS traversal will mark every block that is reachable from
759 the entry node by placing a nonzero value in dfs_nr. Thus if
760 dfs_nr is zero for any block, then it must be unreachable. */
761 unreachable = 0;
762 FOR_EACH_BB (bb)
763 if (dfs_nr[bb->index] == 0)
764 {
765 unreachable = 1;
766 break;
767 }
768
769 /* Gross. To avoid wasting memory, the second pass uses the dfs_nr array
770 to hold degree counts. */
771 degree = dfs_nr;
772
773 FOR_EACH_BB (bb)
774 degree[bb->index] = EDGE_COUNT (bb->preds);
775
776 /* Do not perform region scheduling if there are any unreachable
777 blocks. */
778 if (!unreachable)
779 {
780 int *queue, *degree1 = NULL;
781 /* We use EXTENDED_RGN_HEADER as an addition to HEADER and put
782 there basic blocks, which are forced to be region heads.
783 This is done to try to assemble few smaller regions
784 from a too_large region. */
785 sbitmap extended_rgn_header = NULL;
786 bool extend_regions_p;
787
788 if (no_loops)
789 SET_BIT (header, 0);
790
791 /* Second traversal:find reducible inner loops and topologically sort
792 block of each region. */
793
794 queue = XNEWVEC (int, n_basic_blocks);
795
796 extend_regions_p = PARAM_VALUE (PARAM_MAX_SCHED_EXTEND_REGIONS_ITERS) > 0;
797 if (extend_regions_p)
798 {
799 degree1 = XNEWVEC (int, last_basic_block);
800 extended_rgn_header = sbitmap_alloc (last_basic_block);
801 sbitmap_zero (extended_rgn_header);
802 }
803
804 /* Find blocks which are inner loop headers. We still have non-reducible
805 loops to consider at this point. */
806 FOR_EACH_BB (bb)
807 {
808 if (TEST_BIT (header, bb->index) && TEST_BIT (inner, bb->index))
809 {
810 edge e;
811 edge_iterator ei;
812 basic_block jbb;
813
814 /* Now check that the loop is reducible. We do this separate
815 from finding inner loops so that we do not find a reducible
816 loop which contains an inner non-reducible loop.
817
818 A simple way to find reducible/natural loops is to verify
819 that each block in the loop is dominated by the loop
820 header.
821
822 If there exists a block that is not dominated by the loop
823 header, then the block is reachable from outside the loop
824 and thus the loop is not a natural loop. */
825 FOR_EACH_BB (jbb)
826 {
827 /* First identify blocks in the loop, except for the loop
828 entry block. */
829 if (bb->index == max_hdr[jbb->index] && bb != jbb)
830 {
831 /* Now verify that the block is dominated by the loop
832 header. */
833 if (!dominated_by_p (CDI_DOMINATORS, jbb, bb))
834 break;
835 }
836 }
837
838 /* If we exited the loop early, then I is the header of
839 a non-reducible loop and we should quit processing it
840 now. */
841 if (jbb != EXIT_BLOCK_PTR)
842 continue;
843
844 /* I is a header of an inner loop, or block 0 in a subroutine
845 with no loops at all. */
846 head = tail = -1;
847 too_large_failure = 0;
848 loop_head = max_hdr[bb->index];
849
850 if (extend_regions_p)
851 /* We save degree in case when we meet a too_large region
852 and cancel it. We need a correct degree later when
853 calling extend_rgns. */
854 memcpy (degree1, degree, last_basic_block * sizeof (int));
855
856 /* Decrease degree of all I's successors for topological
857 ordering. */
858 FOR_EACH_EDGE (e, ei, bb->succs)
859 if (e->dest != EXIT_BLOCK_PTR)
860 --degree[e->dest->index];
861
862 /* Estimate # insns, and count # blocks in the region. */
863 num_bbs = 1;
864 num_insns = common_sched_info->estimate_number_of_insns (bb);
865
866 /* Find all loop latches (blocks with back edges to the loop
867 header) or all the leaf blocks in the cfg has no loops.
868
869 Place those blocks into the queue. */
870 if (no_loops)
871 {
872 FOR_EACH_BB (jbb)
873 /* Leaf nodes have only a single successor which must
874 be EXIT_BLOCK. */
875 if (single_succ_p (jbb)
876 && single_succ (jbb) == EXIT_BLOCK_PTR)
877 {
878 queue[++tail] = jbb->index;
879 SET_BIT (in_queue, jbb->index);
880
881 if (too_large (jbb->index, &num_bbs, &num_insns))
882 {
883 too_large_failure = 1;
884 break;
885 }
886 }
887 }
888 else
889 {
890 edge e;
891
892 FOR_EACH_EDGE (e, ei, bb->preds)
893 {
894 if (e->src == ENTRY_BLOCK_PTR)
895 continue;
896
897 node = e->src->index;
898
899 if (max_hdr[node] == loop_head && node != bb->index)
900 {
901 /* This is a loop latch. */
902 queue[++tail] = node;
903 SET_BIT (in_queue, node);
904
905 if (too_large (node, &num_bbs, &num_insns))
906 {
907 too_large_failure = 1;
908 break;
909 }
910 }
911 }
912 }
913
914 /* Now add all the blocks in the loop to the queue.
915
916 We know the loop is a natural loop; however the algorithm
917 above will not always mark certain blocks as being in the
918 loop. Consider:
919 node children
920 a b,c
921 b c
922 c a,d
923 d b
924
925 The algorithm in the DFS traversal may not mark B & D as part
926 of the loop (i.e. they will not have max_hdr set to A).
927
928 We know they can not be loop latches (else they would have
929 had max_hdr set since they'd have a backedge to a dominator
930 block). So we don't need them on the initial queue.
931
932 We know they are part of the loop because they are dominated
933 by the loop header and can be reached by a backwards walk of
934 the edges starting with nodes on the initial queue.
935
936 It is safe and desirable to include those nodes in the
937 loop/scheduling region. To do so we would need to decrease
938 the degree of a node if it is the target of a backedge
939 within the loop itself as the node is placed in the queue.
940
941 We do not do this because I'm not sure that the actual
942 scheduling code will properly handle this case. ?!? */
943
944 while (head < tail && !too_large_failure)
945 {
946 edge e;
947 child = queue[++head];
948
949 FOR_EACH_EDGE (e, ei, BASIC_BLOCK (child)->preds)
950 {
951 node = e->src->index;
952
953 /* See discussion above about nodes not marked as in
954 this loop during the initial DFS traversal. */
955 if (e->src == ENTRY_BLOCK_PTR
956 || max_hdr[node] != loop_head)
957 {
958 tail = -1;
959 break;
960 }
961 else if (!TEST_BIT (in_queue, node) && node != bb->index)
962 {
963 queue[++tail] = node;
964 SET_BIT (in_queue, node);
965
966 if (too_large (node, &num_bbs, &num_insns))
967 {
968 too_large_failure = 1;
969 break;
970 }
971 }
972 }
973 }
974
975 if (tail >= 0 && !too_large_failure)
976 {
977 /* Place the loop header into list of region blocks. */
978 degree[bb->index] = -1;
979 rgn_bb_table[idx] = bb->index;
980 RGN_NR_BLOCKS (nr_regions) = num_bbs;
981 RGN_BLOCKS (nr_regions) = idx++;
982 RGN_DONT_CALC_DEPS (nr_regions) = 0;
983 RGN_HAS_REAL_EBB (nr_regions) = 0;
984 CONTAINING_RGN (bb->index) = nr_regions;
985 BLOCK_TO_BB (bb->index) = count = 0;
986
987 /* Remove blocks from queue[] when their in degree
988 becomes zero. Repeat until no blocks are left on the
989 list. This produces a topological list of blocks in
990 the region. */
991 while (tail >= 0)
992 {
993 if (head < 0)
994 head = tail;
995 child = queue[head];
996 if (degree[child] == 0)
997 {
998 edge e;
999
1000 degree[child] = -1;
1001 rgn_bb_table[idx++] = child;
1002 BLOCK_TO_BB (child) = ++count;
1003 CONTAINING_RGN (child) = nr_regions;
1004 queue[head] = queue[tail--];
1005
1006 FOR_EACH_EDGE (e, ei, BASIC_BLOCK (child)->succs)
1007 if (e->dest != EXIT_BLOCK_PTR)
1008 --degree[e->dest->index];
1009 }
1010 else
1011 --head;
1012 }
1013 ++nr_regions;
1014 }
1015 else if (extend_regions_p)
1016 {
1017 /* Restore DEGREE. */
1018 int *t = degree;
1019
1020 degree = degree1;
1021 degree1 = t;
1022
1023 /* And force successors of BB to be region heads.
1024 This may provide several smaller regions instead
1025 of one too_large region. */
1026 FOR_EACH_EDGE (e, ei, bb->succs)
1027 if (e->dest != EXIT_BLOCK_PTR)
1028 SET_BIT (extended_rgn_header, e->dest->index);
1029 }
1030 }
1031 }
1032 free (queue);
1033
1034 if (extend_regions_p)
1035 {
1036 free (degree1);
1037
1038 sbitmap_a_or_b (header, header, extended_rgn_header);
1039 sbitmap_free (extended_rgn_header);
1040
1041 extend_rgns (degree, &idx, header, max_hdr);
1042 }
1043 }
1044
1045 /* Any block that did not end up in a region is placed into a region
1046 by itself. */
1047 FOR_EACH_BB (bb)
1048 if (degree[bb->index] >= 0)
1049 {
1050 rgn_bb_table[idx] = bb->index;
1051 RGN_NR_BLOCKS (nr_regions) = 1;
1052 RGN_BLOCKS (nr_regions) = idx++;
1053 RGN_DONT_CALC_DEPS (nr_regions) = 0;
1054 RGN_HAS_REAL_EBB (nr_regions) = 0;
1055 CONTAINING_RGN (bb->index) = nr_regions++;
1056 BLOCK_TO_BB (bb->index) = 0;
1057 }
1058
1059 free (max_hdr);
1060 free (degree);
1061 free (stack);
1062 sbitmap_free (header);
1063 sbitmap_free (inner);
1064 sbitmap_free (in_queue);
1065 sbitmap_free (in_stack);
1066 }
1067
1068
1069 /* Wrapper function.
1070 If FLAG_SEL_SCHED_PIPELINING is set, then use custom function to form
1071 regions. Otherwise just call find_rgns_haifa. */
1072 static void
1073 find_rgns (void)
1074 {
1075 if (sel_sched_p () && flag_sel_sched_pipelining)
1076 sel_find_rgns ();
1077 else
1078 haifa_find_rgns ();
1079 }
1080
1081 static int gather_region_statistics (int **);
1082 static void print_region_statistics (int *, int, int *, int);
1083
1084 /* Calculate the histogram that shows the number of regions having the
1085 given number of basic blocks, and store it in the RSP array. Return
1086 the size of this array. */
1087 static int
1088 gather_region_statistics (int **rsp)
1089 {
1090 int i, *a = 0, a_sz = 0;
1091
1092 /* a[i] is the number of regions that have (i + 1) basic blocks. */
1093 for (i = 0; i < nr_regions; i++)
1094 {
1095 int nr_blocks = RGN_NR_BLOCKS (i);
1096
1097 gcc_assert (nr_blocks >= 1);
1098
1099 if (nr_blocks > a_sz)
1100 {
1101 a = XRESIZEVEC (int, a, nr_blocks);
1102 do
1103 a[a_sz++] = 0;
1104 while (a_sz != nr_blocks);
1105 }
1106
1107 a[nr_blocks - 1]++;
1108 }
1109
1110 *rsp = a;
1111 return a_sz;
1112 }
1113
1114 /* Print regions statistics. S1 and S2 denote the data before and after
1115 calling extend_rgns, respectively. */
1116 static void
1117 print_region_statistics (int *s1, int s1_sz, int *s2, int s2_sz)
1118 {
1119 int i;
1120
1121 /* We iterate until s2_sz because extend_rgns does not decrease
1122 the maximal region size. */
1123 for (i = 1; i < s2_sz; i++)
1124 {
1125 int n1, n2;
1126
1127 n2 = s2[i];
1128
1129 if (n2 == 0)
1130 continue;
1131
1132 if (i >= s1_sz)
1133 n1 = 0;
1134 else
1135 n1 = s1[i];
1136
1137 fprintf (sched_dump, ";; Region extension statistics: size %d: " \
1138 "was %d + %d more\n", i + 1, n1, n2 - n1);
1139 }
1140 }
1141
1142 /* Extend regions.
1143 DEGREE - Array of incoming edge count, considering only
1144 the edges, that don't have their sources in formed regions yet.
1145 IDXP - pointer to the next available index in rgn_bb_table.
1146 HEADER - set of all region heads.
1147 LOOP_HDR - mapping from block to the containing loop
1148 (two blocks can reside within one region if they have
1149 the same loop header). */
1150 void
1151 extend_rgns (int *degree, int *idxp, sbitmap header, int *loop_hdr)
1152 {
1153 int *order, i, rescan = 0, idx = *idxp, iter = 0, max_iter, *max_hdr;
1154 int nblocks = n_basic_blocks - NUM_FIXED_BLOCKS;
1155
1156 max_iter = PARAM_VALUE (PARAM_MAX_SCHED_EXTEND_REGIONS_ITERS);
1157
1158 max_hdr = XNEWVEC (int, last_basic_block);
1159
1160 order = XNEWVEC (int, last_basic_block);
1161 post_order_compute (order, false, false);
1162
1163 for (i = nblocks - 1; i >= 0; i--)
1164 {
1165 int bbn = order[i];
1166 if (degree[bbn] >= 0)
1167 {
1168 max_hdr[bbn] = bbn;
1169 rescan = 1;
1170 }
1171 else
1172 /* This block already was processed in find_rgns. */
1173 max_hdr[bbn] = -1;
1174 }
1175
1176 /* The idea is to topologically walk through CFG in top-down order.
1177 During the traversal, if all the predecessors of a node are
1178 marked to be in the same region (they all have the same max_hdr),
1179 then current node is also marked to be a part of that region.
1180 Otherwise the node starts its own region.
1181 CFG should be traversed until no further changes are made. On each
1182 iteration the set of the region heads is extended (the set of those
1183 blocks that have max_hdr[bbi] == bbi). This set is upper bounded by the
1184 set of all basic blocks, thus the algorithm is guaranteed to
1185 terminate. */
1186
1187 while (rescan && iter < max_iter)
1188 {
1189 rescan = 0;
1190
1191 for (i = nblocks - 1; i >= 0; i--)
1192 {
1193 edge e;
1194 edge_iterator ei;
1195 int bbn = order[i];
1196
1197 if (max_hdr[bbn] != -1 && !TEST_BIT (header, bbn))
1198 {
1199 int hdr = -1;
1200
1201 FOR_EACH_EDGE (e, ei, BASIC_BLOCK (bbn)->preds)
1202 {
1203 int predn = e->src->index;
1204
1205 if (predn != ENTRY_BLOCK
1206 /* If pred wasn't processed in find_rgns. */
1207 && max_hdr[predn] != -1
1208 /* And pred and bb reside in the same loop.
1209 (Or out of any loop). */
1210 && loop_hdr[bbn] == loop_hdr[predn])
1211 {
1212 if (hdr == -1)
1213 /* Then bb extends the containing region of pred. */
1214 hdr = max_hdr[predn];
1215 else if (hdr != max_hdr[predn])
1216 /* Too bad, there are at least two predecessors
1217 that reside in different regions. Thus, BB should
1218 begin its own region. */
1219 {
1220 hdr = bbn;
1221 break;
1222 }
1223 }
1224 else
1225 /* BB starts its own region. */
1226 {
1227 hdr = bbn;
1228 break;
1229 }
1230 }
1231
1232 if (hdr == bbn)
1233 {
1234 /* If BB start its own region,
1235 update set of headers with BB. */
1236 SET_BIT (header, bbn);
1237 rescan = 1;
1238 }
1239 else
1240 gcc_assert (hdr != -1);
1241
1242 max_hdr[bbn] = hdr;
1243 }
1244 }
1245
1246 iter++;
1247 }
1248
1249 /* Statistics were gathered on the SPEC2000 package of tests with
1250 mainline weekly snapshot gcc-4.1-20051015 on ia64.
1251
1252 Statistics for SPECint:
1253 1 iteration : 1751 cases (38.7%)
1254 2 iterations: 2770 cases (61.3%)
1255 Blocks wrapped in regions by find_rgns without extension: 18295 blocks
1256 Blocks wrapped in regions by 2 iterations in extend_rgns: 23821 blocks
1257 (We don't count single block regions here).
1258
1259 Statistics for SPECfp:
1260 1 iteration : 621 cases (35.9%)
1261 2 iterations: 1110 cases (64.1%)
1262 Blocks wrapped in regions by find_rgns without extension: 6476 blocks
1263 Blocks wrapped in regions by 2 iterations in extend_rgns: 11155 blocks
1264 (We don't count single block regions here).
1265
1266 By default we do at most 2 iterations.
1267 This can be overridden with max-sched-extend-regions-iters parameter:
1268 0 - disable region extension,
1269 N > 0 - do at most N iterations. */
1270
1271 if (sched_verbose && iter != 0)
1272 fprintf (sched_dump, ";; Region extension iterations: %d%s\n", iter,
1273 rescan ? "... failed" : "");
1274
1275 if (!rescan && iter != 0)
1276 {
1277 int *s1 = NULL, s1_sz = 0;
1278
1279 /* Save the old statistics for later printout. */
1280 if (sched_verbose >= 6)
1281 s1_sz = gather_region_statistics (&s1);
1282
1283 /* We have succeeded. Now assemble the regions. */
1284 for (i = nblocks - 1; i >= 0; i--)
1285 {
1286 int bbn = order[i];
1287
1288 if (max_hdr[bbn] == bbn)
1289 /* BBN is a region head. */
1290 {
1291 edge e;
1292 edge_iterator ei;
1293 int num_bbs = 0, j, num_insns = 0, large;
1294
1295 large = too_large (bbn, &num_bbs, &num_insns);
1296
1297 degree[bbn] = -1;
1298 rgn_bb_table[idx] = bbn;
1299 RGN_BLOCKS (nr_regions) = idx++;
1300 RGN_DONT_CALC_DEPS (nr_regions) = 0;
1301 RGN_HAS_REAL_EBB (nr_regions) = 0;
1302 CONTAINING_RGN (bbn) = nr_regions;
1303 BLOCK_TO_BB (bbn) = 0;
1304
1305 FOR_EACH_EDGE (e, ei, BASIC_BLOCK (bbn)->succs)
1306 if (e->dest != EXIT_BLOCK_PTR)
1307 degree[e->dest->index]--;
1308
1309 if (!large)
1310 /* Here we check whether the region is too_large. */
1311 for (j = i - 1; j >= 0; j--)
1312 {
1313 int succn = order[j];
1314 if (max_hdr[succn] == bbn)
1315 {
1316 if ((large = too_large (succn, &num_bbs, &num_insns)))
1317 break;
1318 }
1319 }
1320
1321 if (large)
1322 /* If the region is too_large, then wrap every block of
1323 the region into single block region.
1324 Here we wrap region head only. Other blocks are
1325 processed in the below cycle. */
1326 {
1327 RGN_NR_BLOCKS (nr_regions) = 1;
1328 nr_regions++;
1329 }
1330
1331 num_bbs = 1;
1332
1333 for (j = i - 1; j >= 0; j--)
1334 {
1335 int succn = order[j];
1336
1337 if (max_hdr[succn] == bbn)
1338 /* This cycle iterates over all basic blocks, that
1339 are supposed to be in the region with head BBN,
1340 and wraps them into that region (or in single
1341 block region). */
1342 {
1343 gcc_assert (degree[succn] == 0);
1344
1345 degree[succn] = -1;
1346 rgn_bb_table[idx] = succn;
1347 BLOCK_TO_BB (succn) = large ? 0 : num_bbs++;
1348 CONTAINING_RGN (succn) = nr_regions;
1349
1350 if (large)
1351 /* Wrap SUCCN into single block region. */
1352 {
1353 RGN_BLOCKS (nr_regions) = idx;
1354 RGN_NR_BLOCKS (nr_regions) = 1;
1355 RGN_DONT_CALC_DEPS (nr_regions) = 0;
1356 RGN_HAS_REAL_EBB (nr_regions) = 0;
1357 nr_regions++;
1358 }
1359
1360 idx++;
1361
1362 FOR_EACH_EDGE (e, ei, BASIC_BLOCK (succn)->succs)
1363 if (e->dest != EXIT_BLOCK_PTR)
1364 degree[e->dest->index]--;
1365 }
1366 }
1367
1368 if (!large)
1369 {
1370 RGN_NR_BLOCKS (nr_regions) = num_bbs;
1371 nr_regions++;
1372 }
1373 }
1374 }
1375
1376 if (sched_verbose >= 6)
1377 {
1378 int *s2, s2_sz;
1379
1380 /* Get the new statistics and print the comparison with the
1381 one before calling this function. */
1382 s2_sz = gather_region_statistics (&s2);
1383 print_region_statistics (s1, s1_sz, s2, s2_sz);
1384 free (s1);
1385 free (s2);
1386 }
1387 }
1388
1389 free (order);
1390 free (max_hdr);
1391
1392 *idxp = idx;
1393 }
1394
1395 /* Functions for regions scheduling information. */
1396
1397 /* Compute dominators, probability, and potential-split-edges of bb.
1398 Assume that these values were already computed for bb's predecessors. */
1399
1400 static void
1401 compute_dom_prob_ps (int bb)
1402 {
1403 edge_iterator in_ei;
1404 edge in_edge;
1405
1406 /* We shouldn't have any real ebbs yet. */
1407 gcc_assert (ebb_head [bb] == bb + current_blocks);
1408
1409 if (IS_RGN_ENTRY (bb))
1410 {
1411 SET_BIT (dom[bb], 0);
1412 prob[bb] = REG_BR_PROB_BASE;
1413 return;
1414 }
1415
1416 prob[bb] = 0;
1417
1418 /* Initialize dom[bb] to '111..1'. */
1419 sbitmap_ones (dom[bb]);
1420
1421 FOR_EACH_EDGE (in_edge, in_ei, BASIC_BLOCK (BB_TO_BLOCK (bb))->preds)
1422 {
1423 int pred_bb;
1424 edge out_edge;
1425 edge_iterator out_ei;
1426
1427 if (in_edge->src == ENTRY_BLOCK_PTR)
1428 continue;
1429
1430 pred_bb = BLOCK_TO_BB (in_edge->src->index);
1431 sbitmap_a_and_b (dom[bb], dom[bb], dom[pred_bb]);
1432 sbitmap_a_or_b (ancestor_edges[bb],
1433 ancestor_edges[bb], ancestor_edges[pred_bb]);
1434
1435 SET_BIT (ancestor_edges[bb], EDGE_TO_BIT (in_edge));
1436
1437 sbitmap_a_or_b (pot_split[bb], pot_split[bb], pot_split[pred_bb]);
1438
1439 FOR_EACH_EDGE (out_edge, out_ei, in_edge->src->succs)
1440 SET_BIT (pot_split[bb], EDGE_TO_BIT (out_edge));
1441
1442 prob[bb] += ((prob[pred_bb] * in_edge->probability) / REG_BR_PROB_BASE);
1443 }
1444
1445 SET_BIT (dom[bb], bb);
1446 sbitmap_difference (pot_split[bb], pot_split[bb], ancestor_edges[bb]);
1447
1448 if (sched_verbose >= 2)
1449 fprintf (sched_dump, ";; bb_prob(%d, %d) = %3d\n", bb, BB_TO_BLOCK (bb),
1450 (100 * prob[bb]) / REG_BR_PROB_BASE);
1451 }
1452
1453 /* Functions for target info. */
1454
1455 /* Compute in BL the list of split-edges of bb_src relatively to bb_trg.
1456 Note that bb_trg dominates bb_src. */
1457
1458 static void
1459 split_edges (int bb_src, int bb_trg, edgelst *bl)
1460 {
1461 sbitmap src = sbitmap_alloc (SBITMAP_SIZE (pot_split[bb_src]));
1462 sbitmap_copy (src, pot_split[bb_src]);
1463
1464 sbitmap_difference (src, src, pot_split[bb_trg]);
1465 extract_edgelst (src, bl);
1466 sbitmap_free (src);
1467 }
1468
1469 /* Find the valid candidate-source-blocks for the target block TRG, compute
1470 their probability, and check if they are speculative or not.
1471 For speculative sources, compute their update-blocks and split-blocks. */
1472
1473 static void
1474 compute_trg_info (int trg)
1475 {
1476 candidate *sp;
1477 edgelst el = { NULL, 0 };
1478 int i, j, k, update_idx;
1479 basic_block block;
1480 sbitmap visited;
1481 edge_iterator ei;
1482 edge e;
1483
1484 candidate_table = XNEWVEC (candidate, current_nr_blocks);
1485
1486 bblst_last = 0;
1487 /* bblst_table holds split blocks and update blocks for each block after
1488 the current one in the region. split blocks and update blocks are
1489 the TO blocks of region edges, so there can be at most rgn_nr_edges
1490 of them. */
1491 bblst_size = (current_nr_blocks - target_bb) * rgn_nr_edges;
1492 bblst_table = XNEWVEC (basic_block, bblst_size);
1493
1494 edgelst_last = 0;
1495 edgelst_table = XNEWVEC (edge, rgn_nr_edges);
1496
1497 /* Define some of the fields for the target bb as well. */
1498 sp = candidate_table + trg;
1499 sp->is_valid = 1;
1500 sp->is_speculative = 0;
1501 sp->src_prob = REG_BR_PROB_BASE;
1502
1503 visited = sbitmap_alloc (last_basic_block);
1504
1505 for (i = trg + 1; i < current_nr_blocks; i++)
1506 {
1507 sp = candidate_table + i;
1508
1509 sp->is_valid = IS_DOMINATED (i, trg);
1510 if (sp->is_valid)
1511 {
1512 int tf = prob[trg], cf = prob[i];
1513
1514 /* In CFGs with low probability edges TF can possibly be zero. */
1515 sp->src_prob = (tf ? ((cf * REG_BR_PROB_BASE) / tf) : 0);
1516 sp->is_valid = (sp->src_prob >= min_spec_prob);
1517 }
1518
1519 if (sp->is_valid)
1520 {
1521 split_edges (i, trg, &el);
1522 sp->is_speculative = (el.nr_members) ? 1 : 0;
1523 if (sp->is_speculative && !flag_schedule_speculative)
1524 sp->is_valid = 0;
1525 }
1526
1527 if (sp->is_valid)
1528 {
1529 /* Compute split blocks and store them in bblst_table.
1530 The TO block of every split edge is a split block. */
1531 sp->split_bbs.first_member = &bblst_table[bblst_last];
1532 sp->split_bbs.nr_members = el.nr_members;
1533 for (j = 0; j < el.nr_members; bblst_last++, j++)
1534 bblst_table[bblst_last] = el.first_member[j]->dest;
1535 sp->update_bbs.first_member = &bblst_table[bblst_last];
1536
1537 /* Compute update blocks and store them in bblst_table.
1538 For every split edge, look at the FROM block, and check
1539 all out edges. For each out edge that is not a split edge,
1540 add the TO block to the update block list. This list can end
1541 up with a lot of duplicates. We need to weed them out to avoid
1542 overrunning the end of the bblst_table. */
1543
1544 update_idx = 0;
1545 sbitmap_zero (visited);
1546 for (j = 0; j < el.nr_members; j++)
1547 {
1548 block = el.first_member[j]->src;
1549 FOR_EACH_EDGE (e, ei, block->succs)
1550 {
1551 if (!TEST_BIT (visited, e->dest->index))
1552 {
1553 for (k = 0; k < el.nr_members; k++)
1554 if (e == el.first_member[k])
1555 break;
1556
1557 if (k >= el.nr_members)
1558 {
1559 bblst_table[bblst_last++] = e->dest;
1560 SET_BIT (visited, e->dest->index);
1561 update_idx++;
1562 }
1563 }
1564 }
1565 }
1566 sp->update_bbs.nr_members = update_idx;
1567
1568 /* Make sure we didn't overrun the end of bblst_table. */
1569 gcc_assert (bblst_last <= bblst_size);
1570 }
1571 else
1572 {
1573 sp->split_bbs.nr_members = sp->update_bbs.nr_members = 0;
1574
1575 sp->is_speculative = 0;
1576 sp->src_prob = 0;
1577 }
1578 }
1579
1580 sbitmap_free (visited);
1581 }
1582
1583 /* Free the computed target info. */
1584 static void
1585 free_trg_info (void)
1586 {
1587 free (candidate_table);
1588 free (bblst_table);
1589 free (edgelst_table);
1590 }
1591
1592 /* Print candidates info, for debugging purposes. Callable from debugger. */
1593
1594 DEBUG_FUNCTION void
1595 debug_candidate (int i)
1596 {
1597 if (!candidate_table[i].is_valid)
1598 return;
1599
1600 if (candidate_table[i].is_speculative)
1601 {
1602 int j;
1603 fprintf (sched_dump, "src b %d bb %d speculative \n", BB_TO_BLOCK (i), i);
1604
1605 fprintf (sched_dump, "split path: ");
1606 for (j = 0; j < candidate_table[i].split_bbs.nr_members; j++)
1607 {
1608 int b = candidate_table[i].split_bbs.first_member[j]->index;
1609
1610 fprintf (sched_dump, " %d ", b);
1611 }
1612 fprintf (sched_dump, "\n");
1613
1614 fprintf (sched_dump, "update path: ");
1615 for (j = 0; j < candidate_table[i].update_bbs.nr_members; j++)
1616 {
1617 int b = candidate_table[i].update_bbs.first_member[j]->index;
1618
1619 fprintf (sched_dump, " %d ", b);
1620 }
1621 fprintf (sched_dump, "\n");
1622 }
1623 else
1624 {
1625 fprintf (sched_dump, " src %d equivalent\n", BB_TO_BLOCK (i));
1626 }
1627 }
1628
1629 /* Print candidates info, for debugging purposes. Callable from debugger. */
1630
1631 DEBUG_FUNCTION void
1632 debug_candidates (int trg)
1633 {
1634 int i;
1635
1636 fprintf (sched_dump, "----------- candidate table: target: b=%d bb=%d ---\n",
1637 BB_TO_BLOCK (trg), trg);
1638 for (i = trg + 1; i < current_nr_blocks; i++)
1639 debug_candidate (i);
1640 }
1641
1642 /* Functions for speculative scheduling. */
1643
1644 static bitmap_head not_in_df;
1645
1646 /* Return 0 if x is a set of a register alive in the beginning of one
1647 of the split-blocks of src, otherwise return 1. */
1648
1649 static int
1650 check_live_1 (int src, rtx x)
1651 {
1652 int i;
1653 int regno;
1654 rtx reg = SET_DEST (x);
1655
1656 if (reg == 0)
1657 return 1;
1658
1659 while (GET_CODE (reg) == SUBREG
1660 || GET_CODE (reg) == ZERO_EXTRACT
1661 || GET_CODE (reg) == STRICT_LOW_PART)
1662 reg = XEXP (reg, 0);
1663
1664 if (GET_CODE (reg) == PARALLEL)
1665 {
1666 int i;
1667
1668 for (i = XVECLEN (reg, 0) - 1; i >= 0; i--)
1669 if (XEXP (XVECEXP (reg, 0, i), 0) != 0)
1670 if (check_live_1 (src, XEXP (XVECEXP (reg, 0, i), 0)))
1671 return 1;
1672
1673 return 0;
1674 }
1675
1676 if (!REG_P (reg))
1677 return 1;
1678
1679 regno = REGNO (reg);
1680
1681 if (regno < FIRST_PSEUDO_REGISTER && global_regs[regno])
1682 {
1683 /* Global registers are assumed live. */
1684 return 0;
1685 }
1686 else
1687 {
1688 if (regno < FIRST_PSEUDO_REGISTER)
1689 {
1690 /* Check for hard registers. */
1691 int j = hard_regno_nregs[regno][GET_MODE (reg)];
1692 while (--j >= 0)
1693 {
1694 for (i = 0; i < candidate_table[src].split_bbs.nr_members; i++)
1695 {
1696 basic_block b = candidate_table[src].split_bbs.first_member[i];
1697 int t = bitmap_bit_p (&not_in_df, b->index);
1698
1699 /* We can have split blocks, that were recently generated.
1700 Such blocks are always outside current region. */
1701 gcc_assert (!t || (CONTAINING_RGN (b->index)
1702 != CONTAINING_RGN (BB_TO_BLOCK (src))));
1703
1704 if (t || REGNO_REG_SET_P (df_get_live_in (b), regno + j))
1705 return 0;
1706 }
1707 }
1708 }
1709 else
1710 {
1711 /* Check for pseudo registers. */
1712 for (i = 0; i < candidate_table[src].split_bbs.nr_members; i++)
1713 {
1714 basic_block b = candidate_table[src].split_bbs.first_member[i];
1715 int t = bitmap_bit_p (&not_in_df, b->index);
1716
1717 gcc_assert (!t || (CONTAINING_RGN (b->index)
1718 != CONTAINING_RGN (BB_TO_BLOCK (src))));
1719
1720 if (t || REGNO_REG_SET_P (df_get_live_in (b), regno))
1721 return 0;
1722 }
1723 }
1724 }
1725
1726 return 1;
1727 }
1728
1729 /* If x is a set of a register R, mark that R is alive in the beginning
1730 of every update-block of src. */
1731
1732 static void
1733 update_live_1 (int src, rtx x)
1734 {
1735 int i;
1736 int regno;
1737 rtx reg = SET_DEST (x);
1738
1739 if (reg == 0)
1740 return;
1741
1742 while (GET_CODE (reg) == SUBREG
1743 || GET_CODE (reg) == ZERO_EXTRACT
1744 || GET_CODE (reg) == STRICT_LOW_PART)
1745 reg = XEXP (reg, 0);
1746
1747 if (GET_CODE (reg) == PARALLEL)
1748 {
1749 int i;
1750
1751 for (i = XVECLEN (reg, 0) - 1; i >= 0; i--)
1752 if (XEXP (XVECEXP (reg, 0, i), 0) != 0)
1753 update_live_1 (src, XEXP (XVECEXP (reg, 0, i), 0));
1754
1755 return;
1756 }
1757
1758 if (!REG_P (reg))
1759 return;
1760
1761 /* Global registers are always live, so the code below does not apply
1762 to them. */
1763
1764 regno = REGNO (reg);
1765
1766 if (! HARD_REGISTER_NUM_P (regno)
1767 || !global_regs[regno])
1768 {
1769 for (i = 0; i < candidate_table[src].update_bbs.nr_members; i++)
1770 {
1771 basic_block b = candidate_table[src].update_bbs.first_member[i];
1772
1773 if (HARD_REGISTER_NUM_P (regno))
1774 bitmap_set_range (df_get_live_in (b), regno,
1775 hard_regno_nregs[regno][GET_MODE (reg)]);
1776 else
1777 bitmap_set_bit (df_get_live_in (b), regno);
1778 }
1779 }
1780 }
1781
1782 /* Return 1 if insn can be speculatively moved from block src to trg,
1783 otherwise return 0. Called before first insertion of insn to
1784 ready-list or before the scheduling. */
1785
1786 static int
1787 check_live (rtx insn, int src)
1788 {
1789 /* Find the registers set by instruction. */
1790 if (GET_CODE (PATTERN (insn)) == SET
1791 || GET_CODE (PATTERN (insn)) == CLOBBER)
1792 return check_live_1 (src, PATTERN (insn));
1793 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
1794 {
1795 int j;
1796 for (j = XVECLEN (PATTERN (insn), 0) - 1; j >= 0; j--)
1797 if ((GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == SET
1798 || GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == CLOBBER)
1799 && !check_live_1 (src, XVECEXP (PATTERN (insn), 0, j)))
1800 return 0;
1801
1802 return 1;
1803 }
1804
1805 return 1;
1806 }
1807
1808 /* Update the live registers info after insn was moved speculatively from
1809 block src to trg. */
1810
1811 static void
1812 update_live (rtx insn, int src)
1813 {
1814 /* Find the registers set by instruction. */
1815 if (GET_CODE (PATTERN (insn)) == SET
1816 || GET_CODE (PATTERN (insn)) == CLOBBER)
1817 update_live_1 (src, PATTERN (insn));
1818 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
1819 {
1820 int j;
1821 for (j = XVECLEN (PATTERN (insn), 0) - 1; j >= 0; j--)
1822 if (GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == SET
1823 || GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == CLOBBER)
1824 update_live_1 (src, XVECEXP (PATTERN (insn), 0, j));
1825 }
1826 }
1827
1828 /* Nonzero if block bb_to is equal to, or reachable from block bb_from. */
1829 #define IS_REACHABLE(bb_from, bb_to) \
1830 (bb_from == bb_to \
1831 || IS_RGN_ENTRY (bb_from) \
1832 || (TEST_BIT (ancestor_edges[bb_to], \
1833 EDGE_TO_BIT (single_pred_edge (BASIC_BLOCK (BB_TO_BLOCK (bb_from)))))))
1834
1835 /* Turns on the fed_by_spec_load flag for insns fed by load_insn. */
1836
1837 static void
1838 set_spec_fed (rtx load_insn)
1839 {
1840 sd_iterator_def sd_it;
1841 dep_t dep;
1842
1843 FOR_EACH_DEP (load_insn, SD_LIST_FORW, sd_it, dep)
1844 if (DEP_TYPE (dep) == REG_DEP_TRUE)
1845 FED_BY_SPEC_LOAD (DEP_CON (dep)) = 1;
1846 }
1847
1848 /* On the path from the insn to load_insn_bb, find a conditional
1849 branch depending on insn, that guards the speculative load. */
1850
1851 static int
1852 find_conditional_protection (rtx insn, int load_insn_bb)
1853 {
1854 sd_iterator_def sd_it;
1855 dep_t dep;
1856
1857 /* Iterate through DEF-USE forward dependences. */
1858 FOR_EACH_DEP (insn, SD_LIST_FORW, sd_it, dep)
1859 {
1860 rtx next = DEP_CON (dep);
1861
1862 if ((CONTAINING_RGN (BLOCK_NUM (next)) ==
1863 CONTAINING_RGN (BB_TO_BLOCK (load_insn_bb)))
1864 && IS_REACHABLE (INSN_BB (next), load_insn_bb)
1865 && load_insn_bb != INSN_BB (next)
1866 && DEP_TYPE (dep) == REG_DEP_TRUE
1867 && (JUMP_P (next)
1868 || find_conditional_protection (next, load_insn_bb)))
1869 return 1;
1870 }
1871 return 0;
1872 } /* find_conditional_protection */
1873
1874 /* Returns 1 if the same insn1 that participates in the computation
1875 of load_insn's address is feeding a conditional branch that is
1876 guarding on load_insn. This is true if we find two DEF-USE
1877 chains:
1878 insn1 -> ... -> conditional-branch
1879 insn1 -> ... -> load_insn,
1880 and if a flow path exists:
1881 insn1 -> ... -> conditional-branch -> ... -> load_insn,
1882 and if insn1 is on the path
1883 region-entry -> ... -> bb_trg -> ... load_insn.
1884
1885 Locate insn1 by climbing on INSN_BACK_DEPS from load_insn.
1886 Locate the branch by following INSN_FORW_DEPS from insn1. */
1887
1888 static int
1889 is_conditionally_protected (rtx load_insn, int bb_src, int bb_trg)
1890 {
1891 sd_iterator_def sd_it;
1892 dep_t dep;
1893
1894 FOR_EACH_DEP (load_insn, SD_LIST_BACK, sd_it, dep)
1895 {
1896 rtx insn1 = DEP_PRO (dep);
1897
1898 /* Must be a DEF-USE dependence upon non-branch. */
1899 if (DEP_TYPE (dep) != REG_DEP_TRUE
1900 || JUMP_P (insn1))
1901 continue;
1902
1903 /* Must exist a path: region-entry -> ... -> bb_trg -> ... load_insn. */
1904 if (INSN_BB (insn1) == bb_src
1905 || (CONTAINING_RGN (BLOCK_NUM (insn1))
1906 != CONTAINING_RGN (BB_TO_BLOCK (bb_src)))
1907 || (!IS_REACHABLE (bb_trg, INSN_BB (insn1))
1908 && !IS_REACHABLE (INSN_BB (insn1), bb_trg)))
1909 continue;
1910
1911 /* Now search for the conditional-branch. */
1912 if (find_conditional_protection (insn1, bb_src))
1913 return 1;
1914
1915 /* Recursive step: search another insn1, "above" current insn1. */
1916 return is_conditionally_protected (insn1, bb_src, bb_trg);
1917 }
1918
1919 /* The chain does not exist. */
1920 return 0;
1921 } /* is_conditionally_protected */
1922
1923 /* Returns 1 if a clue for "similar load" 'insn2' is found, and hence
1924 load_insn can move speculatively from bb_src to bb_trg. All the
1925 following must hold:
1926
1927 (1) both loads have 1 base register (PFREE_CANDIDATEs).
1928 (2) load_insn and load1 have a def-use dependence upon
1929 the same insn 'insn1'.
1930 (3) either load2 is in bb_trg, or:
1931 - there's only one split-block, and
1932 - load1 is on the escape path, and
1933
1934 From all these we can conclude that the two loads access memory
1935 addresses that differ at most by a constant, and hence if moving
1936 load_insn would cause an exception, it would have been caused by
1937 load2 anyhow. */
1938
1939 static int
1940 is_pfree (rtx load_insn, int bb_src, int bb_trg)
1941 {
1942 sd_iterator_def back_sd_it;
1943 dep_t back_dep;
1944 candidate *candp = candidate_table + bb_src;
1945
1946 if (candp->split_bbs.nr_members != 1)
1947 /* Must have exactly one escape block. */
1948 return 0;
1949
1950 FOR_EACH_DEP (load_insn, SD_LIST_BACK, back_sd_it, back_dep)
1951 {
1952 rtx insn1 = DEP_PRO (back_dep);
1953
1954 if (DEP_TYPE (back_dep) == REG_DEP_TRUE)
1955 /* Found a DEF-USE dependence (insn1, load_insn). */
1956 {
1957 sd_iterator_def fore_sd_it;
1958 dep_t fore_dep;
1959
1960 FOR_EACH_DEP (insn1, SD_LIST_FORW, fore_sd_it, fore_dep)
1961 {
1962 rtx insn2 = DEP_CON (fore_dep);
1963
1964 if (DEP_TYPE (fore_dep) == REG_DEP_TRUE)
1965 {
1966 /* Found a DEF-USE dependence (insn1, insn2). */
1967 if (haifa_classify_insn (insn2) != PFREE_CANDIDATE)
1968 /* insn2 not guaranteed to be a 1 base reg load. */
1969 continue;
1970
1971 if (INSN_BB (insn2) == bb_trg)
1972 /* insn2 is the similar load, in the target block. */
1973 return 1;
1974
1975 if (*(candp->split_bbs.first_member) == BLOCK_FOR_INSN (insn2))
1976 /* insn2 is a similar load, in a split-block. */
1977 return 1;
1978 }
1979 }
1980 }
1981 }
1982
1983 /* Couldn't find a similar load. */
1984 return 0;
1985 } /* is_pfree */
1986
1987 /* Return 1 if load_insn is prisky (i.e. if load_insn is fed by
1988 a load moved speculatively, or if load_insn is protected by
1989 a compare on load_insn's address). */
1990
1991 static int
1992 is_prisky (rtx load_insn, int bb_src, int bb_trg)
1993 {
1994 if (FED_BY_SPEC_LOAD (load_insn))
1995 return 1;
1996
1997 if (sd_lists_empty_p (load_insn, SD_LIST_BACK))
1998 /* Dependence may 'hide' out of the region. */
1999 return 1;
2000
2001 if (is_conditionally_protected (load_insn, bb_src, bb_trg))
2002 return 1;
2003
2004 return 0;
2005 }
2006
2007 /* Insn is a candidate to be moved speculatively from bb_src to bb_trg.
2008 Return 1 if insn is exception-free (and the motion is valid)
2009 and 0 otherwise. */
2010
2011 static int
2012 is_exception_free (rtx insn, int bb_src, int bb_trg)
2013 {
2014 int insn_class = haifa_classify_insn (insn);
2015
2016 /* Handle non-load insns. */
2017 switch (insn_class)
2018 {
2019 case TRAP_FREE:
2020 return 1;
2021 case TRAP_RISKY:
2022 return 0;
2023 default:;
2024 }
2025
2026 /* Handle loads. */
2027 if (!flag_schedule_speculative_load)
2028 return 0;
2029 IS_LOAD_INSN (insn) = 1;
2030 switch (insn_class)
2031 {
2032 case IFREE:
2033 return (1);
2034 case IRISKY:
2035 return 0;
2036 case PFREE_CANDIDATE:
2037 if (is_pfree (insn, bb_src, bb_trg))
2038 return 1;
2039 /* Don't 'break' here: PFREE-candidate is also PRISKY-candidate. */
2040 case PRISKY_CANDIDATE:
2041 if (!flag_schedule_speculative_load_dangerous
2042 || is_prisky (insn, bb_src, bb_trg))
2043 return 0;
2044 break;
2045 default:;
2046 }
2047
2048 return flag_schedule_speculative_load_dangerous;
2049 }
2050 \f
2051 /* The number of insns from the current block scheduled so far. */
2052 static int sched_target_n_insns;
2053 /* The number of insns from the current block to be scheduled in total. */
2054 static int target_n_insns;
2055 /* The number of insns from the entire region scheduled so far. */
2056 static int sched_n_insns;
2057
2058 /* Implementations of the sched_info functions for region scheduling. */
2059 static void init_ready_list (void);
2060 static int can_schedule_ready_p (rtx);
2061 static void begin_schedule_ready (rtx);
2062 static ds_t new_ready (rtx, ds_t);
2063 static int schedule_more_p (void);
2064 static const char *rgn_print_insn (const_rtx, int);
2065 static int rgn_rank (rtx, rtx);
2066 static void compute_jump_reg_dependencies (rtx, regset);
2067
2068 /* Functions for speculative scheduling. */
2069 static void rgn_add_remove_insn (rtx, int);
2070 static void rgn_add_block (basic_block, basic_block);
2071 static void rgn_fix_recovery_cfg (int, int, int);
2072 static basic_block advance_target_bb (basic_block, rtx);
2073
2074 /* Return nonzero if there are more insns that should be scheduled. */
2075
2076 static int
2077 schedule_more_p (void)
2078 {
2079 return sched_target_n_insns < target_n_insns;
2080 }
2081
2082 /* Add all insns that are initially ready to the ready list READY. Called
2083 once before scheduling a set of insns. */
2084
2085 static void
2086 init_ready_list (void)
2087 {
2088 rtx prev_head = current_sched_info->prev_head;
2089 rtx next_tail = current_sched_info->next_tail;
2090 int bb_src;
2091 rtx insn;
2092
2093 target_n_insns = 0;
2094 sched_target_n_insns = 0;
2095 sched_n_insns = 0;
2096
2097 /* Print debugging information. */
2098 if (sched_verbose >= 5)
2099 debug_rgn_dependencies (target_bb);
2100
2101 /* Prepare current target block info. */
2102 if (current_nr_blocks > 1)
2103 compute_trg_info (target_bb);
2104
2105 /* Initialize ready list with all 'ready' insns in target block.
2106 Count number of insns in the target block being scheduled. */
2107 for (insn = NEXT_INSN (prev_head); insn != next_tail; insn = NEXT_INSN (insn))
2108 {
2109 gcc_assert (TODO_SPEC (insn) == HARD_DEP || TODO_SPEC (insn) == DEP_POSTPONED);
2110 TODO_SPEC (insn) = HARD_DEP;
2111 try_ready (insn);
2112 target_n_insns++;
2113
2114 gcc_assert (!(TODO_SPEC (insn) & BEGIN_CONTROL));
2115 }
2116
2117 /* Add to ready list all 'ready' insns in valid source blocks.
2118 For speculative insns, check-live, exception-free, and
2119 issue-delay. */
2120 for (bb_src = target_bb + 1; bb_src < current_nr_blocks; bb_src++)
2121 if (IS_VALID (bb_src))
2122 {
2123 rtx src_head;
2124 rtx src_next_tail;
2125 rtx tail, head;
2126
2127 get_ebb_head_tail (EBB_FIRST_BB (bb_src), EBB_LAST_BB (bb_src),
2128 &head, &tail);
2129 src_next_tail = NEXT_INSN (tail);
2130 src_head = head;
2131
2132 for (insn = src_head; insn != src_next_tail; insn = NEXT_INSN (insn))
2133 if (INSN_P (insn))
2134 {
2135 gcc_assert (TODO_SPEC (insn) == HARD_DEP || TODO_SPEC (insn) == DEP_POSTPONED);
2136 TODO_SPEC (insn) = HARD_DEP;
2137 try_ready (insn);
2138 }
2139 }
2140 }
2141
2142 /* Called after taking INSN from the ready list. Returns nonzero if this
2143 insn can be scheduled, nonzero if we should silently discard it. */
2144
2145 static int
2146 can_schedule_ready_p (rtx insn)
2147 {
2148 /* An interblock motion? */
2149 if (INSN_BB (insn) != target_bb
2150 && IS_SPECULATIVE_INSN (insn)
2151 && !check_live (insn, INSN_BB (insn)))
2152 return 0;
2153 else
2154 return 1;
2155 }
2156
2157 /* Updates counter and other information. Split from can_schedule_ready_p ()
2158 because when we schedule insn speculatively then insn passed to
2159 can_schedule_ready_p () differs from the one passed to
2160 begin_schedule_ready (). */
2161 static void
2162 begin_schedule_ready (rtx insn)
2163 {
2164 /* An interblock motion? */
2165 if (INSN_BB (insn) != target_bb)
2166 {
2167 if (IS_SPECULATIVE_INSN (insn))
2168 {
2169 gcc_assert (check_live (insn, INSN_BB (insn)));
2170
2171 update_live (insn, INSN_BB (insn));
2172
2173 /* For speculative load, mark insns fed by it. */
2174 if (IS_LOAD_INSN (insn) || FED_BY_SPEC_LOAD (insn))
2175 set_spec_fed (insn);
2176
2177 nr_spec++;
2178 }
2179 nr_inter++;
2180 }
2181 else
2182 {
2183 /* In block motion. */
2184 sched_target_n_insns++;
2185 }
2186 sched_n_insns++;
2187 }
2188
2189 /* Called after INSN has all its hard dependencies resolved and the speculation
2190 of type TS is enough to overcome them all.
2191 Return nonzero if it should be moved to the ready list or the queue, or zero
2192 if we should silently discard it. */
2193 static ds_t
2194 new_ready (rtx next, ds_t ts)
2195 {
2196 if (INSN_BB (next) != target_bb)
2197 {
2198 int not_ex_free = 0;
2199
2200 /* For speculative insns, before inserting to ready/queue,
2201 check live, exception-free, and issue-delay. */
2202 if (!IS_VALID (INSN_BB (next))
2203 || CANT_MOVE (next)
2204 || (IS_SPECULATIVE_INSN (next)
2205 && ((recog_memoized (next) >= 0
2206 && min_insn_conflict_delay (curr_state, next, next)
2207 > PARAM_VALUE (PARAM_MAX_SCHED_INSN_CONFLICT_DELAY))
2208 || IS_SPECULATION_CHECK_P (next)
2209 || !check_live (next, INSN_BB (next))
2210 || (not_ex_free = !is_exception_free (next, INSN_BB (next),
2211 target_bb)))))
2212 {
2213 if (not_ex_free
2214 /* We are here because is_exception_free () == false.
2215 But we possibly can handle that with control speculation. */
2216 && sched_deps_info->generate_spec_deps
2217 && spec_info->mask & BEGIN_CONTROL)
2218 {
2219 ds_t new_ds;
2220
2221 /* Add control speculation to NEXT's dependency type. */
2222 new_ds = set_dep_weak (ts, BEGIN_CONTROL, MAX_DEP_WEAK);
2223
2224 /* Check if NEXT can be speculated with new dependency type. */
2225 if (sched_insn_is_legitimate_for_speculation_p (next, new_ds))
2226 /* Here we got new control-speculative instruction. */
2227 ts = new_ds;
2228 else
2229 /* NEXT isn't ready yet. */
2230 ts = DEP_POSTPONED;
2231 }
2232 else
2233 /* NEXT isn't ready yet. */
2234 ts = DEP_POSTPONED;
2235 }
2236 }
2237
2238 return ts;
2239 }
2240
2241 /* Return a string that contains the insn uid and optionally anything else
2242 necessary to identify this insn in an output. It's valid to use a
2243 static buffer for this. The ALIGNED parameter should cause the string
2244 to be formatted so that multiple output lines will line up nicely. */
2245
2246 static const char *
2247 rgn_print_insn (const_rtx insn, int aligned)
2248 {
2249 static char tmp[80];
2250
2251 if (aligned)
2252 sprintf (tmp, "b%3d: i%4d", INSN_BB (insn), INSN_UID (insn));
2253 else
2254 {
2255 if (current_nr_blocks > 1 && INSN_BB (insn) != target_bb)
2256 sprintf (tmp, "%d/b%d", INSN_UID (insn), INSN_BB (insn));
2257 else
2258 sprintf (tmp, "%d", INSN_UID (insn));
2259 }
2260 return tmp;
2261 }
2262
2263 /* Compare priority of two insns. Return a positive number if the second
2264 insn is to be preferred for scheduling, and a negative one if the first
2265 is to be preferred. Zero if they are equally good. */
2266
2267 static int
2268 rgn_rank (rtx insn1, rtx insn2)
2269 {
2270 /* Some comparison make sense in interblock scheduling only. */
2271 if (INSN_BB (insn1) != INSN_BB (insn2))
2272 {
2273 int spec_val, prob_val;
2274
2275 /* Prefer an inblock motion on an interblock motion. */
2276 if ((INSN_BB (insn2) == target_bb) && (INSN_BB (insn1) != target_bb))
2277 return 1;
2278 if ((INSN_BB (insn1) == target_bb) && (INSN_BB (insn2) != target_bb))
2279 return -1;
2280
2281 /* Prefer a useful motion on a speculative one. */
2282 spec_val = IS_SPECULATIVE_INSN (insn1) - IS_SPECULATIVE_INSN (insn2);
2283 if (spec_val)
2284 return spec_val;
2285
2286 /* Prefer a more probable (speculative) insn. */
2287 prob_val = INSN_PROBABILITY (insn2) - INSN_PROBABILITY (insn1);
2288 if (prob_val)
2289 return prob_val;
2290 }
2291 return 0;
2292 }
2293
2294 /* NEXT is an instruction that depends on INSN (a backward dependence);
2295 return nonzero if we should include this dependence in priority
2296 calculations. */
2297
2298 int
2299 contributes_to_priority (rtx next, rtx insn)
2300 {
2301 /* NEXT and INSN reside in one ebb. */
2302 return BLOCK_TO_BB (BLOCK_NUM (next)) == BLOCK_TO_BB (BLOCK_NUM (insn));
2303 }
2304
2305 /* INSN is a JUMP_INSN. Store the set of registers that must be
2306 considered as used by this jump in USED. */
2307
2308 static void
2309 compute_jump_reg_dependencies (rtx insn ATTRIBUTE_UNUSED,
2310 regset used ATTRIBUTE_UNUSED)
2311 {
2312 /* Nothing to do here, since we postprocess jumps in
2313 add_branch_dependences. */
2314 }
2315
2316 /* This variable holds common_sched_info hooks and data relevant to
2317 the interblock scheduler. */
2318 static struct common_sched_info_def rgn_common_sched_info;
2319
2320
2321 /* This holds data for the dependence analysis relevant to
2322 the interblock scheduler. */
2323 static struct sched_deps_info_def rgn_sched_deps_info;
2324
2325 /* This holds constant data used for initializing the above structure
2326 for the Haifa scheduler. */
2327 static const struct sched_deps_info_def rgn_const_sched_deps_info =
2328 {
2329 compute_jump_reg_dependencies,
2330 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2331 0, 0, 0
2332 };
2333
2334 /* Same as above, but for the selective scheduler. */
2335 static const struct sched_deps_info_def rgn_const_sel_sched_deps_info =
2336 {
2337 compute_jump_reg_dependencies,
2338 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2339 0, 0, 0
2340 };
2341
2342 /* Return true if scheduling INSN will trigger finish of scheduling
2343 current block. */
2344 static bool
2345 rgn_insn_finishes_block_p (rtx insn)
2346 {
2347 if (INSN_BB (insn) == target_bb
2348 && sched_target_n_insns + 1 == target_n_insns)
2349 /* INSN is the last not-scheduled instruction in the current block. */
2350 return true;
2351
2352 return false;
2353 }
2354
2355 /* Used in schedule_insns to initialize current_sched_info for scheduling
2356 regions (or single basic blocks). */
2357
2358 static const struct haifa_sched_info rgn_const_sched_info =
2359 {
2360 init_ready_list,
2361 can_schedule_ready_p,
2362 schedule_more_p,
2363 new_ready,
2364 rgn_rank,
2365 rgn_print_insn,
2366 contributes_to_priority,
2367 rgn_insn_finishes_block_p,
2368
2369 NULL, NULL,
2370 NULL, NULL,
2371 0, 0,
2372
2373 rgn_add_remove_insn,
2374 begin_schedule_ready,
2375 NULL,
2376 advance_target_bb,
2377 NULL, NULL,
2378 SCHED_RGN
2379 };
2380
2381 /* This variable holds the data and hooks needed to the Haifa scheduler backend
2382 for the interblock scheduler frontend. */
2383 static struct haifa_sched_info rgn_sched_info;
2384
2385 /* Returns maximum priority that an insn was assigned to. */
2386
2387 int
2388 get_rgn_sched_max_insns_priority (void)
2389 {
2390 return rgn_sched_info.sched_max_insns_priority;
2391 }
2392
2393 /* Determine if PAT sets a TARGET_CLASS_LIKELY_SPILLED_P register. */
2394
2395 static bool
2396 sets_likely_spilled (rtx pat)
2397 {
2398 bool ret = false;
2399 note_stores (pat, sets_likely_spilled_1, &ret);
2400 return ret;
2401 }
2402
2403 static void
2404 sets_likely_spilled_1 (rtx x, const_rtx pat, void *data)
2405 {
2406 bool *ret = (bool *) data;
2407
2408 if (GET_CODE (pat) == SET
2409 && REG_P (x)
2410 && HARD_REGISTER_P (x)
2411 && targetm.class_likely_spilled_p (REGNO_REG_CLASS (REGNO (x))))
2412 *ret = true;
2413 }
2414
2415 /* A bitmap to note insns that participate in any dependency. Used in
2416 add_branch_dependences. */
2417 static sbitmap insn_referenced;
2418
2419 /* Add dependences so that branches are scheduled to run last in their
2420 block. */
2421 static void
2422 add_branch_dependences (rtx head, rtx tail)
2423 {
2424 rtx insn, last;
2425
2426 /* For all branches, calls, uses, clobbers, cc0 setters, and instructions
2427 that can throw exceptions, force them to remain in order at the end of
2428 the block by adding dependencies and giving the last a high priority.
2429 There may be notes present, and prev_head may also be a note.
2430
2431 Branches must obviously remain at the end. Calls should remain at the
2432 end since moving them results in worse register allocation. Uses remain
2433 at the end to ensure proper register allocation.
2434
2435 cc0 setters remain at the end because they can't be moved away from
2436 their cc0 user.
2437
2438 COND_EXEC insns cannot be moved past a branch (see e.g. PR17808).
2439
2440 Insns setting TARGET_CLASS_LIKELY_SPILLED_P registers (usually return
2441 values) are not moved before reload because we can wind up with register
2442 allocation failures. */
2443
2444 while (tail != head && DEBUG_INSN_P (tail))
2445 tail = PREV_INSN (tail);
2446
2447 insn = tail;
2448 last = 0;
2449 while (CALL_P (insn)
2450 || JUMP_P (insn)
2451 || (NONJUMP_INSN_P (insn)
2452 && (GET_CODE (PATTERN (insn)) == USE
2453 || GET_CODE (PATTERN (insn)) == CLOBBER
2454 || can_throw_internal (insn)
2455 #ifdef HAVE_cc0
2456 || sets_cc0_p (PATTERN (insn))
2457 #endif
2458 || (!reload_completed
2459 && sets_likely_spilled (PATTERN (insn)))))
2460 || NOTE_P (insn))
2461 {
2462 if (!NOTE_P (insn))
2463 {
2464 if (last != 0
2465 && sd_find_dep_between (insn, last, false) == NULL)
2466 {
2467 if (! sched_insns_conditions_mutex_p (last, insn))
2468 add_dependence (last, insn, REG_DEP_ANTI);
2469 SET_BIT (insn_referenced, INSN_LUID (insn));
2470 }
2471
2472 CANT_MOVE (insn) = 1;
2473
2474 last = insn;
2475 }
2476
2477 /* Don't overrun the bounds of the basic block. */
2478 if (insn == head)
2479 break;
2480
2481 do
2482 insn = PREV_INSN (insn);
2483 while (insn != head && DEBUG_INSN_P (insn));
2484 }
2485
2486 /* Make sure these insns are scheduled last in their block. */
2487 insn = last;
2488 if (insn != 0)
2489 while (insn != head)
2490 {
2491 insn = prev_nonnote_insn (insn);
2492
2493 if (TEST_BIT (insn_referenced, INSN_LUID (insn))
2494 || DEBUG_INSN_P (insn))
2495 continue;
2496
2497 if (! sched_insns_conditions_mutex_p (last, insn))
2498 add_dependence (last, insn, REG_DEP_ANTI);
2499 }
2500
2501 if (!targetm.have_conditional_execution ())
2502 return;
2503
2504 /* Finally, if the block ends in a jump, and we are doing intra-block
2505 scheduling, make sure that the branch depends on any COND_EXEC insns
2506 inside the block to avoid moving the COND_EXECs past the branch insn.
2507
2508 We only have to do this after reload, because (1) before reload there
2509 are no COND_EXEC insns, and (2) the region scheduler is an intra-block
2510 scheduler after reload.
2511
2512 FIXME: We could in some cases move COND_EXEC insns past the branch if
2513 this scheduler would be a little smarter. Consider this code:
2514
2515 T = [addr]
2516 C ? addr += 4
2517 !C ? X += 12
2518 C ? T += 1
2519 C ? jump foo
2520
2521 On a target with a one cycle stall on a memory access the optimal
2522 sequence would be:
2523
2524 T = [addr]
2525 C ? addr += 4
2526 C ? T += 1
2527 C ? jump foo
2528 !C ? X += 12
2529
2530 We don't want to put the 'X += 12' before the branch because it just
2531 wastes a cycle of execution time when the branch is taken.
2532
2533 Note that in the example "!C" will always be true. That is another
2534 possible improvement for handling COND_EXECs in this scheduler: it
2535 could remove always-true predicates. */
2536
2537 if (!reload_completed || ! JUMP_P (tail))
2538 return;
2539
2540 insn = tail;
2541 while (insn != head)
2542 {
2543 insn = PREV_INSN (insn);
2544
2545 /* Note that we want to add this dependency even when
2546 sched_insns_conditions_mutex_p returns true. The whole point
2547 is that we _want_ this dependency, even if these insns really
2548 are independent. */
2549 if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == COND_EXEC)
2550 add_dependence (tail, insn, REG_DEP_ANTI);
2551 }
2552 }
2553
2554 /* Data structures for the computation of data dependences in a regions. We
2555 keep one `deps' structure for every basic block. Before analyzing the
2556 data dependences for a bb, its variables are initialized as a function of
2557 the variables of its predecessors. When the analysis for a bb completes,
2558 we save the contents to the corresponding bb_deps[bb] variable. */
2559
2560 static struct deps_desc *bb_deps;
2561
2562 static void
2563 concat_insn_mem_list (rtx copy_insns, rtx copy_mems, rtx *old_insns_p,
2564 rtx *old_mems_p)
2565 {
2566 rtx new_insns = *old_insns_p;
2567 rtx new_mems = *old_mems_p;
2568
2569 while (copy_insns)
2570 {
2571 new_insns = alloc_INSN_LIST (XEXP (copy_insns, 0), new_insns);
2572 new_mems = alloc_EXPR_LIST (VOIDmode, XEXP (copy_mems, 0), new_mems);
2573 copy_insns = XEXP (copy_insns, 1);
2574 copy_mems = XEXP (copy_mems, 1);
2575 }
2576
2577 *old_insns_p = new_insns;
2578 *old_mems_p = new_mems;
2579 }
2580
2581 /* Join PRED_DEPS to the SUCC_DEPS. */
2582 void
2583 deps_join (struct deps_desc *succ_deps, struct deps_desc *pred_deps)
2584 {
2585 unsigned reg;
2586 reg_set_iterator rsi;
2587
2588 /* The reg_last lists are inherited by successor. */
2589 EXECUTE_IF_SET_IN_REG_SET (&pred_deps->reg_last_in_use, 0, reg, rsi)
2590 {
2591 struct deps_reg *pred_rl = &pred_deps->reg_last[reg];
2592 struct deps_reg *succ_rl = &succ_deps->reg_last[reg];
2593
2594 succ_rl->uses = concat_INSN_LIST (pred_rl->uses, succ_rl->uses);
2595 succ_rl->sets = concat_INSN_LIST (pred_rl->sets, succ_rl->sets);
2596 succ_rl->implicit_sets
2597 = concat_INSN_LIST (pred_rl->implicit_sets, succ_rl->implicit_sets);
2598 succ_rl->clobbers = concat_INSN_LIST (pred_rl->clobbers,
2599 succ_rl->clobbers);
2600 succ_rl->uses_length += pred_rl->uses_length;
2601 succ_rl->clobbers_length += pred_rl->clobbers_length;
2602 }
2603 IOR_REG_SET (&succ_deps->reg_last_in_use, &pred_deps->reg_last_in_use);
2604
2605 /* Mem read/write lists are inherited by successor. */
2606 concat_insn_mem_list (pred_deps->pending_read_insns,
2607 pred_deps->pending_read_mems,
2608 &succ_deps->pending_read_insns,
2609 &succ_deps->pending_read_mems);
2610 concat_insn_mem_list (pred_deps->pending_write_insns,
2611 pred_deps->pending_write_mems,
2612 &succ_deps->pending_write_insns,
2613 &succ_deps->pending_write_mems);
2614
2615 succ_deps->pending_jump_insns
2616 = concat_INSN_LIST (pred_deps->pending_jump_insns,
2617 succ_deps->pending_jump_insns);
2618 succ_deps->last_pending_memory_flush
2619 = concat_INSN_LIST (pred_deps->last_pending_memory_flush,
2620 succ_deps->last_pending_memory_flush);
2621
2622 succ_deps->pending_read_list_length += pred_deps->pending_read_list_length;
2623 succ_deps->pending_write_list_length += pred_deps->pending_write_list_length;
2624 succ_deps->pending_flush_length += pred_deps->pending_flush_length;
2625
2626 /* last_function_call is inherited by successor. */
2627 succ_deps->last_function_call
2628 = concat_INSN_LIST (pred_deps->last_function_call,
2629 succ_deps->last_function_call);
2630
2631 /* last_function_call_may_noreturn is inherited by successor. */
2632 succ_deps->last_function_call_may_noreturn
2633 = concat_INSN_LIST (pred_deps->last_function_call_may_noreturn,
2634 succ_deps->last_function_call_may_noreturn);
2635
2636 /* sched_before_next_call is inherited by successor. */
2637 succ_deps->sched_before_next_call
2638 = concat_INSN_LIST (pred_deps->sched_before_next_call,
2639 succ_deps->sched_before_next_call);
2640 }
2641
2642 /* After computing the dependencies for block BB, propagate the dependencies
2643 found in TMP_DEPS to the successors of the block. */
2644 static void
2645 propagate_deps (int bb, struct deps_desc *pred_deps)
2646 {
2647 basic_block block = BASIC_BLOCK (BB_TO_BLOCK (bb));
2648 edge_iterator ei;
2649 edge e;
2650
2651 /* bb's structures are inherited by its successors. */
2652 FOR_EACH_EDGE (e, ei, block->succs)
2653 {
2654 /* Only bbs "below" bb, in the same region, are interesting. */
2655 if (e->dest == EXIT_BLOCK_PTR
2656 || CONTAINING_RGN (block->index) != CONTAINING_RGN (e->dest->index)
2657 || BLOCK_TO_BB (e->dest->index) <= bb)
2658 continue;
2659
2660 deps_join (bb_deps + BLOCK_TO_BB (e->dest->index), pred_deps);
2661 }
2662
2663 /* These lists should point to the right place, for correct
2664 freeing later. */
2665 bb_deps[bb].pending_read_insns = pred_deps->pending_read_insns;
2666 bb_deps[bb].pending_read_mems = pred_deps->pending_read_mems;
2667 bb_deps[bb].pending_write_insns = pred_deps->pending_write_insns;
2668 bb_deps[bb].pending_write_mems = pred_deps->pending_write_mems;
2669 bb_deps[bb].pending_jump_insns = pred_deps->pending_jump_insns;
2670
2671 /* Can't allow these to be freed twice. */
2672 pred_deps->pending_read_insns = 0;
2673 pred_deps->pending_read_mems = 0;
2674 pred_deps->pending_write_insns = 0;
2675 pred_deps->pending_write_mems = 0;
2676 pred_deps->pending_jump_insns = 0;
2677 }
2678
2679 /* Compute dependences inside bb. In a multiple blocks region:
2680 (1) a bb is analyzed after its predecessors, and (2) the lists in
2681 effect at the end of bb (after analyzing for bb) are inherited by
2682 bb's successors.
2683
2684 Specifically for reg-reg data dependences, the block insns are
2685 scanned by sched_analyze () top-to-bottom. Three lists are
2686 maintained by sched_analyze (): reg_last[].sets for register DEFs,
2687 reg_last[].implicit_sets for implicit hard register DEFs, and
2688 reg_last[].uses for register USEs.
2689
2690 When analysis is completed for bb, we update for its successors:
2691 ; - DEFS[succ] = Union (DEFS [succ], DEFS [bb])
2692 ; - IMPLICIT_DEFS[succ] = Union (IMPLICIT_DEFS [succ], IMPLICIT_DEFS [bb])
2693 ; - USES[succ] = Union (USES [succ], DEFS [bb])
2694
2695 The mechanism for computing mem-mem data dependence is very
2696 similar, and the result is interblock dependences in the region. */
2697
2698 static void
2699 compute_block_dependences (int bb)
2700 {
2701 rtx head, tail;
2702 struct deps_desc tmp_deps;
2703
2704 tmp_deps = bb_deps[bb];
2705
2706 /* Do the analysis for this block. */
2707 gcc_assert (EBB_FIRST_BB (bb) == EBB_LAST_BB (bb));
2708 get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
2709
2710 sched_analyze (&tmp_deps, head, tail);
2711
2712 /* Selective scheduling handles control dependencies by itself. */
2713 if (!sel_sched_p ())
2714 add_branch_dependences (head, tail);
2715
2716 if (current_nr_blocks > 1)
2717 propagate_deps (bb, &tmp_deps);
2718
2719 /* Free up the INSN_LISTs. */
2720 free_deps (&tmp_deps);
2721
2722 if (targetm.sched.dependencies_evaluation_hook)
2723 targetm.sched.dependencies_evaluation_hook (head, tail);
2724 }
2725
2726 /* Free dependencies of instructions inside BB. */
2727 static void
2728 free_block_dependencies (int bb)
2729 {
2730 rtx head;
2731 rtx tail;
2732
2733 get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
2734
2735 if (no_real_insns_p (head, tail))
2736 return;
2737
2738 sched_free_deps (head, tail, true);
2739 }
2740
2741 /* Remove all INSN_LISTs and EXPR_LISTs from the pending lists and add
2742 them to the unused_*_list variables, so that they can be reused. */
2743
2744 static void
2745 free_pending_lists (void)
2746 {
2747 int bb;
2748
2749 for (bb = 0; bb < current_nr_blocks; bb++)
2750 {
2751 free_INSN_LIST_list (&bb_deps[bb].pending_read_insns);
2752 free_INSN_LIST_list (&bb_deps[bb].pending_write_insns);
2753 free_EXPR_LIST_list (&bb_deps[bb].pending_read_mems);
2754 free_EXPR_LIST_list (&bb_deps[bb].pending_write_mems);
2755 free_INSN_LIST_list (&bb_deps[bb].pending_jump_insns);
2756 }
2757 }
2758 \f
2759 /* Print dependences for debugging starting from FROM_BB.
2760 Callable from debugger. */
2761 /* Print dependences for debugging starting from FROM_BB.
2762 Callable from debugger. */
2763 DEBUG_FUNCTION void
2764 debug_rgn_dependencies (int from_bb)
2765 {
2766 int bb;
2767
2768 fprintf (sched_dump,
2769 ";; --------------- forward dependences: ------------ \n");
2770
2771 for (bb = from_bb; bb < current_nr_blocks; bb++)
2772 {
2773 rtx head, tail;
2774
2775 get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
2776 fprintf (sched_dump, "\n;; --- Region Dependences --- b %d bb %d \n",
2777 BB_TO_BLOCK (bb), bb);
2778
2779 debug_dependencies (head, tail);
2780 }
2781 }
2782
2783 /* Print dependencies information for instructions between HEAD and TAIL.
2784 ??? This function would probably fit best in haifa-sched.c. */
2785 void debug_dependencies (rtx head, rtx tail)
2786 {
2787 rtx insn;
2788 rtx next_tail = NEXT_INSN (tail);
2789
2790 fprintf (sched_dump, ";; %7s%6s%6s%6s%6s%6s%14s\n",
2791 "insn", "code", "bb", "dep", "prio", "cost",
2792 "reservation");
2793 fprintf (sched_dump, ";; %7s%6s%6s%6s%6s%6s%14s\n",
2794 "----", "----", "--", "---", "----", "----",
2795 "-----------");
2796
2797 for (insn = head; insn != next_tail; insn = NEXT_INSN (insn))
2798 {
2799 if (! INSN_P (insn))
2800 {
2801 int n;
2802 fprintf (sched_dump, ";; %6d ", INSN_UID (insn));
2803 if (NOTE_P (insn))
2804 {
2805 n = NOTE_KIND (insn);
2806 fprintf (sched_dump, "%s\n", GET_NOTE_INSN_NAME (n));
2807 }
2808 else
2809 fprintf (sched_dump, " {%s}\n", GET_RTX_NAME (GET_CODE (insn)));
2810 continue;
2811 }
2812
2813 fprintf (sched_dump,
2814 ";; %s%5d%6d%6d%6d%6d%6d ",
2815 (SCHED_GROUP_P (insn) ? "+" : " "),
2816 INSN_UID (insn),
2817 INSN_CODE (insn),
2818 BLOCK_NUM (insn),
2819 sched_emulate_haifa_p ? -1 : sd_lists_size (insn, SD_LIST_BACK),
2820 (sel_sched_p () ? (sched_emulate_haifa_p ? -1
2821 : INSN_PRIORITY (insn))
2822 : INSN_PRIORITY (insn)),
2823 (sel_sched_p () ? (sched_emulate_haifa_p ? -1
2824 : insn_cost (insn))
2825 : insn_cost (insn)));
2826
2827 if (recog_memoized (insn) < 0)
2828 fprintf (sched_dump, "nothing");
2829 else
2830 print_reservation (sched_dump, insn);
2831
2832 fprintf (sched_dump, "\t: ");
2833 {
2834 sd_iterator_def sd_it;
2835 dep_t dep;
2836
2837 FOR_EACH_DEP (insn, SD_LIST_FORW, sd_it, dep)
2838 fprintf (sched_dump, "%d%s%s ", INSN_UID (DEP_CON (dep)),
2839 DEP_NONREG (dep) ? "n" : "",
2840 DEP_MULTIPLE (dep) ? "m" : "");
2841 }
2842 fprintf (sched_dump, "\n");
2843 }
2844
2845 fprintf (sched_dump, "\n");
2846 }
2847 \f
2848 /* Returns true if all the basic blocks of the current region have
2849 NOTE_DISABLE_SCHED_OF_BLOCK which means not to schedule that region. */
2850 bool
2851 sched_is_disabled_for_current_region_p (void)
2852 {
2853 int bb;
2854
2855 for (bb = 0; bb < current_nr_blocks; bb++)
2856 if (!(BASIC_BLOCK (BB_TO_BLOCK (bb))->flags & BB_DISABLE_SCHEDULE))
2857 return false;
2858
2859 return true;
2860 }
2861
2862 /* Free all region dependencies saved in INSN_BACK_DEPS and
2863 INSN_RESOLVED_BACK_DEPS. The Haifa scheduler does this on the fly
2864 when scheduling, so this function is supposed to be called from
2865 the selective scheduling only. */
2866 void
2867 free_rgn_deps (void)
2868 {
2869 int bb;
2870
2871 for (bb = 0; bb < current_nr_blocks; bb++)
2872 {
2873 rtx head, tail;
2874
2875 gcc_assert (EBB_FIRST_BB (bb) == EBB_LAST_BB (bb));
2876 get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
2877
2878 sched_free_deps (head, tail, false);
2879 }
2880 }
2881
2882 static int rgn_n_insns;
2883
2884 /* Compute insn priority for a current region. */
2885 void
2886 compute_priorities (void)
2887 {
2888 int bb;
2889
2890 current_sched_info->sched_max_insns_priority = 0;
2891 for (bb = 0; bb < current_nr_blocks; bb++)
2892 {
2893 rtx head, tail;
2894
2895 gcc_assert (EBB_FIRST_BB (bb) == EBB_LAST_BB (bb));
2896 get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
2897
2898 if (no_real_insns_p (head, tail))
2899 continue;
2900
2901 rgn_n_insns += set_priorities (head, tail);
2902 }
2903 current_sched_info->sched_max_insns_priority++;
2904 }
2905
2906 /* Schedule a region. A region is either an inner loop, a loop-free
2907 subroutine, or a single basic block. Each bb in the region is
2908 scheduled after its flow predecessors. */
2909
2910 static void
2911 schedule_region (int rgn)
2912 {
2913 int bb;
2914 int sched_rgn_n_insns = 0;
2915
2916 rgn_n_insns = 0;
2917
2918 rgn_setup_region (rgn);
2919
2920 /* Don't schedule region that is marked by
2921 NOTE_DISABLE_SCHED_OF_BLOCK. */
2922 if (sched_is_disabled_for_current_region_p ())
2923 return;
2924
2925 sched_rgn_compute_dependencies (rgn);
2926
2927 sched_rgn_local_init (rgn);
2928
2929 /* Set priorities. */
2930 compute_priorities ();
2931
2932 sched_extend_ready_list (rgn_n_insns);
2933
2934 if (sched_pressure == SCHED_PRESSURE_WEIGHTED)
2935 {
2936 sched_init_region_reg_pressure_info ();
2937 for (bb = 0; bb < current_nr_blocks; bb++)
2938 {
2939 basic_block first_bb, last_bb;
2940 rtx head, tail;
2941
2942 first_bb = EBB_FIRST_BB (bb);
2943 last_bb = EBB_LAST_BB (bb);
2944
2945 get_ebb_head_tail (first_bb, last_bb, &head, &tail);
2946
2947 if (no_real_insns_p (head, tail))
2948 {
2949 gcc_assert (first_bb == last_bb);
2950 continue;
2951 }
2952 sched_setup_bb_reg_pressure_info (first_bb, PREV_INSN (head));
2953 }
2954 }
2955
2956 /* Now we can schedule all blocks. */
2957 for (bb = 0; bb < current_nr_blocks; bb++)
2958 {
2959 basic_block first_bb, last_bb, curr_bb;
2960 rtx head, tail;
2961
2962 first_bb = EBB_FIRST_BB (bb);
2963 last_bb = EBB_LAST_BB (bb);
2964
2965 get_ebb_head_tail (first_bb, last_bb, &head, &tail);
2966
2967 if (no_real_insns_p (head, tail))
2968 {
2969 gcc_assert (first_bb == last_bb);
2970 continue;
2971 }
2972
2973 current_sched_info->prev_head = PREV_INSN (head);
2974 current_sched_info->next_tail = NEXT_INSN (tail);
2975
2976 remove_notes (head, tail);
2977
2978 unlink_bb_notes (first_bb, last_bb);
2979
2980 target_bb = bb;
2981
2982 gcc_assert (flag_schedule_interblock || current_nr_blocks == 1);
2983 current_sched_info->queue_must_finish_empty = current_nr_blocks == 1;
2984
2985 curr_bb = first_bb;
2986 if (dbg_cnt (sched_block))
2987 {
2988 edge f;
2989
2990 schedule_block (&curr_bb, bb_state[first_bb->index]);
2991 gcc_assert (EBB_FIRST_BB (bb) == first_bb);
2992 sched_rgn_n_insns += sched_n_insns;
2993 f = find_fallthru_edge (last_bb->succs);
2994 if (f && f->probability * 100 / REG_BR_PROB_BASE >=
2995 PARAM_VALUE (PARAM_SCHED_STATE_EDGE_PROB_CUTOFF))
2996 {
2997 memcpy (bb_state[f->dest->index], curr_state,
2998 dfa_state_size);
2999 if (sched_verbose >= 5)
3000 fprintf (sched_dump, "saving state for edge %d->%d\n",
3001 f->src->index, f->dest->index);
3002 }
3003 }
3004 else
3005 {
3006 sched_rgn_n_insns += rgn_n_insns;
3007 }
3008
3009 /* Clean up. */
3010 if (current_nr_blocks > 1)
3011 free_trg_info ();
3012 }
3013
3014 /* Sanity check: verify that all region insns were scheduled. */
3015 gcc_assert (sched_rgn_n_insns == rgn_n_insns);
3016
3017 sched_finish_ready_list ();
3018
3019 /* Done with this region. */
3020 sched_rgn_local_finish ();
3021
3022 /* Free dependencies. */
3023 for (bb = 0; bb < current_nr_blocks; ++bb)
3024 free_block_dependencies (bb);
3025
3026 gcc_assert (haifa_recovery_bb_ever_added_p
3027 || deps_pools_are_empty_p ());
3028 }
3029
3030 /* Initialize data structures for region scheduling. */
3031
3032 void
3033 sched_rgn_init (bool single_blocks_p)
3034 {
3035 int i;
3036
3037 min_spec_prob = ((PARAM_VALUE (PARAM_MIN_SPEC_PROB) * REG_BR_PROB_BASE)
3038 / 100);
3039
3040 nr_inter = 0;
3041 nr_spec = 0;
3042
3043 extend_regions ();
3044
3045 CONTAINING_RGN (ENTRY_BLOCK) = -1;
3046 CONTAINING_RGN (EXIT_BLOCK) = -1;
3047
3048 if (!sel_sched_p ())
3049 {
3050 bb_state_array = (char *) xmalloc (last_basic_block * dfa_state_size);
3051 bb_state = XNEWVEC (state_t, last_basic_block);
3052 for (i = 0; i < last_basic_block; i++)
3053 {
3054 bb_state[i] = (state_t) (bb_state_array + i * dfa_state_size);
3055
3056 state_reset (bb_state[i]);
3057 }
3058 }
3059 else
3060 {
3061 bb_state_array = NULL;
3062 bb_state = NULL;
3063 }
3064
3065 /* Compute regions for scheduling. */
3066 if (single_blocks_p
3067 || n_basic_blocks == NUM_FIXED_BLOCKS + 1
3068 || !flag_schedule_interblock
3069 || is_cfg_nonregular ())
3070 {
3071 find_single_block_region (sel_sched_p ());
3072 }
3073 else
3074 {
3075 /* Compute the dominators and post dominators. */
3076 if (!sel_sched_p ())
3077 calculate_dominance_info (CDI_DOMINATORS);
3078
3079 /* Find regions. */
3080 find_rgns ();
3081
3082 if (sched_verbose >= 3)
3083 debug_regions ();
3084
3085 /* For now. This will move as more and more of haifa is converted
3086 to using the cfg code. */
3087 if (!sel_sched_p ())
3088 free_dominance_info (CDI_DOMINATORS);
3089 }
3090
3091 gcc_assert (0 < nr_regions && nr_regions <= n_basic_blocks);
3092
3093 RGN_BLOCKS (nr_regions) = (RGN_BLOCKS (nr_regions - 1) +
3094 RGN_NR_BLOCKS (nr_regions - 1));
3095 }
3096
3097 /* Free data structures for region scheduling. */
3098 void
3099 sched_rgn_finish (void)
3100 {
3101 free (bb_state_array);
3102 free (bb_state);
3103
3104 /* Reposition the prologue and epilogue notes in case we moved the
3105 prologue/epilogue insns. */
3106 if (reload_completed)
3107 reposition_prologue_and_epilogue_notes ();
3108
3109 if (sched_verbose)
3110 {
3111 if (reload_completed == 0
3112 && flag_schedule_interblock)
3113 {
3114 fprintf (sched_dump,
3115 "\n;; Procedure interblock/speculative motions == %d/%d \n",
3116 nr_inter, nr_spec);
3117 }
3118 else
3119 gcc_assert (nr_inter <= 0);
3120 fprintf (sched_dump, "\n\n");
3121 }
3122
3123 nr_regions = 0;
3124
3125 free (rgn_table);
3126 rgn_table = NULL;
3127
3128 free (rgn_bb_table);
3129 rgn_bb_table = NULL;
3130
3131 free (block_to_bb);
3132 block_to_bb = NULL;
3133
3134 free (containing_rgn);
3135 containing_rgn = NULL;
3136
3137 free (ebb_head);
3138 ebb_head = NULL;
3139 }
3140
3141 /* Setup global variables like CURRENT_BLOCKS and CURRENT_NR_BLOCK to
3142 point to the region RGN. */
3143 void
3144 rgn_setup_region (int rgn)
3145 {
3146 int bb;
3147
3148 /* Set variables for the current region. */
3149 current_nr_blocks = RGN_NR_BLOCKS (rgn);
3150 current_blocks = RGN_BLOCKS (rgn);
3151
3152 /* EBB_HEAD is a region-scope structure. But we realloc it for
3153 each region to save time/memory/something else.
3154 See comments in add_block1, for what reasons we allocate +1 element. */
3155 ebb_head = XRESIZEVEC (int, ebb_head, current_nr_blocks + 1);
3156 for (bb = 0; bb <= current_nr_blocks; bb++)
3157 ebb_head[bb] = current_blocks + bb;
3158 }
3159
3160 /* Compute instruction dependencies in region RGN. */
3161 void
3162 sched_rgn_compute_dependencies (int rgn)
3163 {
3164 if (!RGN_DONT_CALC_DEPS (rgn))
3165 {
3166 int bb;
3167
3168 if (sel_sched_p ())
3169 sched_emulate_haifa_p = 1;
3170
3171 init_deps_global ();
3172
3173 /* Initializations for region data dependence analysis. */
3174 bb_deps = XNEWVEC (struct deps_desc, current_nr_blocks);
3175 for (bb = 0; bb < current_nr_blocks; bb++)
3176 init_deps (bb_deps + bb, false);
3177
3178 /* Initialize bitmap used in add_branch_dependences. */
3179 insn_referenced = sbitmap_alloc (sched_max_luid);
3180 sbitmap_zero (insn_referenced);
3181
3182 /* Compute backward dependencies. */
3183 for (bb = 0; bb < current_nr_blocks; bb++)
3184 compute_block_dependences (bb);
3185
3186 sbitmap_free (insn_referenced);
3187 free_pending_lists ();
3188 finish_deps_global ();
3189 free (bb_deps);
3190
3191 /* We don't want to recalculate this twice. */
3192 RGN_DONT_CALC_DEPS (rgn) = 1;
3193
3194 if (sel_sched_p ())
3195 sched_emulate_haifa_p = 0;
3196 }
3197 else
3198 /* (This is a recovery block. It is always a single block region.)
3199 OR (We use selective scheduling.) */
3200 gcc_assert (current_nr_blocks == 1 || sel_sched_p ());
3201 }
3202
3203 /* Init region data structures. Returns true if this region should
3204 not be scheduled. */
3205 void
3206 sched_rgn_local_init (int rgn)
3207 {
3208 int bb;
3209
3210 /* Compute interblock info: probabilities, split-edges, dominators, etc. */
3211 if (current_nr_blocks > 1)
3212 {
3213 basic_block block;
3214 edge e;
3215 edge_iterator ei;
3216
3217 prob = XNEWVEC (int, current_nr_blocks);
3218
3219 dom = sbitmap_vector_alloc (current_nr_blocks, current_nr_blocks);
3220 sbitmap_vector_zero (dom, current_nr_blocks);
3221
3222 /* Use ->aux to implement EDGE_TO_BIT mapping. */
3223 rgn_nr_edges = 0;
3224 FOR_EACH_BB (block)
3225 {
3226 if (CONTAINING_RGN (block->index) != rgn)
3227 continue;
3228 FOR_EACH_EDGE (e, ei, block->succs)
3229 SET_EDGE_TO_BIT (e, rgn_nr_edges++);
3230 }
3231
3232 rgn_edges = XNEWVEC (edge, rgn_nr_edges);
3233 rgn_nr_edges = 0;
3234 FOR_EACH_BB (block)
3235 {
3236 if (CONTAINING_RGN (block->index) != rgn)
3237 continue;
3238 FOR_EACH_EDGE (e, ei, block->succs)
3239 rgn_edges[rgn_nr_edges++] = e;
3240 }
3241
3242 /* Split edges. */
3243 pot_split = sbitmap_vector_alloc (current_nr_blocks, rgn_nr_edges);
3244 sbitmap_vector_zero (pot_split, current_nr_blocks);
3245 ancestor_edges = sbitmap_vector_alloc (current_nr_blocks, rgn_nr_edges);
3246 sbitmap_vector_zero (ancestor_edges, current_nr_blocks);
3247
3248 /* Compute probabilities, dominators, split_edges. */
3249 for (bb = 0; bb < current_nr_blocks; bb++)
3250 compute_dom_prob_ps (bb);
3251
3252 /* Cleanup ->aux used for EDGE_TO_BIT mapping. */
3253 /* We don't need them anymore. But we want to avoid duplication of
3254 aux fields in the newly created edges. */
3255 FOR_EACH_BB (block)
3256 {
3257 if (CONTAINING_RGN (block->index) != rgn)
3258 continue;
3259 FOR_EACH_EDGE (e, ei, block->succs)
3260 e->aux = NULL;
3261 }
3262 }
3263 }
3264
3265 /* Free data computed for the finished region. */
3266 void
3267 sched_rgn_local_free (void)
3268 {
3269 free (prob);
3270 sbitmap_vector_free (dom);
3271 sbitmap_vector_free (pot_split);
3272 sbitmap_vector_free (ancestor_edges);
3273 free (rgn_edges);
3274 }
3275
3276 /* Free data computed for the finished region. */
3277 void
3278 sched_rgn_local_finish (void)
3279 {
3280 if (current_nr_blocks > 1 && !sel_sched_p ())
3281 {
3282 sched_rgn_local_free ();
3283 }
3284 }
3285
3286 /* Setup scheduler infos. */
3287 void
3288 rgn_setup_common_sched_info (void)
3289 {
3290 memcpy (&rgn_common_sched_info, &haifa_common_sched_info,
3291 sizeof (rgn_common_sched_info));
3292
3293 rgn_common_sched_info.fix_recovery_cfg = rgn_fix_recovery_cfg;
3294 rgn_common_sched_info.add_block = rgn_add_block;
3295 rgn_common_sched_info.estimate_number_of_insns
3296 = rgn_estimate_number_of_insns;
3297 rgn_common_sched_info.sched_pass_id = SCHED_RGN_PASS;
3298
3299 common_sched_info = &rgn_common_sched_info;
3300 }
3301
3302 /* Setup all *_sched_info structures (for the Haifa frontend
3303 and for the dependence analysis) in the interblock scheduler. */
3304 void
3305 rgn_setup_sched_infos (void)
3306 {
3307 if (!sel_sched_p ())
3308 memcpy (&rgn_sched_deps_info, &rgn_const_sched_deps_info,
3309 sizeof (rgn_sched_deps_info));
3310 else
3311 memcpy (&rgn_sched_deps_info, &rgn_const_sel_sched_deps_info,
3312 sizeof (rgn_sched_deps_info));
3313
3314 sched_deps_info = &rgn_sched_deps_info;
3315
3316 memcpy (&rgn_sched_info, &rgn_const_sched_info, sizeof (rgn_sched_info));
3317 current_sched_info = &rgn_sched_info;
3318 }
3319
3320 /* The one entry point in this file. */
3321 void
3322 schedule_insns (void)
3323 {
3324 int rgn;
3325
3326 /* Taking care of this degenerate case makes the rest of
3327 this code simpler. */
3328 if (n_basic_blocks == NUM_FIXED_BLOCKS)
3329 return;
3330
3331 rgn_setup_common_sched_info ();
3332 rgn_setup_sched_infos ();
3333
3334 haifa_sched_init ();
3335 sched_rgn_init (reload_completed);
3336
3337 bitmap_initialize (&not_in_df, 0);
3338 bitmap_clear (&not_in_df);
3339
3340 /* Schedule every region in the subroutine. */
3341 for (rgn = 0; rgn < nr_regions; rgn++)
3342 if (dbg_cnt (sched_region))
3343 schedule_region (rgn);
3344
3345 /* Clean up. */
3346 sched_rgn_finish ();
3347 bitmap_clear (&not_in_df);
3348
3349 haifa_sched_finish ();
3350 }
3351
3352 /* INSN has been added to/removed from current region. */
3353 static void
3354 rgn_add_remove_insn (rtx insn, int remove_p)
3355 {
3356 if (!remove_p)
3357 rgn_n_insns++;
3358 else
3359 rgn_n_insns--;
3360
3361 if (INSN_BB (insn) == target_bb)
3362 {
3363 if (!remove_p)
3364 target_n_insns++;
3365 else
3366 target_n_insns--;
3367 }
3368 }
3369
3370 /* Extend internal data structures. */
3371 void
3372 extend_regions (void)
3373 {
3374 rgn_table = XRESIZEVEC (region, rgn_table, n_basic_blocks);
3375 rgn_bb_table = XRESIZEVEC (int, rgn_bb_table, n_basic_blocks);
3376 block_to_bb = XRESIZEVEC (int, block_to_bb, last_basic_block);
3377 containing_rgn = XRESIZEVEC (int, containing_rgn, last_basic_block);
3378 }
3379
3380 void
3381 rgn_make_new_region_out_of_new_block (basic_block bb)
3382 {
3383 int i;
3384
3385 i = RGN_BLOCKS (nr_regions);
3386 /* I - first free position in rgn_bb_table. */
3387
3388 rgn_bb_table[i] = bb->index;
3389 RGN_NR_BLOCKS (nr_regions) = 1;
3390 RGN_HAS_REAL_EBB (nr_regions) = 0;
3391 RGN_DONT_CALC_DEPS (nr_regions) = 0;
3392 CONTAINING_RGN (bb->index) = nr_regions;
3393 BLOCK_TO_BB (bb->index) = 0;
3394
3395 nr_regions++;
3396
3397 RGN_BLOCKS (nr_regions) = i + 1;
3398 }
3399
3400 /* BB was added to ebb after AFTER. */
3401 static void
3402 rgn_add_block (basic_block bb, basic_block after)
3403 {
3404 extend_regions ();
3405 bitmap_set_bit (&not_in_df, bb->index);
3406
3407 if (after == 0 || after == EXIT_BLOCK_PTR)
3408 {
3409 rgn_make_new_region_out_of_new_block (bb);
3410 RGN_DONT_CALC_DEPS (nr_regions - 1) = (after == EXIT_BLOCK_PTR);
3411 }
3412 else
3413 {
3414 int i, pos;
3415
3416 /* We need to fix rgn_table, block_to_bb, containing_rgn
3417 and ebb_head. */
3418
3419 BLOCK_TO_BB (bb->index) = BLOCK_TO_BB (after->index);
3420
3421 /* We extend ebb_head to one more position to
3422 easily find the last position of the last ebb in
3423 the current region. Thus, ebb_head[BLOCK_TO_BB (after) + 1]
3424 is _always_ valid for access. */
3425
3426 i = BLOCK_TO_BB (after->index) + 1;
3427 pos = ebb_head[i] - 1;
3428 /* Now POS is the index of the last block in the region. */
3429
3430 /* Find index of basic block AFTER. */
3431 for (; rgn_bb_table[pos] != after->index; pos--)
3432 ;
3433
3434 pos++;
3435 gcc_assert (pos > ebb_head[i - 1]);
3436
3437 /* i - ebb right after "AFTER". */
3438 /* ebb_head[i] - VALID. */
3439
3440 /* Source position: ebb_head[i]
3441 Destination position: ebb_head[i] + 1
3442 Last position:
3443 RGN_BLOCKS (nr_regions) - 1
3444 Number of elements to copy: (last_position) - (source_position) + 1
3445 */
3446
3447 memmove (rgn_bb_table + pos + 1,
3448 rgn_bb_table + pos,
3449 ((RGN_BLOCKS (nr_regions) - 1) - (pos) + 1)
3450 * sizeof (*rgn_bb_table));
3451
3452 rgn_bb_table[pos] = bb->index;
3453
3454 for (; i <= current_nr_blocks; i++)
3455 ebb_head [i]++;
3456
3457 i = CONTAINING_RGN (after->index);
3458 CONTAINING_RGN (bb->index) = i;
3459
3460 RGN_HAS_REAL_EBB (i) = 1;
3461
3462 for (++i; i <= nr_regions; i++)
3463 RGN_BLOCKS (i)++;
3464 }
3465 }
3466
3467 /* Fix internal data after interblock movement of jump instruction.
3468 For parameter meaning please refer to
3469 sched-int.h: struct sched_info: fix_recovery_cfg. */
3470 static void
3471 rgn_fix_recovery_cfg (int bbi, int check_bbi, int check_bb_nexti)
3472 {
3473 int old_pos, new_pos, i;
3474
3475 BLOCK_TO_BB (check_bb_nexti) = BLOCK_TO_BB (bbi);
3476
3477 for (old_pos = ebb_head[BLOCK_TO_BB (check_bbi) + 1] - 1;
3478 rgn_bb_table[old_pos] != check_bb_nexti;
3479 old_pos--)
3480 ;
3481 gcc_assert (old_pos > ebb_head[BLOCK_TO_BB (check_bbi)]);
3482
3483 for (new_pos = ebb_head[BLOCK_TO_BB (bbi) + 1] - 1;
3484 rgn_bb_table[new_pos] != bbi;
3485 new_pos--)
3486 ;
3487 new_pos++;
3488 gcc_assert (new_pos > ebb_head[BLOCK_TO_BB (bbi)]);
3489
3490 gcc_assert (new_pos < old_pos);
3491
3492 memmove (rgn_bb_table + new_pos + 1,
3493 rgn_bb_table + new_pos,
3494 (old_pos - new_pos) * sizeof (*rgn_bb_table));
3495
3496 rgn_bb_table[new_pos] = check_bb_nexti;
3497
3498 for (i = BLOCK_TO_BB (bbi) + 1; i <= BLOCK_TO_BB (check_bbi); i++)
3499 ebb_head[i]++;
3500 }
3501
3502 /* Return next block in ebb chain. For parameter meaning please refer to
3503 sched-int.h: struct sched_info: advance_target_bb. */
3504 static basic_block
3505 advance_target_bb (basic_block bb, rtx insn)
3506 {
3507 if (insn)
3508 return 0;
3509
3510 gcc_assert (BLOCK_TO_BB (bb->index) == target_bb
3511 && BLOCK_TO_BB (bb->next_bb->index) == target_bb);
3512 return bb->next_bb;
3513 }
3514
3515 #endif
3516 \f
3517 static bool
3518 gate_handle_sched (void)
3519 {
3520 #ifdef INSN_SCHEDULING
3521 return optimize > 0 && flag_schedule_insns && dbg_cnt (sched_func);
3522 #else
3523 return 0;
3524 #endif
3525 }
3526
3527 /* Run instruction scheduler. */
3528 static unsigned int
3529 rest_of_handle_sched (void)
3530 {
3531 #ifdef INSN_SCHEDULING
3532 if (flag_selective_scheduling
3533 && ! maybe_skip_selective_scheduling ())
3534 run_selective_scheduling ();
3535 else
3536 schedule_insns ();
3537 #endif
3538 return 0;
3539 }
3540
3541 static bool
3542 gate_handle_sched2 (void)
3543 {
3544 #ifdef INSN_SCHEDULING
3545 return optimize > 0 && flag_schedule_insns_after_reload
3546 && !targetm.delay_sched2 && dbg_cnt (sched2_func);
3547 #else
3548 return 0;
3549 #endif
3550 }
3551
3552 /* Run second scheduling pass after reload. */
3553 static unsigned int
3554 rest_of_handle_sched2 (void)
3555 {
3556 #ifdef INSN_SCHEDULING
3557 if (flag_selective_scheduling2
3558 && ! maybe_skip_selective_scheduling ())
3559 run_selective_scheduling ();
3560 else
3561 {
3562 /* Do control and data sched analysis again,
3563 and write some more of the results to dump file. */
3564 if (flag_sched2_use_superblocks)
3565 schedule_ebbs ();
3566 else
3567 schedule_insns ();
3568 }
3569 #endif
3570 return 0;
3571 }
3572
3573 struct rtl_opt_pass pass_sched =
3574 {
3575 {
3576 RTL_PASS,
3577 "sched1", /* name */
3578 gate_handle_sched, /* gate */
3579 rest_of_handle_sched, /* execute */
3580 NULL, /* sub */
3581 NULL, /* next */
3582 0, /* static_pass_number */
3583 TV_SCHED, /* tv_id */
3584 0, /* properties_required */
3585 0, /* properties_provided */
3586 0, /* properties_destroyed */
3587 0, /* todo_flags_start */
3588 TODO_df_finish | TODO_verify_rtl_sharing |
3589 TODO_verify_flow |
3590 TODO_ggc_collect /* todo_flags_finish */
3591 }
3592 };
3593
3594 struct rtl_opt_pass pass_sched2 =
3595 {
3596 {
3597 RTL_PASS,
3598 "sched2", /* name */
3599 gate_handle_sched2, /* gate */
3600 rest_of_handle_sched2, /* execute */
3601 NULL, /* sub */
3602 NULL, /* next */
3603 0, /* static_pass_number */
3604 TV_SCHED2, /* tv_id */
3605 0, /* properties_required */
3606 0, /* properties_provided */
3607 0, /* properties_destroyed */
3608 0, /* todo_flags_start */
3609 TODO_df_finish | TODO_verify_rtl_sharing |
3610 TODO_verify_flow |
3611 TODO_ggc_collect /* todo_flags_finish */
3612 }
3613 };