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git.ipfire.org Git - thirdparty/gcc.git/blob - gcc/testsuite/gcc.dg/tree-ssa/forwprop-20.c
1 /* { dg-do compile } */
2 /* { dg-require-effective-target double64 } */
3 /* { dg-options "-O -fdump-tree-forwprop1" } */
7 /* All of these optimizations happen for unsupported vector modes as a
8 consequence of the lowering pass. We need to test with a vector mode
9 that is supported by default on at least some architectures, or make
10 the test target specific so we can pass a flag like -mavx. */
12 typedef double vecf
__attribute__ ((vector_size (2 * sizeof (double))));
13 typedef int64_t veci
__attribute__ ((vector_size (2 * sizeof (int64_t))));
15 void f (double d
, vecf
* r
)
20 *r
= __builtin_shuffle (x
, y
, m
); // { 1, -d }
23 void g (float d
, vecf
* r
)
28 *r
= __builtin_shuffle (x
, y
, m
); // { 1, 5 }
31 void h (double d
, vecf
* r
)
33 vecf x
= { d
+ 1, 5 };
36 *r
= __builtin_shuffle (y
, x
, m
); // { d + 1, 1 }
39 void i (float d
, vecf
* r
)
43 *r
= __builtin_shuffle (x
, m
); // { 5, d }
50 *r
= __builtin_shuffle (y
, m
); // { 1, 1 }
58 *r
= __builtin_shuffle (x
, y
, m
); // { 2, 3 }
61 void l (double d
, vecf
* r
)
66 *r
= __builtin_shuffle (x
, y
, m
); // { d, -d }
69 /* { dg-final { scan-tree-dump-not "VEC_PERM_EXPR" "forwprop1" } } */