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1 /* Target dependent code for GDB on TI C6x systems.
2
3 Copyright (C) 2010-2017 Free Software Foundation, Inc.
4 Contributed by Andrew Jenner <andrew@codesourcery.com>
5 Contributed by Yao Qi <yao@codesourcery.com>
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22 #include "server.h"
23 #include "linux-low.h"
24
25 #include "nat/gdb_ptrace.h"
26 #include <endian.h>
27
28 #include "gdb_proc_service.h"
29
30 #ifndef PTRACE_GET_THREAD_AREA
31 #define PTRACE_GET_THREAD_AREA 25
32 #endif
33
34 /* There are at most 69 registers accessible in ptrace. */
35 #define TIC6X_NUM_REGS 69
36
37 #include <asm/ptrace.h>
38
39 /* Defined in auto-generated file tic6x-c64xp-linux.c. */
40 void init_registers_tic6x_c64xp_linux (void);
41 extern const struct target_desc *tdesc_tic6x_c64xp_linux;
42
43 /* Defined in auto-generated file tic6x-c64x-linux.c. */
44 void init_registers_tic6x_c64x_linux (void);
45 extern const struct target_desc *tdesc_tic6x_c64x_linux;
46
47 /* Defined in auto-generated file tic62x-c6xp-linux.c. */
48 void init_registers_tic6x_c62x_linux (void);
49 extern const struct target_desc *tdesc_tic6x_c62x_linux;
50
51 union tic6x_register
52 {
53 unsigned char buf[4];
54
55 int reg32;
56 };
57
58 /* Return the ptrace ``address'' of register REGNO. */
59
60 #if __BYTE_ORDER == __BIG_ENDIAN
61 static int tic6x_regmap_c64xp[] = {
62 /* A0 - A15 */
63 53, 52, 55, 54, 57, 56, 59, 58,
64 61, 60, 63, 62, 65, 64, 67, 66,
65 /* B0 - B15 */
66 23, 22, 25, 24, 27, 26, 29, 28,
67 31, 30, 33, 32, 35, 34, 69, 68,
68 /* CSR PC */
69 5, 4,
70 /* A16 - A31 */
71 37, 36, 39, 38, 41, 40, 43, 42,
72 45, 44, 47, 46, 49, 48, 51, 50,
73 /* B16 - B31 */
74 7, 6, 9, 8, 11, 10, 13, 12,
75 15, 14, 17, 16, 19, 18, 21, 20,
76 /* TSR, ILC, RILC */
77 1, 2, 3
78 };
79
80 static int tic6x_regmap_c64x[] = {
81 /* A0 - A15 */
82 51, 50, 53, 52, 55, 54, 57, 56,
83 59, 58, 61, 60, 63, 62, 65, 64,
84 /* B0 - B15 */
85 21, 20, 23, 22, 25, 24, 27, 26,
86 29, 28, 31, 30, 33, 32, 67, 66,
87 /* CSR PC */
88 3, 2,
89 /* A16 - A31 */
90 35, 34, 37, 36, 39, 38, 41, 40,
91 43, 42, 45, 44, 47, 46, 49, 48,
92 /* B16 - B31 */
93 5, 4, 7, 6, 9, 8, 11, 10,
94 13, 12, 15, 14, 17, 16, 19, 18,
95 -1, -1, -1
96 };
97
98 static int tic6x_regmap_c62x[] = {
99 /* A0 - A15 */
100 19, 18, 21, 20, 23, 22, 25, 24,
101 27, 26, 29, 28, 31, 30, 33, 32,
102 /* B0 - B15 */
103 5, 4, 7, 6, 9, 8, 11, 10,
104 13, 12, 15, 14, 17, 16, 35, 34,
105 /* CSR, PC */
106 3, 2,
107 -1, -1, -1, -1, -1, -1, -1, -1,
108 -1, -1, -1, -1, -1, -1, -1, -1,
109 -1, -1, -1, -1, -1, -1, -1, -1,
110 -1, -1, -1, -1, -1, -1, -1, -1,
111 -1, -1, -1
112 };
113
114 #else
115 static int tic6x_regmap_c64xp[] = {
116 /* A0 - A15 */
117 52, 53, 54, 55, 56, 57, 58, 59,
118 60, 61, 62, 63, 64, 65, 66, 67,
119 /* B0 - B15 */
120 22, 23, 24, 25, 26, 27, 28, 29,
121 30, 31, 32, 33, 34, 35, 68, 69,
122 /* CSR PC */
123 4, 5,
124 /* A16 - A31 */
125 36, 37, 38, 39, 40, 41, 42, 43,
126 44, 45, 46, 47, 48, 49, 50, 51,
127 /* B16 -B31 */
128 6, 7, 8, 9, 10, 11, 12, 13,
129 14, 15, 16, 17, 18, 19, 20, 31,
130 /* TSR, ILC, RILC */
131 0, 3, 2
132 };
133
134 static int tic6x_regmap_c64x[] = {
135 /* A0 - A15 */
136 50, 51, 52, 53, 54, 55, 56, 57,
137 58, 59, 60, 61, 62, 63, 64, 65,
138 /* B0 - B15 */
139 20, 21, 22, 23, 24, 25, 26, 27,
140 28, 29, 30, 31, 32, 33, 66, 67,
141 /* CSR PC */
142 2, 3,
143 /* A16 - A31 */
144 34, 35, 36, 37, 38, 39, 40, 41,
145 42, 43, 44, 45, 46, 47, 48, 49,
146 /* B16 - B31 */
147 4, 5, 6, 7, 8, 9, 10, 11,
148 12, 13, 14, 15, 16, 17, 18, 19,
149 -1, -1, -1
150 };
151
152 static int tic6x_regmap_c62x[] = {
153 /* A0 - A15 */
154 18, 19, 20, 21, 22, 23, 24, 25,
155 26, 27, 28, 29, 30, 31, 32, 33,
156 /* B0 - B15 */
157 4, 5, 6, 7, 8, 9, 10, 11,
158 12, 13, 14, 15, 16, 17, 34, 35,
159 /* CSR PC */
160 2, 3,
161 -1, -1, -1, -1, -1, -1, -1, -1,
162 -1, -1, -1, -1, -1, -1, -1, -1,
163 -1, -1, -1, -1, -1, -1, -1, -1,
164 -1, -1, -1, -1, -1, -1, -1, -1,
165 -1, -1, -1
166 };
167
168 #endif
169
170 extern struct linux_target_ops the_low_target;
171
172 static int *tic6x_regmap;
173 static unsigned int tic6x_breakpoint;
174 #define tic6x_breakpoint_len 4
175
176 /* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */
177
178 static const gdb_byte *
179 tic6x_sw_breakpoint_from_kind (int kind, int *size)
180 {
181 *size = tic6x_breakpoint_len;
182 return (const gdb_byte *) &tic6x_breakpoint;
183 }
184
185 /* Forward definition. */
186 static struct usrregs_info tic6x_usrregs_info;
187
188 static const struct target_desc *
189 tic6x_read_description (void)
190 {
191 register unsigned int csr asm ("B2");
192 unsigned int cpuid;
193 const struct target_desc *tdesc;
194
195 /* Determine the CPU we're running on to find the register order. */
196 __asm__ ("MVC .S2 CSR,%0" : "=r" (csr) :);
197 cpuid = csr >> 24;
198 switch (cpuid)
199 {
200 case 0x00: /* C62x */
201 case 0x02: /* C67x */
202 tic6x_regmap = tic6x_regmap_c62x;
203 tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */
204 tdesc = tdesc_tic6x_c62x_linux;
205 break;
206 case 0x03: /* C67x+ */
207 tic6x_regmap = tic6x_regmap_c64x;
208 tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */
209 tdesc = tdesc_tic6x_c64x_linux;
210 break;
211 case 0x0c: /* C64x */
212 tic6x_regmap = tic6x_regmap_c64x;
213 tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */
214 tdesc = tdesc_tic6x_c64x_linux;
215 break;
216 case 0x10: /* C64x+ */
217 case 0x14: /* C674x */
218 case 0x15: /* C66x */
219 tic6x_regmap = tic6x_regmap_c64xp;
220 tic6x_breakpoint = 0x56454314; /* illegal opcode */
221 tdesc = tdesc_tic6x_c64xp_linux;
222 break;
223 default:
224 error ("Unknown CPU ID 0x%02x", cpuid);
225 }
226 tic6x_usrregs_info.regmap = tic6x_regmap;
227 return tdesc;
228 }
229
230 static int
231 tic6x_cannot_fetch_register (int regno)
232 {
233 return (tic6x_regmap[regno] == -1);
234 }
235
236 static int
237 tic6x_cannot_store_register (int regno)
238 {
239 return (tic6x_regmap[regno] == -1);
240 }
241
242 static CORE_ADDR
243 tic6x_get_pc (struct regcache *regcache)
244 {
245 union tic6x_register pc;
246
247 collect_register_by_name (regcache, "PC", pc.buf);
248 return pc.reg32;
249 }
250
251 static void
252 tic6x_set_pc (struct regcache *regcache, CORE_ADDR pc)
253 {
254 union tic6x_register newpc;
255
256 newpc.reg32 = pc;
257 supply_register_by_name (regcache, "PC", newpc.buf);
258 }
259
260 static int
261 tic6x_breakpoint_at (CORE_ADDR where)
262 {
263 unsigned int insn;
264
265 (*the_target->read_memory) (where, (unsigned char *) &insn, 4);
266 if (insn == tic6x_breakpoint)
267 return 1;
268
269 /* If necessary, recognize more trap instructions here. GDB only uses the
270 one. */
271 return 0;
272 }
273
274 /* Fetch the thread-local storage pointer for libthread_db. */
275
276 ps_err_e
277 ps_get_thread_area (struct ps_prochandle *ph,
278 lwpid_t lwpid, int idx, void **base)
279 {
280 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
281 return PS_ERR;
282
283 /* IDX is the bias from the thread pointer to the beginning of the
284 thread descriptor. It has to be subtracted due to implementation
285 quirks in libthread_db. */
286 *base = (void *) ((char *) *base - idx);
287
288 return PS_OK;
289 }
290
291 static void
292 tic6x_collect_register (struct regcache *regcache, int regno,
293 union tic6x_register *reg)
294 {
295 union tic6x_register tmp_reg;
296
297 collect_register (regcache, regno, &tmp_reg.reg32);
298 reg->reg32 = tmp_reg.reg32;
299 }
300
301 static void
302 tic6x_supply_register (struct regcache *regcache, int regno,
303 const union tic6x_register *reg)
304 {
305 int offset = 0;
306
307 supply_register (regcache, regno, reg->buf + offset);
308 }
309
310 static void
311 tic6x_fill_gregset (struct regcache *regcache, void *buf)
312 {
313 union tic6x_register *regset = buf;
314 int i;
315
316 for (i = 0; i < TIC6X_NUM_REGS; i++)
317 if (tic6x_regmap[i] != -1)
318 tic6x_collect_register (regcache, i, regset + tic6x_regmap[i]);
319 }
320
321 static void
322 tic6x_store_gregset (struct regcache *regcache, const void *buf)
323 {
324 const union tic6x_register *regset = buf;
325 int i;
326
327 for (i = 0; i < TIC6X_NUM_REGS; i++)
328 if (tic6x_regmap[i] != -1)
329 tic6x_supply_register (regcache, i, regset + tic6x_regmap[i]);
330 }
331
332 static struct regset_info tic6x_regsets[] = {
333 { PTRACE_GETREGS, PTRACE_SETREGS, 0, TIC6X_NUM_REGS * 4, GENERAL_REGS,
334 tic6x_fill_gregset, tic6x_store_gregset },
335 NULL_REGSET
336 };
337
338 static void
339 tic6x_arch_setup (void)
340 {
341 current_process ()->tdesc = tic6x_read_description ();
342 }
343
344 /* Support for hardware single step. */
345
346 static int
347 tic6x_supports_hardware_single_step (void)
348 {
349 return 1;
350 }
351
352 static struct regsets_info tic6x_regsets_info =
353 {
354 tic6x_regsets, /* regsets */
355 0, /* num_regsets */
356 NULL, /* disabled_regsets */
357 };
358
359 static struct usrregs_info tic6x_usrregs_info =
360 {
361 TIC6X_NUM_REGS,
362 NULL, /* Set in tic6x_read_description. */
363 };
364
365 static struct regs_info regs_info =
366 {
367 NULL, /* regset_bitmap */
368 &tic6x_usrregs_info,
369 &tic6x_regsets_info
370 };
371
372 static const struct regs_info *
373 tic6x_regs_info (void)
374 {
375 return &regs_info;
376 }
377
378 struct linux_target_ops the_low_target = {
379 tic6x_arch_setup,
380 tic6x_regs_info,
381 tic6x_cannot_fetch_register,
382 tic6x_cannot_store_register,
383 NULL, /* fetch_register */
384 tic6x_get_pc,
385 tic6x_set_pc,
386 NULL, /* breakpoint_kind_from_pc */
387 tic6x_sw_breakpoint_from_kind,
388 NULL,
389 0,
390 tic6x_breakpoint_at,
391 NULL, /* supports_z_point_type */
392 NULL, /* insert_point */
393 NULL, /* remove_point */
394 NULL, /* stopped_by_watchpoint */
395 NULL, /* stopped_data_address */
396 NULL, /* collect_ptrace_register */
397 NULL, /* supply_ptrace_register */
398 NULL, /* siginfo_fixup */
399 NULL, /* new_process */
400 NULL, /* delete_process */
401 NULL, /* new_thread */
402 NULL, /* delete_thread */
403 NULL, /* new_fork */
404 NULL, /* prepare_to_resume */
405 NULL, /* process_qsupported */
406 NULL, /* supports_tracepoints */
407 NULL, /* get_thread_area */
408 NULL, /* install_fast_tracepoint_jump_pad */
409 NULL, /* emit_ops */
410 NULL, /* get_min_fast_tracepoint_insn_len */
411 NULL, /* supports_range_stepping */
412 NULL, /* breakpoint_kind_from_current_state */
413 tic6x_supports_hardware_single_step,
414 };
415
416 void
417 initialize_low_arch (void)
418 {
419 /* Initialize the Linux target descriptions. */
420 init_registers_tic6x_c64xp_linux ();
421 init_registers_tic6x_c64x_linux ();
422 init_registers_tic6x_c62x_linux ();
423
424 initialize_regsets_info (&tic6x_regsets_info);
425 }