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1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
2
3 Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 #include "defs.h"
23 #include "inferior.h"
24 #include "symfile.h" /* for entry_point_address */
25 #include "gdbcore.h"
26 #include "arch-utils.h"
27 #include "floatformat.h"
28 #include "regcache.h"
29 #include "doublest.h"
30 #include "value.h"
31
32 #include "objfiles.h"
33 #include "elf/common.h" /* for DT_PLTGOT value */
34 #include "elf-bfd.h"
35
36 /* Hook for determining the global pointer when calling functions in
37 the inferior under AIX. The initialization code in ia64-aix-nat.c
38 sets this hook to the address of a function which will find the
39 global pointer for a given address.
40
41 The generic code which uses the dynamic section in the inferior for
42 finding the global pointer is not of much use on AIX since the
43 values obtained from the inferior have not been relocated. */
44
45 CORE_ADDR (*native_find_global_pointer) (CORE_ADDR) = 0;
46
47 /* An enumeration of the different IA-64 instruction types. */
48
49 typedef enum instruction_type
50 {
51 A, /* Integer ALU ; I-unit or M-unit */
52 I, /* Non-ALU integer; I-unit */
53 M, /* Memory ; M-unit */
54 F, /* Floating-point ; F-unit */
55 B, /* Branch ; B-unit */
56 L, /* Extended (L+X) ; I-unit */
57 X, /* Extended (L+X) ; I-unit */
58 undefined /* undefined or reserved */
59 } instruction_type;
60
61 /* We represent IA-64 PC addresses as the value of the instruction
62 pointer or'd with some bit combination in the low nibble which
63 represents the slot number in the bundle addressed by the
64 instruction pointer. The problem is that the Linux kernel
65 multiplies its slot numbers (for exceptions) by one while the
66 disassembler multiplies its slot numbers by 6. In addition, I've
67 heard it said that the simulator uses 1 as the multiplier.
68
69 I've fixed the disassembler so that the bytes_per_line field will
70 be the slot multiplier. If bytes_per_line comes in as zero, it
71 is set to six (which is how it was set up initially). -- objdump
72 displays pretty disassembly dumps with this value. For our purposes,
73 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
74 never want to also display the raw bytes the way objdump does. */
75
76 #define SLOT_MULTIPLIER 1
77
78 /* Length in bytes of an instruction bundle */
79
80 #define BUNDLE_LEN 16
81
82 /* FIXME: These extern declarations should go in ia64-tdep.h. */
83 extern CORE_ADDR ia64_linux_sigcontext_register_address (CORE_ADDR, int);
84 extern CORE_ADDR ia64_aix_sigcontext_register_address (CORE_ADDR, int);
85
86 static gdbarch_init_ftype ia64_gdbarch_init;
87
88 static gdbarch_register_name_ftype ia64_register_name;
89 static gdbarch_register_raw_size_ftype ia64_register_raw_size;
90 static gdbarch_register_virtual_size_ftype ia64_register_virtual_size;
91 static gdbarch_register_virtual_type_ftype ia64_register_virtual_type;
92 static gdbarch_register_byte_ftype ia64_register_byte;
93 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
94 static gdbarch_skip_prologue_ftype ia64_skip_prologue;
95 static gdbarch_deprecated_extract_return_value_ftype ia64_extract_return_value;
96 static gdbarch_deprecated_extract_struct_value_address_ftype ia64_extract_struct_value_address;
97 static gdbarch_use_struct_convention_ftype ia64_use_struct_convention;
98 static gdbarch_frameless_function_invocation_ftype ia64_frameless_function_invocation;
99 static gdbarch_push_arguments_ftype ia64_push_arguments;
100 static gdbarch_push_return_address_ftype ia64_push_return_address;
101 static gdbarch_saved_pc_after_call_ftype ia64_saved_pc_after_call;
102 static void ia64_pop_frame_regular (struct frame_info *frame);
103 static struct type *is_float_or_hfa_type (struct type *t);
104
105 static int ia64_num_regs = 590;
106
107 static int pc_regnum = IA64_IP_REGNUM;
108 static int sp_regnum = IA64_GR12_REGNUM;
109 static int fp_regnum = IA64_VFP_REGNUM;
110 static int lr_regnum = IA64_VRAP_REGNUM;
111
112 static LONGEST ia64_call_dummy_words[] = {0};
113
114 /* Array of register names; There should be ia64_num_regs strings in
115 the initializer. */
116
117 static char *ia64_register_names[] =
118 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
119 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
120 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
121 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
122 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
123 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
124 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
125 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
126 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
127 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
128 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
129 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
130 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
131 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
132 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
133 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
134
135 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
136 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
137 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
138 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
139 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
140 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
141 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
142 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
143 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
144 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
145 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
146 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
147 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
148 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
149 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
150 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
151
152 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
153 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
154 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
155 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
156 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
157 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
158 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
159 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
160
161 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
162
163 "vfp", "vrap",
164
165 "pr", "ip", "psr", "cfm",
166
167 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
168 "", "", "", "", "", "", "", "",
169 "rsc", "bsp", "bspstore", "rnat",
170 "", "fcr", "", "",
171 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
172 "ccv", "", "", "", "unat", "", "", "",
173 "fpsr", "", "", "", "itc",
174 "", "", "", "", "", "", "", "", "", "",
175 "", "", "", "", "", "", "", "", "",
176 "pfs", "lc", "ec",
177 "", "", "", "", "", "", "", "", "", "",
178 "", "", "", "", "", "", "", "", "", "",
179 "", "", "", "", "", "", "", "", "", "",
180 "", "", "", "", "", "", "", "", "", "",
181 "", "", "", "", "", "", "", "", "", "",
182 "", "", "", "", "", "", "", "", "", "",
183 "",
184 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
185 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
186 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
187 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
188 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
189 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
190 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
191 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
192 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
193 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
194 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
195 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
196 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
197 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
198 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
199 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
200 };
201
202 struct frame_extra_info
203 {
204 CORE_ADDR bsp; /* points at r32 for the current frame */
205 CORE_ADDR cfm; /* cfm value for current frame */
206 int sof; /* Size of frame (decoded from cfm value) */
207 int sol; /* Size of locals (decoded from cfm value) */
208 CORE_ADDR after_prologue;
209 /* Address of first instruction after the last
210 prologue instruction; Note that there may
211 be instructions from the function's body
212 intermingled with the prologue. */
213 int mem_stack_frame_size;
214 /* Size of the memory stack frame (may be zero),
215 or -1 if it has not been determined yet. */
216 int fp_reg; /* Register number (if any) used a frame pointer
217 for this frame. 0 if no register is being used
218 as the frame pointer. */
219 };
220
221 struct gdbarch_tdep
222 {
223 int os_ident; /* From the ELF header, one of the ELFOSABI_
224 constants: ELFOSABI_LINUX, ELFOSABI_AIX,
225 etc. */
226 CORE_ADDR (*sigcontext_register_address) (CORE_ADDR, int);
227 /* OS specific function which, given a frame address
228 and register number, returns the offset to the
229 given register from the start of the frame. */
230 CORE_ADDR (*find_global_pointer) (CORE_ADDR);
231 };
232
233 #define SIGCONTEXT_REGISTER_ADDRESS \
234 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
235 #define FIND_GLOBAL_POINTER \
236 (gdbarch_tdep (current_gdbarch)->find_global_pointer)
237
238 static const char *
239 ia64_register_name (int reg)
240 {
241 return ia64_register_names[reg];
242 }
243
244 int
245 ia64_register_raw_size (int reg)
246 {
247 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
248 }
249
250 int
251 ia64_register_virtual_size (int reg)
252 {
253 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
254 }
255
256 /* Return true iff register N's virtual format is different from
257 its raw format. */
258 int
259 ia64_register_convertible (int nr)
260 {
261 return (IA64_FR0_REGNUM <= nr && nr <= IA64_FR127_REGNUM);
262 }
263
264 const struct floatformat floatformat_ia64_ext =
265 {
266 floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
267 floatformat_intbit_yes
268 };
269
270 void
271 ia64_register_convert_to_virtual (int regnum, struct type *type,
272 char *from, char *to)
273 {
274 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
275 {
276 DOUBLEST val;
277 floatformat_to_doublest (&floatformat_ia64_ext, from, &val);
278 store_floating(to, TYPE_LENGTH(type), val);
279 }
280 else
281 error("ia64_register_convert_to_virtual called with non floating point register number");
282 }
283
284 void
285 ia64_register_convert_to_raw (struct type *type, int regnum,
286 char *from, char *to)
287 {
288 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
289 {
290 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
291 floatformat_from_doublest (&floatformat_ia64_ext, &val, to);
292 }
293 else
294 error("ia64_register_convert_to_raw called with non floating point register number");
295 }
296
297 struct type *
298 ia64_register_virtual_type (int reg)
299 {
300 if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
301 return builtin_type_long_double;
302 else
303 return builtin_type_long;
304 }
305
306 int
307 ia64_register_byte (int reg)
308 {
309 return (8 * reg) +
310 (reg <= IA64_FR0_REGNUM ? 0 : 8 * ((reg > IA64_FR127_REGNUM) ? 128 : reg - IA64_FR0_REGNUM));
311 }
312
313 /* Read the given register from a sigcontext structure in the
314 specified frame. */
315
316 static CORE_ADDR
317 read_sigcontext_register (struct frame_info *frame, int regnum)
318 {
319 CORE_ADDR regaddr;
320
321 if (frame == NULL)
322 internal_error (__FILE__, __LINE__,
323 "read_sigcontext_register: NULL frame");
324 if (!(get_frame_type (frame) == SIGTRAMP_FRAME))
325 internal_error (__FILE__, __LINE__,
326 "read_sigcontext_register: frame not a signal trampoline");
327 if (SIGCONTEXT_REGISTER_ADDRESS == 0)
328 internal_error (__FILE__, __LINE__,
329 "read_sigcontext_register: SIGCONTEXT_REGISTER_ADDRESS is 0");
330
331 regaddr = SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regnum);
332 if (regaddr)
333 return read_memory_integer (regaddr, REGISTER_RAW_SIZE (regnum));
334 else
335 internal_error (__FILE__, __LINE__,
336 "read_sigcontext_register: Register %d not in struct sigcontext", regnum);
337 }
338
339 /* Extract ``len'' bits from an instruction bundle starting at
340 bit ``from''. */
341
342 static long long
343 extract_bit_field (char *bundle, int from, int len)
344 {
345 long long result = 0LL;
346 int to = from + len;
347 int from_byte = from / 8;
348 int to_byte = to / 8;
349 unsigned char *b = (unsigned char *) bundle;
350 unsigned char c;
351 int lshift;
352 int i;
353
354 c = b[from_byte];
355 if (from_byte == to_byte)
356 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
357 result = c >> (from % 8);
358 lshift = 8 - (from % 8);
359
360 for (i = from_byte+1; i < to_byte; i++)
361 {
362 result |= ((long long) b[i]) << lshift;
363 lshift += 8;
364 }
365
366 if (from_byte < to_byte && (to % 8 != 0))
367 {
368 c = b[to_byte];
369 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
370 result |= ((long long) c) << lshift;
371 }
372
373 return result;
374 }
375
376 /* Replace the specified bits in an instruction bundle */
377
378 static void
379 replace_bit_field (char *bundle, long long val, int from, int len)
380 {
381 int to = from + len;
382 int from_byte = from / 8;
383 int to_byte = to / 8;
384 unsigned char *b = (unsigned char *) bundle;
385 unsigned char c;
386
387 if (from_byte == to_byte)
388 {
389 unsigned char left, right;
390 c = b[from_byte];
391 left = (c >> (to % 8)) << (to % 8);
392 right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
393 c = (unsigned char) (val & 0xff);
394 c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
395 c |= right | left;
396 b[from_byte] = c;
397 }
398 else
399 {
400 int i;
401 c = b[from_byte];
402 c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
403 c = c | (val << (from % 8));
404 b[from_byte] = c;
405 val >>= 8 - from % 8;
406
407 for (i = from_byte+1; i < to_byte; i++)
408 {
409 c = val & 0xff;
410 val >>= 8;
411 b[i] = c;
412 }
413
414 if (to % 8 != 0)
415 {
416 unsigned char cv = (unsigned char) val;
417 c = b[to_byte];
418 c = c >> (to % 8) << (to % 8);
419 c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
420 b[to_byte] = c;
421 }
422 }
423 }
424
425 /* Return the contents of slot N (for N = 0, 1, or 2) in
426 and instruction bundle */
427
428 static long long
429 slotN_contents (char *bundle, int slotnum)
430 {
431 return extract_bit_field (bundle, 5+41*slotnum, 41);
432 }
433
434 /* Store an instruction in an instruction bundle */
435
436 static void
437 replace_slotN_contents (char *bundle, long long instr, int slotnum)
438 {
439 replace_bit_field (bundle, instr, 5+41*slotnum, 41);
440 }
441
442 static enum instruction_type template_encoding_table[32][3] =
443 {
444 { M, I, I }, /* 00 */
445 { M, I, I }, /* 01 */
446 { M, I, I }, /* 02 */
447 { M, I, I }, /* 03 */
448 { M, L, X }, /* 04 */
449 { M, L, X }, /* 05 */
450 { undefined, undefined, undefined }, /* 06 */
451 { undefined, undefined, undefined }, /* 07 */
452 { M, M, I }, /* 08 */
453 { M, M, I }, /* 09 */
454 { M, M, I }, /* 0A */
455 { M, M, I }, /* 0B */
456 { M, F, I }, /* 0C */
457 { M, F, I }, /* 0D */
458 { M, M, F }, /* 0E */
459 { M, M, F }, /* 0F */
460 { M, I, B }, /* 10 */
461 { M, I, B }, /* 11 */
462 { M, B, B }, /* 12 */
463 { M, B, B }, /* 13 */
464 { undefined, undefined, undefined }, /* 14 */
465 { undefined, undefined, undefined }, /* 15 */
466 { B, B, B }, /* 16 */
467 { B, B, B }, /* 17 */
468 { M, M, B }, /* 18 */
469 { M, M, B }, /* 19 */
470 { undefined, undefined, undefined }, /* 1A */
471 { undefined, undefined, undefined }, /* 1B */
472 { M, F, B }, /* 1C */
473 { M, F, B }, /* 1D */
474 { undefined, undefined, undefined }, /* 1E */
475 { undefined, undefined, undefined }, /* 1F */
476 };
477
478 /* Fetch and (partially) decode an instruction at ADDR and return the
479 address of the next instruction to fetch. */
480
481 static CORE_ADDR
482 fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
483 {
484 char bundle[BUNDLE_LEN];
485 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
486 long long template;
487 int val;
488
489 /* Warn about slot numbers greater than 2. We used to generate
490 an error here on the assumption that the user entered an invalid
491 address. But, sometimes GDB itself requests an invalid address.
492 This can (easily) happen when execution stops in a function for
493 which there are no symbols. The prologue scanner will attempt to
494 find the beginning of the function - if the nearest symbol
495 happens to not be aligned on a bundle boundary (16 bytes), the
496 resulting starting address will cause GDB to think that the slot
497 number is too large.
498
499 So we warn about it and set the slot number to zero. It is
500 not necessarily a fatal condition, particularly if debugging
501 at the assembly language level. */
502 if (slotnum > 2)
503 {
504 warning ("Can't fetch instructions for slot numbers greater than 2.\n"
505 "Using slot 0 instead");
506 slotnum = 0;
507 }
508
509 addr &= ~0x0f;
510
511 val = target_read_memory (addr, bundle, BUNDLE_LEN);
512
513 if (val != 0)
514 return 0;
515
516 *instr = slotN_contents (bundle, slotnum);
517 template = extract_bit_field (bundle, 0, 5);
518 *it = template_encoding_table[(int)template][slotnum];
519
520 if (slotnum == 2 || (slotnum == 1 && *it == L))
521 addr += 16;
522 else
523 addr += (slotnum + 1) * SLOT_MULTIPLIER;
524
525 return addr;
526 }
527
528 /* There are 5 different break instructions (break.i, break.b,
529 break.m, break.f, and break.x), but they all have the same
530 encoding. (The five bit template in the low five bits of the
531 instruction bundle distinguishes one from another.)
532
533 The runtime architecture manual specifies that break instructions
534 used for debugging purposes must have the upper two bits of the 21
535 bit immediate set to a 0 and a 1 respectively. A breakpoint
536 instruction encodes the most significant bit of its 21 bit
537 immediate at bit 36 of the 41 bit instruction. The penultimate msb
538 is at bit 25 which leads to the pattern below.
539
540 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
541 it turns out that 0x80000 was used as the syscall break in the early
542 simulators. So I changed the pattern slightly to do "break.i 0x080001"
543 instead. But that didn't work either (I later found out that this
544 pattern was used by the simulator that I was using.) So I ended up
545 using the pattern seen below. */
546
547 #if 0
548 #define BREAKPOINT 0x00002000040LL
549 #endif
550 #define BREAKPOINT 0x00003333300LL
551
552 static int
553 ia64_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
554 {
555 char bundle[BUNDLE_LEN];
556 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
557 long long instr;
558 int val;
559 int template;
560
561 if (slotnum > 2)
562 error("Can't insert breakpoint for slot numbers greater than 2.");
563
564 addr &= ~0x0f;
565
566 val = target_read_memory (addr, bundle, BUNDLE_LEN);
567
568 /* Check for L type instruction in 2nd slot, if present then
569 bump up the slot number to the 3rd slot */
570 template = extract_bit_field (bundle, 0, 5);
571 if (slotnum == 1 && template_encoding_table[template][1] == L)
572 {
573 slotnum = 2;
574 }
575
576 instr = slotN_contents (bundle, slotnum);
577 memcpy(contents_cache, &instr, sizeof(instr));
578 replace_slotN_contents (bundle, BREAKPOINT, slotnum);
579 if (val == 0)
580 target_write_memory (addr, bundle, BUNDLE_LEN);
581
582 return val;
583 }
584
585 static int
586 ia64_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
587 {
588 char bundle[BUNDLE_LEN];
589 int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
590 long long instr;
591 int val;
592 int template;
593
594 addr &= ~0x0f;
595
596 val = target_read_memory (addr, bundle, BUNDLE_LEN);
597
598 /* Check for L type instruction in 2nd slot, if present then
599 bump up the slot number to the 3rd slot */
600 template = extract_bit_field (bundle, 0, 5);
601 if (slotnum == 1 && template_encoding_table[template][1] == L)
602 {
603 slotnum = 2;
604 }
605
606 memcpy (&instr, contents_cache, sizeof instr);
607 replace_slotN_contents (bundle, instr, slotnum);
608 if (val == 0)
609 target_write_memory (addr, bundle, BUNDLE_LEN);
610
611 return val;
612 }
613
614 /* We don't really want to use this, but remote.c needs to call it in order
615 to figure out if Z-packets are supported or not. Oh, well. */
616 const unsigned char *
617 ia64_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
618 {
619 static unsigned char breakpoint[] =
620 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
621 *lenptr = sizeof (breakpoint);
622 #if 0
623 *pcptr &= ~0x0f;
624 #endif
625 return breakpoint;
626 }
627
628 CORE_ADDR
629 ia64_read_pc (ptid_t ptid)
630 {
631 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
632 CORE_ADDR pc_value = read_register_pid (IA64_IP_REGNUM, ptid);
633 int slot_num = (psr_value >> 41) & 3;
634
635 return pc_value | (slot_num * SLOT_MULTIPLIER);
636 }
637
638 void
639 ia64_write_pc (CORE_ADDR new_pc, ptid_t ptid)
640 {
641 int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
642 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
643 psr_value &= ~(3LL << 41);
644 psr_value |= (CORE_ADDR)(slot_num & 0x3) << 41;
645
646 new_pc &= ~0xfLL;
647
648 write_register_pid (IA64_PSR_REGNUM, psr_value, ptid);
649 write_register_pid (IA64_IP_REGNUM, new_pc, ptid);
650 }
651
652 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
653
654 /* Returns the address of the slot that's NSLOTS slots away from
655 the address ADDR. NSLOTS may be positive or negative. */
656 static CORE_ADDR
657 rse_address_add(CORE_ADDR addr, int nslots)
658 {
659 CORE_ADDR new_addr;
660 int mandatory_nat_slots = nslots / 63;
661 int direction = nslots < 0 ? -1 : 1;
662
663 new_addr = addr + 8 * (nslots + mandatory_nat_slots);
664
665 if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
666 new_addr += 8 * direction;
667
668 if (IS_NaT_COLLECTION_ADDR(new_addr))
669 new_addr += 8 * direction;
670
671 return new_addr;
672 }
673
674 /* The IA-64 frame chain is a bit odd. We won't always have a frame
675 pointer, so we use the SP value as the FP for the purpose of
676 creating a frame. There is sometimes a register (not fixed) which
677 is used as a frame pointer. When this register exists, it is not
678 especially hard to determine which one is being used. It isn't
679 even really hard to compute the frame chain, but it can be
680 computationally expensive. So, instead of making life difficult
681 (and slow), we pick a more convenient representation of the frame
682 chain, knowing that we'll have to make some small adjustments in
683 other places. (E.g, note that read_fp() is actually read_sp() in
684 ia64_gdbarch_init() below.)
685
686 Okay, so what is the frame chain exactly? It'll be the SP value
687 at the time that the function in question was entered.
688
689 Note that this *should* actually the frame pointer for the current
690 function! But as I note above, if we were to attempt to find the
691 address of the beginning of the previous frame, we'd waste a lot
692 of cycles for no good reason. So instead, we simply choose to
693 represent the frame chain as the end of the previous frame instead
694 of the beginning. */
695
696 CORE_ADDR
697 ia64_frame_chain (struct frame_info *frame)
698 {
699 if ((get_frame_type (frame) == SIGTRAMP_FRAME))
700 return read_sigcontext_register (frame, sp_regnum);
701 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
702 get_frame_base (frame),
703 get_frame_base (frame)))
704 return get_frame_base (frame);
705 else
706 {
707 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
708 if (get_frame_saved_regs (frame)[IA64_VFP_REGNUM])
709 return read_memory_integer (get_frame_saved_regs (frame)[IA64_VFP_REGNUM], 8);
710 else
711 return (get_frame_base (frame)
712 + get_frame_extra_info (frame)->mem_stack_frame_size);
713 }
714 }
715
716 CORE_ADDR
717 ia64_frame_saved_pc (struct frame_info *frame)
718 {
719 if ((get_frame_type (frame) == SIGTRAMP_FRAME))
720 return read_sigcontext_register (frame, pc_regnum);
721 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
722 get_frame_base (frame),
723 get_frame_base (frame)))
724 return deprecated_read_register_dummy (get_frame_pc (frame),
725 get_frame_base (frame), pc_regnum);
726 else
727 {
728 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
729
730 if (get_frame_saved_regs (frame)[IA64_VRAP_REGNUM])
731 return read_memory_integer (get_frame_saved_regs (frame)[IA64_VRAP_REGNUM], 8);
732 else if (get_next_frame (frame)
733 && (get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME))
734 return read_sigcontext_register (get_next_frame (frame), IA64_BR0_REGNUM);
735 else /* either frameless, or not far enough along in the prologue... */
736 return ia64_saved_pc_after_call (frame);
737 }
738 }
739
740 /* Limit the number of skipped non-prologue instructions since examining
741 of the prologue is expensive. */
742 static int max_skip_non_prologue_insns = 10;
743
744 /* Given PC representing the starting address of a function, and
745 LIM_PC which is the (sloppy) limit to which to scan when looking
746 for a prologue, attempt to further refine this limit by using
747 the line data in the symbol table. If successful, a better guess
748 on where the prologue ends is returned, otherwise the previous
749 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
750 which will be set to indicate whether the returned limit may be
751 used with no further scanning in the event that the function is
752 frameless. */
753
754 static CORE_ADDR
755 refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc, int *trust_limit)
756 {
757 struct symtab_and_line prologue_sal;
758 CORE_ADDR start_pc = pc;
759
760 /* Start off not trusting the limit. */
761 *trust_limit = 0;
762
763 prologue_sal = find_pc_line (pc, 0);
764 if (prologue_sal.line != 0)
765 {
766 int i;
767 CORE_ADDR addr = prologue_sal.end;
768
769 /* Handle the case in which compiler's optimizer/scheduler
770 has moved instructions into the prologue. We scan ahead
771 in the function looking for address ranges whose corresponding
772 line number is less than or equal to the first one that we
773 found for the function. (It can be less than when the
774 scheduler puts a body instruction before the first prologue
775 instruction.) */
776 for (i = 2 * max_skip_non_prologue_insns;
777 i > 0 && (lim_pc == 0 || addr < lim_pc);
778 i--)
779 {
780 struct symtab_and_line sal;
781
782 sal = find_pc_line (addr, 0);
783 if (sal.line == 0)
784 break;
785 if (sal.line <= prologue_sal.line
786 && sal.symtab == prologue_sal.symtab)
787 {
788 prologue_sal = sal;
789 }
790 addr = sal.end;
791 }
792
793 if (lim_pc == 0 || prologue_sal.end < lim_pc)
794 {
795 lim_pc = prologue_sal.end;
796 if (start_pc == get_pc_function_start (lim_pc))
797 *trust_limit = 1;
798 }
799 }
800 return lim_pc;
801 }
802
803 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
804 || (8 <= (_regnum_) && (_regnum_) <= 11) \
805 || (14 <= (_regnum_) && (_regnum_) <= 31))
806 #define imm9(_instr_) \
807 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
808 | (((_instr_) & 0x00008000000LL) >> 20) \
809 | (((_instr_) & 0x00000001fc0LL) >> 6))
810
811 static CORE_ADDR
812 examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct frame_info *frame)
813 {
814 CORE_ADDR next_pc;
815 CORE_ADDR last_prologue_pc = pc;
816 instruction_type it;
817 long long instr;
818 int do_fsr_stuff = 0;
819
820 int cfm_reg = 0;
821 int ret_reg = 0;
822 int fp_reg = 0;
823 int unat_save_reg = 0;
824 int pr_save_reg = 0;
825 int mem_stack_frame_size = 0;
826 int spill_reg = 0;
827 CORE_ADDR spill_addr = 0;
828 char instores[8];
829 char infpstores[8];
830 int trust_limit;
831
832 memset (instores, 0, sizeof instores);
833 memset (infpstores, 0, sizeof infpstores);
834
835 if (frame && !get_frame_saved_regs (frame))
836 {
837 frame_saved_regs_zalloc (frame);
838 do_fsr_stuff = 1;
839 }
840
841 if (frame
842 && !do_fsr_stuff
843 && get_frame_extra_info (frame)->after_prologue != 0
844 && get_frame_extra_info (frame)->after_prologue <= lim_pc)
845 return get_frame_extra_info (frame)->after_prologue;
846
847 lim_pc = refine_prologue_limit (pc, lim_pc, &trust_limit);
848
849 /* Must start with an alloc instruction */
850 next_pc = fetch_instruction (pc, &it, &instr);
851 if (pc < lim_pc && next_pc
852 && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
853 {
854 /* alloc */
855 int sor = (int) ((instr & 0x00078000000LL) >> 27);
856 int sol = (int) ((instr & 0x00007f00000LL) >> 20);
857 int sof = (int) ((instr & 0x000000fe000LL) >> 13);
858 /* Okay, so sor, sol, and sof aren't used right now; but perhaps
859 we could compare against the size given to us via the cfm as
860 either a sanity check or possibly to see if the frame has been
861 changed by a later alloc instruction... */
862 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
863 cfm_reg = rN;
864 last_prologue_pc = next_pc;
865 pc = next_pc;
866 }
867 else
868 {
869 pc = lim_pc; /* Frameless: We're done early. */
870 if (trust_limit)
871 last_prologue_pc = lim_pc;
872 }
873
874 /* Loop, looking for prologue instructions, keeping track of
875 where preserved registers were spilled. */
876 while (pc < lim_pc)
877 {
878 next_pc = fetch_instruction (pc, &it, &instr);
879 if (next_pc == 0)
880 break;
881
882 if ((it == B && ((instr & 0x1e1f800003f) != 0x04000000000))
883 || ((instr & 0x3fLL) != 0LL))
884 {
885 /* Exit loop upon hitting a non-nop branch instruction
886 or a predicated instruction. */
887 break;
888 }
889 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
890 {
891 /* Move from BR */
892 int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
893 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
894 int qp = (int) (instr & 0x0000000003f);
895
896 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
897 {
898 ret_reg = rN;
899 last_prologue_pc = next_pc;
900 }
901 }
902 else if ((it == I || it == M)
903 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
904 {
905 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
906 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
907 | ((instr & 0x001f8000000LL) >> 20)
908 | ((instr & 0x000000fe000LL) >> 13));
909 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
910 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
911 int qp = (int) (instr & 0x0000000003fLL);
912
913 if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
914 {
915 /* mov rN, r12 */
916 fp_reg = rN;
917 last_prologue_pc = next_pc;
918 }
919 else if (qp == 0 && rN == 12 && rM == 12)
920 {
921 /* adds r12, -mem_stack_frame_size, r12 */
922 mem_stack_frame_size -= imm;
923 last_prologue_pc = next_pc;
924 }
925 else if (qp == 0 && rN == 2
926 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
927 {
928 /* adds r2, spilloffset, rFramePointer
929 or
930 adds r2, spilloffset, r12
931
932 Get ready for stf.spill or st8.spill instructions.
933 The address to start spilling at is loaded into r2.
934 FIXME: Why r2? That's what gcc currently uses; it
935 could well be different for other compilers. */
936
937 /* Hmm... whether or not this will work will depend on
938 where the pc is. If it's still early in the prologue
939 this'll be wrong. FIXME */
940 spill_addr = (frame ? get_frame_base (frame) : 0)
941 + (rM == 12 ? 0 : mem_stack_frame_size)
942 + imm;
943 spill_reg = rN;
944 last_prologue_pc = next_pc;
945 }
946 }
947 else if (it == M
948 && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
949 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
950 {
951 /* stf.spill [rN] = fM, imm9
952 or
953 stf.spill [rN] = fM */
954
955 int imm = imm9(instr);
956 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
957 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
958 int qp = (int) (instr & 0x0000000003fLL);
959 if (qp == 0 && rN == spill_reg && spill_addr != 0
960 && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
961 {
962 if (do_fsr_stuff)
963 get_frame_saved_regs (frame)[IA64_FR0_REGNUM + fM] = spill_addr;
964
965 if ((instr & 0x1efc0000000) == 0x0eec0000000)
966 spill_addr += imm;
967 else
968 spill_addr = 0; /* last one; must be done */
969 last_prologue_pc = next_pc;
970 }
971 }
972 else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
973 || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
974 {
975 /* mov.m rN = arM
976 or
977 mov.i rN = arM */
978
979 int arM = (int) ((instr & 0x00007f00000LL) >> 20);
980 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
981 int qp = (int) (instr & 0x0000000003fLL);
982 if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
983 {
984 /* We have something like "mov.m r3 = ar.unat". Remember the
985 r3 (or whatever) and watch for a store of this register... */
986 unat_save_reg = rN;
987 last_prologue_pc = next_pc;
988 }
989 }
990 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
991 {
992 /* mov rN = pr */
993 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
994 int qp = (int) (instr & 0x0000000003fLL);
995 if (qp == 0 && isScratch (rN))
996 {
997 pr_save_reg = rN;
998 last_prologue_pc = next_pc;
999 }
1000 }
1001 else if (it == M
1002 && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
1003 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
1004 {
1005 /* st8 [rN] = rM
1006 or
1007 st8 [rN] = rM, imm9 */
1008 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1009 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1010 int qp = (int) (instr & 0x0000000003fLL);
1011 if (qp == 0 && rN == spill_reg && spill_addr != 0
1012 && (rM == unat_save_reg || rM == pr_save_reg))
1013 {
1014 /* We've found a spill of either the UNAT register or the PR
1015 register. (Well, not exactly; what we've actually found is
1016 a spill of the register that UNAT or PR was moved to).
1017 Record that fact and move on... */
1018 if (rM == unat_save_reg)
1019 {
1020 /* Track UNAT register */
1021 if (do_fsr_stuff)
1022 get_frame_saved_regs (frame)[IA64_UNAT_REGNUM] = spill_addr;
1023 unat_save_reg = 0;
1024 }
1025 else
1026 {
1027 /* Track PR register */
1028 if (do_fsr_stuff)
1029 get_frame_saved_regs (frame)[IA64_PR_REGNUM] = spill_addr;
1030 pr_save_reg = 0;
1031 }
1032 if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
1033 /* st8 [rN] = rM, imm9 */
1034 spill_addr += imm9(instr);
1035 else
1036 spill_addr = 0; /* must be done spilling */
1037 last_prologue_pc = next_pc;
1038 }
1039 else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1040 {
1041 /* Allow up to one store of each input register. */
1042 instores[rM-32] = 1;
1043 last_prologue_pc = next_pc;
1044 }
1045 }
1046 else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL))
1047 {
1048 /* One of
1049 st1 [rN] = rM
1050 st2 [rN] = rM
1051 st4 [rN] = rM
1052 st8 [rN] = rM
1053 Note that the st8 case is handled in the clause above.
1054
1055 Advance over stores of input registers. One store per input
1056 register is permitted. */
1057 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1058 int qp = (int) (instr & 0x0000000003fLL);
1059 if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1060 {
1061 instores[rM-32] = 1;
1062 last_prologue_pc = next_pc;
1063 }
1064 }
1065 else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL))
1066 {
1067 /* Either
1068 stfs [rN] = fM
1069 or
1070 stfd [rN] = fM
1071
1072 Advance over stores of floating point input registers. Again
1073 one store per register is permitted */
1074 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
1075 int qp = (int) (instr & 0x0000000003fLL);
1076 if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8])
1077 {
1078 infpstores[fM-8] = 1;
1079 last_prologue_pc = next_pc;
1080 }
1081 }
1082 else if (it == M
1083 && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
1084 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
1085 {
1086 /* st8.spill [rN] = rM
1087 or
1088 st8.spill [rN] = rM, imm9 */
1089 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1090 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1091 int qp = (int) (instr & 0x0000000003fLL);
1092 if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
1093 {
1094 /* We've found a spill of one of the preserved general purpose
1095 regs. Record the spill address and advance the spill
1096 register if appropriate. */
1097 if (do_fsr_stuff)
1098 get_frame_saved_regs (frame)[IA64_GR0_REGNUM + rM] = spill_addr;
1099 if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
1100 /* st8.spill [rN] = rM, imm9 */
1101 spill_addr += imm9(instr);
1102 else
1103 spill_addr = 0; /* Done spilling */
1104 last_prologue_pc = next_pc;
1105 }
1106 }
1107
1108 pc = next_pc;
1109 }
1110
1111 if (do_fsr_stuff) {
1112 int i;
1113 CORE_ADDR addr;
1114 int sor, rrb_gr;
1115
1116 /* Extract the size of the rotating portion of the stack
1117 frame and the register rename base from the current
1118 frame marker. */
1119 sor = ((get_frame_extra_info (frame)->cfm >> 14) & 0xf) * 8;
1120 rrb_gr = (get_frame_extra_info (frame)->cfm >> 18) & 0x7f;
1121
1122 for (i = 0, addr = get_frame_extra_info (frame)->bsp;
1123 i < get_frame_extra_info (frame)->sof;
1124 i++, addr += 8)
1125 {
1126 if (IS_NaT_COLLECTION_ADDR (addr))
1127 {
1128 addr += 8;
1129 }
1130 if (i < sor)
1131 get_frame_saved_regs (frame)[IA64_GR32_REGNUM + ((i + (sor - rrb_gr)) % sor)]
1132 = addr;
1133 else
1134 get_frame_saved_regs (frame)[IA64_GR32_REGNUM + i] = addr;
1135
1136 if (i+32 == cfm_reg)
1137 get_frame_saved_regs (frame)[IA64_CFM_REGNUM] = addr;
1138 if (i+32 == ret_reg)
1139 get_frame_saved_regs (frame)[IA64_VRAP_REGNUM] = addr;
1140 if (i+32 == fp_reg)
1141 get_frame_saved_regs (frame)[IA64_VFP_REGNUM] = addr;
1142 }
1143 }
1144
1145 if (frame && get_frame_extra_info (frame))
1146 {
1147 get_frame_extra_info (frame)->after_prologue = last_prologue_pc;
1148 get_frame_extra_info (frame)->mem_stack_frame_size = mem_stack_frame_size;
1149 get_frame_extra_info (frame)->fp_reg = fp_reg;
1150 }
1151
1152 return last_prologue_pc;
1153 }
1154
1155 CORE_ADDR
1156 ia64_skip_prologue (CORE_ADDR pc)
1157 {
1158 return examine_prologue (pc, pc+1024, 0);
1159 }
1160
1161 void
1162 ia64_frame_init_saved_regs (struct frame_info *frame)
1163 {
1164 if (get_frame_saved_regs (frame))
1165 return;
1166
1167 if ((get_frame_type (frame) == SIGTRAMP_FRAME) && SIGCONTEXT_REGISTER_ADDRESS)
1168 {
1169 int regno;
1170
1171 frame_saved_regs_zalloc (frame);
1172
1173 get_frame_saved_regs (frame)[IA64_VRAP_REGNUM] =
1174 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_IP_REGNUM);
1175 get_frame_saved_regs (frame)[IA64_CFM_REGNUM] =
1176 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_CFM_REGNUM);
1177 get_frame_saved_regs (frame)[IA64_PSR_REGNUM] =
1178 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_PSR_REGNUM);
1179 #if 0
1180 get_frame_saved_regs (frame)[IA64_BSP_REGNUM] =
1181 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_BSP_REGNUM);
1182 #endif
1183 get_frame_saved_regs (frame)[IA64_RNAT_REGNUM] =
1184 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_RNAT_REGNUM);
1185 get_frame_saved_regs (frame)[IA64_CCV_REGNUM] =
1186 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_CCV_REGNUM);
1187 get_frame_saved_regs (frame)[IA64_UNAT_REGNUM] =
1188 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_UNAT_REGNUM);
1189 get_frame_saved_regs (frame)[IA64_FPSR_REGNUM] =
1190 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_FPSR_REGNUM);
1191 get_frame_saved_regs (frame)[IA64_PFS_REGNUM] =
1192 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_PFS_REGNUM);
1193 get_frame_saved_regs (frame)[IA64_LC_REGNUM] =
1194 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_LC_REGNUM);
1195 for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
1196 if (regno != sp_regnum)
1197 get_frame_saved_regs (frame)[regno] =
1198 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
1199 for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1200 get_frame_saved_regs (frame)[regno] =
1201 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
1202 for (regno = IA64_FR2_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1203 get_frame_saved_regs (frame)[regno] =
1204 SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
1205 }
1206 else
1207 {
1208 CORE_ADDR func_start;
1209
1210 func_start = get_pc_function_start (get_frame_pc (frame));
1211 examine_prologue (func_start, get_frame_pc (frame), frame);
1212 }
1213 }
1214
1215 void
1216 ia64_get_saved_register (char *raw_buffer,
1217 int *optimized,
1218 CORE_ADDR *addrp,
1219 struct frame_info *frame,
1220 int regnum,
1221 enum lval_type *lval)
1222 {
1223 int is_dummy_frame;
1224
1225 if (!target_has_registers)
1226 error ("No registers.");
1227
1228 if (optimized != NULL)
1229 *optimized = 0;
1230
1231 if (addrp != NULL)
1232 *addrp = 0;
1233
1234 if (lval != NULL)
1235 *lval = not_lval;
1236
1237 is_dummy_frame = DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
1238 get_frame_base (frame),
1239 get_frame_base (frame));
1240
1241 if (regnum == SP_REGNUM && get_next_frame (frame))
1242 {
1243 /* Handle SP values for all frames but the topmost. */
1244 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
1245 get_frame_base (frame));
1246 }
1247 else if (regnum == IA64_BSP_REGNUM)
1248 {
1249 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
1250 get_frame_extra_info (frame)->bsp);
1251 }
1252 else if (regnum == IA64_VFP_REGNUM)
1253 {
1254 /* If the function in question uses an automatic register (r32-r127)
1255 for the frame pointer, it'll be found by ia64_find_saved_register()
1256 above. If the function lacks one of these frame pointers, we can
1257 still provide a value since we know the size of the frame */
1258 CORE_ADDR vfp = (get_frame_base (frame)
1259 + get_frame_extra_info (frame)->mem_stack_frame_size);
1260 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_VFP_REGNUM), vfp);
1261 }
1262 else if (IA64_PR0_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1263 {
1264 char *pr_raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
1265 int pr_optim;
1266 enum lval_type pr_lval;
1267 CORE_ADDR pr_addr;
1268 int prN_val;
1269 ia64_get_saved_register (pr_raw_buffer, &pr_optim, &pr_addr,
1270 frame, IA64_PR_REGNUM, &pr_lval);
1271 if (IA64_PR16_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1272 {
1273 /* Fetch predicate register rename base from current frame
1274 marker for this frame. */
1275 int rrb_pr = (get_frame_extra_info (frame)->cfm >> 32) & 0x3f;
1276
1277 /* Adjust the register number to account for register rotation. */
1278 regnum = IA64_PR16_REGNUM
1279 + ((regnum - IA64_PR16_REGNUM) + rrb_pr) % 48;
1280 }
1281 prN_val = extract_bit_field ((unsigned char *) pr_raw_buffer,
1282 regnum - IA64_PR0_REGNUM, 1);
1283 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), prN_val);
1284 }
1285 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
1286 {
1287 char *unat_raw_buffer = alloca (MAX_REGISTER_RAW_SIZE);
1288 int unat_optim;
1289 enum lval_type unat_lval;
1290 CORE_ADDR unat_addr;
1291 int unatN_val;
1292 ia64_get_saved_register (unat_raw_buffer, &unat_optim, &unat_addr,
1293 frame, IA64_UNAT_REGNUM, &unat_lval);
1294 unatN_val = extract_bit_field ((unsigned char *) unat_raw_buffer,
1295 regnum - IA64_NAT0_REGNUM, 1);
1296 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
1297 unatN_val);
1298 }
1299 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
1300 {
1301 int natval = 0;
1302 /* Find address of general register corresponding to nat bit we're
1303 interested in. */
1304 CORE_ADDR gr_addr = 0;
1305
1306 if (!is_dummy_frame)
1307 {
1308 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
1309 gr_addr = get_frame_saved_regs (frame)[ regnum - IA64_NAT0_REGNUM
1310 + IA64_GR0_REGNUM];
1311 }
1312 if (gr_addr)
1313 {
1314 /* Compute address of nat collection bits */
1315 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1316 CORE_ADDR bsp = read_register (IA64_BSP_REGNUM);
1317 CORE_ADDR nat_collection;
1318 int nat_bit;
1319 /* If our nat collection address is bigger than bsp, we have to get
1320 the nat collection from rnat. Otherwise, we fetch the nat
1321 collection from the computed address. */
1322 if (nat_addr >= bsp)
1323 nat_collection = read_register (IA64_RNAT_REGNUM);
1324 else
1325 nat_collection = read_memory_integer (nat_addr, 8);
1326 nat_bit = (gr_addr >> 3) & 0x3f;
1327 natval = (nat_collection >> nat_bit) & 1;
1328 }
1329 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), natval);
1330 }
1331 else if (regnum == IA64_IP_REGNUM)
1332 {
1333 CORE_ADDR pc;
1334 if (get_next_frame (frame))
1335 {
1336 /* FIXME: Set *addrp, *lval when possible. */
1337 pc = ia64_frame_saved_pc (get_next_frame (frame));
1338 }
1339 else
1340 {
1341 pc = read_pc ();
1342 }
1343 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_IP_REGNUM), pc);
1344 }
1345 else if (IA64_GR32_REGNUM <= regnum && regnum <= IA64_GR127_REGNUM)
1346 {
1347 CORE_ADDR addr = 0;
1348 if (!is_dummy_frame)
1349 {
1350 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
1351 addr = get_frame_saved_regs (frame)[regnum];
1352 }
1353
1354 if (addr != 0)
1355 {
1356 if (lval != NULL)
1357 *lval = lval_memory;
1358 if (addrp != NULL)
1359 *addrp = addr;
1360 read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
1361 }
1362 else
1363 {
1364 /* r32 - r127 must be fetchable via memory. If they aren't,
1365 then the register is unavailable */
1366 memset (raw_buffer, 0, REGISTER_RAW_SIZE (regnum));
1367 }
1368 }
1369 else
1370 {
1371 if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM)
1372 {
1373 /* Fetch floating point register rename base from current
1374 frame marker for this frame. */
1375 int rrb_fr = (get_frame_extra_info (frame)->cfm >> 25) & 0x7f;
1376
1377 /* Adjust the floating point register number to account for
1378 register rotation. */
1379 regnum = IA64_FR32_REGNUM
1380 + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96;
1381 }
1382
1383 deprecated_generic_get_saved_register (raw_buffer, optimized, addrp,
1384 frame, regnum, lval);
1385 }
1386 }
1387
1388 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
1389 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
1390 and TYPE is the type (which is known to be struct, union or array). */
1391 int
1392 ia64_use_struct_convention (int gcc_p, struct type *type)
1393 {
1394 struct type *float_elt_type;
1395
1396 /* HFAs are structures (or arrays) consisting entirely of floating
1397 point values of the same length. Up to 8 of these are returned
1398 in registers. Don't use the struct convention when this is the
1399 case. */
1400 float_elt_type = is_float_or_hfa_type (type);
1401 if (float_elt_type != NULL
1402 && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8)
1403 return 0;
1404
1405 /* Other structs of length 32 or less are returned in r8-r11.
1406 Don't use the struct convention for those either. */
1407 return TYPE_LENGTH (type) > 32;
1408 }
1409
1410 void
1411 ia64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1412 {
1413 struct type *float_elt_type;
1414
1415 float_elt_type = is_float_or_hfa_type (type);
1416 if (float_elt_type != NULL)
1417 {
1418 int offset = 0;
1419 int regnum = IA64_FR8_REGNUM;
1420 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
1421
1422 while (n-- > 0)
1423 {
1424 ia64_register_convert_to_virtual (regnum, float_elt_type,
1425 &regbuf[REGISTER_BYTE (regnum)], valbuf + offset);
1426 offset += TYPE_LENGTH (float_elt_type);
1427 regnum++;
1428 }
1429 }
1430 else
1431 memcpy (valbuf, &regbuf[REGISTER_BYTE (IA64_GR8_REGNUM)],
1432 TYPE_LENGTH (type));
1433 }
1434
1435 /* FIXME: Turn this into a stack of some sort. Unfortunately, something
1436 like this is necessary though since the IA-64 calling conventions specify
1437 that r8 is not preserved. */
1438 static CORE_ADDR struct_return_address;
1439
1440 CORE_ADDR
1441 ia64_extract_struct_value_address (char *regbuf)
1442 {
1443 /* FIXME: See above. */
1444 return struct_return_address;
1445 }
1446
1447 void
1448 ia64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1449 {
1450 /* FIXME: See above. */
1451 /* Note that most of the work was done in ia64_push_arguments() */
1452 struct_return_address = addr;
1453 }
1454
1455 int
1456 ia64_frameless_function_invocation (struct frame_info *frame)
1457 {
1458 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
1459 return (get_frame_extra_info (frame)->mem_stack_frame_size == 0);
1460 }
1461
1462 CORE_ADDR
1463 ia64_saved_pc_after_call (struct frame_info *frame)
1464 {
1465 return read_register (IA64_BR0_REGNUM);
1466 }
1467
1468 CORE_ADDR
1469 ia64_frame_args_address (struct frame_info *frame)
1470 {
1471 /* frame->frame points at the SP for this frame; But we want the start
1472 of the frame, not the end. Calling frame chain will get his for us. */
1473 return ia64_frame_chain (frame);
1474 }
1475
1476 CORE_ADDR
1477 ia64_frame_locals_address (struct frame_info *frame)
1478 {
1479 /* frame->frame points at the SP for this frame; But we want the start
1480 of the frame, not the end. Calling frame chain will get his for us. */
1481 return ia64_frame_chain (frame);
1482 }
1483
1484 void
1485 ia64_init_extra_frame_info (int fromleaf, struct frame_info *frame)
1486 {
1487 CORE_ADDR bsp, cfm;
1488 int next_frame_is_call_dummy = ((get_next_frame (frame) != NULL)
1489 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (frame)),
1490 get_frame_base (get_next_frame (frame)),
1491 get_frame_base (get_next_frame (frame))));
1492
1493 frame_extra_info_zalloc (frame, sizeof (struct frame_extra_info));
1494
1495 if (get_next_frame (frame) == 0)
1496 {
1497 bsp = read_register (IA64_BSP_REGNUM);
1498 cfm = read_register (IA64_CFM_REGNUM);
1499
1500 }
1501 else if ((get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME))
1502 {
1503 bsp = read_sigcontext_register (get_next_frame (frame), IA64_BSP_REGNUM);
1504 cfm = read_sigcontext_register (get_next_frame (frame), IA64_CFM_REGNUM);
1505 }
1506 else if (next_frame_is_call_dummy)
1507 {
1508 bsp = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frame)),
1509 get_frame_base (get_next_frame (frame)),
1510 IA64_BSP_REGNUM);
1511 cfm = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frame)),
1512 get_frame_base (get_next_frame (frame)),
1513 IA64_CFM_REGNUM);
1514 }
1515 else
1516 {
1517 struct frame_info *frn = get_next_frame (frame);
1518
1519 DEPRECATED_FRAME_INIT_SAVED_REGS (frn);
1520
1521 if (get_frame_saved_regs (frn)[IA64_CFM_REGNUM] != 0)
1522 cfm = read_memory_integer (get_frame_saved_regs (frn)[IA64_CFM_REGNUM], 8);
1523 else if (get_next_frame (frn) && (get_frame_type (get_next_frame (frn)) == SIGTRAMP_FRAME))
1524 cfm = read_sigcontext_register (get_next_frame (frn), IA64_PFS_REGNUM);
1525 else if (get_next_frame (frn)
1526 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (frn)),
1527 get_frame_base (get_next_frame (frn)),
1528 get_frame_base (get_next_frame (frn))))
1529 cfm = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frn)),
1530 get_frame_base (get_next_frame (frn)),
1531 IA64_PFS_REGNUM);
1532 else
1533 cfm = read_register (IA64_PFS_REGNUM);
1534
1535 bsp = get_frame_extra_info (frn)->bsp;
1536 }
1537 get_frame_extra_info (frame)->cfm = cfm;
1538 get_frame_extra_info (frame)->sof = cfm & 0x7f;
1539 get_frame_extra_info (frame)->sol = (cfm >> 7) & 0x7f;
1540 if (get_next_frame (frame) == 0
1541 || (get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME)
1542 || next_frame_is_call_dummy)
1543 get_frame_extra_info (frame)->bsp =
1544 rse_address_add (bsp, -get_frame_extra_info (frame)->sof);
1545 else
1546 get_frame_extra_info (frame)->bsp =
1547 rse_address_add (bsp, -get_frame_extra_info (frame)->sol);
1548
1549 get_frame_extra_info (frame)->after_prologue = 0;
1550 get_frame_extra_info (frame)->mem_stack_frame_size = -1; /* Not yet determined */
1551 get_frame_extra_info (frame)->fp_reg = 0;
1552 }
1553
1554 static int
1555 is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
1556 {
1557 switch (TYPE_CODE (t))
1558 {
1559 case TYPE_CODE_FLT:
1560 if (*etp)
1561 return TYPE_LENGTH (*etp) == TYPE_LENGTH (t);
1562 else
1563 {
1564 *etp = t;
1565 return 1;
1566 }
1567 break;
1568 case TYPE_CODE_ARRAY:
1569 return
1570 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t)),
1571 etp);
1572 break;
1573 case TYPE_CODE_STRUCT:
1574 {
1575 int i;
1576
1577 for (i = 0; i < TYPE_NFIELDS (t); i++)
1578 if (!is_float_or_hfa_type_recurse
1579 (check_typedef (TYPE_FIELD_TYPE (t, i)), etp))
1580 return 0;
1581 return 1;
1582 }
1583 break;
1584 default:
1585 return 0;
1586 break;
1587 }
1588 }
1589
1590 /* Determine if the given type is one of the floating point types or
1591 and HFA (which is a struct, array, or combination thereof whose
1592 bottom-most elements are all of the same floating point type.) */
1593
1594 static struct type *
1595 is_float_or_hfa_type (struct type *t)
1596 {
1597 struct type *et = 0;
1598
1599 return is_float_or_hfa_type_recurse (t, &et) ? et : 0;
1600 }
1601
1602
1603 /* Return 1 if the alignment of T is such that the next even slot
1604 should be used. Return 0, if the next available slot should
1605 be used. (See section 8.5.1 of the IA-64 Software Conventions
1606 and Runtime manual.) */
1607
1608 static int
1609 slot_alignment_is_next_even (struct type *t)
1610 {
1611 switch (TYPE_CODE (t))
1612 {
1613 case TYPE_CODE_INT:
1614 case TYPE_CODE_FLT:
1615 if (TYPE_LENGTH (t) > 8)
1616 return 1;
1617 else
1618 return 0;
1619 case TYPE_CODE_ARRAY:
1620 return
1621 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t)));
1622 case TYPE_CODE_STRUCT:
1623 {
1624 int i;
1625
1626 for (i = 0; i < TYPE_NFIELDS (t); i++)
1627 if (slot_alignment_is_next_even
1628 (check_typedef (TYPE_FIELD_TYPE (t, i))))
1629 return 1;
1630 return 0;
1631 }
1632 default:
1633 return 0;
1634 }
1635 }
1636
1637 /* Attempt to find (and return) the global pointer for the given
1638 function.
1639
1640 This is a rather nasty bit of code searchs for the .dynamic section
1641 in the objfile corresponding to the pc of the function we're trying
1642 to call. Once it finds the addresses at which the .dynamic section
1643 lives in the child process, it scans the Elf64_Dyn entries for a
1644 DT_PLTGOT tag. If it finds one of these, the corresponding
1645 d_un.d_ptr value is the global pointer. */
1646
1647 static CORE_ADDR
1648 generic_elf_find_global_pointer (CORE_ADDR faddr)
1649 {
1650 struct obj_section *faddr_sect;
1651
1652 faddr_sect = find_pc_section (faddr);
1653 if (faddr_sect != NULL)
1654 {
1655 struct obj_section *osect;
1656
1657 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
1658 {
1659 if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
1660 break;
1661 }
1662
1663 if (osect < faddr_sect->objfile->sections_end)
1664 {
1665 CORE_ADDR addr;
1666
1667 addr = osect->addr;
1668 while (addr < osect->endaddr)
1669 {
1670 int status;
1671 LONGEST tag;
1672 char buf[8];
1673
1674 status = target_read_memory (addr, buf, sizeof (buf));
1675 if (status != 0)
1676 break;
1677 tag = extract_signed_integer (buf, sizeof (buf));
1678
1679 if (tag == DT_PLTGOT)
1680 {
1681 CORE_ADDR global_pointer;
1682
1683 status = target_read_memory (addr + 8, buf, sizeof (buf));
1684 if (status != 0)
1685 break;
1686 global_pointer = extract_address (buf, sizeof (buf));
1687
1688 /* The payoff... */
1689 return global_pointer;
1690 }
1691
1692 if (tag == DT_NULL)
1693 break;
1694
1695 addr += 16;
1696 }
1697 }
1698 }
1699 return 0;
1700 }
1701
1702 /* Given a function's address, attempt to find (and return) the
1703 corresponding (canonical) function descriptor. Return 0 if
1704 not found. */
1705 static CORE_ADDR
1706 find_extant_func_descr (CORE_ADDR faddr)
1707 {
1708 struct obj_section *faddr_sect;
1709
1710 /* Return early if faddr is already a function descriptor */
1711 faddr_sect = find_pc_section (faddr);
1712 if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0)
1713 return faddr;
1714
1715 if (faddr_sect != NULL)
1716 {
1717 struct obj_section *osect;
1718 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
1719 {
1720 if (strcmp (osect->the_bfd_section->name, ".opd") == 0)
1721 break;
1722 }
1723
1724 if (osect < faddr_sect->objfile->sections_end)
1725 {
1726 CORE_ADDR addr;
1727
1728 addr = osect->addr;
1729 while (addr < osect->endaddr)
1730 {
1731 int status;
1732 LONGEST faddr2;
1733 char buf[8];
1734
1735 status = target_read_memory (addr, buf, sizeof (buf));
1736 if (status != 0)
1737 break;
1738 faddr2 = extract_signed_integer (buf, sizeof (buf));
1739
1740 if (faddr == faddr2)
1741 return addr;
1742
1743 addr += 16;
1744 }
1745 }
1746 }
1747 return 0;
1748 }
1749
1750 /* Attempt to find a function descriptor corresponding to the
1751 given address. If none is found, construct one on the
1752 stack using the address at fdaptr */
1753
1754 static CORE_ADDR
1755 find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
1756 {
1757 CORE_ADDR fdesc;
1758
1759 fdesc = find_extant_func_descr (faddr);
1760
1761 if (fdesc == 0)
1762 {
1763 CORE_ADDR global_pointer;
1764 char buf[16];
1765
1766 fdesc = *fdaptr;
1767 *fdaptr += 16;
1768
1769 global_pointer = FIND_GLOBAL_POINTER (faddr);
1770
1771 if (global_pointer == 0)
1772 global_pointer = read_register (IA64_GR1_REGNUM);
1773
1774 store_address (buf, 8, faddr);
1775 store_address (buf + 8, 8, global_pointer);
1776
1777 write_memory (fdesc, buf, 16);
1778 }
1779
1780 return fdesc;
1781 }
1782
1783 CORE_ADDR
1784 ia64_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
1785 int struct_return, CORE_ADDR struct_addr)
1786 {
1787 int argno;
1788 struct value *arg;
1789 struct type *type;
1790 int len, argoffset;
1791 int nslots, rseslots, memslots, slotnum, nfuncargs;
1792 int floatreg;
1793 CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr;
1794
1795 nslots = 0;
1796 nfuncargs = 0;
1797 /* Count the number of slots needed for the arguments */
1798 for (argno = 0; argno < nargs; argno++)
1799 {
1800 arg = args[argno];
1801 type = check_typedef (VALUE_TYPE (arg));
1802 len = TYPE_LENGTH (type);
1803
1804 if ((nslots & 1) && slot_alignment_is_next_even (type))
1805 nslots++;
1806
1807 if (TYPE_CODE (type) == TYPE_CODE_FUNC)
1808 nfuncargs++;
1809
1810 nslots += (len + 7) / 8;
1811 }
1812
1813 /* Divvy up the slots between the RSE and the memory stack */
1814 rseslots = (nslots > 8) ? 8 : nslots;
1815 memslots = nslots - rseslots;
1816
1817 /* Allocate a new RSE frame */
1818 cfm = read_register (IA64_CFM_REGNUM);
1819
1820 bsp = read_register (IA64_BSP_REGNUM);
1821 bsp = rse_address_add (bsp, cfm & 0x7f);
1822 new_bsp = rse_address_add (bsp, rseslots);
1823 write_register (IA64_BSP_REGNUM, new_bsp);
1824
1825 pfs = read_register (IA64_PFS_REGNUM);
1826 pfs &= 0xc000000000000000LL;
1827 pfs |= (cfm & 0xffffffffffffLL);
1828 write_register (IA64_PFS_REGNUM, pfs);
1829
1830 cfm &= 0xc000000000000000LL;
1831 cfm |= rseslots;
1832 write_register (IA64_CFM_REGNUM, cfm);
1833
1834 /* We will attempt to find function descriptors in the .opd segment,
1835 but if we can't we'll construct them ourselves. That being the
1836 case, we'll need to reserve space on the stack for them. */
1837 funcdescaddr = sp - nfuncargs * 16;
1838 funcdescaddr &= ~0xfLL;
1839
1840 /* Adjust the stack pointer to it's new value. The calling conventions
1841 require us to have 16 bytes of scratch, plus whatever space is
1842 necessary for the memory slots and our function descriptors */
1843 sp = sp - 16 - (memslots + nfuncargs) * 8;
1844 sp &= ~0xfLL; /* Maintain 16 byte alignment */
1845
1846 /* Place the arguments where they belong. The arguments will be
1847 either placed in the RSE backing store or on the memory stack.
1848 In addition, floating point arguments or HFAs are placed in
1849 floating point registers. */
1850 slotnum = 0;
1851 floatreg = IA64_FR8_REGNUM;
1852 for (argno = 0; argno < nargs; argno++)
1853 {
1854 struct type *float_elt_type;
1855
1856 arg = args[argno];
1857 type = check_typedef (VALUE_TYPE (arg));
1858 len = TYPE_LENGTH (type);
1859
1860 /* Special handling for function parameters */
1861 if (len == 8
1862 && TYPE_CODE (type) == TYPE_CODE_PTR
1863 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1864 {
1865 char val_buf[8];
1866
1867 store_address (val_buf, 8,
1868 find_func_descr (extract_address (VALUE_CONTENTS (arg), 8),
1869 &funcdescaddr));
1870 if (slotnum < rseslots)
1871 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1872 else
1873 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1874 slotnum++;
1875 continue;
1876 }
1877
1878 /* Normal slots */
1879
1880 /* Skip odd slot if necessary... */
1881 if ((slotnum & 1) && slot_alignment_is_next_even (type))
1882 slotnum++;
1883
1884 argoffset = 0;
1885 while (len > 0)
1886 {
1887 char val_buf[8];
1888
1889 memset (val_buf, 0, 8);
1890 memcpy (val_buf, VALUE_CONTENTS (arg) + argoffset, (len > 8) ? 8 : len);
1891
1892 if (slotnum < rseslots)
1893 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1894 else
1895 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1896
1897 argoffset += 8;
1898 len -= 8;
1899 slotnum++;
1900 }
1901
1902 /* Handle floating point types (including HFAs) */
1903 float_elt_type = is_float_or_hfa_type (type);
1904 if (float_elt_type != NULL)
1905 {
1906 argoffset = 0;
1907 len = TYPE_LENGTH (type);
1908 while (len > 0 && floatreg < IA64_FR16_REGNUM)
1909 {
1910 ia64_register_convert_to_raw (
1911 float_elt_type,
1912 floatreg,
1913 VALUE_CONTENTS (arg) + argoffset,
1914 &deprecated_registers[REGISTER_BYTE (floatreg)]);
1915 floatreg++;
1916 argoffset += TYPE_LENGTH (float_elt_type);
1917 len -= TYPE_LENGTH (float_elt_type);
1918 }
1919 }
1920 }
1921
1922 /* Store the struct return value in r8 if necessary. */
1923 if (struct_return)
1924 {
1925 store_address (&deprecated_registers[REGISTER_BYTE (IA64_GR8_REGNUM)],
1926 REGISTER_RAW_SIZE (IA64_GR8_REGNUM),
1927 struct_addr);
1928 }
1929
1930 /* Sync gdb's idea of what the registers are with the target. */
1931 target_store_registers (-1);
1932
1933 /* FIXME: This doesn't belong here! Instead, SAVE_DUMMY_FRAME_TOS needs
1934 to be defined to call generic_save_dummy_frame_tos(). But at the
1935 time of this writing, SAVE_DUMMY_FRAME_TOS wasn't gdbarch'd, so
1936 I chose to put this call here instead of using the old mechanisms.
1937 Once SAVE_DUMMY_FRAME_TOS is gdbarch'd, all we need to do is add the
1938 line
1939
1940 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1941
1942 to ia64_gdbarch_init() and remove the line below. */
1943 generic_save_dummy_frame_tos (sp);
1944
1945 return sp;
1946 }
1947
1948 CORE_ADDR
1949 ia64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1950 {
1951 CORE_ADDR global_pointer = FIND_GLOBAL_POINTER (pc);
1952
1953 if (global_pointer != 0)
1954 write_register (IA64_GR1_REGNUM, global_pointer);
1955
1956 write_register (IA64_BR0_REGNUM, CALL_DUMMY_ADDRESS ());
1957 return sp;
1958 }
1959
1960 void
1961 ia64_store_return_value (struct type *type, char *valbuf)
1962 {
1963 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1964 {
1965 ia64_register_convert_to_raw (type, IA64_FR8_REGNUM, valbuf,
1966 &deprecated_registers[REGISTER_BYTE (IA64_FR8_REGNUM)]);
1967 target_store_registers (IA64_FR8_REGNUM);
1968 }
1969 else
1970 deprecated_write_register_bytes (REGISTER_BYTE (IA64_GR8_REGNUM),
1971 valbuf, TYPE_LENGTH (type));
1972 }
1973
1974 void
1975 ia64_pop_frame (void)
1976 {
1977 generic_pop_current_frame (ia64_pop_frame_regular);
1978 }
1979
1980 static void
1981 ia64_pop_frame_regular (struct frame_info *frame)
1982 {
1983 int regno;
1984 CORE_ADDR bsp, cfm, pfs;
1985
1986 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
1987
1988 for (regno = 0; regno < ia64_num_regs; regno++)
1989 {
1990 if (get_frame_saved_regs (frame)[regno]
1991 && (!(IA64_GR32_REGNUM <= regno && regno <= IA64_GR127_REGNUM))
1992 && regno != pc_regnum
1993 && regno != sp_regnum
1994 && regno != IA64_PFS_REGNUM
1995 && regno != IA64_CFM_REGNUM
1996 && regno != IA64_BSP_REGNUM
1997 && regno != IA64_BSPSTORE_REGNUM)
1998 {
1999 write_register (regno,
2000 read_memory_integer (get_frame_saved_regs (frame)[regno],
2001 REGISTER_RAW_SIZE (regno)));
2002 }
2003 }
2004
2005 write_register (sp_regnum, DEPRECATED_FRAME_CHAIN (frame));
2006 write_pc (DEPRECATED_FRAME_SAVED_PC (frame));
2007
2008 cfm = read_register (IA64_CFM_REGNUM);
2009
2010 if (get_frame_saved_regs (frame)[IA64_PFS_REGNUM])
2011 {
2012 pfs = read_memory_integer (get_frame_saved_regs (frame)[IA64_PFS_REGNUM],
2013 REGISTER_RAW_SIZE (IA64_PFS_REGNUM));
2014 }
2015 else
2016 pfs = read_register (IA64_PFS_REGNUM);
2017
2018 /* Compute the new bsp by *adding* the difference between the
2019 size of the frame and the size of the locals (both wrt the
2020 frame that we're going back to). This seems kind of strange,
2021 especially since it seems like we ought to be subtracting the
2022 size of the locals... and we should; but the Linux kernel
2023 wants bsp to be set at the end of all used registers. It's
2024 likely that this code will need to be revised to accomodate
2025 other operating systems. */
2026 bsp = rse_address_add (get_frame_extra_info (frame)->bsp,
2027 (pfs & 0x7f) - ((pfs >> 7) & 0x7f));
2028 write_register (IA64_BSP_REGNUM, bsp);
2029
2030 /* FIXME: What becomes of the epilog count in the PFS? */
2031 cfm = (cfm & ~0xffffffffffffLL) | (pfs & 0xffffffffffffLL);
2032 write_register (IA64_CFM_REGNUM, cfm);
2033
2034 flush_cached_frames ();
2035 }
2036
2037 static void
2038 ia64_remote_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes,
2039 CORE_ADDR *targ_addr, int *targ_len)
2040 {
2041 *targ_addr = memaddr;
2042 *targ_len = nr_bytes;
2043 }
2044
2045 static void
2046 process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj)
2047 {
2048 int *os_ident_ptr = obj;
2049 const char *name;
2050 unsigned int sectsize;
2051
2052 name = bfd_get_section_name (abfd, sect);
2053 sectsize = bfd_section_size (abfd, sect);
2054 if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0)
2055 {
2056 unsigned int name_length, data_length, note_type;
2057 char *note = alloca (sectsize);
2058
2059 bfd_get_section_contents (abfd, sect, note,
2060 (file_ptr) 0, (bfd_size_type) sectsize);
2061
2062 name_length = bfd_h_get_32 (abfd, note);
2063 data_length = bfd_h_get_32 (abfd, note + 4);
2064 note_type = bfd_h_get_32 (abfd, note + 8);
2065
2066 if (name_length == 4 && data_length == 16 && note_type == 1
2067 && strcmp (note + 12, "GNU") == 0)
2068 {
2069 int os_number = bfd_h_get_32 (abfd, note + 16);
2070
2071 /* The case numbers are from abi-tags in glibc */
2072 switch (os_number)
2073 {
2074 case 0 :
2075 *os_ident_ptr = ELFOSABI_LINUX;
2076 break;
2077 case 1 :
2078 *os_ident_ptr = ELFOSABI_HURD;
2079 break;
2080 case 2 :
2081 *os_ident_ptr = ELFOSABI_SOLARIS;
2082 break;
2083 default :
2084 internal_error (__FILE__, __LINE__,
2085 "process_note_abi_sections: unknown OS number %d", os_number);
2086 break;
2087 }
2088 }
2089 }
2090 }
2091
2092 static struct gdbarch *
2093 ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2094 {
2095 struct gdbarch *gdbarch;
2096 struct gdbarch_tdep *tdep;
2097 int os_ident;
2098
2099 if (info.abfd != NULL
2100 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
2101 {
2102 os_ident = elf_elfheader (info.abfd)->e_ident[EI_OSABI];
2103
2104 /* If os_ident is 0, it is not necessarily the case that we're
2105 on a SYSV system. (ELFOSABI_NONE is defined to be 0.)
2106 GNU/Linux uses a note section to record OS/ABI info, but
2107 leaves e_ident[EI_OSABI] zero. So we have to check for note
2108 sections too. */
2109 if (os_ident == 0)
2110 {
2111 bfd_map_over_sections (info.abfd,
2112 process_note_abi_tag_sections,
2113 &os_ident);
2114 }
2115 }
2116 else
2117 os_ident = -1;
2118
2119 for (arches = gdbarch_list_lookup_by_info (arches, &info);
2120 arches != NULL;
2121 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2122 {
2123 tdep = gdbarch_tdep (arches->gdbarch);
2124 if (tdep &&tdep->os_ident == os_ident)
2125 return arches->gdbarch;
2126 }
2127
2128 tdep = xmalloc (sizeof (struct gdbarch_tdep));
2129 gdbarch = gdbarch_alloc (&info, tdep);
2130 tdep->os_ident = os_ident;
2131
2132 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
2133 ready to unwind the PC first (see frame.c:get_prev_frame()). */
2134 set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
2135
2136 /* Set the method of obtaining the sigcontext addresses at which
2137 registers are saved. The method of checking to see if
2138 native_find_global_pointer is nonzero to indicate that we're
2139 on AIX is kind of hokey, but I can't think of a better way
2140 to do it. */
2141 if (os_ident == ELFOSABI_LINUX)
2142 tdep->sigcontext_register_address = ia64_linux_sigcontext_register_address;
2143 else if (native_find_global_pointer != 0)
2144 tdep->sigcontext_register_address = ia64_aix_sigcontext_register_address;
2145 else
2146 tdep->sigcontext_register_address = 0;
2147
2148 /* We know that GNU/Linux won't have to resort to the
2149 native_find_global_pointer hackery. But that's the only one we
2150 know about so far, so if native_find_global_pointer is set to
2151 something non-zero, then use it. Otherwise fall back to using
2152 generic_elf_find_global_pointer. This arrangement should (in
2153 theory) allow us to cross debug GNU/Linux binaries from an AIX
2154 machine. */
2155 if (os_ident == ELFOSABI_LINUX)
2156 tdep->find_global_pointer = generic_elf_find_global_pointer;
2157 else if (native_find_global_pointer != 0)
2158 tdep->find_global_pointer = native_find_global_pointer;
2159 else
2160 tdep->find_global_pointer = generic_elf_find_global_pointer;
2161
2162 set_gdbarch_short_bit (gdbarch, 16);
2163 set_gdbarch_int_bit (gdbarch, 32);
2164 set_gdbarch_long_bit (gdbarch, 64);
2165 set_gdbarch_long_long_bit (gdbarch, 64);
2166 set_gdbarch_float_bit (gdbarch, 32);
2167 set_gdbarch_double_bit (gdbarch, 64);
2168 set_gdbarch_long_double_bit (gdbarch, 64);
2169 set_gdbarch_ptr_bit (gdbarch, 64);
2170
2171 set_gdbarch_num_regs (gdbarch, ia64_num_regs);
2172 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
2173 set_gdbarch_fp_regnum (gdbarch, fp_regnum);
2174 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
2175 set_gdbarch_fp0_regnum (gdbarch, IA64_FR0_REGNUM);
2176
2177 set_gdbarch_register_name (gdbarch, ia64_register_name);
2178 set_gdbarch_register_size (gdbarch, 8);
2179 set_gdbarch_register_bytes (gdbarch, ia64_num_regs * 8 + 128*8);
2180 set_gdbarch_register_byte (gdbarch, ia64_register_byte);
2181 set_gdbarch_register_raw_size (gdbarch, ia64_register_raw_size);
2182 set_gdbarch_deprecated_max_register_raw_size (gdbarch, 16);
2183 set_gdbarch_register_virtual_size (gdbarch, ia64_register_virtual_size);
2184 set_gdbarch_deprecated_max_register_virtual_size (gdbarch, 16);
2185 set_gdbarch_register_virtual_type (gdbarch, ia64_register_virtual_type);
2186
2187 set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
2188
2189 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2190 set_gdbarch_frameless_function_invocation (gdbarch, ia64_frameless_function_invocation);
2191
2192 set_gdbarch_saved_pc_after_call (gdbarch, ia64_saved_pc_after_call);
2193
2194 set_gdbarch_deprecated_frame_chain (gdbarch, ia64_frame_chain);
2195 set_gdbarch_deprecated_frame_saved_pc (gdbarch, ia64_frame_saved_pc);
2196
2197 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, ia64_frame_init_saved_regs);
2198 set_gdbarch_deprecated_get_saved_register (gdbarch, ia64_get_saved_register);
2199
2200 set_gdbarch_register_convertible (gdbarch, ia64_register_convertible);
2201 set_gdbarch_register_convert_to_virtual (gdbarch, ia64_register_convert_to_virtual);
2202 set_gdbarch_register_convert_to_raw (gdbarch, ia64_register_convert_to_raw);
2203
2204 set_gdbarch_use_struct_convention (gdbarch, ia64_use_struct_convention);
2205 set_gdbarch_deprecated_extract_return_value (gdbarch, ia64_extract_return_value);
2206
2207 set_gdbarch_deprecated_store_struct_return (gdbarch, ia64_store_struct_return);
2208 set_gdbarch_deprecated_store_return_value (gdbarch, ia64_store_return_value);
2209 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, ia64_extract_struct_value_address);
2210
2211 set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
2212 set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
2213 set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
2214 set_gdbarch_read_pc (gdbarch, ia64_read_pc);
2215 set_gdbarch_write_pc (gdbarch, ia64_write_pc);
2216
2217 /* Settings for calling functions in the inferior. */
2218 set_gdbarch_call_dummy_length (gdbarch, 0);
2219 set_gdbarch_push_arguments (gdbarch, ia64_push_arguments);
2220 set_gdbarch_push_return_address (gdbarch, ia64_push_return_address);
2221 set_gdbarch_deprecated_pop_frame (gdbarch, ia64_pop_frame);
2222
2223 set_gdbarch_call_dummy_p (gdbarch, 1);
2224 set_gdbarch_call_dummy_words (gdbarch, ia64_call_dummy_words);
2225 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (ia64_call_dummy_words));
2226 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
2227 set_gdbarch_deprecated_init_extra_frame_info (gdbarch, ia64_init_extra_frame_info);
2228 set_gdbarch_frame_args_address (gdbarch, ia64_frame_args_address);
2229 set_gdbarch_frame_locals_address (gdbarch, ia64_frame_locals_address);
2230
2231 /* We won't necessarily have a frame pointer and even if we do,
2232 it winds up being extraordinarly messy when attempting to find
2233 the frame chain. So for the purposes of creating frames (which
2234 is all read_fp() is used for), simply use the stack pointer value
2235 instead. */
2236 set_gdbarch_read_fp (gdbarch, generic_target_read_sp);
2237
2238 /* Settings that should be unnecessary. */
2239 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2240
2241 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2242 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2243
2244 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2245 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2246 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
2247 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2248
2249 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2250 set_gdbarch_function_start_offset (gdbarch, 0);
2251 set_gdbarch_frame_args_skip (gdbarch, 0);
2252
2253 set_gdbarch_remote_translate_xfer_address (
2254 gdbarch, ia64_remote_translate_xfer_address);
2255
2256 return gdbarch;
2257 }
2258
2259 void
2260 _initialize_ia64_tdep (void)
2261 {
2262 register_gdbarch_init (bfd_arch_ia64, ia64_gdbarch_init);
2263
2264 tm_print_insn = print_insn_ia64;
2265 tm_print_insn_info.bytes_per_line = SLOT_MULTIPLIER;
2266 }