1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
24 #include "symfile.h" /* for entry_point_address */
26 #include "floatformat.h"
29 #include "elf/common.h" /* for DT_PLTGOT value */
32 typedef enum instruction_type
34 A
, /* Integer ALU ; I-unit or M-unit */
35 I
, /* Non-ALU integer; I-unit */
36 M
, /* Memory ; M-unit */
37 F
, /* Floating-point ; F-unit */
38 B
, /* Branch ; B-unit */
39 L
, /* Extended (L+X) ; I-unit */
40 X
, /* Extended (L+X) ; I-unit */
41 undefined
/* undefined or reserved */
44 /* We represent IA-64 PC addresses as the value of the instruction
45 pointer or'd with some bit combination in the low nibble which
46 represents the slot number in the bundle addressed by the
47 instruction pointer. The problem is that the Linux kernel
48 multiplies its slot numbers (for exceptions) by one while the
49 disassembler multiplies its slot numbers by 6. In addition, I've
50 heard it said that the simulator uses 1 as the multiplier.
52 I've fixed the disassembler so that the bytes_per_line field will
53 be the slot multiplier. If bytes_per_line comes in as zero, it
54 is set to six (which is how it was set up initially). -- objdump
55 displays pretty disassembly dumps with this value. For our purposes,
56 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
57 never want to also display the raw bytes the way objdump does. */
59 #define SLOT_MULTIPLIER 1
61 /* Length in bytes of an instruction bundle */
65 extern void _initialize_ia64_tdep (void);
67 extern CORE_ADDR
ia64_linux_sigcontext_register_address (CORE_ADDR
, int);
69 static gdbarch_init_ftype ia64_gdbarch_init
;
71 static gdbarch_register_name_ftype ia64_register_name
;
72 static gdbarch_register_raw_size_ftype ia64_register_raw_size
;
73 static gdbarch_register_virtual_size_ftype ia64_register_virtual_size
;
74 static gdbarch_register_virtual_type_ftype ia64_register_virtual_type
;
75 static gdbarch_register_byte_ftype ia64_register_byte
;
76 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc
;
77 static gdbarch_frame_chain_ftype ia64_frame_chain
;
78 static gdbarch_frame_saved_pc_ftype ia64_frame_saved_pc
;
79 static gdbarch_skip_prologue_ftype ia64_skip_prologue
;
80 static gdbarch_frame_init_saved_regs_ftype ia64_frame_init_saved_regs
;
81 static gdbarch_get_saved_register_ftype ia64_get_saved_register
;
82 static gdbarch_extract_return_value_ftype ia64_extract_return_value
;
83 static gdbarch_extract_struct_value_address_ftype ia64_extract_struct_value_address
;
84 static gdbarch_use_struct_convention_ftype ia64_use_struct_convention
;
85 static gdbarch_frameless_function_invocation_ftype ia64_frameless_function_invocation
;
86 static gdbarch_init_extra_frame_info_ftype ia64_init_extra_frame_info
;
87 static gdbarch_store_return_value_ftype ia64_store_return_value
;
88 static gdbarch_store_struct_return_ftype ia64_store_struct_return
;
89 static gdbarch_push_arguments_ftype ia64_push_arguments
;
90 static gdbarch_push_return_address_ftype ia64_push_return_address
;
91 static gdbarch_pop_frame_ftype ia64_pop_frame
;
92 static gdbarch_saved_pc_after_call_ftype ia64_saved_pc_after_call
;
93 static void ia64_pop_frame_regular (struct frame_info
*frame
);
94 static struct type
*is_float_or_hfa_type (struct type
*t
);
96 static int ia64_num_regs
= 590;
98 static int pc_regnum
= IA64_IP_REGNUM
;
99 static int sp_regnum
= IA64_GR12_REGNUM
;
100 static int fp_regnum
= IA64_VFP_REGNUM
;
101 static int lr_regnum
= IA64_VRAP_REGNUM
;
103 static LONGEST ia64_call_dummy_words
[] = {0};
105 /* Array of register names; There should be ia64_num_regs strings in
108 static char *ia64_register_names
[] =
109 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
110 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
111 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
112 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
113 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
114 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
115 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
116 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
117 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
118 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
119 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
120 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
121 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
122 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
123 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
124 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
126 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
127 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
128 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
129 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
130 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
131 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
132 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
133 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
134 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
135 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
136 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
137 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
138 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
139 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
140 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
141 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
143 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
144 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
145 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
146 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
147 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
148 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
149 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
150 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
152 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
156 "pr", "ip", "psr", "cfm",
158 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
159 "", "", "", "", "", "", "", "",
160 "rsc", "bsp", "bspstore", "rnat",
162 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
163 "ccv", "", "", "", "unat", "", "", "",
164 "fpsr", "", "", "", "itc",
165 "", "", "", "", "", "", "", "", "", "",
166 "", "", "", "", "", "", "", "", "",
168 "", "", "", "", "", "", "", "", "", "",
169 "", "", "", "", "", "", "", "", "", "",
170 "", "", "", "", "", "", "", "", "", "",
171 "", "", "", "", "", "", "", "", "", "",
172 "", "", "", "", "", "", "", "", "", "",
173 "", "", "", "", "", "", "", "", "", "",
175 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
176 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
177 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
178 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
179 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
180 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
181 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
182 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
183 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
184 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
185 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
186 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
187 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
188 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
189 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
190 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
193 struct frame_extra_info
195 CORE_ADDR bsp
; /* points at r32 for the current frame */
196 CORE_ADDR cfm
; /* cfm value for current frame */
197 int sof
; /* Size of frame (decoded from cfm value) */
198 int sol
; /* Size of locals (decoded from cfm value) */
199 CORE_ADDR after_prologue
;
200 /* Address of first instruction after the last
201 prologue instruction; Note that there may
202 be instructions from the function's body
203 intermingled with the prologue. */
204 int mem_stack_frame_size
;
205 /* Size of the memory stack frame (may be zero),
206 or -1 if it has not been determined yet. */
207 int fp_reg
; /* Register number (if any) used a frame pointer
208 for this frame. 0 if no register is being used
209 as the frame pointer. */
214 int os_ident
; /* From the ELF header, one of the ELFOSABI_
215 constants: ELFOSABI_LINUX, ELFOSABI_MONTEREY,
217 CORE_ADDR (*sigcontext_register_address
) (CORE_ADDR
, int);
218 /* OS specific function which, given a frame address
219 and register number, returns the offset to the
220 given register from the start of the frame. */
223 #define SIGCONTEXT_REGISTER_ADDRESS (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
226 ia64_register_name (int reg
)
228 return ia64_register_names
[reg
];
232 ia64_register_raw_size (int reg
)
234 return (IA64_FR0_REGNUM
<= reg
&& reg
<= IA64_FR127_REGNUM
) ? 16 : 8;
238 ia64_register_virtual_size (int reg
)
240 return (IA64_FR0_REGNUM
<= reg
&& reg
<= IA64_FR127_REGNUM
) ? 16 : 8;
243 /* Return true iff register N's virtual format is different from
246 ia64_register_convertible (int nr
)
248 return (IA64_FR0_REGNUM
<= nr
&& nr
<= IA64_FR127_REGNUM
);
251 const struct floatformat floatformat_ia64_ext
=
253 floatformat_little
, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
254 floatformat_intbit_yes
258 ia64_register_convert_to_virtual (int regnum
, struct type
*type
,
259 char *from
, char *to
)
261 if (regnum
>= IA64_FR0_REGNUM
&& regnum
<= IA64_FR127_REGNUM
)
264 floatformat_to_doublest (&floatformat_ia64_ext
, from
, &val
);
265 store_floating(to
, TYPE_LENGTH(type
), val
);
268 error("ia64_register_convert_to_virtual called with non floating point register number");
272 ia64_register_convert_to_raw (struct type
*type
, int regnum
,
273 char *from
, char *to
)
275 if (regnum
>= IA64_FR0_REGNUM
&& regnum
<= IA64_FR127_REGNUM
)
277 DOUBLEST val
= extract_floating (from
, TYPE_LENGTH(type
));
278 floatformat_from_doublest (&floatformat_ia64_ext
, &val
, to
);
281 error("ia64_register_convert_to_raw called with non floating point register number");
285 ia64_register_virtual_type (int reg
)
287 if (reg
>= IA64_FR0_REGNUM
&& reg
<= IA64_FR127_REGNUM
)
288 return builtin_type_long_double
;
290 return builtin_type_long
;
294 ia64_register_byte (int reg
)
297 (reg
<= IA64_FR0_REGNUM
? 0 : 8 * ((reg
> IA64_FR127_REGNUM
) ? 128 : reg
- IA64_FR0_REGNUM
));
300 /* Read the given register from a sigcontext structure in the
304 read_sigcontext_register (struct frame_info
*frame
, int regnum
)
309 internal_error ("read_sigcontext_register: NULL frame");
310 if (!frame
->signal_handler_caller
)
312 "read_sigcontext_register: frame not a signal_handler_caller");
313 if (SIGCONTEXT_REGISTER_ADDRESS
== 0)
315 "read_sigcontext_register: SIGCONTEXT_REGISTER_ADDRESS is 0");
317 regaddr
= SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, regnum
);
319 return read_memory_integer (regaddr
, REGISTER_RAW_SIZE (regnum
));
322 "read_sigcontext_register: Register %d not in struct sigcontext", regnum
);
325 /* Extract ``len'' bits from an instruction bundle starting at
329 extract_bit_field (char *bundle
, int from
, int len
)
331 long long result
= 0LL;
333 int from_byte
= from
/ 8;
334 int to_byte
= to
/ 8;
335 unsigned char *b
= (unsigned char *) bundle
;
341 if (from_byte
== to_byte
)
342 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
343 result
= c
>> (from
% 8);
344 lshift
= 8 - (from
% 8);
346 for (i
= from_byte
+1; i
< to_byte
; i
++)
348 result
|= ((long long) b
[i
]) << lshift
;
352 if (from_byte
< to_byte
&& (to
% 8 != 0))
355 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
356 result
|= ((long long) c
) << lshift
;
362 /* Replace the specified bits in an instruction bundle */
365 replace_bit_field (char *bundle
, long long val
, int from
, int len
)
368 int from_byte
= from
/ 8;
369 int to_byte
= to
/ 8;
370 unsigned char *b
= (unsigned char *) bundle
;
373 if (from_byte
== to_byte
)
375 unsigned char left
, right
;
377 left
= (c
>> (to
% 8)) << (to
% 8);
378 right
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
379 c
= (unsigned char) (val
& 0xff);
380 c
= (unsigned char) (c
<< (from
% 8 + 8 - to
% 8)) >> (8 - to
% 8);
388 c
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
389 c
= c
| (val
<< (from
% 8));
391 val
>>= 8 - from
% 8;
393 for (i
= from_byte
+1; i
< to_byte
; i
++)
402 unsigned char cv
= (unsigned char) val
;
404 c
= c
>> (to
% 8) << (to
% 8);
405 c
|= ((unsigned char) (cv
<< (8 - to
% 8))) >> (8 - to
% 8);
411 /* Return the contents of slot N (for N = 0, 1, or 2) in
412 and instruction bundle */
415 slotN_contents (unsigned char *bundle
, int slotnum
)
417 return extract_bit_field (bundle
, 5+41*slotnum
, 41);
420 /* Store an instruction in an instruction bundle */
423 replace_slotN_contents (unsigned char *bundle
, long long instr
, int slotnum
)
425 replace_bit_field (bundle
, instr
, 5+41*slotnum
, 41);
428 static enum instruction_type template_encoding_table
[32][3] =
430 { M
, I
, I
}, /* 00 */
431 { M
, I
, I
}, /* 01 */
432 { M
, I
, I
}, /* 02 */
433 { M
, I
, I
}, /* 03 */
434 { M
, L
, X
}, /* 04 */
435 { M
, L
, X
}, /* 05 */
436 { undefined
, undefined
, undefined
}, /* 06 */
437 { undefined
, undefined
, undefined
}, /* 07 */
438 { M
, M
, I
}, /* 08 */
439 { M
, M
, I
}, /* 09 */
440 { M
, M
, I
}, /* 0A */
441 { M
, M
, I
}, /* 0B */
442 { M
, F
, I
}, /* 0C */
443 { M
, F
, I
}, /* 0D */
444 { M
, M
, F
}, /* 0E */
445 { M
, M
, F
}, /* 0F */
446 { M
, I
, B
}, /* 10 */
447 { M
, I
, B
}, /* 11 */
448 { M
, B
, B
}, /* 12 */
449 { M
, B
, B
}, /* 13 */
450 { undefined
, undefined
, undefined
}, /* 14 */
451 { undefined
, undefined
, undefined
}, /* 15 */
452 { B
, B
, B
}, /* 16 */
453 { B
, B
, B
}, /* 17 */
454 { M
, M
, B
}, /* 18 */
455 { M
, M
, B
}, /* 19 */
456 { undefined
, undefined
, undefined
}, /* 1A */
457 { undefined
, undefined
, undefined
}, /* 1B */
458 { M
, F
, B
}, /* 1C */
459 { M
, F
, B
}, /* 1D */
460 { undefined
, undefined
, undefined
}, /* 1E */
461 { undefined
, undefined
, undefined
}, /* 1F */
464 /* Fetch and (partially) decode an instruction at ADDR and return the
465 address of the next instruction to fetch. */
468 fetch_instruction (CORE_ADDR addr
, instruction_type
*it
, long long *instr
)
470 char bundle
[BUNDLE_LEN
];
471 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
476 error("Can't fetch instructions for slot numbers greater than 2.");
480 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
485 *instr
= slotN_contents (bundle
, slotnum
);
486 template = extract_bit_field (bundle
, 0, 5);
487 *it
= template_encoding_table
[(int)template][slotnum
];
489 if (slotnum
== 2 || (slotnum
== 1 && *it
== L
))
492 addr
+= (slotnum
+ 1) * SLOT_MULTIPLIER
;
497 /* There are 5 different break instructions (break.i, break.b,
498 break.m, break.f, and break.x), but they all have the same
499 encoding. (The five bit template in the low five bits of the
500 instruction bundle distinguishes one from another.)
502 The runtime architecture manual specifies that break instructions
503 used for debugging purposes must have the upper two bits of the 21
504 bit immediate set to a 0 and a 1 respectively. A breakpoint
505 instruction encodes the most significant bit of its 21 bit
506 immediate at bit 36 of the 41 bit instruction. The penultimate msb
507 is at bit 25 which leads to the pattern below.
509 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
510 it turns out that 0x80000 was used as the syscall break in the early
511 simulators. So I changed the pattern slightly to do "break.i 0x080001"
512 instead. But that didn't work either (I later found out that this
513 pattern was used by the simulator that I was using.) So I ended up
514 using the pattern seen below. */
517 #define BREAKPOINT 0x00002000040LL
519 #define BREAKPOINT 0x00003333300LL
522 ia64_memory_insert_breakpoint (CORE_ADDR addr
, char *contents_cache
)
524 char bundle
[BUNDLE_LEN
];
525 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
530 error("Can't insert breakpoint for slot numbers greater than 2.");
534 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
535 instr
= slotN_contents (bundle
, slotnum
);
536 memcpy(contents_cache
, &instr
, sizeof(instr
));
537 replace_slotN_contents (bundle
, BREAKPOINT
, slotnum
);
539 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
545 ia64_memory_remove_breakpoint (CORE_ADDR addr
, char *contents_cache
)
547 char bundle
[BUNDLE_LEN
];
548 int slotnum
= (addr
& 0x0f) / SLOT_MULTIPLIER
;
554 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
555 memcpy (&instr
, contents_cache
, sizeof instr
);
556 replace_slotN_contents (bundle
, instr
, slotnum
);
558 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
563 /* We don't really want to use this, but remote.c needs to call it in order
564 to figure out if Z-packets are supported or not. Oh, well. */
566 ia64_breakpoint_from_pc (pcptr
, lenptr
)
570 static unsigned char breakpoint
[] =
571 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
572 *lenptr
= sizeof (breakpoint
);
580 ia64_read_pc (int pid
)
582 CORE_ADDR psr_value
= read_register_pid (IA64_PSR_REGNUM
, pid
);
583 CORE_ADDR pc_value
= read_register_pid (IA64_IP_REGNUM
, pid
);
584 int slot_num
= (psr_value
>> 41) & 3;
586 return pc_value
| (slot_num
* SLOT_MULTIPLIER
);
590 ia64_write_pc (CORE_ADDR new_pc
, int pid
)
592 int slot_num
= (int) (new_pc
& 0xf) / SLOT_MULTIPLIER
;
593 CORE_ADDR psr_value
= read_register_pid (IA64_PSR_REGNUM
, pid
);
594 psr_value
&= ~(3LL << 41);
595 psr_value
|= (CORE_ADDR
)(slot_num
& 0x3) << 41;
599 write_register_pid (IA64_PSR_REGNUM
, psr_value
, pid
);
600 write_register_pid (IA64_IP_REGNUM
, new_pc
, pid
);
603 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
605 /* Returns the address of the slot that's NSLOTS slots away from
606 the address ADDR. NSLOTS may be positive or negative. */
608 rse_address_add(CORE_ADDR addr
, int nslots
)
611 int mandatory_nat_slots
= nslots
/ 63;
612 int direction
= nslots
< 0 ? -1 : 1;
614 new_addr
= addr
+ 8 * (nslots
+ mandatory_nat_slots
);
616 if ((new_addr
>> 9) != ((addr
+ 8 * 64 * mandatory_nat_slots
) >> 9))
617 new_addr
+= 8 * direction
;
619 if (IS_NaT_COLLECTION_ADDR(new_addr
))
620 new_addr
+= 8 * direction
;
625 /* The IA-64 frame chain is a bit odd. We won't always have a frame
626 pointer, so we use the SP value as the FP for the purpose of
627 creating a frame. There is sometimes a register (not fixed) which
628 is used as a frame pointer. When this register exists, it is not
629 especially hard to determine which one is being used. It isn't
630 even really hard to compute the frame chain, but it can be
631 computationally expensive. So, instead of making life difficult
632 (and slow), we pick a more convenient representation of the frame
633 chain, knowing that we'll have to make some small adjustments
634 in other places. (E.g, note that read_fp() and write_fp() are
635 actually read_sp() and write_sp() below in ia64_gdbarch_init()
638 Okay, so what is the frame chain exactly? It'll be the SP value
639 at the time that the function in question was entered.
641 Note that this *should* actually the frame pointer for the current
642 function! But as I note above, if we were to attempt to find the
643 address of the beginning of the previous frame, we'd waste a lot
644 of cycles for no good reason. So instead, we simply choose to
645 represent the frame chain as the end of the previous frame instead
649 ia64_frame_chain (struct frame_info
*frame
)
651 if (frame
->signal_handler_caller
)
652 return read_sigcontext_register (frame
, sp_regnum
);
653 else if (PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
657 FRAME_INIT_SAVED_REGS (frame
);
658 if (frame
->saved_regs
[IA64_VFP_REGNUM
])
659 return read_memory_integer (frame
->saved_regs
[IA64_VFP_REGNUM
], 8);
661 return frame
->frame
+ frame
->extra_info
->mem_stack_frame_size
;
666 ia64_frame_saved_pc (struct frame_info
*frame
)
668 if (frame
->signal_handler_caller
)
669 return read_sigcontext_register (frame
, pc_regnum
);
670 else if (PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
671 return generic_read_register_dummy (frame
->pc
, frame
->frame
, pc_regnum
);
674 FRAME_INIT_SAVED_REGS (frame
);
676 if (frame
->saved_regs
[IA64_VRAP_REGNUM
])
677 return read_memory_integer (frame
->saved_regs
[IA64_VRAP_REGNUM
], 8);
678 else if (frame
->next
&& frame
->next
->signal_handler_caller
)
679 return read_sigcontext_register (frame
->next
, IA64_BR0_REGNUM
);
680 else /* either frameless, or not far enough along in the prologue... */
681 return ia64_saved_pc_after_call (frame
);
685 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
686 || (8 <= (_regnum_) && (_regnum_) <= 11) \
687 || (14 <= (_regnum_) && (_regnum_) <= 31))
688 #define imm9(_instr_) \
689 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
690 | (((_instr_) & 0x00008000000LL) >> 20) \
691 | (((_instr_) & 0x00000001fc0LL) >> 6))
694 examine_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct frame_info
*frame
)
697 CORE_ADDR last_prologue_pc
= pc
;
700 int do_fsr_stuff
= 0;
705 int unat_save_reg
= 0;
707 int mem_stack_frame_size
= 0;
709 CORE_ADDR spill_addr
= 0;
713 memset (instores
, 0, sizeof instores
);
714 memset (infpstores
, 0, sizeof infpstores
);
716 if (frame
&& !frame
->saved_regs
)
718 frame_saved_regs_zalloc (frame
);
724 && frame
->extra_info
->after_prologue
!= 0
725 && frame
->extra_info
->after_prologue
<= lim_pc
)
726 return frame
->extra_info
->after_prologue
;
728 /* Must start with an alloc instruction */
729 next_pc
= fetch_instruction (pc
, &it
, &instr
);
730 if (pc
< lim_pc
&& next_pc
731 && it
== M
&& ((instr
& 0x1ee0000003fLL
) == 0x02c00000000LL
))
734 int sor
= (int) ((instr
& 0x00078000000LL
) >> 27);
735 int sol
= (int) ((instr
& 0x00007f00000LL
) >> 20);
736 int sof
= (int) ((instr
& 0x000000fe000LL
) >> 13);
737 /* Okay, so sor, sol, and sof aren't used right now; but perhaps
738 we could compare against the size given to us via the cfm as
739 either a sanity check or possibly to see if the frame has been
740 changed by a later alloc instruction... */
741 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
743 last_prologue_pc
= next_pc
;
747 pc
= lim_pc
; /* We're done early */
749 /* Loop, looking for prologue instructions, keeping track of
750 where preserved registers were spilled. */
753 next_pc
= fetch_instruction (pc
, &it
, &instr
);
757 if (it
== B
|| ((instr
& 0x3fLL
) != 0LL))
759 /* Exit loop upon hitting a branch instruction or a predicated
763 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00188000000LL
))
766 int b2
= (int) ((instr
& 0x0000000e000LL
) >> 13);
767 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
768 int qp
= (int) (instr
& 0x0000000003f);
770 if (qp
== 0 && b2
== 0 && rN
>= 32 && ret_reg
== 0)
773 last_prologue_pc
= next_pc
;
776 else if ((it
== I
|| it
== M
)
777 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
779 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
780 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
781 | ((instr
& 0x001f8000000LL
) >> 20)
782 | ((instr
& 0x000000fe000LL
) >> 13));
783 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
784 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
785 int qp
= (int) (instr
& 0x0000000003fLL
);
787 if (qp
== 0 && rN
>= 32 && imm
== 0 && rM
== 12 && fp_reg
== 0)
791 last_prologue_pc
= next_pc
;
793 else if (qp
== 0 && rN
== 12 && rM
== 12)
795 /* adds r12, -mem_stack_frame_size, r12 */
796 mem_stack_frame_size
-= imm
;
797 last_prologue_pc
= next_pc
;
799 else if (qp
== 0 && rN
== 2
800 && ((rM
== fp_reg
&& fp_reg
!= 0) || rM
== 12))
802 /* adds r2, spilloffset, rFramePointer
804 adds r2, spilloffset, r12
806 Get ready for stf.spill or st8.spill instructions.
807 The address to start spilling at is loaded into r2.
808 FIXME: Why r2? That's what gcc currently uses; it
809 could well be different for other compilers. */
811 /* Hmm... whether or not this will work will depend on
812 where the pc is. If it's still early in the prologue
813 this'll be wrong. FIXME */
814 spill_addr
= (frame
? frame
->frame
: 0)
815 + (rM
== 12 ? 0 : mem_stack_frame_size
)
818 last_prologue_pc
= next_pc
;
822 && ( ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
823 || ((instr
& 0x1ffc8000000LL
) == 0x0cec0000000LL
) ))
825 /* stf.spill [rN] = fM, imm9
827 stf.spill [rN] = fM */
829 int imm
= imm9(instr
);
830 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
831 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
832 int qp
= (int) (instr
& 0x0000000003fLL
);
833 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
834 && ((2 <= fM
&& fM
<= 5) || (16 <= fM
&& fM
<= 31)))
837 frame
->saved_regs
[IA64_FR0_REGNUM
+ fM
] = spill_addr
;
839 if ((instr
& 0x1efc0000000) == 0x0eec0000000)
842 spill_addr
= 0; /* last one; must be done */
843 last_prologue_pc
= next_pc
;
846 else if ((it
== M
&& ((instr
& 0x1eff8000000LL
) == 0x02110000000LL
))
847 || (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00050000000LL
)) )
853 int arM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
854 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
855 int qp
= (int) (instr
& 0x0000000003fLL
);
856 if (qp
== 0 && isScratch (rN
) && arM
== 36 /* ar.unat */)
858 /* We have something like "mov.m r3 = ar.unat". Remember the
859 r3 (or whatever) and watch for a store of this register... */
861 last_prologue_pc
= next_pc
;
864 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00198000000LL
))
867 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
868 int qp
= (int) (instr
& 0x0000000003fLL
);
869 if (qp
== 0 && isScratch (rN
))
872 last_prologue_pc
= next_pc
;
876 && ( ((instr
& 0x1ffc8000000LL
) == 0x08cc0000000LL
)
877 || ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)))
881 st8 [rN] = rM, imm9 */
882 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
883 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
884 int qp
= (int) (instr
& 0x0000000003fLL
);
885 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
886 && (rM
== unat_save_reg
|| rM
== pr_save_reg
))
888 /* We've found a spill of either the UNAT register or the PR
889 register. (Well, not exactly; what we've actually found is
890 a spill of the register that UNAT or PR was moved to).
891 Record that fact and move on... */
892 if (rM
== unat_save_reg
)
894 /* Track UNAT register */
896 frame
->saved_regs
[IA64_UNAT_REGNUM
] = spill_addr
;
901 /* Track PR register */
903 frame
->saved_regs
[IA64_PR_REGNUM
] = spill_addr
;
906 if ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)
907 /* st8 [rN] = rM, imm9 */
908 spill_addr
+= imm9(instr
);
910 spill_addr
= 0; /* must be done spilling */
911 last_prologue_pc
= next_pc
;
913 else if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
915 /* Allow up to one store of each input register. */
917 last_prologue_pc
= next_pc
;
920 else if (it
== M
&& ((instr
& 0x1ff08000000LL
) == 0x08c00000000LL
))
927 Note that the st8 case is handled in the clause above.
929 Advance over stores of input registers. One store per input
930 register is permitted. */
931 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
932 int qp
= (int) (instr
& 0x0000000003fLL
);
933 if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
936 last_prologue_pc
= next_pc
;
939 else if (it
== M
&& ((instr
& 0x1ff88000000LL
) == 0x0cc80000000LL
))
946 Advance over stores of floating point input registers. Again
947 one store per register is permitted */
948 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
949 int qp
= (int) (instr
& 0x0000000003fLL
);
950 if (qp
== 0 && 8 <= fM
&& fM
< 16 && !infpstores
[fM
- 8])
952 infpstores
[fM
-8] = 1;
953 last_prologue_pc
= next_pc
;
957 && ( ((instr
& 0x1ffc8000000LL
) == 0x08ec0000000LL
)
958 || ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)))
960 /* st8.spill [rN] = rM
962 st8.spill [rN] = rM, imm9 */
963 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
964 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
965 int qp
= (int) (instr
& 0x0000000003fLL
);
966 if (qp
== 0 && rN
== spill_reg
&& 4 <= rM
&& rM
<= 7)
968 /* We've found a spill of one of the preserved general purpose
969 regs. Record the spill address and advance the spill
970 register if appropriate. */
972 frame
->saved_regs
[IA64_GR0_REGNUM
+ rM
] = spill_addr
;
973 if ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)
974 /* st8.spill [rN] = rM, imm9 */
975 spill_addr
+= imm9(instr
);
977 spill_addr
= 0; /* Done spilling */
978 last_prologue_pc
= next_pc
;
989 for (i
= 0, addr
= frame
->extra_info
->bsp
;
990 i
< frame
->extra_info
->sof
;
993 if (IS_NaT_COLLECTION_ADDR (addr
))
997 frame
->saved_regs
[IA64_GR32_REGNUM
+ i
] = addr
;
1000 frame
->saved_regs
[IA64_CFM_REGNUM
] = addr
;
1001 if (i
+32 == ret_reg
)
1002 frame
->saved_regs
[IA64_VRAP_REGNUM
] = addr
;
1004 frame
->saved_regs
[IA64_VFP_REGNUM
] = addr
;
1008 if (frame
&& frame
->extra_info
) {
1009 frame
->extra_info
->after_prologue
= last_prologue_pc
;
1010 frame
->extra_info
->mem_stack_frame_size
= mem_stack_frame_size
;
1011 frame
->extra_info
->fp_reg
= fp_reg
;
1014 return last_prologue_pc
;
1018 ia64_skip_prologue (CORE_ADDR pc
)
1020 return examine_prologue (pc
, pc
+1024, 0);
1024 ia64_frame_init_saved_regs (struct frame_info
*frame
)
1026 if (frame
->saved_regs
)
1029 if (frame
->signal_handler_caller
&& SIGCONTEXT_REGISTER_ADDRESS
)
1033 frame_saved_regs_zalloc (frame
);
1035 frame
->saved_regs
[IA64_VRAP_REGNUM
] =
1036 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_IP_REGNUM
);
1037 frame
->saved_regs
[IA64_CFM_REGNUM
] =
1038 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_CFM_REGNUM
);
1039 frame
->saved_regs
[IA64_PSR_REGNUM
] =
1040 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_PSR_REGNUM
);
1042 frame
->saved_regs
[IA64_BSP_REGNUM
] =
1043 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_BSP_REGNUM
);
1045 frame
->saved_regs
[IA64_RNAT_REGNUM
] =
1046 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_RNAT_REGNUM
);
1047 frame
->saved_regs
[IA64_CCV_REGNUM
] =
1048 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_CCV_REGNUM
);
1049 frame
->saved_regs
[IA64_UNAT_REGNUM
] =
1050 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_UNAT_REGNUM
);
1051 frame
->saved_regs
[IA64_FPSR_REGNUM
] =
1052 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_FPSR_REGNUM
);
1053 frame
->saved_regs
[IA64_PFS_REGNUM
] =
1054 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_PFS_REGNUM
);
1055 frame
->saved_regs
[IA64_LC_REGNUM
] =
1056 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_LC_REGNUM
);
1057 for (regno
= IA64_GR1_REGNUM
; regno
<= IA64_GR31_REGNUM
; regno
++)
1058 if (regno
!= sp_regnum
)
1059 frame
->saved_regs
[regno
] =
1060 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, regno
);
1061 for (regno
= IA64_BR0_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
1062 frame
->saved_regs
[regno
] =
1063 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, regno
);
1064 for (regno
= IA64_FR2_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
1065 frame
->saved_regs
[regno
] =
1066 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, regno
);
1070 CORE_ADDR func_start
;
1072 func_start
= get_pc_function_start (frame
->pc
);
1073 examine_prologue (func_start
, frame
->pc
, frame
);
1078 ia64_get_saved_register (char *raw_buffer
,
1081 struct frame_info
*frame
,
1083 enum lval_type
*lval
)
1087 if (!target_has_registers
)
1088 error ("No registers.");
1090 if (optimized
!= NULL
)
1099 is_dummy_frame
= PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
);
1101 if (regnum
== SP_REGNUM
&& frame
->next
)
1103 /* Handle SP values for all frames but the topmost. */
1104 store_address (raw_buffer
, REGISTER_RAW_SIZE (regnum
), frame
->frame
);
1106 else if (regnum
== IA64_BSP_REGNUM
)
1108 store_address (raw_buffer
, REGISTER_RAW_SIZE (regnum
),
1109 frame
->extra_info
->bsp
);
1111 else if (regnum
== IA64_VFP_REGNUM
)
1113 /* If the function in question uses an automatic register (r32-r127)
1114 for the frame pointer, it'll be found by ia64_find_saved_register()
1115 above. If the function lacks one of these frame pointers, we can
1116 still provide a value since we know the size of the frame */
1117 CORE_ADDR vfp
= frame
->frame
+ frame
->extra_info
->mem_stack_frame_size
;
1118 store_address (raw_buffer
, REGISTER_RAW_SIZE (IA64_VFP_REGNUM
), vfp
);
1120 else if (IA64_PR0_REGNUM
<= regnum
&& regnum
<= IA64_PR63_REGNUM
)
1122 char pr_raw_buffer
[MAX_REGISTER_RAW_SIZE
];
1124 enum lval_type pr_lval
;
1127 ia64_get_saved_register (pr_raw_buffer
, &pr_optim
, &pr_addr
,
1128 frame
, IA64_PR_REGNUM
, &pr_lval
);
1129 prN_val
= extract_bit_field ((unsigned char *) pr_raw_buffer
,
1130 regnum
- IA64_PR0_REGNUM
, 1);
1131 store_unsigned_integer (raw_buffer
, REGISTER_RAW_SIZE (regnum
), prN_val
);
1133 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1135 char unat_raw_buffer
[MAX_REGISTER_RAW_SIZE
];
1137 enum lval_type unat_lval
;
1138 CORE_ADDR unat_addr
;
1140 ia64_get_saved_register (unat_raw_buffer
, &unat_optim
, &unat_addr
,
1141 frame
, IA64_UNAT_REGNUM
, &unat_lval
);
1142 unatN_val
= extract_bit_field ((unsigned char *) unat_raw_buffer
,
1143 regnum
- IA64_NAT0_REGNUM
, 1);
1144 store_unsigned_integer (raw_buffer
, REGISTER_RAW_SIZE (regnum
),
1147 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1150 /* Find address of general register corresponding to nat bit we're
1152 CORE_ADDR gr_addr
= 0;
1154 if (!is_dummy_frame
)
1156 FRAME_INIT_SAVED_REGS (frame
);
1157 gr_addr
= frame
->saved_regs
[ regnum
- IA64_NAT0_REGNUM
1162 /* Compute address of nat collection bits */
1163 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1164 CORE_ADDR bsp
= read_register (IA64_BSP_REGNUM
);
1165 CORE_ADDR nat_collection
;
1167 /* If our nat collection address is bigger than bsp, we have to get
1168 the nat collection from rnat. Otherwise, we fetch the nat
1169 collection from the computed address. */
1170 if (nat_addr
>= bsp
)
1171 nat_collection
= read_register (IA64_RNAT_REGNUM
);
1173 nat_collection
= read_memory_integer (nat_addr
, 8);
1174 nat_bit
= (gr_addr
>> 3) & 0x3f;
1175 natval
= (nat_collection
>> nat_bit
) & 1;
1177 store_unsigned_integer (raw_buffer
, REGISTER_RAW_SIZE (regnum
), natval
);
1179 else if (regnum
== IA64_IP_REGNUM
)
1184 /* FIXME: Set *addrp, *lval when possible. */
1185 pc
= ia64_frame_saved_pc (frame
->next
);
1191 store_address (raw_buffer
, REGISTER_RAW_SIZE (IA64_IP_REGNUM
), pc
);
1193 else if (IA64_GR32_REGNUM
<= regnum
&& regnum
<= IA64_GR127_REGNUM
)
1196 if (!is_dummy_frame
)
1198 FRAME_INIT_SAVED_REGS (frame
);
1199 addr
= frame
->saved_regs
[regnum
];
1205 *lval
= lval_memory
;
1208 read_memory (addr
, raw_buffer
, REGISTER_RAW_SIZE (regnum
));
1212 /* r32 - r127 must be fetchable via memory. If they aren't,
1213 then the register is unavailable */
1214 memset (raw_buffer
, 0, REGISTER_RAW_SIZE (regnum
));
1219 generic_get_saved_register (raw_buffer
, optimized
, addrp
, frame
,
1224 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
1225 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
1226 and TYPE is the type (which is known to be struct, union or array). */
1228 ia64_use_struct_convention (int gcc_p
, struct type
*type
)
1230 struct type
*float_elt_type
;
1232 /* HFAs are structures (or arrays) consisting entirely of floating
1233 point values of the same length. Up to 8 of these are returned
1234 in registers. Don't use the struct convention when this is the
1236 float_elt_type
= is_float_or_hfa_type (type
);
1237 if (float_elt_type
!= NULL
1238 && TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
) <= 8)
1241 /* Other structs of length 32 or less are returned in r8-r11.
1242 Don't use the struct convention for those either. */
1243 return TYPE_LENGTH (type
) > 32;
1247 ia64_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
1249 struct type
*float_elt_type
;
1251 float_elt_type
= is_float_or_hfa_type (type
);
1252 if (float_elt_type
!= NULL
)
1255 int regnum
= IA64_FR8_REGNUM
;
1256 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
1260 ia64_register_convert_to_virtual (regnum
, float_elt_type
,
1261 ®buf
[REGISTER_BYTE (regnum
)], valbuf
+ offset
);
1262 offset
+= TYPE_LENGTH (float_elt_type
);
1267 memcpy (valbuf
, ®buf
[REGISTER_BYTE (IA64_GR8_REGNUM
)],
1268 TYPE_LENGTH (type
));
1271 /* FIXME: Turn this into a stack of some sort. Unfortunately, something
1272 like this is necessary though since the IA-64 calling conventions specify
1273 that r8 is not preserved. */
1274 static CORE_ADDR struct_return_address
;
1277 ia64_extract_struct_value_address (char *regbuf
)
1279 /* FIXME: See above. */
1280 return struct_return_address
;
1284 ia64_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
1286 /* FIXME: See above. */
1287 /* Note that most of the work was done in ia64_push_arguments() */
1288 struct_return_address
= addr
;
1292 ia64_frameless_function_invocation (struct frame_info
*frame
)
1294 /* FIXME: Implement */
1299 ia64_saved_pc_after_call (struct frame_info
*frame
)
1301 return read_register (IA64_BR0_REGNUM
);
1305 ia64_frame_args_address (struct frame_info
*frame
)
1307 /* frame->frame points at the SP for this frame; But we want the start
1308 of the frame, not the end. Calling frame chain will get his for us. */
1309 return ia64_frame_chain (frame
);
1313 ia64_frame_locals_address (struct frame_info
*frame
)
1315 /* frame->frame points at the SP for this frame; But we want the start
1316 of the frame, not the end. Calling frame chain will get his for us. */
1317 return ia64_frame_chain (frame
);
1321 ia64_init_extra_frame_info (int fromleaf
, struct frame_info
*frame
)
1324 int next_frame_is_call_dummy
= ((frame
->next
!= NULL
)
1325 && PC_IN_CALL_DUMMY (frame
->next
->pc
, frame
->next
->frame
,
1326 frame
->next
->frame
));
1328 frame
->extra_info
= (struct frame_extra_info
*)
1329 frame_obstack_alloc (sizeof (struct frame_extra_info
));
1331 if (frame
->next
== 0)
1333 bsp
= read_register (IA64_BSP_REGNUM
);
1334 cfm
= read_register (IA64_CFM_REGNUM
);
1337 else if (frame
->next
->signal_handler_caller
)
1339 bsp
= read_sigcontext_register (frame
->next
, IA64_BSP_REGNUM
);
1340 cfm
= read_sigcontext_register (frame
->next
, IA64_CFM_REGNUM
);
1342 else if (next_frame_is_call_dummy
)
1344 bsp
= generic_read_register_dummy (frame
->next
->pc
, frame
->next
->frame
,
1346 cfm
= generic_read_register_dummy (frame
->next
->pc
, frame
->next
->frame
,
1351 struct frame_info
*frn
= frame
->next
;
1353 FRAME_INIT_SAVED_REGS (frn
);
1355 if (frn
->saved_regs
[IA64_CFM_REGNUM
] != 0)
1356 cfm
= read_memory_integer (frn
->saved_regs
[IA64_CFM_REGNUM
], 8);
1357 else if (frn
->next
&& frn
->next
->signal_handler_caller
)
1358 cfm
= read_sigcontext_register (frn
->next
, IA64_PFS_REGNUM
);
1360 && PC_IN_CALL_DUMMY (frn
->next
->pc
, frn
->next
->frame
,
1362 cfm
= generic_read_register_dummy (frn
->next
->pc
, frn
->next
->frame
,
1365 cfm
= read_register (IA64_PFS_REGNUM
);
1367 bsp
= frn
->extra_info
->bsp
;
1369 frame
->extra_info
->cfm
= cfm
;
1370 frame
->extra_info
->sof
= cfm
& 0x7f;
1371 frame
->extra_info
->sol
= (cfm
>> 7) & 0x7f;
1372 if (frame
->next
== 0
1373 || frame
->next
->signal_handler_caller
1374 || next_frame_is_call_dummy
)
1375 frame
->extra_info
->bsp
= rse_address_add (bsp
, -frame
->extra_info
->sof
);
1377 frame
->extra_info
->bsp
= rse_address_add (bsp
, -frame
->extra_info
->sol
);
1379 frame
->extra_info
->after_prologue
= 0;
1380 frame
->extra_info
->mem_stack_frame_size
= -1; /* Not yet determined */
1381 frame
->extra_info
->fp_reg
= 0;
1385 is_float_or_hfa_type_recurse (struct type
*t
, struct type
**etp
)
1387 switch (TYPE_CODE (t
))
1391 return TYPE_LENGTH (*etp
) == TYPE_LENGTH (t
);
1398 case TYPE_CODE_ARRAY
:
1399 return is_float_or_hfa_type_recurse (TYPE_TARGET_TYPE (t
), etp
);
1401 case TYPE_CODE_STRUCT
:
1405 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
1406 if (!is_float_or_hfa_type_recurse (TYPE_FIELD_TYPE (t
, i
), etp
))
1417 /* Determine if the given type is one of the floating point types or
1418 and HFA (which is a struct, array, or combination thereof whose
1419 bottom-most elements are all of the same floating point type.) */
1421 static struct type
*
1422 is_float_or_hfa_type (struct type
*t
)
1424 struct type
*et
= 0;
1426 return is_float_or_hfa_type_recurse (t
, &et
) ? et
: 0;
1430 /* Attempt to find (and return) the global pointer for the given
1433 This is a rather nasty bit of code searchs for the .dynamic section
1434 in the objfile corresponding to the pc of the function we're trying
1435 to call. Once it finds the addresses at which the .dynamic section
1436 lives in the child process, it scans the Elf64_Dyn entries for a
1437 DT_PLTGOT tag. If it finds one of these, the corresponding
1438 d_un.d_ptr value is the global pointer. */
1441 find_global_pointer (CORE_ADDR faddr
)
1443 struct obj_section
*faddr_sect
;
1445 faddr_sect
= find_pc_section (faddr
);
1446 if (faddr_sect
!= NULL
)
1448 struct obj_section
*osect
;
1450 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
1452 if (strcmp (osect
->the_bfd_section
->name
, ".dynamic") == 0)
1456 if (osect
< faddr_sect
->objfile
->sections_end
)
1461 while (addr
< osect
->endaddr
)
1467 status
= target_read_memory (addr
, buf
, sizeof (buf
));
1470 tag
= extract_signed_integer (buf
, sizeof (buf
));
1472 if (tag
== DT_PLTGOT
)
1474 CORE_ADDR global_pointer
;
1476 status
= target_read_memory (addr
+ 8, buf
, sizeof (buf
));
1479 global_pointer
= extract_address (buf
, sizeof (buf
));
1482 return global_pointer
;
1495 /* Given a function's address, attempt to find (and return) the
1496 corresponding (canonical) function descriptor. Return 0 if
1499 find_extant_func_descr (CORE_ADDR faddr
)
1501 struct obj_section
*faddr_sect
;
1503 /* Return early if faddr is already a function descriptor */
1504 faddr_sect
= find_pc_section (faddr
);
1505 if (faddr_sect
&& strcmp (faddr_sect
->the_bfd_section
->name
, ".opd") == 0)
1508 if (faddr_sect
!= NULL
)
1510 struct obj_section
*osect
;
1511 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
1513 if (strcmp (osect
->the_bfd_section
->name
, ".opd") == 0)
1517 if (osect
< faddr_sect
->objfile
->sections_end
)
1522 while (addr
< osect
->endaddr
)
1528 status
= target_read_memory (addr
, buf
, sizeof (buf
));
1531 faddr2
= extract_signed_integer (buf
, sizeof (buf
));
1533 if (faddr
== faddr2
)
1543 /* Attempt to find a function descriptor corresponding to the
1544 given address. If none is found, construct one on the
1545 stack using the address at fdaptr */
1548 find_func_descr (CORE_ADDR faddr
, CORE_ADDR
*fdaptr
)
1552 fdesc
= find_extant_func_descr (faddr
);
1556 CORE_ADDR global_pointer
;
1562 global_pointer
= find_global_pointer (faddr
);
1564 if (global_pointer
== 0)
1565 global_pointer
= read_register (IA64_GR1_REGNUM
);
1567 store_address (buf
, 8, faddr
);
1568 store_address (buf
+ 8, 8, global_pointer
);
1570 write_memory (fdesc
, buf
, 16);
1577 ia64_push_arguments (int nargs
, value_ptr
*args
, CORE_ADDR sp
,
1578 int struct_return
, CORE_ADDR struct_addr
)
1584 int nslots
, rseslots
, memslots
, slotnum
, nfuncargs
;
1586 CORE_ADDR bsp
, cfm
, pfs
, new_bsp
, funcdescaddr
;
1590 /* Count the number of slots needed for the arguments */
1591 for (argno
= 0; argno
< nargs
; argno
++)
1594 type
= check_typedef (VALUE_TYPE (arg
));
1595 len
= TYPE_LENGTH (type
);
1597 /* FIXME: This is crude and it is wrong (IMO), but it matches
1598 what gcc does, I think. */
1599 if (len
> 8 && (nslots
& 1))
1602 if (TYPE_CODE (type
) == TYPE_CODE_FUNC
)
1605 nslots
+= (len
+ 7) / 8;
1608 /* Divvy up the slots between the RSE and the memory stack */
1609 rseslots
= (nslots
> 8) ? 8 : nslots
;
1610 memslots
= nslots
- rseslots
;
1612 /* Allocate a new RSE frame */
1613 cfm
= read_register (IA64_CFM_REGNUM
);
1615 bsp
= read_register (IA64_BSP_REGNUM
);
1616 bsp
= rse_address_add (bsp
, cfm
& 0x7f);
1617 new_bsp
= rse_address_add (bsp
, rseslots
);
1618 write_register (IA64_BSP_REGNUM
, new_bsp
);
1620 pfs
= read_register (IA64_PFS_REGNUM
);
1621 pfs
&= 0xc000000000000000LL
;
1622 pfs
|= (cfm
& 0xffffffffffffLL
);
1623 write_register (IA64_PFS_REGNUM
, pfs
);
1625 cfm
&= 0xc000000000000000LL
;
1627 write_register (IA64_CFM_REGNUM
, cfm
);
1629 /* We will attempt to find function descriptors in the .opd segment,
1630 but if we can't we'll construct them ourselves. That being the
1631 case, we'll need to reserve space on the stack for them. */
1632 funcdescaddr
= sp
- nfuncargs
* 16;
1633 funcdescaddr
&= ~0xfLL
;
1635 /* Adjust the stack pointer to it's new value. The calling conventions
1636 require us to have 16 bytes of scratch, plus whatever space is
1637 necessary for the memory slots and our function descriptors */
1638 sp
= sp
- 16 - (memslots
+ nfuncargs
) * 8;
1639 sp
&= ~0xfLL
; /* Maintain 16 byte alignment */
1641 /* Place the arguments where they belong. The arguments will be
1642 either placed in the RSE backing store or on the memory stack.
1643 In addition, floating point arguments or HFAs are placed in
1644 floating point registers. */
1646 floatreg
= IA64_FR8_REGNUM
;
1647 for (argno
= 0; argno
< nargs
; argno
++)
1649 struct type
*float_elt_type
;
1652 type
= check_typedef (VALUE_TYPE (arg
));
1653 len
= TYPE_LENGTH (type
);
1655 /* Special handling for function parameters */
1657 && TYPE_CODE (type
) == TYPE_CODE_PTR
1658 && TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
)
1662 store_address (val_buf
, 8,
1663 find_func_descr (extract_address (VALUE_CONTENTS (arg
), 8),
1665 if (slotnum
< rseslots
)
1666 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
1668 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
1674 if (len
> 8 && (slotnum
& 1))
1681 memset (val_buf
, 0, 8);
1682 memcpy (val_buf
, VALUE_CONTENTS (arg
) + argoffset
, (len
> 8) ? 8 : len
);
1684 if (slotnum
< rseslots
)
1685 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
1687 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
1694 /* Handle floating point types (including HFAs) */
1695 float_elt_type
= is_float_or_hfa_type (type
);
1696 if (float_elt_type
!= NULL
)
1699 len
= TYPE_LENGTH (type
);
1700 while (len
> 0 && floatreg
< IA64_FR16_REGNUM
)
1702 ia64_register_convert_to_raw (
1705 VALUE_CONTENTS (arg
) + argoffset
,
1706 ®isters
[REGISTER_BYTE (floatreg
)]);
1708 argoffset
+= TYPE_LENGTH (float_elt_type
);
1709 len
-= TYPE_LENGTH (float_elt_type
);
1714 /* Store the struct return value in r8 if necessary. */
1717 store_address (®isters
[REGISTER_BYTE (IA64_GR8_REGNUM
)],
1718 REGISTER_RAW_SIZE (IA64_GR8_REGNUM
),
1722 /* Sync gdb's idea of what the registers are with the target. */
1723 target_store_registers (-1);
1725 /* FIXME: This doesn't belong here! Instead, SAVE_DUMMY_FRAME_TOS needs
1726 to be defined to call generic_save_dummy_frame_tos(). But at the
1727 time of this writing, SAVE_DUMMY_FRAME_TOS wasn't gdbarch'd, so
1728 I chose to put this call here instead of using the old mechanisms.
1729 Once SAVE_DUMMY_FRAME_TOS is gdbarch'd, all we need to do is add the
1732 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1734 to ia64_gdbarch_init() and remove the line below. */
1735 generic_save_dummy_frame_tos (sp
);
1741 ia64_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1743 CORE_ADDR global_pointer
= find_global_pointer (pc
);
1745 if (global_pointer
!= 0)
1746 write_register (IA64_GR1_REGNUM
, global_pointer
);
1748 write_register (IA64_BR0_REGNUM
, CALL_DUMMY_ADDRESS ());
1753 ia64_store_return_value (struct type
*type
, char *valbuf
)
1755 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1757 ia64_register_convert_to_raw (type
, IA64_FR8_REGNUM
, valbuf
,
1758 ®isters
[REGISTER_BYTE (IA64_FR8_REGNUM
)]);
1759 target_store_registers (IA64_FR8_REGNUM
);
1762 write_register_bytes (REGISTER_BYTE (IA64_GR8_REGNUM
),
1763 valbuf
, TYPE_LENGTH (type
));
1767 ia64_pop_frame (void)
1769 generic_pop_current_frame (ia64_pop_frame_regular
);
1773 ia64_pop_frame_regular (struct frame_info
*frame
)
1776 CORE_ADDR bsp
, cfm
, pfs
;
1778 FRAME_INIT_SAVED_REGS (frame
);
1780 for (regno
= 0; regno
< ia64_num_regs
; regno
++)
1782 if (frame
->saved_regs
[regno
]
1783 && (!(IA64_GR32_REGNUM
<= regno
&& regno
<= IA64_GR127_REGNUM
))
1784 && regno
!= pc_regnum
1785 && regno
!= sp_regnum
1786 && regno
!= IA64_PFS_REGNUM
1787 && regno
!= IA64_CFM_REGNUM
1788 && regno
!= IA64_BSP_REGNUM
1789 && regno
!= IA64_BSPSTORE_REGNUM
)
1791 write_register (regno
,
1792 read_memory_integer (frame
->saved_regs
[regno
],
1793 REGISTER_RAW_SIZE (regno
)));
1797 write_register (sp_regnum
, FRAME_CHAIN (frame
));
1798 write_pc (FRAME_SAVED_PC (frame
));
1800 cfm
= read_register (IA64_CFM_REGNUM
);
1802 if (frame
->saved_regs
[IA64_PFS_REGNUM
])
1804 pfs
= read_memory_integer (frame
->saved_regs
[IA64_PFS_REGNUM
],
1805 REGISTER_RAW_SIZE (IA64_PFS_REGNUM
));
1808 pfs
= read_register (IA64_PFS_REGNUM
);
1810 /* Compute the new bsp by *adding* the difference between the
1811 size of the frame and the size of the locals (both wrt the
1812 frame that we're going back to). This seems kind of strange,
1813 especially since it seems like we ought to be subtracting the
1814 size of the locals... and we should; but the linux kernel
1815 wants bsp to be set at the end of all used registers. It's
1816 likely that this code will need to be revised to accomodate
1817 other operating systems. */
1818 bsp
= rse_address_add (frame
->extra_info
->bsp
,
1819 (pfs
& 0x7f) - ((pfs
>> 7) & 0x7f));
1820 write_register (IA64_BSP_REGNUM
, bsp
);
1822 /* FIXME: What becomes of the epilog count in the PFS? */
1823 cfm
= (cfm
& ~0xffffffffffffLL
) | (pfs
& 0xffffffffffffLL
);
1824 write_register (IA64_CFM_REGNUM
, cfm
);
1826 flush_cached_frames ();
1830 ia64_remote_translate_xfer_address (CORE_ADDR memaddr
, int nr_bytes
,
1831 CORE_ADDR
*targ_addr
, int *targ_len
)
1833 *targ_addr
= memaddr
;
1834 *targ_len
= nr_bytes
;
1838 process_note_abi_tag_sections (bfd
*abfd
, asection
*sect
, void *obj
)
1840 int *os_ident_ptr
= obj
;
1842 unsigned int sectsize
;
1844 name
= bfd_get_section_name (abfd
, sect
);
1845 sectsize
= bfd_section_size (abfd
, sect
);
1846 if (strcmp (name
, ".note.ABI-tag") == 0 && sectsize
> 0)
1848 unsigned int name_length
, data_length
, note_type
;
1849 char *note
= alloca (sectsize
);
1851 bfd_get_section_contents (abfd
, sect
, note
,
1852 (file_ptr
) 0, (bfd_size_type
) sectsize
);
1854 name_length
= bfd_h_get_32 (abfd
, note
);
1855 data_length
= bfd_h_get_32 (abfd
, note
+ 4);
1856 note_type
= bfd_h_get_32 (abfd
, note
+ 8);
1858 if (name_length
== 4 && data_length
== 16 && note_type
== 1
1859 && strcmp (note
+ 12, "GNU") == 0)
1861 int os_number
= bfd_h_get_32 (abfd
, note
+ 16);
1863 /* The case numbers are from abi-tags in glibc */
1867 *os_ident_ptr
= ELFOSABI_LINUX
;
1869 #if 0 /* FIXME: Enable after internal repository is synced with sourceware */
1871 *os_ident_ptr
= ELFOSABI_HURD
;
1874 *os_ident_ptr
= ELFOSABI_SOLARIS
;
1879 "process_note_abi_sections: unknown OS number %d", os_number
);
1886 static struct gdbarch
*
1887 ia64_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1889 struct gdbarch
*gdbarch
;
1890 struct gdbarch_tdep
*tdep
;
1893 if (info
.abfd
!= NULL
1894 && bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
)
1896 os_ident
= elf_elfheader (info
.abfd
)->e_ident
[EI_OSABI
];
1898 /* If os_ident is 0, it is not necessarily the case that we're on a
1899 SYSV system. (ELFOSABI_SYSV is defined to be 0.) GNU/Linux uses
1900 a note section to record OS/ABI info, but leaves e_ident[EI_OSABI]
1901 zero. So we have to check for note sections too. */
1904 bfd_map_over_sections (info
.abfd
,
1905 process_note_abi_tag_sections
,
1912 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1914 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
1916 if (gdbarch_tdep (current_gdbarch
)->os_ident
!= os_ident
)
1918 return arches
->gdbarch
;
1921 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
1922 gdbarch
= gdbarch_alloc (&info
, tdep
);
1923 tdep
->os_ident
= os_ident
;
1925 if (os_ident
== ELFOSABI_LINUX
)
1926 tdep
->sigcontext_register_address
= ia64_linux_sigcontext_register_address
;
1928 tdep
->sigcontext_register_address
= 0;
1930 set_gdbarch_short_bit (gdbarch
, 16);
1931 set_gdbarch_int_bit (gdbarch
, 32);
1932 set_gdbarch_long_bit (gdbarch
, 64);
1933 set_gdbarch_long_long_bit (gdbarch
, 64);
1934 set_gdbarch_float_bit (gdbarch
, 32);
1935 set_gdbarch_double_bit (gdbarch
, 64);
1936 set_gdbarch_long_double_bit (gdbarch
, 64);
1937 set_gdbarch_ptr_bit (gdbarch
, 64);
1939 set_gdbarch_num_regs (gdbarch
, ia64_num_regs
);
1940 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
1941 set_gdbarch_fp_regnum (gdbarch
, fp_regnum
);
1942 set_gdbarch_pc_regnum (gdbarch
, pc_regnum
);
1944 set_gdbarch_register_name (gdbarch
, ia64_register_name
);
1945 set_gdbarch_register_size (gdbarch
, 8);
1946 set_gdbarch_register_bytes (gdbarch
, ia64_num_regs
* 8 + 128*8);
1947 set_gdbarch_register_byte (gdbarch
, ia64_register_byte
);
1948 set_gdbarch_register_raw_size (gdbarch
, ia64_register_raw_size
);
1949 set_gdbarch_max_register_raw_size (gdbarch
, 16);
1950 set_gdbarch_register_virtual_size (gdbarch
, ia64_register_virtual_size
);
1951 set_gdbarch_max_register_virtual_size (gdbarch
, 16);
1952 set_gdbarch_register_virtual_type (gdbarch
, ia64_register_virtual_type
);
1954 set_gdbarch_skip_prologue (gdbarch
, ia64_skip_prologue
);
1956 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
1957 set_gdbarch_frameless_function_invocation (gdbarch
, ia64_frameless_function_invocation
);
1959 set_gdbarch_saved_pc_after_call (gdbarch
, ia64_saved_pc_after_call
);
1961 set_gdbarch_frame_chain (gdbarch
, ia64_frame_chain
);
1962 set_gdbarch_frame_chain_valid (gdbarch
, generic_func_frame_chain_valid
);
1963 set_gdbarch_frame_saved_pc (gdbarch
, ia64_frame_saved_pc
);
1965 set_gdbarch_frame_init_saved_regs (gdbarch
, ia64_frame_init_saved_regs
);
1966 set_gdbarch_get_saved_register (gdbarch
, ia64_get_saved_register
);
1968 set_gdbarch_register_convertible (gdbarch
, ia64_register_convertible
);
1969 set_gdbarch_register_convert_to_virtual (gdbarch
, ia64_register_convert_to_virtual
);
1970 set_gdbarch_register_convert_to_raw (gdbarch
, ia64_register_convert_to_raw
);
1972 set_gdbarch_use_struct_convention (gdbarch
, ia64_use_struct_convention
);
1973 set_gdbarch_extract_return_value (gdbarch
, ia64_extract_return_value
);
1975 set_gdbarch_store_struct_return (gdbarch
, ia64_store_struct_return
);
1976 set_gdbarch_store_return_value (gdbarch
, ia64_store_return_value
);
1977 set_gdbarch_extract_struct_value_address (gdbarch
, ia64_extract_struct_value_address
);
1979 set_gdbarch_memory_insert_breakpoint (gdbarch
, ia64_memory_insert_breakpoint
);
1980 set_gdbarch_memory_remove_breakpoint (gdbarch
, ia64_memory_remove_breakpoint
);
1981 set_gdbarch_breakpoint_from_pc (gdbarch
, ia64_breakpoint_from_pc
);
1982 set_gdbarch_read_pc (gdbarch
, ia64_read_pc
);
1983 set_gdbarch_write_pc (gdbarch
, ia64_write_pc
);
1985 /* Settings for calling functions in the inferior. */
1986 set_gdbarch_use_generic_dummy_frames (gdbarch
, 1);
1987 set_gdbarch_call_dummy_length (gdbarch
, 0);
1988 set_gdbarch_push_arguments (gdbarch
, ia64_push_arguments
);
1989 set_gdbarch_push_return_address (gdbarch
, ia64_push_return_address
);
1990 set_gdbarch_pop_frame (gdbarch
, ia64_pop_frame
);
1992 set_gdbarch_call_dummy_p (gdbarch
, 1);
1993 set_gdbarch_call_dummy_words (gdbarch
, ia64_call_dummy_words
);
1994 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (ia64_call_dummy_words
));
1995 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
1996 set_gdbarch_init_extra_frame_info (gdbarch
, ia64_init_extra_frame_info
);
1997 set_gdbarch_frame_args_address (gdbarch
, ia64_frame_args_address
);
1998 set_gdbarch_frame_locals_address (gdbarch
, ia64_frame_locals_address
);
2000 /* We won't necessarily have a frame pointer and even if we do,
2001 it winds up being extraordinarly messy when attempting to find
2002 the frame chain. So for the purposes of creating frames (which
2003 is all read_fp() is used for), simply use the stack pointer value
2005 set_gdbarch_read_fp (gdbarch
, generic_target_read_sp
);
2006 set_gdbarch_write_fp (gdbarch
, generic_target_write_sp
);
2008 /* Settings that should be unnecessary. */
2009 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2011 set_gdbarch_read_sp (gdbarch
, generic_target_read_sp
);
2012 set_gdbarch_write_sp (gdbarch
, generic_target_write_sp
);
2014 set_gdbarch_call_dummy_location (gdbarch
, AT_ENTRY_POINT
);
2015 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
2016 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
2017 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
2018 set_gdbarch_pc_in_call_dummy (gdbarch
, generic_pc_in_call_dummy
);
2019 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
2020 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
2021 set_gdbarch_fix_call_dummy (gdbarch
, generic_fix_call_dummy
);
2023 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
2024 set_gdbarch_function_start_offset (gdbarch
, 0);
2026 set_gdbarch_remote_translate_xfer_address (
2027 gdbarch
, ia64_remote_translate_xfer_address
);
2033 _initialize_ia64_tdep (void)
2035 register_gdbarch_init (bfd_arch_ia64
, ia64_gdbarch_init
);
2037 tm_print_insn
= print_insn_ia64
;
2038 tm_print_insn_info
.bytes_per_line
= SLOT_MULTIPLIER
;