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1 /* Target-dependent code for s390.
2
3 Copyright (C) 2001-2025 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20
21 #include "arch-utils.h"
22 #include "ax-gdb.h"
23 #include "dwarf2/frame.h"
24 #include "elf/s390.h"
25 #include "elf-bfd.h"
26 #include "extract-store-integer.h"
27 #include "frame-base.h"
28 #include "frame-unwind.h"
29 #include "gdbarch.h"
30 #include "gdbcore.h"
31 #include "infrun.h"
32 #include "linux-tdep.h"
33 #include "objfiles.h"
34 #include "osabi.h"
35 #include "record-full.h"
36 #include "regcache.h"
37 #include "reggroups.h"
38 #include "s390-tdep.h"
39 #include "target-descriptions.h"
40 #include "trad-frame.h"
41 #include "value.h"
42 #include "inferior.h"
43 #include "dwarf2/loc.h"
44 #include "gdbsupport/selftest.h"
45 #include "gdb/disasm-selftests.h"
46
47 #include "features/s390-linux32.c"
48 #include "features/s390x-linux64.c"
49
50 /* Holds the current set of options to be passed to the disassembler. */
51 static std::string s390_disassembler_options;
52
53 /* Breakpoints. */
54
55 constexpr gdb_byte s390_break_insn[] = { 0x0, 0x1 };
56
57 typedef BP_MANIPULATION (s390_break_insn) s390_breakpoint;
58
59 /* Types. */
60
61 /* Implement the gdbarch type alignment method. */
62
63 static ULONGEST
64 s390_type_align (gdbarch *gdbarch, struct type *t)
65 {
66 t = check_typedef (t);
67
68 if (t->length () > 8)
69 {
70 switch (t->code ())
71 {
72 case TYPE_CODE_INT:
73 case TYPE_CODE_RANGE:
74 case TYPE_CODE_FLT:
75 case TYPE_CODE_ENUM:
76 case TYPE_CODE_CHAR:
77 case TYPE_CODE_BOOL:
78 case TYPE_CODE_DECFLOAT:
79 return 8;
80
81 case TYPE_CODE_ARRAY:
82 if (t->is_vector ())
83 return 8;
84 break;
85 }
86 }
87 return 0;
88 }
89
90 /* Decoding S/390 instructions. */
91
92 /* Read a single instruction from address AT. */
93
94 static int
95 s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
96 {
97 static int s390_instrlen[] = { 2, 4, 4, 6 };
98 int instrlen;
99
100 if (target_read_memory (at, &instr[0], 2))
101 return -1;
102 instrlen = s390_instrlen[instr[0] >> 6];
103 if (instrlen > 2)
104 {
105 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
106 return -1;
107 }
108 return instrlen;
109 }
110
111 /* The functions below are for recognizing and decoding S/390
112 instructions of various formats. Each of them checks whether INSN
113 is an instruction of the given format, with the specified opcodes.
114 If it is, it sets the remaining arguments to the values of the
115 instruction's fields, and returns a non-zero value; otherwise, it
116 returns zero.
117
118 These functions' arguments appear in the order they appear in the
119 instruction, not in the machine-language form. So, opcodes always
120 come first, even though they're sometimes scattered around the
121 instructions. And displacements appear before base and extension
122 registers, as they do in the assembly syntax, not at the end, as
123 they do in the machine language.
124
125 Test for RI instruction format. */
126
127 static int
128 is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
129 {
130 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
131 {
132 *r1 = (insn[1] >> 4) & 0xf;
133 /* i2 is a 16-bit signed quantity. */
134 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
135 return 1;
136 }
137 else
138 return 0;
139 }
140
141 /* Test for RIL instruction format. See comment on is_ri for details. */
142
143 static int
144 is_ril (bfd_byte *insn, int op1, int op2,
145 unsigned int *r1, int *i2)
146 {
147 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
148 {
149 *r1 = (insn[1] >> 4) & 0xf;
150 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
151 no sign extension is necessary, but we don't want to assume
152 that. */
153 *i2 = (((insn[2] << 24)
154 | (insn[3] << 16)
155 | (insn[4] << 8)
156 | (insn[5])) ^ 0x80000000) - 0x80000000;
157 return 1;
158 }
159 else
160 return 0;
161 }
162
163 /* Test for RR instruction format. See comment on is_ri for details. */
164
165 static int
166 is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
167 {
168 if (insn[0] == op)
169 {
170 *r1 = (insn[1] >> 4) & 0xf;
171 *r2 = insn[1] & 0xf;
172 return 1;
173 }
174 else
175 return 0;
176 }
177
178 /* Test for RRE instruction format. See comment on is_ri for details. */
179
180 static int
181 is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
182 {
183 if (((insn[0] << 8) | insn[1]) == op)
184 {
185 /* Yes, insn[3]. insn[2] is unused in RRE format. */
186 *r1 = (insn[3] >> 4) & 0xf;
187 *r2 = insn[3] & 0xf;
188 return 1;
189 }
190 else
191 return 0;
192 }
193
194 /* Test for RS instruction format. See comment on is_ri for details. */
195
196 static int
197 is_rs (bfd_byte *insn, int op,
198 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
199 {
200 if (insn[0] == op)
201 {
202 *r1 = (insn[1] >> 4) & 0xf;
203 *r3 = insn[1] & 0xf;
204 *b2 = (insn[2] >> 4) & 0xf;
205 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
206 return 1;
207 }
208 else
209 return 0;
210 }
211
212 /* Test for RSY instruction format. See comment on is_ri for details. */
213
214 static int
215 is_rsy (bfd_byte *insn, int op1, int op2,
216 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
217 {
218 if (insn[0] == op1
219 && insn[5] == op2)
220 {
221 *r1 = (insn[1] >> 4) & 0xf;
222 *r3 = insn[1] & 0xf;
223 *b2 = (insn[2] >> 4) & 0xf;
224 /* The 'long displacement' is a 20-bit signed integer. */
225 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
226 ^ 0x80000) - 0x80000;
227 return 1;
228 }
229 else
230 return 0;
231 }
232
233 /* Test for RX instruction format. See comment on is_ri for details. */
234
235 static int
236 is_rx (bfd_byte *insn, int op,
237 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
238 {
239 if (insn[0] == op)
240 {
241 *r1 = (insn[1] >> 4) & 0xf;
242 *x2 = insn[1] & 0xf;
243 *b2 = (insn[2] >> 4) & 0xf;
244 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
245 return 1;
246 }
247 else
248 return 0;
249 }
250
251 /* Test for RXY instruction format. See comment on is_ri for details. */
252
253 static int
254 is_rxy (bfd_byte *insn, int op1, int op2,
255 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
256 {
257 if (insn[0] == op1
258 && insn[5] == op2)
259 {
260 *r1 = (insn[1] >> 4) & 0xf;
261 *x2 = insn[1] & 0xf;
262 *b2 = (insn[2] >> 4) & 0xf;
263 /* The 'long displacement' is a 20-bit signed integer. */
264 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
265 ^ 0x80000) - 0x80000;
266 return 1;
267 }
268 else
269 return 0;
270 }
271
272 /* A helper for s390_software_single_step, decides if an instruction
273 is a partial-execution instruction that needs to be executed until
274 completion when in record mode. If it is, returns 1 and writes
275 instruction length to a pointer. */
276
277 static int
278 s390_is_partial_instruction (struct gdbarch *gdbarch, CORE_ADDR loc, int *len)
279 {
280 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
281 uint16_t insn;
282
283 insn = read_memory_integer (loc, 2, byte_order);
284
285 switch (insn >> 8)
286 {
287 case 0xa8: /* MVCLE */
288 *len = 4;
289 return 1;
290
291 case 0xeb:
292 {
293 insn = read_memory_integer (loc + 4, 2, byte_order);
294 if ((insn & 0xff) == 0x8e)
295 {
296 /* MVCLU */
297 *len = 6;
298 return 1;
299 }
300 }
301 break;
302 }
303
304 switch (insn)
305 {
306 case 0xb255: /* MVST */
307 case 0xb263: /* CMPSC */
308 case 0xb2a5: /* TRE */
309 case 0xb2a6: /* CU21 */
310 case 0xb2a7: /* CU12 */
311 case 0xb9b0: /* CU14 */
312 case 0xb9b1: /* CU24 */
313 case 0xb9b2: /* CU41 */
314 case 0xb9b3: /* CU42 */
315 case 0xb92a: /* KMF */
316 case 0xb92b: /* KMO */
317 case 0xb92f: /* KMC */
318 case 0xb92d: /* KMCTR */
319 case 0xb92e: /* KM */
320 case 0xb93c: /* PPNO */
321 case 0xb990: /* TRTT */
322 case 0xb991: /* TRTO */
323 case 0xb992: /* TROT */
324 case 0xb993: /* TROO */
325 *len = 4;
326 return 1;
327 }
328
329 return 0;
330 }
331
332 /* Implement the "software_single_step" gdbarch method, needed to single step
333 through instructions like MVCLE in record mode, to make sure they are
334 executed to completion. Without that, record will save the full length
335 of destination buffer on every iteration, even though the CPU will only
336 process about 4kiB of it each time, leading to O(n**2) memory and time
337 complexity. */
338
339 static std::vector<CORE_ADDR>
340 s390_software_single_step (struct regcache *regcache)
341 {
342 struct gdbarch *gdbarch = regcache->arch ();
343 CORE_ADDR loc = regcache_read_pc (regcache);
344 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
345 int len;
346 uint16_t insn;
347
348 /* Special handling only if recording. */
349 if (!record_full_is_used ())
350 return {};
351
352 /* First, match a partial instruction. */
353 if (!s390_is_partial_instruction (gdbarch, loc, &len))
354 return {};
355
356 loc += len;
357
358 /* Second, look for a branch back to it. */
359 insn = read_memory_integer (loc, 2, byte_order);
360 if (insn != 0xa714) /* BRC with mask 1 */
361 return {};
362
363 insn = read_memory_integer (loc + 2, 2, byte_order);
364 if (insn != (uint16_t) -(len / 2))
365 return {};
366
367 loc += 4;
368
369 /* Found it, step past the whole thing. */
370 return {loc};
371 }
372
373 /* Displaced stepping. */
374
375 /* Return true if INSN is a non-branch RIL-b or RIL-c format
376 instruction. */
377
378 static int
379 is_non_branch_ril (gdb_byte *insn)
380 {
381 gdb_byte op1 = insn[0];
382
383 if (op1 == 0xc4)
384 {
385 gdb_byte op2 = insn[1] & 0x0f;
386
387 switch (op2)
388 {
389 case 0x02: /* llhrl */
390 case 0x04: /* lghrl */
391 case 0x05: /* lhrl */
392 case 0x06: /* llghrl */
393 case 0x07: /* sthrl */
394 case 0x08: /* lgrl */
395 case 0x0b: /* stgrl */
396 case 0x0c: /* lgfrl */
397 case 0x0d: /* lrl */
398 case 0x0e: /* llgfrl */
399 case 0x0f: /* strl */
400 return 1;
401 }
402 }
403 else if (op1 == 0xc6)
404 {
405 gdb_byte op2 = insn[1] & 0x0f;
406
407 switch (op2)
408 {
409 case 0x00: /* exrl */
410 case 0x02: /* pfdrl */
411 case 0x04: /* cghrl */
412 case 0x05: /* chrl */
413 case 0x06: /* clghrl */
414 case 0x07: /* clhrl */
415 case 0x08: /* cgrl */
416 case 0x0a: /* clgrl */
417 case 0x0c: /* cgfrl */
418 case 0x0d: /* crl */
419 case 0x0e: /* clgfrl */
420 case 0x0f: /* clrl */
421 return 1;
422 }
423 }
424
425 return 0;
426 }
427
428 typedef buf_displaced_step_copy_insn_closure
429 s390_displaced_step_copy_insn_closure;
430
431 /* Implementation of gdbarch_displaced_step_copy_insn. */
432
433 static displaced_step_copy_insn_closure_up
434 s390_displaced_step_copy_insn (struct gdbarch *gdbarch,
435 CORE_ADDR from, CORE_ADDR to,
436 struct regcache *regs)
437 {
438 size_t len = gdbarch_max_insn_length (gdbarch);
439 std::unique_ptr<s390_displaced_step_copy_insn_closure> closure
440 (new s390_displaced_step_copy_insn_closure (len));
441 gdb_byte *buf = closure->buf.data ();
442
443 read_memory (from, buf, len);
444
445 /* Adjust the displacement field of PC-relative RIL instructions,
446 except branches. The latter are handled in the fixup hook. */
447 if (is_non_branch_ril (buf))
448 {
449 LONGEST offset;
450
451 offset = extract_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG);
452 offset = (from - to + offset * 2) / 2;
453
454 /* If the instruction is too far from the jump pad, punt. This
455 will usually happen with instructions in shared libraries.
456 We could probably support these by rewriting them to be
457 absolute or fully emulating them. */
458 if (offset < INT32_MIN || offset > INT32_MAX)
459 {
460 /* Let the core fall back to stepping over the breakpoint
461 in-line. */
462 displaced_debug_printf ("can't displaced step RIL instruction: offset "
463 "%s out of range", plongest (offset));
464
465 return NULL;
466 }
467
468 store_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG, offset);
469 }
470
471 write_memory (to, buf, len);
472
473 displaced_debug_printf ("copy %s->%s: %s",
474 paddress (gdbarch, from), paddress (gdbarch, to),
475 bytes_to_string (buf, len).c_str ());
476
477 /* This is a work around for a problem with g++ 4.8. */
478 return displaced_step_copy_insn_closure_up (closure.release ());
479 }
480
481 /* Fix up the state of registers and memory after having single-stepped
482 a displaced instruction. */
483
484 static void
485 s390_displaced_step_fixup (struct gdbarch *gdbarch,
486 displaced_step_copy_insn_closure *closure_,
487 CORE_ADDR from, CORE_ADDR to,
488 struct regcache *regs, bool completed_p)
489 {
490 CORE_ADDR pc = regcache_read_pc (regs);
491
492 /* If the displaced instruction didn't complete successfully then all we
493 need to do is restore the program counter. */
494 if (!completed_p)
495 {
496 pc = from + (pc - to);
497 regcache_write_pc (regs, pc);
498 return;
499 }
500
501 /* Our closure is a copy of the instruction. */
502 s390_displaced_step_copy_insn_closure *closure
503 = (s390_displaced_step_copy_insn_closure *) closure_;
504 gdb_byte *insn = closure->buf.data ();
505 static int s390_instrlen[] = { 2, 4, 4, 6 };
506 int insnlen = s390_instrlen[insn[0] >> 6];
507
508 /* Fields for various kinds of instructions. */
509 unsigned int b2, r1, r2, x2, r3;
510 int i2, d2;
511
512 /* Get addressing mode bit. */
513 ULONGEST amode = 0;
514 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
515 {
516 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
517 amode &= 0x80000000;
518 }
519
520 displaced_debug_printf ("(s390) fixup (%s, %s) pc %s len %d amode 0x%x",
521 paddress (gdbarch, from), paddress (gdbarch, to),
522 paddress (gdbarch, pc), insnlen, (int) amode);
523
524 /* Handle absolute branch and save instructions. */
525 int op_basr_p = is_rr (insn, op_basr, &r1, &r2);
526 if (op_basr_p
527 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
528 {
529 /* Recompute saved return address in R1. */
530 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
531 amode | (from + insnlen));
532 /* Update PC iff the instruction doesn't actually branch. */
533 if (op_basr_p && r2 == 0)
534 regcache_write_pc (regs, from + insnlen);
535 }
536
537 /* Handle absolute branch instructions. */
538 else if (is_rr (insn, op_bcr, &r1, &r2)
539 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
540 || is_rr (insn, op_bctr, &r1, &r2)
541 || is_rre (insn, op_bctgr, &r1, &r2)
542 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
543 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
544 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
545 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
546 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
547 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
548 {
549 /* Update PC iff branch was *not* taken. */
550 if (pc == to + insnlen)
551 regcache_write_pc (regs, from + insnlen);
552 }
553
554 /* Handle PC-relative branch and save instructions. */
555 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
556 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
557 {
558 /* Update PC. */
559 regcache_write_pc (regs, pc - to + from);
560 /* Recompute saved return address in R1. */
561 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
562 amode | (from + insnlen));
563 }
564
565 /* Handle LOAD ADDRESS RELATIVE LONG. */
566 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
567 {
568 /* Update PC. */
569 regcache_write_pc (regs, from + insnlen);
570 /* Recompute output address in R1. */
571 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
572 from + i2 * 2);
573 }
574
575 /* If we executed a breakpoint instruction, point PC right back at it. */
576 else if (insn[0] == 0x0 && insn[1] == 0x1)
577 regcache_write_pc (regs, from);
578
579 /* For any other insn, adjust PC by negated displacement. PC then
580 points right after the original instruction, except for PC-relative
581 branches, where it points to the adjusted branch target. */
582 else
583 regcache_write_pc (regs, pc - to + from);
584
585 displaced_debug_printf ("(s390) pc is now %s",
586 paddress (gdbarch, regcache_read_pc (regs)));
587 }
588
589 /* Implement displaced_step_hw_singlestep gdbarch method. */
590
591 static bool
592 s390_displaced_step_hw_singlestep (struct gdbarch *gdbarch)
593 {
594 return true;
595 }
596
597 /* Prologue analysis. */
598
599 struct s390_prologue_data {
600
601 /* The stack. */
602 struct pv_area *stack;
603
604 /* The size and byte-order of a GPR or FPR. */
605 int gpr_size;
606 int fpr_size;
607 enum bfd_endian byte_order;
608
609 /* The general-purpose registers. */
610 pv_t gpr[S390_NUM_GPRS];
611
612 /* The floating-point registers. */
613 pv_t fpr[S390_NUM_FPRS];
614
615 /* The offset relative to the CFA where the incoming GPR N was saved
616 by the function prologue. 0 if not saved or unknown. */
617 int gpr_slot[S390_NUM_GPRS];
618
619 /* Likewise for FPRs. */
620 int fpr_slot[S390_NUM_FPRS];
621
622 /* Nonzero if the backchain was saved. This is assumed to be the
623 case when the incoming SP is saved at the current SP location. */
624 int back_chain_saved_p;
625 };
626
627 /* Return the effective address for an X-style instruction, like:
628
629 L R1, D2(X2, B2)
630
631 Here, X2 and B2 are registers, and D2 is a signed 20-bit
632 constant; the effective address is the sum of all three. If either
633 X2 or B2 are zero, then it doesn't contribute to the sum --- this
634 means that r0 can't be used as either X2 or B2. */
635
636 static pv_t
637 s390_addr (struct s390_prologue_data *data,
638 int d2, unsigned int x2, unsigned int b2)
639 {
640 pv_t result;
641
642 result = pv_constant (d2);
643 if (x2)
644 result = pv_add (result, data->gpr[x2]);
645 if (b2)
646 result = pv_add (result, data->gpr[b2]);
647
648 return result;
649 }
650
651 /* Do a SIZE-byte store of VALUE to D2(X2,B2). */
652
653 static void
654 s390_store (struct s390_prologue_data *data,
655 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
656 pv_t value)
657 {
658 pv_t addr = s390_addr (data, d2, x2, b2);
659 pv_t offset;
660
661 /* Check whether we are storing the backchain. */
662 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
663
664 if (pv_is_constant (offset) && offset.k == 0)
665 if (size == data->gpr_size
666 && pv_is_register_k (value, S390_SP_REGNUM, 0))
667 {
668 data->back_chain_saved_p = 1;
669 return;
670 }
671
672 /* Check whether we are storing a register into the stack. */
673 if (!data->stack->store_would_trash (addr))
674 data->stack->store (addr, size, value);
675
676 /* Note: If this is some store we cannot identify, you might think we
677 should forget our cached values, as any of those might have been hit.
678
679 However, we make the assumption that the register save areas are only
680 ever stored to once in any given function, and we do recognize these
681 stores. Thus every store we cannot recognize does not hit our data. */
682 }
683
684 /* Do a SIZE-byte load from D2(X2,B2). */
685
686 static pv_t
687 s390_load (struct s390_prologue_data *data,
688 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
689
690 {
691 pv_t addr = s390_addr (data, d2, x2, b2);
692
693 /* If it's a load from an in-line constant pool, then we can
694 simulate that, under the assumption that the code isn't
695 going to change between the time the processor actually
696 executed it creating the current frame, and the time when
697 we're analyzing the code to unwind past that frame. */
698 if (pv_is_constant (addr))
699 {
700 const struct target_section *secp
701 = target_section_by_addr (current_inferior ()->top_target (), addr.k);
702 if (secp != NULL
703 && (bfd_section_flags (secp->the_bfd_section) & SEC_READONLY))
704 return pv_constant (read_memory_integer (addr.k, size,
705 data->byte_order));
706 }
707
708 /* Check whether we are accessing one of our save slots. */
709 return data->stack->fetch (addr, size);
710 }
711
712 /* Function for finding saved registers in a 'struct pv_area'; we pass
713 this to pv_area::scan.
714
715 If VALUE is a saved register, ADDR says it was saved at a constant
716 offset from the frame base, and SIZE indicates that the whole
717 register was saved, record its offset in the reg_offset table in
718 PROLOGUE_UNTYPED. */
719
720 static void
721 s390_check_for_saved (void *data_untyped, pv_t addr,
722 CORE_ADDR size, pv_t value)
723 {
724 struct s390_prologue_data *data = (struct s390_prologue_data *) data_untyped;
725 int i, offset;
726
727 if (!pv_is_register (addr, S390_SP_REGNUM))
728 return;
729
730 offset = 16 * data->gpr_size + 32 - addr.k;
731
732 /* If we are storing the original value of a register, we want to
733 record the CFA offset. If the same register is stored multiple
734 times, the stack slot with the highest address counts. */
735
736 for (i = 0; i < S390_NUM_GPRS; i++)
737 if (size == data->gpr_size
738 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
739 if (data->gpr_slot[i] == 0
740 || data->gpr_slot[i] > offset)
741 {
742 data->gpr_slot[i] = offset;
743 return;
744 }
745
746 for (i = 0; i < S390_NUM_FPRS; i++)
747 if (size == data->fpr_size
748 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
749 if (data->fpr_slot[i] == 0
750 || data->fpr_slot[i] > offset)
751 {
752 data->fpr_slot[i] = offset;
753 return;
754 }
755 }
756
757 /* Analyze the prologue of the function starting at START_PC, continuing at
758 most until CURRENT_PC. Initialize DATA to hold all information we find
759 out about the state of the registers and stack slots. Return the address
760 of the instruction after the last one that changed the SP, FP, or back
761 chain; or zero on error. */
762
763 static CORE_ADDR
764 s390_analyze_prologue (struct gdbarch *gdbarch,
765 CORE_ADDR start_pc,
766 CORE_ADDR current_pc,
767 struct s390_prologue_data *data)
768 {
769 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
770
771 /* Our return value:
772 The address of the instruction after the last one that changed
773 the SP, FP, or back chain; zero if we got an error trying to
774 read memory. */
775 CORE_ADDR result = start_pc;
776
777 /* The current PC for our abstract interpretation. */
778 CORE_ADDR pc;
779
780 /* The address of the next instruction after that. */
781 CORE_ADDR next_pc;
782
783 pv_area stack (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
784 scoped_restore restore_stack = make_scoped_restore (&data->stack, &stack);
785
786 /* Set up everything's initial value. */
787 {
788 int i;
789
790 /* For the purpose of prologue tracking, we consider the GPR size to
791 be equal to the ABI word size, even if it is actually larger
792 (i.e. when running a 32-bit binary under a 64-bit kernel). */
793 data->gpr_size = word_size;
794 data->fpr_size = 8;
795 data->byte_order = gdbarch_byte_order (gdbarch);
796
797 for (i = 0; i < S390_NUM_GPRS; i++)
798 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
799
800 for (i = 0; i < S390_NUM_FPRS; i++)
801 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
802
803 for (i = 0; i < S390_NUM_GPRS; i++)
804 data->gpr_slot[i] = 0;
805
806 for (i = 0; i < S390_NUM_FPRS; i++)
807 data->fpr_slot[i] = 0;
808
809 data->back_chain_saved_p = 0;
810 }
811
812 /* Start interpreting instructions, until we hit the frame's
813 current PC or the first branch instruction. */
814 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
815 {
816 bfd_byte insn[S390_MAX_INSTR_SIZE];
817 int insn_len = s390_readinstruction (insn, pc);
818
819 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
820 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
821 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
822
823 /* Fields for various kinds of instructions. */
824 unsigned int b2, r1, r2, x2, r3;
825 int i2, d2;
826
827 /* The values of SP and FP before this instruction,
828 for detecting instructions that change them. */
829 pv_t pre_insn_sp, pre_insn_fp;
830 /* Likewise for the flag whether the back chain was saved. */
831 int pre_insn_back_chain_saved_p;
832
833 /* If we got an error trying to read the instruction, report it. */
834 if (insn_len < 0)
835 {
836 result = 0;
837 break;
838 }
839
840 next_pc = pc + insn_len;
841
842 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
843 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
844 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
845
846 /* LHI r1, i2 --- load halfword immediate. */
847 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
848 /* LGFI r1, i2 --- load fullword immediate. */
849 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
850 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
851 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
852 data->gpr[r1] = pv_constant (i2);
853
854 /* LR r1, r2 --- load from register. */
855 /* LGR r1, r2 --- load from register (64-bit version). */
856 else if (is_rr (insn32, op_lr, &r1, &r2)
857 || is_rre (insn64, op_lgr, &r1, &r2))
858 data->gpr[r1] = data->gpr[r2];
859
860 /* LDGR r1, r2 --- load from register to floating-point register
861 (64-bit version). */
862 else if (is_rre (insn64, op_ldgr, &r1, &r2))
863 data->fpr[r1] = data->gpr[r2];
864
865 /* L r1, d2(x2, b2) --- load. */
866 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
867 /* LG r1, d2(x2, b2) --- load (64-bit version). */
868 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
869 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
870 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
871 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
872
873 /* ST r1, d2(x2, b2) --- store. */
874 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
875 /* STG r1, d2(x2, b2) --- store (64-bit version). */
876 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
877 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
878 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
879 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
880
881 /* STD r1, d2(x2,b2) --- store floating-point register. */
882 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
883 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
884
885 /* STM r1, r3, d2(b2) --- store multiple. */
886 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
887 version). */
888 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
889 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
890 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
891 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
892 {
893 for (; r1 <= r3; r1++, d2 += data->gpr_size)
894 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
895 }
896
897 /* AHI r1, i2 --- add halfword immediate. */
898 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
899 /* AFI r1, i2 --- add fullword immediate. */
900 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
901 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
902 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
903 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
904 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
905 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
906
907 /* ALFI r1, i2 --- add logical immediate. */
908 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
909 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
910 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
911 data->gpr[r1] = pv_add_constant (data->gpr[r1],
912 (CORE_ADDR)i2 & 0xffffffff);
913
914 /* AR r1, r2 -- add register. */
915 /* AGR r1, r2 -- add register (64-bit version). */
916 else if (is_rr (insn32, op_ar, &r1, &r2)
917 || is_rre (insn64, op_agr, &r1, &r2))
918 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
919
920 /* A r1, d2(x2, b2) -- add. */
921 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
922 /* AG r1, d2(x2, b2) -- add (64-bit version). */
923 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
924 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
925 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
926 data->gpr[r1] = pv_add (data->gpr[r1],
927 s390_load (data, d2, x2, b2, data->gpr_size));
928
929 /* SLFI r1, i2 --- subtract logical immediate. */
930 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
931 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
932 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
933 data->gpr[r1] = pv_add_constant (data->gpr[r1],
934 -((CORE_ADDR)i2 & 0xffffffff));
935
936 /* SR r1, r2 -- subtract register. */
937 /* SGR r1, r2 -- subtract register (64-bit version). */
938 else if (is_rr (insn32, op_sr, &r1, &r2)
939 || is_rre (insn64, op_sgr, &r1, &r2))
940 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
941
942 /* S r1, d2(x2, b2) -- subtract. */
943 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
944 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
945 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
946 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
947 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
948 data->gpr[r1] = pv_subtract (data->gpr[r1],
949 s390_load (data, d2, x2, b2, data->gpr_size));
950
951 /* LA r1, d2(x2, b2) --- load address. */
952 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
953 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
954 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
955 data->gpr[r1] = s390_addr (data, d2, x2, b2);
956
957 /* LARL r1, i2 --- load address relative long. */
958 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
959 data->gpr[r1] = pv_constant (pc + i2 * 2);
960
961 /* BASR r1, 0 --- branch and save.
962 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
963 else if (is_rr (insn, op_basr, &r1, &r2)
964 && r2 == 0)
965 data->gpr[r1] = pv_constant (next_pc);
966
967 /* BRAS r1, i2 --- branch relative and save. */
968 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
969 {
970 data->gpr[r1] = pv_constant (next_pc);
971 next_pc = pc + i2 * 2;
972
973 /* We'd better not interpret any backward branches. We'll
974 never terminate. */
975 if (next_pc <= pc)
976 break;
977 }
978
979 /* BRC/BRCL -- branch relative on condition. Ignore "branch
980 never", branch to following instruction, and "conditional
981 trap" (BRC +2). Otherwise terminate search. */
982 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2))
983 {
984 if (r1 != 0 && i2 != 1 && i2 != 2)
985 break;
986 }
987 else if (is_ril (insn, op1_brcl, op2_brcl, &r1, &i2))
988 {
989 if (r1 != 0 && i2 != 3)
990 break;
991 }
992
993 /* Terminate search when hitting any other branch instruction. */
994 else if (is_rr (insn, op_basr, &r1, &r2)
995 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
996 || is_rr (insn, op_bcr, &r1, &r2)
997 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
998 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
999 break;
1000
1001 else
1002 {
1003 /* An instruction we don't know how to simulate. The only
1004 safe thing to do would be to set every value we're tracking
1005 to 'unknown'. Instead, we'll be optimistic: we assume that
1006 we *can* interpret every instruction that the compiler uses
1007 to manipulate any of the data we're interested in here --
1008 then we can just ignore anything else. */
1009 }
1010
1011 /* Record the address after the last instruction that changed
1012 the FP, SP, or backlink. Ignore instructions that changed
1013 them back to their original values --- those are probably
1014 restore instructions. (The back chain is never restored,
1015 just popped.) */
1016 {
1017 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1018 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1019
1020 if ((! pv_is_identical (pre_insn_sp, sp)
1021 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
1022 && sp.kind != pvk_unknown)
1023 || (! pv_is_identical (pre_insn_fp, fp)
1024 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
1025 && fp.kind != pvk_unknown)
1026 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
1027 result = next_pc;
1028 }
1029 }
1030
1031 /* Record where all the registers were saved. */
1032 data->stack->scan (s390_check_for_saved, data);
1033
1034 return result;
1035 }
1036
1037 /* Advance PC across any function entry prologue instructions to reach
1038 some "real" code. */
1039
1040 static CORE_ADDR
1041 s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1042 {
1043 struct s390_prologue_data data;
1044 CORE_ADDR skip_pc, func_addr;
1045
1046 if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
1047 {
1048 CORE_ADDR post_prologue_pc
1049 = skip_prologue_using_sal (gdbarch, func_addr);
1050 if (post_prologue_pc != 0)
1051 return std::max (pc, post_prologue_pc);
1052 }
1053
1054 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
1055 return skip_pc ? skip_pc : pc;
1056 }
1057
1058 /* Register handling. */
1059
1060 /* ABI call-saved register information. */
1061
1062 static int
1063 s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
1064 {
1065 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
1066
1067 switch (tdep->abi)
1068 {
1069 case ABI_LINUX_S390:
1070 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
1071 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
1072 || regnum == S390_A0_REGNUM)
1073 return 1;
1074
1075 break;
1076
1077 case ABI_LINUX_ZSERIES:
1078 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
1079 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
1080 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
1081 return 1;
1082
1083 break;
1084 }
1085
1086 return 0;
1087 }
1088
1089 /* The "guess_tracepoint_registers" gdbarch method. */
1090
1091 static void
1092 s390_guess_tracepoint_registers (struct gdbarch *gdbarch,
1093 struct regcache *regcache,
1094 CORE_ADDR addr)
1095 {
1096 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
1097 int sz = register_size (gdbarch, S390_PSWA_REGNUM);
1098 gdb_byte *reg = (gdb_byte *) alloca (sz);
1099 ULONGEST pswm, pswa;
1100
1101 /* Set PSWA from the location and a default PSWM (the only part we're
1102 unlikely to get right is the CC). */
1103 if (tdep->abi == ABI_LINUX_S390)
1104 {
1105 /* 31-bit PSWA needs high bit set (it's very unlikely the target
1106 was in 24-bit mode). */
1107 pswa = addr | 0x80000000UL;
1108 pswm = 0x070d0000UL;
1109 }
1110 else
1111 {
1112 pswa = addr;
1113 pswm = 0x0705000180000000ULL;
1114 }
1115
1116 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswa);
1117 regcache->raw_supply (S390_PSWA_REGNUM, reg);
1118
1119 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswm);
1120 regcache->raw_supply (S390_PSWM_REGNUM, reg);
1121 }
1122
1123 /* Return the name of register REGNO. Return the empty string for
1124 registers that shouldn't be visible. */
1125
1126 static const char *
1127 s390_register_name (struct gdbarch *gdbarch, int regnum)
1128 {
1129 if (regnum >= S390_V0_LOWER_REGNUM
1130 && regnum <= S390_V15_LOWER_REGNUM)
1131 return "";
1132 return tdesc_register_name (gdbarch, regnum);
1133 }
1134
1135 /* DWARF Register Mapping. */
1136
1137 static const short s390_dwarf_regmap[] =
1138 {
1139 /* 0-15: General Purpose Registers. */
1140 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
1141 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
1142 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
1143 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
1144
1145 /* 16-31: Floating Point Registers / Vector Registers 0-15. */
1146 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
1147 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
1148 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
1149 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
1150
1151 /* 32-47: Control Registers (not mapped). */
1152 -1, -1, -1, -1, -1, -1, -1, -1,
1153 -1, -1, -1, -1, -1, -1, -1, -1,
1154
1155 /* 48-63: Access Registers. */
1156 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
1157 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
1158 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
1159 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
1160
1161 /* 64-65: Program Status Word. */
1162 S390_PSWM_REGNUM,
1163 S390_PSWA_REGNUM,
1164
1165 /* 66-67: Reserved. */
1166 -1, -1,
1167
1168 /* 68-83: Vector Registers 16-31. */
1169 S390_V16_REGNUM, S390_V18_REGNUM, S390_V20_REGNUM, S390_V22_REGNUM,
1170 S390_V17_REGNUM, S390_V19_REGNUM, S390_V21_REGNUM, S390_V23_REGNUM,
1171 S390_V24_REGNUM, S390_V26_REGNUM, S390_V28_REGNUM, S390_V30_REGNUM,
1172 S390_V25_REGNUM, S390_V27_REGNUM, S390_V29_REGNUM, S390_V31_REGNUM,
1173
1174 /* End of "official" DWARF registers. The remainder of the map is
1175 for GDB internal use only. */
1176
1177 /* GPR Lower Half Access. */
1178 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
1179 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
1180 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
1181 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
1182 };
1183
1184 enum { s390_dwarf_reg_r0l = ARRAY_SIZE (s390_dwarf_regmap) - 16 };
1185
1186 /* Convert DWARF register number REG to the appropriate register
1187 number used by GDB. */
1188
1189 static int
1190 s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1191 {
1192 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
1193 int gdb_reg = -1;
1194
1195 /* In a 32-on-64 debug scenario, debug info refers to the full
1196 64-bit GPRs. Note that call frame information still refers to
1197 the 32-bit lower halves, because s390_adjust_frame_regnum uses
1198 special register numbers to access GPRs. */
1199 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
1200 return tdep->gpr_full_regnum + reg;
1201
1202 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
1203 gdb_reg = s390_dwarf_regmap[reg];
1204
1205 if (tdep->v0_full_regnum == -1)
1206 {
1207 if (gdb_reg >= S390_V16_REGNUM && gdb_reg <= S390_V31_REGNUM)
1208 gdb_reg = -1;
1209 }
1210 else
1211 {
1212 if (gdb_reg >= S390_F0_REGNUM && gdb_reg <= S390_F15_REGNUM)
1213 gdb_reg = gdb_reg - S390_F0_REGNUM + tdep->v0_full_regnum;
1214 }
1215
1216 return gdb_reg;
1217 }
1218
1219 /* Pseudo registers. */
1220
1221 /* Check whether REGNUM indicates a coupled general purpose register.
1222 These pseudo-registers are composed of two adjacent gprs. */
1223
1224 static int
1225 regnum_is_gpr_full (s390_gdbarch_tdep *tdep, int regnum)
1226 {
1227 return (tdep->gpr_full_regnum != -1
1228 && regnum >= tdep->gpr_full_regnum
1229 && regnum <= tdep->gpr_full_regnum + 15);
1230 }
1231
1232 /* Check whether REGNUM indicates a full vector register (v0-v15).
1233 These pseudo-registers are composed of f0-f15 and v0l-v15l. */
1234
1235 static int
1236 regnum_is_vxr_full (s390_gdbarch_tdep *tdep, int regnum)
1237 {
1238 return (tdep->v0_full_regnum != -1
1239 && regnum >= tdep->v0_full_regnum
1240 && regnum <= tdep->v0_full_regnum + 15);
1241 }
1242
1243 /* 'float' values are stored in the upper half of floating-point
1244 registers, even though we are otherwise a big-endian platform. The
1245 same applies to a 'float' value within a vector. */
1246
1247 static value *
1248 s390_value_from_register (gdbarch *gdbarch, type *type, int regnum,
1249 const frame_info_ptr &this_frame)
1250 {
1251 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
1252 value *value
1253 = default_value_from_register (gdbarch, type, regnum, this_frame);
1254 check_typedef (type);
1255
1256 if ((regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
1257 && type->length () < 8)
1258 || regnum_is_vxr_full (tdep, regnum)
1259 || (regnum >= S390_V16_REGNUM && regnum <= S390_V31_REGNUM))
1260 value->set_offset (0);
1261
1262 return value;
1263 }
1264
1265 /* Implementation of the gdbarch_dwarf2_reg_piece_offset hook. */
1266
1267 static ULONGEST
1268 s390_dwarf2_reg_piece_offset (gdbarch *gdbarch, int gdb_regnum, ULONGEST size)
1269 {
1270 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
1271
1272 /* Floating point register. */
1273 if (gdb_regnum >= S390_F0_REGNUM && gdb_regnum <= S390_F15_REGNUM)
1274 return 0;
1275
1276 /* Vector register, v0 - v15. */
1277 if (regnum_is_vxr_full (tdep, gdb_regnum))
1278 return 0;
1279
1280 /* Vector register, v16 - v31. */
1281 if (gdb_regnum >= S390_V16_REGNUM && gdb_regnum <= S390_V31_REGNUM)
1282 return 0;
1283
1284 return default_dwarf2_reg_piece_offset (gdbarch, gdb_regnum, size);
1285 }
1286
1287 /* Implement pseudo_register_name tdesc method. */
1288
1289 static const char *
1290 s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
1291 {
1292 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
1293
1294 if (regnum == tdep->pc_regnum)
1295 return "pc";
1296
1297 if (regnum == tdep->cc_regnum)
1298 return "cc";
1299
1300 if (regnum_is_gpr_full (tdep, regnum))
1301 {
1302 static const char *full_name[] = {
1303 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1304 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1305 };
1306 return full_name[regnum - tdep->gpr_full_regnum];
1307 }
1308
1309 if (regnum_is_vxr_full (tdep, regnum))
1310 {
1311 static const char *full_name[] = {
1312 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
1313 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15"
1314 };
1315 return full_name[regnum - tdep->v0_full_regnum];
1316 }
1317
1318 internal_error (_("invalid regnum"));
1319 }
1320
1321 /* Implement pseudo_register_type tdesc method. */
1322
1323 static struct type *
1324 s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
1325 {
1326 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
1327
1328 if (regnum == tdep->pc_regnum)
1329 return builtin_type (gdbarch)->builtin_func_ptr;
1330
1331 if (regnum == tdep->cc_regnum)
1332 return builtin_type (gdbarch)->builtin_int;
1333
1334 if (regnum_is_gpr_full (tdep, regnum))
1335 return builtin_type (gdbarch)->builtin_uint64;
1336
1337 /* For the "concatenated" vector registers use the same type as v16. */
1338 if (regnum_is_vxr_full (tdep, regnum))
1339 return tdesc_register_type (gdbarch, S390_V16_REGNUM);
1340
1341 internal_error (_("invalid regnum"));
1342 }
1343
1344 /* Implement pseudo_register_read gdbarch method. */
1345
1346 static enum register_status
1347 s390_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
1348 int regnum, gdb_byte *buf)
1349 {
1350 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
1351 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1352 int regsize = register_size (gdbarch, regnum);
1353 ULONGEST val;
1354
1355 if (regnum == tdep->pc_regnum)
1356 {
1357 enum register_status status;
1358
1359 status = regcache->raw_read (S390_PSWA_REGNUM, &val);
1360 if (status == REG_VALID)
1361 {
1362 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1363 val &= 0x7fffffff;
1364 store_unsigned_integer (buf, regsize, byte_order, val);
1365 }
1366 return status;
1367 }
1368
1369 if (regnum == tdep->cc_regnum)
1370 {
1371 enum register_status status;
1372
1373 status = regcache->raw_read (S390_PSWM_REGNUM, &val);
1374 if (status == REG_VALID)
1375 {
1376 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1377 val = (val >> 12) & 3;
1378 else
1379 val = (val >> 44) & 3;
1380 store_unsigned_integer (buf, regsize, byte_order, val);
1381 }
1382 return status;
1383 }
1384
1385 if (regnum_is_gpr_full (tdep, regnum))
1386 {
1387 enum register_status status;
1388 ULONGEST val_upper;
1389
1390 regnum -= tdep->gpr_full_regnum;
1391
1392 status = regcache->raw_read (S390_R0_REGNUM + regnum, &val);
1393 if (status == REG_VALID)
1394 status = regcache->raw_read (S390_R0_UPPER_REGNUM + regnum,
1395 &val_upper);
1396 if (status == REG_VALID)
1397 {
1398 val |= val_upper << 32;
1399 store_unsigned_integer (buf, regsize, byte_order, val);
1400 }
1401 return status;
1402 }
1403
1404 if (regnum_is_vxr_full (tdep, regnum))
1405 {
1406 enum register_status status;
1407
1408 regnum -= tdep->v0_full_regnum;
1409
1410 status = regcache->raw_read (S390_F0_REGNUM + regnum, buf);
1411 if (status == REG_VALID)
1412 status = regcache->raw_read (S390_V0_LOWER_REGNUM + regnum, buf + 8);
1413 return status;
1414 }
1415
1416 internal_error (_("invalid regnum"));
1417 }
1418
1419 /* Implement pseudo_register_write gdbarch method. */
1420
1421 static void
1422 s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
1423 int regnum, const gdb_byte *buf)
1424 {
1425 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
1426 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1427 int regsize = register_size (gdbarch, regnum);
1428 ULONGEST val, psw;
1429
1430 if (regnum == tdep->pc_regnum)
1431 {
1432 val = extract_unsigned_integer (buf, regsize, byte_order);
1433 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1434 {
1435 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
1436 val = (psw & 0x80000000) | (val & 0x7fffffff);
1437 }
1438 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
1439 return;
1440 }
1441
1442 if (regnum == tdep->cc_regnum)
1443 {
1444 val = extract_unsigned_integer (buf, regsize, byte_order);
1445 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
1446 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1447 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
1448 else
1449 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
1450 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
1451 return;
1452 }
1453
1454 if (regnum_is_gpr_full (tdep, regnum))
1455 {
1456 regnum -= tdep->gpr_full_regnum;
1457 val = extract_unsigned_integer (buf, regsize, byte_order);
1458 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
1459 val & 0xffffffff);
1460 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
1461 val >> 32);
1462 return;
1463 }
1464
1465 if (regnum_is_vxr_full (tdep, regnum))
1466 {
1467 regnum -= tdep->v0_full_regnum;
1468 regcache->raw_write (S390_F0_REGNUM + regnum, buf);
1469 regcache->raw_write (S390_V0_LOWER_REGNUM + regnum, buf + 8);
1470 return;
1471 }
1472
1473 internal_error (_("invalid regnum"));
1474 }
1475
1476 /* Register groups. */
1477
1478 /* Implement pseudo_register_reggroup_p tdesc method. */
1479
1480 static int
1481 s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
1482 const struct reggroup *group)
1483 {
1484 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
1485
1486 /* We usually save/restore the whole PSW, which includes PC and CC.
1487 However, some older gdbservers may not support saving/restoring
1488 the whole PSW yet, and will return an XML register description
1489 excluding those from the save/restore register groups. In those
1490 cases, we still need to explicitly save/restore PC and CC in order
1491 to push or pop frames. Since this doesn't hurt anything if we
1492 already save/restore the whole PSW (it's just redundant), we add
1493 PC and CC at this point unconditionally. */
1494 if (group == save_reggroup || group == restore_reggroup)
1495 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
1496
1497 if (group == vector_reggroup)
1498 return regnum_is_vxr_full (tdep, regnum);
1499
1500 if (group == general_reggroup && regnum_is_vxr_full (tdep, regnum))
1501 return 0;
1502
1503 return default_register_reggroup_p (gdbarch, regnum, group);
1504 }
1505
1506 /* The "ax_pseudo_register_collect" gdbarch method. */
1507
1508 static int
1509 s390_ax_pseudo_register_collect (struct gdbarch *gdbarch,
1510 struct agent_expr *ax, int regnum)
1511 {
1512 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
1513 if (regnum == tdep->pc_regnum)
1514 {
1515 ax_reg_mask (ax, S390_PSWA_REGNUM);
1516 }
1517 else if (regnum == tdep->cc_regnum)
1518 {
1519 ax_reg_mask (ax, S390_PSWM_REGNUM);
1520 }
1521 else if (regnum_is_gpr_full (tdep, regnum))
1522 {
1523 regnum -= tdep->gpr_full_regnum;
1524 ax_reg_mask (ax, S390_R0_REGNUM + regnum);
1525 ax_reg_mask (ax, S390_R0_UPPER_REGNUM + regnum);
1526 }
1527 else if (regnum_is_vxr_full (tdep, regnum))
1528 {
1529 regnum -= tdep->v0_full_regnum;
1530 ax_reg_mask (ax, S390_F0_REGNUM + regnum);
1531 ax_reg_mask (ax, S390_V0_LOWER_REGNUM + regnum);
1532 }
1533 else
1534 {
1535 internal_error (_("invalid regnum"));
1536 }
1537 return 0;
1538 }
1539
1540 /* The "ax_pseudo_register_push_stack" gdbarch method. */
1541
1542 static int
1543 s390_ax_pseudo_register_push_stack (struct gdbarch *gdbarch,
1544 struct agent_expr *ax, int regnum)
1545 {
1546 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
1547 if (regnum == tdep->pc_regnum)
1548 {
1549 ax_reg (ax, S390_PSWA_REGNUM);
1550 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1551 {
1552 ax_zero_ext (ax, 31);
1553 }
1554 }
1555 else if (regnum == tdep->cc_regnum)
1556 {
1557 ax_reg (ax, S390_PSWM_REGNUM);
1558 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1559 ax_const_l (ax, 12);
1560 else
1561 ax_const_l (ax, 44);
1562 ax_simple (ax, aop_rsh_unsigned);
1563 ax_zero_ext (ax, 2);
1564 }
1565 else if (regnum_is_gpr_full (tdep, regnum))
1566 {
1567 regnum -= tdep->gpr_full_regnum;
1568 ax_reg (ax, S390_R0_REGNUM + regnum);
1569 ax_reg (ax, S390_R0_UPPER_REGNUM + regnum);
1570 ax_const_l (ax, 32);
1571 ax_simple (ax, aop_lsh);
1572 ax_simple (ax, aop_bit_or);
1573 }
1574 else if (regnum_is_vxr_full (tdep, regnum))
1575 {
1576 /* Too large to stuff on the stack. */
1577 return 1;
1578 }
1579 else
1580 {
1581 internal_error (_("invalid regnum"));
1582 }
1583 return 0;
1584 }
1585
1586 /* The "gen_return_address" gdbarch method. Since this is supposed to be
1587 just a best-effort method, and we don't really have the means to run
1588 the full unwinder here, just collect the link register. */
1589
1590 static void
1591 s390_gen_return_address (struct gdbarch *gdbarch,
1592 struct agent_expr *ax, struct axs_value *value,
1593 CORE_ADDR scope)
1594 {
1595 value->type = register_type (gdbarch, S390_R14_REGNUM);
1596 value->kind = axs_lvalue_register;
1597 value->u.reg = S390_R14_REGNUM;
1598 }
1599
1600 /* Address handling. */
1601
1602 /* Implement addr_bits_remove gdbarch method.
1603 Only used for ABI_LINUX_S390. */
1604
1605 static CORE_ADDR
1606 s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
1607 {
1608 return addr & 0x7fffffff;
1609 }
1610
1611 /* Implement addr_class_type_flags gdbarch method.
1612 Only used for ABI_LINUX_ZSERIES. */
1613
1614 static type_instance_flags
1615 s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
1616 {
1617 if (byte_size == 4)
1618 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
1619 else
1620 return 0;
1621 }
1622
1623 /* Implement addr_class_type_flags_to_name gdbarch method.
1624 Only used for ABI_LINUX_ZSERIES. */
1625
1626 static const char *
1627 s390_address_class_type_flags_to_name (struct gdbarch *gdbarch,
1628 type_instance_flags type_flags)
1629 {
1630 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
1631 return "mode32";
1632 else
1633 return NULL;
1634 }
1635
1636 /* Implement addr_class_name_to_type_flags gdbarch method.
1637 Only used for ABI_LINUX_ZSERIES. */
1638
1639 static bool
1640 s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
1641 const char *name,
1642 type_instance_flags *type_flags_ptr)
1643 {
1644 if (strcmp (name, "mode32") == 0)
1645 {
1646 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
1647 return true;
1648 }
1649 else
1650 return false;
1651 }
1652
1653 /* Inferior function calls. */
1654
1655 /* Dummy function calls. */
1656
1657 /* Unwrap any single-field structs in TYPE and return the effective
1658 "inner" type. E.g., yield "float" for all these cases:
1659
1660 float x;
1661 struct { float x };
1662 struct { struct { float x; } x; };
1663 struct { struct { struct { float x; } x; } x; };
1664
1665 However, if an inner type is smaller than MIN_SIZE, abort the
1666 unwrapping. */
1667
1668 static struct type *
1669 s390_effective_inner_type (struct type *type, unsigned int min_size)
1670 {
1671 while (type->code () == TYPE_CODE_STRUCT)
1672 {
1673 struct type *inner = NULL;
1674
1675 /* Find a non-static field, if any. Unless there's exactly one,
1676 abort the unwrapping. */
1677 for (int i = 0; i < type->num_fields (); i++)
1678 {
1679 struct field f = type->field (i);
1680
1681 if (f.is_static ())
1682 continue;
1683 if (inner != NULL)
1684 return type;
1685 inner = f.type ();
1686 }
1687
1688 if (inner == NULL)
1689 break;
1690 inner = check_typedef (inner);
1691 if (inner->length () < min_size)
1692 break;
1693 type = inner;
1694 }
1695
1696 return type;
1697 }
1698
1699 /* Return non-zero if TYPE should be passed like "float" or
1700 "double". */
1701
1702 static int
1703 s390_function_arg_float (struct type *type)
1704 {
1705 /* Note that long double as well as complex types are intentionally
1706 excluded. */
1707 if (type->length () > 8)
1708 return 0;
1709
1710 /* A struct containing just a float or double is passed like a float
1711 or double. */
1712 type = s390_effective_inner_type (type, 0);
1713
1714 return (type->code () == TYPE_CODE_FLT
1715 || type->code () == TYPE_CODE_DECFLOAT);
1716 }
1717
1718 /* Return non-zero if TYPE should be passed like a vector. */
1719
1720 static int
1721 s390_function_arg_vector (struct type *type)
1722 {
1723 if (type->length () > 16)
1724 return 0;
1725
1726 /* Structs containing just a vector are passed like a vector. */
1727 type = s390_effective_inner_type (type, type->length ());
1728
1729 return type->code () == TYPE_CODE_ARRAY && type->is_vector ();
1730 }
1731
1732 /* Determine whether N is a power of two. */
1733
1734 static int
1735 is_power_of_two (unsigned int n)
1736 {
1737 return n && ((n & (n - 1)) == 0);
1738 }
1739
1740 /* For an argument whose type is TYPE and which is not passed like a
1741 float or vector, return non-zero if it should be passed like "int"
1742 or "long long". */
1743
1744 static int
1745 s390_function_arg_integer (struct type *type)
1746 {
1747 enum type_code code = type->code ();
1748
1749 if (type->length () > 8)
1750 return 0;
1751
1752 if (code == TYPE_CODE_INT
1753 || code == TYPE_CODE_ENUM
1754 || code == TYPE_CODE_RANGE
1755 || code == TYPE_CODE_CHAR
1756 || code == TYPE_CODE_BOOL
1757 || code == TYPE_CODE_PTR
1758 || TYPE_IS_REFERENCE (type))
1759 return 1;
1760
1761 return ((code == TYPE_CODE_UNION || code == TYPE_CODE_STRUCT)
1762 && is_power_of_two (type->length ()));
1763 }
1764
1765 /* Argument passing state: Internal data structure passed to helper
1766 routines of s390_push_dummy_call. */
1767
1768 struct s390_arg_state
1769 {
1770 /* Register cache, or NULL, if we are in "preparation mode". */
1771 struct regcache *regcache;
1772 /* Next available general/floating-point/vector register for
1773 argument passing. */
1774 int gr, fr, vr;
1775 /* Current pointer to copy area (grows downwards). */
1776 CORE_ADDR copy;
1777 /* Current pointer to parameter area (grows upwards). */
1778 CORE_ADDR argp;
1779 };
1780
1781 /* Prepare one argument ARG for a dummy call and update the argument
1782 passing state AS accordingly. If the regcache field in AS is set,
1783 operate in "write mode" and write ARG into the inferior. Otherwise
1784 run "preparation mode" and skip all updates to the inferior. */
1785
1786 static void
1787 s390_handle_arg (struct s390_arg_state *as, struct value *arg,
1788 s390_gdbarch_tdep *tdep, int word_size,
1789 enum bfd_endian byte_order, int is_unnamed)
1790 {
1791 struct type *type = check_typedef (arg->type ());
1792 unsigned int length = type->length ();
1793 int write_mode = as->regcache != NULL;
1794
1795 if (s390_function_arg_float (type))
1796 {
1797 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass
1798 arguments. The GNU/Linux for zSeries ABI uses 0, 2, 4, and
1799 6. */
1800 if (as->fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
1801 {
1802 /* When we store a single-precision value in an FP register,
1803 it occupies the leftmost bits. */
1804 if (write_mode)
1805 as->regcache->cooked_write_part (S390_F0_REGNUM + as->fr, 0, length,
1806 arg->contents ().data ());
1807 as->fr += 2;
1808 }
1809 else
1810 {
1811 /* When we store a single-precision value in a stack slot,
1812 it occupies the rightmost bits. */
1813 as->argp = align_up (as->argp + length, word_size);
1814 if (write_mode)
1815 write_memory (as->argp - length, arg->contents ().data (),
1816 length);
1817 }
1818 }
1819 else if (tdep->vector_abi == S390_VECTOR_ABI_128
1820 && s390_function_arg_vector (type))
1821 {
1822 static const char use_vr[] = {24, 26, 28, 30, 25, 27, 29, 31};
1823
1824 if (!is_unnamed && as->vr < ARRAY_SIZE (use_vr))
1825 {
1826 int regnum = S390_V24_REGNUM + use_vr[as->vr] - 24;
1827
1828 if (write_mode)
1829 as->regcache->cooked_write_part (regnum, 0, length,
1830 arg->contents ().data ());
1831 as->vr++;
1832 }
1833 else
1834 {
1835 if (write_mode)
1836 write_memory (as->argp, arg->contents ().data (), length);
1837 as->argp = align_up (as->argp + length, word_size);
1838 }
1839 }
1840 else if (s390_function_arg_integer (type) && length <= word_size)
1841 {
1842 /* Initialize it just to avoid a GCC false warning. */
1843 ULONGEST val = 0;
1844
1845 if (write_mode)
1846 {
1847 /* Place value in least significant bits of the register or
1848 memory word and sign- or zero-extend to full word size.
1849 This also applies to a struct or union. */
1850 val = type->is_unsigned ()
1851 ? extract_unsigned_integer (arg->contents ().data (),
1852 length, byte_order)
1853 : extract_signed_integer (arg->contents ().data (),
1854 length, byte_order);
1855 }
1856
1857 if (as->gr <= 6)
1858 {
1859 if (write_mode)
1860 regcache_cooked_write_unsigned (as->regcache,
1861 S390_R0_REGNUM + as->gr,
1862 val);
1863 as->gr++;
1864 }
1865 else
1866 {
1867 if (write_mode)
1868 write_memory_unsigned_integer (as->argp, word_size,
1869 byte_order, val);
1870 as->argp += word_size;
1871 }
1872 }
1873 else if (s390_function_arg_integer (type) && length == 8)
1874 {
1875 if (as->gr <= 5)
1876 {
1877 if (write_mode)
1878 {
1879 as->regcache->cooked_write (S390_R0_REGNUM + as->gr,
1880 arg->contents ().data ());
1881 as->regcache->cooked_write
1882 (S390_R0_REGNUM + as->gr + 1,
1883 arg->contents ().data () + word_size);
1884 }
1885 as->gr += 2;
1886 }
1887 else
1888 {
1889 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
1890 in it, then don't go back and use it again later. */
1891 as->gr = 7;
1892
1893 if (write_mode)
1894 write_memory (as->argp, arg->contents ().data (), length);
1895 as->argp += length;
1896 }
1897 }
1898 else
1899 {
1900 /* This argument type is never passed in registers. Place the
1901 value in the copy area and pass a pointer to it. Use 8-byte
1902 alignment as a conservative assumption. */
1903 as->copy = align_down (as->copy - length, 8);
1904 if (write_mode)
1905 write_memory (as->copy, arg->contents ().data (), length);
1906
1907 if (as->gr <= 6)
1908 {
1909 if (write_mode)
1910 regcache_cooked_write_unsigned (as->regcache,
1911 S390_R0_REGNUM + as->gr,
1912 as->copy);
1913 as->gr++;
1914 }
1915 else
1916 {
1917 if (write_mode)
1918 write_memory_unsigned_integer (as->argp, word_size,
1919 byte_order, as->copy);
1920 as->argp += word_size;
1921 }
1922 }
1923 }
1924
1925 /* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
1926 place to be passed to a function, as specified by the "GNU/Linux
1927 for S/390 ELF Application Binary Interface Supplement".
1928
1929 SP is the current stack pointer. We must put arguments, links,
1930 padding, etc. wherever they belong, and return the new stack
1931 pointer value.
1932
1933 If STRUCT_RETURN is non-zero, then the function we're calling is
1934 going to return a structure by value; STRUCT_ADDR is the address of
1935 a block we've allocated for it on the stack.
1936
1937 Our caller has taken care of any type promotions needed to satisfy
1938 prototypes or the old K&R argument-passing rules. */
1939
1940 static CORE_ADDR
1941 s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1942 struct regcache *regcache, CORE_ADDR bp_addr,
1943 int nargs, struct value **args, CORE_ADDR sp,
1944 function_call_return_method return_method,
1945 CORE_ADDR struct_addr)
1946 {
1947 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
1948 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1949 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1950 int i;
1951 struct s390_arg_state arg_state, arg_prep;
1952 CORE_ADDR param_area_start, new_sp;
1953 struct type *ftype = check_typedef (function->type ());
1954
1955 if (ftype->code () == TYPE_CODE_PTR)
1956 ftype = check_typedef (ftype->target_type ());
1957
1958 arg_prep.copy = sp;
1959 arg_prep.gr = (return_method == return_method_struct) ? 3 : 2;
1960 arg_prep.fr = 0;
1961 arg_prep.vr = 0;
1962 arg_prep.argp = 0;
1963 arg_prep.regcache = NULL;
1964
1965 /* Initialize arg_state for "preparation mode". */
1966 arg_state = arg_prep;
1967
1968 /* Update arg_state.copy with the start of the reference-to-copy area
1969 and arg_state.argp with the size of the parameter area. */
1970 for (i = 0; i < nargs; i++)
1971 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
1972 ftype->has_varargs () && i >= ftype->num_fields ());
1973
1974 param_area_start = align_down (arg_state.copy - arg_state.argp, 8);
1975
1976 /* Allocate the standard frame areas: the register save area, the
1977 word reserved for the compiler, and the back chain pointer. */
1978 new_sp = param_area_start - (16 * word_size + 32);
1979
1980 /* Now we have the final stack pointer. Make sure we didn't
1981 underflow; on 31-bit, this would result in addresses with the
1982 high bit set, which causes confusion elsewhere. Note that if we
1983 error out here, stack and registers remain untouched. */
1984 if (gdbarch_addr_bits_remove (gdbarch, new_sp) != new_sp)
1985 error (_("Stack overflow"));
1986
1987 /* Pass the structure return address in general register 2. */
1988 if (return_method == return_method_struct)
1989 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM, struct_addr);
1990
1991 /* Initialize arg_state for "write mode". */
1992 arg_state = arg_prep;
1993 arg_state.argp = param_area_start;
1994 arg_state.regcache = regcache;
1995
1996 /* Write all parameters. */
1997 for (i = 0; i < nargs; i++)
1998 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
1999 ftype->has_varargs () && i >= ftype->num_fields ());
2000
2001 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
2002 if (word_size == 4)
2003 {
2004 ULONGEST pswa;
2005 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
2006 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000);
2007 }
2008 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
2009
2010 /* Store updated stack pointer. */
2011 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, new_sp);
2012
2013 /* We need to return the 'stack part' of the frame ID,
2014 which is actually the top of the register save area. */
2015 return param_area_start;
2016 }
2017
2018 /* Assuming THIS_FRAME is a dummy, return the frame ID of that
2019 dummy frame. The frame ID's base needs to match the TOS value
2020 returned by push_dummy_call, and the PC match the dummy frame's
2021 breakpoint. */
2022
2023 static struct frame_id
2024 s390_dummy_id (struct gdbarch *gdbarch, const frame_info_ptr &this_frame)
2025 {
2026 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2027 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2028 sp = gdbarch_addr_bits_remove (gdbarch, sp);
2029
2030 return frame_id_build (sp + 16*word_size + 32,
2031 get_frame_pc (this_frame));
2032 }
2033
2034 /* Implement frame_align gdbarch method. */
2035
2036 static CORE_ADDR
2037 s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2038 {
2039 /* Both the 32- and 64-bit ABI's say that the stack pointer should
2040 always be aligned on an eight-byte boundary. */
2041 return (addr & -8);
2042 }
2043
2044 /* Helper for s390_return_value: Set or retrieve a function return
2045 value if it resides in a register. */
2046
2047 static void
2048 s390_register_return_value (struct gdbarch *gdbarch, struct type *type,
2049 struct regcache *regcache,
2050 gdb_byte *out, const gdb_byte *in)
2051 {
2052 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2053 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2054 int length = type->length ();
2055 int code = type->code ();
2056
2057 if (code == TYPE_CODE_FLT || code == TYPE_CODE_DECFLOAT)
2058 {
2059 /* Float-like value: left-aligned in f0. */
2060 if (in != NULL)
2061 regcache->cooked_write_part (S390_F0_REGNUM, 0, length, in);
2062 else
2063 regcache->cooked_read_part (S390_F0_REGNUM, 0, length, out);
2064 }
2065 else if (code == TYPE_CODE_ARRAY)
2066 {
2067 /* Vector: left-aligned in v24. */
2068 if (in != NULL)
2069 regcache->cooked_write_part (S390_V24_REGNUM, 0, length, in);
2070 else
2071 regcache->cooked_read_part (S390_V24_REGNUM, 0, length, out);
2072 }
2073 else if (length <= word_size)
2074 {
2075 /* Integer: zero- or sign-extended in r2. */
2076 if (out != NULL)
2077 regcache->cooked_read_part (S390_R2_REGNUM, word_size - length, length,
2078 out);
2079 else if (type->is_unsigned ())
2080 regcache_cooked_write_unsigned
2081 (regcache, S390_R2_REGNUM,
2082 extract_unsigned_integer (in, length, byte_order));
2083 else
2084 regcache_cooked_write_signed
2085 (regcache, S390_R2_REGNUM,
2086 extract_signed_integer (in, length, byte_order));
2087 }
2088 else if (length == 2 * word_size)
2089 {
2090 /* Double word: in r2 and r3. */
2091 if (in != NULL)
2092 {
2093 regcache->cooked_write (S390_R2_REGNUM, in);
2094 regcache->cooked_write (S390_R3_REGNUM, in + word_size);
2095 }
2096 else
2097 {
2098 regcache->cooked_read (S390_R2_REGNUM, out);
2099 regcache->cooked_read (S390_R3_REGNUM, out + word_size);
2100 }
2101 }
2102 else
2103 internal_error (_("invalid return type"));
2104 }
2105
2106 /* Implement the 'return_value' gdbarch method. */
2107
2108 static enum return_value_convention
2109 s390_return_value (struct gdbarch *gdbarch, struct value *function,
2110 struct type *type, struct regcache *regcache,
2111 gdb_byte *out, const gdb_byte *in)
2112 {
2113 enum return_value_convention rvc;
2114
2115 type = check_typedef (type);
2116
2117 switch (type->code ())
2118 {
2119 case TYPE_CODE_STRUCT:
2120 case TYPE_CODE_UNION:
2121 case TYPE_CODE_COMPLEX:
2122 rvc = RETURN_VALUE_STRUCT_CONVENTION;
2123 break;
2124 case TYPE_CODE_ARRAY:
2125 {
2126 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
2127 rvc = (tdep->vector_abi == S390_VECTOR_ABI_128
2128 && type->length () <= 16 && type->is_vector ())
2129 ? RETURN_VALUE_REGISTER_CONVENTION
2130 : RETURN_VALUE_STRUCT_CONVENTION;
2131 break;
2132 }
2133 default:
2134 rvc = type->length () <= 8
2135 ? RETURN_VALUE_REGISTER_CONVENTION
2136 : RETURN_VALUE_STRUCT_CONVENTION;
2137 }
2138
2139 if (in != NULL || out != NULL)
2140 {
2141 if (rvc == RETURN_VALUE_REGISTER_CONVENTION)
2142 s390_register_return_value (gdbarch, type, regcache, out, in);
2143 else if (in != NULL)
2144 error (_("Cannot set function return value."));
2145 else
2146 error (_("Function return value unknown."));
2147 }
2148
2149 return rvc;
2150 }
2151
2152 /* Try to get the value of DWARF_REG in FRAME at function entry. If successful,
2153 return it as value of type VAL_TYPE. */
2154
2155 static struct value *
2156 dwarf_reg_on_entry (int dwarf_reg, struct type *val_type,
2157 const frame_info_ptr &frame)
2158 {
2159 enum call_site_parameter_kind kind = CALL_SITE_PARAMETER_DWARF_REG;
2160 union call_site_parameter_u kind_u = { .dwarf_reg = dwarf_reg };
2161
2162 try
2163 {
2164 return value_of_dwarf_reg_entry (val_type, frame, kind, kind_u);
2165 }
2166 catch (const gdb_exception_error &e)
2167 {
2168 if (e.error == NO_ENTRY_VALUE_ERROR)
2169 return nullptr;
2170
2171 throw;
2172 }
2173 }
2174
2175 /* Both the 32-bit and 64-bit ABIs specify that values of some types are
2176 returned in a storage buffer provided by the caller. Return the address of
2177 that storage buffer, if possible. Implements the
2178 gdbarch_get_return_buf_addr hook. */
2179
2180 static CORE_ADDR
2181 s390_get_return_buf_addr (struct type *val_type,
2182 const frame_info_ptr &cur_frame)
2183 {
2184 /* The address of the storage buffer is provided as a hidden argument in
2185 register r2. */
2186 int dwarf_reg = 2;
2187
2188 /* The ABI does not guarantee that the register will not be changed while
2189 executing the function. Hence, it cannot be assumed that it will still
2190 contain the address of the storage buffer when execution reaches the end
2191 of the function.
2192
2193 Attempt to determine the value on entry using the DW_OP_entry_value DWARF
2194 entries. This requires compiling the user program with -fvar-tracking. */
2195 struct value *val_on_entry
2196 = dwarf_reg_on_entry (dwarf_reg, lookup_pointer_type (val_type), cur_frame);
2197
2198 if (val_on_entry == nullptr)
2199 {
2200 warning ("Cannot determine the function return value.\n"
2201 "Try compiling with -fvar-tracking.");
2202 return 0;
2203 }
2204
2205 return value_as_address (val_on_entry);
2206 }
2207
2208 /* Frame unwinding. */
2209
2210 /* Implement the stack_frame_destroyed_p gdbarch method. */
2211
2212 static int
2213 s390_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
2214 {
2215 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2216
2217 /* In frameless functions, there's no frame to destroy and thus
2218 we don't care about the epilogue.
2219
2220 In functions with frame, the epilogue sequence is a pair of
2221 a LM-type instruction that restores (amongst others) the
2222 return register %r14 and the stack pointer %r15, followed
2223 by a branch 'br %r14' --or equivalent-- that effects the
2224 actual return.
2225
2226 In that situation, this function needs to return 'true' in
2227 exactly one case: when pc points to that branch instruction.
2228
2229 Thus we try to disassemble the one instructions immediately
2230 preceding pc and check whether it is an LM-type instruction
2231 modifying the stack pointer.
2232
2233 Note that disassembling backwards is not reliable, so there
2234 is a slight chance of false positives here ... */
2235
2236 bfd_byte insn[6];
2237 unsigned int r1, r3, b2;
2238 int d2;
2239
2240 if (word_size == 4
2241 && !target_read_memory (pc - 4, insn, 4)
2242 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
2243 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2244 return 1;
2245
2246 if (word_size == 4
2247 && !target_read_memory (pc - 6, insn, 6)
2248 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
2249 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2250 return 1;
2251
2252 if (word_size == 8
2253 && !target_read_memory (pc - 6, insn, 6)
2254 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
2255 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2256 return 1;
2257
2258 return 0;
2259 }
2260
2261 /* Implement unwind_pc gdbarch method. */
2262
2263 static CORE_ADDR
2264 s390_unwind_pc (struct gdbarch *gdbarch, const frame_info_ptr &next_frame)
2265 {
2266 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
2267 ULONGEST pc;
2268 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
2269 return gdbarch_addr_bits_remove (gdbarch, pc);
2270 }
2271
2272 /* Implement unwind_sp gdbarch method. */
2273
2274 static CORE_ADDR
2275 s390_unwind_sp (struct gdbarch *gdbarch, const frame_info_ptr &next_frame)
2276 {
2277 ULONGEST sp;
2278 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2279 return gdbarch_addr_bits_remove (gdbarch, sp);
2280 }
2281
2282 /* Helper routine to unwind pseudo registers. */
2283
2284 static struct value *
2285 s390_unwind_pseudo_register (const frame_info_ptr &this_frame, int regnum)
2286 {
2287 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2288 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
2289 struct type *type = register_type (gdbarch, regnum);
2290
2291 /* Unwind PC via PSW address. */
2292 if (regnum == tdep->pc_regnum)
2293 {
2294 struct value *val;
2295
2296 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
2297 if (!val->optimized_out ())
2298 {
2299 LONGEST pswa = value_as_long (val);
2300
2301 if (type->length () == 4)
2302 return value_from_pointer (type, pswa & 0x7fffffff);
2303 else
2304 return value_from_pointer (type, pswa);
2305 }
2306 }
2307
2308 /* Unwind CC via PSW mask. */
2309 if (regnum == tdep->cc_regnum)
2310 {
2311 struct value *val;
2312
2313 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
2314 if (!val->optimized_out ())
2315 {
2316 LONGEST pswm = value_as_long (val);
2317
2318 if (type->length () == 4)
2319 return value_from_longest (type, (pswm >> 12) & 3);
2320 else
2321 return value_from_longest (type, (pswm >> 44) & 3);
2322 }
2323 }
2324
2325 /* Unwind full GPRs to show at least the lower halves (as the
2326 upper halves are undefined). */
2327 if (regnum_is_gpr_full (tdep, regnum))
2328 {
2329 int reg = regnum - tdep->gpr_full_regnum;
2330 struct value *val;
2331
2332 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
2333 if (!val->optimized_out ())
2334 return value_cast (type, val);
2335 }
2336
2337 if (regnum_is_vxr_full (tdep, regnum))
2338 {
2339 struct value *val = value::allocate_register (this_frame, regnum);
2340
2341 int reg = regnum - tdep->v0_full_regnum;
2342 struct value *val1
2343 = frame_unwind_register_value (this_frame, S390_F0_REGNUM + reg);
2344 struct value *val2
2345 = frame_unwind_register_value (this_frame, S390_V0_LOWER_REGNUM + reg);
2346
2347 val1->contents_copy (val, 0, 0, 8);
2348 val2->contents_copy (val, 8, 0, 8);
2349
2350 return value_cast (type, val);
2351 }
2352
2353 return value::allocate_optimized_out (type);
2354 }
2355
2356 /* Translate a .eh_frame register to DWARF register, or adjust a
2357 .debug_frame register. */
2358
2359 static int
2360 s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
2361 {
2362 /* See s390_dwarf_reg_to_regnum for comments. */
2363 return (num >= 0 && num < 16) ? num + s390_dwarf_reg_r0l : num;
2364 }
2365
2366 /* DWARF-2 frame unwinding. */
2367
2368 /* Function to unwind a pseudo-register in dwarf2_frame unwinder. Used by
2369 s390_dwarf2_frame_init_reg. */
2370
2371 static struct value *
2372 s390_dwarf2_prev_register (const frame_info_ptr &this_frame, void **this_cache,
2373 int regnum)
2374 {
2375 return s390_unwind_pseudo_register (this_frame, regnum);
2376 }
2377
2378 /* Implement init_reg dwarf2_frame method. */
2379
2380 static void
2381 s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
2382 struct dwarf2_frame_state_reg *reg,
2383 const frame_info_ptr &this_frame)
2384 {
2385 /* The condition code (and thus PSW mask) is call-clobbered. */
2386 if (regnum == S390_PSWM_REGNUM)
2387 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2388
2389 /* The PSW address unwinds to the return address. */
2390 else if (regnum == S390_PSWA_REGNUM)
2391 reg->how = DWARF2_FRAME_REG_RA;
2392
2393 /* Fixed registers are call-saved or call-clobbered
2394 depending on the ABI in use. */
2395 else if (regnum < S390_NUM_REGS)
2396 {
2397 if (s390_register_call_saved (gdbarch, regnum))
2398 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
2399 else
2400 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2401 }
2402
2403 /* We install a special function to unwind pseudos. */
2404 else
2405 {
2406 reg->how = DWARF2_FRAME_REG_FN;
2407 reg->loc.fn = s390_dwarf2_prev_register;
2408 }
2409 }
2410
2411 /* Frame unwinding. */
2412
2413 /* Wrapper for trad_frame_get_prev_register to allow for s390 pseudo
2414 register translation. */
2415
2416 struct value *
2417 s390_trad_frame_prev_register (const frame_info_ptr &this_frame,
2418 trad_frame_saved_reg saved_regs[],
2419 int regnum)
2420 {
2421 if (regnum < S390_NUM_REGS)
2422 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
2423 else
2424 return s390_unwind_pseudo_register (this_frame, regnum);
2425 }
2426
2427 /* Normal stack frames. */
2428
2429 struct s390_unwind_cache {
2430
2431 CORE_ADDR func;
2432 CORE_ADDR frame_base;
2433 CORE_ADDR local_base;
2434
2435 trad_frame_saved_reg *saved_regs;
2436 };
2437
2438 /* Unwind THIS_FRAME and write the information into unwind cache INFO using
2439 prologue analysis. Helper for s390_frame_unwind_cache. */
2440
2441 static int
2442 s390_prologue_frame_unwind_cache (const frame_info_ptr &this_frame,
2443 struct s390_unwind_cache *info)
2444 {
2445 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2446 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2447 struct s390_prologue_data data;
2448 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
2449 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
2450 int i;
2451 CORE_ADDR cfa;
2452 CORE_ADDR func;
2453 CORE_ADDR result;
2454 ULONGEST reg;
2455 CORE_ADDR prev_sp;
2456 int frame_pointer;
2457 int size;
2458 frame_info_ptr next_frame;
2459
2460 /* Try to find the function start address. If we can't find it, we don't
2461 bother searching for it -- with modern compilers this would be mostly
2462 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
2463 or else a valid backchain ... */
2464 if (!get_frame_func_if_available (this_frame, &info->func))
2465 {
2466 info->func = -1;
2467 return 0;
2468 }
2469 func = info->func;
2470
2471 /* Try to analyze the prologue. */
2472 result = s390_analyze_prologue (gdbarch, func,
2473 get_frame_pc (this_frame), &data);
2474 if (!result)
2475 return 0;
2476
2477 /* If this was successful, we should have found the instruction that
2478 sets the stack pointer register to the previous value of the stack
2479 pointer minus the frame size. */
2480 if (!pv_is_register (*sp, S390_SP_REGNUM))
2481 return 0;
2482
2483 /* A frame size of zero at this point can mean either a real
2484 frameless function, or else a failure to find the prologue.
2485 Perform some sanity checks to verify we really have a
2486 frameless function. */
2487 if (sp->k == 0)
2488 {
2489 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
2490 size zero. This is only possible if the next frame is a sentinel
2491 frame, a dummy frame, or a signal trampoline frame. */
2492 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
2493 needed, instead the code should simply rely on its
2494 analysis. */
2495 next_frame = get_next_frame (this_frame);
2496 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2497 next_frame = get_next_frame (next_frame);
2498 if (next_frame
2499 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
2500 return 0;
2501
2502 /* If we really have a frameless function, %r14 must be valid
2503 -- in particular, it must point to a different function. */
2504 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
2505 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
2506 if (get_pc_function_start (reg) == func)
2507 {
2508 /* However, there is one case where it *is* valid for %r14
2509 to point to the same function -- if this is a recursive
2510 call, and we have stopped in the prologue *before* the
2511 stack frame was allocated.
2512
2513 Recognize this case by looking ahead a bit ... */
2514
2515 struct s390_prologue_data data2;
2516 pv_t *sp2 = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
2517
2518 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
2519 && pv_is_register (*sp2, S390_SP_REGNUM)
2520 && sp2->k != 0))
2521 return 0;
2522 }
2523 }
2524
2525 /* OK, we've found valid prologue data. */
2526 size = -sp->k;
2527
2528 /* If the frame pointer originally also holds the same value
2529 as the stack pointer, we're probably using it. If it holds
2530 some other value -- even a constant offset -- it is most
2531 likely used as temp register. */
2532 if (pv_is_identical (*sp, *fp))
2533 frame_pointer = S390_FRAME_REGNUM;
2534 else
2535 frame_pointer = S390_SP_REGNUM;
2536
2537 /* If we've detected a function with stack frame, we'll still have to
2538 treat it as frameless if we're currently within the function epilog
2539 code at a point where the frame pointer has already been restored.
2540 This can only happen in an innermost frame. */
2541 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
2542 instead the code should simply rely on its analysis. */
2543 next_frame = get_next_frame (this_frame);
2544 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2545 next_frame = get_next_frame (next_frame);
2546 if (size > 0
2547 && (next_frame == NULL
2548 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
2549 {
2550 /* See the comment in s390_stack_frame_destroyed_p on why this is
2551 not completely reliable ... */
2552 if (s390_stack_frame_destroyed_p (gdbarch, get_frame_pc (this_frame)))
2553 {
2554 memset (&data, 0, sizeof (data));
2555 size = 0;
2556 frame_pointer = S390_SP_REGNUM;
2557 }
2558 }
2559
2560 /* Once we know the frame register and the frame size, we can unwind
2561 the current value of the frame register from the next frame, and
2562 add back the frame size to arrive that the previous frame's
2563 stack pointer value. */
2564 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
2565 cfa = prev_sp + 16*word_size + 32;
2566
2567 /* Set up ABI call-saved/call-clobbered registers. */
2568 for (i = 0; i < S390_NUM_REGS; i++)
2569 if (!s390_register_call_saved (gdbarch, i))
2570 info->saved_regs[i].set_unknown ();
2571
2572 /* CC is always call-clobbered. */
2573 info->saved_regs[S390_PSWM_REGNUM].set_unknown ();
2574
2575 /* Record the addresses of all register spill slots the prologue parser
2576 has recognized. Consider only registers defined as call-saved by the
2577 ABI; for call-clobbered registers the parser may have recognized
2578 spurious stores. */
2579
2580 for (i = 0; i < S390_NUM_GPRS; i++)
2581 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
2582 && data.gpr_slot[i] != 0)
2583 info->saved_regs[S390_R0_REGNUM + i].set_addr (cfa - data.gpr_slot[i]);
2584
2585 for (i = 0; i < S390_NUM_FPRS; i++)
2586 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
2587 && data.fpr_slot[i] != 0)
2588 info->saved_regs[S390_F0_REGNUM + i].set_addr (cfa - data.fpr_slot[i]);
2589
2590 /* Handle this type of prologue:
2591 ldgr %f2,%r11
2592 ldgr %f0,%r15
2593 where call-clobbered floating point registers are used as register save
2594 slots. */
2595 for (i = 0; i < S390_NUM_FPRS; i++)
2596 {
2597 int fpr = S390_F0_REGNUM + i;
2598
2599 /* Check that fpr is a call-clobbered register. */
2600 if (s390_register_call_saved (gdbarch, fpr))
2601 continue;
2602
2603 /* Check that fpr contains the value of a register at function
2604 entry. */
2605 if (data.fpr[i].kind != pvk_register)
2606 continue;
2607
2608 int entry_val_reg = data.fpr[i].reg;
2609
2610 /* Check that entry_val_reg is a call-saved register. */
2611 if (!s390_register_call_saved (gdbarch, entry_val_reg))
2612 continue;
2613
2614 /* In the prologue, we've copied:
2615 - the value of a call-saved register (entry_val_reg) at function
2616 entry, to
2617 - a call-clobbered floating point register (fpr).
2618
2619 Heuristic: assume that makes the floating point register a register
2620 save slot, leaving the value constant throughout the function. */
2621 info->saved_regs[entry_val_reg].set_realreg (fpr);
2622 }
2623
2624 /* Function return will set PC to %r14. */
2625 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
2626
2627 /* In frameless functions, we unwind simply by moving the return
2628 address to the PC. However, if we actually stored to the
2629 save area, use that -- we might only think the function frameless
2630 because we're in the middle of the prologue ... */
2631 if (size == 0
2632 && !info->saved_regs[S390_PSWA_REGNUM].is_addr ())
2633 {
2634 info->saved_regs[S390_PSWA_REGNUM].set_realreg (S390_RETADDR_REGNUM);
2635 }
2636
2637 /* Another sanity check: unless this is a frameless function,
2638 we should have found spill slots for SP and PC.
2639 If not, we cannot unwind further -- this happens e.g. in
2640 libc's thread_start routine. */
2641 if (size > 0)
2642 {
2643 if (!info->saved_regs[S390_SP_REGNUM].is_addr ()
2644 || !info->saved_regs[S390_PSWA_REGNUM].is_addr ())
2645 prev_sp = -1;
2646 }
2647
2648 /* We use the current value of the frame register as local_base,
2649 and the top of the register save area as frame_base. */
2650 if (prev_sp != -1)
2651 {
2652 info->frame_base = prev_sp + 16*word_size + 32;
2653 info->local_base = prev_sp - size;
2654 }
2655
2656 return 1;
2657 }
2658
2659 /* Unwind THIS_FRAME and write the information into unwind cache INFO using
2660 back chain unwinding. Helper for s390_frame_unwind_cache. */
2661
2662 static void
2663 s390_backchain_frame_unwind_cache (const frame_info_ptr &this_frame,
2664 struct s390_unwind_cache *info)
2665 {
2666 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2667 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2668 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2669 CORE_ADDR backchain;
2670 ULONGEST reg;
2671 LONGEST sp, tmp;
2672 int i;
2673
2674 /* Set up ABI call-saved/call-clobbered registers. */
2675 for (i = 0; i < S390_NUM_REGS; i++)
2676 if (!s390_register_call_saved (gdbarch, i))
2677 info->saved_regs[i].set_unknown ();
2678
2679 /* CC is always call-clobbered. */
2680 info->saved_regs[S390_PSWM_REGNUM].set_unknown ();
2681
2682 /* Get the backchain. */
2683 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2684 if (!safe_read_memory_integer (reg, word_size, byte_order, &tmp))
2685 tmp = 0;
2686 backchain = (CORE_ADDR) tmp;
2687
2688 /* A zero backchain terminates the frame chain. As additional
2689 sanity check, let's verify that the spill slot for SP in the
2690 save area pointed to by the backchain in fact links back to
2691 the save area. */
2692 if (backchain != 0
2693 && safe_read_memory_integer (backchain + 15*word_size,
2694 word_size, byte_order, &sp)
2695 && (CORE_ADDR)sp == backchain)
2696 {
2697 /* We don't know which registers were saved, but it will have
2698 to be at least %r14 and %r15. This will allow us to continue
2699 unwinding, but other prev-frame registers may be incorrect ... */
2700 info->saved_regs[S390_SP_REGNUM].set_addr (backchain + 15*word_size);
2701 info->saved_regs[S390_RETADDR_REGNUM].set_addr (backchain + 14*word_size);
2702
2703 /* Function return will set PC to %r14. */
2704 info->saved_regs[S390_PSWA_REGNUM]
2705 = info->saved_regs[S390_RETADDR_REGNUM];
2706
2707 /* We use the current value of the frame register as local_base,
2708 and the top of the register save area as frame_base. */
2709 info->frame_base = backchain + 16*word_size + 32;
2710 info->local_base = reg;
2711 }
2712
2713 info->func = get_frame_pc (this_frame);
2714 }
2715
2716 /* Unwind THIS_FRAME and return the corresponding unwind cache for
2717 s390_frame_unwind and s390_frame_base. */
2718
2719 static struct s390_unwind_cache *
2720 s390_frame_unwind_cache (const frame_info_ptr &this_frame,
2721 void **this_prologue_cache)
2722 {
2723 struct s390_unwind_cache *info;
2724
2725 if (*this_prologue_cache)
2726 return (struct s390_unwind_cache *) *this_prologue_cache;
2727
2728 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
2729 *this_prologue_cache = info;
2730 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
2731 info->func = -1;
2732 info->frame_base = -1;
2733 info->local_base = -1;
2734
2735 try
2736 {
2737 /* Try to use prologue analysis to fill the unwind cache.
2738 If this fails, fall back to reading the stack backchain. */
2739 if (!s390_prologue_frame_unwind_cache (this_frame, info))
2740 s390_backchain_frame_unwind_cache (this_frame, info);
2741 }
2742 catch (const gdb_exception_error &ex)
2743 {
2744 if (ex.error != NOT_AVAILABLE_ERROR)
2745 throw;
2746 }
2747
2748 return info;
2749 }
2750
2751 /* Implement this_id frame_unwind method for s390_frame_unwind. */
2752
2753 static void
2754 s390_frame_this_id (const frame_info_ptr &this_frame,
2755 void **this_prologue_cache,
2756 struct frame_id *this_id)
2757 {
2758 struct s390_unwind_cache *info
2759 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
2760
2761 if (info->frame_base == -1)
2762 {
2763 if (info->func != -1)
2764 *this_id = frame_id_build_unavailable_stack (info->func);
2765 return;
2766 }
2767
2768 *this_id = frame_id_build (info->frame_base, info->func);
2769 }
2770
2771 /* Implement prev_register frame_unwind method for s390_frame_unwind. */
2772
2773 static struct value *
2774 s390_frame_prev_register (const frame_info_ptr &this_frame,
2775 void **this_prologue_cache, int regnum)
2776 {
2777 struct s390_unwind_cache *info
2778 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
2779
2780 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
2781 }
2782
2783 /* Default S390 frame unwinder. */
2784
2785 static const struct frame_unwind_legacy s390_frame_unwind (
2786 "s390 prologue",
2787 NORMAL_FRAME,
2788 FRAME_UNWIND_ARCH,
2789 default_frame_unwind_stop_reason,
2790 s390_frame_this_id,
2791 s390_frame_prev_register,
2792 NULL,
2793 default_frame_sniffer
2794 );
2795
2796 /* Code stubs and their stack frames. For things like PLTs and NULL
2797 function calls (where there is no true frame and the return address
2798 is in the RETADDR register). */
2799
2800 struct s390_stub_unwind_cache
2801 {
2802 CORE_ADDR frame_base;
2803 trad_frame_saved_reg *saved_regs;
2804 };
2805
2806 /* Unwind THIS_FRAME and return the corresponding unwind cache for
2807 s390_stub_frame_unwind. */
2808
2809 static struct s390_stub_unwind_cache *
2810 s390_stub_frame_unwind_cache (const frame_info_ptr &this_frame,
2811 void **this_prologue_cache)
2812 {
2813 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2814 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2815 struct s390_stub_unwind_cache *info;
2816 ULONGEST reg;
2817
2818 if (*this_prologue_cache)
2819 return (struct s390_stub_unwind_cache *) *this_prologue_cache;
2820
2821 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
2822 *this_prologue_cache = info;
2823 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
2824
2825 /* The return address is in register %r14. */
2826 info->saved_regs[S390_PSWA_REGNUM].set_realreg (S390_RETADDR_REGNUM);
2827
2828 /* Retrieve stack pointer and determine our frame base. */
2829 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2830 info->frame_base = reg + 16*word_size + 32;
2831
2832 return info;
2833 }
2834
2835 /* Implement this_id frame_unwind method for s390_stub_frame_unwind. */
2836
2837 static void
2838 s390_stub_frame_this_id (const frame_info_ptr &this_frame,
2839 void **this_prologue_cache,
2840 struct frame_id *this_id)
2841 {
2842 struct s390_stub_unwind_cache *info
2843 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2844 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
2845 }
2846
2847 /* Implement prev_register frame_unwind method for s390_stub_frame_unwind. */
2848
2849 static struct value *
2850 s390_stub_frame_prev_register (const frame_info_ptr &this_frame,
2851 void **this_prologue_cache, int regnum)
2852 {
2853 struct s390_stub_unwind_cache *info
2854 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2855 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
2856 }
2857
2858 /* Implement sniffer frame_unwind method for s390_stub_frame_unwind. */
2859
2860 static int
2861 s390_stub_frame_sniffer (const struct frame_unwind *self,
2862 const frame_info_ptr &this_frame,
2863 void **this_prologue_cache)
2864 {
2865 CORE_ADDR addr_in_block;
2866 bfd_byte insn[S390_MAX_INSTR_SIZE];
2867
2868 /* If the current PC points to non-readable memory, we assume we
2869 have trapped due to an invalid function pointer call. We handle
2870 the non-existing current function like a PLT stub. */
2871 addr_in_block = get_frame_address_in_block (this_frame);
2872 if (in_plt_section (addr_in_block)
2873 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
2874 return 1;
2875 return 0;
2876 }
2877
2878 /* S390 stub frame unwinder. */
2879
2880 static const struct frame_unwind_legacy s390_stub_frame_unwind (
2881 "s390 stub",
2882 NORMAL_FRAME,
2883 FRAME_UNWIND_ARCH,
2884 default_frame_unwind_stop_reason,
2885 s390_stub_frame_this_id,
2886 s390_stub_frame_prev_register,
2887 NULL,
2888 s390_stub_frame_sniffer
2889 );
2890
2891 /* Frame base handling. */
2892
2893 static CORE_ADDR
2894 s390_frame_base_address (const frame_info_ptr &this_frame, void **this_cache)
2895 {
2896 struct s390_unwind_cache *info
2897 = s390_frame_unwind_cache (this_frame, this_cache);
2898 return info->frame_base;
2899 }
2900
2901 static CORE_ADDR
2902 s390_local_base_address (const frame_info_ptr &this_frame, void **this_cache)
2903 {
2904 struct s390_unwind_cache *info
2905 = s390_frame_unwind_cache (this_frame, this_cache);
2906 return info->local_base;
2907 }
2908
2909 static const struct frame_base s390_frame_base = {
2910 &s390_frame_unwind,
2911 s390_frame_base_address,
2912 s390_local_base_address,
2913 s390_local_base_address
2914 };
2915
2916 /* Process record-replay */
2917
2918 /* Takes the intermediate sum of address calculations and masks off upper
2919 bits according to current addressing mode. */
2920
2921 static CORE_ADDR
2922 s390_record_address_mask (struct gdbarch *gdbarch, struct regcache *regcache,
2923 CORE_ADDR val)
2924 {
2925 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
2926 ULONGEST pswm, pswa;
2927 int am;
2928 if (tdep->abi == ABI_LINUX_S390)
2929 {
2930 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
2931 am = pswa >> 31 & 1;
2932 }
2933 else
2934 {
2935 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &pswm);
2936 am = pswm >> 31 & 3;
2937 }
2938 switch (am)
2939 {
2940 case 0:
2941 return val & 0xffffff;
2942 case 1:
2943 return val & 0x7fffffff;
2944 case 3:
2945 return val;
2946 default:
2947 gdb_printf (gdb_stdlog, "Warning: Addressing mode %d used.", am);
2948 return 0;
2949 }
2950 }
2951
2952 /* Calculates memory address using pre-calculated index, raw instruction word
2953 with b and d/dl fields, and raw instruction byte with dh field. Index and
2954 dh should be set to 0 if unused. */
2955
2956 static CORE_ADDR
2957 s390_record_calc_disp_common (struct gdbarch *gdbarch, struct regcache *regcache,
2958 ULONGEST x, uint16_t bd, int8_t dh)
2959 {
2960 uint8_t rb = bd >> 12 & 0xf;
2961 int32_t d = (bd & 0xfff) | ((int32_t)dh << 12);
2962 ULONGEST b;
2963 CORE_ADDR res = d + x;
2964 if (rb)
2965 {
2966 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rb, &b);
2967 res += b;
2968 }
2969 return s390_record_address_mask (gdbarch, regcache, res);
2970 }
2971
2972 /* Calculates memory address using raw x, b + d/dl, dh fields from
2973 instruction. rx and dh should be set to 0 if unused. */
2974
2975 static CORE_ADDR
2976 s390_record_calc_disp (struct gdbarch *gdbarch, struct regcache *regcache,
2977 uint8_t rx, uint16_t bd, int8_t dh)
2978 {
2979 ULONGEST x = 0;
2980 if (rx)
2981 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rx, &x);
2982 return s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
2983 }
2984
2985 /* Calculates memory address for VSCE[GF] instructions. */
2986
2987 static int
2988 s390_record_calc_disp_vsce (struct gdbarch *gdbarch, struct regcache *regcache,
2989 uint8_t vx, uint8_t el, uint8_t es, uint16_t bd,
2990 int8_t dh, CORE_ADDR *res)
2991 {
2992 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
2993 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2994 ULONGEST x;
2995 gdb_byte buf[16];
2996 if (tdep->v0_full_regnum == -1 || el * es >= 16)
2997 return -1;
2998 if (vx < 16)
2999 regcache->cooked_read (tdep->v0_full_regnum + vx, buf);
3000 else
3001 regcache->raw_read (S390_V16_REGNUM + vx - 16, buf);
3002 x = extract_unsigned_integer (buf + el * es, es, byte_order);
3003 *res = s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
3004 return 0;
3005 }
3006
3007 /* Calculates memory address for instructions with relative long addressing. */
3008
3009 static CORE_ADDR
3010 s390_record_calc_rl (struct gdbarch *gdbarch, struct regcache *regcache,
3011 CORE_ADDR addr, uint16_t i1, uint16_t i2)
3012 {
3013 int32_t ri = i1 << 16 | i2;
3014 return s390_record_address_mask (gdbarch, regcache, addr + (LONGEST)ri * 2);
3015 }
3016
3017 /* Population count helper. */
3018
3019 static int s390_popcnt (unsigned int x) {
3020 int res = 0;
3021 while (x)
3022 {
3023 if (x & 1)
3024 res++;
3025 x >>= 1;
3026 }
3027 return res;
3028 }
3029
3030 /* Record 64-bit register. */
3031
3032 static int
3033 s390_record_gpr_g (struct gdbarch *gdbarch, struct regcache *regcache, int i)
3034 {
3035 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
3036 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
3037 return -1;
3038 if (tdep->abi == ABI_LINUX_S390)
3039 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
3040 return -1;
3041 return 0;
3042 }
3043
3044 /* Record high 32 bits of a register. */
3045
3046 static int
3047 s390_record_gpr_h (struct gdbarch *gdbarch, struct regcache *regcache, int i)
3048 {
3049 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
3050 if (tdep->abi == ABI_LINUX_S390)
3051 {
3052 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
3053 return -1;
3054 }
3055 else
3056 {
3057 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
3058 return -1;
3059 }
3060 return 0;
3061 }
3062
3063 /* Record vector register. */
3064
3065 static int
3066 s390_record_vr (struct gdbarch *gdbarch, struct regcache *regcache, int i)
3067 {
3068 if (i < 16)
3069 {
3070 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + i))
3071 return -1;
3072 if (record_full_arch_list_add_reg (regcache, S390_V0_LOWER_REGNUM + i))
3073 return -1;
3074 }
3075 else
3076 {
3077 if (record_full_arch_list_add_reg (regcache, S390_V16_REGNUM + i - 16))
3078 return -1;
3079 }
3080 return 0;
3081 }
3082
3083 /* Implement process_record gdbarch method. */
3084
3085 static int
3086 s390_process_record (struct gdbarch *gdbarch, struct regcache *regcache,
3087 CORE_ADDR addr)
3088 {
3089 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
3090 uint16_t insn[3] = {0};
3091 /* Instruction as bytes. */
3092 uint8_t ibyte[6];
3093 /* Instruction as nibbles. */
3094 uint8_t inib[12];
3095 /* Instruction vector registers. */
3096 uint8_t ivec[4];
3097 CORE_ADDR oaddr, oaddr2, oaddr3;
3098 ULONGEST tmp;
3099 int i, n;
3100 /* if EX/EXRL instruction used, here's the reg parameter */
3101 int ex = -1;
3102 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3103
3104 /* Attempting to use EX or EXRL jumps back here */
3105 ex:
3106
3107 /* Read instruction. */
3108 insn[0] = read_memory_unsigned_integer (addr, 2, byte_order);
3109 /* If execute was involved, do the adjustment. */
3110 if (ex != -1)
3111 insn[0] |= ex & 0xff;
3112 /* Two highest bits determine instruction size. */
3113 if (insn[0] >= 0x4000)
3114 insn[1] = read_memory_unsigned_integer (addr+2, 2, byte_order);
3115 else
3116 /* Not necessary, but avoids uninitialized variable warnings. */
3117 insn[1] = 0;
3118 if (insn[0] >= 0xc000)
3119 insn[2] = read_memory_unsigned_integer (addr+4, 2, byte_order);
3120 else
3121 insn[2] = 0;
3122 /* Split instruction into bytes and nibbles. */
3123 for (i = 0; i < 3; i++)
3124 {
3125 ibyte[i*2] = insn[i] >> 8 & 0xff;
3126 ibyte[i*2+1] = insn[i] & 0xff;
3127 }
3128 for (i = 0; i < 6; i++)
3129 {
3130 inib[i*2] = ibyte[i] >> 4 & 0xf;
3131 inib[i*2+1] = ibyte[i] & 0xf;
3132 }
3133 /* Compute vector registers, if applicable. */
3134 ivec[0] = (inib[9] >> 3 & 1) << 4 | inib[2];
3135 ivec[1] = (inib[9] >> 2 & 1) << 4 | inib[3];
3136 ivec[2] = (inib[9] >> 1 & 1) << 4 | inib[4];
3137 ivec[3] = (inib[9] >> 0 & 1) << 4 | inib[8];
3138
3139 switch (ibyte[0])
3140 {
3141 /* 0x00 undefined */
3142
3143 case 0x01:
3144 /* E-format instruction */
3145 switch (ibyte[1])
3146 {
3147 /* 0x00 undefined */
3148 /* 0x01 unsupported: PR - program return */
3149 /* 0x02 unsupported: UPT */
3150 /* 0x03 undefined */
3151 /* 0x04 privileged: PTFF - perform timing facility function */
3152 /* 0x05-0x06 undefined */
3153 /* 0x07 privileged: SCKPF - set clock programmable field */
3154 /* 0x08-0x09 undefined */
3155
3156 case 0x0a: /* PFPO - perform floating point operation */
3157 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3158 if (!(tmp & 0x80000000u))
3159 {
3160 uint8_t ofc = tmp >> 16 & 0xff;
3161 switch (ofc)
3162 {
3163 case 0x00: /* HFP32 */
3164 case 0x01: /* HFP64 */
3165 case 0x05: /* BFP32 */
3166 case 0x06: /* BFP64 */
3167 case 0x08: /* DFP32 */
3168 case 0x09: /* DFP64 */
3169 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
3170 return -1;
3171 break;
3172 case 0x02: /* HFP128 */
3173 case 0x07: /* BFP128 */
3174 case 0x0a: /* DFP128 */
3175 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
3176 return -1;
3177 if (record_full_arch_list_add_reg (regcache, S390_F2_REGNUM))
3178 return -1;
3179 break;
3180 default:
3181 gdb_printf (gdb_stdlog, "Warning: Unknown PFPO OFC %02x at %s.\n",
3182 ofc, paddress (gdbarch, addr));
3183 return -1;
3184 }
3185
3186 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3187 return -1;
3188 }
3189 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
3190 return -1;
3191 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3192 return -1;
3193 break;
3194
3195 case 0x0b: /* TAM - test address mode */
3196 case 0x0c: /* SAM24 - set address mode 24 */
3197 case 0x0d: /* SAM31 - set address mode 31 */
3198 case 0x0e: /* SAM64 - set address mode 64 */
3199 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3200 return -1;
3201 break;
3202
3203 /* 0x0f-0xfe undefined */
3204
3205 /* 0xff unsupported: TRAP */
3206
3207 default:
3208 goto UNKNOWN_OP;
3209 }
3210 break;
3211
3212 /* 0x02 undefined */
3213 /* 0x03 undefined */
3214
3215 case 0x04: /* SPM - set program mask */
3216 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3217 return -1;
3218 break;
3219
3220 case 0x05: /* BALR - branch and link */
3221 case 0x45: /* BAL - branch and link */
3222 case 0x06: /* BCTR - branch on count */
3223 case 0x46: /* BCT - branch on count */
3224 case 0x0d: /* BASR - branch and save */
3225 case 0x4d: /* BAS - branch and save */
3226 case 0x84: /* BRXH - branch relative on index high */
3227 case 0x85: /* BRXLE - branch relative on index low or equal */
3228 case 0x86: /* BXH - branch on index high */
3229 case 0x87: /* BXLE - branch on index low or equal */
3230 /* BA[SL]* use native-size destination for linkage info, BCT*, BRX*, BX*
3231 use 32-bit destination as counter. */
3232 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3233 return -1;
3234 break;
3235
3236 case 0x07: /* BCR - branch on condition */
3237 case 0x47: /* BC - branch on condition */
3238 /* No effect other than PC transfer. */
3239 break;
3240
3241 /* 0x08 undefined */
3242 /* 0x09 undefined */
3243
3244 case 0x0a:
3245 /* SVC - supervisor call */
3246 if (tdep->s390_syscall_record != NULL)
3247 {
3248 if (tdep->s390_syscall_record (regcache, ibyte[1]))
3249 return -1;
3250 }
3251 else
3252 {
3253 gdb_printf (gdb_stderr, _("no syscall record support\n"));
3254 return -1;
3255 }
3256 break;
3257
3258 case 0x0b: /* BSM - branch and set mode */
3259 if (inib[2])
3260 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3261 return -1;
3262 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3263 return -1;
3264 break;
3265
3266 case 0x0c: /* BASSM - branch and save and set mode */
3267 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3268 return -1;
3269 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3270 return -1;
3271 break;
3272
3273 case 0x0e: /* MVCL - move long [interruptible] */
3274 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3275 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3276 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
3277 tmp &= 0xffffff;
3278 if (record_full_arch_list_add_mem (oaddr, tmp))
3279 return -1;
3280 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3281 return -1;
3282 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3283 return -1;
3284 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3285 return -1;
3286 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3287 return -1;
3288 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3289 return -1;
3290 break;
3291
3292 case 0x0f: /* CLCL - compare logical long [interruptible] */
3293 case 0xa9: /* CLCLE - compare logical long extended [partial] */
3294 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3295 return -1;
3296 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3297 return -1;
3298 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3299 return -1;
3300 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3301 return -1;
3302 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3303 return -1;
3304 break;
3305
3306 case 0x10: /* LPR - load positive */
3307 case 0x11: /* LNR - load negative */
3308 case 0x12: /* LTR - load and test */
3309 case 0x13: /* LCR - load complement */
3310 case 0x14: /* NR - and */
3311 case 0x16: /* OR - or */
3312 case 0x17: /* XR - xor */
3313 case 0x1a: /* AR - add */
3314 case 0x1b: /* SR - subtract */
3315 case 0x1e: /* ALR - add logical */
3316 case 0x1f: /* SLR - subtract logical */
3317 case 0x54: /* N - and */
3318 case 0x56: /* O - or */
3319 case 0x57: /* X - xor */
3320 case 0x5a: /* A - add */
3321 case 0x5b: /* S - subtract */
3322 case 0x5e: /* AL - add logical */
3323 case 0x5f: /* SL - subtract logical */
3324 case 0x4a: /* AH - add halfword */
3325 case 0x4b: /* SH - subtract halfword */
3326 case 0x8a: /* SRA - shift right single */
3327 case 0x8b: /* SLA - shift left single */
3328 case 0xbf: /* ICM - insert characters under mask */
3329 /* 32-bit destination + flags */
3330 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3331 return -1;
3332 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3333 return -1;
3334 break;
3335
3336 case 0x15: /* CLR - compare logical */
3337 case 0x55: /* CL - compare logical */
3338 case 0x19: /* CR - compare */
3339 case 0x29: /* CDR - compare */
3340 case 0x39: /* CER - compare */
3341 case 0x49: /* CH - compare halfword */
3342 case 0x59: /* C - compare */
3343 case 0x69: /* CD - compare */
3344 case 0x79: /* CE - compare */
3345 case 0x91: /* TM - test under mask */
3346 case 0x95: /* CLI - compare logical */
3347 case 0xbd: /* CLM - compare logical under mask */
3348 case 0xd5: /* CLC - compare logical */
3349 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3350 return -1;
3351 break;
3352
3353 case 0x18: /* LR - load */
3354 case 0x48: /* LH - load halfword */
3355 case 0x58: /* L - load */
3356 case 0x41: /* LA - load address */
3357 case 0x43: /* IC - insert character */
3358 case 0x4c: /* MH - multiply halfword */
3359 case 0x71: /* MS - multiply single */
3360 case 0x88: /* SRL - shift right single logical */
3361 case 0x89: /* SLL - shift left single logical */
3362 /* 32-bit, 8-bit (IC), or native width (LA) destination, no flags */
3363 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3364 return -1;
3365 break;
3366
3367 case 0x1c: /* MR - multiply */
3368 case 0x5c: /* M - multiply */
3369 case 0x1d: /* DR - divide */
3370 case 0x5d: /* D - divide */
3371 case 0x8c: /* SRDL - shift right double logical */
3372 case 0x8d: /* SLDL - shift left double logical */
3373 /* 32-bit pair destination, no flags */
3374 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3375 return -1;
3376 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3377 return -1;
3378 break;
3379
3380 case 0x20: /* LPDR - load positive */
3381 case 0x30: /* LPER - load positive */
3382 case 0x21: /* LNDR - load negative */
3383 case 0x31: /* LNER - load negative */
3384 case 0x22: /* LTDR - load and test */
3385 case 0x32: /* LTER - load and test */
3386 case 0x23: /* LCDR - load complement */
3387 case 0x33: /* LCER - load complement */
3388 case 0x2a: /* ADR - add */
3389 case 0x3a: /* AER - add */
3390 case 0x6a: /* AD - add */
3391 case 0x7a: /* AE - add */
3392 case 0x2b: /* SDR - subtract */
3393 case 0x3b: /* SER - subtract */
3394 case 0x6b: /* SD - subtract */
3395 case 0x7b: /* SE - subtract */
3396 case 0x2e: /* AWR - add unnormalized */
3397 case 0x3e: /* AUR - add unnormalized */
3398 case 0x6e: /* AW - add unnormalized */
3399 case 0x7e: /* AU - add unnormalized */
3400 case 0x2f: /* SWR - subtract unnormalized */
3401 case 0x3f: /* SUR - subtract unnormalized */
3402 case 0x6f: /* SW - subtract unnormalized */
3403 case 0x7f: /* SU - subtract unnormalized */
3404 /* float destination + flags */
3405 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3406 return -1;
3407 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3408 return -1;
3409 break;
3410
3411 case 0x24: /* HDR - halve */
3412 case 0x34: /* HER - halve */
3413 case 0x25: /* LDXR - load rounded */
3414 case 0x35: /* LEDR - load rounded */
3415 case 0x28: /* LDR - load */
3416 case 0x38: /* LER - load */
3417 case 0x68: /* LD - load */
3418 case 0x78: /* LE - load */
3419 case 0x2c: /* MDR - multiply */
3420 case 0x3c: /* MDER - multiply */
3421 case 0x6c: /* MD - multiply */
3422 case 0x7c: /* MDE - multiply */
3423 case 0x2d: /* DDR - divide */
3424 case 0x3d: /* DER - divide */
3425 case 0x6d: /* DD - divide */
3426 case 0x7d: /* DE - divide */
3427 /* float destination, no flags */
3428 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3429 return -1;
3430 break;
3431
3432 case 0x26: /* MXR - multiply */
3433 case 0x27: /* MXDR - multiply */
3434 case 0x67: /* MXD - multiply */
3435 /* float pair destination, no flags */
3436 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3437 return -1;
3438 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
3439 return -1;
3440 break;
3441
3442 case 0x36: /* AXR - add */
3443 case 0x37: /* SXR - subtract */
3444 /* float pair destination + flags */
3445 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3446 return -1;
3447 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
3448 return -1;
3449 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3450 return -1;
3451 break;
3452
3453 case 0x40: /* STH - store halfword */
3454 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3455 if (record_full_arch_list_add_mem (oaddr, 2))
3456 return -1;
3457 break;
3458
3459 case 0x42: /* STC - store character */
3460 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3461 if (record_full_arch_list_add_mem (oaddr, 1))
3462 return -1;
3463 break;
3464
3465 case 0x44: /* EX - execute */
3466 if (ex != -1)
3467 {
3468 gdb_printf (gdb_stdlog, "Warning: Double execute at %s.\n",
3469 paddress (gdbarch, addr));
3470 return -1;
3471 }
3472 addr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3473 if (inib[2])
3474 {
3475 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3476 ex = tmp & 0xff;
3477 }
3478 else
3479 {
3480 ex = 0;
3481 }
3482 goto ex;
3483
3484 case 0x4e: /* CVD - convert to decimal */
3485 case 0x60: /* STD - store */
3486 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3487 if (record_full_arch_list_add_mem (oaddr, 8))
3488 return -1;
3489 break;
3490
3491 case 0x4f: /* CVB - convert to binary */
3492 /* 32-bit gpr destination + FPC (DXC write) */
3493 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3494 return -1;
3495 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3496 return -1;
3497 break;
3498
3499 case 0x50: /* ST - store */
3500 case 0x70: /* STE - store */
3501 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3502 if (record_full_arch_list_add_mem (oaddr, 4))
3503 return -1;
3504 break;
3505
3506 case 0x51: /* LAE - load address extended */
3507 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3508 return -1;
3509 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
3510 return -1;
3511 break;
3512
3513 /* 0x52 undefined */
3514 /* 0x53 undefined */
3515
3516 /* 0x61-0x66 undefined */
3517
3518 /* 0x72-0x77 undefined */
3519
3520 /* 0x80 privileged: SSM - set system mask */
3521 /* 0x81 undefined */
3522 /* 0x82 privileged: LPSW - load PSW */
3523 /* 0x83 privileged: diagnose */
3524
3525 case 0x8e: /* SRDA - shift right double */
3526 case 0x8f: /* SLDA - shift left double */
3527 /* 32-bit pair destination + flags */
3528 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3529 return -1;
3530 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3531 return -1;
3532 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3533 return -1;
3534 break;
3535
3536 case 0x90: /* STM - store multiple */
3537 case 0x9b: /* STAM - store access multiple */
3538 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3539 if (inib[2] <= inib[3])
3540 n = inib[3] - inib[2] + 1;
3541 else
3542 n = inib[3] + 0x10 - inib[2] + 1;
3543 if (record_full_arch_list_add_mem (oaddr, n * 4))
3544 return -1;
3545 break;
3546
3547 case 0x92: /* MVI - move */
3548 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3549 if (record_full_arch_list_add_mem (oaddr, 1))
3550 return -1;
3551 break;
3552
3553 case 0x93: /* TS - test and set */
3554 case 0x94: /* NI - and */
3555 case 0x96: /* OI - or */
3556 case 0x97: /* XI - xor */
3557 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3558 if (record_full_arch_list_add_mem (oaddr, 1))
3559 return -1;
3560 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3561 return -1;
3562 break;
3563
3564 case 0x98: /* LM - load multiple */
3565 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
3566 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
3567 return -1;
3568 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3569 return -1;
3570 break;
3571
3572 /* 0x99 privileged: TRACE */
3573
3574 case 0x9a: /* LAM - load access multiple */
3575 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
3576 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
3577 return -1;
3578 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
3579 return -1;
3580 break;
3581
3582 /* 0x9c-0x9f privileged and obsolete (old I/O) */
3583 /* 0xa0-0xa4 undefined */
3584
3585 case 0xa5:
3586 case 0xa7:
3587 /* RI-format instruction */
3588 switch (ibyte[0] << 4 | inib[3])
3589 {
3590 case 0xa50: /* IIHH - insert immediate */
3591 case 0xa51: /* IIHL - insert immediate */
3592 /* high 32-bit destination */
3593 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
3594 return -1;
3595 break;
3596
3597 case 0xa52: /* IILH - insert immediate */
3598 case 0xa53: /* IILL - insert immediate */
3599 case 0xa75: /* BRAS - branch relative and save */
3600 case 0xa76: /* BRCT - branch relative on count */
3601 case 0xa78: /* LHI - load halfword immediate */
3602 case 0xa7c: /* MHI - multiply halfword immediate */
3603 /* 32-bit or native destination */
3604 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3605 return -1;
3606 break;
3607
3608 case 0xa54: /* NIHH - and immediate */
3609 case 0xa55: /* NIHL - and immediate */
3610 case 0xa58: /* OIHH - or immediate */
3611 case 0xa59: /* OIHL - or immediate */
3612 /* high 32-bit destination + flags */
3613 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
3614 return -1;
3615 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3616 return -1;
3617 break;
3618
3619 case 0xa56: /* NILH - and immediate */
3620 case 0xa57: /* NILL - and immediate */
3621 case 0xa5a: /* OILH - or immediate */
3622 case 0xa5b: /* OILL - or immediate */
3623 case 0xa7a: /* AHI - add halfword immediate */
3624 /* 32-bit destination + flags */
3625 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3626 return -1;
3627 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3628 return -1;
3629 break;
3630
3631 case 0xa5c: /* LLIHH - load logical immediate */
3632 case 0xa5d: /* LLIHL - load logical immediate */
3633 case 0xa5e: /* LLILH - load logical immediate */
3634 case 0xa5f: /* LLILL - load logical immediate */
3635 case 0xa77: /* BRCTG - branch relative on count */
3636 case 0xa79: /* LGHI - load halfword immediate */
3637 case 0xa7d: /* MGHI - multiply halfword immediate */
3638 /* 64-bit destination */
3639 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
3640 return -1;
3641 break;
3642
3643 case 0xa70: /* TMLH - test under mask */
3644 case 0xa71: /* TMLL - test under mask */
3645 case 0xa72: /* TMHH - test under mask */
3646 case 0xa73: /* TMHL - test under mask */
3647 case 0xa7e: /* CHI - compare halfword immediate */
3648 case 0xa7f: /* CGHI - compare halfword immediate */
3649 /* flags only */
3650 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3651 return -1;
3652 break;
3653
3654 case 0xa74: /* BRC - branch relative on condition */
3655 /* no register change */
3656 break;
3657
3658 case 0xa7b: /* AGHI - add halfword immediate */
3659 /* 64-bit destination + flags */
3660 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
3661 return -1;
3662 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3663 return -1;
3664 break;
3665
3666 default:
3667 goto UNKNOWN_OP;
3668 }
3669 break;
3670
3671 /* 0xa6 undefined */
3672
3673 case 0xa8: /* MVCLE - move long extended [partial] */
3674 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3675 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3676 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
3677 if (record_full_arch_list_add_mem (oaddr, tmp))
3678 return -1;
3679 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3680 return -1;
3681 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3682 return -1;
3683 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3684 return -1;
3685 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3686 return -1;
3687 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3688 return -1;
3689 break;
3690
3691 /* 0xaa-0xab undefined */
3692 /* 0xac privileged: STNSM - store then and system mask */
3693 /* 0xad privileged: STOSM - store then or system mask */
3694 /* 0xae privileged: SIGP - signal processor */
3695 /* 0xaf unsupported: MC - monitor call */
3696 /* 0xb0 undefined */
3697 /* 0xb1 privileged: LRA - load real address */
3698
3699 case 0xb2:
3700 case 0xb3:
3701 case 0xb9:
3702 /* S/RRD/RRE/RRF/IE-format instruction */
3703 switch (insn[0])
3704 {
3705 /* 0xb200-0xb204 undefined or privileged */
3706
3707 case 0xb205: /* STCK - store clock */
3708 case 0xb27c: /* STCKF - store clock fast */
3709 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3710 if (record_full_arch_list_add_mem (oaddr, 8))
3711 return -1;
3712 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3713 return -1;
3714 break;
3715
3716 /* 0xb206-0xb219 undefined, privileged, or unsupported */
3717 /* 0xb21a unsupported: CFC */
3718 /* 0xb21b-0xb221 undefined or privileged */
3719
3720 case 0xb222: /* IPM - insert program mask */
3721 case 0xb24f: /* EAR - extract access */
3722 case 0xb252: /* MSR - multiply single */
3723 case 0xb2ec: /* ETND - extract transaction nesting depth */
3724 case 0xb38c: /* EFPC - extract fpc */
3725 case 0xb91f: /* LRVR - load reversed */
3726 case 0xb926: /* LBR - load byte */
3727 case 0xb927: /* LHR - load halfword */
3728 case 0xb994: /* LLCR - load logical character */
3729 case 0xb995: /* LLHR - load logical halfword */
3730 case 0xb9f2: /* LOCR - load on condition */
3731 /* 32-bit gpr destination */
3732 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3733 return -1;
3734 break;
3735
3736 /* 0xb223-0xb22c privileged or unsupported */
3737
3738 case 0xb22d: /* DXR - divide */
3739 case 0xb325: /* LXDR - load lengthened */
3740 case 0xb326: /* LXER - load lengthened */
3741 case 0xb336: /* SQXR - square root */
3742 case 0xb365: /* LXR - load */
3743 case 0xb367: /* FIXR - load fp integer */
3744 case 0xb376: /* LZXR - load zero */
3745 case 0xb3b6: /* CXFR - convert from fixed */
3746 case 0xb3c6: /* CXGR - convert from fixed */
3747 case 0xb3fe: /* IEXTR - insert biased exponent */
3748 /* float pair destination */
3749 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3750 return -1;
3751 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
3752 return -1;
3753 break;
3754
3755 /* 0xb22e-0xb240 undefined, privileged, or unsupported */
3756
3757 case 0xb241: /* CKSM - checksum [partial] */
3758 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3759 return -1;
3760 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3761 return -1;
3762 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3763 return -1;
3764 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3765 return -1;
3766 break;
3767
3768 /* 0xb242-0xb243 undefined */
3769
3770 case 0xb244: /* SQDR - square root */
3771 case 0xb245: /* SQER - square root */
3772 case 0xb324: /* LDER - load lengthened */
3773 case 0xb337: /* MEER - multiply */
3774 case 0xb366: /* LEXR - load rounded */
3775 case 0xb370: /* LPDFR - load positive */
3776 case 0xb371: /* LNDFR - load negative */
3777 case 0xb372: /* CSDFR - copy sign */
3778 case 0xb373: /* LCDFR - load complement */
3779 case 0xb374: /* LZER - load zero */
3780 case 0xb375: /* LZDR - load zero */
3781 case 0xb377: /* FIER - load fp integer */
3782 case 0xb37f: /* FIDR - load fp integer */
3783 case 0xb3b4: /* CEFR - convert from fixed */
3784 case 0xb3b5: /* CDFR - convert from fixed */
3785 case 0xb3c1: /* LDGR - load fpr from gr */
3786 case 0xb3c4: /* CEGR - convert from fixed */
3787 case 0xb3c5: /* CDGR - convert from fixed */
3788 case 0xb3f6: /* IEDTR - insert biased exponent */
3789 /* float destination */
3790 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3791 return -1;
3792 break;
3793
3794 /* 0xb246-0xb24c: privileged or unsupported */
3795
3796 case 0xb24d: /* CPYA - copy access */
3797 case 0xb24e: /* SAR - set access */
3798 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[6]))
3799 return -1;
3800 break;
3801
3802 /* 0xb250-0xb251 undefined or privileged */
3803 /* 0xb253-0xb254 undefined or privileged */
3804
3805 case 0xb255: /* MVST - move string [partial] */
3806 {
3807 uint8_t end;
3808 gdb_byte cur;
3809 ULONGEST num = 0;
3810 /* Read ending byte. */
3811 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3812 end = tmp & 0xff;
3813 /* Get address of second operand. */
3814 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[7], &tmp);
3815 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3816 /* Search for ending byte and compute length. */
3817 do {
3818 num++;
3819 if (target_read_memory (oaddr, &cur, 1))
3820 return -1;
3821 oaddr++;
3822 } while (cur != end);
3823 /* Get address of first operand and record it. */
3824 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3825 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3826 if (record_full_arch_list_add_mem (oaddr, num))
3827 return -1;
3828 /* Record the registers. */
3829 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3830 return -1;
3831 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3832 return -1;
3833 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3834 return -1;
3835 }
3836 break;
3837
3838 /* 0xb256 undefined */
3839
3840 case 0xb257: /* CUSE - compare until substring equal [interruptible] */
3841 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3842 return -1;
3843 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3844 return -1;
3845 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3846 return -1;
3847 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3848 return -1;
3849 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3850 return -1;
3851 break;
3852
3853 /* 0xb258-0xb25c undefined, privileged, or unsupported */
3854
3855 case 0xb25d: /* CLST - compare logical string [partial] */
3856 case 0xb25e: /* SRST - search string [partial] */
3857 case 0xb9be: /* SRSTU - search string unicode [partial] */
3858 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3859 return -1;
3860 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3861 return -1;
3862 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3863 return -1;
3864 break;
3865
3866 /* 0xb25f-0xb262 undefined */
3867
3868 case 0xb263: /* CMPSC - compression call [interruptible] */
3869 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3870 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3871 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3872 if (record_full_arch_list_add_mem (oaddr, tmp))
3873 return -1;
3874 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3875 return -1;
3876 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3877 return -1;
3878 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3879 return -1;
3880 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3881 return -1;
3882 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
3883 return -1;
3884 /* DXC may be written */
3885 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3886 return -1;
3887 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3888 return -1;
3889 break;
3890
3891 /* 0xb264-0xb277 undefined, privileged, or unsupported */
3892
3893 case 0xb278: /* STCKE - store clock extended */
3894 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3895 if (record_full_arch_list_add_mem (oaddr, 16))
3896 return -1;
3897 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3898 return -1;
3899 break;
3900
3901 /* 0xb279-0xb27b undefined or unsupported */
3902 /* 0xb27d-0xb298 undefined or privileged */
3903
3904 case 0xb299: /* SRNM - set rounding mode */
3905 case 0xb2b8: /* SRNMB - set bfp rounding mode */
3906 case 0xb2b9: /* SRNMT - set dfp rounding mode */
3907 case 0xb29d: /* LFPC - load fpc */
3908 case 0xb2bd: /* LFAS - load fpc and signal */
3909 case 0xb384: /* SFPC - set fpc */
3910 case 0xb385: /* SFASR - set fpc and signal */
3911 case 0xb960: /* CGRT - compare and trap */
3912 case 0xb961: /* CLGRT - compare logical and trap */
3913 case 0xb972: /* CRT - compare and trap */
3914 case 0xb973: /* CLRT - compare logical and trap */
3915 /* fpc only - including possible DXC write for trapping insns */
3916 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3917 return -1;
3918 break;
3919
3920 /* 0xb29a-0xb29b undefined */
3921
3922 case 0xb29c: /* STFPC - store fpc */
3923 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3924 if (record_full_arch_list_add_mem (oaddr, 4))
3925 return -1;
3926 break;
3927
3928 /* 0xb29e-0xb2a4 undefined */
3929
3930 case 0xb2a5: /* TRE - translate extended [partial] */
3931 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3932 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3933 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3934 if (record_full_arch_list_add_mem (oaddr, tmp))
3935 return -1;
3936 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3937 return -1;
3938 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3939 return -1;
3940 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3941 return -1;
3942 break;
3943
3944 case 0xb2a6: /* CU21 - convert UTF-16 to UTF-8 [partial] */
3945 case 0xb2a7: /* CU12 - convert UTF-8 to UTF-16 [partial] */
3946 case 0xb9b0: /* CU14 - convert UTF-8 to UTF-32 [partial] */
3947 case 0xb9b1: /* CU24 - convert UTF-16 to UTF-32 [partial] */
3948 case 0xb9b2: /* CU41 - convert UTF-32 to UTF-8 [partial] */
3949 case 0xb9b3: /* CU42 - convert UTF-32 to UTF-16 [partial] */
3950 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3951 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3952 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3953 if (record_full_arch_list_add_mem (oaddr, tmp))
3954 return -1;
3955 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3956 return -1;
3957 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3958 return -1;
3959 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3960 return -1;
3961 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3962 return -1;
3963 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3964 return -1;
3965 break;
3966
3967 /* 0xb2a8-0xb2af undefined */
3968
3969 case 0xb2b0: /* STFLE - store facility list extended */
3970 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3971 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3972 tmp &= 0xff;
3973 if (record_full_arch_list_add_mem (oaddr, 8 * (tmp + 1)))
3974 return -1;
3975 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM))
3976 return -1;
3977 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3978 return -1;
3979 break;
3980
3981 /* 0xb2b1-0xb2b7 undefined or privileged */
3982 /* 0xb2ba-0xb2bc undefined */
3983 /* 0xb2be-0xb2e7 undefined */
3984 /* 0xb2e9-0xb2eb undefined */
3985 /* 0xb2ed-0xb2f7 undefined */
3986 /* 0xb2f8 unsupported: TEND */
3987 /* 0xb2f9 undefined */
3988
3989 case 0xb2e8: /* PPA - perform processor assist */
3990 case 0xb2fa: /* NIAI - next instruction access intent */
3991 /* no visible effects */
3992 break;
3993
3994 /* 0xb2fb undefined */
3995 /* 0xb2fc unsupported: TABORT */
3996 /* 0xb2fd-0xb2fe undefined */
3997 /* 0xb2ff unsupported: TRAP */
3998
3999 case 0xb300: /* LPEBR - load positive */
4000 case 0xb301: /* LNEBR - load negative */
4001 case 0xb303: /* LCEBR - load complement */
4002 case 0xb310: /* LPDBR - load positive */
4003 case 0xb311: /* LNDBR - load negative */
4004 case 0xb313: /* LCDBR - load complement */
4005 case 0xb350: /* TBEDR - convert hfp to bfp */
4006 case 0xb351: /* TBDR - convert hfp to bfp */
4007 case 0xb358: /* THDER - convert bfp to hfp */
4008 case 0xb359: /* THDR - convert bfp to hfp */
4009 /* float destination + flags */
4010 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4011 return -1;
4012 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4013 return -1;
4014 break;
4015
4016 case 0xb304: /* LDEBR - load lengthened */
4017 case 0xb30c: /* MDEBR - multiply */
4018 case 0xb30d: /* DEBR - divide */
4019 case 0xb314: /* SQEBR - square root */
4020 case 0xb315: /* SQDBR - square root */
4021 case 0xb317: /* MEEBR - multiply */
4022 case 0xb31c: /* MDBR - multiply */
4023 case 0xb31d: /* DDBR - divide */
4024 case 0xb344: /* LEDBRA - load rounded */
4025 case 0xb345: /* LDXBRA - load rounded */
4026 case 0xb346: /* LEXBRA - load rounded */
4027 case 0xb357: /* FIEBRA - load fp integer */
4028 case 0xb35f: /* FIDBRA - load fp integer */
4029 case 0xb390: /* CELFBR - convert from logical */
4030 case 0xb391: /* CDLFBR - convert from logical */
4031 case 0xb394: /* CEFBR - convert from fixed */
4032 case 0xb395: /* CDFBR - convert from fixed */
4033 case 0xb3a0: /* CELGBR - convert from logical */
4034 case 0xb3a1: /* CDLGBR - convert from logical */
4035 case 0xb3a4: /* CEGBR - convert from fixed */
4036 case 0xb3a5: /* CDGBR - convert from fixed */
4037 case 0xb3d0: /* MDTR - multiply */
4038 case 0xb3d1: /* DDTR - divide */
4039 case 0xb3d4: /* LDETR - load lengthened */
4040 case 0xb3d5: /* LEDTR - load lengthened */
4041 case 0xb3d7: /* FIDTR - load fp integer */
4042 case 0xb3dd: /* LDXTR - load lengthened */
4043 case 0xb3f1: /* CDGTR - convert from fixed */
4044 case 0xb3f2: /* CDUTR - convert from unsigned packed */
4045 case 0xb3f3: /* CDSTR - convert from signed packed */
4046 case 0xb3f5: /* QADTR - quantize */
4047 case 0xb3f7: /* RRDTR - reround */
4048 case 0xb951: /* CDFTR - convert from fixed */
4049 case 0xb952: /* CDLGTR - convert from logical */
4050 case 0xb953: /* CDLFTR - convert from logical */
4051 /* float destination + fpc */
4052 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4053 return -1;
4054 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4055 return -1;
4056 break;
4057
4058 case 0xb305: /* LXDBR - load lengthened */
4059 case 0xb306: /* LXEBR - load lengthened */
4060 case 0xb307: /* MXDBR - multiply */
4061 case 0xb316: /* SQXBR - square root */
4062 case 0xb34c: /* MXBR - multiply */
4063 case 0xb34d: /* DXBR - divide */
4064 case 0xb347: /* FIXBRA - load fp integer */
4065 case 0xb392: /* CXLFBR - convert from logical */
4066 case 0xb396: /* CXFBR - convert from fixed */
4067 case 0xb3a2: /* CXLGBR - convert from logical */
4068 case 0xb3a6: /* CXGBR - convert from fixed */
4069 case 0xb3d8: /* MXTR - multiply */
4070 case 0xb3d9: /* DXTR - divide */
4071 case 0xb3dc: /* LXDTR - load lengthened */
4072 case 0xb3df: /* FIXTR - load fp integer */
4073 case 0xb3f9: /* CXGTR - convert from fixed */
4074 case 0xb3fa: /* CXUTR - convert from unsigned packed */
4075 case 0xb3fb: /* CXSTR - convert from signed packed */
4076 case 0xb3fd: /* QAXTR - quantize */
4077 case 0xb3ff: /* RRXTR - reround */
4078 case 0xb959: /* CXFTR - convert from fixed */
4079 case 0xb95a: /* CXLGTR - convert from logical */
4080 case 0xb95b: /* CXLFTR - convert from logical */
4081 /* float pair destination + fpc */
4082 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4083 return -1;
4084 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4085 return -1;
4086 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4087 return -1;
4088 break;
4089
4090 case 0xb308: /* KEBR - compare and signal */
4091 case 0xb309: /* CEBR - compare */
4092 case 0xb318: /* KDBR - compare and signal */
4093 case 0xb319: /* CDBR - compare */
4094 case 0xb348: /* KXBR - compare and signal */
4095 case 0xb349: /* CXBR - compare */
4096 case 0xb3e0: /* KDTR - compare and signal */
4097 case 0xb3e4: /* CDTR - compare */
4098 case 0xb3e8: /* KXTR - compare and signal */
4099 case 0xb3ec: /* CXTR - compare */
4100 /* flags + fpc only */
4101 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4102 return -1;
4103 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4104 return -1;
4105 break;
4106
4107 case 0xb302: /* LTEBR - load and test */
4108 case 0xb312: /* LTDBR - load and test */
4109 case 0xb30a: /* AEBR - add */
4110 case 0xb30b: /* SEBR - subtract */
4111 case 0xb31a: /* ADBR - add */
4112 case 0xb31b: /* SDBR - subtract */
4113 case 0xb3d2: /* ADTR - add */
4114 case 0xb3d3: /* SDTR - subtract */
4115 case 0xb3d6: /* LTDTR - load and test */
4116 /* float destination + flags + fpc */
4117 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4118 return -1;
4119 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4120 return -1;
4121 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4122 return -1;
4123 break;
4124
4125 case 0xb30e: /* MAEBR - multiply and add */
4126 case 0xb30f: /* MSEBR - multiply and subtract */
4127 case 0xb31e: /* MADBR - multiply and add */
4128 case 0xb31f: /* MSDBR - multiply and subtract */
4129 /* float destination [RRD] + fpc */
4130 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4131 return -1;
4132 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4133 return -1;
4134 break;
4135
4136 /* 0xb320-0xb323 undefined */
4137 /* 0xb327-0xb32d undefined */
4138
4139 case 0xb32e: /* MAER - multiply and add */
4140 case 0xb32f: /* MSER - multiply and subtract */
4141 case 0xb338: /* MAYLR - multiply and add unnormalized */
4142 case 0xb339: /* MYLR - multiply unnormalized */
4143 case 0xb33c: /* MAYHR - multiply and add unnormalized */
4144 case 0xb33d: /* MYHR - multiply unnormalized */
4145 case 0xb33e: /* MADR - multiply and add */
4146 case 0xb33f: /* MSDR - multiply and subtract */
4147 /* float destination [RRD] */
4148 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4149 return -1;
4150 break;
4151
4152 /* 0xb330-0xb335 undefined */
4153
4154 case 0xb33a: /* MAYR - multiply and add unnormalized */
4155 /* float pair destination [RRD]; R1 may designate lower- or
4156 higher-numbered register of pair */
4157 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[4] & 13)))
4158 return -1;
4159 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[4] | 2)))
4160 return -1;
4161 break;
4162 case 0xb33b: /* MYR - multiply unnormalized */
4163 /* float pair destination [RRD] */
4164 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4165 return -1;
4166 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[4] | 2)))
4167 return -1;
4168 break;
4169
4170 case 0xb340: /* LPXBR - load positive */
4171 case 0xb341: /* LNXBR - load negative */
4172 case 0xb343: /* LCXBR - load complement */
4173 case 0xb360: /* LPXR - load positive */
4174 case 0xb361: /* LNXR - load negative */
4175 case 0xb362: /* LTXR - load and test */
4176 case 0xb363: /* LCXR - load complement */
4177 /* float pair destination + flags */
4178 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4179 return -1;
4180 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4181 return -1;
4182 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4183 return -1;
4184 break;
4185
4186 case 0xb342: /* LTXBR - load and test */
4187 case 0xb34a: /* AXBR - add */
4188 case 0xb34b: /* SXBR - subtract */
4189 case 0xb3da: /* AXTR - add */
4190 case 0xb3db: /* SXTR - subtract */
4191 case 0xb3de: /* LTXTR - load and test */
4192 /* float pair destination + flags + fpc */
4193 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4194 return -1;
4195 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4196 return -1;
4197 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4198 return -1;
4199 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4200 return -1;
4201 break;
4202
4203 /* 0xb34e-0xb34f undefined */
4204 /* 0xb352 undefined */
4205
4206 case 0xb353: /* DIEBR - divide to integer */
4207 case 0xb35b: /* DIDBR - divide to integer */
4208 /* two float destinations + flags + fpc */
4209 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4210 return -1;
4211 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4212 return -1;
4213 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4214 return -1;
4215 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4216 return -1;
4217 break;
4218
4219 /* 0xb354-0xb356 undefined */
4220 /* 0xb35a undefined */
4221
4222 /* 0xb35c-0xb35e undefined */
4223 /* 0xb364 undefined */
4224 /* 0xb368 undefined */
4225
4226 case 0xb369: /* CXR - compare */
4227 case 0xb3f4: /* CEDTR - compare biased exponent */
4228 case 0xb3fc: /* CEXTR - compare biased exponent */
4229 case 0xb920: /* CGR - compare */
4230 case 0xb921: /* CLGR - compare logical */
4231 case 0xb930: /* CGFR - compare */
4232 case 0xb931: /* CLGFR - compare logical */
4233 case 0xb9cd: /* CHHR - compare high */
4234 case 0xb9cf: /* CLHHR - compare logical high */
4235 case 0xb9dd: /* CHLR - compare high */
4236 case 0xb9df: /* CLHLR - compare logical high */
4237 /* flags only */
4238 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4239 return -1;
4240 break;
4241
4242 /* 0xb36a-0xb36f undefined */
4243 /* 0xb377-0xb37e undefined */
4244 /* 0xb380-0xb383 undefined */
4245 /* 0xb386-0xb38b undefined */
4246 /* 0xb38d-0xb38f undefined */
4247 /* 0xb393 undefined */
4248 /* 0xb397 undefined */
4249
4250 case 0xb398: /* CFEBR - convert to fixed */
4251 case 0xb399: /* CFDBR - convert to fixed */
4252 case 0xb39a: /* CFXBR - convert to fixed */
4253 case 0xb39c: /* CLFEBR - convert to logical */
4254 case 0xb39d: /* CLFDBR - convert to logical */
4255 case 0xb39e: /* CLFXBR - convert to logical */
4256 case 0xb941: /* CFDTR - convert to fixed */
4257 case 0xb949: /* CFXTR - convert to fixed */
4258 case 0xb943: /* CLFDTR - convert to logical */
4259 case 0xb94b: /* CLFXTR - convert to logical */
4260 /* 32-bit gpr destination + flags + fpc */
4261 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4262 return -1;
4263 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4264 return -1;
4265 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4266 return -1;
4267 break;
4268
4269 /* 0xb39b undefined */
4270 /* 0xb39f undefined */
4271
4272 /* 0xb3a3 undefined */
4273 /* 0xb3a7 undefined */
4274
4275 case 0xb3a8: /* CGEBR - convert to fixed */
4276 case 0xb3a9: /* CGDBR - convert to fixed */
4277 case 0xb3aa: /* CGXBR - convert to fixed */
4278 case 0xb3ac: /* CLGEBR - convert to logical */
4279 case 0xb3ad: /* CLGDBR - convert to logical */
4280 case 0xb3ae: /* CLGXBR - convert to logical */
4281 case 0xb3e1: /* CGDTR - convert to fixed */
4282 case 0xb3e9: /* CGXTR - convert to fixed */
4283 case 0xb942: /* CLGDTR - convert to logical */
4284 case 0xb94a: /* CLGXTR - convert to logical */
4285 /* 64-bit gpr destination + flags + fpc */
4286 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4287 return -1;
4288 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4289 return -1;
4290 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4291 return -1;
4292 break;
4293
4294 /* 0xb3ab undefined */
4295 /* 0xb3af-0xb3b3 undefined */
4296 /* 0xb3b7 undefined */
4297
4298 case 0xb3b8: /* CFER - convert to fixed */
4299 case 0xb3b9: /* CFDR - convert to fixed */
4300 case 0xb3ba: /* CFXR - convert to fixed */
4301 case 0xb998: /* ALCR - add logical with carry */
4302 case 0xb999: /* SLBR - subtract logical with borrow */
4303 case 0xb9f4: /* NRK - and */
4304 case 0xb9f5: /* NCRK - and with complement */
4305 case 0xb9f6: /* ORK - or */
4306 case 0xb9f7: /* XRK - xor */
4307 case 0xb9f8: /* ARK - add */
4308 case 0xb9f9: /* SRK - subtract */
4309 case 0xb9fa: /* ALRK - add logical */
4310 case 0xb9fb: /* SLRK - subtract logical */
4311 /* 32-bit gpr destination + flags */
4312 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4313 return -1;
4314 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4315 return -1;
4316 break;
4317
4318 case 0xb3c8: /* CGER - convert to fixed */
4319 case 0xb3c9: /* CGDR - convert to fixed */
4320 case 0xb3ca: /* CGXR - convert to fixed */
4321 case 0xb900: /* LPGR - load positive */
4322 case 0xb901: /* LNGR - load negative */
4323 case 0xb902: /* LTGR - load and test */
4324 case 0xb903: /* LCGR - load complement */
4325 case 0xb908: /* AGR - add */
4326 case 0xb909: /* SGR - subtract */
4327 case 0xb90a: /* ALGR - add logical */
4328 case 0xb90b: /* SLGR - subtract logical */
4329 case 0xb910: /* LPGFR - load positive */
4330 case 0xb911: /* LNGFR - load negative */
4331 case 0xb912: /* LTGFR - load and test */
4332 case 0xb913: /* LCGFR - load complement */
4333 case 0xb918: /* AGFR - add */
4334 case 0xb919: /* SGFR - subtract */
4335 case 0xb91a: /* ALGFR - add logical */
4336 case 0xb91b: /* SLGFR - subtract logical */
4337 case 0xb964: /* NNGRK - and 64 bit */
4338 case 0xb965: /* OCGRK - or with complement 64 bit */
4339 case 0xb966: /* NOGRK - or 64 bit */
4340 case 0xb967: /* NXGRK - not exclusive or 64 bit */
4341 case 0xb974: /* NNRK - and 32 bit */
4342 case 0xb975: /* OCRK - or with complement 32 bit */
4343 case 0xb976: /* NORK - or 32 bit */
4344 case 0xb977: /* NXRK - not exclusive or 32 bit */
4345 case 0xb980: /* NGR - and */
4346 case 0xb981: /* OGR - or */
4347 case 0xb982: /* XGR - xor */
4348 case 0xb988: /* ALCGR - add logical with carry */
4349 case 0xb989: /* SLBGR - subtract logical with borrow */
4350 case 0xb9c0: /* SELFHR - select high */
4351 case 0xb9e1: /* POPCNT - population count */
4352 case 0xb9e4: /* NGRK - and */
4353 case 0xb9e5: /* NCGRK - and with complement */
4354 case 0xb9e6: /* OGRK - or */
4355 case 0xb9e7: /* XGRK - xor */
4356 case 0xb9e8: /* AGRK - add */
4357 case 0xb9e9: /* SGRK - subtract */
4358 case 0xb9ea: /* ALGRK - add logical */
4359 case 0xb9e3: /* SELGR - select 64 bit */
4360 case 0xb9eb: /* SLGRK - subtract logical */
4361 case 0xb9ed: /* MSGRKC - multiply single 64x64 -> 64 */
4362 case 0xb9f0: /* SELR - select 32 bit */
4363 case 0xb9fd: /* MSRKC - multiply single 32x32 -> 32 */
4364 /* 64-bit gpr destination + flags */
4365 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4366 return -1;
4367 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4368 return -1;
4369 break;
4370
4371 /* 0xb3bb-0xb3c0 undefined */
4372 /* 0xb3c2-0xb3c3 undefined */
4373 /* 0xb3c7 undefined */
4374 /* 0xb3cb-0xb3cc undefined */
4375
4376 case 0xb3cd: /* LGDR - load gr from fpr */
4377 case 0xb3e2: /* CUDTR - convert to unsigned packed */
4378 case 0xb3e3: /* CSDTR - convert to signed packed */
4379 case 0xb3e5: /* EEDTR - extract biased exponent */
4380 case 0xb3e7: /* ESDTR - extract significance */
4381 case 0xb3ed: /* EEXTR - extract biased exponent */
4382 case 0xb3ef: /* ESXTR - extract significance */
4383 case 0xb904: /* LGR - load */
4384 case 0xb906: /* LGBR - load byte */
4385 case 0xb907: /* LGHR - load halfword */
4386 case 0xb90c: /* MSGR - multiply single */
4387 case 0xb90f: /* LRVGR - load reversed */
4388 case 0xb914: /* LGFR - load */
4389 case 0xb916: /* LLGFR - load logical */
4390 case 0xb917: /* LLGTR - load logical thirty one bits */
4391 case 0xb91c: /* MSGFR - multiply single 64<32 */
4392 case 0xb946: /* BCTGR - branch on count */
4393 case 0xb968: /* CLZG - count leading zeros */
4394 case 0xb969: /* CTZG - count trailing zeros */
4395 case 0xb96c: /* BEXTG - bit extract */
4396 case 0xb96d: /* BDEPG - bit deposit */
4397 case 0xb984: /* LLGCR - load logical character */
4398 case 0xb985: /* LLGHR - load logical halfword */
4399 case 0xb9e2: /* LOCGR - load on condition */
4400 /* 64-bit gpr destination */
4401 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4402 return -1;
4403 break;
4404
4405 /* 0xb3ce-0xb3cf undefined */
4406 /* 0xb3e6 undefined */
4407
4408 case 0xb3ea: /* CUXTR - convert to unsigned packed */
4409 case 0xb3eb: /* CSXTR - convert to signed packed */
4410 case 0xb90d: /* DSGR - divide single */
4411 case 0xb91d: /* DSGFR - divide single */
4412 case 0xb986: /* MLGR - multiply logical */
4413 case 0xb987: /* DLGR - divide logical */
4414 case 0xb9ec: /* MGRK - multiply 64x64 -> 128 */
4415 /* 64-bit gpr pair destination */
4416 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4417 return -1;
4418 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
4419 return -1;
4420 break;
4421
4422 /* 0xb3ee undefined */
4423 /* 0xb3f0 undefined */
4424 /* 0xb3f8 undefined */
4425
4426 /* 0xb905 privileged */
4427
4428 /* 0xb90e unsupported: EREGG */
4429
4430 /* 0xb915 undefined */
4431
4432 case 0xb91e: /* KMAC - compute message authentication code [partial] */
4433 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4434 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4435 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4436 tmp &= 0xff;
4437 switch (tmp)
4438 {
4439 case 0x00: /* KMAC-Query */
4440 if (record_full_arch_list_add_mem (oaddr, 16))
4441 return -1;
4442 break;
4443
4444 case 0x01: /* KMAC-DEA */
4445 case 0x02: /* KMAC-TDEA-128 */
4446 case 0x03: /* KMAC-TDEA-192 */
4447 case 0x09: /* KMAC-Encrypted-DEA */
4448 case 0x0a: /* KMAC-Encrypted-TDEA-128 */
4449 case 0x0b: /* KMAC-Encrypted-TDEA-192 */
4450 if (record_full_arch_list_add_mem (oaddr, 8))
4451 return -1;
4452 break;
4453
4454 case 0x12: /* KMAC-AES-128 */
4455 case 0x13: /* KMAC-AES-192 */
4456 case 0x14: /* KMAC-AES-256 */
4457 case 0x1a: /* KMAC-Encrypted-AES-128 */
4458 case 0x1b: /* KMAC-Encrypted-AES-192 */
4459 case 0x1c: /* KMAC-Encrypted-AES-256 */
4460 if (record_full_arch_list_add_mem (oaddr, 16))
4461 return -1;
4462 break;
4463
4464 default:
4465 gdb_printf (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
4466 (int)tmp, paddress (gdbarch, addr));
4467 return -1;
4468 }
4469 if (tmp != 0)
4470 {
4471 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4472 return -1;
4473 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4474 return -1;
4475 }
4476 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4477 return -1;
4478 break;
4479
4480 /* 0xb922-0xb924 undefined */
4481 /* 0xb925 privileged */
4482 /* 0xb928 privileged */
4483
4484 case 0xb929: /* KMA - cipher message with authentication */
4485 case 0xb92a: /* KMF - cipher message with cipher feedback [partial] */
4486 case 0xb92b: /* KMO - cipher message with output feedback [partial] */
4487 case 0xb92f: /* KMC - cipher message with chaining [partial] */
4488 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4489 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4490 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4491 tmp &= 0x7f;
4492 switch (tmp)
4493 {
4494 case 0x00: /* KM*-Query */
4495 if (record_full_arch_list_add_mem (oaddr, 16))
4496 return -1;
4497 break;
4498
4499 case 0x01: /* KM*-DEA */
4500 case 0x02: /* KM*-TDEA-128 */
4501 case 0x03: /* KM*-TDEA-192 */
4502 case 0x09: /* KM*-Encrypted-DEA */
4503 case 0x0a: /* KM*-Encrypted-TDEA-128 */
4504 case 0x0b: /* KM*-Encrypted-TDEA-192 */
4505 if (record_full_arch_list_add_mem (oaddr, 8))
4506 return -1;
4507 break;
4508
4509 case 0x12: /* KM*-AES-128 */
4510 case 0x13: /* KM*-AES-192 */
4511 case 0x14: /* KM*-AES-256 */
4512 case 0x1a: /* KM*-Encrypted-AES-128 */
4513 case 0x1b: /* KM*-Encrypted-AES-192 */
4514 case 0x1c: /* KM*-Encrypted-AES-256 */
4515 if (record_full_arch_list_add_mem (oaddr, 16))
4516 return -1;
4517 break;
4518
4519 case 0x43: /* KMC-PRNG */
4520 /* Only valid for KMC. */
4521 if (insn[0] == 0xb92f)
4522 {
4523 if (record_full_arch_list_add_mem (oaddr, 8))
4524 return -1;
4525 break;
4526 }
4527 /* For other instructions... */
4528 [[fallthrough]];
4529 default:
4530 gdb_printf (gdb_stdlog, "Warning: Unknown KM* function %02x at %s.\n",
4531 (int)tmp, paddress (gdbarch, addr));
4532 return -1;
4533 }
4534 if (tmp != 0)
4535 {
4536 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4537 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4538 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4539 if (record_full_arch_list_add_mem (oaddr2, tmp))
4540 return -1;
4541 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4542 return -1;
4543 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4544 return -1;
4545 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4546 return -1;
4547 }
4548 if (tmp != 0 && insn[0] == 0xb929)
4549 {
4550 if (record_full_arch_list_add_reg (regcache,
4551 S390_R0_REGNUM + inib[4]))
4552 return -1;
4553 if (record_full_arch_list_add_reg (regcache,
4554 S390_R0_REGNUM + (inib[4] | 1)))
4555 return -1;
4556 }
4557 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4558 return -1;
4559 break;
4560
4561 case 0xb92c: /* PCC - perform cryptographic computation [partial] */
4562 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4563 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4564 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4565 tmp &= 0x7f;
4566 switch (tmp)
4567 {
4568 case 0x00: /* PCC-Query */
4569 if (record_full_arch_list_add_mem (oaddr, 16))
4570 return -1;
4571 break;
4572
4573 case 0x01: /* PCC-Compute-Last-Block-CMAC-Using-DEA */
4574 case 0x02: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-128 */
4575 case 0x03: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-192 */
4576 case 0x09: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-DEA */
4577 case 0x0a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-128 */
4578 case 0x0b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-192 */
4579 if (record_full_arch_list_add_mem (oaddr + 0x10, 8))
4580 return -1;
4581 break;
4582
4583 case 0x12: /* PCC-Compute-Last-Block-CMAC-Using-AES-128 */
4584 case 0x13: /* PCC-Compute-Last-Block-CMAC-Using-AES-192 */
4585 case 0x14: /* PCC-Compute-Last-Block-CMAC-Using-AES-256 */
4586 case 0x1a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-128 */
4587 case 0x1b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-192 */
4588 case 0x1c: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-256 */
4589 if (record_full_arch_list_add_mem (oaddr + 0x18, 16))
4590 return -1;
4591 break;
4592
4593 case 0x32: /* PCC-Compute-XTS-Parameter-Using-AES-128 */
4594 if (record_full_arch_list_add_mem (oaddr + 0x30, 32))
4595 return -1;
4596 break;
4597
4598 case 0x34: /* PCC-Compute-XTS-Parameter-Using-AES-256 */
4599 if (record_full_arch_list_add_mem (oaddr + 0x40, 32))
4600 return -1;
4601 break;
4602
4603 case 0x3a: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-128 */
4604 if (record_full_arch_list_add_mem (oaddr + 0x50, 32))
4605 return -1;
4606 break;
4607
4608 case 0x3c: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-256 */
4609 if (record_full_arch_list_add_mem (oaddr + 0x60, 32))
4610 return -1;
4611 break;
4612
4613 default:
4614 gdb_printf (gdb_stdlog, "Warning: Unknown PCC function %02x at %s.\n",
4615 (int)tmp, paddress (gdbarch, addr));
4616 return -1;
4617 }
4618 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4619 return -1;
4620 break;
4621
4622 case 0xb92d: /* KMCTR - cipher message with counter [partial] */
4623 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4624 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4625 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4626 tmp &= 0x7f;
4627 switch (tmp)
4628 {
4629 case 0x00: /* KMCTR-Query */
4630 if (record_full_arch_list_add_mem (oaddr, 16))
4631 return -1;
4632 break;
4633
4634 case 0x01: /* KMCTR-DEA */
4635 case 0x02: /* KMCTR-TDEA-128 */
4636 case 0x03: /* KMCTR-TDEA-192 */
4637 case 0x09: /* KMCTR-Encrypted-DEA */
4638 case 0x0a: /* KMCTR-Encrypted-TDEA-128 */
4639 case 0x0b: /* KMCTR-Encrypted-TDEA-192 */
4640 case 0x12: /* KMCTR-AES-128 */
4641 case 0x13: /* KMCTR-AES-192 */
4642 case 0x14: /* KMCTR-AES-256 */
4643 case 0x1a: /* KMCTR-Encrypted-AES-128 */
4644 case 0x1b: /* KMCTR-Encrypted-AES-192 */
4645 case 0x1c: /* KMCTR-Encrypted-AES-256 */
4646 break;
4647
4648 default:
4649 gdb_printf (gdb_stdlog, "Warning: Unknown KMCTR function %02x at %s.\n",
4650 (int)tmp, paddress (gdbarch, addr));
4651 return -1;
4652 }
4653 if (tmp != 0)
4654 {
4655 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4656 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4657 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4658 if (record_full_arch_list_add_mem (oaddr2, tmp))
4659 return -1;
4660 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4661 return -1;
4662 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4663 return -1;
4664 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4665 return -1;
4666 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[4]))
4667 return -1;
4668 }
4669 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4670 return -1;
4671 break;
4672
4673 case 0xb92e: /* KM - cipher message [partial] */
4674 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4675 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4676 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4677 tmp &= 0x7f;
4678 switch (tmp)
4679 {
4680 case 0x00: /* KM-Query */
4681 if (record_full_arch_list_add_mem (oaddr, 16))
4682 return -1;
4683 break;
4684
4685 case 0x01: /* KM-DEA */
4686 case 0x02: /* KM-TDEA-128 */
4687 case 0x03: /* KM-TDEA-192 */
4688 case 0x09: /* KM-Encrypted-DEA */
4689 case 0x0a: /* KM-Encrypted-TDEA-128 */
4690 case 0x0b: /* KM-Encrypted-TDEA-192 */
4691 case 0x12: /* KM-AES-128 */
4692 case 0x13: /* KM-AES-192 */
4693 case 0x14: /* KM-AES-256 */
4694 case 0x1a: /* KM-Encrypted-AES-128 */
4695 case 0x1b: /* KM-Encrypted-AES-192 */
4696 case 0x1c: /* KM-Encrypted-AES-256 */
4697 break;
4698
4699 case 0x32: /* KM-XTS-AES-128 */
4700 if (record_full_arch_list_add_mem (oaddr + 0x10, 16))
4701 return -1;
4702 break;
4703
4704 case 0x34: /* KM-XTS-AES-256 */
4705 if (record_full_arch_list_add_mem (oaddr + 0x20, 16))
4706 return -1;
4707 break;
4708
4709 case 0x3a: /* KM-XTS-Encrypted-AES-128 */
4710 if (record_full_arch_list_add_mem (oaddr + 0x30, 16))
4711 return -1;
4712 break;
4713
4714 case 0x3c: /* KM-XTS-Encrypted-AES-256 */
4715 if (record_full_arch_list_add_mem (oaddr + 0x40, 16))
4716 return -1;
4717 break;
4718
4719 default:
4720 gdb_printf (gdb_stdlog, "Warning: Unknown KM function %02x at %s.\n",
4721 (int)tmp, paddress (gdbarch, addr));
4722 return -1;
4723 }
4724 if (tmp != 0)
4725 {
4726 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4727 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4728 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4729 if (record_full_arch_list_add_mem (oaddr2, tmp))
4730 return -1;
4731 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4732 return -1;
4733 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4734 return -1;
4735 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4736 return -1;
4737 }
4738 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4739 return -1;
4740 break;
4741
4742 /* 0xb932-0xb937 undefined */
4743
4744 /* 0xb938 unsupported: SORTL - sort lists */
4745 /* 0xb939 unsupported: DFLTCC - deflate conversion call */
4746 /* 0xb93a unsupported: KDSA - compute dig. signature auth. */
4747
4748 /* 0xb93b undefined */
4749
4750 case 0xb93c: /* PPNO - perform pseudorandom number operation [partial] */
4751 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4752 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4753 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4754 tmp &= 0xff;
4755 switch (tmp)
4756 {
4757 case 0x00: /* PPNO-Query */
4758 case 0x80: /* PPNO-Query */
4759 if (record_full_arch_list_add_mem (oaddr, 16))
4760 return -1;
4761 break;
4762
4763 case 0x03: /* PPNO-SHA-512-DRNG - generate */
4764 if (record_full_arch_list_add_mem (oaddr, 240))
4765 return -1;
4766 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4767 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4768 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4769 if (record_full_arch_list_add_mem (oaddr2, tmp))
4770 return -1;
4771 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4772 return -1;
4773 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4774 return -1;
4775 break;
4776
4777 case 0x83: /* PPNO-SHA-512-DRNG - seed */
4778 if (record_full_arch_list_add_mem (oaddr, 240))
4779 return -1;
4780 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4781 return -1;
4782 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4783 return -1;
4784 break;
4785
4786 default:
4787 gdb_printf (gdb_stdlog, "Warning: Unknown PPNO function %02x at %s.\n",
4788 (int)tmp, paddress (gdbarch, addr));
4789 return -1;
4790 }
4791 /* DXC may be written */
4792 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4793 return -1;
4794 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4795 return -1;
4796 break;
4797
4798 /* 0xb93d undefined */
4799
4800 case 0xb93e: /* KIMD - compute intermediate message digest [partial] */
4801 case 0xb93f: /* KLMD - compute last message digest [partial] */
4802 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4803 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4804 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4805 tmp &= 0xff;
4806 switch (tmp)
4807 {
4808 case 0x00: /* K*MD-Query */
4809 if (record_full_arch_list_add_mem (oaddr, 16))
4810 return -1;
4811 break;
4812
4813 case 0x01: /* K*MD-SHA-1 */
4814 if (record_full_arch_list_add_mem (oaddr, 20))
4815 return -1;
4816 break;
4817
4818 case 0x02: /* K*MD-SHA-256 */
4819 if (record_full_arch_list_add_mem (oaddr, 32))
4820 return -1;
4821 break;
4822
4823 case 0x03: /* K*MD-SHA-512 */
4824 if (record_full_arch_list_add_mem (oaddr, 64))
4825 return -1;
4826 break;
4827
4828 case 0x41: /* KIMD-GHASH */
4829 /* Only valid for KIMD. */
4830 if (insn[0] == 0xb93e)
4831 {
4832 if (record_full_arch_list_add_mem (oaddr, 16))
4833 return -1;
4834 break;
4835 }
4836 /* For KLMD... */
4837 [[fallthrough]];
4838 default:
4839 gdb_printf (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
4840 (int)tmp, paddress (gdbarch, addr));
4841 return -1;
4842 }
4843 if (tmp != 0)
4844 {
4845 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4846 return -1;
4847 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4848 return -1;
4849 }
4850 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4851 return -1;
4852 break;
4853
4854 /* 0xb940 undefined */
4855 /* 0xb944-0xb945 undefined */
4856 /* 0xb947-0xb948 undefined */
4857 /* 0xb94c-0xb950 undefined */
4858 /* 0xb954-0xb958 undefined */
4859 /* 0xb95c-0xb95f undefined */
4860 /* 0xb962-0xb971 undefined */
4861 /* 0xb974-0xb97f undefined */
4862
4863 case 0xb983: /* FLOGR - find leftmost one */
4864 /* 64-bit gpr pair destination + flags */
4865 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4866 return -1;
4867 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
4868 return -1;
4869 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4870 return -1;
4871 break;
4872
4873 /* 0xb98a privileged */
4874 /* 0xb98b-0xb98c undefined */
4875
4876 case 0xb98d: /* EPSW - extract psw */
4877 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4878 return -1;
4879 if (inib[7])
4880 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4881 return -1;
4882 break;
4883
4884 /* 0xb98e-0xb98f privileged */
4885
4886 case 0xb990: /* TRTT - translate two to two [partial] */
4887 case 0xb991: /* TRTO - translate two to one [partial] */
4888 case 0xb992: /* TROT - translate one to two [partial] */
4889 case 0xb993: /* TROO - translate one to one [partial] */
4890 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4891 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4892 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4893 /* tmp is source length, we want destination length. Adjust. */
4894 if (insn[0] == 0xb991)
4895 tmp >>= 1;
4896 if (insn[0] == 0xb992)
4897 tmp <<= 1;
4898 if (record_full_arch_list_add_mem (oaddr, tmp))
4899 return -1;
4900 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4901 return -1;
4902 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4903 return -1;
4904 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4905 return -1;
4906 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4907 return -1;
4908 break;
4909
4910 case 0xb996: /* MLR - multiply logical */
4911 case 0xb997: /* DLR - divide logical */
4912 /* 32-bit gpr pair destination */
4913 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4914 return -1;
4915 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4916 return -1;
4917 break;
4918
4919 /* 0xb99a-0xb9af unsupported, privileged, or undefined */
4920 /* 0xb9b4-0xb9bc undefined */
4921
4922 case 0xb9bd: /* TRTRE - translate and test reverse extended [partial] */
4923 case 0xb9bf: /* TRTE - translate and test extended [partial] */
4924 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4925 return -1;
4926 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4927 return -1;
4928 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4929 return -1;
4930 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4931 return -1;
4932 break;
4933
4934 /* 0xb9c0-0xb9c7 undefined */
4935
4936 case 0xb9c8: /* AHHHR - add high */
4937 case 0xb9c9: /* SHHHR - subtract high */
4938 case 0xb9ca: /* ALHHHR - add logical high */
4939 case 0xb9cb: /* SLHHHR - subtract logical high */
4940 case 0xb9d8: /* AHHLR - add high */
4941 case 0xb9d9: /* SHHLR - subtract high */
4942 case 0xb9da: /* ALHHLR - add logical high */
4943 case 0xb9db: /* SLHHLR - subtract logical high */
4944 /* 32-bit high gpr destination + flags */
4945 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
4946 return -1;
4947 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4948 return -1;
4949 break;
4950
4951 /* 0xb9cc undefined */
4952 /* 0xb9ce undefined */
4953 /* 0xb9d0-0xb9d7 undefined */
4954 /* 0xb9dc undefined */
4955 /* 0xb9de undefined */
4956
4957 case 0xb9e0: /* LOCFHR - load high on condition */
4958 /* 32-bit high gpr destination */
4959 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
4960 return -1;
4961 break;
4962
4963 /* 0xb9e3 undefined */
4964 /* 0xb9e5 undefined */
4965 /* 0xb9ee-0xb9f1 undefined */
4966 /* 0xb9f3 undefined */
4967 /* 0xb9f5 undefined */
4968 /* 0xb9fc undefined */
4969 /* 0xb9fe -0xb9ff undefined */
4970
4971 default:
4972 goto UNKNOWN_OP;
4973 }
4974 break;
4975
4976 /* 0xb4-0xb5 undefined */
4977 /* 0xb6 privileged: STCTL - store control */
4978 /* 0xb7 privileged: LCTL - load control */
4979 /* 0xb8 undefined */
4980
4981 case 0xba: /* CS - compare and swap */
4982 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4983 if (record_full_arch_list_add_mem (oaddr, 4))
4984 return -1;
4985 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4986 return -1;
4987 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4988 return -1;
4989 break;
4990
4991 case 0xbb: /* CDS - compare double and swap */
4992 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4993 if (record_full_arch_list_add_mem (oaddr, 8))
4994 return -1;
4995 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4996 return -1;
4997 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
4998 return -1;
4999 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5000 return -1;
5001 break;
5002
5003 /* 0xbc undefined */
5004
5005 case 0xbe: /* STCM - store characters under mask */
5006 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5007 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
5008 return -1;
5009 break;
5010
5011 case 0xc0:
5012 case 0xc2:
5013 case 0xc4:
5014 case 0xc6:
5015 case 0xcc:
5016 /* RIL-format instruction */
5017 switch (ibyte[0] << 4 | inib[3])
5018 {
5019 case 0xc00: /* LARL - load address relative long */
5020 case 0xc05: /* BRASL - branch relative and save long */
5021 case 0xc09: /* IILF - insert immediate */
5022 case 0xc21: /* MSFI - multiply single immediate */
5023 case 0xc42: /* LLHRL - load logical halfword relative long */
5024 case 0xc45: /* LHRL - load halfword relative long */
5025 case 0xc4d: /* LRL - load relative long */
5026 /* 32-bit or native gpr destination */
5027 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5028 return -1;
5029 break;
5030
5031 case 0xc01: /* LGFI - load immediate */
5032 case 0xc0e: /* LLIHF - load logical immediate */
5033 case 0xc0f: /* LLILF - load logical immediate */
5034 case 0xc20: /* MSGFI - multiply single immediate */
5035 case 0xc44: /* LGHRL - load halfword relative long */
5036 case 0xc46: /* LLGHRL - load logical halfword relative long */
5037 case 0xc48: /* LGRL - load relative long */
5038 case 0xc4c: /* LGFRL - load relative long */
5039 case 0xc4e: /* LLGFRL - load logical relative long */
5040 /* 64-bit gpr destination */
5041 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5042 return -1;
5043 break;
5044
5045 /* 0xc02-0xc03 undefined */
5046
5047 case 0xc04: /* BRCL - branch relative on condition long */
5048 case 0xc62: /* PFDRL - prefetch data relative long */
5049 break;
5050
5051 case 0xc06: /* XIHF - xor immediate */
5052 case 0xc0a: /* NIHF - and immediate */
5053 case 0xc0c: /* OIHF - or immediate */
5054 case 0xcc8: /* AIH - add immediate high */
5055 case 0xcca: /* ALSIH - add logical with signed immediate high */
5056 /* 32-bit high gpr destination + flags */
5057 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5058 return -1;
5059 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5060 return -1;
5061 break;
5062
5063 case 0xc07: /* XILF - xor immediate */
5064 case 0xc0b: /* NILF - and immediate */
5065 case 0xc0d: /* OILF - or immediate */
5066 case 0xc25: /* SLFI - subtract logical immediate */
5067 case 0xc29: /* AFI - add immediate */
5068 case 0xc2b: /* ALFI - add logical immediate */
5069 /* 32-bit gpr destination + flags */
5070 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5071 return -1;
5072 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5073 return -1;
5074 break;
5075
5076 case 0xc08: /* IIHF - insert immediate */
5077 case 0xcc6: /* BRCTH - branch relative on count high */
5078 case 0xccb: /* ALSIHN - add logical with signed immediate high */
5079 /* 32-bit high gpr destination */
5080 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5081 return -1;
5082 break;
5083
5084 /* 0xc22-0xc23 undefined */
5085
5086 case 0xc24: /* SLGFI - subtract logical immediate */
5087 case 0xc28: /* AGFI - add immediate */
5088 case 0xc2a: /* ALGFI - add logical immediate */
5089 /* 64-bit gpr destination + flags */
5090 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5091 return -1;
5092 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5093 return -1;
5094 break;
5095
5096 /* 0xc26-0xc27 undefined */
5097
5098 case 0xc2c: /* CGFI - compare immediate */
5099 case 0xc2d: /* CFI - compare immediate */
5100 case 0xc2e: /* CLGFI - compare logical immediate */
5101 case 0xc2f: /* CLFI - compare logical immediate */
5102 case 0xc64: /* CGHRL - compare halfword relative long */
5103 case 0xc65: /* CHRL - compare halfword relative long */
5104 case 0xc66: /* CLGHRL - compare logical halfword relative long */
5105 case 0xc67: /* CLHRL - compare logical halfword relative long */
5106 case 0xc68: /* CGRL - compare relative long */
5107 case 0xc6a: /* CLGRL - compare logical relative long */
5108 case 0xc6c: /* CGFRL - compare relative long */
5109 case 0xc6d: /* CRL - compare relative long */
5110 case 0xc6e: /* CLGFRL - compare logical relative long */
5111 case 0xc6f: /* CLRL - compare logical relative long */
5112 case 0xccd: /* CIH - compare immediate high */
5113 case 0xccf: /* CLIH - compare logical immediate high */
5114 /* flags only */
5115 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5116 return -1;
5117 break;
5118
5119 /* 0xc40-0xc41 undefined */
5120 /* 0xc43 undefined */
5121
5122 case 0xc47: /* STHRL - store halfword relative long */
5123 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
5124 if (record_full_arch_list_add_mem (oaddr, 2))
5125 return -1;
5126 break;
5127
5128 /* 0xc49-0xc4a undefined */
5129
5130 case 0xc4b: /* STGRL - store relative long */
5131 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
5132 if (record_full_arch_list_add_mem (oaddr, 8))
5133 return -1;
5134 break;
5135
5136 case 0xc4f: /* STRL - store relative long */
5137 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
5138 if (record_full_arch_list_add_mem (oaddr, 4))
5139 return -1;
5140 break;
5141
5142 case 0xc60: /* EXRL - execute relative long */
5143 if (ex != -1)
5144 {
5145 gdb_printf (gdb_stdlog, "Warning: Double execute at %s.\n",
5146 paddress (gdbarch, addr));
5147 return -1;
5148 }
5149 addr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
5150 if (inib[2])
5151 {
5152 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
5153 ex = tmp & 0xff;
5154 }
5155 else
5156 {
5157 ex = 0;
5158 }
5159 goto ex;
5160
5161 /* 0xc61 undefined */
5162 /* 0xc63 undefined */
5163 /* 0xc69 undefined */
5164 /* 0xc6b undefined */
5165 /* 0xcc0-0xcc5 undefined */
5166 /* 0xcc7 undefined */
5167 /* 0xcc9 undefined */
5168 /* 0xccc undefined */
5169 /* 0xcce undefined */
5170
5171 default:
5172 goto UNKNOWN_OP;
5173 }
5174 break;
5175
5176 /* 0xc1 undefined */
5177 /* 0xc3 undefined */
5178
5179 case 0xc5: /* BPRP - branch prediction relative preload */
5180 case 0xc7: /* BPP - branch prediction preload */
5181 /* no visible effect */
5182 break;
5183
5184 case 0xc8:
5185 /* SSF-format instruction */
5186 switch (ibyte[0] << 4 | inib[3])
5187 {
5188 /* 0xc80 unsupported */
5189
5190 case 0xc81: /* ECTG - extract cpu time */
5191 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5192 return -1;
5193 if (s390_record_gpr_g (gdbarch, regcache, 0))
5194 return -1;
5195 if (s390_record_gpr_g (gdbarch, regcache, 1))
5196 return -1;
5197 break;
5198
5199 case 0xc82: /* CSST - compare and swap and store */
5200 {
5201 uint8_t fc, sc;
5202 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5203 fc = tmp & 0xff;
5204 sc = tmp >> 8 & 0xff;
5205
5206 /* First and third operands. */
5207 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5208 switch (fc)
5209 {
5210 case 0x00: /* 32-bit */
5211 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5212 return -1;
5213 if (record_full_arch_list_add_mem (oaddr, 4))
5214 return -1;
5215 break;
5216
5217 case 0x01: /* 64-bit */
5218 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5219 return -1;
5220 if (record_full_arch_list_add_mem (oaddr, 8))
5221 return -1;
5222 break;
5223
5224 case 0x02: /* 128-bit */
5225 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5226 return -1;
5227 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5228 return -1;
5229 if (record_full_arch_list_add_mem (oaddr, 16))
5230 return -1;
5231 break;
5232
5233 default:
5234 gdb_printf (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5235 fc, paddress (gdbarch, addr));
5236 return -1;
5237 }
5238
5239 /* Second operand. */
5240 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
5241 if (sc > 4)
5242 {
5243 gdb_printf (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5244 sc, paddress (gdbarch, addr));
5245 return -1;
5246 }
5247
5248 if (record_full_arch_list_add_mem (oaddr2, 1 << sc))
5249 return -1;
5250
5251 /* Flags. */
5252 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5253 return -1;
5254 }
5255 break;
5256
5257 /* 0xc83 undefined */
5258
5259 case 0xc84: /* LPD - load pair disjoint */
5260 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5261 return -1;
5262 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5263 return -1;
5264 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5265 return -1;
5266 break;
5267
5268 case 0xc85: /* LPDG - load pair disjoint */
5269 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5270 return -1;
5271 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5272 return -1;
5273 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5274 return -1;
5275 break;
5276
5277 case 0xc86: /* CAL - compare and load 32 */
5278 case 0xc87: /* CALG - compare and load 64 */
5279 case 0xc8f: /* CALGF - compare and load 64<32 */
5280 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5281 return -1;
5282 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5283 return -1;
5284 break;
5285
5286 default:
5287 goto UNKNOWN_OP;
5288 }
5289 break;
5290
5291 /* 0xc9-0xcb undefined */
5292 /* 0xcd-0xcf undefined */
5293
5294 case 0xd0: /* TRTR - translate and test reversed */
5295 case 0xdd: /* TRT - translate and test */
5296 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5297 return -1;
5298 if (record_full_arch_list_add_reg (regcache, S390_R2_REGNUM))
5299 return -1;
5300 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5301 return -1;
5302 break;
5303
5304 case 0xd1: /* MVN - move numbers */
5305 case 0xd2: /* MVC - move */
5306 case 0xd3: /* MVZ - move zones */
5307 case 0xdc: /* TR - translate */
5308 case 0xe8: /* MVCIN - move inverse */
5309 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5310 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5311 return -1;
5312 break;
5313
5314 case 0xd4: /* NC - and */
5315 case 0xd6: /* OC - or*/
5316 case 0xd7: /* XC - xor */
5317 case 0xe2: /* UNPKU - unpack unicode */
5318 case 0xea: /* UNPKA - unpack ASCII */
5319 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5320 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5321 return -1;
5322 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5323 return -1;
5324 break;
5325
5326 case 0xde: /* ED - edit */
5327 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5328 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5329 return -1;
5330 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5331 return -1;
5332 /* DXC may be written */
5333 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5334 return -1;
5335 break;
5336
5337 case 0xdf: /* EDMK - edit and mark */
5338 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5339 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5340 return -1;
5341 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5342 return -1;
5343 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5344 return -1;
5345 /* DXC may be written */
5346 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5347 return -1;
5348 break;
5349
5350 /* 0xd8 undefined */
5351 /* 0xd9 unsupported: MVCK - move with key */
5352 /* 0xda unsupported: MVCP - move to primary */
5353 /* 0xdb unsupported: MVCS - move to secondary */
5354 /* 0xe0 undefined */
5355
5356 case 0xe1: /* PKU - pack unicode */
5357 case 0xe9: /* PKA - pack ASCII */
5358 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5359 if (record_full_arch_list_add_mem (oaddr, 16))
5360 return -1;
5361 break;
5362
5363 case 0xe3:
5364 case 0xe6:
5365 case 0xe7:
5366 case 0xeb:
5367 case 0xed:
5368 /* RXY/RXE/RXF/RSL/RSY/SIY/V*-format instruction */
5369 switch (ibyte[0] << 8 | ibyte[5])
5370 {
5371 /* 0xe300-0xe301 undefined */
5372
5373 case 0xe302: /* LTG - load and test */
5374 case 0xe308: /* AG - add */
5375 case 0xe309: /* SG - subtract */
5376 case 0xe30a: /* ALG - add logical */
5377 case 0xe30b: /* SLG - subtract logical */
5378 case 0xe318: /* AGF - add */
5379 case 0xe319: /* SGF - subtract */
5380 case 0xe31a: /* ALGF - add logical */
5381 case 0xe31b: /* SLGF - subtract logical */
5382 case 0xe332: /* LTGF - load and test */
5383 case 0xe380: /* NG - and */
5384 case 0xe381: /* OG - or */
5385 case 0xe382: /* XG - xor */
5386 case 0xe388: /* ALCG - add logical with carry */
5387 case 0xe389: /* SLBG - subtract logical with borrow */
5388 case 0xeb0a: /* SRAG - shift right single */
5389 case 0xeb0b: /* SLAG - shift left single */
5390 /* 64-bit gpr destination + flags */
5391 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5392 return -1;
5393 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5394 return -1;
5395 break;
5396
5397 /* 0xe303 privileged */
5398
5399 case 0xe304: /* LG - load */
5400 case 0xe30c: /* MSG - multiply single */
5401 case 0xe30f: /* LRVG - load reversed */
5402 case 0xe314: /* LGF - load */
5403 case 0xe315: /* LGH - load halfword */
5404 case 0xe316: /* LLGF - load logical */
5405 case 0xe317: /* LLGT - load logical thirty one bits */
5406 case 0xe31c: /* MSGF - multiply single */
5407 case 0xe32a: /* LZRG - load and zero rightmost byte */
5408 case 0xe33a: /* LLZRGF - load logical and zero rightmost byte */
5409 case 0xe33c: /* MGH - multiply halfword 64x16mem -> 64 */
5410 case 0xe346: /* BCTG - branch on count */
5411 case 0xe377: /* LGB - load byte */
5412 case 0xe390: /* LLGC - load logical character */
5413 case 0xe391: /* LLGH - load logical halfword */
5414 case 0xeb0c: /* SRLG - shift right single logical */
5415 case 0xeb0d: /* SLLG - shift left single logical */
5416 case 0xeb1c: /* RLLG - rotate left single logical */
5417 case 0xeb44: /* BXHG - branch on index high */
5418 case 0xeb45: /* BXLEG - branch on index low or equal */
5419 case 0xeb4c: /* ECAG - extract cpu attribute */
5420 case 0xebe2: /* LOCG - load on condition */
5421 /* 64-bit gpr destination */
5422 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5423 return -1;
5424 break;
5425
5426 /* 0xe305 undefined */
5427
5428 case 0xe306: /* CVBY - convert to binary */
5429 /* 32-bit or native gpr destination + FPC (DXC write) */
5430 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5431 return -1;
5432 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5433 return -1;
5434 break;
5435
5436 /* 0xe307 undefined */
5437
5438 case 0xe30d: /* DSG - divide single */
5439 case 0xe31d: /* DSGF - divide single */
5440 case 0xe384: /* MG - multiply 64x64mem -> 128 */
5441 case 0xe386: /* MLG - multiply logical */
5442 case 0xe387: /* DLG - divide logical */
5443 case 0xe38f: /* LPQ - load pair from quadword */
5444 /* 64-bit gpr pair destination */
5445 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5446 return -1;
5447 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5448 return -1;
5449 break;
5450
5451 case 0xe30e: /* CVBG - convert to binary */
5452 /* 64-bit gpr destination + FPC (DXC write) */
5453 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5454 return -1;
5455 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5456 return -1;
5457 break;
5458
5459 /* 0xe310-0xe311 undefined */
5460
5461 case 0xe312: /* LT - load and test */
5462 case 0xe338: /* AGH - add halfword to 64 bit value */
5463 case 0xe339: /* SGH - subtract halfword from 64 bit value */
5464 case 0xe353: /* MSC - multiply single 32x32mem -> 32 */
5465 case 0xe354: /* NY - and */
5466 case 0xe356: /* OY - or */
5467 case 0xe357: /* XY - xor */
5468 case 0xe35a: /* AY - add */
5469 case 0xe35b: /* SY - subtract */
5470 case 0xe35e: /* ALY - add logical */
5471 case 0xe35f: /* SLY - subtract logical */
5472 case 0xe37a: /* AHY - add halfword */
5473 case 0xe37b: /* SHY - subtract halfword */
5474 case 0xe383: /* MSGC - multiply single 64x64mem -> 64 */
5475 case 0xe398: /* ALC - add logical with carry */
5476 case 0xe399: /* SLB - subtract logical with borrow */
5477 case 0xe727: /* LCBB - load count to block boundary */
5478 case 0xeb81: /* ICMY - insert characters under mask */
5479 case 0xebdc: /* SRAK - shift left single */
5480 case 0xebdd: /* SLAK - shift left single */
5481 /* 32/64-bit gpr destination + flags */
5482 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5483 return -1;
5484 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5485 return -1;
5486 break;
5487
5488 /* 0xe313 privileged */
5489
5490 case 0xe31e: /* LRV - load reversed */
5491 case 0xe31f: /* LRVH - load reversed */
5492 case 0xe33b: /* LZRF - load and zero rightmost byte */
5493 case 0xe351: /* MSY - multiply single */
5494 case 0xe358: /* LY - load */
5495 case 0xe360: /* LXAB - load indexed address (shift 0) */
5496 case 0xe361: /* LLXAB - load logical indexed address (shift 0) */
5497 case 0xe362: /* LXAH - load indexed address (shift 1) */
5498 case 0xe363: /* LLXAH - load logical indexed address (shift 1) */
5499 case 0xe364: /* LXAF - load indexed address (shift 2) */
5500 case 0xe365: /* LLXAF - load logical indexed address (shift 2) */
5501 case 0xe366: /* LXAG - load indexed address (shift 3) */
5502 case 0xe367: /* LLXAG - load logical indexed address (shift 3) */
5503 case 0xe368: /* LXAQ - load indexed address (shift 4) */
5504 case 0xe369: /* LLXAQ - load logical indexed address (shift 4) */
5505 case 0xe371: /* LAY - load address */
5506 case 0xe373: /* ICY - insert character */
5507 case 0xe376: /* LB - load byte */
5508 case 0xe378: /* LHY - load */
5509 case 0xe37c: /* MHY - multiply halfword */
5510 case 0xe394: /* LLC - load logical character */
5511 case 0xe395: /* LLH - load logical halfword */
5512 case 0xeb1d: /* RLL - rotate left single logical */
5513 case 0xebde: /* SRLK - shift left single logical */
5514 case 0xebdf: /* SLLK - shift left single logical */
5515 case 0xebf2: /* LOC - load on condition */
5516 /* 32-bit or native gpr destination */
5517 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5518 return -1;
5519 break;
5520
5521 case 0xe320: /* CG - compare */
5522 case 0xe321: /* CLG - compare logical */
5523 case 0xe330: /* CGF - compare */
5524 case 0xe331: /* CLGF - compare logical */
5525 case 0xe334: /* CGH - compare halfword */
5526 case 0xe355: /* CLY - compare logical */
5527 case 0xe359: /* CY - compare */
5528 case 0xe379: /* CHY - compare halfword */
5529 case 0xe3cd: /* CHF - compare high */
5530 case 0xe3cf: /* CLHF - compare logical high */
5531 case 0xeb20: /* CLMH - compare logical under mask high */
5532 case 0xeb21: /* CLMY - compare logical under mask */
5533 case 0xeb51: /* TMY - test under mask */
5534 case 0xeb55: /* CLIY - compare logical */
5535 case 0xebc0: /* TP - test decimal */
5536 case 0xed10: /* TCEB - test data class */
5537 case 0xed11: /* TCDB - test data class */
5538 case 0xed12: /* TCXB - test data class */
5539 case 0xed50: /* TDCET - test data class */
5540 case 0xed51: /* TDGET - test data group */
5541 case 0xed54: /* TDCDT - test data class */
5542 case 0xed55: /* TDGDT - test data group */
5543 case 0xed58: /* TDCXT - test data class */
5544 case 0xed59: /* TDGXT - test data group */
5545 /* flags only */
5546 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5547 return -1;
5548 break;
5549
5550 /* 0xe322-0xe323 undefined */
5551
5552 case 0xe324: /* STG - store */
5553 case 0xe325: /* NTSTG - nontransactional store */
5554 case 0xe326: /* CVDY - convert to decimal */
5555 case 0xe32f: /* STRVG - store reversed */
5556 case 0xed67: /* STDY - store */
5557 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5558 if (record_full_arch_list_add_mem (oaddr, 8))
5559 return -1;
5560 break;
5561
5562 /* 0xe327-0xe329 undefined */
5563 /* 0xe32b-0xe32d undefined */
5564
5565 case 0xe32e: /* CVDG - convert to decimal */
5566 case 0xe38e: /* STPQ - store pair to quadword */
5567 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5568 if (record_full_arch_list_add_mem (oaddr, 16))
5569 return -1;
5570 break;
5571
5572 /* 0xe333 undefined */
5573 /* 0xe335 undefined */
5574
5575 case 0xe336: /* PFD - prefetch data */
5576 break;
5577
5578 /* 0xe337 undefined */
5579 /* 0xe33c-0xe33d undefined */
5580
5581 case 0xe33e: /* STRV - store reversed */
5582 case 0xe350: /* STY - store */
5583 case 0xe3cb: /* STFH - store high */
5584 case 0xed66: /* STEY - store */
5585 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5586 if (record_full_arch_list_add_mem (oaddr, 4))
5587 return -1;
5588 break;
5589
5590 case 0xe33f: /* STRVH - store reversed */
5591 case 0xe370: /* STHY - store halfword */
5592 case 0xe3c7: /* STHH - store halfword high */
5593 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5594 if (record_full_arch_list_add_mem (oaddr, 2))
5595 return -1;
5596 break;
5597
5598 /* 0xe340-0xe345 undefined */
5599
5600 case 0xe347: /* BIC - branch indirect on condition */
5601 break;
5602
5603 /* 0xe348-0xe34f undefined */
5604 /* 0xe352 undefined */
5605
5606 case 0xe35c: /* MFY - multiply */
5607 case 0xe396: /* ML - multiply logical */
5608 case 0xe397: /* DL - divide logical */
5609 /* 32-bit gpr pair destination */
5610 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5611 return -1;
5612 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5613 return -1;
5614 break;
5615
5616 /* 0xe35d undefined */
5617 /* 0xe36a-0xe36f undefined */
5618
5619 case 0xe372: /* STCY - store character */
5620 case 0xe3c3: /* STCH - store character high */
5621 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5622 if (record_full_arch_list_add_mem (oaddr, 1))
5623 return -1;
5624 break;
5625
5626 /* 0xe374 undefined */
5627
5628 case 0xe375: /* LAEY - load address extended */
5629 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5630 return -1;
5631 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
5632 return -1;
5633 break;
5634
5635 /* 0xe37d-0xe37f undefined */
5636
5637 case 0xe385: /* LGAT - load and trap */
5638 case 0xe39c: /* LLGTAT - load logical thirty one bits and trap */
5639 case 0xe39d: /* LLGFAT - load logical and trap */
5640 case 0xe650: /* VCVB - vector convert to binary 32 bit*/
5641 case 0xe652: /* VCVBG - vector convert to binary 64 bit*/
5642 case 0xe721: /* VLGV - vector load gr from vr element */
5643 /* 64-bit gpr destination + fpc for possible DXC write */
5644 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5645 return -1;
5646 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5647 return -1;
5648 break;
5649
5650 /* 0xe38a-0xe38d undefined */
5651 /* 0xe392-0xe393 undefined */
5652 /* 0xe39a-0xe39b undefined */
5653 /* 0xe39e undefined */
5654
5655 case 0xe39f: /* LAT - load and trap */
5656 /* 32-bit gpr destination + fpc for possible DXC write */
5657 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5658 return -1;
5659 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5660 return -1;
5661 break;
5662
5663 /* 0xe3a0-0xe3bf undefined */
5664
5665 case 0xe3c0: /* LBH - load byte high */
5666 case 0xe3c2: /* LLCH - load logical character high */
5667 case 0xe3c4: /* LHH - load halfword high */
5668 case 0xe3c6: /* LLHH - load logical halfword high */
5669 case 0xe3ca: /* LFH - load high */
5670 case 0xebe0: /* LOCFH - load high on condition */
5671 /* 32-bit high gpr destination */
5672 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5673 return -1;
5674 break;
5675
5676 /* 0xe3c1 undefined */
5677 /* 0xe3c5 undefined */
5678
5679 case 0xe3c8: /* LFHAT - load high and trap */
5680 /* 32-bit high gpr destination + fpc for possible DXC write */
5681 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5682 return -1;
5683 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5684 return -1;
5685 break;
5686
5687 /* 0xe3c9 undefined */
5688 /* 0xe3cc undefined */
5689 /* 0xe3ce undefined */
5690 /* 0xe3d0-0xe3ff undefined */
5691
5692 case 0xe601: /* VLEBRH - vector load byte reversed element */
5693 case 0xe602: /* VLEBRG - vector load byte reversed element */
5694 case 0xe603: /* VLEBRF - vector load byte reversed element */
5695 case 0xe604: /* VLLEBRZ - vector load byte rev. el. and zero */
5696 case 0xe605: /* VLBRREP - vector load byte rev. el. and replicate */
5697 case 0xe606: /* VLBR - vector load byte reversed elements */
5698 case 0xe607: /* VLER - vector load elements reversed */
5699 case 0xe634: /* VPKZ - vector pack zoned */
5700 case 0xe635: /* VLRL - vector load rightmost with immed. length */
5701 case 0xe637: /* VLRLR - vector load rightmost with length */
5702 case 0xe649: /* VLIP - vector load immediate decimal */
5703 case 0xe656: /* VCLFNH - vector fp convert and lengthen from NNP high */
5704 case 0xe65e: /* VCLFNL - vector fp convert and lengthen from NNP low */
5705 case 0xe655: /* VCNF - vector fp convert to NNP */
5706 case 0xe65d: /* VCFN - vector fp convert from NNP */
5707 case 0xe674: /* VSCHP - decimal scale and convert to HFP */
5708 case 0xe675: /* VCRNF - vector fp convert and round to NNP */
5709 case 0xe67c: /* VSCSHP - decimal scale and convert and split to HFP */
5710 case 0xe67d: /* VCSPH - vector convert HFP to scaled decimal */
5711 case 0xe700: /* VLEB - vector load element */
5712 case 0xe701: /* VLEH - vector load element */
5713 case 0xe702: /* VLEG - vector load element */
5714 case 0xe703: /* VLEF - vector load element */
5715 case 0xe704: /* VLLEZ - vector load logical element and zero */
5716 case 0xe705: /* VLREP - vector load and replicate */
5717 case 0xe706: /* VL - vector load */
5718 case 0xe707: /* VLBB - vector load to block boundary */
5719 case 0xe712: /* VGEG - vector gather element */
5720 case 0xe713: /* VGEF - vector gather element */
5721 case 0xe722: /* VLVG - vector load vr element from gr */
5722 case 0xe730: /* VESL - vector element shift left */
5723 case 0xe733: /* VERLL - vector element rotate left logical */
5724 case 0xe737: /* VLL - vector load with length */
5725 case 0xe738: /* VESRL - vector element shift right logical */
5726 case 0xe73a: /* VESRA - vector element shift right arithmetic */
5727 case 0xe740: /* VLEIB - vector load element immediate */
5728 case 0xe741: /* VLEIH - vector load element immediate */
5729 case 0xe742: /* VLEIG - vector load element immediate */
5730 case 0xe743: /* VLEIF - vector load element immediate */
5731 case 0xe744: /* VGBM - vector generate byte mask */
5732 case 0xe745: /* VREPI - vector replicate immediate */
5733 case 0xe746: /* VGM - vector generate mask */
5734 case 0xe74d: /* VREP - vector replicate */
5735 case 0xe750: /* VPOPCT - vector population count */
5736 case 0xe752: /* VCTZ - vector count trailing zeros */
5737 case 0xe753: /* VCLZ - vector count leading zeros */
5738 case 0xe754: /* VGEM - vector generate element masks */
5739 case 0xe756: /* VLR - vector load */
5740 case 0xe75f: /* VSEG -vector sign extend to doubleword */
5741 case 0xe760: /* VMRL - vector merge low */
5742 case 0xe761: /* VMRH - vector merge high */
5743 case 0xe762: /* VLVGP - vector load vr from grs disjoint */
5744 case 0xe764: /* VSUM - vector sum across word */
5745 case 0xe765: /* VSUMG - vector sum across doubleword */
5746 case 0xe766: /* VCKSM - vector checksum */
5747 case 0xe767: /* VSUMQ - vector sum across quadword */
5748 case 0xe768: /* VN - vector and */
5749 case 0xe769: /* VNC - vector and with complement */
5750 case 0xe76a: /* VO - vector or */
5751 case 0xe76b: /* VNO - vector nor */
5752 case 0xe76c: /* VNX - vector not exclusive or */
5753 case 0xe76d: /* VX - vector xor */
5754 case 0xe76e: /* VNN - vector nand */
5755 case 0xe76f: /* VOC - vector or with complement */
5756 case 0xe770: /* VESLV - vector element shift left */
5757 case 0xe772: /* VERIM - vector element rotate and insert under mask */
5758 case 0xe773: /* VERLLV - vector element rotate left logical */
5759 case 0xe774: /* VSL - vector shift left */
5760 case 0xe775: /* VSLB - vector shift left by byte */
5761 case 0xe777: /* VSLDB - vector shift left double by byte */
5762 case 0xe778: /* VESRLV - vector element shift right logical */
5763 case 0xe77a: /* VESRAV - vector element shift right arithmetic */
5764 case 0xe77c: /* VSRL - vector shift right logical */
5765 case 0xe77d: /* VSRLB - vector shift right logical by byte */
5766 case 0xe77e: /* VSRA - vector shift right arithmetic */
5767 case 0xe77f: /* VSRAB - vector shift right arithmetic by byte */
5768 case 0xe784: /* VPDI - vector permute doubleword immediate */
5769 case 0xe785: /* VBPERM - vector bit permute */
5770 case 0xe786: /* VSLD - vector shift left double by bit */
5771 case 0xe787: /* VSRD - vector shift right double by bit */
5772 case 0xe788: /* VEVAL - vector evaluate */
5773 case 0xe789: /* VBLEND - vector blend */
5774 case 0xe78b: /* VSTRS - vector string search */
5775 case 0xe78c: /* VPERM - vector permute */
5776 case 0xe78d: /* VSEL - vector select */
5777 case 0xe78e: /* VFMS - vector fp multiply and subtract */
5778 case 0xe78f: /* VFMA - vector fp multiply and add */
5779 case 0xe794: /* VPK - vector pack */
5780 case 0xe79e: /* VFNMS - vector fp negative multiply and subtract */
5781 case 0xe79f: /* VFNMA - vector fp negative multiply and add */
5782 case 0xe7a1: /* VMLH - vector multiply logical high */
5783 case 0xe7a2: /* VML - vector multiply low */
5784 case 0xe7a3: /* VMH - vector multiply high */
5785 case 0xe7a4: /* VMLE - vector multiply logical even */
5786 case 0xe7a5: /* VMLO - vector multiply logical odd */
5787 case 0xe7a6: /* VME - vector multiply even */
5788 case 0xe7a7: /* VMO - vector multiply odd */
5789 case 0xe7a9: /* VMALH - vector multiply and add logical high */
5790 case 0xe7aa: /* VMAL - vector multiply and add low */
5791 case 0xe7ab: /* VMAH - vector multiply and add high */
5792 case 0xe7ac: /* VMALE - vector multiply and add logical even */
5793 case 0xe7ad: /* VMALO - vector multiply and add logical odd */
5794 case 0xe7ae: /* VMAE - vector multiply and add even */
5795 case 0xe7af: /* VMAO - vector multiply and add odd */
5796 case 0xe7b0: /* VDL - vector divide logical */
5797 case 0xe7b1: /* VRL - vector remainder logical */
5798 case 0xe7b2: /* VD - vector divide */
5799 case 0xe7b3: /* VR - vector remainder */
5800 case 0xe7b4: /* VGFM - vector Galois field multiply sum */
5801 case 0xe7b8: /* VMSL - vector multiply sum logical */
5802 case 0xe7b9: /* VACCC - vector add with carry compute carry */
5803 case 0xe7bb: /* VAC - vector add with carry */
5804 case 0xe7bc: /* VGFMA - vector Galois field multiply sum and accumulate */
5805 case 0xe7bd: /* VSBCBI - vector subtract with borrow compute borrow indication */
5806 case 0xe7bf: /* VSBI - vector subtract with borrow indication */
5807 case 0xe7c0: /* VCLFP - vector fp convert to logical */
5808 case 0xe7c1: /* VCFPL - vector fp convert from logical */
5809 case 0xe7c2: /* VCSFP - vector fp convert to fixed */
5810 case 0xe7c3: /* VCFPS - vector fp convert from fixed */
5811 case 0xe7c4: /* VLDE/VFLL - vector fp load lengthened */
5812 case 0xe7c5: /* VLED/VFLR - vector fp load rounded */
5813 case 0xe7c7: /* VFI - vector load fp integer */
5814 case 0xe7cc: /* VFPSO - vector fp perform sign operation */
5815 case 0xe7ce: /* VFSQ - vector fp square root */
5816 case 0xe7d4: /* VUPLL - vector unpack logical low */
5817 case 0xe7d6: /* VUPL - vector unpack low */
5818 case 0xe7d5: /* VUPLH - vector unpack logical high */
5819 case 0xe7d7: /* VUPH - vector unpack high */
5820 case 0xe7de: /* VLC - vector load complement */
5821 case 0xe7df: /* VLP - vector load positive */
5822 case 0xe7e2: /* VFA - vector fp subtract */
5823 case 0xe7e3: /* VFA - vector fp add */
5824 case 0xe7e5: /* VFD - vector fp divide */
5825 case 0xe7e7: /* VFM - vector fp multiply */
5826 case 0xe7ee: /* VFMIN - vector fp minimum */
5827 case 0xe7ef: /* VFMAX - vector fp maximum */
5828 case 0xe7f0: /* VAVGL - vector average logical */
5829 case 0xe7f1: /* VACC - vector add and compute carry */
5830 case 0xe7f2: /* VAVG - vector average */
5831 case 0xe7f3: /* VA - vector add */
5832 case 0xe7f5: /* VSCBI - vector subtract compute borrow indication */
5833 case 0xe7f7: /* VS - vector subtract */
5834 case 0xe7fc: /* VMNL - vector minimum logical */
5835 case 0xe7fd: /* VMXL - vector maximum logical */
5836 case 0xe7fe: /* VMN - vector minimum */
5837 case 0xe7ff: /* VMX - vector maximum */
5838 /* vector destination + FPC */
5839 if (s390_record_vr (gdbarch, regcache, ivec[0]))
5840 return -1;
5841 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5842 return -1;
5843 break;
5844
5845 case 0xe63d: /* VSTRL - vector store rightmost with immed. length */
5846 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5847 if (record_full_arch_list_add_mem (oaddr, inib[3] + 1))
5848 return -1;
5849 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5850 return -1;
5851 break;
5852
5853 case 0xe708: /* VSTEB - vector store element */
5854 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5855 if (record_full_arch_list_add_mem (oaddr, 1))
5856 return -1;
5857 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5858 return -1;
5859 break;
5860
5861 case 0xe609: /* VSTEBRH - vector store byte reversed element */
5862 case 0xe709: /* VSTEH - vector store element */
5863 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5864 if (record_full_arch_list_add_mem (oaddr, 2))
5865 return -1;
5866 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5867 return -1;
5868 break;
5869
5870 case 0xe60a: /* VSTEBRG - vector store byte reversed element */
5871 case 0xe70a: /* VSTEG - vector store element */
5872 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5873 if (record_full_arch_list_add_mem (oaddr, 8))
5874 return -1;
5875 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5876 return -1;
5877 break;
5878
5879 case 0xe60b: /* VSTEBRF - vector store byte reversed element */
5880 case 0xe70b: /* VSTEF - vector store element */
5881 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5882 if (record_full_arch_list_add_mem (oaddr, 4))
5883 return -1;
5884 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5885 return -1;
5886 break;
5887
5888 /* 0xe70c-0xe70d undefined */
5889
5890 case 0xe60e: /* VSTBR - vector store byte reversed elements */
5891 case 0xe60f: /* VSTER - vector store elements reversed */
5892 case 0xe70e: /* VST - vector store */
5893 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5894 if (record_full_arch_list_add_mem (oaddr, 16))
5895 return -1;
5896 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5897 return -1;
5898 break;
5899
5900 /* 0xe70f-0xe711 undefined */
5901 /* 0xe714-0xe719 undefined */
5902
5903 case 0xe71a: /* VSCEG - vector scatter element */
5904 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 8, insn[1], 0, &oaddr))
5905 return -1;
5906 if (record_full_arch_list_add_mem (oaddr, 8))
5907 return -1;
5908 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5909 return -1;
5910 break;
5911
5912 case 0xe71b: /* VSCEF - vector scatter element */
5913 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 4, insn[1], 0, &oaddr))
5914 return -1;
5915 if (record_full_arch_list_add_mem (oaddr, 4))
5916 return -1;
5917 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5918 return -1;
5919 break;
5920
5921 /* 0xe71c-0xe720 undefined */
5922 /* 0xe723-0xe726 undefined */
5923 /* 0xe728-0xe72f undefined */
5924 /* 0xe731-0xe732 undefined */
5925 /* 0xe734-0xe735 undefined */
5926
5927 case 0xe736: /* VLM - vector load multiple */
5928 for (i = ivec[0]; i != ivec[1]; i++, i &= 0x1f)
5929 if (s390_record_vr (gdbarch, regcache, i))
5930 return -1;
5931 if (s390_record_vr (gdbarch, regcache, ivec[1]))
5932 return -1;
5933 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5934 return -1;
5935 break;
5936
5937 /* 0xe739 undefined */
5938 /* 0xe73b-0xe73d undefined */
5939
5940 case 0xe73e: /* VSTM - vector store multiple */
5941 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5942 if (ivec[0] <= ivec[1])
5943 n = ivec[1] - ivec[0] + 1;
5944 else
5945 n = ivec[1] + 0x20 - ivec[0] + 1;
5946 if (record_full_arch_list_add_mem (oaddr, n * 16))
5947 return -1;
5948 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5949 return -1;
5950 break;
5951
5952 case 0xe63c: /* VUPKZ - vector unpack zoned */
5953 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5954 if (record_full_arch_list_add_mem (oaddr, (ibyte[1] + 1) & 31))
5955 return -1;
5956 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5957 return -1;
5958 break;
5959
5960 case 0xe63f: /* VSTRLR - vector store rightmost with length */
5961 case 0xe73f: /* VSTL - vector store with length */
5962 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5963 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[3], &tmp);
5964 tmp &= 0xffffffffu;
5965 if (tmp > 15)
5966 tmp = 15;
5967 if (record_full_arch_list_add_mem (oaddr, tmp + 1))
5968 return -1;
5969 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5970 return -1;
5971 break;
5972
5973 /* 0xe747-0xe749 undefined */
5974
5975 case 0xe64a: /* VCVDQ - vector convert to decimal 128 bits */
5976 case 0xe64e: /* VCVBQ - vector convert to binary 128 bits */
5977 case 0xe651: /* VCLZDP - vector count leading zero digits */
5978 case 0xe654: /* VUPKZH - vector unpack zoned high */
5979 case 0xe658: /* VCVD - vector convert to decimal 32 bit */
5980 case 0xe659: /* VSRP - vector shift and round decimal */
5981 case 0xe65a: /* VCVDG - vector convert to decimal 64 bit*/
5982 case 0xe65b: /* VPSOP - vector perform sign operation decimal */
5983 case 0xe65c: /* VUPKZL - vector unpack zoned low */
5984 case 0xe670: /* VPKZR - vector pack zoned register */
5985 case 0xe671: /* VAP - vector add decimal */
5986 case 0xe672: /* VSRPR - vector shift and round decimal register */
5987 case 0xe673: /* VSP - vector subtract decimal */
5988 case 0xe678: /* VMP - vector multiply decimal */
5989 case 0xe679: /* VMSP - vector multiply decimal */
5990 case 0xe67a: /* VDP - vector divide decimal */
5991 case 0xe67b: /* VRP - vector remainder decimal */
5992 case 0xe67e: /* VSDP - vector shift and divide decimal */
5993 case 0xe74a: /* VFTCI - vector fp test data class immediate */
5994 case 0xe75c: /* VISTR - vector isolate string */
5995 case 0xe780: /* VFEE - vector find element equal */
5996 case 0xe781: /* VFENE - vector find element not equal */
5997 case 0xe782: /* VFA - vector find any element equal */
5998 case 0xe78a: /* VSTRC - vector string range compare */
5999 case 0xe795: /* VPKLS - vector pack logical saturate */
6000 case 0xe797: /* VPKS - vector pack saturate */
6001 case 0xe7e8: /* VFCE - vector fp compare equal */
6002 case 0xe7ea: /* VFCHE - vector fp compare high or equal */
6003 case 0xe7eb: /* VFCH - vector fp compare high */
6004 case 0xe7f8: /* VCEQ - vector compare equal */
6005 case 0xe7f9: /* VCHL - vector compare high logical */
6006 case 0xe7fb: /* VCH - vector compare high */
6007 /* vector destination + flags + FPC */
6008 if (s390_record_vr (gdbarch, regcache, ivec[0]))
6009 return -1;
6010 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6011 return -1;
6012 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6013 return -1;
6014 break;
6015
6016 case 0xe65f: /* VTP - vector test decimal */
6017 case 0xe67f: /* VTZ - vector test zoned */
6018 /* flags + FPC */
6019 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6020 return -1;
6021 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6022 return -1;
6023 break;
6024
6025 /* 0xe74b-0xe74c undefined */
6026 /* 0xe74e-0xe74f undefined */
6027 /* 0xe751 undefined */
6028 /* 0xe754-0xe755 undefined */
6029 /* 0xe757-0xe75b undefined */
6030 /* 0xe75d-0xe75e undefined */
6031 /* 0xe763 undefined */
6032 /* 0xe771 undefined */
6033 /* 0xe776 undefined */
6034 /* 0xe779 undefined */
6035 /* 0xe77b undefined */
6036 /* 0xe783 undefined */
6037 /* 0xe786-0xe789 undefined */
6038 /* 0xe78b undefined */
6039 /* 0xe790-0xe793 undefined */
6040 /* 0xe796 undefined */
6041 /* 0xe798-0xe79d undefined */
6042 /* 0xe7a0 undefined */
6043 /* 0xe7a8 undefined */
6044 /* 0xe7b0-0xe7b3 undefined */
6045 /* 0xe7b5-0xe7b7 undefined */
6046 /* 0xe7ba undefined */
6047 /* 0xe7be undefined */
6048 /* 0xe7c6 undefined */
6049 /* 0xe7c8-0xe7c9 undefined */
6050
6051 case 0xe677: /* VCP - vector compare decimal */
6052 case 0xe7ca: /* WFK - vector fp compare and signal scalar */
6053 case 0xe7cb: /* WFC - vector fp compare scalar */
6054 case 0xe7d8: /* VTM - vector test under mask */
6055 case 0xe7d9: /* VECL - vector element compare logical */
6056 case 0xe7db: /* VEC - vector element compare */
6057 case 0xed08: /* KEB - compare and signal */
6058 case 0xed09: /* CEB - compare */
6059 case 0xed18: /* KDB - compare and signal */
6060 case 0xed19: /* CDB - compare */
6061 /* flags + fpc only */
6062 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6063 return -1;
6064 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6065 return -1;
6066 break;
6067
6068 /* 0xe7cd undefined */
6069 /* 0xe7cf-0xe7d3 undefined */
6070 /* 0xe7da undefined */
6071 /* 0xe7dc-0xe7dd undefined */
6072 /* 0xe7e0-0xe7e1 undefined */
6073 /* 0xe7e4 undefined */
6074 /* 0xe7e6 undefined */
6075 /* 0xe7e9 undefined */
6076 /* 0xe7ec-0xe7ed undefined */
6077 /* 0xe7f4 undefined */
6078 /* 0xe7f6 undefined */
6079 /* 0xe7fa undefined */
6080
6081 /* 0xeb00-0xeb03 undefined */
6082
6083 case 0xeb04: /* LMG - load multiple */
6084 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6085 if (s390_record_gpr_g (gdbarch, regcache, i))
6086 return -1;
6087 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6088 return -1;
6089 break;
6090
6091 /* 0xeb05-0xeb09 undefined */
6092 /* 0xeb0e undefined */
6093 /* 0xeb0f privileged: TRACG */
6094 /* 0xeb10-0xeb13 undefined */
6095
6096 case 0xeb14: /* CSY - compare and swap */
6097 case 0xebf4: /* LAN - load and and */
6098 case 0xebf6: /* LAO - load and or */
6099 case 0xebf7: /* LAX - load and xor */
6100 case 0xebf8: /* LAA - load and add */
6101 case 0xebfa: /* LAAL - load and add logical */
6102 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6103 if (record_full_arch_list_add_mem (oaddr, 4))
6104 return -1;
6105 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6106 return -1;
6107 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6108 return -1;
6109 break;
6110
6111 case 0xeb16: /* PFCR - perform functions with concurrent results */
6112 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6113 return -1;
6114 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
6115 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1],
6116 ibyte[4]);
6117 {
6118 uint8_t fc = tmp & 0xff;
6119 if (fc == 0) /* PFCR-QAF */
6120 {
6121 if (record_full_arch_list_add_mem (oaddr, 16))
6122 return -1;
6123 }
6124 else if (fc >= 1 && fc <= 4)
6125 {
6126 /* Compare and swap and double/triple store. */
6127 int bytesize = fc & 1 ? 4 : 8;
6128 int startbit = fc >= 3 ? 16 : 32;
6129 if (record_full_arch_list_add_reg (regcache,
6130 S390_R0_REGNUM + inib[2]))
6131 return -1;
6132 regcache_raw_read_unsigned (regcache,
6133 S390_R0_REGNUM + inib[3], &tmp);
6134 for (i = startbit; i < 64; i += 16)
6135 {
6136 oaddr = s390_record_calc_disp (gdbarch, regcache, 0,
6137 (tmp >> i) & 0xffff, 0);
6138 if (record_full_arch_list_add_mem (oaddr, bytesize))
6139 return -1;
6140 }
6141 }
6142 else
6143 {
6144 gdb_printf (gdb_stdlog,
6145 "Warning: Unknown PFCR FC %02x at %s.\n",
6146 fc, paddress (gdbarch, addr));
6147 return -1;
6148 }
6149 }
6150 break;
6151
6152 /* 0xeb17-0xeb1b undefined */
6153 /* 0xeb1e-0xeb1f undefined */
6154 /* 0xeb22 undefined */
6155
6156 case 0xeb23: /* CLT - compare logical and trap */
6157 case 0xeb2b: /* CLGT - compare logical and trap */
6158 /* fpc only - including possible DXC write for trapping insns */
6159 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6160 return -1;
6161 break;
6162
6163 case 0xeb24: /* STMG - store multiple */
6164 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6165 if (inib[2] <= inib[3])
6166 n = inib[3] - inib[2] + 1;
6167 else
6168 n = inib[3] + 0x10 - inib[2] + 1;
6169 if (record_full_arch_list_add_mem (oaddr, n * 8))
6170 return -1;
6171 break;
6172
6173 /* 0xeb25 privileged */
6174
6175 case 0xeb26: /* STMH - store multiple high */
6176 case 0xeb90: /* STMY - store multiple */
6177 case 0xeb9b: /* STAMY - store access multiple */
6178 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6179 if (inib[2] <= inib[3])
6180 n = inib[3] - inib[2] + 1;
6181 else
6182 n = inib[3] + 0x10 - inib[2] + 1;
6183 if (record_full_arch_list_add_mem (oaddr, n * 4))
6184 return -1;
6185 break;
6186
6187 /* 0xeb27-0xeb2a undefined */
6188
6189 case 0xeb2c: /* STCMH - store characters under mask */
6190 case 0xeb2d: /* STCMY - store characters under mask */
6191 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6192 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
6193 return -1;
6194 break;
6195
6196 /* 0xeb2e undefined */
6197 /* 0xeb2f privileged */
6198
6199 case 0xeb30: /* CSG - compare and swap */
6200 case 0xebe4: /* LANG - load and and */
6201 case 0xebe6: /* LAOG - load and or */
6202 case 0xebe7: /* LAXG - load and xor */
6203 case 0xebe8: /* LAAG - load and add */
6204 case 0xebea: /* LAALG - load and add logical */
6205 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6206 if (record_full_arch_list_add_mem (oaddr, 8))
6207 return -1;
6208 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6209 return -1;
6210 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6211 return -1;
6212 break;
6213
6214 case 0xeb31: /* CDSY - compare double and swap */
6215 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6216 if (record_full_arch_list_add_mem (oaddr, 8))
6217 return -1;
6218 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6219 return -1;
6220 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6221 return -1;
6222 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6223 return -1;
6224 break;
6225
6226 /* 0xeb32-0xeb3d undefined */
6227
6228 case 0xeb3e: /* CDSG - compare double and swap */
6229 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6230 if (record_full_arch_list_add_mem (oaddr, 16))
6231 return -1;
6232 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6233 return -1;
6234 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
6235 return -1;
6236 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6237 return -1;
6238 break;
6239
6240 /* 0xeb3f-0xeb43 undefined */
6241 /* 0xeb46-0xeb4b undefined */
6242 /* 0xeb4d-0xeb50 undefined */
6243
6244 case 0xeb52: /* MVIY - move */
6245 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6246 if (record_full_arch_list_add_mem (oaddr, 1))
6247 return -1;
6248 break;
6249
6250 case 0xeb54: /* NIY - and */
6251 case 0xeb56: /* OIY - or */
6252 case 0xeb57: /* XIY - xor */
6253 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6254 if (record_full_arch_list_add_mem (oaddr, 1))
6255 return -1;
6256 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6257 return -1;
6258 break;
6259
6260 /* 0xeb53 undefined */
6261 /* 0xeb58-0xeb69 undefined */
6262
6263 case 0xeb6a: /* ASI - add immediate */
6264 case 0xeb6e: /* ALSI - add immediate */
6265 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6266 if (record_full_arch_list_add_mem (oaddr, 4))
6267 return -1;
6268 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6269 return -1;
6270 break;
6271
6272 /* 0xeb6b-0xeb6d undefined */
6273 /* 0xeb6f-0xeb79 undefined */
6274
6275 case 0xeb7a: /* AGSI - add immediate */
6276 case 0xeb7e: /* ALGSI - add immediate */
6277 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6278 if (record_full_arch_list_add_mem (oaddr, 8))
6279 return -1;
6280 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6281 return -1;
6282 break;
6283
6284 /* 0xeb7b-0xeb7d undefined */
6285 /* 0xeb7f undefined */
6286
6287 case 0xeb80: /* ICMH - insert characters under mask */
6288 /* 32-bit high gpr destination + flags */
6289 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6290 return -1;
6291 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6292 return -1;
6293 break;
6294
6295 /* 0xeb82-0xeb8d undefined */
6296
6297 case 0xeb8e: /* MVCLU - move long unicode [partial] */
6298 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
6299 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
6300 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
6301 if (record_full_arch_list_add_mem (oaddr, tmp))
6302 return -1;
6303 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6304 return -1;
6305 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6306 return -1;
6307 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6308 return -1;
6309 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
6310 return -1;
6311 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6312 return -1;
6313 break;
6314
6315 case 0xeb8f: /* CLCLU - compare logical long unicode [partial] */
6316 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6317 return -1;
6318 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6319 return -1;
6320 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6321 return -1;
6322 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
6323 return -1;
6324 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6325 return -1;
6326 break;
6327
6328 /* 0xeb91-0xeb95 undefined */
6329
6330 case 0xeb96: /* LMH - load multiple high */
6331 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6332 if (s390_record_gpr_h (gdbarch, regcache, i))
6333 return -1;
6334 if (s390_record_gpr_h (gdbarch, regcache, inib[3]))
6335 return -1;
6336 break;
6337
6338 /* 0xeb97 undefined */
6339
6340 case 0xeb98: /* LMY - load multiple */
6341 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6342 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
6343 return -1;
6344 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6345 return -1;
6346 break;
6347
6348 /* 0xeb99 undefined */
6349
6350 case 0xeb9a: /* LAMY - load access multiple */
6351 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6352 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
6353 return -1;
6354 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
6355 return -1;
6356 break;
6357
6358 /* 0xeb9c-0xebbf undefined */
6359 /* 0xebc1-0xebdb undefined */
6360
6361 case 0xebe1: /* STOCFH - store high on condition */
6362 case 0xebf3: /* STOC - store on condition */
6363 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6364 if (record_full_arch_list_add_mem (oaddr, 4))
6365 return -1;
6366 break;
6367
6368 case 0xebe3: /* STOCG - store on condition */
6369 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6370 if (record_full_arch_list_add_mem (oaddr, 8))
6371 return -1;
6372 break;
6373
6374 /* 0xebe5 undefined */
6375 /* 0xebe9 undefined */
6376 /* 0xebeb-0xebf1 undefined */
6377 /* 0xebf5 undefined */
6378 /* 0xebf9 undefined */
6379 /* 0xebfb-0xebff undefined */
6380
6381 /* 0xed00-0xed03 undefined */
6382
6383 case 0xed04: /* LDEB - load lengthened */
6384 case 0xed0c: /* MDEB - multiply */
6385 case 0xed0d: /* DEB - divide */
6386 case 0xed14: /* SQEB - square root */
6387 case 0xed15: /* SQDB - square root */
6388 case 0xed17: /* MEEB - multiply */
6389 case 0xed1c: /* MDB - multiply */
6390 case 0xed1d: /* DDB - divide */
6391 /* float destination + fpc */
6392 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6393 return -1;
6394 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6395 return -1;
6396 break;
6397
6398 case 0xed05: /* LXDB - load lengthened */
6399 case 0xed06: /* LXEB - load lengthened */
6400 case 0xed07: /* MXDB - multiply */
6401 /* float pair destination + fpc */
6402 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6403 return -1;
6404 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6405 return -1;
6406 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6407 return -1;
6408 break;
6409
6410 case 0xed0a: /* AEB - add */
6411 case 0xed0b: /* SEB - subtract */
6412 case 0xed1a: /* ADB - add */
6413 case 0xed1b: /* SDB - subtract */
6414 /* float destination + flags + fpc */
6415 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6416 return -1;
6417 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6418 return -1;
6419 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6420 return -1;
6421 break;
6422
6423 case 0xed0e: /* MAEB - multiply and add */
6424 case 0xed0f: /* MSEB - multiply and subtract */
6425 case 0xed1e: /* MADB - multiply and add */
6426 case 0xed1f: /* MSDB - multiply and subtract */
6427 case 0xed40: /* SLDT - shift significand left */
6428 case 0xed41: /* SRDT - shift significand right */
6429 case 0xedaa: /* CDZT - convert from zoned */
6430 case 0xedae: /* CDPT - convert from packed */
6431 /* float destination [RXF] + fpc */
6432 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6433 return -1;
6434 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6435 return -1;
6436 break;
6437
6438 /* 0xed13 undefined */
6439 /* 0xed16 undefined */
6440 /* 0xed20-0xed23 undefined */
6441
6442 case 0xed24: /* LDE - load lengthened */
6443 case 0xed34: /* SQE - square root */
6444 case 0xed35: /* SQD - square root */
6445 case 0xed37: /* MEE - multiply */
6446 case 0xed64: /* LEY - load */
6447 case 0xed65: /* LDY - load */
6448 /* float destination */
6449 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6450 return -1;
6451 break;
6452
6453 case 0xed25: /* LXD - load lengthened */
6454 case 0xed26: /* LXE - load lengthened */
6455 /* float pair destination */
6456 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6457 return -1;
6458 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6459 return -1;
6460 break;
6461
6462 /* 0xed27-0xed2d undefined */
6463
6464 case 0xed2e: /* MAE - multiply and add */
6465 case 0xed2f: /* MSE - multiply and subtract */
6466 case 0xed38: /* MAYL - multiply and add unnormalized */
6467 case 0xed39: /* MYL - multiply unnormalized */
6468 case 0xed3c: /* MAYH - multiply and add unnormalized */
6469 case 0xed3d: /* MYH - multiply unnormalized */
6470 case 0xed3e: /* MAD - multiply and add */
6471 case 0xed3f: /* MSD - multiply and subtract */
6472 /* float destination [RXF] */
6473 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6474 return -1;
6475 break;
6476
6477 /* 0xed30-0xed33 undefined */
6478 /* 0xed36 undefined */
6479
6480 case 0xed3a: /* MAY - multiply and add unnormalized */
6481 /* float pair destination [RXF]; R1 may designate lower- or
6482 higher-numbered register of pair */
6483 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] & 13)))
6484 return -1;
6485 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6486 return -1;
6487 break;
6488 case 0xed3b: /* MY - multiply unnormalized */
6489 /* float pair destination [RXF] */
6490 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6491 return -1;
6492 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6493 return -1;
6494 break;
6495
6496 /* 0xed42-0xed47 undefined */
6497
6498 case 0xed48: /* SLXT - shift significand left */
6499 case 0xed49: /* SRXT - shift significand right */
6500 case 0xedab: /* CXZT - convert from zoned */
6501 case 0xedaf: /* CXPT - convert from packed */
6502 /* float pair destination [RXF] + fpc */
6503 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6504 return -1;
6505 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6506 return -1;
6507 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6508 return -1;
6509 break;
6510
6511 /* 0xed4a-0xed4f undefined */
6512 /* 0xed52-0xed53 undefined */
6513 /* 0xed56-0xed57 undefined */
6514 /* 0xed5a-0xed63 undefined */
6515 /* 0xed68-0xeda7 undefined */
6516
6517 case 0xeda8: /* CZDT - convert to zoned */
6518 case 0xeda9: /* CZXT - convert to zoned */
6519 case 0xedac: /* CPDT - convert to packed */
6520 case 0xedad: /* CPXT - convert to packed */
6521 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6522 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
6523 return -1;
6524 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6525 return -1;
6526 break;
6527
6528 /* 0xedb0-0xedff undefined */
6529
6530 default:
6531 goto UNKNOWN_OP;
6532 }
6533 break;
6534
6535 /* 0xe4 undefined */
6536
6537 case 0xe5:
6538 /* SSE/SIL-format instruction */
6539 switch (insn[0])
6540 {
6541 /* 0xe500-0xe509 undefined, privileged, or unsupported */
6542
6543 case 0xe50a: /* MVCRL - move right to left */
6544 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
6545 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6546 if (record_full_arch_list_add_mem (oaddr, (tmp & 0xff) + 1))
6547 return -1;
6548 break;
6549
6550 /* 0xe50b-0xe543 undefined, privileged, or unsupported */
6551
6552 case 0xe544: /* MVHHI - move */
6553 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6554 if (record_full_arch_list_add_mem (oaddr, 2))
6555 return -1;
6556 break;
6557
6558 /* 0xe545-0xe547 undefined */
6559
6560 case 0xe548: /* MVGHI - move */
6561 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6562 if (record_full_arch_list_add_mem (oaddr, 8))
6563 return -1;
6564 break;
6565
6566 /* 0xe549-0xe54b undefined */
6567
6568 case 0xe54c: /* MVHI - move */
6569 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6570 if (record_full_arch_list_add_mem (oaddr, 4))
6571 return -1;
6572 break;
6573
6574 /* 0xe54d-0xe553 undefined */
6575
6576 case 0xe554: /* CHHSI - compare halfword immediate */
6577 case 0xe555: /* CLHHSI - compare logical immediate */
6578 case 0xe558: /* CGHSI - compare halfword immediate */
6579 case 0xe559: /* CLGHSI - compare logical immediate */
6580 case 0xe55c: /* CHSI - compare halfword immediate */
6581 case 0xe55d: /* CLFHSI - compare logical immediate */
6582 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6583 return -1;
6584 break;
6585
6586 /* 0xe556-0xe557 undefined */
6587 /* 0xe55a-0xe55b undefined */
6588 /* 0xe55e-0xe55f undefined */
6589
6590 case 0xe560: /* TBEGIN - transaction begin */
6591 /* The transaction will be immediately aborted after this
6592 instruction, due to single-stepping. This instruction is
6593 only supported so that the program can fail a few times
6594 and go to the non-transactional fallback. */
6595 if (inib[4])
6596 {
6597 /* Transaction diagnostic block - user. */
6598 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6599 if (record_full_arch_list_add_mem (oaddr, 256))
6600 return -1;
6601 }
6602 /* Transaction diagnostic block - supervisor. */
6603 if (record_full_arch_list_add_reg (regcache, S390_TDB_DWORD0_REGNUM))
6604 return -1;
6605 if (record_full_arch_list_add_reg (regcache, S390_TDB_ABORT_CODE_REGNUM))
6606 return -1;
6607 if (record_full_arch_list_add_reg (regcache, S390_TDB_CONFLICT_TOKEN_REGNUM))
6608 return -1;
6609 if (record_full_arch_list_add_reg (regcache, S390_TDB_ATIA_REGNUM))
6610 return -1;
6611 for (i = 0; i < 16; i++)
6612 if (record_full_arch_list_add_reg (regcache, S390_TDB_R0_REGNUM + i))
6613 return -1;
6614 /* And flags. */
6615 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6616 return -1;
6617 break;
6618
6619 /* 0xe561 unsupported: TBEGINC */
6620 /* 0xe562-0xe5ff undefined */
6621
6622 default:
6623 goto UNKNOWN_OP;
6624 }
6625 break;
6626
6627 case 0xec:
6628 /* RIE/RIS/RRS-format instruction */
6629 switch (ibyte[0] << 8 | ibyte[5])
6630 {
6631 /* 0xec00-0xec41 undefined */
6632
6633 case 0xec42: /* LOCHI - load halfword immediate on condition */
6634 case 0xec51: /* RISBLG - rotate then insert selected bits low */
6635 /* 32-bit or native gpr destination */
6636 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6637 return -1;
6638 break;
6639
6640 /* 0xec43 undefined */
6641
6642 case 0xec44: /* BRXHG - branch relative on index high */
6643 case 0xec45: /* BRXLG - branch relative on index low or equal */
6644 case 0xec46: /* LOCGHI - load halfword immediate on condition */
6645 case 0xec59: /* RISBGN - rotate then insert selected bits */
6646 /* 64-bit gpr destination */
6647 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6648 return -1;
6649 break;
6650
6651 /* 0xec47-0xec4d undefined */
6652
6653 case 0xec4e: /* LOCHHI - load halfword immediate on condition */
6654 case 0xec5d: /* RISBHG - rotate then insert selected bits high */
6655 /* 32-bit high gpr destination */
6656 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6657 return -1;
6658 break;
6659
6660 /* 0xec4f-0xec50 undefined */
6661 /* 0xec52-0xec53 undefined */
6662
6663 case 0xec54: /* RNSBG - rotate then and selected bits */
6664 case 0xec55: /* RISBG - rotate then insert selected bits */
6665 case 0xec56: /* ROSBG - rotate then or selected bits */
6666 case 0xec57: /* RXSBG - rotate then xor selected bits */
6667 case 0xecd9: /* AGHIK - add immediate */
6668 case 0xecdb: /* ALGHSIK - add logical immediate */
6669 /* 64-bit gpr destination + flags */
6670 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6671 return -1;
6672 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6673 return -1;
6674 break;
6675
6676 /* 0xec58 undefined */
6677 /* 0xec5a-0xec5c undefined */
6678 /* 0xec5e-0xec63 undefined */
6679
6680 case 0xec64: /* CGRJ - compare and branch relative */
6681 case 0xec65: /* CLGRJ - compare logical and branch relative */
6682 case 0xec76: /* CRJ - compare and branch relative */
6683 case 0xec77: /* CLRJ - compare logical and branch relative */
6684 case 0xec7c: /* CGIJ - compare immediate and branch relative */
6685 case 0xec7d: /* CLGIJ - compare logical immediate and branch relative */
6686 case 0xec7e: /* CIJ - compare immediate and branch relative */
6687 case 0xec7f: /* CLIJ - compare logical immediate and branch relative */
6688 case 0xece4: /* CGRB - compare and branch */
6689 case 0xece5: /* CLGRB - compare logical and branch */
6690 case 0xecf6: /* CRB - compare and branch */
6691 case 0xecf7: /* CLRB - compare logical and branch */
6692 case 0xecfc: /* CGIB - compare immediate and branch */
6693 case 0xecfd: /* CLGIB - compare logical immediate and branch */
6694 case 0xecfe: /* CIB - compare immediate and branch */
6695 case 0xecff: /* CLIB - compare logical immediate and branch */
6696 break;
6697
6698 /* 0xec66-0xec6f undefined */
6699
6700 case 0xec70: /* CGIT - compare immediate and trap */
6701 case 0xec71: /* CLGIT - compare logical immediate and trap */
6702 case 0xec72: /* CIT - compare immediate and trap */
6703 case 0xec73: /* CLFIT - compare logical immediate and trap */
6704 /* fpc only - including possible DXC write for trapping insns */
6705 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6706 return -1;
6707 break;
6708
6709 /* 0xec74-0xec75 undefined */
6710 /* 0xec78-0xec7b undefined */
6711
6712 /* 0xec80-0xecd7 undefined */
6713
6714 case 0xecd8: /* AHIK - add immediate */
6715 case 0xecda: /* ALHSIK - add logical immediate */
6716 /* 32-bit gpr destination + flags */
6717 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6718 return -1;
6719 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6720 return -1;
6721 break;
6722
6723 /* 0xecdc-0xece3 undefined */
6724 /* 0xece6-0xecf5 undefined */
6725 /* 0xecf8-0xecfb undefined */
6726
6727 default:
6728 goto UNKNOWN_OP;
6729 }
6730 break;
6731
6732 case 0xee: /* PLO - perform locked operation */
6733 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
6734 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6735 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
6736 if (!(tmp & 0x100))
6737 {
6738 uint8_t fc = tmp & 0xff;
6739 gdb_byte buf[8];
6740 switch (fc)
6741 {
6742 case 0x00: /* CL */
6743 /* op1c */
6744 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6745 return -1;
6746 /* op3 */
6747 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6748 return -1;
6749 break;
6750
6751 case 0x01: /* CLG */
6752 /* op1c */
6753 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
6754 return -1;
6755 /* op3 */
6756 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
6757 return -1;
6758 break;
6759
6760 case 0x02: /* CLGR */
6761 /* op1c */
6762 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6763 return -1;
6764 /* op3 */
6765 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6766 return -1;
6767 break;
6768
6769 case 0x03: /* CLX */
6770 /* op1c */
6771 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
6772 return -1;
6773 /* op3 */
6774 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
6775 return -1;
6776 break;
6777
6778 case 0x08: /* DCS */
6779 /* op3c */
6780 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6781 return -1;
6782 [[fallthrough]];
6783 case 0x0c: /* CSST */
6784 /* op4 */
6785 if (record_full_arch_list_add_mem (oaddr2, 4))
6786 return -1;
6787 goto CS;
6788
6789 case 0x14: /* CSTST */
6790 /* op8 */
6791 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6792 return -1;
6793 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6794 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6795 if (record_full_arch_list_add_mem (oaddr3, 4))
6796 return -1;
6797 [[fallthrough]];
6798 case 0x10: /* CSDST */
6799 /* op6 */
6800 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6801 return -1;
6802 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6803 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6804 if (record_full_arch_list_add_mem (oaddr3, 4))
6805 return -1;
6806 /* op4 */
6807 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6808 return -1;
6809 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6810 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6811 if (record_full_arch_list_add_mem (oaddr3, 4))
6812 return -1;
6813 [[fallthrough]];
6814 case 0x04: /* CS */
6815 CS:
6816 /* op1c */
6817 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6818 return -1;
6819 /* op2 */
6820 if (record_full_arch_list_add_mem (oaddr, 4))
6821 return -1;
6822 break;
6823
6824 case 0x09: /* DCSG */
6825 /* op3c */
6826 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
6827 return -1;
6828 goto CSSTG;
6829
6830 case 0x15: /* CSTSTG */
6831 /* op8 */
6832 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6833 return -1;
6834 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6835 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6836 if (record_full_arch_list_add_mem (oaddr3, 8))
6837 return -1;
6838 [[fallthrough]];
6839 case 0x11: /* CSDSTG */
6840 /* op6 */
6841 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6842 return -1;
6843 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6844 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6845 if (record_full_arch_list_add_mem (oaddr3, 8))
6846 return -1;
6847 [[fallthrough]];
6848 case 0x0d: /* CSSTG */
6849 CSSTG:
6850 /* op4 */
6851 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6852 return -1;
6853 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6854 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6855 if (record_full_arch_list_add_mem (oaddr3, 8))
6856 return -1;
6857 [[fallthrough]];
6858 case 0x05: /* CSG */
6859 /* op1c */
6860 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
6861 return -1;
6862 /* op2 */
6863 if (record_full_arch_list_add_mem (oaddr, 8))
6864 return -1;
6865 break;
6866
6867 case 0x0a: /* DCSGR */
6868 /* op3c */
6869 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6870 return -1;
6871 [[fallthrough]];
6872 case 0x0e: /* CSSTGR */
6873 /* op4 */
6874 if (record_full_arch_list_add_mem (oaddr2, 8))
6875 return -1;
6876 goto CSGR;
6877
6878 case 0x16: /* CSTSTGR */
6879 /* op8 */
6880 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6881 return -1;
6882 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6883 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6884 if (record_full_arch_list_add_mem (oaddr3, 8))
6885 return -1;
6886 [[fallthrough]];
6887 case 0x12: /* CSDSTGR */
6888 /* op6 */
6889 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6890 return -1;
6891 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6892 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6893 if (record_full_arch_list_add_mem (oaddr3, 8))
6894 return -1;
6895 /* op4 */
6896 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6897 return -1;
6898 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6899 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6900 if (record_full_arch_list_add_mem (oaddr3, 8))
6901 return -1;
6902 [[fallthrough]];
6903 case 0x06: /* CSGR */
6904 CSGR:
6905 /* op1c */
6906 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6907 return -1;
6908 /* op2 */
6909 if (record_full_arch_list_add_mem (oaddr, 8))
6910 return -1;
6911 break;
6912
6913 case 0x0b: /* DCSX */
6914 /* op3c */
6915 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
6916 return -1;
6917 goto CSSTX;
6918
6919 case 0x17: /* CSTSTX */
6920 /* op8 */
6921 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6922 return -1;
6923 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6924 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6925 if (record_full_arch_list_add_mem (oaddr3, 16))
6926 return -1;
6927 [[fallthrough]];
6928 case 0x13: /* CSDSTX */
6929 /* op6 */
6930 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6931 return -1;
6932 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6933 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6934 if (record_full_arch_list_add_mem (oaddr3, 16))
6935 return -1;
6936 [[fallthrough]];
6937 case 0x0f: /* CSSTX */
6938 CSSTX:
6939 /* op4 */
6940 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6941 return -1;
6942 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6943 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6944 if (record_full_arch_list_add_mem (oaddr3, 16))
6945 return -1;
6946 [[fallthrough]];
6947 case 0x07: /* CSX */
6948 /* op1c */
6949 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
6950 return -1;
6951 /* op2 */
6952 if (record_full_arch_list_add_mem (oaddr, 16))
6953 return -1;
6954 break;
6955
6956 default:
6957 gdb_printf (gdb_stdlog, "Warning: Unknown PLO FC %02x at %s.\n",
6958 fc, paddress (gdbarch, addr));
6959 return -1;
6960 }
6961 }
6962 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6963 return -1;
6964 break;
6965
6966 case 0xef: /* LMD - load multiple disjoint */
6967 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6968 if (s390_record_gpr_g (gdbarch, regcache, i))
6969 return -1;
6970 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6971 return -1;
6972 break;
6973
6974 case 0xf0: /* SRP - shift and round decimal */
6975 case 0xf8: /* ZAP - zero and add */
6976 case 0xfa: /* AP - add decimal */
6977 case 0xfb: /* SP - subtract decimal */
6978 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6979 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6980 return -1;
6981 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6982 return -1;
6983 /* DXC may be written */
6984 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6985 return -1;
6986 break;
6987
6988 case 0xf1: /* MVO - move with offset */
6989 case 0xf2: /* PACK - pack */
6990 case 0xf3: /* UNPK - unpack */
6991 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6992 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6993 return -1;
6994 break;
6995
6996 /* 0xf4-0xf7 undefined */
6997
6998 case 0xf9: /* CP - compare decimal */
6999 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7000 return -1;
7001 /* DXC may be written */
7002 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
7003 return -1;
7004 break;
7005
7006 case 0xfc: /* MP - multiply decimal */
7007 case 0xfd: /* DP - divide decimal */
7008 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7009 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
7010 return -1;
7011 /* DXC may be written */
7012 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
7013 return -1;
7014 break;
7015
7016 /* 0xfe-0xff undefined */
7017
7018 default:
7019 UNKNOWN_OP:
7020 gdb_printf (gdb_stdlog, "Warning: Don't know how to record %04x "
7021 "at %s.\n", insn[0], paddress (gdbarch, addr));
7022 return -1;
7023 }
7024
7025 if (record_full_arch_list_add_reg (regcache, S390_PSWA_REGNUM))
7026 return -1;
7027 if (record_full_arch_list_add_end ())
7028 return -1;
7029 return 0;
7030 }
7031
7032 /* Miscellaneous. */
7033
7034 /* Implement gdbarch_gcc_target_options. GCC does not know "-m32" or
7035 "-mcmodel=large". */
7036
7037 static std::string
7038 s390_gcc_target_options (struct gdbarch *gdbarch)
7039 {
7040 return gdbarch_ptr_bit (gdbarch) == 64 ? "-m64" : "-m31";
7041 }
7042
7043 /* Implement gdbarch_gnu_triplet_regexp. Target triplets are "s390-*"
7044 for 31-bit and "s390x-*" for 64-bit, while the BFD arch name is
7045 always "s390". Note that an s390x compiler supports "-m31" as
7046 well. */
7047
7048 static const char *
7049 s390_gnu_triplet_regexp (struct gdbarch *gdbarch)
7050 {
7051 return "s390x?";
7052 }
7053
7054 /* Implementation of `gdbarch_stap_is_single_operand', as defined in
7055 gdbarch.h. */
7056
7057 static int
7058 s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
7059 {
7060 return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement
7061 or indirection. */
7062 || *s == '%' /* Register access. */
7063 || isdigit (*s)); /* Literal number. */
7064 }
7065
7066 /* gdbarch init. */
7067
7068 /* Validate the range of registers. NAMES must be known at compile time. */
7069
7070 #define s390_validate_reg_range(feature, tdesc_data, start, names) \
7071 do \
7072 { \
7073 for (int i = 0; i < ARRAY_SIZE (names); i++) \
7074 if (!tdesc_numbered_register (feature, tdesc_data, start + i, names[i])) \
7075 return false; \
7076 } \
7077 while (0)
7078
7079 /* Validate the target description. Also numbers registers contained in
7080 tdesc. */
7081
7082 static bool
7083 s390_tdesc_valid (s390_gdbarch_tdep *tdep,
7084 struct tdesc_arch_data *tdesc_data)
7085 {
7086 static const char *const psw[] = {
7087 "pswm", "pswa"
7088 };
7089 static const char *const gprs[] = {
7090 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
7091 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
7092 };
7093 static const char *const fprs[] = {
7094 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
7095 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
7096 };
7097 static const char *const acrs[] = {
7098 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
7099 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
7100 };
7101 static const char *const gprs_lower[] = {
7102 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
7103 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
7104 };
7105 static const char *const gprs_upper[] = {
7106 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
7107 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
7108 };
7109 static const char *const tdb_regs[] = {
7110 "tdb0", "tac", "tct", "atia",
7111 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
7112 "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15"
7113 };
7114 static const char *const vxrs_low[] = {
7115 "v0l", "v1l", "v2l", "v3l", "v4l", "v5l", "v6l", "v7l", "v8l",
7116 "v9l", "v10l", "v11l", "v12l", "v13l", "v14l", "v15l",
7117 };
7118 static const char *const vxrs_high[] = {
7119 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24",
7120 "v25", "v26", "v27", "v28", "v29", "v30", "v31",
7121 };
7122 static const char *const gs_cb[] = {
7123 "gsd", "gssm", "gsepla",
7124 };
7125 static const char *const gs_bc[] = {
7126 "bc_gsd", "bc_gssm", "bc_gsepla",
7127 };
7128
7129 const struct target_desc *tdesc = tdep->tdesc;
7130 const struct tdesc_feature *feature;
7131
7132 if (!tdesc_has_registers (tdesc))
7133 return false;
7134
7135 /* Core registers, i.e. general purpose and PSW. */
7136 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
7137 if (feature == NULL)
7138 return false;
7139
7140 s390_validate_reg_range (feature, tdesc_data, S390_PSWM_REGNUM, psw);
7141
7142 if (tdesc_unnumbered_register (feature, "r0"))
7143 {
7144 s390_validate_reg_range (feature, tdesc_data, S390_R0_REGNUM, gprs);
7145 }
7146 else
7147 {
7148 tdep->have_upper = true;
7149 s390_validate_reg_range (feature, tdesc_data, S390_R0_REGNUM,
7150 gprs_lower);
7151 s390_validate_reg_range (feature, tdesc_data, S390_R0_UPPER_REGNUM,
7152 gprs_upper);
7153 }
7154
7155 /* Floating point registers. */
7156 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
7157 if (feature == NULL)
7158 return false;
7159
7160 if (!tdesc_numbered_register (feature, tdesc_data, S390_FPC_REGNUM, "fpc"))
7161 return false;
7162
7163 s390_validate_reg_range (feature, tdesc_data, S390_F0_REGNUM, fprs);
7164
7165 /* Access control registers. */
7166 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
7167 if (feature == NULL)
7168 return false;
7169
7170 s390_validate_reg_range (feature, tdesc_data, S390_A0_REGNUM, acrs);
7171
7172 /* Optional GNU/Linux-specific "registers". */
7173 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
7174 if (feature)
7175 {
7176 tdesc_numbered_register (feature, tdesc_data,
7177 S390_ORIG_R2_REGNUM, "orig_r2");
7178
7179 if (tdesc_numbered_register (feature, tdesc_data,
7180 S390_LAST_BREAK_REGNUM, "last_break"))
7181 tdep->have_linux_v1 = true;
7182
7183 if (tdesc_numbered_register (feature, tdesc_data,
7184 S390_SYSTEM_CALL_REGNUM, "system_call"))
7185 tdep->have_linux_v2 = true;
7186
7187 if (tdep->have_linux_v2 && !tdep->have_linux_v1)
7188 return false;
7189 }
7190
7191 /* Transaction diagnostic block. */
7192 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.tdb");
7193 if (feature)
7194 {
7195 s390_validate_reg_range (feature, tdesc_data, S390_TDB_DWORD0_REGNUM,
7196 tdb_regs);
7197 tdep->have_tdb = true;
7198 }
7199
7200 /* Vector registers. */
7201 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.vx");
7202 if (feature)
7203 {
7204 s390_validate_reg_range (feature, tdesc_data, S390_V0_LOWER_REGNUM,
7205 vxrs_low);
7206 s390_validate_reg_range (feature, tdesc_data, S390_V16_REGNUM,
7207 vxrs_high);
7208 tdep->have_vx = true;
7209 }
7210
7211 /* Guarded-storage registers. */
7212 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.gs");
7213 if (feature)
7214 {
7215 s390_validate_reg_range (feature, tdesc_data, S390_GSD_REGNUM, gs_cb);
7216 tdep->have_gs = true;
7217 }
7218
7219 /* Guarded-storage broadcast control. */
7220 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.gsbc");
7221 if (feature)
7222 {
7223 if (!tdep->have_gs)
7224 return false;
7225 s390_validate_reg_range (feature, tdesc_data, S390_BC_GSD_REGNUM,
7226 gs_bc);
7227 }
7228
7229 return true;
7230 }
7231
7232 /* Allocate and initialize new gdbarch_tdep. */
7233
7234 static s390_gdbarch_tdep_up
7235 s390_gdbarch_tdep_alloc ()
7236 {
7237 s390_gdbarch_tdep_up tdep (new s390_gdbarch_tdep);
7238
7239 tdep->tdesc = NULL;
7240
7241 tdep->abi = ABI_NONE;
7242 tdep->vector_abi = S390_VECTOR_ABI_NONE;
7243
7244 tdep->gpr_full_regnum = -1;
7245 tdep->v0_full_regnum = -1;
7246 tdep->pc_regnum = -1;
7247 tdep->cc_regnum = -1;
7248
7249 tdep->have_upper = false;
7250 tdep->have_linux_v1 = false;
7251 tdep->have_linux_v2 = false;
7252 tdep->have_tdb = false;
7253 tdep->have_vx = false;
7254 tdep->have_gs = false;
7255
7256 tdep->s390_syscall_record = NULL;
7257
7258 return tdep;
7259 }
7260
7261 /* Set up gdbarch struct. */
7262
7263 static struct gdbarch *
7264 s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
7265 {
7266 const struct target_desc *tdesc = info.target_desc;
7267 int first_pseudo_reg, last_pseudo_reg;
7268 static const char *const stap_register_prefixes[] = { "%", NULL };
7269 static const char *const stap_register_indirection_prefixes[] = { "(",
7270 NULL };
7271 static const char *const stap_register_indirection_suffixes[] = { ")",
7272 NULL };
7273
7274 gdbarch *gdbarch = gdbarch_alloc (&info, s390_gdbarch_tdep_alloc ());
7275 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
7276 tdesc_arch_data_up tdesc_data = tdesc_data_alloc ();
7277 info.tdesc_data = tdesc_data.get ();
7278
7279 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
7280 set_gdbarch_char_signed (gdbarch, 0);
7281
7282 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
7283 We can safely let them default to 128-bit, since the debug info
7284 will give the size of type actually used in each case. */
7285 set_gdbarch_long_double_bit (gdbarch, 128);
7286 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_quad);
7287
7288 set_gdbarch_type_align (gdbarch, s390_type_align);
7289
7290 /* Breakpoints. */
7291 /* Amount PC must be decremented by after a breakpoint. This is
7292 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
7293 always. */
7294 set_gdbarch_decr_pc_after_break (gdbarch, 2);
7295 set_gdbarch_breakpoint_kind_from_pc (gdbarch, s390_breakpoint::kind_from_pc);
7296 set_gdbarch_sw_breakpoint_from_kind (gdbarch, s390_breakpoint::bp_from_kind);
7297
7298 /* Displaced stepping. */
7299 set_gdbarch_displaced_step_copy_insn (gdbarch,
7300 s390_displaced_step_copy_insn);
7301 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
7302 set_gdbarch_displaced_step_hw_singlestep (gdbarch, s390_displaced_step_hw_singlestep);
7303 set_gdbarch_software_single_step (gdbarch, s390_software_single_step);
7304 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
7305
7306 /* Prologue analysis. */
7307 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
7308
7309 /* Register handling. */
7310 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
7311 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
7312 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
7313 set_gdbarch_guess_tracepoint_registers (gdbarch,
7314 s390_guess_tracepoint_registers);
7315 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
7316 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
7317 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
7318 set_gdbarch_dwarf2_reg_piece_offset (gdbarch, s390_dwarf2_reg_piece_offset);
7319
7320 /* Pseudo registers. */
7321 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
7322 set_gdbarch_deprecated_pseudo_register_write (gdbarch,
7323 s390_pseudo_register_write);
7324 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
7325 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
7326 set_tdesc_pseudo_register_reggroup_p (gdbarch,
7327 s390_pseudo_register_reggroup_p);
7328 set_gdbarch_ax_pseudo_register_collect (gdbarch,
7329 s390_ax_pseudo_register_collect);
7330 set_gdbarch_ax_pseudo_register_push_stack
7331 (gdbarch, s390_ax_pseudo_register_push_stack);
7332 set_gdbarch_gen_return_address (gdbarch, s390_gen_return_address);
7333
7334 /* Inferior function calls. */
7335 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
7336 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
7337 set_gdbarch_frame_align (gdbarch, s390_frame_align);
7338 set_gdbarch_return_value (gdbarch, s390_return_value);
7339 set_gdbarch_get_return_buf_addr (gdbarch, s390_get_return_buf_addr);
7340
7341 /* Frame handling. */
7342 /* Stack grows downward. */
7343 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
7344 set_gdbarch_stack_frame_destroyed_p (gdbarch, s390_stack_frame_destroyed_p);
7345 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
7346 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
7347 dwarf2_append_unwinders (gdbarch);
7348 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
7349 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
7350
7351 switch (info.bfd_arch_info->mach)
7352 {
7353 case bfd_mach_s390_31:
7354 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
7355 break;
7356
7357 case bfd_mach_s390_64:
7358 set_gdbarch_long_bit (gdbarch, 64);
7359 set_gdbarch_long_long_bit (gdbarch, 64);
7360 set_gdbarch_ptr_bit (gdbarch, 64);
7361 set_gdbarch_address_class_type_flags (gdbarch,
7362 s390_address_class_type_flags);
7363 set_gdbarch_address_class_type_flags_to_name (gdbarch,
7364 s390_address_class_type_flags_to_name);
7365 set_gdbarch_address_class_name_to_type_flags (gdbarch,
7366 s390_address_class_name_to_type_flags);
7367 break;
7368 }
7369
7370 /* SystemTap functions. */
7371 set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes);
7372 set_gdbarch_stap_register_indirection_prefixes (gdbarch,
7373 stap_register_indirection_prefixes);
7374 set_gdbarch_stap_register_indirection_suffixes (gdbarch,
7375 stap_register_indirection_suffixes);
7376
7377 set_gdbarch_disassembler_options (gdbarch, &s390_disassembler_options);
7378 set_gdbarch_valid_disassembler_options (gdbarch,
7379 disassembler_options_s390 ());
7380
7381 /* Process record-replay */
7382 set_gdbarch_process_record (gdbarch, s390_process_record);
7383
7384 /* Miscellaneous. */
7385 set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand);
7386 set_gdbarch_gcc_target_options (gdbarch, s390_gcc_target_options);
7387 set_gdbarch_gnu_triplet_regexp (gdbarch, s390_gnu_triplet_regexp);
7388
7389 /* Initialize the OSABI. */
7390 gdbarch_init_osabi (info, gdbarch);
7391
7392 /* Always create a default tdesc. Otherwise commands like 'set osabi'
7393 cause GDB to crash with an internal error when the user tries to set
7394 an unsupported OSABI. */
7395 if (!tdesc_has_registers (tdesc))
7396 {
7397 if (info.bfd_arch_info->mach == bfd_mach_s390_31)
7398 tdesc = tdesc_s390_linux32;
7399 else
7400 tdesc = tdesc_s390x_linux64;
7401 }
7402 tdep->tdesc = tdesc;
7403
7404 /* Check any target description for validity. */
7405 if (!s390_tdesc_valid (tdep, tdesc_data.get ()))
7406 {
7407 gdbarch_free (gdbarch);
7408 return NULL;
7409 }
7410
7411 /* Determine vector ABI. */
7412 #ifdef HAVE_ELF
7413 if (tdep->have_vx
7414 && info.abfd != NULL
7415 && info.abfd->format == bfd_object
7416 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour
7417 && bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_GNU,
7418 Tag_GNU_S390_ABI_Vector) == 2)
7419 tdep->vector_abi = S390_VECTOR_ABI_128;
7420 #endif
7421
7422 /* Find a candidate among extant architectures. */
7423 for (arches = gdbarch_list_lookup_by_info (arches, &info);
7424 arches != NULL;
7425 arches = gdbarch_list_lookup_by_info (arches->next, &info))
7426 {
7427 s390_gdbarch_tdep *tmp
7428 = gdbarch_tdep<s390_gdbarch_tdep> (arches->gdbarch);
7429
7430 if (!tmp)
7431 continue;
7432
7433 /* A program can 'choose' not to use the vector registers when they
7434 are present. Leading to the same tdesc but different tdep and
7435 thereby a different gdbarch. */
7436 if (tmp->vector_abi != tdep->vector_abi)
7437 continue;
7438
7439 gdbarch_free (gdbarch);
7440 return arches->gdbarch;
7441 }
7442
7443 tdesc_use_registers (gdbarch, tdep->tdesc, std::move (tdesc_data));
7444 set_gdbarch_register_name (gdbarch, s390_register_name);
7445
7446 /* Assign pseudo register numbers. */
7447 first_pseudo_reg = gdbarch_num_regs (gdbarch);
7448 last_pseudo_reg = first_pseudo_reg;
7449 if (tdep->have_upper)
7450 {
7451 tdep->gpr_full_regnum = last_pseudo_reg;
7452 last_pseudo_reg += 16;
7453 }
7454 if (tdep->have_vx)
7455 {
7456 tdep->v0_full_regnum = last_pseudo_reg;
7457 last_pseudo_reg += 16;
7458 }
7459 tdep->pc_regnum = last_pseudo_reg++;
7460 tdep->cc_regnum = last_pseudo_reg++;
7461 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
7462 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
7463
7464 /* Frame handling. */
7465 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
7466 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
7467 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
7468 frame_base_set_default (gdbarch, &s390_frame_base);
7469
7470 return gdbarch;
7471 }
7472
7473 #if GDB_SELF_TEST
7474 namespace selftests {
7475
7476 /* Return bfd_arch_info representing s390x. */
7477
7478 static const bfd_arch_info *
7479 bfd_arch_info_s390x ()
7480 {
7481 return bfd_lookup_arch (bfd_arch_s390, bfd_mach_s390_64);
7482 }
7483
7484 /* Return gdbarch representing s390x. */
7485
7486 static gdbarch *
7487 gdbarch_s390x ()
7488 {
7489 struct gdbarch_info info;
7490 info.bfd_arch_info = bfd_arch_info_s390x ();
7491 if (info.bfd_arch_info == nullptr)
7492 return nullptr;
7493
7494 info.osabi = GDB_OSABI_NONE;
7495 return gdbarch_find_by_info (info);
7496 }
7497
7498 /* Check disassembly of s390x instructions. */
7499
7500 static void
7501 disassemble_s390x ()
7502 {
7503 gdbarch *gdbarch = gdbarch_s390x ();
7504 if (gdbarch == nullptr)
7505 return;
7506
7507 scoped_restore disassembler_options_restore
7508 = make_scoped_restore (&s390_disassembler_options, "zarch");
7509
7510 gdb::byte_vector insn = { 0xb9, 0x68, 0x00, 0x03 };
7511 disassemble_insn (gdbarch, insn, "clzg\t%r0,%r3");
7512 }
7513
7514 } /* namespace selftests */
7515
7516 #endif /* GDB_SELF_TEST */
7517
7518 INIT_GDB_FILE (s390_tdep)
7519 {
7520 /* Hook us into the gdbarch mechanism. */
7521 gdbarch_register (bfd_arch_s390, s390_gdbarch_init);
7522
7523 initialize_tdesc_s390_linux32 ();
7524 initialize_tdesc_s390x_linux64 ();
7525
7526 #if GDB_SELF_TEST
7527 selftests::register_test ("disassemble-s390x",
7528 selftests::disassemble_s390x);
7529 #endif /* GDB_SELF_TEST */
7530 }