1 /* Target-dependent code for the SPARC for GDB, the GNU debugger.
3 Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1994, 1995,
4 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation,
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
24 /* ??? Support for calling functions from gdb in sparc64 is unfinished. */
27 #include "arch-utils.h"
33 #include "gdb_string.h"
38 #include <sys/procfs.h>
39 /* Prototypes for supply_gregset etc. */
45 #include "symfile.h" /* for 'entry_point_address' */
48 * Some local macros that have multi-arch and non-multi-arch versions:
51 #if (GDB_MULTI_ARCH > 0)
53 /* Does the target have Floating Point registers? */
54 #define SPARC_HAS_FPU (gdbarch_tdep (current_gdbarch)->has_fpu)
55 /* Number of bytes devoted to Floating Point registers: */
56 #define FP_REGISTER_BYTES (gdbarch_tdep (current_gdbarch)->fp_register_bytes)
57 /* Highest numbered Floating Point register. */
58 #define FP_MAX_REGNUM (gdbarch_tdep (current_gdbarch)->fp_max_regnum)
59 /* Size of a general (integer) register: */
60 #define SPARC_INTREG_SIZE (gdbarch_tdep (current_gdbarch)->intreg_size)
61 /* Offset within the call dummy stack of the saved registers. */
62 #define DUMMY_REG_SAVE_OFFSET (gdbarch_tdep (current_gdbarch)->reg_save_offset)
64 #else /* non-multi-arch */
67 /* Does the target have Floating Point registers? */
68 #if defined(TARGET_SPARCLET) || defined(TARGET_SPARCLITE)
69 #define SPARC_HAS_FPU 0
71 #define SPARC_HAS_FPU 1
74 /* Number of bytes devoted to Floating Point registers: */
75 #if (GDB_TARGET_IS_SPARC64)
76 #define FP_REGISTER_BYTES (64 * 4)
79 #define FP_REGISTER_BYTES (32 * 4)
81 #define FP_REGISTER_BYTES 0
85 /* Highest numbered Floating Point register. */
86 #if (GDB_TARGET_IS_SPARC64)
87 #define FP_MAX_REGNUM (FP0_REGNUM + 48)
89 #define FP_MAX_REGNUM (FP0_REGNUM + 32)
92 /* Size of a general (integer) register: */
93 #define SPARC_INTREG_SIZE (REGISTER_RAW_SIZE (G0_REGNUM))
95 /* Offset within the call dummy stack of the saved registers. */
96 #if (GDB_TARGET_IS_SPARC64)
97 #define DUMMY_REG_SAVE_OFFSET (128 + 16)
99 #define DUMMY_REG_SAVE_OFFSET 0x60
102 #endif /* GDB_MULTI_ARCH */
107 int fp_register_bytes
;
112 int call_dummy_call_offset
;
116 /* Now make GDB_TARGET_IS_SPARC64 a runtime test. */
117 /* FIXME MVS: or try testing bfd_arch_info.arch and bfd_arch_info.mach ...
118 * define GDB_TARGET_IS_SPARC64 \
119 * (TARGET_ARCHITECTURE->arch == bfd_arch_sparc && \
120 * (TARGET_ARCHITECTURE->mach == bfd_mach_sparc_v9 || \
121 * TARGET_ARCHITECTURE->mach == bfd_mach_sparc_v9a))
125 extern int stop_after_trap
;
127 /* We don't store all registers immediately when requested, since they
128 get sent over in large chunks anyway. Instead, we accumulate most
129 of the changes and send them over once. "deferred_stores" keeps
130 track of which sets of registers we have locally-changed copies of,
131 so we only need send the groups that have changed. */
133 int deferred_stores
= 0; /* Accumulated stores we want to do eventually. */
136 /* Some machines, such as Fujitsu SPARClite 86x, have a bi-endian mode
137 where instructions are big-endian and data are little-endian.
138 This flag is set when we detect that the target is of this type. */
143 /* Fetch a single instruction. Even on bi-endian machines
144 such as sparc86x, instructions are always big-endian. */
147 fetch_instruction (CORE_ADDR pc
)
149 unsigned long retval
;
151 unsigned char buf
[4];
153 read_memory (pc
, buf
, sizeof (buf
));
155 /* Start at the most significant end of the integer, and work towards
156 the least significant. */
158 for (i
= 0; i
< sizeof (buf
); ++i
)
159 retval
= (retval
<< 8) | buf
[i
];
164 /* Branches with prediction are treated like their non-predicting cousins. */
165 /* FIXME: What about floating point branches? */
167 /* Macros to extract fields from sparc instructions. */
168 #define X_OP(i) (((i) >> 30) & 0x3)
169 #define X_RD(i) (((i) >> 25) & 0x1f)
170 #define X_A(i) (((i) >> 29) & 1)
171 #define X_COND(i) (((i) >> 25) & 0xf)
172 #define X_OP2(i) (((i) >> 22) & 0x7)
173 #define X_IMM22(i) ((i) & 0x3fffff)
174 #define X_OP3(i) (((i) >> 19) & 0x3f)
175 #define X_RS1(i) (((i) >> 14) & 0x1f)
176 #define X_I(i) (((i) >> 13) & 1)
177 #define X_IMM13(i) ((i) & 0x1fff)
178 /* Sign extension macros. */
179 #define X_SIMM13(i) ((X_IMM13 (i) ^ 0x1000) - 0x1000)
180 #define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000)
181 #define X_CC(i) (((i) >> 20) & 3)
182 #define X_P(i) (((i) >> 19) & 1)
183 #define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000)
184 #define X_RCOND(i) (((i) >> 25) & 7)
185 #define X_DISP16(i) ((((((i) >> 6) && 0xc000) | ((i) & 0x3fff)) ^ 0x8000) - 0x8000)
186 #define X_FCN(i) (((i) >> 25) & 31)
190 Error
, not_branch
, bicc
, bicca
, ba
, baa
, ticc
, ta
, done_retry
193 /* Simulate single-step ptrace call for sun4. Code written by Gary
194 Beihl (beihl@mcc.com). */
196 /* npc4 and next_pc describe the situation at the time that the
197 step-breakpoint was set, not necessary the current value of NPC_REGNUM. */
198 static CORE_ADDR next_pc
, npc4
, target
;
199 static int brknpc4
, brktrg
;
200 typedef char binsn_quantum
[BREAKPOINT_MAX
];
201 static binsn_quantum break_mem
[3];
203 static branch_type
isbranch (long, CORE_ADDR
, CORE_ADDR
*);
205 /* single_step() is called just before we want to resume the inferior,
206 if we want to single-step it but there is no hardware or kernel single-step
207 support (as on all SPARCs). We find all the possible targets of the
208 coming instruction and breakpoint them.
210 single_step is also called just after the inferior stops. If we had
211 set up a simulated single-step, we undo our damage. */
214 sparc_software_single_step (enum target_signal ignore
, /* pid, but we don't need it */
215 int insert_breakpoints_p
)
221 if (insert_breakpoints_p
)
223 /* Always set breakpoint for NPC. */
224 next_pc
= read_register (NPC_REGNUM
);
225 npc4
= next_pc
+ 4; /* branch not taken */
227 target_insert_breakpoint (next_pc
, break_mem
[0]);
228 /* printf_unfiltered ("set break at %x\n",next_pc); */
230 pc
= read_register (PC_REGNUM
);
231 pc_instruction
= fetch_instruction (pc
);
232 br
= isbranch (pc_instruction
, pc
, &target
);
233 brknpc4
= brktrg
= 0;
237 /* Conditional annulled branch will either end up at
238 npc (if taken) or at npc+4 (if not taken).
241 target_insert_breakpoint (npc4
, break_mem
[1]);
243 else if (br
== baa
&& target
!= next_pc
)
245 /* Unconditional annulled branch will always end up at
248 target_insert_breakpoint (target
, break_mem
[2]);
250 else if (GDB_TARGET_IS_SPARC64
&& br
== done_retry
)
253 target_insert_breakpoint (target
, break_mem
[2]);
258 /* Remove breakpoints */
259 target_remove_breakpoint (next_pc
, break_mem
[0]);
262 target_remove_breakpoint (npc4
, break_mem
[1]);
265 target_remove_breakpoint (target
, break_mem
[2]);
269 struct frame_extra_info
274 /* Following fields only relevant for flat frames. */
277 /* Add this to ->frame to get the value of the stack pointer at the
278 time of the register saves. */
282 /* Call this for each newly created frame. For SPARC, we need to
283 calculate the bottom of the frame, and do some extra work if the
284 prologue has been generated via the -mflat option to GCC. In
285 particular, we need to know where the previous fp and the pc have
286 been stashed, since their exact position within the frame may vary. */
289 sparc_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
292 CORE_ADDR prologue_start
, prologue_end
;
295 fi
->extra_info
= (struct frame_extra_info
*)
296 frame_obstack_alloc (sizeof (struct frame_extra_info
));
297 frame_saved_regs_zalloc (fi
);
299 fi
->extra_info
->bottom
=
301 (fi
->frame
== fi
->next
->frame
? fi
->next
->extra_info
->bottom
:
302 fi
->next
->frame
) : read_sp ());
304 /* If fi->next is NULL, then we already set ->frame by passing read_fp()
305 to create_new_frame. */
310 buf
= alloca (MAX_REGISTER_RAW_SIZE
);
312 /* Compute ->frame as if not flat. If it is flat, we'll change
314 if (fi
->next
->next
!= NULL
315 && ((get_frame_type (fi
->next
->next
) == SIGTRAMP_FRAME
)
316 || deprecated_frame_in_dummy (fi
->next
->next
))
317 && frameless_look_for_prologue (fi
->next
))
319 /* A frameless function interrupted by a signal did not change
320 the frame pointer, fix up frame pointer accordingly. */
321 deprecated_update_frame_base_hack (fi
, get_frame_base (fi
->next
));
322 fi
->extra_info
->bottom
= fi
->next
->extra_info
->bottom
;
326 /* Should we adjust for stack bias here? */
327 get_saved_register (buf
, 0, 0, fi
, FP_REGNUM
, 0);
328 deprecated_update_frame_base_hack (fi
, extract_address (buf
, REGISTER_RAW_SIZE (FP_REGNUM
)));
330 if (GDB_TARGET_IS_SPARC64
&& (fi
->frame
& 1))
331 deprecated_update_frame_base_hack (fi
, fi
->frame
+ 2047);
335 /* Decide whether this is a function with a ``flat register window''
336 frame. For such functions, the frame pointer is actually in %i7. */
337 fi
->extra_info
->flat
= 0;
338 fi
->extra_info
->in_prologue
= 0;
339 if (find_pc_partial_function (get_frame_pc (fi
), &name
, &prologue_start
, &prologue_end
))
341 /* See if the function starts with an add (which will be of a
342 negative number if a flat frame) to the sp. FIXME: Does not
343 handle large frames which will need more than one instruction
345 insn
= fetch_instruction (prologue_start
);
346 if (X_OP (insn
) == 2 && X_RD (insn
) == 14 && X_OP3 (insn
) == 0
347 && X_I (insn
) && X_SIMM13 (insn
) < 0)
349 int offset
= X_SIMM13 (insn
);
351 /* Then look for a save of %i7 into the frame. */
352 insn
= fetch_instruction (prologue_start
+ 4);
356 && X_RS1 (insn
) == 14)
360 buf
= alloca (MAX_REGISTER_RAW_SIZE
);
362 /* We definitely have a flat frame now. */
363 fi
->extra_info
->flat
= 1;
365 fi
->extra_info
->sp_offset
= offset
;
367 /* Overwrite the frame's address with the value in %i7. */
368 get_saved_register (buf
, 0, 0, fi
, I7_REGNUM
, 0);
369 deprecated_update_frame_base_hack (fi
, extract_address (buf
, REGISTER_RAW_SIZE (I7_REGNUM
)));
371 if (GDB_TARGET_IS_SPARC64
&& (fi
->frame
& 1))
372 deprecated_update_frame_base_hack (fi
, fi
->frame
+ 2047);
374 /* Record where the fp got saved. */
375 fi
->extra_info
->fp_addr
=
376 fi
->frame
+ fi
->extra_info
->sp_offset
+ X_SIMM13 (insn
);
378 /* Also try to collect where the pc got saved to. */
379 fi
->extra_info
->pc_addr
= 0;
380 insn
= fetch_instruction (prologue_start
+ 12);
384 && X_RS1 (insn
) == 14)
385 fi
->extra_info
->pc_addr
=
386 fi
->frame
+ fi
->extra_info
->sp_offset
+ X_SIMM13 (insn
);
391 /* Check if the PC is in the function prologue before a SAVE
392 instruction has been executed yet. If so, set the frame
393 to the current value of the stack pointer and set
394 the in_prologue flag. */
396 struct symtab_and_line sal
;
398 sal
= find_pc_line (prologue_start
, 0);
399 if (sal
.line
== 0) /* no line info, use PC */
400 prologue_end
= get_frame_pc (fi
);
401 else if (sal
.end
< prologue_end
)
402 prologue_end
= sal
.end
;
403 if (get_frame_pc (fi
) < prologue_end
)
405 for (addr
= prologue_start
; addr
< get_frame_pc (fi
); addr
+= 4)
407 insn
= read_memory_integer (addr
, 4);
408 if (X_OP (insn
) == 2 && X_OP3 (insn
) == 0x3c)
409 break; /* SAVE seen, stop searching */
411 if (addr
>= get_frame_pc (fi
))
413 fi
->extra_info
->in_prologue
= 1;
414 deprecated_update_frame_base_hack (fi
, read_register (SP_REGNUM
));
419 if (fi
->next
&& fi
->frame
== 0)
421 /* Kludge to cause init_prev_frame_info to destroy the new frame. */
422 deprecated_update_frame_base_hack (fi
, fi
->next
->frame
);
423 deprecated_update_frame_pc_hack (fi
, get_frame_pc (fi
->next
));
428 sparc_frame_chain (struct frame_info
*frame
)
430 /* Value that will cause FRAME_CHAIN_VALID to not worry about the chain
431 value. If it really is zero, we detect it later in
432 sparc_init_prev_frame. */
433 return (CORE_ADDR
) 1;
437 sparc_extract_struct_value_address (char *regbuf
)
439 return extract_address (regbuf
+ REGISTER_BYTE (O0_REGNUM
),
440 REGISTER_RAW_SIZE (O0_REGNUM
));
443 /* Find the pc saved in frame FRAME. */
446 sparc_frame_saved_pc (struct frame_info
*frame
)
451 buf
= alloca (MAX_REGISTER_RAW_SIZE
);
452 if ((get_frame_type (frame
) == SIGTRAMP_FRAME
))
454 /* This is the signal trampoline frame.
455 Get the saved PC from the sigcontext structure. */
457 #ifndef SIGCONTEXT_PC_OFFSET
458 #define SIGCONTEXT_PC_OFFSET 12
461 CORE_ADDR sigcontext_addr
;
463 int saved_pc_offset
= SIGCONTEXT_PC_OFFSET
;
466 scbuf
= alloca (TARGET_PTR_BIT
/ HOST_CHAR_BIT
);
468 /* Solaris2 ucbsigvechandler passes a pointer to a sigcontext
469 as the third parameter. The offset to the saved pc is 12. */
470 find_pc_partial_function (get_frame_pc (frame
), &name
,
471 (CORE_ADDR
*) NULL
, (CORE_ADDR
*) NULL
);
472 if (name
&& STREQ (name
, "ucbsigvechandler"))
473 saved_pc_offset
= 12;
475 /* The sigcontext address is contained in register O2. */
476 get_saved_register (buf
, (int *) NULL
, (CORE_ADDR
*) NULL
,
477 frame
, O0_REGNUM
+ 2, (enum lval_type
*) NULL
);
478 sigcontext_addr
= extract_address (buf
, REGISTER_RAW_SIZE (O0_REGNUM
+ 2));
480 /* Don't cause a memory_error when accessing sigcontext in case the
481 stack layout has changed or the stack is corrupt. */
482 target_read_memory (sigcontext_addr
+ saved_pc_offset
,
483 scbuf
, sizeof (scbuf
));
484 return extract_address (scbuf
, sizeof (scbuf
));
486 else if (frame
->extra_info
->in_prologue
||
487 (frame
->next
!= NULL
&&
488 ((get_frame_type (frame
->next
) == SIGTRAMP_FRAME
) ||
489 deprecated_frame_in_dummy (frame
->next
)) &&
490 frameless_look_for_prologue (frame
)))
492 /* A frameless function interrupted by a signal did not save
493 the PC, it is still in %o7. */
494 get_saved_register (buf
, (int *) NULL
, (CORE_ADDR
*) NULL
,
495 frame
, O7_REGNUM
, (enum lval_type
*) NULL
);
496 return PC_ADJUST (extract_address (buf
, SPARC_INTREG_SIZE
));
498 if (frame
->extra_info
->flat
)
499 addr
= frame
->extra_info
->pc_addr
;
501 addr
= frame
->extra_info
->bottom
+ FRAME_SAVED_I0
+
502 SPARC_INTREG_SIZE
* (I7_REGNUM
- I0_REGNUM
);
505 /* A flat frame leaf function might not save the PC anywhere,
506 just leave it in %o7. */
507 return PC_ADJUST (read_register (O7_REGNUM
));
509 read_memory (addr
, buf
, SPARC_INTREG_SIZE
);
510 return PC_ADJUST (extract_address (buf
, SPARC_INTREG_SIZE
));
513 /* Since an individual frame in the frame cache is defined by two
514 arguments (a frame pointer and a stack pointer), we need two
515 arguments to get info for an arbitrary stack frame. This routine
516 takes two arguments and makes the cached frames look as if these
517 two arguments defined a frame on the cache. This allows the rest
518 of info frame to extract the important arguments without
522 setup_arbitrary_frame (int argc
, CORE_ADDR
*argv
)
524 struct frame_info
*frame
;
527 error ("Sparc frame specifications require two arguments: fp and sp");
529 frame
= create_new_frame (argv
[0], 0);
532 internal_error (__FILE__
, __LINE__
,
533 "create_new_frame returned invalid frame");
535 frame
->extra_info
->bottom
= argv
[1];
536 deprecated_update_frame_pc_hack (frame
, FRAME_SAVED_PC (frame
));
540 /* Given a pc value, skip it forward past the function prologue by
541 disassembling instructions that appear to be a prologue.
543 If FRAMELESS_P is set, we are only testing to see if the function
544 is frameless. This allows a quicker answer.
546 This routine should be more specific in its actions; making sure
547 that it uses the same register in the initial prologue section. */
549 static CORE_ADDR
examine_prologue (CORE_ADDR
, int, struct frame_info
*,
553 examine_prologue (CORE_ADDR start_pc
, int frameless_p
, struct frame_info
*fi
,
554 CORE_ADDR
*saved_regs
)
558 CORE_ADDR pc
= start_pc
;
561 insn
= fetch_instruction (pc
);
563 /* Recognize the `sethi' insn and record its destination. */
564 if (X_OP (insn
) == 0 && X_OP2 (insn
) == 4)
568 insn
= fetch_instruction (pc
);
571 /* Recognize an add immediate value to register to either %g1 or
572 the destination register recorded above. Actually, this might
573 well recognize several different arithmetic operations.
574 It doesn't check that rs1 == rd because in theory "sub %g0, 5, %g1"
575 followed by "save %sp, %g1, %sp" is a valid prologue (Not that
576 I imagine any compiler really does that, however). */
579 && (X_RD (insn
) == 1 || X_RD (insn
) == dest
))
582 insn
= fetch_instruction (pc
);
585 /* Recognize any SAVE insn. */
586 if (X_OP (insn
) == 2 && X_OP3 (insn
) == 60)
589 if (frameless_p
) /* If the save is all we care about, */
590 return pc
; /* return before doing more work */
591 insn
= fetch_instruction (pc
);
593 /* Recognize add to %sp. */
594 else if (X_OP (insn
) == 2 && X_RD (insn
) == 14 && X_OP3 (insn
) == 0)
597 if (frameless_p
) /* If the add is all we care about, */
598 return pc
; /* return before doing more work */
600 insn
= fetch_instruction (pc
);
601 /* Recognize store of frame pointer (i7). */
605 && X_RS1 (insn
) == 14)
608 insn
= fetch_instruction (pc
);
610 /* Recognize sub %sp, <anything>, %i7. */
613 && X_RS1 (insn
) == 14
614 && X_RD (insn
) == 31)
617 insn
= fetch_instruction (pc
);
626 /* Without a save or add instruction, it's not a prologue. */
631 /* Recognize stores into the frame from the input registers.
632 This recognizes all non alternate stores of an input register,
633 into a location offset from the frame pointer between
636 /* The above will fail for arguments that are promoted
637 (eg. shorts to ints or floats to doubles), because the compiler
638 will pass them in positive-offset frame space, but the prologue
639 will save them (after conversion) in negative frame space at an
640 unpredictable offset. Therefore I am going to remove the
641 restriction on the target-address of the save, on the theory
642 that any unbroken sequence of saves from input registers must
643 be part of the prologue. In un-optimized code (at least), I'm
644 fairly sure that the compiler would emit SOME other instruction
645 (eg. a move or add) before emitting another save that is actually
646 a part of the function body.
648 Besides, the reserved stack space is different for SPARC64 anyway.
653 && (X_OP3 (insn
) & 0x3c) == 4 /* Store, non-alternate. */
654 && (X_RD (insn
) & 0x18) == 0x18 /* Input register. */
655 && X_I (insn
) /* Immediate mode. */
656 && X_RS1 (insn
) == 30) /* Off of frame pointer. */
657 ; /* empty statement -- fall thru to end of loop */
658 else if (GDB_TARGET_IS_SPARC64
660 && (X_OP3 (insn
) & 0x3c) == 12 /* store, extended (64-bit) */
661 && (X_RD (insn
) & 0x18) == 0x18 /* input register */
662 && X_I (insn
) /* immediate mode */
663 && X_RS1 (insn
) == 30) /* off of frame pointer */
664 ; /* empty statement -- fall thru to end of loop */
665 else if (X_OP (insn
) == 3
666 && (X_OP3 (insn
) & 0x3c) == 36 /* store, floating-point */
667 && X_I (insn
) /* immediate mode */
668 && X_RS1 (insn
) == 30) /* off of frame pointer */
669 ; /* empty statement -- fall thru to end of loop */
672 && X_OP3 (insn
) == 4 /* store? */
673 && X_RS1 (insn
) == 14) /* off of frame pointer */
675 if (saved_regs
&& X_I (insn
))
676 saved_regs
[X_RD (insn
)] =
677 fi
->frame
+ fi
->extra_info
->sp_offset
+ X_SIMM13 (insn
);
682 insn
= fetch_instruction (pc
);
688 /* Advance PC across any function entry prologue instructions to reach
692 sparc_skip_prologue (CORE_ADDR start_pc
)
694 struct symtab_and_line sal
;
695 CORE_ADDR func_start
, func_end
;
697 /* This is the preferred method, find the end of the prologue by
698 using the debugging information. */
699 if (find_pc_partial_function (start_pc
, NULL
, &func_start
, &func_end
))
701 sal
= find_pc_line (func_start
, 0);
703 if (sal
.end
< func_end
704 && start_pc
<= sal
.end
)
708 /* Oh well, examine the code by hand. */
709 return examine_prologue (start_pc
, 0, NULL
, NULL
);
712 /* Is the prologue at IP frameless? */
715 sparc_prologue_frameless_p (CORE_ADDR ip
)
717 return ip
== examine_prologue (ip
, 1, NULL
, NULL
);
720 /* Check instruction at ADDR to see if it is a branch.
721 All non-annulled instructions will go to NPC or will trap.
722 Set *TARGET if we find a candidate branch; set to zero if not.
724 This isn't static as it's used by remote-sa.sparc.c. */
727 isbranch (long instruction
, CORE_ADDR addr
, CORE_ADDR
*target
)
729 branch_type val
= not_branch
;
730 long int offset
= 0; /* Must be signed for sign-extend. */
734 if (X_OP (instruction
) == 0
735 && (X_OP2 (instruction
) == 2
736 || X_OP2 (instruction
) == 6
737 || X_OP2 (instruction
) == 1
738 || X_OP2 (instruction
) == 3
739 || X_OP2 (instruction
) == 5
740 || (GDB_TARGET_IS_SPARC64
&& X_OP2 (instruction
) == 7)))
742 if (X_COND (instruction
) == 8)
743 val
= X_A (instruction
) ? baa
: ba
;
745 val
= X_A (instruction
) ? bicca
: bicc
;
746 switch (X_OP2 (instruction
))
749 if (!GDB_TARGET_IS_SPARC64
)
754 offset
= 4 * X_DISP22 (instruction
);
758 offset
= 4 * X_DISP19 (instruction
);
761 offset
= 4 * X_DISP16 (instruction
);
764 *target
= addr
+ offset
;
766 else if (GDB_TARGET_IS_SPARC64
767 && X_OP (instruction
) == 2
768 && X_OP3 (instruction
) == 62)
770 if (X_FCN (instruction
) == 0)
773 *target
= read_register (TNPC_REGNUM
);
776 else if (X_FCN (instruction
) == 1)
779 *target
= read_register (TPC_REGNUM
);
787 /* Find register number REGNUM relative to FRAME and put its
788 (raw) contents in *RAW_BUFFER. Set *OPTIMIZED if the variable
789 was optimized out (and thus can't be fetched). If the variable
790 was fetched from memory, set *ADDRP to where it was fetched from,
791 otherwise it was fetched from a register.
793 The argument RAW_BUFFER must point to aligned memory. */
796 sparc_get_saved_register (char *raw_buffer
, int *optimized
, CORE_ADDR
*addrp
,
797 struct frame_info
*frame
, int regnum
,
798 enum lval_type
*lval
)
800 struct frame_info
*frame1
;
803 if (!target_has_registers
)
804 error ("No registers.");
811 /* FIXME This code extracted from infcmd.c; should put elsewhere! */
814 /* error ("No selected frame."); */
815 if (!target_has_registers
)
816 error ("The program has no registers now.");
817 if (deprecated_selected_frame
== NULL
)
818 error ("No selected frame.");
819 /* Try to use selected frame */
820 frame
= get_prev_frame (deprecated_selected_frame
);
822 error ("Cmd not meaningful in the outermost frame.");
826 frame1
= frame
->next
;
828 /* Get saved PC from the frame info if not in innermost frame. */
829 if (regnum
== PC_REGNUM
&& frame1
!= NULL
)
833 if (raw_buffer
!= NULL
)
835 /* Put it back in target format. */
836 store_address (raw_buffer
, REGISTER_RAW_SIZE (regnum
), get_frame_pc (frame
));
843 while (frame1
!= NULL
)
845 /* FIXME MVS: wrong test for dummy frame at entry. */
847 if (get_frame_pc (frame1
) >= (frame1
->extra_info
->bottom
?
848 frame1
->extra_info
->bottom
: read_sp ())
849 && get_frame_pc (frame1
) <= get_frame_base (frame1
))
851 /* Dummy frame. All but the window regs are in there somewhere.
852 The window registers are saved on the stack, just like in a
854 if (regnum
>= G1_REGNUM
&& regnum
< G1_REGNUM
+ 7)
855 addr
= frame1
->frame
+ (regnum
- G0_REGNUM
) * SPARC_INTREG_SIZE
856 - (FP_REGISTER_BYTES
+ 8 * SPARC_INTREG_SIZE
);
857 else if (regnum
>= I0_REGNUM
&& regnum
< I0_REGNUM
+ 8)
858 /* NOTE: cagney/2002-05-04: The call to get_prev_frame()
859 is safe/cheap - there will always be a prev frame.
860 This is because frame1 is initialized to frame->next
861 (frame1->prev == frame) and is then advanced towards
862 the innermost (next) frame. */
863 addr
= (get_prev_frame (frame1
)->extra_info
->bottom
864 + (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
866 else if (regnum
>= L0_REGNUM
&& regnum
< L0_REGNUM
+ 8)
867 /* NOTE: cagney/2002-05-04: The call to get_prev_frame()
868 is safe/cheap - there will always be a prev frame.
869 This is because frame1 is initialized to frame->next
870 (frame1->prev == frame) and is then advanced towards
871 the innermost (next) frame. */
872 addr
= (get_prev_frame (frame1
)->extra_info
->bottom
873 + (regnum
- L0_REGNUM
) * SPARC_INTREG_SIZE
875 else if (regnum
>= O0_REGNUM
&& regnum
< O0_REGNUM
+ 8)
876 addr
= frame1
->frame
+ (regnum
- O0_REGNUM
) * SPARC_INTREG_SIZE
877 - (FP_REGISTER_BYTES
+ 16 * SPARC_INTREG_SIZE
);
878 else if (SPARC_HAS_FPU
&&
879 regnum
>= FP0_REGNUM
&& regnum
< FP0_REGNUM
+ 32)
880 addr
= frame1
->frame
+ (regnum
- FP0_REGNUM
) * 4
881 - (FP_REGISTER_BYTES
);
882 else if (GDB_TARGET_IS_SPARC64
&& SPARC_HAS_FPU
&&
883 regnum
>= FP0_REGNUM
+ 32 && regnum
< FP_MAX_REGNUM
)
884 addr
= frame1
->frame
+ 32 * 4 + (regnum
- FP0_REGNUM
- 32) * 8
885 - (FP_REGISTER_BYTES
);
886 else if (regnum
>= Y_REGNUM
&& regnum
< NUM_REGS
)
887 addr
= frame1
->frame
+ (regnum
- Y_REGNUM
) * SPARC_INTREG_SIZE
888 - (FP_REGISTER_BYTES
+ 24 * SPARC_INTREG_SIZE
);
890 else if (frame1
->extra_info
->flat
)
893 if (regnum
== RP_REGNUM
)
894 addr
= frame1
->extra_info
->pc_addr
;
895 else if (regnum
== I7_REGNUM
)
896 addr
= frame1
->extra_info
->fp_addr
;
899 CORE_ADDR func_start
;
902 regs
= alloca (NUM_REGS
* sizeof (CORE_ADDR
));
903 memset (regs
, 0, NUM_REGS
* sizeof (CORE_ADDR
));
905 find_pc_partial_function (get_frame_pc (frame1
), NULL
, &func_start
, NULL
);
906 examine_prologue (func_start
, 0, frame1
, regs
);
912 /* Normal frame. Local and In registers are saved on stack. */
913 if (regnum
>= I0_REGNUM
&& regnum
< I0_REGNUM
+ 8)
914 addr
= (get_prev_frame (frame1
)->extra_info
->bottom
915 + (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
917 else if (regnum
>= L0_REGNUM
&& regnum
< L0_REGNUM
+ 8)
918 addr
= (get_prev_frame (frame1
)->extra_info
->bottom
919 + (regnum
- L0_REGNUM
) * SPARC_INTREG_SIZE
921 else if (regnum
>= O0_REGNUM
&& regnum
< O0_REGNUM
+ 8)
923 /* Outs become ins. */
924 get_saved_register (raw_buffer
, optimized
, addrp
, frame1
,
925 (regnum
- O0_REGNUM
+ I0_REGNUM
), lval
);
931 frame1
= frame1
->next
;
937 if (regnum
== SP_REGNUM
)
939 if (raw_buffer
!= NULL
)
941 /* Put it back in target format. */
942 store_address (raw_buffer
, REGISTER_RAW_SIZE (regnum
), addr
);
948 if (raw_buffer
!= NULL
)
949 read_memory (addr
, raw_buffer
, REGISTER_RAW_SIZE (regnum
));
954 *lval
= lval_register
;
955 addr
= REGISTER_BYTE (regnum
);
956 if (raw_buffer
!= NULL
)
957 deprecated_read_register_gen (regnum
, raw_buffer
);
963 /* Push an empty stack frame, and record in it the current PC, regs, etc.
965 We save the non-windowed registers and the ins. The locals and outs
966 are new; they don't need to be saved. The i's and l's of
967 the last frame were already saved on the stack. */
969 /* Definitely see tm-sparc.h for more doc of the frame format here. */
971 /* See tm-sparc.h for how this is calculated. */
973 #define DUMMY_STACK_REG_BUF_SIZE \
974 (((8+8+8) * SPARC_INTREG_SIZE) + FP_REGISTER_BYTES)
975 #define DUMMY_STACK_SIZE \
976 (DUMMY_STACK_REG_BUF_SIZE + DUMMY_REG_SAVE_OFFSET)
979 sparc_push_dummy_frame (void)
981 CORE_ADDR sp
, old_sp
;
984 register_temp
= alloca (DUMMY_STACK_SIZE
);
986 old_sp
= sp
= read_sp ();
988 if (GDB_TARGET_IS_SPARC64
)
990 /* PC, NPC, CCR, FSR, FPRS, Y, ASI */
991 deprecated_read_register_bytes (REGISTER_BYTE (PC_REGNUM
),
993 REGISTER_RAW_SIZE (PC_REGNUM
) * 7);
994 deprecated_read_register_bytes (REGISTER_BYTE (PSTATE_REGNUM
),
995 ®ister_temp
[7 * SPARC_INTREG_SIZE
],
996 REGISTER_RAW_SIZE (PSTATE_REGNUM
));
997 /* FIXME: not sure what needs to be saved here. */
1001 /* Y, PS, WIM, TBR, PC, NPC, FPS, CPS regs */
1002 deprecated_read_register_bytes (REGISTER_BYTE (Y_REGNUM
),
1004 REGISTER_RAW_SIZE (Y_REGNUM
) * 8);
1007 deprecated_read_register_bytes (REGISTER_BYTE (O0_REGNUM
),
1008 ®ister_temp
[8 * SPARC_INTREG_SIZE
],
1009 SPARC_INTREG_SIZE
* 8);
1011 deprecated_read_register_bytes (REGISTER_BYTE (G0_REGNUM
),
1012 ®ister_temp
[16 * SPARC_INTREG_SIZE
],
1013 SPARC_INTREG_SIZE
* 8);
1016 deprecated_read_register_bytes (REGISTER_BYTE (FP0_REGNUM
),
1017 ®ister_temp
[24 * SPARC_INTREG_SIZE
],
1020 sp
-= DUMMY_STACK_SIZE
;
1024 write_memory (sp
+ DUMMY_REG_SAVE_OFFSET
, ®ister_temp
[0],
1025 DUMMY_STACK_REG_BUF_SIZE
);
1027 if (strcmp (target_shortname
, "sim") != 0)
1029 /* NOTE: cagney/2002-04-04: The code below originally contained
1030 GDB's _only_ call to write_fp(). That call was eliminated by
1031 inlining the corresponding code. For the 64 bit case, the
1032 old function (sparc64_write_fp) did the below although I'm
1033 not clear why. The same goes for why this is only done when
1034 the underlying target is a simulator. */
1035 if (GDB_TARGET_IS_SPARC64
)
1037 /* Target is a 64 bit SPARC. */
1038 CORE_ADDR oldfp
= read_register (FP_REGNUM
);
1040 write_register (FP_REGNUM
, old_sp
- 2047);
1042 write_register (FP_REGNUM
, old_sp
);
1046 /* Target is a 32 bit SPARC. */
1047 write_register (FP_REGNUM
, old_sp
);
1049 /* Set return address register for the call dummy to the current PC. */
1050 write_register (I7_REGNUM
, read_pc () - 8);
1054 /* The call dummy will write this value to FP before executing
1055 the 'save'. This ensures that register window flushes work
1056 correctly in the simulator. */
1057 write_register (G0_REGNUM
+ 1, read_register (FP_REGNUM
));
1059 /* The call dummy will write this value to FP after executing
1061 write_register (G0_REGNUM
+ 2, old_sp
);
1063 /* The call dummy will write this value to the return address (%i7) after
1064 executing the 'save'. */
1065 write_register (G0_REGNUM
+ 3, read_pc () - 8);
1067 /* Set the FP that the call dummy will be using after the 'save'.
1068 This makes backtraces from an inferior function call work properly. */
1069 write_register (FP_REGNUM
, old_sp
);
1073 /* sparc_frame_find_saved_regs (). This function is here only because
1074 pop_frame uses it. Note there is an interesting corner case which
1075 I think few ports of GDB get right--if you are popping a frame
1076 which does not save some register that *is* saved by a more inner
1077 frame (such a frame will never be a dummy frame because dummy
1078 frames save all registers). Rewriting pop_frame to use
1079 get_saved_register would solve this problem and also get rid of the
1080 ugly duplication between sparc_frame_find_saved_regs and
1083 Stores, into an array of CORE_ADDR,
1084 the addresses of the saved registers of frame described by FRAME_INFO.
1085 This includes special registers such as pc and fp saved in special
1086 ways in the stack frame. sp is even more special:
1087 the address we return for it IS the sp for the next frame.
1089 Note that on register window machines, we are currently making the
1090 assumption that window registers are being saved somewhere in the
1091 frame in which they are being used. If they are stored in an
1092 inferior frame, find_saved_register will break.
1094 On the Sun 4, the only time all registers are saved is when
1095 a dummy frame is involved. Otherwise, the only saved registers
1096 are the LOCAL and IN registers which are saved as a result
1097 of the "save/restore" opcodes. This condition is determined
1098 by address rather than by value.
1100 The "pc" is not stored in a frame on the SPARC. (What is stored
1101 is a return address minus 8.) sparc_pop_frame knows how to
1102 deal with that. Other routines might or might not.
1104 See tm-sparc.h (PUSH_DUMMY_FRAME and friends) for CRITICAL information
1105 about how this works. */
1107 static void sparc_frame_find_saved_regs (struct frame_info
*, CORE_ADDR
*);
1110 sparc_frame_find_saved_regs (struct frame_info
*fi
, CORE_ADDR
*saved_regs_addr
)
1112 register int regnum
;
1113 CORE_ADDR frame_addr
= get_frame_base (fi
);
1116 internal_error (__FILE__
, __LINE__
,
1117 "Bad frame info struct in FRAME_FIND_SAVED_REGS");
1119 memset (saved_regs_addr
, 0, NUM_REGS
* sizeof (CORE_ADDR
));
1121 if (get_frame_pc (fi
) >= (fi
->extra_info
->bottom
?
1122 fi
->extra_info
->bottom
: read_sp ())
1123 && get_frame_pc (fi
) <= get_frame_base (fi
))
1125 /* Dummy frame. All but the window regs are in there somewhere. */
1126 for (regnum
= G1_REGNUM
; regnum
< G1_REGNUM
+ 7; regnum
++)
1127 saved_regs_addr
[regnum
] =
1128 frame_addr
+ (regnum
- G0_REGNUM
) * SPARC_INTREG_SIZE
1129 - DUMMY_STACK_REG_BUF_SIZE
+ 16 * SPARC_INTREG_SIZE
;
1131 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+ 8; regnum
++)
1132 saved_regs_addr
[regnum
] =
1133 frame_addr
+ (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
1134 - DUMMY_STACK_REG_BUF_SIZE
+ 8 * SPARC_INTREG_SIZE
;
1137 for (regnum
= FP0_REGNUM
; regnum
< FP_MAX_REGNUM
; regnum
++)
1138 saved_regs_addr
[regnum
] = frame_addr
+ (regnum
- FP0_REGNUM
) * 4
1139 - DUMMY_STACK_REG_BUF_SIZE
+ 24 * SPARC_INTREG_SIZE
;
1141 if (GDB_TARGET_IS_SPARC64
)
1143 for (regnum
= PC_REGNUM
; regnum
< PC_REGNUM
+ 7; regnum
++)
1145 saved_regs_addr
[regnum
] =
1146 frame_addr
+ (regnum
- PC_REGNUM
) * SPARC_INTREG_SIZE
1147 - DUMMY_STACK_REG_BUF_SIZE
;
1149 saved_regs_addr
[PSTATE_REGNUM
] =
1150 frame_addr
+ 8 * SPARC_INTREG_SIZE
- DUMMY_STACK_REG_BUF_SIZE
;
1153 for (regnum
= Y_REGNUM
; regnum
< NUM_REGS
; regnum
++)
1154 saved_regs_addr
[regnum
] =
1155 frame_addr
+ (regnum
- Y_REGNUM
) * SPARC_INTREG_SIZE
1156 - DUMMY_STACK_REG_BUF_SIZE
;
1158 frame_addr
= fi
->extra_info
->bottom
?
1159 fi
->extra_info
->bottom
: read_sp ();
1161 else if (fi
->extra_info
->flat
)
1163 CORE_ADDR func_start
;
1164 find_pc_partial_function (get_frame_pc (fi
), NULL
, &func_start
, NULL
);
1165 examine_prologue (func_start
, 0, fi
, saved_regs_addr
);
1167 /* Flat register window frame. */
1168 saved_regs_addr
[RP_REGNUM
] = fi
->extra_info
->pc_addr
;
1169 saved_regs_addr
[I7_REGNUM
] = fi
->extra_info
->fp_addr
;
1173 /* Normal frame. Just Local and In registers */
1174 frame_addr
= fi
->extra_info
->bottom
?
1175 fi
->extra_info
->bottom
: read_sp ();
1176 for (regnum
= L0_REGNUM
; regnum
< L0_REGNUM
+ 8; regnum
++)
1177 saved_regs_addr
[regnum
] =
1178 (frame_addr
+ (regnum
- L0_REGNUM
) * SPARC_INTREG_SIZE
1180 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+ 8; regnum
++)
1181 saved_regs_addr
[regnum
] =
1182 (frame_addr
+ (regnum
- I0_REGNUM
) * SPARC_INTREG_SIZE
1187 if (fi
->extra_info
->flat
)
1189 saved_regs_addr
[O7_REGNUM
] = fi
->extra_info
->pc_addr
;
1193 /* Pull off either the next frame pointer or the stack pointer */
1194 CORE_ADDR next_next_frame_addr
=
1195 (fi
->next
->extra_info
->bottom
?
1196 fi
->next
->extra_info
->bottom
: read_sp ());
1197 for (regnum
= O0_REGNUM
; regnum
< O0_REGNUM
+ 8; regnum
++)
1198 saved_regs_addr
[regnum
] =
1199 (next_next_frame_addr
1200 + (regnum
- O0_REGNUM
) * SPARC_INTREG_SIZE
1204 /* Otherwise, whatever we would get from ptrace(GETREGS) is accurate */
1205 /* FIXME -- should this adjust for the sparc64 offset? */
1206 saved_regs_addr
[SP_REGNUM
] = get_frame_base (fi
);
1209 /* Discard from the stack the innermost frame, restoring all saved registers.
1211 Note that the values stored in fsr by
1212 deprecated_get_frame_saved_regs are *in the context of the called
1213 frame*. What this means is that the i regs of fsr must be restored
1214 into the o regs of the (calling) frame that we pop into. We don't
1215 care about the output regs of the calling frame, since unless it's
1216 a dummy frame, it won't have any output regs in it.
1218 We never have to bother with %l (local) regs, since the called routine's
1219 locals get tossed, and the calling routine's locals are already saved
1222 /* Definitely see tm-sparc.h for more doc of the frame format here. */
1225 sparc_pop_frame (void)
1227 register struct frame_info
*frame
= get_current_frame ();
1228 register CORE_ADDR pc
;
1233 fsr
= alloca (NUM_REGS
* sizeof (CORE_ADDR
));
1234 raw_buffer
= alloca (REGISTER_BYTES
);
1235 sparc_frame_find_saved_regs (frame
, &fsr
[0]);
1238 if (fsr
[FP0_REGNUM
])
1240 read_memory (fsr
[FP0_REGNUM
], raw_buffer
, FP_REGISTER_BYTES
);
1241 deprecated_write_register_bytes (REGISTER_BYTE (FP0_REGNUM
),
1242 raw_buffer
, FP_REGISTER_BYTES
);
1244 if (!(GDB_TARGET_IS_SPARC64
))
1246 if (fsr
[FPS_REGNUM
])
1248 read_memory (fsr
[FPS_REGNUM
], raw_buffer
, SPARC_INTREG_SIZE
);
1249 deprecated_write_register_gen (FPS_REGNUM
, raw_buffer
);
1251 if (fsr
[CPS_REGNUM
])
1253 read_memory (fsr
[CPS_REGNUM
], raw_buffer
, SPARC_INTREG_SIZE
);
1254 deprecated_write_register_gen (CPS_REGNUM
, raw_buffer
);
1260 read_memory (fsr
[G1_REGNUM
], raw_buffer
, 7 * SPARC_INTREG_SIZE
);
1261 deprecated_write_register_bytes (REGISTER_BYTE (G1_REGNUM
), raw_buffer
,
1262 7 * SPARC_INTREG_SIZE
);
1265 if (frame
->extra_info
->flat
)
1267 /* Each register might or might not have been saved, need to test
1269 for (regnum
= L0_REGNUM
; regnum
< L0_REGNUM
+ 8; ++regnum
)
1271 write_register (regnum
, read_memory_integer (fsr
[regnum
],
1272 SPARC_INTREG_SIZE
));
1273 for (regnum
= I0_REGNUM
; regnum
< I0_REGNUM
+ 8; ++regnum
)
1275 write_register (regnum
, read_memory_integer (fsr
[regnum
],
1276 SPARC_INTREG_SIZE
));
1278 /* Handle all outs except stack pointer (o0-o5; o7). */
1279 for (regnum
= O0_REGNUM
; regnum
< O0_REGNUM
+ 6; ++regnum
)
1281 write_register (regnum
, read_memory_integer (fsr
[regnum
],
1282 SPARC_INTREG_SIZE
));
1283 if (fsr
[O0_REGNUM
+ 7])
1284 write_register (O0_REGNUM
+ 7,
1285 read_memory_integer (fsr
[O0_REGNUM
+ 7],
1286 SPARC_INTREG_SIZE
));
1288 write_sp (frame
->frame
);
1290 else if (fsr
[I0_REGNUM
])
1296 reg_temp
= alloca (SPARC_INTREG_SIZE
* 16);
1298 read_memory (fsr
[I0_REGNUM
], raw_buffer
, 8 * SPARC_INTREG_SIZE
);
1300 /* Get the ins and locals which we are about to restore. Just
1301 moving the stack pointer is all that is really needed, except
1302 store_inferior_registers is then going to write the ins and
1303 locals from the registers array, so we need to muck with the
1305 sp
= fsr
[SP_REGNUM
];
1307 if (GDB_TARGET_IS_SPARC64
&& (sp
& 1))
1310 read_memory (sp
, reg_temp
, SPARC_INTREG_SIZE
* 16);
1312 /* Restore the out registers.
1313 Among other things this writes the new stack pointer. */
1314 deprecated_write_register_bytes (REGISTER_BYTE (O0_REGNUM
), raw_buffer
,
1315 SPARC_INTREG_SIZE
* 8);
1317 deprecated_write_register_bytes (REGISTER_BYTE (L0_REGNUM
), reg_temp
,
1318 SPARC_INTREG_SIZE
* 16);
1321 if (!(GDB_TARGET_IS_SPARC64
))
1323 write_register (PS_REGNUM
,
1324 read_memory_integer (fsr
[PS_REGNUM
],
1325 REGISTER_RAW_SIZE (PS_REGNUM
)));
1328 write_register (Y_REGNUM
,
1329 read_memory_integer (fsr
[Y_REGNUM
],
1330 REGISTER_RAW_SIZE (Y_REGNUM
)));
1333 /* Explicitly specified PC (and maybe NPC) -- just restore them. */
1334 write_register (PC_REGNUM
,
1335 read_memory_integer (fsr
[PC_REGNUM
],
1336 REGISTER_RAW_SIZE (PC_REGNUM
)));
1337 if (fsr
[NPC_REGNUM
])
1338 write_register (NPC_REGNUM
,
1339 read_memory_integer (fsr
[NPC_REGNUM
],
1340 REGISTER_RAW_SIZE (NPC_REGNUM
)));
1342 else if (frame
->extra_info
->flat
)
1344 if (frame
->extra_info
->pc_addr
)
1345 pc
= PC_ADJUST ((CORE_ADDR
)
1346 read_memory_integer (frame
->extra_info
->pc_addr
,
1347 REGISTER_RAW_SIZE (PC_REGNUM
)));
1350 /* I think this happens only in the innermost frame, if so then
1351 it is a complicated way of saying
1352 "pc = read_register (O7_REGNUM);". */
1355 buf
= alloca (MAX_REGISTER_RAW_SIZE
);
1356 get_saved_register (buf
, 0, 0, frame
, O7_REGNUM
, 0);
1357 pc
= PC_ADJUST (extract_address
1358 (buf
, REGISTER_RAW_SIZE (O7_REGNUM
)));
1361 write_register (PC_REGNUM
, pc
);
1362 write_register (NPC_REGNUM
, pc
+ 4);
1364 else if (fsr
[I7_REGNUM
])
1366 /* Return address in %i7 -- adjust it, then restore PC and NPC from it */
1367 pc
= PC_ADJUST ((CORE_ADDR
) read_memory_integer (fsr
[I7_REGNUM
],
1368 SPARC_INTREG_SIZE
));
1369 write_register (PC_REGNUM
, pc
);
1370 write_register (NPC_REGNUM
, pc
+ 4);
1372 flush_cached_frames ();
1375 /* On the Sun 4 under SunOS, the compile will leave a fake insn which
1376 encodes the structure size being returned. If we detect such
1377 a fake insn, step past it. */
1380 sparc_pc_adjust (CORE_ADDR pc
)
1386 err
= target_read_memory (pc
+ 8, buf
, 4);
1387 insn
= extract_unsigned_integer (buf
, 4);
1388 if ((err
== 0) && (insn
& 0xffc00000) == 0)
1394 /* If pc is in a shared library trampoline, return its target.
1395 The SunOs 4.x linker rewrites the jump table entries for PIC
1396 compiled modules in the main executable to bypass the dynamic linker
1397 with jumps of the form
1400 and removes the corresponding jump table relocation entry in the
1401 dynamic relocations.
1402 find_solib_trampoline_target relies on the presence of the jump
1403 table relocation entry, so we have to detect these jump instructions
1407 sunos4_skip_trampoline_code (CORE_ADDR pc
)
1409 unsigned long insn1
;
1413 err
= target_read_memory (pc
, buf
, 4);
1414 insn1
= extract_unsigned_integer (buf
, 4);
1415 if (err
== 0 && (insn1
& 0xffc00000) == 0x03000000)
1417 unsigned long insn2
;
1419 err
= target_read_memory (pc
+ 4, buf
, 4);
1420 insn2
= extract_unsigned_integer (buf
, 4);
1421 if (err
== 0 && (insn2
& 0xffffe000) == 0x81c06000)
1423 CORE_ADDR target_pc
= (insn1
& 0x3fffff) << 10;
1424 int delta
= insn2
& 0x1fff;
1426 /* Sign extend the displacement. */
1429 return target_pc
+ delta
;
1432 return find_solib_trampoline_target (pc
);
1435 #ifdef USE_PROC_FS /* Target dependent support for /proc */
1437 /* The /proc interface divides the target machine's register set up into
1438 two different sets, the general register set (gregset) and the floating
1439 point register set (fpregset). For each set, there is an ioctl to get
1440 the current register set and another ioctl to set the current values.
1442 The actual structure passed through the ioctl interface is, of course,
1443 naturally machine dependent, and is different for each set of registers.
1444 For the sparc for example, the general register set is typically defined
1447 typedef int gregset_t[38];
1453 and the floating point set by:
1455 typedef struct prfpregset {
1458 double pr_dregs[16];
1463 u_char pr_q_entrysize;
1468 These routines provide the packing and unpacking of gregset_t and
1469 fpregset_t formatted data.
1474 /* Given a pointer to a general register set in /proc format (gregset_t *),
1475 unpack the register contents and supply them as gdb's idea of the current
1479 supply_gregset (gdb_gregset_t
*gregsetp
)
1481 prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
1482 int regi
, offset
= 0;
1484 /* If the host is 64-bit sparc, but the target is 32-bit sparc,
1485 then the gregset may contain 64-bit ints while supply_register
1486 is expecting 32-bit ints. Compensate. */
1487 if (sizeof (regp
[0]) == 8 && SPARC_INTREG_SIZE
== 4)
1490 /* GDB register numbers for Gn, On, Ln, In all match /proc reg numbers. */
1491 /* FIXME MVS: assumes the order of the first 32 elements... */
1492 for (regi
= G0_REGNUM
; regi
<= I7_REGNUM
; regi
++)
1494 supply_register (regi
, ((char *) (regp
+ regi
)) + offset
);
1497 /* These require a bit more care. */
1498 supply_register (PC_REGNUM
, ((char *) (regp
+ R_PC
)) + offset
);
1499 supply_register (NPC_REGNUM
, ((char *) (regp
+ R_nPC
)) + offset
);
1500 supply_register (Y_REGNUM
, ((char *) (regp
+ R_Y
)) + offset
);
1502 if (GDB_TARGET_IS_SPARC64
)
1505 supply_register (CCR_REGNUM
, ((char *) (regp
+ R_CCR
)) + offset
);
1507 supply_register (CCR_REGNUM
, NULL
);
1510 supply_register (FPRS_REGNUM
, ((char *) (regp
+ R_FPRS
)) + offset
);
1512 supply_register (FPRS_REGNUM
, NULL
);
1515 supply_register (ASI_REGNUM
, ((char *) (regp
+ R_ASI
)) + offset
);
1517 supply_register (ASI_REGNUM
, NULL
);
1523 supply_register (PS_REGNUM
, ((char *) (regp
+ R_PS
)) + offset
);
1525 supply_register (PS_REGNUM
, NULL
);
1528 /* For 64-bit hosts, R_WIM and R_TBR may not be defined.
1529 Steal R_ASI and R_FPRS, and hope for the best! */
1531 #if !defined (R_WIM) && defined (R_ASI)
1535 #if !defined (R_TBR) && defined (R_FPRS)
1536 #define R_TBR R_FPRS
1540 supply_register (WIM_REGNUM
, ((char *) (regp
+ R_WIM
)) + offset
);
1542 supply_register (WIM_REGNUM
, NULL
);
1546 supply_register (TBR_REGNUM
, ((char *) (regp
+ R_TBR
)) + offset
);
1548 supply_register (TBR_REGNUM
, NULL
);
1552 /* Fill inaccessible registers with zero. */
1553 if (GDB_TARGET_IS_SPARC64
)
1556 * don't know how to get value of any of the following:
1558 supply_register (VER_REGNUM
, NULL
);
1559 supply_register (TICK_REGNUM
, NULL
);
1560 supply_register (PIL_REGNUM
, NULL
);
1561 supply_register (PSTATE_REGNUM
, NULL
);
1562 supply_register (TSTATE_REGNUM
, NULL
);
1563 supply_register (TBA_REGNUM
, NULL
);
1564 supply_register (TL_REGNUM
, NULL
);
1565 supply_register (TT_REGNUM
, NULL
);
1566 supply_register (TPC_REGNUM
, NULL
);
1567 supply_register (TNPC_REGNUM
, NULL
);
1568 supply_register (WSTATE_REGNUM
, NULL
);
1569 supply_register (CWP_REGNUM
, NULL
);
1570 supply_register (CANSAVE_REGNUM
, NULL
);
1571 supply_register (CANRESTORE_REGNUM
, NULL
);
1572 supply_register (CLEANWIN_REGNUM
, NULL
);
1573 supply_register (OTHERWIN_REGNUM
, NULL
);
1574 supply_register (ASR16_REGNUM
, NULL
);
1575 supply_register (ASR17_REGNUM
, NULL
);
1576 supply_register (ASR18_REGNUM
, NULL
);
1577 supply_register (ASR19_REGNUM
, NULL
);
1578 supply_register (ASR20_REGNUM
, NULL
);
1579 supply_register (ASR21_REGNUM
, NULL
);
1580 supply_register (ASR22_REGNUM
, NULL
);
1581 supply_register (ASR23_REGNUM
, NULL
);
1582 supply_register (ASR24_REGNUM
, NULL
);
1583 supply_register (ASR25_REGNUM
, NULL
);
1584 supply_register (ASR26_REGNUM
, NULL
);
1585 supply_register (ASR27_REGNUM
, NULL
);
1586 supply_register (ASR28_REGNUM
, NULL
);
1587 supply_register (ASR29_REGNUM
, NULL
);
1588 supply_register (ASR30_REGNUM
, NULL
);
1589 supply_register (ASR31_REGNUM
, NULL
);
1590 supply_register (ICC_REGNUM
, NULL
);
1591 supply_register (XCC_REGNUM
, NULL
);
1595 supply_register (CPS_REGNUM
, NULL
);
1600 fill_gregset (gdb_gregset_t
*gregsetp
, int regno
)
1602 prgreg_t
*regp
= (prgreg_t
*) gregsetp
;
1603 int regi
, offset
= 0;
1605 /* If the host is 64-bit sparc, but the target is 32-bit sparc,
1606 then the gregset may contain 64-bit ints while supply_register
1607 is expecting 32-bit ints. Compensate. */
1608 if (sizeof (regp
[0]) == 8 && SPARC_INTREG_SIZE
== 4)
1611 for (regi
= 0; regi
<= R_I7
; regi
++)
1612 if ((regno
== -1) || (regno
== regi
))
1613 deprecated_read_register_gen (regi
, (char *) (regp
+ regi
) + offset
);
1615 if ((regno
== -1) || (regno
== PC_REGNUM
))
1616 deprecated_read_register_gen (PC_REGNUM
, (char *) (regp
+ R_PC
) + offset
);
1618 if ((regno
== -1) || (regno
== NPC_REGNUM
))
1619 deprecated_read_register_gen (NPC_REGNUM
, (char *) (regp
+ R_nPC
) + offset
);
1621 if ((regno
== -1) || (regno
== Y_REGNUM
))
1622 deprecated_read_register_gen (Y_REGNUM
, (char *) (regp
+ R_Y
) + offset
);
1624 if (GDB_TARGET_IS_SPARC64
)
1627 if (regno
== -1 || regno
== CCR_REGNUM
)
1628 deprecated_read_register_gen (CCR_REGNUM
, ((char *) (regp
+ R_CCR
)) + offset
);
1631 if (regno
== -1 || regno
== FPRS_REGNUM
)
1632 deprecated_read_register_gen (FPRS_REGNUM
, ((char *) (regp
+ R_FPRS
)) + offset
);
1635 if (regno
== -1 || regno
== ASI_REGNUM
)
1636 deprecated_read_register_gen (ASI_REGNUM
, ((char *) (regp
+ R_ASI
)) + offset
);
1642 if (regno
== -1 || regno
== PS_REGNUM
)
1643 deprecated_read_register_gen (PS_REGNUM
, ((char *) (regp
+ R_PS
)) + offset
);
1646 /* For 64-bit hosts, R_WIM and R_TBR may not be defined.
1647 Steal R_ASI and R_FPRS, and hope for the best! */
1649 #if !defined (R_WIM) && defined (R_ASI)
1653 #if !defined (R_TBR) && defined (R_FPRS)
1654 #define R_TBR R_FPRS
1658 if (regno
== -1 || regno
== WIM_REGNUM
)
1659 deprecated_read_register_gen (WIM_REGNUM
, ((char *) (regp
+ R_WIM
)) + offset
);
1661 if (regno
== -1 || regno
== WIM_REGNUM
)
1662 deprecated_read_register_gen (WIM_REGNUM
, NULL
);
1666 if (regno
== -1 || regno
== TBR_REGNUM
)
1667 deprecated_read_register_gen (TBR_REGNUM
, ((char *) (regp
+ R_TBR
)) + offset
);
1669 if (regno
== -1 || regno
== TBR_REGNUM
)
1670 deprecated_read_register_gen (TBR_REGNUM
, NULL
);
1675 /* Given a pointer to a floating point register set in /proc format
1676 (fpregset_t *), unpack the register contents and supply them as gdb's
1677 idea of the current floating point register values. */
1680 supply_fpregset (gdb_fpregset_t
*fpregsetp
)
1688 for (regi
= FP0_REGNUM
; regi
< FP_MAX_REGNUM
; regi
++)
1690 from
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
- FP0_REGNUM
];
1691 supply_register (regi
, from
);
1694 if (GDB_TARGET_IS_SPARC64
)
1697 * don't know how to get value of the following.
1699 supply_register (FSR_REGNUM
, NULL
); /* zero it out for now */
1700 supply_register (FCC0_REGNUM
, NULL
);
1701 supply_register (FCC1_REGNUM
, NULL
); /* don't know how to get value */
1702 supply_register (FCC2_REGNUM
, NULL
); /* don't know how to get value */
1703 supply_register (FCC3_REGNUM
, NULL
); /* don't know how to get value */
1707 supply_register (FPS_REGNUM
, (char *) &(fpregsetp
->pr_fsr
));
1711 /* Given a pointer to a floating point register set in /proc format
1712 (fpregset_t *), update the register specified by REGNO from gdb's idea
1713 of the current floating point register set. If REGNO is -1, update
1715 /* This will probably need some changes for sparc64. */
1718 fill_fpregset (gdb_fpregset_t
*fpregsetp
, int regno
)
1727 for (regi
= FP0_REGNUM
; regi
< FP_MAX_REGNUM
; regi
++)
1729 if ((regno
== -1) || (regno
== regi
))
1731 from
= (char *) &deprecated_registers
[REGISTER_BYTE (regi
)];
1732 to
= (char *) &fpregsetp
->pr_fr
.pr_regs
[regi
- FP0_REGNUM
];
1733 memcpy (to
, from
, REGISTER_RAW_SIZE (regi
));
1737 if (!(GDB_TARGET_IS_SPARC64
)) /* FIXME: does Sparc64 have this register? */
1738 if ((regno
== -1) || (regno
== FPS_REGNUM
))
1740 from
= (char *)&deprecated_registers
[REGISTER_BYTE (FPS_REGNUM
)];
1741 to
= (char *) &fpregsetp
->pr_fsr
;
1742 memcpy (to
, from
, REGISTER_RAW_SIZE (FPS_REGNUM
));
1746 #endif /* USE_PROC_FS */
1748 /* Because of Multi-arch, GET_LONGJMP_TARGET is always defined. So test
1749 for a definition of JB_PC. */
1752 /* Figure out where the longjmp will land. We expect that we have just entered
1753 longjmp and haven't yet setup the stack frame, so the args are still in the
1754 output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
1755 extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
1756 This routine returns true on success */
1759 get_longjmp_target (CORE_ADDR
*pc
)
1762 #define LONGJMP_TARGET_SIZE 4
1763 char buf
[LONGJMP_TARGET_SIZE
];
1765 jb_addr
= read_register (O0_REGNUM
);
1767 if (target_read_memory (jb_addr
+ JB_PC
* JB_ELEMENT_SIZE
, buf
,
1768 LONGJMP_TARGET_SIZE
))
1771 *pc
= extract_address (buf
, LONGJMP_TARGET_SIZE
);
1775 #endif /* GET_LONGJMP_TARGET */
1777 #ifdef STATIC_TRANSFORM_NAME
1778 /* SunPRO (3.0 at least), encodes the static variables. This is not
1779 related to C++ mangling, it is done for C too. */
1782 sunpro_static_transform_name (char *name
)
1787 /* For file-local statics there will be a dollar sign, a bunch
1788 of junk (the contents of which match a string given in the
1789 N_OPT), a period and the name. For function-local statics
1790 there will be a bunch of junk (which seems to change the
1791 second character from 'A' to 'B'), a period, the name of the
1792 function, and the name. So just skip everything before the
1794 p
= strrchr (name
, '.');
1800 #endif /* STATIC_TRANSFORM_NAME */
1803 /* Utilities for printing registers.
1804 Page numbers refer to the SPARC Architecture Manual. */
1806 static void dump_ccreg (char *, int);
1809 dump_ccreg (char *reg
, int val
)
1812 printf_unfiltered ("%s:%s,%s,%s,%s", reg
,
1813 val
& 8 ? "N" : "NN",
1814 val
& 4 ? "Z" : "NZ",
1815 val
& 2 ? "O" : "NO",
1816 val
& 1 ? "C" : "NC");
1820 decode_asi (int val
)
1826 return "ASI_NUCLEUS";
1828 return "ASI_NUCLEUS_LITTLE";
1830 return "ASI_AS_IF_USER_PRIMARY";
1832 return "ASI_AS_IF_USER_SECONDARY";
1834 return "ASI_AS_IF_USER_PRIMARY_LITTLE";
1836 return "ASI_AS_IF_USER_SECONDARY_LITTLE";
1838 return "ASI_PRIMARY";
1840 return "ASI_SECONDARY";
1842 return "ASI_PRIMARY_NOFAULT";
1844 return "ASI_SECONDARY_NOFAULT";
1846 return "ASI_PRIMARY_LITTLE";
1848 return "ASI_SECONDARY_LITTLE";
1850 return "ASI_PRIMARY_NOFAULT_LITTLE";
1852 return "ASI_SECONDARY_NOFAULT_LITTLE";
1858 /* PRINT_REGISTER_HOOK routine.
1859 Pretty print various registers. */
1860 /* FIXME: Would be nice if this did some fancy things for 32 bit sparc. */
1863 sparc_print_register_hook (int regno
)
1867 /* Handle double/quad versions of lower 32 fp regs. */
1868 if (regno
>= FP0_REGNUM
&& regno
< FP0_REGNUM
+ 32
1869 && (regno
& 1) == 0)
1873 if (frame_register_read (deprecated_selected_frame
, regno
, value
)
1874 && frame_register_read (deprecated_selected_frame
, regno
+ 1, value
+ 4))
1876 printf_unfiltered ("\t");
1877 print_floating (value
, builtin_type_double
, gdb_stdout
);
1879 #if 0 /* FIXME: gdb doesn't handle long doubles */
1880 if ((regno
& 3) == 0)
1882 if (frame_register_read (deprecated_selected_frame
, regno
+ 2, value
+ 8)
1883 && frame_register_read (deprecated_selected_frame
, regno
+ 3, value
+ 12))
1885 printf_unfiltered ("\t");
1886 print_floating (value
, builtin_type_long_double
, gdb_stdout
);
1893 #if 0 /* FIXME: gdb doesn't handle long doubles */
1894 /* Print upper fp regs as long double if appropriate. */
1895 if (regno
>= FP0_REGNUM
+ 32 && regno
< FP_MAX_REGNUM
1896 /* We test for even numbered regs and not a multiple of 4 because
1897 the upper fp regs are recorded as doubles. */
1898 && (regno
& 1) == 0)
1902 if (frame_register_read (deprecated_selected_frame
, regno
, value
)
1903 && frame_register_read (deprecated_selected_frame
, regno
+ 1, value
+ 8))
1905 printf_unfiltered ("\t");
1906 print_floating (value
, builtin_type_long_double
, gdb_stdout
);
1912 /* FIXME: Some of these are priviledged registers.
1913 Not sure how they should be handled. */
1915 #define BITS(n, mask) ((int) (((val) >> (n)) & (mask)))
1917 val
= read_register (regno
);
1920 if (GDB_TARGET_IS_SPARC64
)
1924 printf_unfiltered ("\t");
1925 dump_ccreg ("xcc", val
>> 4);
1926 printf_unfiltered (", ");
1927 dump_ccreg ("icc", val
& 15);
1930 printf ("\tfef:%d, du:%d, dl:%d",
1931 BITS (2, 1), BITS (1, 1), BITS (0, 1));
1935 static char *fcc
[4] =
1936 {"=", "<", ">", "?"};
1937 static char *rd
[4] =
1938 {"N", "0", "+", "-"};
1939 /* Long, but I'd rather leave it as is and use a wide screen. */
1940 printf_filtered ("\t0:%s, 1:%s, 2:%s, 3:%s, rd:%s, tem:%d, ",
1941 fcc
[BITS (10, 3)], fcc
[BITS (32, 3)],
1942 fcc
[BITS (34, 3)], fcc
[BITS (36, 3)],
1943 rd
[BITS (30, 3)], BITS (23, 31));
1944 printf_filtered ("ns:%d, ver:%d, ftt:%d, qne:%d, aexc:%d, cexc:%d",
1945 BITS (22, 1), BITS (17, 7), BITS (14, 7),
1946 BITS (13, 1), BITS (5, 31), BITS (0, 31));
1951 char *asi
= decode_asi (val
);
1953 printf ("\t%s", asi
);
1957 printf ("\tmanuf:%d, impl:%d, mask:%d, maxtl:%d, maxwin:%d",
1958 BITS (48, 0xffff), BITS (32, 0xffff),
1959 BITS (24, 0xff), BITS (8, 0xff), BITS (0, 31));
1963 static char *mm
[4] =
1964 {"tso", "pso", "rso", "?"};
1965 printf_filtered ("\tcle:%d, tle:%d, mm:%s, red:%d, ",
1966 BITS (9, 1), BITS (8, 1),
1967 mm
[BITS (6, 3)], BITS (5, 1));
1968 printf_filtered ("pef:%d, am:%d, priv:%d, ie:%d, ag:%d",
1969 BITS (4, 1), BITS (3, 1), BITS (2, 1),
1970 BITS (1, 1), BITS (0, 1));
1974 /* FIXME: print all 4? */
1977 /* FIXME: print all 4? */
1980 /* FIXME: print all 4? */
1983 /* FIXME: print all 4? */
1986 printf ("\tother:%d, normal:%d", BITS (3, 7), BITS (0, 7));
1989 printf ("\t%d", BITS (0, 31));
1991 case CANSAVE_REGNUM
:
1992 printf ("\t%-2d before spill", BITS (0, 31));
1994 case CANRESTORE_REGNUM
:
1995 printf ("\t%-2d before fill", BITS (0, 31));
1997 case CLEANWIN_REGNUM
:
1998 printf ("\t%-2d before clean", BITS (0, 31));
2000 case OTHERWIN_REGNUM
:
2001 printf ("\t%d", BITS (0, 31));
2008 printf ("\ticc:%c%c%c%c, pil:%d, s:%d, ps:%d, et:%d, cwp:%d",
2009 BITS (23, 1) ? 'N' : '-', BITS (22, 1) ? 'Z' : '-',
2010 BITS (21, 1) ? 'V' : '-', BITS (20, 1) ? 'C' : '-',
2011 BITS (8, 15), BITS (7, 1), BITS (6, 1), BITS (5, 1),
2016 static char *fcc
[4] =
2017 {"=", "<", ">", "?"};
2018 static char *rd
[4] =
2019 {"N", "0", "+", "-"};
2020 /* Long, but I'd rather leave it as is and use a wide screen. */
2021 printf ("\trd:%s, tem:%d, ns:%d, ver:%d, ftt:%d, qne:%d, "
2022 "fcc:%s, aexc:%d, cexc:%d",
2023 rd
[BITS (30, 3)], BITS (23, 31), BITS (22, 1), BITS (17, 7),
2024 BITS (14, 7), BITS (13, 1), fcc
[BITS (10, 3)], BITS (5, 31),
2034 sparc_print_registers (struct gdbarch
*gdbarch
,
2035 struct ui_file
*file
,
2036 struct frame_info
*frame
,
2037 int regnum
, int print_all
,
2038 void (*print_register_hook
) (int))
2041 const int numregs
= NUM_REGS
+ NUM_PSEUDO_REGS
;
2042 char *raw_buffer
= alloca (MAX_REGISTER_RAW_SIZE
);
2043 char *virtual_buffer
= alloca (MAX_REGISTER_VIRTUAL_SIZE
);
2045 for (i
= 0; i
< numregs
; i
++)
2047 /* Decide between printing all regs, non-float / vector regs, or
2053 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (i
)) == TYPE_CODE_FLT
)
2055 if (TYPE_VECTOR (REGISTER_VIRTUAL_TYPE (i
)))
2065 /* If the register name is empty, it is undefined for this
2066 processor, so don't display anything. */
2067 if (REGISTER_NAME (i
) == NULL
|| *(REGISTER_NAME (i
)) == '\0')
2070 fputs_filtered (REGISTER_NAME (i
), file
);
2071 print_spaces_filtered (15 - strlen (REGISTER_NAME (i
)), file
);
2073 /* Get the data in raw format. */
2074 if (! frame_register_read (frame
, i
, raw_buffer
))
2076 fprintf_filtered (file
, "*value not available*\n");
2080 /* FIXME: cagney/2002-08-03: This code shouldn't be necessary.
2081 The function frame_register_read() should have returned the
2082 pre-cooked register so no conversion is necessary. */
2083 /* Convert raw data to virtual format if necessary. */
2084 if (REGISTER_CONVERTIBLE (i
))
2086 REGISTER_CONVERT_TO_VIRTUAL (i
, REGISTER_VIRTUAL_TYPE (i
),
2087 raw_buffer
, virtual_buffer
);
2091 memcpy (virtual_buffer
, raw_buffer
,
2092 REGISTER_VIRTUAL_SIZE (i
));
2095 /* If virtual format is floating, print it that way, and in raw
2097 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (i
)) == TYPE_CODE_FLT
)
2101 val_print (REGISTER_VIRTUAL_TYPE (i
), virtual_buffer
, 0, 0,
2102 file
, 0, 1, 0, Val_pretty_default
);
2104 fprintf_filtered (file
, "\t(raw 0x");
2105 for (j
= 0; j
< REGISTER_RAW_SIZE (i
); j
++)
2108 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2111 idx
= REGISTER_RAW_SIZE (i
) - 1 - j
;
2112 fprintf_filtered (file
, "%02x", (unsigned char) raw_buffer
[idx
]);
2114 fprintf_filtered (file
, ")");
2118 /* Print the register in hex. */
2119 val_print (REGISTER_VIRTUAL_TYPE (i
), virtual_buffer
, 0, 0,
2120 file
, 'x', 1, 0, Val_pretty_default
);
2121 /* If not a vector register, print it also according to its
2123 if (TYPE_VECTOR (REGISTER_VIRTUAL_TYPE (i
)) == 0)
2125 fprintf_filtered (file
, "\t");
2126 val_print (REGISTER_VIRTUAL_TYPE (i
), virtual_buffer
, 0, 0,
2127 file
, 0, 1, 0, Val_pretty_default
);
2131 /* Some sparc specific info. */
2132 if (print_register_hook
!= NULL
)
2133 print_register_hook (i
);
2135 fprintf_filtered (file
, "\n");
2140 sparc_print_registers_info (struct gdbarch
*gdbarch
,
2141 struct ui_file
*file
,
2142 struct frame_info
*frame
,
2143 int regnum
, int print_all
)
2145 sparc_print_registers (gdbarch
, file
, frame
, regnum
, print_all
,
2146 sparc_print_register_hook
);
2150 sparc_do_registers_info (int regnum
, int all
)
2152 sparc_print_registers_info (current_gdbarch
, gdb_stdout
, deprecated_selected_frame
,
2157 sparclet_print_registers_info (struct gdbarch
*gdbarch
,
2158 struct ui_file
*file
,
2159 struct frame_info
*frame
,
2160 int regnum
, int print_all
)
2162 sparc_print_registers (gdbarch
, file
, frame
, regnum
, print_all
, NULL
);
2166 sparclet_do_registers_info (int regnum
, int all
)
2168 sparclet_print_registers_info (current_gdbarch
, gdb_stdout
,
2169 deprecated_selected_frame
, regnum
, all
);
2174 gdb_print_insn_sparc (bfd_vma memaddr
, disassemble_info
*info
)
2176 /* It's necessary to override mach again because print_insn messes it up. */
2177 info
->mach
= TARGET_ARCHITECTURE
->mach
;
2178 return print_insn_sparc (memaddr
, info
);
2181 /* The SPARC passes the arguments on the stack; arguments smaller
2182 than an int are promoted to an int. The first 6 words worth of
2183 args are also passed in registers o0 - o5. */
2186 sparc32_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
2187 int struct_return
, CORE_ADDR struct_addr
)
2190 int accumulate_size
= 0;
2197 struct sparc_arg
*sparc_args
=
2198 (struct sparc_arg
*) alloca (nargs
* sizeof (struct sparc_arg
));
2199 struct sparc_arg
*m_arg
;
2201 /* Promote arguments if necessary, and calculate their stack offsets
2203 for (i
= 0, m_arg
= sparc_args
; i
< nargs
; i
++, m_arg
++)
2205 struct value
*arg
= args
[i
];
2206 struct type
*arg_type
= check_typedef (VALUE_TYPE (arg
));
2207 /* Cast argument to long if necessary as the compiler does it too. */
2208 switch (TYPE_CODE (arg_type
))
2211 case TYPE_CODE_BOOL
:
2212 case TYPE_CODE_CHAR
:
2213 case TYPE_CODE_RANGE
:
2214 case TYPE_CODE_ENUM
:
2215 if (TYPE_LENGTH (arg_type
) < TYPE_LENGTH (builtin_type_long
))
2217 arg_type
= builtin_type_long
;
2218 arg
= value_cast (arg_type
, arg
);
2224 m_arg
->len
= TYPE_LENGTH (arg_type
);
2225 m_arg
->offset
= accumulate_size
;
2226 accumulate_size
= (accumulate_size
+ m_arg
->len
+ 3) & ~3;
2227 m_arg
->contents
= VALUE_CONTENTS (arg
);
2230 /* Make room for the arguments on the stack. */
2231 accumulate_size
+= CALL_DUMMY_STACK_ADJUST
;
2232 sp
= ((sp
- accumulate_size
) & ~7) + CALL_DUMMY_STACK_ADJUST
;
2234 /* `Push' arguments on the stack. */
2235 for (i
= 0, oregnum
= 0, m_arg
= sparc_args
;
2239 write_memory (sp
+ m_arg
->offset
, m_arg
->contents
, m_arg
->len
);
2241 j
< m_arg
->len
&& oregnum
< 6;
2242 j
+= SPARC_INTREG_SIZE
, oregnum
++)
2243 deprecated_write_register_gen (O0_REGNUM
+ oregnum
, m_arg
->contents
+ j
);
2250 /* Extract from an array REGBUF containing the (raw) register state
2251 a function return value of type TYPE, and copy that, in virtual format,
2255 sparc32_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
2257 int typelen
= TYPE_LENGTH (type
);
2258 int regsize
= REGISTER_RAW_SIZE (O0_REGNUM
);
2260 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2261 memcpy (valbuf
, ®buf
[REGISTER_BYTE (FP0_REGNUM
)], typelen
);
2264 ®buf
[O0_REGNUM
* regsize
+
2266 || TARGET_BYTE_ORDER
== BFD_ENDIAN_LITTLE
? 0
2267 : regsize
- typelen
)],
2272 /* Write into appropriate registers a function return value
2273 of type TYPE, given in virtual format. On SPARCs with FPUs,
2274 float values are returned in %f0 (and %f1). In all other cases,
2275 values are returned in register %o0. */
2278 sparc_store_return_value (struct type
*type
, char *valbuf
)
2283 buffer
= alloca (MAX_REGISTER_RAW_SIZE
);
2285 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2286 /* Floating-point values are returned in the register pair */
2287 /* formed by %f0 and %f1 (doubles are, anyway). */
2290 /* Other values are returned in register %o0. */
2293 /* Add leading zeros to the value. */
2294 if (TYPE_LENGTH (type
) < REGISTER_RAW_SIZE (regno
))
2296 memset (buffer
, 0, REGISTER_RAW_SIZE (regno
));
2297 memcpy (buffer
+ REGISTER_RAW_SIZE (regno
) - TYPE_LENGTH (type
), valbuf
,
2298 TYPE_LENGTH (type
));
2299 deprecated_write_register_gen (regno
, buffer
);
2302 deprecated_write_register_bytes (REGISTER_BYTE (regno
), valbuf
,
2303 TYPE_LENGTH (type
));
2307 sparclet_store_return_value (struct type
*type
, char *valbuf
)
2309 /* Other values are returned in register %o0. */
2310 deprecated_write_register_bytes (REGISTER_BYTE (O0_REGNUM
), valbuf
,
2311 TYPE_LENGTH (type
));
2315 #ifndef CALL_DUMMY_CALL_OFFSET
2316 #define CALL_DUMMY_CALL_OFFSET \
2317 (gdbarch_tdep (current_gdbarch)->call_dummy_call_offset)
2318 #endif /* CALL_DUMMY_CALL_OFFSET */
2320 /* Insert the function address into a call dummy instruction sequence
2323 For structs and unions, if the function was compiled with Sun cc,
2324 it expects 'unimp' after the call. But gcc doesn't use that
2325 (twisted) convention. So leave a nop there for gcc (FIX_CALL_DUMMY
2326 can assume it is operating on a pristine CALL_DUMMY, not one that
2327 has already been customized for a different function). */
2330 sparc_fix_call_dummy (char *dummy
, CORE_ADDR pc
, CORE_ADDR fun
,
2331 struct type
*value_type
, int using_gcc
)
2335 /* Store the relative adddress of the target function into the
2336 'call' instruction. */
2337 store_unsigned_integer (dummy
+ CALL_DUMMY_CALL_OFFSET
, 4,
2339 | (((fun
- (pc
+ CALL_DUMMY_CALL_OFFSET
)) >> 2)
2342 /* If the called function returns an aggregate value, fill in the UNIMP
2343 instruction containing the size of the returned aggregate return value,
2344 which follows the call instruction.
2345 For details see the SPARC Architecture Manual Version 8, Appendix D.3.
2347 Adjust the call_dummy_breakpoint_offset for the bp_call_dummy breakpoint
2348 to the proper address in the call dummy, so that `finish' after a stop
2349 in a call dummy works.
2350 Tweeking current_gdbarch is not an optimal solution, but the call to
2351 sparc_fix_call_dummy is immediately followed by a call to run_stack_dummy,
2352 which is the only function where dummy_breakpoint_offset is actually
2353 used, if it is non-zero. */
2354 if (TYPE_CODE (value_type
) == TYPE_CODE_STRUCT
2355 || TYPE_CODE (value_type
) == TYPE_CODE_UNION
)
2357 store_unsigned_integer (dummy
+ CALL_DUMMY_CALL_OFFSET
+ 8, 4,
2358 TYPE_LENGTH (value_type
) & 0x1fff);
2359 set_gdbarch_call_dummy_breakpoint_offset (current_gdbarch
, 0x30);
2362 set_gdbarch_call_dummy_breakpoint_offset (current_gdbarch
, 0x2c);
2364 if (!(GDB_TARGET_IS_SPARC64
))
2366 /* If this is not a simulator target, change the first four
2367 instructions of the call dummy to NOPs. Those instructions
2368 include a 'save' instruction and are designed to work around
2369 problems with register window flushing in the simulator. */
2371 if (strcmp (target_shortname
, "sim") != 0)
2373 for (i
= 0; i
< 4; i
++)
2374 store_unsigned_integer (dummy
+ (i
* 4), 4, 0x01000000);
2378 /* If this is a bi-endian target, GDB has written the call dummy
2379 in little-endian order. We must byte-swap it back to big-endian. */
2382 for (i
= 0; i
< CALL_DUMMY_LENGTH
; i
+= 4)
2384 char tmp
= dummy
[i
];
2385 dummy
[i
] = dummy
[i
+ 3];
2388 dummy
[i
+ 1] = dummy
[i
+ 2];
2395 /* Set target byte order based on machine type. */
2398 sparc_target_architecture_hook (const bfd_arch_info_type
*ap
)
2402 if (ap
->mach
== bfd_mach_sparc_sparclite_le
)
2404 target_byte_order
= BFD_ENDIAN_LITTLE
;
2414 * Module "constructor" function.
2417 static struct gdbarch
* sparc_gdbarch_init (struct gdbarch_info info
,
2418 struct gdbarch_list
*arches
);
2419 static void sparc_dump_tdep (struct gdbarch
*, struct ui_file
*);
2422 _initialize_sparc_tdep (void)
2424 /* Hook us into the gdbarch mechanism. */
2425 gdbarch_register (bfd_arch_sparc
, sparc_gdbarch_init
, sparc_dump_tdep
);
2427 tm_print_insn
= gdb_print_insn_sparc
;
2428 tm_print_insn_info
.mach
= TM_PRINT_INSN_MACH
; /* Selects sparc/sparclite */
2429 target_architecture_hook
= sparc_target_architecture_hook
;
2432 /* Compensate for stack bias. Note that we currently don't handle
2433 mixed 32/64 bit code. */
2436 sparc64_read_sp (void)
2438 CORE_ADDR sp
= read_register (SP_REGNUM
);
2446 sparc64_read_fp (void)
2448 CORE_ADDR fp
= read_register (FP_REGNUM
);
2456 sparc64_write_sp (CORE_ADDR val
)
2458 CORE_ADDR oldsp
= read_register (SP_REGNUM
);
2460 write_register (SP_REGNUM
, val
- 2047);
2462 write_register (SP_REGNUM
, val
);
2465 /* The SPARC 64 ABI passes floating-point arguments in FP0 to FP31,
2466 and all other arguments in O0 to O5. They are also copied onto
2467 the stack in the correct places. Apparently (empirically),
2468 structs of less than 16 bytes are passed member-by-member in
2469 separate registers, but I am unable to figure out the algorithm.
2470 Some members go in floating point regs, but I don't know which.
2472 FIXME: Handle small structs (less than 16 bytes containing floats).
2474 The counting regimen for using both integer and FP registers
2475 for argument passing is rather odd -- a single counter is used
2476 for both; this means that if the arguments alternate between
2477 int and float, we will waste every other register of both types. */
2480 sparc64_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
2481 int struct_return
, CORE_ADDR struct_retaddr
)
2483 int i
, j
, register_counter
= 0;
2485 struct type
*sparc_intreg_type
=
2486 TYPE_LENGTH (builtin_type_long
) == SPARC_INTREG_SIZE
?
2487 builtin_type_long
: builtin_type_long_long
;
2489 sp
= (sp
& ~(((unsigned long) SPARC_INTREG_SIZE
) - 1UL));
2491 /* Figure out how much space we'll need. */
2492 for (i
= nargs
- 1; i
>= 0; i
--)
2494 int len
= TYPE_LENGTH (check_typedef (VALUE_TYPE (args
[i
])));
2495 struct value
*copyarg
= args
[i
];
2498 if (copylen
< SPARC_INTREG_SIZE
)
2500 copyarg
= value_cast (sparc_intreg_type
, copyarg
);
2501 copylen
= SPARC_INTREG_SIZE
;
2510 /* if STRUCT_RETURN, then first argument is the struct return location. */
2512 write_register (O0_REGNUM
+ register_counter
++, struct_retaddr
);
2514 /* Now write the arguments onto the stack, while writing FP
2515 arguments into the FP registers, and other arguments into the
2516 first six 'O' registers. */
2518 for (i
= 0; i
< nargs
; i
++)
2520 int len
= TYPE_LENGTH (check_typedef (VALUE_TYPE (args
[i
])));
2521 struct value
*copyarg
= args
[i
];
2522 enum type_code typecode
= TYPE_CODE (VALUE_TYPE (args
[i
]));
2525 if (typecode
== TYPE_CODE_INT
||
2526 typecode
== TYPE_CODE_BOOL
||
2527 typecode
== TYPE_CODE_CHAR
||
2528 typecode
== TYPE_CODE_RANGE
||
2529 typecode
== TYPE_CODE_ENUM
)
2530 if (len
< SPARC_INTREG_SIZE
)
2532 /* Small ints will all take up the size of one intreg on
2534 copyarg
= value_cast (sparc_intreg_type
, copyarg
);
2535 copylen
= SPARC_INTREG_SIZE
;
2538 write_memory (tempsp
, VALUE_CONTENTS (copyarg
), copylen
);
2541 /* Corner case: Structs consisting of a single float member are floats.
2542 * FIXME! I don't know about structs containing multiple floats!
2543 * Structs containing mixed floats and ints are even more weird.
2548 /* Separate float args from all other args. */
2549 if (typecode
== TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2551 if (register_counter
< 16)
2553 /* This arg gets copied into a FP register. */
2557 case 4: /* Single-precision (float) */
2558 fpreg
= FP0_REGNUM
+ 2 * register_counter
+ 1;
2559 register_counter
+= 1;
2561 case 8: /* Double-precision (double) */
2562 fpreg
= FP0_REGNUM
+ 2 * register_counter
;
2563 register_counter
+= 1;
2565 case 16: /* Quad-precision (long double) */
2566 fpreg
= FP0_REGNUM
+ 2 * register_counter
;
2567 register_counter
+= 2;
2570 internal_error (__FILE__
, __LINE__
, "bad switch");
2572 deprecated_write_register_bytes (REGISTER_BYTE (fpreg
),
2573 VALUE_CONTENTS (args
[i
]),
2577 else /* all other args go into the first six 'o' registers */
2580 j
< len
&& register_counter
< 6;
2581 j
+= SPARC_INTREG_SIZE
)
2583 int oreg
= O0_REGNUM
+ register_counter
;
2585 deprecated_write_register_gen (oreg
, VALUE_CONTENTS (copyarg
) + j
);
2586 register_counter
+= 1;
2593 /* Values <= 32 bytes are returned in o0-o3 (floating-point values are
2594 returned in f0-f3). */
2597 sp64_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
,
2600 int typelen
= TYPE_LENGTH (type
);
2601 int regsize
= REGISTER_RAW_SIZE (O0_REGNUM
);
2603 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2605 memcpy (valbuf
, ®buf
[REGISTER_BYTE (FP0_REGNUM
)], typelen
);
2609 if (TYPE_CODE (type
) != TYPE_CODE_STRUCT
2610 || (TYPE_LENGTH (type
) > 32))
2613 ®buf
[O0_REGNUM
* regsize
+
2614 (typelen
>= regsize
? 0 : regsize
- typelen
)],
2620 char *o0
= ®buf
[O0_REGNUM
* regsize
];
2621 char *f0
= ®buf
[FP0_REGNUM
* regsize
];
2624 for (x
= 0; x
< TYPE_NFIELDS (type
); x
++)
2626 struct field
*f
= &TYPE_FIELDS (type
)[x
];
2627 /* FIXME: We may need to handle static fields here. */
2628 int whichreg
= (f
->loc
.bitpos
+ bitoffset
) / 32;
2629 int remainder
= ((f
->loc
.bitpos
+ bitoffset
) % 32) / 8;
2630 int where
= (f
->loc
.bitpos
+ bitoffset
) / 8;
2631 int size
= TYPE_LENGTH (f
->type
);
2632 int typecode
= TYPE_CODE (f
->type
);
2634 if (typecode
== TYPE_CODE_STRUCT
)
2636 sp64_extract_return_value (f
->type
,
2639 bitoffset
+ f
->loc
.bitpos
);
2641 else if (typecode
== TYPE_CODE_FLT
&& SPARC_HAS_FPU
)
2643 memcpy (valbuf
+ where
, &f0
[whichreg
* 4] + remainder
, size
);
2647 memcpy (valbuf
+ where
, &o0
[whichreg
* 4] + remainder
, size
);
2654 sparc64_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
2656 sp64_extract_return_value (type
, regbuf
, valbuf
, 0);
2660 sparclet_extract_return_value (struct type
*type
,
2664 regbuf
+= REGISTER_RAW_SIZE (O0_REGNUM
) * 8;
2665 if (TYPE_LENGTH (type
) < REGISTER_RAW_SIZE (O0_REGNUM
))
2666 regbuf
+= REGISTER_RAW_SIZE (O0_REGNUM
) - TYPE_LENGTH (type
);
2668 memcpy ((void *) valbuf
, regbuf
, TYPE_LENGTH (type
));
2673 sparc32_stack_align (CORE_ADDR addr
)
2675 return ((addr
+ 7) & -8);
2679 sparc64_stack_align (CORE_ADDR addr
)
2681 return ((addr
+ 15) & -16);
2685 sparc_print_extra_frame_info (struct frame_info
*fi
)
2687 if (fi
&& fi
->extra_info
&& fi
->extra_info
->flat
)
2688 printf_filtered (" flat, pc saved at 0x%s, fp saved at 0x%s\n",
2689 paddr_nz (fi
->extra_info
->pc_addr
),
2690 paddr_nz (fi
->extra_info
->fp_addr
));
2693 /* MULTI_ARCH support */
2696 sparc32_register_name (int regno
)
2698 static char *register_names
[] =
2699 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2700 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2701 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2702 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2704 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2705 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
2706 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
2707 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
2709 "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr"
2713 regno
>= (sizeof (register_names
) / sizeof (register_names
[0])))
2716 return register_names
[regno
];
2720 sparc64_register_name (int regno
)
2722 static char *register_names
[] =
2723 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2724 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2725 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2726 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2728 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2729 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
2730 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
2731 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
2732 "f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46",
2733 "f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62",
2735 "pc", "npc", "ccr", "fsr", "fprs", "y", "asi", "ver",
2736 "tick", "pil", "pstate", "tstate", "tba", "tl", "tt", "tpc",
2737 "tnpc", "wstate", "cwp", "cansave", "canrestore", "cleanwin", "otherwin",
2738 "asr16", "asr17", "asr18", "asr19", "asr20", "asr21", "asr22", "asr23",
2739 "asr24", "asr25", "asr26", "asr27", "asr28", "asr29", "asr30", "asr31",
2740 /* These are here at the end to simplify removing them if we have to. */
2741 "icc", "xcc", "fcc0", "fcc1", "fcc2", "fcc3"
2745 regno
>= (sizeof (register_names
) / sizeof (register_names
[0])))
2748 return register_names
[regno
];
2752 sparclite_register_name (int regno
)
2754 static char *register_names
[] =
2755 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2756 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2757 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2758 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2760 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2761 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
2762 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
2763 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
2765 "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr",
2766 "dia1", "dia2", "dda1", "dda2", "ddv1", "ddv2", "dcr", "dsr"
2770 regno
>= (sizeof (register_names
) / sizeof (register_names
[0])))
2773 return register_names
[regno
];
2777 sparclet_register_name (int regno
)
2779 static char *register_names
[] =
2780 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
2781 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
2782 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
2783 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
2785 "", "", "", "", "", "", "", "", /* no floating point registers */
2786 "", "", "", "", "", "", "", "",
2787 "", "", "", "", "", "", "", "",
2788 "", "", "", "", "", "", "", "",
2790 "y", "psr", "wim", "tbr", "pc", "npc", "", "", /* no FPSR or CPSR */
2791 "ccsr", "ccpr", "cccrcr", "ccor", "ccobr", "ccibr", "ccir", "",
2793 /* ASR15 ASR19 (don't display them) */
2794 "asr1", "", "asr17", "asr18", "", "asr20", "asr21", "asr22"
2795 /* None of the rest get displayed */
2797 "awr0", "awr1", "awr2", "awr3", "awr4", "awr5", "awr6", "awr7",
2798 "awr8", "awr9", "awr10", "awr11", "awr12", "awr13", "awr14", "awr15",
2799 "awr16", "awr17", "awr18", "awr19", "awr20", "awr21", "awr22", "awr23",
2800 "awr24", "awr25", "awr26", "awr27", "awr28", "awr29", "awr30", "awr31",
2806 regno
>= (sizeof (register_names
) / sizeof (register_names
[0])))
2809 return register_names
[regno
];
2813 sparc_push_return_address (CORE_ADDR pc_unused
, CORE_ADDR sp
)
2815 if (CALL_DUMMY_LOCATION
== AT_ENTRY_POINT
)
2817 /* The return PC of the dummy_frame is the former 'current' PC
2818 (where we were before we made the target function call).
2819 This is saved in %i7 by push_dummy_frame.
2821 We will save the 'call dummy location' (ie. the address
2822 to which the target function will return) in %o7.
2823 This address will actually be the program's entry point.
2824 There will be a special call_dummy breakpoint there. */
2826 write_register (O7_REGNUM
,
2827 CALL_DUMMY_ADDRESS () - 8);
2833 /* Should call_function allocate stack space for a struct return? */
2836 sparc64_use_struct_convention (int gcc_p
, struct type
*type
)
2838 return (TYPE_LENGTH (type
) > 32);
2841 /* Store the address of the place in which to copy the structure the
2842 subroutine will return. This is called from call_function_by_hand.
2843 The ultimate mystery is, tho, what is the value "16"?
2845 MVS: That's the offset from where the sp is now, to where the
2846 subroutine is gonna expect to find the struct return address. */
2849 sparc32_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
2854 val
= alloca (SPARC_INTREG_SIZE
);
2855 store_unsigned_integer (val
, SPARC_INTREG_SIZE
, addr
);
2856 write_memory (sp
+ (16 * SPARC_INTREG_SIZE
), val
, SPARC_INTREG_SIZE
);
2858 if (CALL_DUMMY_LOCATION
== AT_ENTRY_POINT
)
2860 /* Now adjust the value of the link register, which was previously
2861 stored by push_return_address. Functions that return structs are
2862 peculiar in that they return to link register + 12, rather than
2863 link register + 8. */
2865 o7
= read_register (O7_REGNUM
);
2866 write_register (O7_REGNUM
, o7
- 4);
2871 sparc64_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
2873 /* FIXME: V9 uses %o0 for this. */
2874 /* FIXME MVS: Only for small enough structs!!! */
2876 target_write_memory (sp
+ (16 * SPARC_INTREG_SIZE
),
2877 (char *) &addr
, SPARC_INTREG_SIZE
);
2879 if (CALL_DUMMY_LOCATION
== AT_ENTRY_POINT
)
2881 /* Now adjust the value of the link register, which was previously
2882 stored by push_return_address. Functions that return structs are
2883 peculiar in that they return to link register + 12, rather than
2884 link register + 8. */
2886 write_register (O7_REGNUM
, read_register (O7_REGNUM
) - 4);
2891 /* Default target data type for register REGNO. */
2893 static struct type
*
2894 sparc32_register_virtual_type (int regno
)
2896 if (regno
== PC_REGNUM
||
2897 regno
== FP_REGNUM
||
2899 return builtin_type_unsigned_int
;
2901 return builtin_type_int
;
2903 return builtin_type_float
;
2904 return builtin_type_int
;
2907 static struct type
*
2908 sparc64_register_virtual_type (int regno
)
2910 if (regno
== PC_REGNUM
||
2911 regno
== FP_REGNUM
||
2913 return builtin_type_unsigned_long_long
;
2915 return builtin_type_long_long
;
2917 return builtin_type_float
;
2919 return builtin_type_double
;
2920 return builtin_type_long_long
;
2923 /* Number of bytes of storage in the actual machine representation for
2927 sparc32_register_size (int regno
)
2933 sparc64_register_size (int regno
)
2935 return (regno
< 32 ? 8 : regno
< 64 ? 4 : 8);
2938 /* Index within the `registers' buffer of the first byte of the space
2939 for register REGNO. */
2942 sparc32_register_byte (int regno
)
2948 sparc64_register_byte (int regno
)
2952 else if (regno
< 64)
2953 return 32 * 8 + (regno
- 32) * 4;
2954 else if (regno
< 80)
2955 return 32 * 8 + 32 * 4 + (regno
- 64) * 8;
2957 return 64 * 8 + (regno
- 80) * 8;
2960 /* Immediately after a function call, return the saved pc.
2961 Can't go through the frames for this because on some machines
2962 the new frame is not set up until the new function executes
2963 some instructions. */
2966 sparc_saved_pc_after_call (struct frame_info
*fi
)
2968 return sparc_pc_adjust (read_register (RP_REGNUM
));
2971 /* Convert registers between 'raw' and 'virtual' formats.
2972 They are the same on sparc, so there's nothing to do. */
2975 sparc_convert_to_virtual (int regnum
, struct type
*type
, char *from
, char *to
)
2976 { /* do nothing (should never be called) */
2980 sparc_convert_to_raw (struct type
*type
, int regnum
, char *from
, char *to
)
2981 { /* do nothing (should never be called) */
2984 /* Init saved regs: nothing to do, just a place-holder function. */
2987 sparc_frame_init_saved_regs (struct frame_info
*fi_ignored
)
2991 /* gdbarch fix call dummy:
2992 All this function does is rearrange the arguments before calling
2993 sparc_fix_call_dummy (which does the real work). */
2996 sparc_gdbarch_fix_call_dummy (char *dummy
,
3000 struct value
**args
,
3004 if (CALL_DUMMY_LOCATION
== ON_STACK
)
3005 sparc_fix_call_dummy (dummy
, pc
, fun
, type
, gcc_p
);
3008 /* CALL_DUMMY_ADDRESS: fetch the breakpoint address for a call dummy. */
3011 sparc_call_dummy_address (void)
3013 return (CALL_DUMMY_START_OFFSET
) + CALL_DUMMY_BREAKPOINT_OFFSET
;
3016 /* Supply the Y register number to those that need it. */
3019 sparc_y_regnum (void)
3021 return gdbarch_tdep (current_gdbarch
)->y_regnum
;
3025 sparc_reg_struct_has_addr (int gcc_p
, struct type
*type
)
3027 if (GDB_TARGET_IS_SPARC64
)
3028 return (TYPE_LENGTH (type
) > 32);
3030 return (gcc_p
!= 1);
3034 sparc_intreg_size (void)
3036 return SPARC_INTREG_SIZE
;
3040 sparc_return_value_on_stack (struct type
*type
)
3042 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&&
3043 TYPE_LENGTH (type
) > 8)
3050 * Gdbarch "constructor" function.
3053 #define SPARC32_CALL_DUMMY_ON_STACK
3055 #define SPARC_SP_REGNUM 14
3056 #define SPARC_FP_REGNUM 30
3057 #define SPARC_FP0_REGNUM 32
3058 #define SPARC32_NPC_REGNUM 69
3059 #define SPARC32_PC_REGNUM 68
3060 #define SPARC32_Y_REGNUM 64
3061 #define SPARC64_PC_REGNUM 80
3062 #define SPARC64_NPC_REGNUM 81
3063 #define SPARC64_Y_REGNUM 85
3065 static struct gdbarch
*
3066 sparc_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3068 struct gdbarch
*gdbarch
;
3069 struct gdbarch_tdep
*tdep
;
3071 static LONGEST call_dummy_32
[] =
3072 { 0xbc100001, 0x9de38000, 0xbc100002, 0xbe100003,
3073 0xda03a058, 0xd803a054, 0xd603a050, 0xd403a04c,
3074 0xd203a048, 0x40000000, 0xd003a044, 0x01000000,
3075 0x91d02001, 0x01000000
3077 static LONGEST call_dummy_64
[] =
3078 { 0x9de3bec0fd3fa7f7LL
, 0xf93fa7eff53fa7e7LL
,
3079 0xf13fa7dfed3fa7d7LL
, 0xe93fa7cfe53fa7c7LL
,
3080 0xe13fa7bfdd3fa7b7LL
, 0xd93fa7afd53fa7a7LL
,
3081 0xd13fa79fcd3fa797LL
, 0xc93fa78fc53fa787LL
,
3082 0xc13fa77fcc3fa777LL
, 0xc83fa76fc43fa767LL
,
3083 0xc03fa75ffc3fa757LL
, 0xf83fa74ff43fa747LL
,
3084 0xf03fa73f01000000LL
, 0x0100000001000000LL
,
3085 0x0100000091580000LL
, 0xd027a72b93500000LL
,
3086 0xd027a72791480000LL
, 0xd027a72391400000LL
,
3087 0xd027a71fda5ba8a7LL
, 0xd85ba89fd65ba897LL
,
3088 0xd45ba88fd25ba887LL
, 0x9fc02000d05ba87fLL
,
3089 0x0100000091d02001LL
, 0x0100000001000000LL
3091 static LONGEST call_dummy_nil
[] = {0};
3093 /* Try to determine the OS ABI of the object we are loading. */
3095 if (info
.abfd
!= NULL
3096 && info
.osabi
== GDB_OSABI_UNKNOWN
)
3098 /* If it's an ELF file, assume it's Solaris. */
3099 if (bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
)
3100 info
.osabi
= GDB_OSABI_SOLARIS
;
3103 /* First see if there is already a gdbarch that can satisfy the request. */
3104 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3106 return arches
->gdbarch
;
3108 /* None found: is the request for a sparc architecture? */
3109 if (info
.bfd_arch_info
->arch
!= bfd_arch_sparc
)
3110 return NULL
; /* No; then it's not for us. */
3112 /* Yes: create a new gdbarch for the specified machine type. */
3113 tdep
= (struct gdbarch_tdep
*) xmalloc (sizeof (struct gdbarch_tdep
));
3114 gdbarch
= gdbarch_alloc (&info
, tdep
);
3116 /* First set settings that are common for all sparc architectures. */
3117 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
3118 set_gdbarch_breakpoint_from_pc (gdbarch
, memory_breakpoint_from_pc
);
3119 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
3120 set_gdbarch_call_dummy_p (gdbarch
, 1);
3121 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 1);
3122 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
3123 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
3124 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, sparc_extract_struct_value_address
);
3125 set_gdbarch_fix_call_dummy (gdbarch
, sparc_gdbarch_fix_call_dummy
);
3126 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
3127 set_gdbarch_fp_regnum (gdbarch
, SPARC_FP_REGNUM
);
3128 set_gdbarch_fp0_regnum (gdbarch
, SPARC_FP0_REGNUM
);
3129 set_gdbarch_frame_chain (gdbarch
, sparc_frame_chain
);
3130 set_gdbarch_frame_init_saved_regs (gdbarch
, sparc_frame_init_saved_regs
);
3131 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
3132 set_gdbarch_frame_saved_pc (gdbarch
, sparc_frame_saved_pc
);
3133 set_gdbarch_frameless_function_invocation (gdbarch
,
3134 frameless_look_for_prologue
);
3135 set_gdbarch_get_saved_register (gdbarch
, sparc_get_saved_register
);
3136 set_gdbarch_init_extra_frame_info (gdbarch
, sparc_init_extra_frame_info
);
3137 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
3138 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
3139 set_gdbarch_long_double_bit (gdbarch
, 16 * TARGET_CHAR_BIT
);
3140 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
3141 set_gdbarch_max_register_raw_size (gdbarch
, 8);
3142 set_gdbarch_max_register_virtual_size (gdbarch
, 8);
3143 set_gdbarch_pop_frame (gdbarch
, sparc_pop_frame
);
3144 set_gdbarch_push_return_address (gdbarch
, sparc_push_return_address
);
3145 set_gdbarch_push_dummy_frame (gdbarch
, sparc_push_dummy_frame
);
3146 set_gdbarch_read_pc (gdbarch
, generic_target_read_pc
);
3147 set_gdbarch_register_convert_to_raw (gdbarch
, sparc_convert_to_raw
);
3148 set_gdbarch_register_convert_to_virtual (gdbarch
,
3149 sparc_convert_to_virtual
);
3150 set_gdbarch_register_convertible (gdbarch
,
3151 generic_register_convertible_not
);
3152 set_gdbarch_reg_struct_has_addr (gdbarch
, sparc_reg_struct_has_addr
);
3153 set_gdbarch_return_value_on_stack (gdbarch
, sparc_return_value_on_stack
);
3154 set_gdbarch_saved_pc_after_call (gdbarch
, sparc_saved_pc_after_call
);
3155 set_gdbarch_prologue_frameless_p (gdbarch
, sparc_prologue_frameless_p
);
3156 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
3157 set_gdbarch_skip_prologue (gdbarch
, sparc_skip_prologue
);
3158 set_gdbarch_sp_regnum (gdbarch
, SPARC_SP_REGNUM
);
3159 set_gdbarch_deprecated_use_generic_dummy_frames (gdbarch
, 0);
3160 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
3163 * Settings that depend only on 32/64 bit word size
3166 switch (info
.bfd_arch_info
->mach
)
3168 case bfd_mach_sparc
:
3169 case bfd_mach_sparc_sparclet
:
3170 case bfd_mach_sparc_sparclite
:
3171 case bfd_mach_sparc_v8plus
:
3172 case bfd_mach_sparc_v8plusa
:
3173 case bfd_mach_sparc_sparclite_le
:
3174 /* 32-bit machine types: */
3176 #ifdef SPARC32_CALL_DUMMY_ON_STACK
3177 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch
, deprecated_pc_in_call_dummy_on_stack
);
3178 set_gdbarch_call_dummy_address (gdbarch
, sparc_call_dummy_address
);
3179 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0x30);
3180 set_gdbarch_call_dummy_length (gdbarch
, 0x38);
3182 /* NOTE: cagney/2002-04-26: Based from info posted by Peter
3183 Schauer around Oct '99. Briefly, due to aspects of the SPARC
3184 ABI, it isn't possible to use ON_STACK with a strictly
3187 Peter Schauer writes ...
3189 No, any call from GDB to a user function returning a
3190 struct/union will fail miserably. Try this:
3209 for (i = 0; i < 4; i++)
3215 Set a breakpoint at the gx = sret () statement, run to it and
3216 issue a `print sret()'. It will not succed with your
3217 approach, and I doubt that continuing the program will work
3220 For details of the ABI see the Sparc Architecture Manual. I
3221 have Version 8 (Prentice Hall ISBN 0-13-825001-4) and the
3222 calling conventions for functions returning aggregate values
3223 are explained in Appendix D.3. */
3225 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
3226 set_gdbarch_call_dummy_words (gdbarch
, call_dummy_32
);
3228 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch
, deprecated_pc_in_call_dummy_at_entry_point
);
3229 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
3230 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
3231 set_gdbarch_call_dummy_length (gdbarch
, 0);
3232 set_gdbarch_call_dummy_words (gdbarch
, call_dummy_nil
);
3234 set_gdbarch_call_dummy_stack_adjust (gdbarch
, 68);
3235 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
3236 set_gdbarch_frame_args_skip (gdbarch
, 68);
3237 set_gdbarch_function_start_offset (gdbarch
, 0);
3238 set_gdbarch_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
3239 set_gdbarch_npc_regnum (gdbarch
, SPARC32_NPC_REGNUM
);
3240 set_gdbarch_pc_regnum (gdbarch
, SPARC32_PC_REGNUM
);
3241 set_gdbarch_ptr_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
3242 set_gdbarch_push_arguments (gdbarch
, sparc32_push_arguments
);
3243 set_gdbarch_read_fp (gdbarch
, generic_target_read_fp
);
3244 set_gdbarch_read_sp (gdbarch
, generic_target_read_sp
);
3246 set_gdbarch_register_byte (gdbarch
, sparc32_register_byte
);
3247 set_gdbarch_register_raw_size (gdbarch
, sparc32_register_size
);
3248 set_gdbarch_register_size (gdbarch
, 4);
3249 set_gdbarch_register_virtual_size (gdbarch
, sparc32_register_size
);
3250 set_gdbarch_register_virtual_type (gdbarch
,
3251 sparc32_register_virtual_type
);
3252 #ifdef SPARC32_CALL_DUMMY_ON_STACK
3253 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (call_dummy_32
));
3255 set_gdbarch_sizeof_call_dummy_words (gdbarch
, 0);
3257 set_gdbarch_stack_align (gdbarch
, sparc32_stack_align
);
3258 set_gdbarch_store_struct_return (gdbarch
, sparc32_store_struct_return
);
3259 set_gdbarch_use_struct_convention (gdbarch
,
3260 generic_use_struct_convention
);
3261 set_gdbarch_write_sp (gdbarch
, generic_target_write_sp
);
3262 tdep
->y_regnum
= SPARC32_Y_REGNUM
;
3263 tdep
->fp_max_regnum
= SPARC_FP0_REGNUM
+ 32;
3264 tdep
->intreg_size
= 4;
3265 tdep
->reg_save_offset
= 0x60;
3266 tdep
->call_dummy_call_offset
= 0x24;
3269 case bfd_mach_sparc_v9
:
3270 case bfd_mach_sparc_v9a
:
3271 /* 64-bit machine types: */
3272 default: /* Any new machine type is likely to be 64-bit. */
3274 #ifdef SPARC64_CALL_DUMMY_ON_STACK
3275 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch
, deprecated_pc_in_call_dummy_on_stack
);
3276 set_gdbarch_call_dummy_address (gdbarch
, sparc_call_dummy_address
);
3277 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 8 * 4);
3278 set_gdbarch_call_dummy_length (gdbarch
, 192);
3279 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
3280 set_gdbarch_call_dummy_start_offset (gdbarch
, 148);
3281 set_gdbarch_call_dummy_words (gdbarch
, call_dummy_64
);
3283 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch
, deprecated_pc_in_call_dummy_at_entry_point
);
3284 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
3285 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
3286 set_gdbarch_call_dummy_length (gdbarch
, 0);
3287 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
3288 set_gdbarch_call_dummy_words (gdbarch
, call_dummy_nil
);
3290 set_gdbarch_call_dummy_stack_adjust (gdbarch
, 128);
3291 set_gdbarch_frame_args_skip (gdbarch
, 136);
3292 set_gdbarch_function_start_offset (gdbarch
, 0);
3293 set_gdbarch_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
3294 set_gdbarch_npc_regnum (gdbarch
, SPARC64_NPC_REGNUM
);
3295 set_gdbarch_pc_regnum (gdbarch
, SPARC64_PC_REGNUM
);
3296 set_gdbarch_ptr_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
3297 set_gdbarch_push_arguments (gdbarch
, sparc64_push_arguments
);
3298 /* NOTE different for at_entry */
3299 set_gdbarch_read_fp (gdbarch
, sparc64_read_fp
);
3300 set_gdbarch_read_sp (gdbarch
, sparc64_read_sp
);
3301 /* Some of the registers aren't 64 bits, but it's a lot simpler just
3302 to assume they all are (since most of them are). */
3303 set_gdbarch_register_byte (gdbarch
, sparc64_register_byte
);
3304 set_gdbarch_register_raw_size (gdbarch
, sparc64_register_size
);
3305 set_gdbarch_register_size (gdbarch
, 8);
3306 set_gdbarch_register_virtual_size (gdbarch
, sparc64_register_size
);
3307 set_gdbarch_register_virtual_type (gdbarch
,
3308 sparc64_register_virtual_type
);
3309 #ifdef SPARC64_CALL_DUMMY_ON_STACK
3310 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (call_dummy_64
));
3312 set_gdbarch_sizeof_call_dummy_words (gdbarch
, 0);
3314 set_gdbarch_stack_align (gdbarch
, sparc64_stack_align
);
3315 set_gdbarch_store_struct_return (gdbarch
, sparc64_store_struct_return
);
3316 set_gdbarch_use_struct_convention (gdbarch
,
3317 sparc64_use_struct_convention
);
3318 set_gdbarch_write_sp (gdbarch
, sparc64_write_sp
);
3319 tdep
->y_regnum
= SPARC64_Y_REGNUM
;
3320 tdep
->fp_max_regnum
= SPARC_FP0_REGNUM
+ 48;
3321 tdep
->intreg_size
= 8;
3322 tdep
->reg_save_offset
= 0x90;
3323 tdep
->call_dummy_call_offset
= 148 + 4 * 5;
3328 * Settings that vary per-architecture:
3331 switch (info
.bfd_arch_info
->mach
)
3333 case bfd_mach_sparc
:
3334 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3335 set_gdbarch_frame_chain_valid (gdbarch
, file_frame_chain_valid
);
3336 set_gdbarch_num_regs (gdbarch
, 72);
3337 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4);
3338 set_gdbarch_register_name (gdbarch
, sparc32_register_name
);
3339 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3340 tdep
->has_fpu
= 1; /* (all but sparclet and sparclite) */
3341 tdep
->fp_register_bytes
= 32 * 4;
3342 tdep
->print_insn_mach
= bfd_mach_sparc
;
3344 case bfd_mach_sparc_sparclet
:
3345 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparclet_extract_return_value
);
3346 set_gdbarch_frame_chain_valid (gdbarch
, file_frame_chain_valid
);
3347 set_gdbarch_num_regs (gdbarch
, 32 + 32 + 8 + 8 + 8);
3348 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4 + 8*4 + 8*4);
3349 set_gdbarch_register_name (gdbarch
, sparclet_register_name
);
3350 set_gdbarch_deprecated_store_return_value (gdbarch
, sparclet_store_return_value
);
3351 tdep
->has_fpu
= 0; /* (all but sparclet and sparclite) */
3352 tdep
->fp_register_bytes
= 0;
3353 tdep
->print_insn_mach
= bfd_mach_sparc_sparclet
;
3355 case bfd_mach_sparc_sparclite
:
3356 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3357 set_gdbarch_frame_chain_valid (gdbarch
, func_frame_chain_valid
);
3358 set_gdbarch_num_regs (gdbarch
, 80);
3359 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4 + 8*4);
3360 set_gdbarch_register_name (gdbarch
, sparclite_register_name
);
3361 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3362 tdep
->has_fpu
= 0; /* (all but sparclet and sparclite) */
3363 tdep
->fp_register_bytes
= 0;
3364 tdep
->print_insn_mach
= bfd_mach_sparc_sparclite
;
3366 case bfd_mach_sparc_v8plus
:
3367 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3368 set_gdbarch_frame_chain_valid (gdbarch
, file_frame_chain_valid
);
3369 set_gdbarch_num_regs (gdbarch
, 72);
3370 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4);
3371 set_gdbarch_register_name (gdbarch
, sparc32_register_name
);
3372 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3373 tdep
->print_insn_mach
= bfd_mach_sparc
;
3374 tdep
->fp_register_bytes
= 32 * 4;
3375 tdep
->has_fpu
= 1; /* (all but sparclet and sparclite) */
3377 case bfd_mach_sparc_v8plusa
:
3378 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3379 set_gdbarch_frame_chain_valid (gdbarch
, file_frame_chain_valid
);
3380 set_gdbarch_num_regs (gdbarch
, 72);
3381 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4);
3382 set_gdbarch_register_name (gdbarch
, sparc32_register_name
);
3383 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3384 tdep
->has_fpu
= 1; /* (all but sparclet and sparclite) */
3385 tdep
->fp_register_bytes
= 32 * 4;
3386 tdep
->print_insn_mach
= bfd_mach_sparc
;
3388 case bfd_mach_sparc_sparclite_le
:
3389 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc32_extract_return_value
);
3390 set_gdbarch_frame_chain_valid (gdbarch
, func_frame_chain_valid
);
3391 set_gdbarch_num_regs (gdbarch
, 80);
3392 set_gdbarch_register_bytes (gdbarch
, 32*4 + 32*4 + 8*4 + 8*4);
3393 set_gdbarch_register_name (gdbarch
, sparclite_register_name
);
3394 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3395 tdep
->has_fpu
= 0; /* (all but sparclet and sparclite) */
3396 tdep
->fp_register_bytes
= 0;
3397 tdep
->print_insn_mach
= bfd_mach_sparc_sparclite
;
3399 case bfd_mach_sparc_v9
:
3400 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc64_extract_return_value
);
3401 set_gdbarch_frame_chain_valid (gdbarch
, file_frame_chain_valid
);
3402 set_gdbarch_num_regs (gdbarch
, 125);
3403 set_gdbarch_register_bytes (gdbarch
, 32*8 + 32*8 + 45*8);
3404 set_gdbarch_register_name (gdbarch
, sparc64_register_name
);
3405 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3406 tdep
->has_fpu
= 1; /* (all but sparclet and sparclite) */
3407 tdep
->fp_register_bytes
= 64 * 4;
3408 tdep
->print_insn_mach
= bfd_mach_sparc_v9a
;
3410 case bfd_mach_sparc_v9a
:
3411 set_gdbarch_deprecated_extract_return_value (gdbarch
, sparc64_extract_return_value
);
3412 set_gdbarch_frame_chain_valid (gdbarch
, file_frame_chain_valid
);
3413 set_gdbarch_num_regs (gdbarch
, 125);
3414 set_gdbarch_register_bytes (gdbarch
, 32*8 + 32*8 + 45*8);
3415 set_gdbarch_register_name (gdbarch
, sparc64_register_name
);
3416 set_gdbarch_deprecated_store_return_value (gdbarch
, sparc_store_return_value
);
3417 tdep
->has_fpu
= 1; /* (all but sparclet and sparclite) */
3418 tdep
->fp_register_bytes
= 64 * 4;
3419 tdep
->print_insn_mach
= bfd_mach_sparc_v9a
;
3423 /* Hook in OS ABI-specific overrides, if they have been registered. */
3424 gdbarch_init_osabi (info
, gdbarch
);
3430 sparc_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
3432 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3437 fprintf_unfiltered (file
, "sparc_dump_tdep: has_fpu = %d\n",
3439 fprintf_unfiltered (file
, "sparc_dump_tdep: fp_register_bytes = %d\n",
3440 tdep
->fp_register_bytes
);
3441 fprintf_unfiltered (file
, "sparc_dump_tdep: y_regnum = %d\n",
3443 fprintf_unfiltered (file
, "sparc_dump_tdep: fp_max_regnum = %d\n",
3444 tdep
->fp_max_regnum
);
3445 fprintf_unfiltered (file
, "sparc_dump_tdep: intreg_size = %d\n",
3447 fprintf_unfiltered (file
, "sparc_dump_tdep: reg_save_offset = %d\n",
3448 tdep
->reg_save_offset
);
3449 fprintf_unfiltered (file
, "sparc_dump_tdep: call_dummy_call_offset = %d\n",
3450 tdep
->call_dummy_call_offset
);
3451 fprintf_unfiltered (file
, "sparc_dump_tdep: print_insn_match = %d\n",
3452 tdep
->print_insn_match
);