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[thirdparty/qemu.git] / hw / i386 / pc_piix.c
1 /*
2 * QEMU PC System Emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25 #include "qemu/osdep.h"
26 #include "config-devices.h"
27
28 #include "qemu/units.h"
29 #include "hw/loader.h"
30 #include "hw/i386/x86.h"
31 #include "hw/i386/pc.h"
32 #include "hw/i386/apic.h"
33 #include "hw/pci-host/i440fx.h"
34 #include "hw/southbridge/piix.h"
35 #include "hw/display/ramfb.h"
36 #include "hw/firmware/smbios.h"
37 #include "hw/pci/pci.h"
38 #include "hw/pci/pci_ids.h"
39 #include "hw/usb.h"
40 #include "net/net.h"
41 #include "hw/ide.h"
42 #include "hw/ide/pci.h"
43 #include "hw/irq.h"
44 #include "sysemu/kvm.h"
45 #include "hw/kvm/clock.h"
46 #include "sysemu/sysemu.h"
47 #include "hw/sysbus.h"
48 #include "sysemu/arch_init.h"
49 #include "hw/i2c/smbus_eeprom.h"
50 #include "hw/xen/xen.h"
51 #include "exec/memory.h"
52 #include "exec/address-spaces.h"
53 #include "hw/acpi/acpi.h"
54 #include "cpu.h"
55 #include "qapi/error.h"
56 #include "qemu/error-report.h"
57 #ifdef CONFIG_XEN
58 #include <xen/hvm/hvm_info_table.h>
59 #include "hw/xen/xen_pt.h"
60 #endif
61 #include "migration/global_state.h"
62 #include "migration/misc.h"
63 #include "sysemu/numa.h"
64 #include "hw/mem/nvdimm.h"
65
66 #define MAX_IDE_BUS 2
67
68 #ifdef CONFIG_IDE_ISA
69 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
70 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
71 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
72 #endif
73
74 /* PC hardware initialisation */
75 static void pc_init1(MachineState *machine,
76 const char *host_type, const char *pci_type)
77 {
78 PCMachineState *pcms = PC_MACHINE(machine);
79 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
80 X86MachineState *x86ms = X86_MACHINE(machine);
81 MemoryRegion *system_memory = get_system_memory();
82 MemoryRegion *system_io = get_system_io();
83 PCIBus *pci_bus;
84 ISABus *isa_bus;
85 PCII440FXState *i440fx_state;
86 int piix3_devfn = -1;
87 qemu_irq smi_irq;
88 GSIState *gsi_state;
89 BusState *idebus[MAX_IDE_BUS];
90 ISADevice *rtc_state;
91 MemoryRegion *ram_memory;
92 MemoryRegion *pci_memory;
93 MemoryRegion *rom_memory;
94 ram_addr_t lowmem;
95
96 /*
97 * Calculate ram split, for memory below and above 4G. It's a bit
98 * complicated for backward compatibility reasons ...
99 *
100 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the
101 * default value for max_ram_below_4g now.
102 *
103 * - Then, to gigabyte align the memory, we move the split to 3G
104 * (lowmem = 0xc0000000). But only in case we have to split in
105 * the first place, i.e. ram_size is larger than (traditional)
106 * lowmem. And for new machine types (gigabyte_align = true)
107 * only, for live migration compatibility reasons.
108 *
109 * - Next the max-ram-below-4g option was added, which allowed to
110 * reduce lowmem to a smaller value, to allow a larger PCI I/O
111 * window below 4G. qemu doesn't enforce gigabyte alignment here,
112 * but prints a warning.
113 *
114 * - Finally max-ram-below-4g got updated to also allow raising lowmem,
115 * so legacy non-PAE guests can get as much memory as possible in
116 * the 32bit address space below 4G.
117 *
118 * - Note that Xen has its own ram setp code in xen_ram_init(),
119 * called via xen_hvm_init().
120 *
121 * Examples:
122 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high
123 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high
124 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high
125 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M)
126 */
127 if (xen_enabled()) {
128 xen_hvm_init(pcms, &ram_memory);
129 } else {
130 if (!x86ms->max_ram_below_4g) {
131 x86ms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */
132 }
133 lowmem = x86ms->max_ram_below_4g;
134 if (machine->ram_size >= x86ms->max_ram_below_4g) {
135 if (pcmc->gigabyte_align) {
136 if (lowmem > 0xc0000000) {
137 lowmem = 0xc0000000;
138 }
139 if (lowmem & (1 * GiB - 1)) {
140 warn_report("Large machine and max_ram_below_4g "
141 "(%" PRIu64 ") not a multiple of 1G; "
142 "possible bad performance.",
143 x86ms->max_ram_below_4g);
144 }
145 }
146 }
147
148 if (machine->ram_size >= lowmem) {
149 x86ms->above_4g_mem_size = machine->ram_size - lowmem;
150 x86ms->below_4g_mem_size = lowmem;
151 } else {
152 x86ms->above_4g_mem_size = 0;
153 x86ms->below_4g_mem_size = machine->ram_size;
154 }
155 }
156
157 x86_cpus_init(x86ms, pcmc->default_cpu_version);
158
159 if (kvm_enabled() && pcmc->kvmclock_enabled) {
160 kvmclock_create();
161 }
162
163 if (pcmc->pci_enabled) {
164 pci_memory = g_new(MemoryRegion, 1);
165 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
166 rom_memory = pci_memory;
167 } else {
168 pci_memory = NULL;
169 rom_memory = system_memory;
170 }
171
172 pc_guest_info_init(pcms);
173
174 if (pcmc->smbios_defaults) {
175 MachineClass *mc = MACHINE_GET_CLASS(machine);
176 /* These values are guest ABI, do not change */
177 smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)",
178 mc->name, pcmc->smbios_legacy_mode,
179 pcmc->smbios_uuid_encoded,
180 SMBIOS_ENTRY_POINT_21);
181 }
182
183 /* allocate ram and load rom/bios */
184 if (!xen_enabled()) {
185 pc_memory_init(pcms, system_memory,
186 rom_memory, &ram_memory);
187 } else if (machine->kernel_filename != NULL) {
188 /* For xen HVM direct kernel boot, load linux here */
189 xen_load_linux(pcms);
190 }
191
192 gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled);
193
194 if (pcmc->pci_enabled) {
195 PIIX3State *piix3;
196
197 pci_bus = i440fx_init(host_type,
198 pci_type,
199 &i440fx_state,
200 system_memory, system_io, machine->ram_size,
201 x86ms->below_4g_mem_size,
202 x86ms->above_4g_mem_size,
203 pci_memory, ram_memory);
204 pcms->bus = pci_bus;
205
206 piix3 = piix3_create(pci_bus, &isa_bus);
207 piix3->pic = x86ms->gsi;
208 piix3_devfn = piix3->dev.devfn;
209 } else {
210 pci_bus = NULL;
211 i440fx_state = NULL;
212 isa_bus = isa_bus_new(NULL, get_system_memory(), system_io,
213 &error_abort);
214 no_hpet = 1;
215 }
216 isa_bus_irqs(isa_bus, x86ms->gsi);
217
218 pc_i8259_create(isa_bus, gsi_state->i8259_irq);
219
220 if (pcmc->pci_enabled) {
221 ioapic_init_gsi(gsi_state, "i440fx");
222 }
223
224 if (tcg_enabled()) {
225 x86_register_ferr_irq(x86ms->gsi[13]);
226 }
227
228 pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL);
229
230 assert(pcms->vmport != ON_OFF_AUTO__MAX);
231 if (pcms->vmport == ON_OFF_AUTO_AUTO) {
232 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON;
233 }
234
235 /* init basic PC hardware */
236 pc_basic_device_init(isa_bus, x86ms->gsi, &rtc_state, true,
237 (pcms->vmport != ON_OFF_AUTO_ON), pcms->pit_enabled,
238 0x4);
239
240 pc_nic_init(pcmc, isa_bus, pci_bus);
241
242 if (pcmc->pci_enabled) {
243 PCIDevice *dev;
244
245 dev = pci_create_simple(pci_bus, piix3_devfn + 1,
246 xen_enabled() ? "piix3-ide-xen" : "piix3-ide");
247 pci_ide_create_devs(dev);
248 idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
249 idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
250 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
251 }
252 #ifdef CONFIG_IDE_ISA
253 else {
254 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
255 int i;
256
257 ide_drive_get(hd, ARRAY_SIZE(hd));
258 for (i = 0; i < MAX_IDE_BUS; i++) {
259 ISADevice *dev;
260 char busname[] = "ide.0";
261 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i],
262 ide_irq[i],
263 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
264 /*
265 * The ide bus name is ide.0 for the first bus and ide.1 for the
266 * second one.
267 */
268 busname[4] = '0' + i;
269 idebus[i] = qdev_get_child_bus(DEVICE(dev), busname);
270 }
271 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
272 }
273 #endif
274
275 if (pcmc->pci_enabled && machine_usb(machine)) {
276 pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci");
277 }
278
279 if (pcmc->pci_enabled && acpi_enabled) {
280 DeviceState *piix4_pm;
281
282 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0);
283 /* TODO: Populate SPD eeprom data. */
284 pcms->smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
285 x86ms->gsi[9], smi_irq,
286 x86_machine_is_smm_enabled(x86ms),
287 &piix4_pm);
288 smbus_eeprom_init(pcms->smbus, 8, NULL, 0);
289
290 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
291 TYPE_HOTPLUG_HANDLER,
292 (Object **)&pcms->acpi_dev,
293 object_property_allow_set_link,
294 OBJ_PROP_LINK_STRONG, &error_abort);
295 object_property_set_link(OBJECT(machine), OBJECT(piix4_pm),
296 PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
297 }
298
299 if (machine->nvdimms_state->is_enabled) {
300 nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
301 x86ms->fw_cfg, OBJECT(pcms));
302 }
303 }
304
305 /* Looking for a pc_compat_2_4() function? It doesn't exist.
306 * pc_compat_*() functions that run on machine-init time and
307 * change global QEMU state are deprecated. Please don't create
308 * one, and implement any pc-*-2.4 (and newer) compat code in
309 * hw_compat_*, pc_compat_*, or * pc_*_machine_options().
310 */
311
312 static void pc_compat_2_3_fn(MachineState *machine)
313 {
314 X86MachineState *x86ms = X86_MACHINE(machine);
315 if (kvm_enabled()) {
316 x86ms->smm = ON_OFF_AUTO_OFF;
317 }
318 }
319
320 static void pc_compat_2_2_fn(MachineState *machine)
321 {
322 pc_compat_2_3_fn(machine);
323 }
324
325 static void pc_compat_2_1_fn(MachineState *machine)
326 {
327 pc_compat_2_2_fn(machine);
328 x86_cpu_change_kvm_default("svm", NULL);
329 }
330
331 static void pc_compat_2_0_fn(MachineState *machine)
332 {
333 pc_compat_2_1_fn(machine);
334 }
335
336 static void pc_compat_1_7_fn(MachineState *machine)
337 {
338 pc_compat_2_0_fn(machine);
339 x86_cpu_change_kvm_default("x2apic", NULL);
340 }
341
342 static void pc_compat_1_6_fn(MachineState *machine)
343 {
344 pc_compat_1_7_fn(machine);
345 }
346
347 static void pc_compat_1_5_fn(MachineState *machine)
348 {
349 pc_compat_1_6_fn(machine);
350 }
351
352 static void pc_compat_1_4_fn(MachineState *machine)
353 {
354 pc_compat_1_5_fn(machine);
355 }
356
357 static void pc_compat_1_3(MachineState *machine)
358 {
359 pc_compat_1_4_fn(machine);
360 }
361
362 /* PC compat function for pc-1.0 to pc-1.2 */
363 static void pc_compat_1_2(MachineState *machine)
364 {
365 pc_compat_1_3(machine);
366 x86_cpu_change_kvm_default("kvm-pv-eoi", NULL);
367 }
368
369 static void pc_init_isa(MachineState *machine)
370 {
371 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE);
372 }
373
374 #ifdef CONFIG_XEN
375 static void pc_xen_hvm_init_pci(MachineState *machine)
376 {
377 const char *pci_type = has_igd_gfx_passthru ?
378 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE;
379
380 pc_init1(machine,
381 TYPE_I440FX_PCI_HOST_BRIDGE,
382 pci_type);
383 }
384
385 static void pc_xen_hvm_init(MachineState *machine)
386 {
387 PCMachineState *pcms = PC_MACHINE(machine);
388
389 if (!xen_enabled()) {
390 error_report("xenfv machine requires the xen accelerator");
391 exit(1);
392 }
393
394 pc_xen_hvm_init_pci(machine);
395 pci_create_simple(pcms->bus, -1, "xen-platform");
396 }
397 #endif
398
399 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \
400 static void pc_init_##suffix(MachineState *machine) \
401 { \
402 void (*compat)(MachineState *m) = (compatfn); \
403 if (compat) { \
404 compat(machine); \
405 } \
406 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \
407 TYPE_I440FX_PCI_DEVICE); \
408 } \
409 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
410
411 static void pc_i440fx_machine_options(MachineClass *m)
412 {
413 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
414 pcmc->default_nic_model = "e1000";
415
416 m->family = "pc_piix";
417 m->desc = "Standard PC (i440FX + PIIX, 1996)";
418 m->default_machine_opts = "firmware=bios-256k.bin";
419 m->default_display = "std";
420 machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE);
421 }
422
423 static void pc_i440fx_5_0_machine_options(MachineClass *m)
424 {
425 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
426 pc_i440fx_machine_options(m);
427 m->alias = "pc";
428 m->is_default = true;
429 pcmc->default_cpu_version = 1;
430 }
431
432 DEFINE_I440FX_MACHINE(v5_0, "pc-i440fx-5.0", NULL,
433 pc_i440fx_5_0_machine_options);
434
435 static void pc_i440fx_4_2_machine_options(MachineClass *m)
436 {
437 pc_i440fx_5_0_machine_options(m);
438 m->alias = NULL;
439 m->is_default = false;
440 compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len);
441 compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len);
442 }
443
444 DEFINE_I440FX_MACHINE(v4_2, "pc-i440fx-4.2", NULL,
445 pc_i440fx_4_2_machine_options);
446
447 static void pc_i440fx_4_1_machine_options(MachineClass *m)
448 {
449 pc_i440fx_4_2_machine_options(m);
450 m->alias = NULL;
451 m->is_default = false;
452 compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len);
453 compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len);
454 }
455
456 DEFINE_I440FX_MACHINE(v4_1, "pc-i440fx-4.1", NULL,
457 pc_i440fx_4_1_machine_options);
458
459 static void pc_i440fx_4_0_machine_options(MachineClass *m)
460 {
461 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
462 pc_i440fx_4_1_machine_options(m);
463 m->alias = NULL;
464 m->is_default = false;
465 pcmc->default_cpu_version = CPU_VERSION_LEGACY;
466 compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len);
467 compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len);
468 }
469
470 DEFINE_I440FX_MACHINE(v4_0, "pc-i440fx-4.0", NULL,
471 pc_i440fx_4_0_machine_options);
472
473 static void pc_i440fx_3_1_machine_options(MachineClass *m)
474 {
475 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
476
477 pc_i440fx_4_0_machine_options(m);
478 m->is_default = false;
479 pcmc->do_not_add_smb_acpi = true;
480 m->smbus_no_migration_support = true;
481 m->alias = NULL;
482 pcmc->pvh_enabled = false;
483 compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len);
484 compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len);
485 }
486
487 DEFINE_I440FX_MACHINE(v3_1, "pc-i440fx-3.1", NULL,
488 pc_i440fx_3_1_machine_options);
489
490 static void pc_i440fx_3_0_machine_options(MachineClass *m)
491 {
492 pc_i440fx_3_1_machine_options(m);
493 compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len);
494 compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len);
495 }
496
497 DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL,
498 pc_i440fx_3_0_machine_options);
499
500 static void pc_i440fx_2_12_machine_options(MachineClass *m)
501 {
502 pc_i440fx_3_0_machine_options(m);
503 compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len);
504 compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len);
505 }
506
507 DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL,
508 pc_i440fx_2_12_machine_options);
509
510 static void pc_i440fx_2_11_machine_options(MachineClass *m)
511 {
512 pc_i440fx_2_12_machine_options(m);
513 compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len);
514 compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len);
515 }
516
517 DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL,
518 pc_i440fx_2_11_machine_options);
519
520 static void pc_i440fx_2_10_machine_options(MachineClass *m)
521 {
522 pc_i440fx_2_11_machine_options(m);
523 compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len);
524 compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len);
525 m->auto_enable_numa_with_memhp = false;
526 }
527
528 DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL,
529 pc_i440fx_2_10_machine_options);
530
531 static void pc_i440fx_2_9_machine_options(MachineClass *m)
532 {
533 pc_i440fx_2_10_machine_options(m);
534 compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len);
535 compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len);
536 m->numa_auto_assign_ram = numa_legacy_auto_assign_ram;
537 }
538
539 DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL,
540 pc_i440fx_2_9_machine_options);
541
542 static void pc_i440fx_2_8_machine_options(MachineClass *m)
543 {
544 pc_i440fx_2_9_machine_options(m);
545 compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len);
546 compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len);
547 }
548
549 DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL,
550 pc_i440fx_2_8_machine_options);
551
552 static void pc_i440fx_2_7_machine_options(MachineClass *m)
553 {
554 pc_i440fx_2_8_machine_options(m);
555 compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len);
556 compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len);
557 }
558
559 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL,
560 pc_i440fx_2_7_machine_options);
561
562 static void pc_i440fx_2_6_machine_options(MachineClass *m)
563 {
564 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
565
566 pc_i440fx_2_7_machine_options(m);
567 pcmc->legacy_cpu_hotplug = true;
568 pcmc->linuxboot_dma_enabled = false;
569 compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len);
570 compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len);
571 }
572
573 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL,
574 pc_i440fx_2_6_machine_options);
575
576 static void pc_i440fx_2_5_machine_options(MachineClass *m)
577 {
578 X86MachineClass *x86mc = X86_MACHINE_CLASS(m);
579
580 pc_i440fx_2_6_machine_options(m);
581 x86mc->save_tsc_khz = false;
582 m->legacy_fw_cfg_order = 1;
583 compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len);
584 compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len);
585 }
586
587 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL,
588 pc_i440fx_2_5_machine_options);
589
590 static void pc_i440fx_2_4_machine_options(MachineClass *m)
591 {
592 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
593
594 pc_i440fx_2_5_machine_options(m);
595 m->hw_version = "2.4.0";
596 pcmc->broken_reserved_end = true;
597 compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len);
598 compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len);
599 }
600
601 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL,
602 pc_i440fx_2_4_machine_options)
603
604 static void pc_i440fx_2_3_machine_options(MachineClass *m)
605 {
606 pc_i440fx_2_4_machine_options(m);
607 m->hw_version = "2.3.0";
608 compat_props_add(m->compat_props, hw_compat_2_3, hw_compat_2_3_len);
609 compat_props_add(m->compat_props, pc_compat_2_3, pc_compat_2_3_len);
610 }
611
612 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3_fn,
613 pc_i440fx_2_3_machine_options);
614
615 static void pc_i440fx_2_2_machine_options(MachineClass *m)
616 {
617 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
618
619 pc_i440fx_2_3_machine_options(m);
620 m->hw_version = "2.2.0";
621 m->default_machine_opts = "firmware=bios-256k.bin,suppress-vmdesc=on";
622 compat_props_add(m->compat_props, hw_compat_2_2, hw_compat_2_2_len);
623 compat_props_add(m->compat_props, pc_compat_2_2, pc_compat_2_2_len);
624 pcmc->rsdp_in_ram = false;
625 }
626
627 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2_fn,
628 pc_i440fx_2_2_machine_options);
629
630 static void pc_i440fx_2_1_machine_options(MachineClass *m)
631 {
632 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
633
634 pc_i440fx_2_2_machine_options(m);
635 m->hw_version = "2.1.0";
636 m->default_display = NULL;
637 compat_props_add(m->compat_props, hw_compat_2_1, hw_compat_2_1_len);
638 compat_props_add(m->compat_props, pc_compat_2_1, pc_compat_2_1_len);
639 pcmc->smbios_uuid_encoded = false;
640 pcmc->enforce_aligned_dimm = false;
641 }
642
643 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1_fn,
644 pc_i440fx_2_1_machine_options);
645
646 static void pc_i440fx_2_0_machine_options(MachineClass *m)
647 {
648 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
649
650 pc_i440fx_2_1_machine_options(m);
651 m->hw_version = "2.0.0";
652 compat_props_add(m->compat_props, pc_compat_2_0, pc_compat_2_0_len);
653 pcmc->smbios_legacy_mode = true;
654 pcmc->has_reserved_memory = false;
655 /* This value depends on the actual DSDT and SSDT compiled into
656 * the source QEMU; unfortunately it depends on the binary and
657 * not on the machine type, so we cannot make pc-i440fx-1.7 work on
658 * both QEMU 1.7 and QEMU 2.0.
659 *
660 * Large variations cause migration to fail for more than one
661 * consecutive value of the "-smp" maxcpus option.
662 *
663 * For small variations of the kind caused by different iasl versions,
664 * the 4k rounding usually leaves slack. However, there could be still
665 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the
666 * slack is only ~10 bytes before one "-smp maxcpus" value breaks!
667 *
668 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on
669 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418.
670 */
671 pcmc->legacy_acpi_table_size = 6652;
672 pcmc->acpi_data_size = 0x10000;
673 }
674
675 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0_fn,
676 pc_i440fx_2_0_machine_options);
677
678 static void pc_i440fx_1_7_machine_options(MachineClass *m)
679 {
680 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
681
682 pc_i440fx_2_0_machine_options(m);
683 m->hw_version = "1.7.0";
684 m->default_machine_opts = NULL;
685 m->option_rom_has_mr = true;
686 compat_props_add(m->compat_props, pc_compat_1_7, pc_compat_1_7_len);
687 pcmc->smbios_defaults = false;
688 pcmc->gigabyte_align = false;
689 pcmc->legacy_acpi_table_size = 6414;
690 }
691
692 DEFINE_I440FX_MACHINE(v1_7, "pc-i440fx-1.7", pc_compat_1_7_fn,
693 pc_i440fx_1_7_machine_options);
694
695 static void pc_i440fx_1_6_machine_options(MachineClass *m)
696 {
697 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
698
699 pc_i440fx_1_7_machine_options(m);
700 m->hw_version = "1.6.0";
701 m->rom_file_has_mr = false;
702 compat_props_add(m->compat_props, pc_compat_1_6, pc_compat_1_6_len);
703 pcmc->has_acpi_build = false;
704 }
705
706 DEFINE_I440FX_MACHINE(v1_6, "pc-i440fx-1.6", pc_compat_1_6_fn,
707 pc_i440fx_1_6_machine_options);
708
709 static void pc_i440fx_1_5_machine_options(MachineClass *m)
710 {
711 pc_i440fx_1_6_machine_options(m);
712 m->hw_version = "1.5.0";
713 compat_props_add(m->compat_props, pc_compat_1_5, pc_compat_1_5_len);
714 }
715
716 DEFINE_I440FX_MACHINE(v1_5, "pc-i440fx-1.5", pc_compat_1_5_fn,
717 pc_i440fx_1_5_machine_options);
718
719 static void pc_i440fx_1_4_machine_options(MachineClass *m)
720 {
721 pc_i440fx_1_5_machine_options(m);
722 m->hw_version = "1.4.0";
723 m->hot_add_cpu = NULL;
724 compat_props_add(m->compat_props, pc_compat_1_4, pc_compat_1_4_len);
725 }
726
727 DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4_fn,
728 pc_i440fx_1_4_machine_options);
729
730 static void pc_i440fx_1_3_machine_options(MachineClass *m)
731 {
732 X86MachineClass *x86mc = X86_MACHINE_CLASS(m);
733 static GlobalProperty compat[] = {
734 PC_CPU_MODEL_IDS("1.3.0")
735 { "usb-tablet", "usb_version", "1" },
736 { "virtio-net-pci", "ctrl_mac_addr", "off" },
737 { "virtio-net-pci", "mq", "off" },
738 { "e1000", "autonegotiation", "off" },
739 };
740
741 pc_i440fx_1_4_machine_options(m);
742 m->hw_version = "1.3.0";
743 m->deprecation_reason = "use a newer machine type instead";
744 x86mc->compat_apic_id_mode = true;
745 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
746 }
747
748 DEFINE_I440FX_MACHINE(v1_3, "pc-1.3", pc_compat_1_3,
749 pc_i440fx_1_3_machine_options);
750
751
752 static void pc_i440fx_1_2_machine_options(MachineClass *m)
753 {
754 static GlobalProperty compat[] = {
755 PC_CPU_MODEL_IDS("1.2.0")
756 { "nec-usb-xhci", "msi", "off" },
757 { "nec-usb-xhci", "msix", "off" },
758 { "qxl", "revision", "3" },
759 { "qxl-vga", "revision", "3" },
760 { "VGA", "mmio", "off" },
761 };
762
763 pc_i440fx_1_3_machine_options(m);
764 m->hw_version = "1.2.0";
765 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
766 }
767
768 DEFINE_I440FX_MACHINE(v1_2, "pc-1.2", pc_compat_1_2,
769 pc_i440fx_1_2_machine_options);
770
771
772 static void pc_i440fx_1_1_machine_options(MachineClass *m)
773 {
774 static GlobalProperty compat[] = {
775 PC_CPU_MODEL_IDS("1.1.0")
776 { "virtio-scsi-pci", "hotplug", "off" },
777 { "virtio-scsi-pci", "param_change", "off" },
778 { "VGA", "vgamem_mb", "8" },
779 { "vmware-svga", "vgamem_mb", "8" },
780 { "qxl-vga", "vgamem_mb", "8" },
781 { "qxl", "vgamem_mb", "8" },
782 { "virtio-blk-pci", "config-wce", "off" },
783 };
784
785 pc_i440fx_1_2_machine_options(m);
786 m->hw_version = "1.1.0";
787 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
788 }
789
790 DEFINE_I440FX_MACHINE(v1_1, "pc-1.1", pc_compat_1_2,
791 pc_i440fx_1_1_machine_options);
792
793 static void pc_i440fx_1_0_machine_options(MachineClass *m)
794 {
795 static GlobalProperty compat[] = {
796 PC_CPU_MODEL_IDS("1.0")
797 { TYPE_ISA_FDC, "check_media_rate", "off" },
798 { "virtio-balloon-pci", "class", stringify(PCI_CLASS_MEMORY_RAM) },
799 { "apic-common", "vapic", "off" },
800 { TYPE_USB_DEVICE, "full-path", "no" },
801 };
802
803 pc_i440fx_1_1_machine_options(m);
804 m->hw_version = "1.0";
805 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
806 }
807
808 DEFINE_I440FX_MACHINE(v1_0, "pc-1.0", pc_compat_1_2,
809 pc_i440fx_1_0_machine_options);
810
811
812 typedef struct {
813 uint16_t gpu_device_id;
814 uint16_t pch_device_id;
815 uint8_t pch_revision_id;
816 } IGDDeviceIDInfo;
817
818 /* In real world different GPU should have different PCH. But actually
819 * the different PCH DIDs likely map to different PCH SKUs. We do the
820 * same thing for the GPU. For PCH, the different SKUs are going to be
821 * all the same silicon design and implementation, just different
822 * features turn on and off with fuses. The SW interfaces should be
823 * consistent across all SKUs in a given family (eg LPT). But just same
824 * features may not be supported.
825 *
826 * Most of these different PCH features probably don't matter to the
827 * Gfx driver, but obviously any difference in display port connections
828 * will so it should be fine with any PCH in case of passthrough.
829 *
830 * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell)
831 * scenarios, 0x9cc3 for BDW(Broadwell).
832 */
833 static const IGDDeviceIDInfo igd_combo_id_infos[] = {
834 /* HSW Classic */
835 {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */
836 {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */
837 {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */
838 {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */
839 {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */
840 /* HSW ULT */
841 {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */
842 {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */
843 {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */
844 {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */
845 {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */
846 {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */
847 /* HSW CRW */
848 {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */
849 {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */
850 /* HSW Server */
851 {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */
852 /* HSW SRVR */
853 {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */
854 /* BSW */
855 {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */
856 {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */
857 {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */
858 {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */
859 {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */
860 {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */
861 {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */
862 {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */
863 {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */
864 {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */
865 {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */
866 };
867
868 static void isa_bridge_class_init(ObjectClass *klass, void *data)
869 {
870 DeviceClass *dc = DEVICE_CLASS(klass);
871 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
872
873 dc->desc = "ISA bridge faked to support IGD PT";
874 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
875 k->vendor_id = PCI_VENDOR_ID_INTEL;
876 k->class_id = PCI_CLASS_BRIDGE_ISA;
877 };
878
879 static TypeInfo isa_bridge_info = {
880 .name = "igd-passthrough-isa-bridge",
881 .parent = TYPE_PCI_DEVICE,
882 .instance_size = sizeof(PCIDevice),
883 .class_init = isa_bridge_class_init,
884 .interfaces = (InterfaceInfo[]) {
885 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
886 { },
887 },
888 };
889
890 static void pt_graphics_register_types(void)
891 {
892 type_register_static(&isa_bridge_info);
893 }
894 type_init(pt_graphics_register_types)
895
896 void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id)
897 {
898 struct PCIDevice *bridge_dev;
899 int i, num;
900 uint16_t pch_dev_id = 0xffff;
901 uint8_t pch_rev_id;
902
903 num = ARRAY_SIZE(igd_combo_id_infos);
904 for (i = 0; i < num; i++) {
905 if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) {
906 pch_dev_id = igd_combo_id_infos[i].pch_device_id;
907 pch_rev_id = igd_combo_id_infos[i].pch_revision_id;
908 }
909 }
910
911 if (pch_dev_id == 0xffff) {
912 return;
913 }
914
915 /* Currently IGD drivers always need to access PCH by 1f.0. */
916 bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0),
917 "igd-passthrough-isa-bridge");
918
919 /*
920 * Note that vendor id is always PCI_VENDOR_ID_INTEL.
921 */
922 if (!bridge_dev) {
923 fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n");
924 return;
925 }
926 pci_config_set_device_id(bridge_dev->config, pch_dev_id);
927 pci_config_set_revision(bridge_dev->config, pch_rev_id);
928 }
929
930 static void isapc_machine_options(MachineClass *m)
931 {
932 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
933 m->desc = "ISA-only PC";
934 m->max_cpus = 1;
935 m->option_rom_has_mr = true;
936 m->rom_file_has_mr = false;
937 pcmc->pci_enabled = false;
938 pcmc->has_acpi_build = false;
939 pcmc->smbios_defaults = false;
940 pcmc->gigabyte_align = false;
941 pcmc->smbios_legacy_mode = true;
942 pcmc->has_reserved_memory = false;
943 pcmc->default_nic_model = "ne2k_isa";
944 m->default_cpu_type = X86_CPU_TYPE_NAME("486");
945 }
946
947 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa,
948 isapc_machine_options);
949
950
951 #ifdef CONFIG_XEN
952 static void xenfv_machine_options(MachineClass *m)
953 {
954 m->desc = "Xen Fully-virtualized PC";
955 m->max_cpus = HVM_MAX_VCPUS;
956 m->default_machine_opts = "accel=xen";
957 }
958
959 DEFINE_PC_MACHINE(xenfv, "xenfv", pc_xen_hvm_init,
960 xenfv_machine_options);
961 #endif
Mirror of https://git.qemu.org/git/qemu.git