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1 /*
2 * QEMU PowerMac CUDA device support
3 *
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
26 #include "qemu/osdep.h"
27 #include "hw/hw.h"
28 #include "hw/ppc/mac.h"
29 #include "hw/input/adb.h"
30 #include "hw/misc/mos6522.h"
31 #include "hw/misc/macio/cuda.h"
32 #include "qemu/timer.h"
33 #include "sysemu/sysemu.h"
34 #include "qemu/cutils.h"
35 #include "qemu/log.h"
36 #include "qemu/module.h"
37 #include "trace.h"
38
39 /* Bits in B data register: all active low */
40 #define TREQ 0x08 /* Transfer request (input) */
41 #define TACK 0x10 /* Transfer acknowledge (output) */
42 #define TIP 0x20 /* Transfer in progress (output) */
43
44 /* commands (1st byte) */
45 #define ADB_PACKET 0
46 #define CUDA_PACKET 1
47 #define ERROR_PACKET 2
48 #define TIMER_PACKET 3
49 #define POWER_PACKET 4
50 #define MACIIC_PACKET 5
51 #define PMU_PACKET 6
52
53 #define CUDA_TIMER_FREQ (4700000 / 6)
54
55 /* CUDA returns time_t's offset from Jan 1, 1904, not 1970 */
56 #define RTC_OFFSET 2082844800
57
58 static void cuda_receive_packet_from_host(CUDAState *s,
59 const uint8_t *data, int len);
60
61 /* MacOS uses timer 1 for calibration on startup, so we use
62 * the timebase frequency and cuda_get_counter_value() with
63 * cuda_get_load_time() to steer MacOS to calculate calibrate its timers
64 * correctly for both TCG and KVM (see commit b981289c49 "PPC: Cuda: Use cuda
65 * timer to expose tbfreq to guest" for more information) */
66
67 static uint64_t cuda_get_counter_value(MOS6522State *s, MOS6522Timer *ti)
68 {
69 MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj);
70 CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda);
71
72 /* Reverse of the tb calculation algorithm that Mac OS X uses on bootup */
73 uint64_t tb_diff = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
74 cs->tb_frequency, NANOSECONDS_PER_SECOND) -
75 ti->load_time;
76
77 return (tb_diff * 0xBF401675E5DULL) / (cs->tb_frequency << 24);
78 }
79
80 static uint64_t cuda_get_load_time(MOS6522State *s, MOS6522Timer *ti)
81 {
82 MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj);
83 CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda);
84
85 uint64_t load_time = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
86 cs->tb_frequency, NANOSECONDS_PER_SECOND);
87 return load_time;
88 }
89
90 static void cuda_set_sr_int(void *opaque)
91 {
92 CUDAState *s = opaque;
93 MOS6522CUDAState *mcs = &s->mos6522_cuda;
94 MOS6522State *ms = MOS6522(mcs);
95 MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms);
96
97 mdc->set_sr_int(ms);
98 }
99
100 static void cuda_delay_set_sr_int(CUDAState *s)
101 {
102 int64_t expire;
103
104 trace_cuda_delay_set_sr_int();
105
106 expire = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + s->sr_delay_ns;
107 timer_mod(s->sr_delay_timer, expire);
108 }
109
110 /* NOTE: TIP and TREQ are negated */
111 static void cuda_update(CUDAState *s)
112 {
113 MOS6522CUDAState *mcs = &s->mos6522_cuda;
114 MOS6522State *ms = MOS6522(mcs);
115 int packet_received, len;
116
117 packet_received = 0;
118 if (!(ms->b & TIP)) {
119 /* transfer requested from host */
120
121 if (ms->acr & SR_OUT) {
122 /* data output */
123 if ((ms->b & (TACK | TIP)) != (s->last_b & (TACK | TIP))) {
124 if (s->data_out_index < sizeof(s->data_out)) {
125 trace_cuda_data_send(ms->sr);
126 s->data_out[s->data_out_index++] = ms->sr;
127 cuda_delay_set_sr_int(s);
128 }
129 }
130 } else {
131 if (s->data_in_index < s->data_in_size) {
132 /* data input */
133 if ((ms->b & (TACK | TIP)) != (s->last_b & (TACK | TIP))) {
134 ms->sr = s->data_in[s->data_in_index++];
135 trace_cuda_data_recv(ms->sr);
136 /* indicate end of transfer */
137 if (s->data_in_index >= s->data_in_size) {
138 ms->b = (ms->b | TREQ);
139 }
140 cuda_delay_set_sr_int(s);
141 }
142 }
143 }
144 } else {
145 /* no transfer requested: handle sync case */
146 if ((s->last_b & TIP) && (ms->b & TACK) != (s->last_b & TACK)) {
147 /* update TREQ state each time TACK change state */
148 if (ms->b & TACK) {
149 ms->b = (ms->b | TREQ);
150 } else {
151 ms->b = (ms->b & ~TREQ);
152 }
153 cuda_delay_set_sr_int(s);
154 } else {
155 if (!(s->last_b & TIP)) {
156 /* handle end of host to cuda transfer */
157 packet_received = (s->data_out_index > 0);
158 /* always an IRQ at the end of transfer */
159 cuda_delay_set_sr_int(s);
160 }
161 /* signal if there is data to read */
162 if (s->data_in_index < s->data_in_size) {
163 ms->b = (ms->b & ~TREQ);
164 }
165 }
166 }
167
168 s->last_acr = ms->acr;
169 s->last_b = ms->b;
170
171 /* NOTE: cuda_receive_packet_from_host() can call cuda_update()
172 recursively */
173 if (packet_received) {
174 len = s->data_out_index;
175 s->data_out_index = 0;
176 cuda_receive_packet_from_host(s, s->data_out, len);
177 }
178 }
179
180 static void cuda_send_packet_to_host(CUDAState *s,
181 const uint8_t *data, int len)
182 {
183 int i;
184
185 trace_cuda_packet_send(len);
186 for (i = 0; i < len; i++) {
187 trace_cuda_packet_send_data(i, data[i]);
188 }
189
190 memcpy(s->data_in, data, len);
191 s->data_in_size = len;
192 s->data_in_index = 0;
193 cuda_update(s);
194 cuda_delay_set_sr_int(s);
195 }
196
197 static void cuda_adb_poll(void *opaque)
198 {
199 CUDAState *s = opaque;
200 uint8_t obuf[ADB_MAX_OUT_LEN + 2];
201 int olen;
202
203 olen = adb_poll(&s->adb_bus, obuf + 2, s->adb_poll_mask);
204 if (olen > 0) {
205 obuf[0] = ADB_PACKET;
206 obuf[1] = 0x40; /* polled data */
207 cuda_send_packet_to_host(s, obuf, olen + 2);
208 }
209 timer_mod(s->adb_poll_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
210 (NANOSECONDS_PER_SECOND / (1000 / s->autopoll_rate_ms)));
211 }
212
213 /* description of commands */
214 typedef struct CudaCommand {
215 uint8_t command;
216 const char *name;
217 bool (*handler)(CUDAState *s,
218 const uint8_t *in_args, int in_len,
219 uint8_t *out_args, int *out_len);
220 } CudaCommand;
221
222 static bool cuda_cmd_autopoll(CUDAState *s,
223 const uint8_t *in_data, int in_len,
224 uint8_t *out_data, int *out_len)
225 {
226 int autopoll;
227
228 if (in_len != 1) {
229 return false;
230 }
231
232 autopoll = (in_data[0] != 0);
233 if (autopoll != s->autopoll) {
234 s->autopoll = autopoll;
235 if (autopoll) {
236 timer_mod(s->adb_poll_timer,
237 qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
238 (NANOSECONDS_PER_SECOND / (1000 / s->autopoll_rate_ms)));
239 } else {
240 timer_del(s->adb_poll_timer);
241 }
242 }
243 return true;
244 }
245
246 static bool cuda_cmd_set_autorate(CUDAState *s,
247 const uint8_t *in_data, int in_len,
248 uint8_t *out_data, int *out_len)
249 {
250 if (in_len != 1) {
251 return false;
252 }
253
254 /* we don't want a period of 0 ms */
255 /* FIXME: check what real hardware does */
256 if (in_data[0] == 0) {
257 return false;
258 }
259
260 s->autopoll_rate_ms = in_data[0];
261 if (s->autopoll) {
262 timer_mod(s->adb_poll_timer,
263 qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
264 (NANOSECONDS_PER_SECOND / (1000 / s->autopoll_rate_ms)));
265 }
266 return true;
267 }
268
269 static bool cuda_cmd_set_device_list(CUDAState *s,
270 const uint8_t *in_data, int in_len,
271 uint8_t *out_data, int *out_len)
272 {
273 if (in_len != 2) {
274 return false;
275 }
276
277 s->adb_poll_mask = (((uint16_t)in_data[0]) << 8) | in_data[1];
278 return true;
279 }
280
281 static bool cuda_cmd_powerdown(CUDAState *s,
282 const uint8_t *in_data, int in_len,
283 uint8_t *out_data, int *out_len)
284 {
285 if (in_len != 0) {
286 return false;
287 }
288
289 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
290 return true;
291 }
292
293 static bool cuda_cmd_reset_system(CUDAState *s,
294 const uint8_t *in_data, int in_len,
295 uint8_t *out_data, int *out_len)
296 {
297 if (in_len != 0) {
298 return false;
299 }
300
301 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
302 return true;
303 }
304
305 static bool cuda_cmd_set_file_server_flag(CUDAState *s,
306 const uint8_t *in_data, int in_len,
307 uint8_t *out_data, int *out_len)
308 {
309 if (in_len != 1) {
310 return false;
311 }
312
313 qemu_log_mask(LOG_UNIMP,
314 "CUDA: unimplemented command FILE_SERVER_FLAG %d\n",
315 in_data[0]);
316 return true;
317 }
318
319 static bool cuda_cmd_set_power_message(CUDAState *s,
320 const uint8_t *in_data, int in_len,
321 uint8_t *out_data, int *out_len)
322 {
323 if (in_len != 1) {
324 return false;
325 }
326
327 qemu_log_mask(LOG_UNIMP,
328 "CUDA: unimplemented command SET_POWER_MESSAGE %d\n",
329 in_data[0]);
330 return true;
331 }
332
333 static bool cuda_cmd_get_time(CUDAState *s,
334 const uint8_t *in_data, int in_len,
335 uint8_t *out_data, int *out_len)
336 {
337 uint32_t ti;
338
339 if (in_len != 0) {
340 return false;
341 }
342
343 ti = s->tick_offset + (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)
344 / NANOSECONDS_PER_SECOND);
345 out_data[0] = ti >> 24;
346 out_data[1] = ti >> 16;
347 out_data[2] = ti >> 8;
348 out_data[3] = ti;
349 *out_len = 4;
350 return true;
351 }
352
353 static bool cuda_cmd_set_time(CUDAState *s,
354 const uint8_t *in_data, int in_len,
355 uint8_t *out_data, int *out_len)
356 {
357 uint32_t ti;
358
359 if (in_len != 4) {
360 return false;
361 }
362
363 ti = (((uint32_t)in_data[0]) << 24) + (((uint32_t)in_data[1]) << 16)
364 + (((uint32_t)in_data[2]) << 8) + in_data[3];
365 s->tick_offset = ti - (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)
366 / NANOSECONDS_PER_SECOND);
367 return true;
368 }
369
370 static const CudaCommand handlers[] = {
371 { CUDA_AUTOPOLL, "AUTOPOLL", cuda_cmd_autopoll },
372 { CUDA_SET_AUTO_RATE, "SET_AUTO_RATE", cuda_cmd_set_autorate },
373 { CUDA_SET_DEVICE_LIST, "SET_DEVICE_LIST", cuda_cmd_set_device_list },
374 { CUDA_POWERDOWN, "POWERDOWN", cuda_cmd_powerdown },
375 { CUDA_RESET_SYSTEM, "RESET_SYSTEM", cuda_cmd_reset_system },
376 { CUDA_FILE_SERVER_FLAG, "FILE_SERVER_FLAG",
377 cuda_cmd_set_file_server_flag },
378 { CUDA_SET_POWER_MESSAGES, "SET_POWER_MESSAGES",
379 cuda_cmd_set_power_message },
380 { CUDA_GET_TIME, "GET_TIME", cuda_cmd_get_time },
381 { CUDA_SET_TIME, "SET_TIME", cuda_cmd_set_time },
382 };
383
384 static void cuda_receive_packet(CUDAState *s,
385 const uint8_t *data, int len)
386 {
387 uint8_t obuf[16] = { CUDA_PACKET, 0, data[0] };
388 int i, out_len = 0;
389
390 for (i = 0; i < ARRAY_SIZE(handlers); i++) {
391 const CudaCommand *desc = &handlers[i];
392 if (desc->command == data[0]) {
393 trace_cuda_receive_packet_cmd(desc->name);
394 out_len = 0;
395 if (desc->handler(s, data + 1, len - 1, obuf + 3, &out_len)) {
396 cuda_send_packet_to_host(s, obuf, 3 + out_len);
397 } else {
398 qemu_log_mask(LOG_GUEST_ERROR,
399 "CUDA: %s: wrong parameters %d\n",
400 desc->name, len);
401 obuf[0] = ERROR_PACKET;
402 obuf[1] = 0x5; /* bad parameters */
403 obuf[2] = CUDA_PACKET;
404 obuf[3] = data[0];
405 cuda_send_packet_to_host(s, obuf, 4);
406 }
407 return;
408 }
409 }
410
411 qemu_log_mask(LOG_GUEST_ERROR, "CUDA: unknown command 0x%02x\n", data[0]);
412 obuf[0] = ERROR_PACKET;
413 obuf[1] = 0x2; /* unknown command */
414 obuf[2] = CUDA_PACKET;
415 obuf[3] = data[0];
416 cuda_send_packet_to_host(s, obuf, 4);
417 }
418
419 static void cuda_receive_packet_from_host(CUDAState *s,
420 const uint8_t *data, int len)
421 {
422 int i;
423
424 trace_cuda_packet_receive(len);
425 for (i = 0; i < len; i++) {
426 trace_cuda_packet_receive_data(i, data[i]);
427 }
428
429 switch(data[0]) {
430 case ADB_PACKET:
431 {
432 uint8_t obuf[ADB_MAX_OUT_LEN + 3];
433 int olen;
434 olen = adb_request(&s->adb_bus, obuf + 2, data + 1, len - 1);
435 if (olen > 0) {
436 obuf[0] = ADB_PACKET;
437 obuf[1] = 0x00;
438 cuda_send_packet_to_host(s, obuf, olen + 2);
439 } else {
440 /* error */
441 obuf[0] = ADB_PACKET;
442 obuf[1] = -olen;
443 obuf[2] = data[1];
444 olen = 0;
445 cuda_send_packet_to_host(s, obuf, olen + 3);
446 }
447 }
448 break;
449 case CUDA_PACKET:
450 cuda_receive_packet(s, data + 1, len - 1);
451 break;
452 }
453 }
454
455 static uint64_t mos6522_cuda_read(void *opaque, hwaddr addr, unsigned size)
456 {
457 CUDAState *s = opaque;
458 MOS6522CUDAState *mcs = &s->mos6522_cuda;
459 MOS6522State *ms = MOS6522(mcs);
460
461 addr = (addr >> 9) & 0xf;
462 return mos6522_read(ms, addr, size);
463 }
464
465 static void mos6522_cuda_write(void *opaque, hwaddr addr, uint64_t val,
466 unsigned size)
467 {
468 CUDAState *s = opaque;
469 MOS6522CUDAState *mcs = &s->mos6522_cuda;
470 MOS6522State *ms = MOS6522(mcs);
471
472 addr = (addr >> 9) & 0xf;
473 mos6522_write(ms, addr, val, size);
474 }
475
476 static const MemoryRegionOps mos6522_cuda_ops = {
477 .read = mos6522_cuda_read,
478 .write = mos6522_cuda_write,
479 .endianness = DEVICE_BIG_ENDIAN,
480 .valid = {
481 .min_access_size = 1,
482 .max_access_size = 1,
483 },
484 };
485
486 static const VMStateDescription vmstate_cuda = {
487 .name = "cuda",
488 .version_id = 5,
489 .minimum_version_id = 5,
490 .fields = (VMStateField[]) {
491 VMSTATE_STRUCT(mos6522_cuda.parent_obj, CUDAState, 0, vmstate_mos6522,
492 MOS6522State),
493 VMSTATE_UINT8(last_b, CUDAState),
494 VMSTATE_UINT8(last_acr, CUDAState),
495 VMSTATE_INT32(data_in_size, CUDAState),
496 VMSTATE_INT32(data_in_index, CUDAState),
497 VMSTATE_INT32(data_out_index, CUDAState),
498 VMSTATE_UINT8(autopoll, CUDAState),
499 VMSTATE_UINT8(autopoll_rate_ms, CUDAState),
500 VMSTATE_UINT16(adb_poll_mask, CUDAState),
501 VMSTATE_BUFFER(data_in, CUDAState),
502 VMSTATE_BUFFER(data_out, CUDAState),
503 VMSTATE_UINT32(tick_offset, CUDAState),
504 VMSTATE_TIMER_PTR(adb_poll_timer, CUDAState),
505 VMSTATE_TIMER_PTR(sr_delay_timer, CUDAState),
506 VMSTATE_END_OF_LIST()
507 }
508 };
509
510 static void cuda_reset(DeviceState *dev)
511 {
512 CUDAState *s = CUDA(dev);
513
514 s->data_in_size = 0;
515 s->data_in_index = 0;
516 s->data_out_index = 0;
517 s->autopoll = 0;
518 }
519
520 static void cuda_realize(DeviceState *dev, Error **errp)
521 {
522 CUDAState *s = CUDA(dev);
523 SysBusDevice *sbd;
524 MOS6522State *ms;
525 DeviceState *d;
526 struct tm tm;
527
528 /* Pass IRQ from 6522 */
529 d = DEVICE(&s->mos6522_cuda);
530 ms = MOS6522(d);
531 sbd = SYS_BUS_DEVICE(s);
532 sysbus_pass_irq(sbd, SYS_BUS_DEVICE(ms));
533
534 qemu_get_timedate(&tm, 0);
535 s->tick_offset = (uint32_t)mktimegm(&tm) + RTC_OFFSET;
536
537 s->sr_delay_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, cuda_set_sr_int, s);
538 s->sr_delay_ns = 20 * SCALE_US;
539
540 s->adb_poll_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, cuda_adb_poll, s);
541 s->adb_poll_mask = 0xffff;
542 s->autopoll_rate_ms = 20;
543 }
544
545 static void cuda_init(Object *obj)
546 {
547 CUDAState *s = CUDA(obj);
548 SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
549
550 sysbus_init_child_obj(obj, "mos6522-cuda", &s->mos6522_cuda,
551 sizeof(s->mos6522_cuda), TYPE_MOS6522_CUDA);
552
553 memory_region_init_io(&s->mem, obj, &mos6522_cuda_ops, s, "cuda", 0x2000);
554 sysbus_init_mmio(sbd, &s->mem);
555
556 qbus_create_inplace(&s->adb_bus, sizeof(s->adb_bus), TYPE_ADB_BUS,
557 DEVICE(obj), "adb.0");
558 }
559
560 static Property cuda_properties[] = {
561 DEFINE_PROP_UINT64("timebase-frequency", CUDAState, tb_frequency, 0),
562 DEFINE_PROP_END_OF_LIST()
563 };
564
565 static void cuda_class_init(ObjectClass *oc, void *data)
566 {
567 DeviceClass *dc = DEVICE_CLASS(oc);
568
569 dc->realize = cuda_realize;
570 dc->reset = cuda_reset;
571 dc->vmsd = &vmstate_cuda;
572 dc->props = cuda_properties;
573 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
574 }
575
576 static const TypeInfo cuda_type_info = {
577 .name = TYPE_CUDA,
578 .parent = TYPE_SYS_BUS_DEVICE,
579 .instance_size = sizeof(CUDAState),
580 .instance_init = cuda_init,
581 .class_init = cuda_class_init,
582 };
583
584 static void mos6522_cuda_portB_write(MOS6522State *s)
585 {
586 MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj);
587 CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda);
588
589 cuda_update(cs);
590 }
591
592 static void mos6522_cuda_reset(DeviceState *dev)
593 {
594 MOS6522State *ms = MOS6522(dev);
595 MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms);
596
597 mdc->parent_reset(dev);
598
599 ms->timers[0].frequency = CUDA_TIMER_FREQ;
600 ms->timers[1].frequency = (SCALE_US * 6000) / 4700;
601 }
602
603 static void mos6522_cuda_class_init(ObjectClass *oc, void *data)
604 {
605 DeviceClass *dc = DEVICE_CLASS(oc);
606 MOS6522DeviceClass *mdc = MOS6522_DEVICE_CLASS(oc);
607
608 dc->reset = mos6522_cuda_reset;
609 mdc->portB_write = mos6522_cuda_portB_write;
610 mdc->get_timer1_counter_value = cuda_get_counter_value;
611 mdc->get_timer2_counter_value = cuda_get_counter_value;
612 mdc->get_timer1_load_time = cuda_get_load_time;
613 mdc->get_timer2_load_time = cuda_get_load_time;
614 }
615
616 static const TypeInfo mos6522_cuda_type_info = {
617 .name = TYPE_MOS6522_CUDA,
618 .parent = TYPE_MOS6522,
619 .instance_size = sizeof(MOS6522CUDAState),
620 .class_init = mos6522_cuda_class_init,
621 };
622
623 static void cuda_register_types(void)
624 {
625 type_register_static(&mos6522_cuda_type_info);
626 type_register_static(&cuda_type_info);
627 }
628
629 type_init(cuda_register_types)