hw/xtensa/xtfpga.c

   1 /*
   2  * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are met:
   7  *     * Redistributions of source code must retain the above copyright
   8  *       notice, this list of conditions and the following disclaimer.
   9  *     * Redistributions in binary form must reproduce the above copyright
  10  *       notice, this list of conditions and the following disclaimer in the
  11  *       documentation and/or other materials provided with the distribution.
  12  *     * Neither the name of the Open Source and Linux Lab nor the
  13  *       names of its contributors may be used to endorse or promote products
  14  *       derived from this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  17  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  20  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  23  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  25  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26  */
  27
  28 #include "qemu/osdep.h"
  29 #include "qapi/error.h"
  30 #include "sysemu/sysemu.h"
  31 #include "hw/boards.h"
  32 #include "hw/loader.h"
  33 #include "elf.h"
  34 #include "exec/memory.h"
  35 #include "exec/address-spaces.h"
  36 #include "hw/char/serial.h"
  37 #include "net/net.h"
  38 #include "hw/sysbus.h"
  39 #include "hw/block/flash.h"
  40 #include "sysemu/block-backend.h"
  41 #include "sysemu/char.h"
  42 #include "sysemu/device_tree.h"
  43 #include "qemu/error-report.h"
  44 #include "bootparam.h"
  45
  46 typedef struct LxBoardDesc {
  47     hwaddr flash_base;
  48     size_t flash_size;
  49     size_t flash_boot_base;
  50     size_t flash_sector_size;
  51     size_t sram_size;
  52 } LxBoardDesc;
  53
  54 typedef struct Lx60FpgaState {
  55     MemoryRegion iomem;
  56     uint32_t leds;
  57     uint32_t switches;
  58 } Lx60FpgaState;
  59
  60 static void lx60_fpga_reset(void *opaque)
  61 {
  62     Lx60FpgaState *s = opaque;
  63
  64     s->leds = 0;
  65     s->switches = 0;
  66 }
  67
  68 static uint64_t lx60_fpga_read(void *opaque, hwaddr addr,
  69         unsigned size)
  70 {
  71     Lx60FpgaState *s = opaque;
  72
  73     switch (addr) {
  74     case 0x0: /*build date code*/
  75         return 0x09272011;
  76
  77     case 0x4: /*processor clock frequency, Hz*/
  78         return 10000000;
  79
  80     case 0x8: /*LEDs (off = 0, on = 1)*/
  81         return s->leds;
  82
  83     case 0xc: /*DIP switches (off = 0, on = 1)*/
  84         return s->switches;
  85     }
  86     return 0;
  87 }
  88
  89 static void lx60_fpga_write(void *opaque, hwaddr addr,
  90         uint64_t val, unsigned size)
  91 {
  92     Lx60FpgaState *s = opaque;
  93
  94     switch (addr) {
  95     case 0x8: /*LEDs (off = 0, on = 1)*/
  96         s->leds = val;
  97         break;
  98
  99     case 0x10: /*board reset*/
 100         if (val == 0xdead) {
 101             qemu_system_reset_request();
 102         }
 103         break;
 104     }
 105 }
 106
 107 static const MemoryRegionOps lx60_fpga_ops = {
 108     .read = lx60_fpga_read,
 109     .write = lx60_fpga_write,
 110     .endianness = DEVICE_NATIVE_ENDIAN,
 111 };
 112
 113 static Lx60FpgaState *lx60_fpga_init(MemoryRegion *address_space,
 114         hwaddr base)
 115 {
 116     Lx60FpgaState *s = g_malloc(sizeof(Lx60FpgaState));
 117
 118     memory_region_init_io(&s->iomem, NULL, &lx60_fpga_ops, s,
 119             "lx60.fpga", 0x10000);
 120     memory_region_add_subregion(address_space, base, &s->iomem);
 121     lx60_fpga_reset(s);
 122     qemu_register_reset(lx60_fpga_reset, s);
 123     return s;
 124 }
 125
 126 static void lx60_net_init(MemoryRegion *address_space,
 127         hwaddr base,
 128         hwaddr descriptors,
 129         hwaddr buffers,
 130         qemu_irq irq, NICInfo *nd)
 131 {
 132     DeviceState *dev;
 133     SysBusDevice *s;
 134     MemoryRegion *ram;
 135
 136     dev = qdev_create(NULL, "open_eth");
 137     qdev_set_nic_properties(dev, nd);
 138     qdev_init_nofail(dev);
 139
 140     s = SYS_BUS_DEVICE(dev);
 141     sysbus_connect_irq(s, 0, irq);
 142     memory_region_add_subregion(address_space, base,
 143             sysbus_mmio_get_region(s, 0));
 144     memory_region_add_subregion(address_space, descriptors,
 145             sysbus_mmio_get_region(s, 1));
 146
 147     ram = g_malloc(sizeof(*ram));
 148     memory_region_init_ram(ram, OBJECT(s), "open_eth.ram", 16384,
 149                            &error_fatal);
 150     vmstate_register_ram_global(ram);
 151     memory_region_add_subregion(address_space, buffers, ram);
 152 }
 153
 154 static pflash_t *xtfpga_flash_init(MemoryRegion *address_space,
 155                                    const LxBoardDesc *board,
 156                                    DriveInfo *dinfo, int be)
 157 {
 158     SysBusDevice *s;
 159     DeviceState *dev = qdev_create(NULL, "cfi.pflash01");
 160
 161     qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinfo),
 162                         &error_abort);
 163     qdev_prop_set_uint32(dev, "num-blocks",
 164                          board->flash_size / board->flash_sector_size);
 165     qdev_prop_set_uint64(dev, "sector-length", board->flash_sector_size);
 166     qdev_prop_set_uint8(dev, "width", 4);
 167     qdev_prop_set_bit(dev, "big-endian", be);
 168     qdev_prop_set_string(dev, "name", "lx60.io.flash");
 169     qdev_init_nofail(dev);
 170     s = SYS_BUS_DEVICE(dev);
 171     memory_region_add_subregion(address_space, board->flash_base,
 172                                 sysbus_mmio_get_region(s, 0));
 173     return OBJECT_CHECK(pflash_t, (dev), "cfi.pflash01");
 174 }
 175
 176 static uint64_t translate_phys_addr(void *opaque, uint64_t addr)
 177 {
 178     XtensaCPU *cpu = opaque;
 179
 180     return cpu_get_phys_page_debug(CPU(cpu), addr);
 181 }
 182
 183 static void lx60_reset(void *opaque)
 184 {
 185     XtensaCPU *cpu = opaque;
 186
 187     cpu_reset(CPU(cpu));
 188 }
 189
 190 static uint64_t lx60_io_read(void *opaque, hwaddr addr,
 191         unsigned size)
 192 {
 193     return 0;
 194 }
 195
 196 static void lx60_io_write(void *opaque, hwaddr addr,
 197         uint64_t val, unsigned size)
 198 {
 199 }
 200
 201 static const MemoryRegionOps lx60_io_ops = {
 202     .read = lx60_io_read,
 203     .write = lx60_io_write,
 204     .endianness = DEVICE_NATIVE_ENDIAN,
 205 };
 206
 207 static void lx_init(const LxBoardDesc *board, MachineState *machine)
 208 {
 209 #ifdef TARGET_WORDS_BIGENDIAN
 210     int be = 1;
 211 #else
 212     int be = 0;
 213 #endif
 214     MemoryRegion *system_memory = get_system_memory();
 215     XtensaCPU *cpu = NULL;
 216     CPUXtensaState *env = NULL;
 217     MemoryRegion *ram, *rom, *system_io;
 218     DriveInfo *dinfo;
 219     pflash_t *flash = NULL;
 220     QemuOpts *machine_opts = qemu_get_machine_opts();
 221     const char *cpu_model = machine->cpu_model;
 222     const char *kernel_filename = qemu_opt_get(machine_opts, "kernel");
 223     const char *kernel_cmdline = qemu_opt_get(machine_opts, "append");
 224     const char *dtb_filename = qemu_opt_get(machine_opts, "dtb");
 225     const char *initrd_filename = qemu_opt_get(machine_opts, "initrd");
 226     int n;
 227
 228     if (!cpu_model) {
 229         cpu_model = XTENSA_DEFAULT_CPU_MODEL;
 230     }
 231
 232     for (n = 0; n < smp_cpus; n++) {
 233         cpu = cpu_xtensa_init(cpu_model);
 234         if (cpu == NULL) {
 235             error_report("unable to find CPU definition '%s'",
 236                          cpu_model);
 237             exit(EXIT_FAILURE);
 238         }
 239         env = &cpu->env;
 240
 241         env->sregs[PRID] = n;
 242         qemu_register_reset(lx60_reset, cpu);
 243         /* Need MMU initialized prior to ELF loading,
 244          * so that ELF gets loaded into virtual addresses
 245          */
 246         cpu_reset(CPU(cpu));
 247     }
 248
 249     ram = g_malloc(sizeof(*ram));
 250     memory_region_init_ram(ram, NULL, "lx60.dram", machine->ram_size,
 251                            &error_fatal);
 252     vmstate_register_ram_global(ram);
 253     memory_region_add_subregion(system_memory, 0, ram);
 254
 255     system_io = g_malloc(sizeof(*system_io));
 256     memory_region_init_io(system_io, NULL, &lx60_io_ops, NULL, "lx60.io",
 257                           224 * 1024 * 1024);
 258     memory_region_add_subregion(system_memory, 0xf0000000, system_io);
 259     lx60_fpga_init(system_io, 0x0d020000);
 260     if (nd_table[0].used) {
 261         lx60_net_init(system_io, 0x0d030000, 0x0d030400, 0x0d800000,
 262                 xtensa_get_extint(env, 1), nd_table);
 263     }
 264
 265     if (!serial_hds[0]) {
 266         serial_hds[0] = qemu_chr_new("serial0", "null", NULL);
 267     }
 268
 269     serial_mm_init(system_io, 0x0d050020, 2, xtensa_get_extint(env, 0),
 270             115200, serial_hds[0], DEVICE_NATIVE_ENDIAN);
 271
 272     dinfo = drive_get(IF_PFLASH, 0, 0);
 273     if (dinfo) {
 274         flash = xtfpga_flash_init(system_io, board, dinfo, be);
 275     }
 276
 277     /* Use presence of kernel file name as 'boot from SRAM' switch. */
 278     if (kernel_filename) {
 279         uint32_t entry_point = env->pc;
 280         size_t bp_size = 3 * get_tag_size(0); /* first/last and memory tags */
 281         uint32_t tagptr = 0xfe000000 + board->sram_size;
 282         uint32_t cur_tagptr;
 283         BpMemInfo memory_location = {
 284             .type = tswap32(MEMORY_TYPE_CONVENTIONAL),
 285             .start = tswap32(0),
 286             .end = tswap32(machine->ram_size),
 287         };
 288         uint32_t lowmem_end = machine->ram_size < 0x08000000 ?
 289             machine->ram_size : 0x08000000;
 290         uint32_t cur_lowmem = QEMU_ALIGN_UP(lowmem_end / 2, 4096);
 291
 292         rom = g_malloc(sizeof(*rom));
 293         memory_region_init_ram(rom, NULL, "lx60.sram", board->sram_size,
 294                                &error_fatal);
 295         vmstate_register_ram_global(rom);
 296         memory_region_add_subregion(system_memory, 0xfe000000, rom);
 297
 298         if (kernel_cmdline) {
 299             bp_size += get_tag_size(strlen(kernel_cmdline) + 1);
 300         }
 301         if (dtb_filename) {
 302             bp_size += get_tag_size(sizeof(uint32_t));
 303         }
 304         if (initrd_filename) {
 305             bp_size += get_tag_size(sizeof(BpMemInfo));
 306         }
 307
 308         /* Put kernel bootparameters to the end of that SRAM */
 309         tagptr = (tagptr - bp_size) & ~0xff;
 310         cur_tagptr = put_tag(tagptr, BP_TAG_FIRST, 0, NULL);
 311         cur_tagptr = put_tag(cur_tagptr, BP_TAG_MEMORY,
 312                              sizeof(memory_location), &memory_location);
 313
 314         if (kernel_cmdline) {
 315             cur_tagptr = put_tag(cur_tagptr, BP_TAG_COMMAND_LINE,
 316                                  strlen(kernel_cmdline) + 1, kernel_cmdline);
 317         }
 318         if (dtb_filename) {
 319             int fdt_size;
 320             void *fdt = load_device_tree(dtb_filename, &fdt_size);
 321             uint32_t dtb_addr = tswap32(cur_lowmem);
 322
 323             if (!fdt) {
 324                 error_report("could not load DTB '%s'", dtb_filename);
 325                 exit(EXIT_FAILURE);
 326             }
 327
 328             cpu_physical_memory_write(cur_lowmem, fdt, fdt_size);
 329             cur_tagptr = put_tag(cur_tagptr, BP_TAG_FDT,
 330                                  sizeof(dtb_addr), &dtb_addr);
 331             cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + fdt_size, 4096);
 332         }
 333         if (initrd_filename) {
 334             BpMemInfo initrd_location = { 0 };
 335             int initrd_size = load_ramdisk(initrd_filename, cur_lowmem,
 336                                            lowmem_end - cur_lowmem);
 337
 338             if (initrd_size < 0) {
 339                 initrd_size = load_image_targphys(initrd_filename,
 340                                                   cur_lowmem,
 341                                                   lowmem_end - cur_lowmem);
 342             }
 343             if (initrd_size < 0) {
 344                 error_report("could not load initrd '%s'", initrd_filename);
 345                 exit(EXIT_FAILURE);
 346             }
 347             initrd_location.start = tswap32(cur_lowmem);
 348             initrd_location.end = tswap32(cur_lowmem + initrd_size);
 349             cur_tagptr = put_tag(cur_tagptr, BP_TAG_INITRD,
 350                                  sizeof(initrd_location), &initrd_location);
 351             cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + initrd_size, 4096);
 352         }
 353         cur_tagptr = put_tag(cur_tagptr, BP_TAG_LAST, 0, NULL);
 354         env->regs[2] = tagptr;
 355
 356         uint64_t elf_entry;
 357         uint64_t elf_lowaddr;
 358         int success = load_elf(kernel_filename, translate_phys_addr, cpu,
 359                 &elf_entry, &elf_lowaddr, NULL, be, EM_XTENSA, 0, 0);
 360         if (success > 0) {
 361             entry_point = elf_entry;
 362         } else {
 363             hwaddr ep;
 364             int is_linux;
 365             success = load_uimage(kernel_filename, &ep, NULL, &is_linux,
 366                                   translate_phys_addr, cpu);
 367             if (success > 0 && is_linux) {
 368                 entry_point = ep;
 369             } else {
 370                 error_report("could not load kernel '%s'",
 371                              kernel_filename);
 372                 exit(EXIT_FAILURE);
 373             }
 374         }
 375         if (entry_point != env->pc) {
 376             static const uint8_t jx_a0[] = {
 377 #ifdef TARGET_WORDS_BIGENDIAN
 378                 0x0a, 0, 0,
 379 #else
 380                 0xa0, 0, 0,
 381 #endif
 382             };
 383             env->regs[0] = entry_point;
 384             cpu_physical_memory_write(env->pc, jx_a0, sizeof(jx_a0));
 385         }
 386     } else {
 387         if (flash) {
 388             MemoryRegion *flash_mr = pflash_cfi01_get_memory(flash);
 389             MemoryRegion *flash_io = g_malloc(sizeof(*flash_io));
 390
 391             memory_region_init_alias(flash_io, NULL, "lx60.flash",
 392                     flash_mr, board->flash_boot_base,
 393                     board->flash_size - board->flash_boot_base < 0x02000000 ?
 394                     board->flash_size - board->flash_boot_base : 0x02000000);
 395             memory_region_add_subregion(system_memory, 0xfe000000,
 396                     flash_io);
 397         }
 398     }
 399 }
 400
 401 static void xtensa_lx60_init(MachineState *machine)
 402 {
 403     static const LxBoardDesc lx60_board = {
 404         .flash_base = 0x08000000,
 405         .flash_size = 0x00400000,
 406         .flash_sector_size = 0x10000,
 407         .sram_size = 0x20000,
 408     };
 409     lx_init(&lx60_board, machine);
 410 }
 411
 412 static void xtensa_lx200_init(MachineState *machine)
 413 {
 414     static const LxBoardDesc lx200_board = {
 415         .flash_base = 0x08000000,
 416         .flash_size = 0x01000000,
 417         .flash_sector_size = 0x20000,
 418         .sram_size = 0x2000000,
 419     };
 420     lx_init(&lx200_board, machine);
 421 }
 422
 423 static void xtensa_ml605_init(MachineState *machine)
 424 {
 425     static const LxBoardDesc ml605_board = {
 426         .flash_base = 0x08000000,
 427         .flash_size = 0x01000000,
 428         .flash_sector_size = 0x20000,
 429         .sram_size = 0x2000000,
 430     };
 431     lx_init(&ml605_board, machine);
 432 }
 433
 434 static void xtensa_kc705_init(MachineState *machine)
 435 {
 436     static const LxBoardDesc kc705_board = {
 437         .flash_base = 0x00000000,
 438         .flash_size = 0x08000000,
 439         .flash_boot_base = 0x06000000,
 440         .flash_sector_size = 0x20000,
 441         .sram_size = 0x2000000,
 442     };
 443     lx_init(&kc705_board, machine);
 444 }
 445
 446 static void xtensa_lx60_class_init(ObjectClass *oc, void *data)
 447 {
 448     MachineClass *mc = MACHINE_CLASS(oc);
 449
 450     mc->desc = "lx60 EVB (" XTENSA_DEFAULT_CPU_MODEL ")";
 451     mc->init = xtensa_lx60_init;
 452     mc->max_cpus = 4;
 453 }
 454
 455 static const TypeInfo xtensa_lx60_type = {
 456     .name = MACHINE_TYPE_NAME("lx60"),
 457     .parent = TYPE_MACHINE,
 458     .class_init = xtensa_lx60_class_init,
 459 };
 460
 461 static void xtensa_lx200_class_init(ObjectClass *oc, void *data)
 462 {
 463     MachineClass *mc = MACHINE_CLASS(oc);
 464
 465     mc->desc = "lx200 EVB (" XTENSA_DEFAULT_CPU_MODEL ")";
 466     mc->init = xtensa_lx200_init;
 467     mc->max_cpus = 4;
 468 }
 469
 470 static const TypeInfo xtensa_lx200_type = {
 471     .name = MACHINE_TYPE_NAME("lx200"),
 472     .parent = TYPE_MACHINE,
 473     .class_init = xtensa_lx200_class_init,
 474 };
 475
 476 static void xtensa_ml605_class_init(ObjectClass *oc, void *data)
 477 {
 478     MachineClass *mc = MACHINE_CLASS(oc);
 479
 480     mc->desc = "ml605 EVB (" XTENSA_DEFAULT_CPU_MODEL ")";
 481     mc->init = xtensa_ml605_init;
 482     mc->max_cpus = 4;
 483 }
 484
 485 static const TypeInfo xtensa_ml605_type = {
 486     .name = MACHINE_TYPE_NAME("ml605"),
 487     .parent = TYPE_MACHINE,
 488     .class_init = xtensa_ml605_class_init,
 489 };
 490
 491 static void xtensa_kc705_class_init(ObjectClass *oc, void *data)
 492 {
 493     MachineClass *mc = MACHINE_CLASS(oc);
 494
 495     mc->desc = "kc705 EVB (" XTENSA_DEFAULT_CPU_MODEL ")";
 496     mc->init = xtensa_kc705_init;
 497     mc->max_cpus = 4;
 498 }
 499
 500 static const TypeInfo xtensa_kc705_type = {
 501     .name = MACHINE_TYPE_NAME("kc705"),
 502     .parent = TYPE_MACHINE,
 503     .class_init = xtensa_kc705_class_init,
 504 };
 505
 506 static void xtensa_lx_machines_init(void)
 507 {
 508     type_register_static(&xtensa_lx60_type);
 509     type_register_static(&xtensa_lx200_type);
 510     type_register_static(&xtensa_ml605_type);
 511     type_register_static(&xtensa_kc705_type);
 512 }
 513
 514 type_init(xtensa_lx_machines_init)