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arm: mvebu: Move CONFIG_SYS_TEXT_BASE to an address < 16 MiB
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1 /*
2 * (C) Copyright 2005
3 * ARM Ltd.
4 * Peter Pearse, <Peter.Pearse@arm.com>
5 * Configuration for ARM Core Modules.
6 * No standalonw port yet available
7 * - this file is included by both integratorap.h & integratorcp.h
8 *
9 * SPDX-License-Identifier: GPL-2.0+
10 */
11
12 #ifndef __ARMCOREMODULE_H
13 #define __ARMCOREMODULE_H
14
15 #define CM_BASE 0x10000000
16
17 /* CM registers common to all CMs */
18 /* Note that observed values after reboot into the ARM Boot Monitor
19 have been used as defaults, rather than the POR values */
20 #define OS_CTRL 0x0000000C
21 #define CMMASK_REMAP 0x00000005 /* set remap & led */
22 #define CMMASK_RESET 0x00000008
23 #define OS_LOCK 0x00000014
24 #define CMVAL_LOCK1 0x0000A000 /* locking value */
25 #define CMVAL_LOCK2 0x0000005F /* locking value */
26 #define CMVAL_UNLOCK 0x00000000 /* any value != CM_LOCKVAL */
27 #define OS_SDRAM 0x00000020
28 #define OS_INIT 0x00000024
29 #define CMMASK_MAP_SIMPLE 0xFFFDFFFF /* simple mapping */
30 #define CMMASK_TCRAM_DISABLE 0xFFFEFFFF /* TCRAM disabled */
31 #define CMMASK_LOWVEC 0x00000000 /* vectors @ 0x00000000 */
32 #define CMMASK_LE 0xFFFFFFF7 /* little endian */
33 #define CMMASK_CMxx6_COMMON 0x00000013 /* Common value for CMxx6 */
34 /* - observed reset value of */
35 /* CM926EJ-S */
36 /* CM1136-EJ-S */
37
38 #if defined (CONFIG_CM10200E) || defined (CONFIG_CM10220E)
39 #define CMMASK_INIT_102 0x00000300 /* see CM102xx ref manual */
40 /* - PLL test clock bypassed */
41 /* - bus clock ratio 2 */
42 /* - little endian */
43 /* - vectors at zero */
44 #endif /* CM1022xx */
45
46 /* Determine CM characteristics */
47
48 #undef CONFIG_CM_MULTIPLE_SSRAM
49 #undef CONFIG_CM_SPD_DETECT
50 #undef CONFIG_CM_REMAP
51 #undef CONFIG_CM_INIT
52 #undef CONFIG_CM_TCRAM
53
54 #if defined (CONFIG_CM946E_S) || defined (CONFIG_CM966E_S)
55 #define CONFIG_CM_MULTIPLE_SSRAM /* CM has multiple SSRAM mapping */
56 #endif
57
58 /* Excalibur core module has reduced functionality */
59 #ifndef CONFIG_CM922T_XA10
60 #define CONFIG_CM_SPD_DETECT /* CM supports SPD query */
61 #define OS_SPD 0x00000100 /* Address of SPD data */
62 #define CONFIG_CM_REMAP /* CM supports remapping */
63 #define CONFIG_CM_INIT /* CM has initialization reg */
64 #endif /* NOT EXCALIBUR */
65
66 #if defined(CONFIG_CM926EJ_S) || defined (CONFIG_CM946E_S) || \
67 defined(CONFIG_CM966E_S) || defined (CONFIG_CM1026EJ_S) || \
68 defined(CONFIG_CM1136JF_S)
69 #define CONFIG_CM_TCRAM /* CM has TCRAM */
70 #endif
71
72 #ifdef CONFIG_CM_SPD_DETECT
73 #define OS_SPD 0x00000100 /* The SDRAM SPD data is copied here */
74 #endif
75
76 #endif /* __ARMCOREMODULE_H */