]> git.ipfire.org Git - thirdparty/kernel/stable.git/blob - include/asm-arm/arch-epxa10db/tdkphy.h
Linux-2.6.12-rc2
[thirdparty/kernel/stable.git] / include / asm-arm / arch-epxa10db / tdkphy.h
1 /*
2 * linux/drivers/tdkphy.h
3 *
4 * Copyright (C) 2001 Altera Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21 #ifndef __TDKPHY_H
22 #define __TDKPHY_H
23
24 /*
25 * Register definitions for the TDK 78Q2120 PHY
26 * which is on the Camelot board
27 */
28
29 /*
30 * Copyright (c) Altera Corporation 2000.
31 * All rights reserved.
32 */
33 #define PHY_CONTROL (0)
34 #define PHY_CONTROL_COLT_MSK (0x80)
35 #define PHY_CONTROL_COLT_OFST (7)
36 #define PHY_CONTROL_DUPLEX_MSK (0x100)
37 #define PHY_CONTROL_DUPLEX_OFST (8)
38 #define PHY_CONTROL_RANEG_MSK (0x200)
39 #define PHY_CONTROL_RANEG_OFST (9)
40 #define PHY_CONTROL_ISO_MSK (0x400)
41 #define PHY_CONTROL_ISO_OFST (10)
42 #define PHY_CONTROL_PWRDN_MSK (0x800)
43 #define PHY_CONTROL_PWRDN_OFST (11)
44 #define PHY_CONTROL_ANEGEN_MSK (0x1000)
45 #define PHY_CONTROL_ANEGEN_OFST (12)
46 #define PHY_CONTROL_SPEEDSL_MSK (0x2000)
47 #define PHY_CONTROL_SPEEDSL_OFST (13)
48 #define PHY_CONTROL_LOOPBK_MSK (0x4000)
49 #define PHY_CONTROL_LOOPBK_OFST (14)
50 #define PHY_CONTROL_RESET_MSK (0x8000)
51 #define PHY_CONTROL_RESET_OFST (15)
52
53 #define PHY_STATUS (1)
54 #define PHY_STATUS_ETXD_MSK (0x1)
55 #define PHY_STATUS_EXTD_OFST (0)
56 #define PHY_STATUS_JAB_MSK (0x2)
57 #define PHY_STATUS_JAB_OFST (1)
58 #define PHY_STATUS_LINK_MSK (0x4)
59 #define PHY_STATUS_LINK_OFST (2)
60 #define PHY_STATUS_ANEGA_MSK (0x8)
61 #define PHY_STATUS_ANEGA_OFST (3)
62 #define PHY_STATUS_RFAULT_MSK (0x10)
63 #define PHY_STATUS_RFAULT_OFST (4)
64 #define PHY_STATUS_ANEGC_MSK (0x20)
65 #define PHY_STATUS_ANEGC_OFST (5)
66 #define PHY_STATUS_10T_H_MSK (0x800)
67 #define PHY_STATUS_10T_H_OFST (11)
68 #define PHY_STATUS_10T_F_MSK (0x1000)
69 #define PHY_STATUS_10T_F_OFST (12)
70 #define PHY_STATUS_100_X_H_MSK (0x2000)
71 #define PHY_STATUS_100_X_H_OFST (13)
72 #define PHY_STATUS_100_X_F_MSK (0x4000)
73 #define PHY_STATUS_100_X_F_OFST (14)
74 #define PHY_STATUS_100T4_MSK (0x8000)
75 #define PHY_STATUS_100T4_OFST (15)
76
77 #define PHY_ID1 (2)
78 #define PHY_ID1_OUI_MSK (0xFFFF)
79 #define PHY_ID1_OUI_OFST (0)
80
81 #define PHY_ID2 (3)
82 #define PHY_ID2_RN_MSK (0xF)
83 #define PHY_ID2_RN_OFST (0)
84 #define PHY_ID2_MN_MSK (0x3F0)
85 #define PHY_ID2_MN_OFST (4)
86 #define PHY_ID2_OUI_MSK (0xFC00)
87 #define PHY_ID2_OUI_OFST (10)
88
89 #define PHY_AUTO_NEG_ADVERTISEMENT (4)
90 #define PHY_AUTO_NEG_ADVERTISEMENT_SELECTOR_MSK (0x1F)
91 #define PHY_AUTO_NEG_ADVERTISEMENT_SELECTOR_OFST (0)
92 #define PHY_AUTO_NEG_ADVERTISEMENT_A0_MSK (0x20)
93 #define PHY_AUTO_NEG_ADVERTISEMENT_A0_OFST (5)
94 #define PHY_AUTO_NEG_ADVERTISEMENT_A1_MSK (0x40)
95 #define PHY_AUTO_NEG_ADVERTISEMENT_A1_OFST (6)
96 #define PHY_AUTO_NEG_ADVERTISEMENT_A2_MSK (0x80)
97 #define PHY_AUTO_NEG_ADVERTISEMENT_A2_OFST (7)
98 #define PHY_AUTO_NEG_ADVERTISEMENT_A3_MSK (0x100)
99 #define PHY_AUTO_NEG_ADVERTISEMENT_A3_OFST (8)
100 #define PHY_AUTO_NEG_ADVERTISEMENT_A4_MSK (0x200)
101 #define PHY_AUTO_NEG_ADVERTISEMENT_A4_OFST (9)
102 #define PHY_AUTO_NEG_ADVERTISEMENT_TAF_MSK (0x1FE0)
103 #define PHY_AUTO_NEG_ADVERTISEMENT_TAF_OFST (5)
104 #define PHY_AUTO_NEG_ADVERTISEMENT_RF_MSK (0x2000)
105 #define PHY_AUTO_NEG_ADVERTISEMENT_RF_OFST (13)
106 #define PHY_AUTO_NEG_ADVERTISEMENT_RSVD_MSK (0x4000)
107 #define PHY_AUTO_NEG_ADVERTISEMENT_RVSD_OFST (14)
108 #define PHY_AUTO_NEG_ADVERTISEMENT_NP_MSK (0x8000)
109 #define PHY_AUTO_NEG_ADVERTISEMENT_NP_OFST (15)
110
111 #define PHY_AUTO_NEG_LINK_PARTNER (5)
112 #define PHY_AUTO_NEG_LINK_PARTNER_S4_MSK (0x1F)
113 #define PHY_AUTO_NEG_LINK_PARTNER_S4_OFST (0)
114 #define PHY_AUTO_NEG_LINK_PARTNER_A7_MSK (0x1FE0)
115 #define PHY_AUTO_NEG_LINK_PARTNER_A7_OFST (5)
116 #define PHY_AUTO_NEG_LINK_PARTNER_RF_MSK (0x2000)
117 #define PHY_AUTO_NEG_LINK_PARTNER_RF_OFST (13)
118 #define PHY_AUTO_NEG_LINK_PARTNER_ACK_MSK (0x4000)
119 #define PHY_AUTO_NEG_LINK_PARTNER_ACK_OFST (14)
120 #define PHY_AUTO_NEG_LINK_PARTNER_NP_MSK (0x8000)
121 #define PHY_AUTO_NEG_LINK_PARTNER_NP_OFST (15)
122
123 #define PHY_AUTO_NEG_EXPANSION (6)
124 #define PHY_AUTO_NEG_EXPANSION_LPANEGA_MSK (0x1)
125 #define PHY_AUTO_NEG_EXPANSION_LPANEGA_OFST (0)
126 #define PHY_AUTO_NEG_EXPANSION_PRX_MSK (0x2)
127 #define PHY_AUTO_NEG_EXPANSION_PRX_OFST (1)
128 #define PHY_AUTO_NEG_EXPANSION_NPA_MSK (0x4)
129 #define PHY_AUTO_NEG_EXPANSION_NPA_OFST (2)
130 #define PHY_AUTO_NEG_EXPANSION_LPNPA_MSK (0x8)
131 #define PHY_AUTO_NEG_EXPANSION_LPNPA_OFST (3)
132 #define PHY_AUTO_NEG_EXPANSION_PDF_MSK (0x10)
133 #define PHY_AUTO_NEG_EXPANSION_PDF_OFST (4)
134
135 #define PHY_VENDOR_SPECIFIC (16)
136 #define PHY_VENDOR_SPECIFIC_RXCC_MSK (0x1)
137 #define PHY_VENDOR_SPECIFIC_RXCC_OFST (0)
138 #define PHY_VENDOR_SPECIFIC_PCSBP_MSK (0x2)
139 #define PHY_VENDOR_SPECIFIC_PCSBP_OFST (1)
140 #define PHY_VENDOR_SPECIFIC_RVSPOL_MSK (0x10)
141 #define PHY_VENDOR_SPECIFIC_RVSPOL_OFST (4)
142 #define PHY_VENDOR_SPECIFIC_APOL_MSK (0x20)
143 #define PHY_VENDOR_SPECIFIC_APOL_OFST (5)
144 #define PHY_VENDOR_SPECIFIC_GPIO0_DIR_MSK (0x40)
145 #define PHY_VENDOR_SPECIFIC_GPIO0_DIR_OFST (6)
146 #define PHY_VENDOR_SPECIFIC_GPIO0_DAT_MSK (0x80)
147 #define PHY_VENDOR_SPECIFIC_GPIO0_DAT_OFST (7)
148 #define PHY_VENDOR_SPECIFIC_GPIO1_DIR_MSK (0x100)
149 #define PHY_VENDOR_SPECIFIC_GPIO1_DIR_OFST (8)
150 #define PHY_VENDOR_SPECIFIC_GPIO1_DAT_MSK (0x200)
151 #define PHY_VENDOR_SPECIFIC_GPIO1_DAT_OFST (9)
152 #define PHY_VENDOR_SPECIFIC_10BT_NATURAL_LOOPBACK_DAT_MSK (0x400)
153 #define PHY_VENDOR_SPECIFIC_10BT_NATURAL_LOOPBACK_DAT_OFST (10)
154 #define PHY_VENDOR_SPECIFIC_10BT_SQE_TEST_INHIBIT_MSK (0x800)
155 #define PHY_VENDOR_SPECIFIC_10BT_SQE_TEST_INHIBIT_OFST (11)
156 #define PHY_VENDOR_SPECIFIC_TXHIM_MSK (0x1000)
157 #define PHY_VENDOR_SPECIFIC_TXHIM_OFST (12)
158 #define PHY_VENDOR_SPECIFIC_INT_LEVEL_MSK (0x4000)
159 #define PHY_VENDOR_SPECIFIC_INT_LEVEL_OFST (14)
160 #define PHY_VENDOR_SPECIFIC_RPTR_MSK (0x8000)
161 #define PHY_VENDOR_SPECIFIC_RPTR_OFST (15)
162
163 #define PHY_IRQ_CONTROL (17)
164 #define PHY_IRQ_CONTROL_ANEG_COMP_INT_MSK (0x1)
165 #define PHY_IRQ_CONTROL_ANEG_COMP_INT_OFST (0)
166 #define PHY_IRQ_CONTROL_RFAULT_INT_MSK (0x2)
167 #define PHY_IRQ_CONTROL_RFAULT_INT_OFST (1)
168 #define PHY_IRQ_CONTROL_LS_CHG_INT_MSK (0x4)
169 #define PHY_IRQ_CONTROL_LS_CHG_INT_OFST (2)
170 #define PHY_IRQ_CONTROL_LP_ACK_INT_MSK (0x8)
171 #define PHY_IRQ_CONTROL_LP_ACK_INT_OFST (3)
172 #define PHY_IRQ_CONTROL_PDF_INT_MSK (0x10)
173 #define PHY_IRQ_CONTROL_PDF_INT_OFST (4)
174 #define PHY_IRQ_CONTROL_PRX_INT_MSK (0x20)
175 #define PHY_IRQ_CONTROL_PRX_INT_OFST (5)
176 #define PHY_IRQ_CONTROL_RXER_INT_MSK (0x40)
177 #define PHY_IRQ_CONTROL_RXER_INT_OFST (6)
178 #define PHY_IRQ_CONTROL_JABBER_INT_MSK (0x80)
179 #define PHY_IRQ_CONTROL_JABBER_INT_OFST (7)
180 #define PHY_IRQ_CONTROL_ANEG_COMP_IE_MSK (0x100)
181 #define PHY_IRQ_CONTROL_ANEG_COMP_IE_OFST (8)
182 #define PHY_IRQ_CONTROL_RFAULT_IE_MSK (0x200)
183 #define PHY_IRQ_CONTROL_RFAULT_IE_OFST (9)
184 #define PHY_IRQ_CONTROL_LS_CHG_IE_MSK (0x400)
185 #define PHY_IRQ_CONTROL_LS_CHG_IE_OFST (10)
186 #define PHY_IRQ_CONTROL_LP_ACK_IE_MSK (0x800)
187 #define PHY_IRQ_CONTROL_LP_ACK_IE_OFST (11)
188 #define PHY_IRQ_CONTROL_PDF_IE_MSK (0x1000)
189 #define PHY_IRQ_CONTROL_PDF_IE_OFST (12)
190 #define PHY_IRQ_CONTROL_PRX_IE_MSK (0x2000)
191 #define PHY_IRQ_CONTROL_PRX_IE_OFST (13)
192 #define PHY_IRQ_CONTROL_RXER_IE_MSK (0x4000)
193 #define PHY_IRQ_CONTROL_RXER_IE_OFST (14)
194 #define PHY_IRQ_CONTROL_JABBER_IE_MSK (0x8000)
195 #define PHY_IRQ_CONTROL_JABBER_IE_OFST (15)
196
197 #define PHY_DIAGNOSTIC (18)
198 #define PHY_DIAGNOSTIC_RX_LOCK_MSK (0x100)
199 #define PHY_DIAGNOSTIC_RX_LOCK_OFST (8)
200 #define PHY_DIAGNOSTIC_RX_PASS_MSK (0x200)
201 #define PHY_DIAGNOSTIC_RX_PASS_OFST (9)
202 #define PHY_DIAGNOSTIC_RATE_MSK (0x400)
203 #define PHY_DIAGNOSTIC_RATE_OFST (10)
204 #define PHY_DIAGNOSTIC_DPLX_MSK (0x800)
205 #define PHY_DIAGNOSTIC_DPLX_OFST (11)
206 #define PHY_DIAGNOSTIC_ANEGF_MSK (0x1000)
207 #define PHY_DIAGNOSTIC_ANEGF_OFST (12)
208
209 #endif /* __TDKPHY_H */