include/asm-powerpc/mmu.h

   1 #ifndef _ASM_POWERPC_MMU_H_
   2 #define _ASM_POWERPC_MMU_H_
   3
   4 #ifndef CONFIG_PPC64
   5 #include <asm-ppc/mmu.h>
   6 #else
   7
   8 /*
   9  * PowerPC memory management structures
  10  *
  11  * Dave Engebretsen & Mike Corrigan <{engebret|mikejc}@us.ibm.com>
  12  *   PPC64 rework.
  13  *
  14  * This program is free software; you can redistribute it and/or
  15  * modify it under the terms of the GNU General Public License
  16  * as published by the Free Software Foundation; either version
  17  * 2 of the License, or (at your option) any later version.
  18  */
  19
  20 #include <asm/asm-compat.h>
  21 #include <asm/page.h>
  22
  23 /*
  24  * Segment table
  25  */
  26
  27 #define STE_ESID_V      0x80
  28 #define STE_ESID_KS     0x20
  29 #define STE_ESID_KP     0x10
  30 #define STE_ESID_N      0x08
  31
  32 #define STE_VSID_SHIFT  12
  33
  34 /* Location of cpu0's segment table */
  35 #define STAB0_PAGE      0x6
  36 #define STAB0_PHYS_ADDR (STAB0_PAGE<<12)
  37
  38 #ifndef __ASSEMBLY__
  39 extern char initial_stab[];
  40 #endif /* ! __ASSEMBLY */
  41
  42 /*
  43  * SLB
  44  */
  45
  46 #define SLB_NUM_BOLTED          3
  47 #define SLB_CACHE_ENTRIES       8
  48
  49 /* Bits in the SLB ESID word */
  50 #define SLB_ESID_V              ASM_CONST(0x0000000008000000) /* valid */
  51
  52 /* Bits in the SLB VSID word */
  53 #define SLB_VSID_SHIFT          12
  54 #define SLB_VSID_B              ASM_CONST(0xc000000000000000)
  55 #define SLB_VSID_B_256M         ASM_CONST(0x0000000000000000)
  56 #define SLB_VSID_B_1T           ASM_CONST(0x4000000000000000)
  57 #define SLB_VSID_KS             ASM_CONST(0x0000000000000800)
  58 #define SLB_VSID_KP             ASM_CONST(0x0000000000000400)
  59 #define SLB_VSID_N              ASM_CONST(0x0000000000000200) /* no-execute */
  60 #define SLB_VSID_L              ASM_CONST(0x0000000000000100)
  61 #define SLB_VSID_C              ASM_CONST(0x0000000000000080) /* class */
  62 #define SLB_VSID_LP             ASM_CONST(0x0000000000000030)
  63 #define SLB_VSID_LP_00          ASM_CONST(0x0000000000000000)
  64 #define SLB_VSID_LP_01          ASM_CONST(0x0000000000000010)
  65 #define SLB_VSID_LP_10          ASM_CONST(0x0000000000000020)
  66 #define SLB_VSID_LP_11          ASM_CONST(0x0000000000000030)
  67 #define SLB_VSID_LLP            (SLB_VSID_L|SLB_VSID_LP)
  68
  69 #define SLB_VSID_KERNEL         (SLB_VSID_KP)
  70 #define SLB_VSID_USER           (SLB_VSID_KP|SLB_VSID_KS|SLB_VSID_C)
  71
  72 #define SLBIE_C                 (0x08000000)
  73
  74 /*
  75  * Hash table
  76  */
  77
  78 #define HPTES_PER_GROUP 8
  79
  80 #define HPTE_V_AVPN_SHIFT       7
  81 #define HPTE_V_AVPN             ASM_CONST(0xffffffffffffff80)
  82 #define HPTE_V_AVPN_VAL(x)      (((x) & HPTE_V_AVPN) >> HPTE_V_AVPN_SHIFT)
  83 #define HPTE_V_COMPARE(x,y)     (!(((x) ^ (y)) & HPTE_V_AVPN))
  84 #define HPTE_V_BOLTED           ASM_CONST(0x0000000000000010)
  85 #define HPTE_V_LOCK             ASM_CONST(0x0000000000000008)
  86 #define HPTE_V_LARGE            ASM_CONST(0x0000000000000004)
  87 #define HPTE_V_SECONDARY        ASM_CONST(0x0000000000000002)
  88 #define HPTE_V_VALID            ASM_CONST(0x0000000000000001)
  89
  90 #define HPTE_R_PP0              ASM_CONST(0x8000000000000000)
  91 #define HPTE_R_TS               ASM_CONST(0x4000000000000000)
  92 #define HPTE_R_RPN_SHIFT        12
  93 #define HPTE_R_RPN              ASM_CONST(0x3ffffffffffff000)
  94 #define HPTE_R_FLAGS            ASM_CONST(0x00000000000003ff)
  95 #define HPTE_R_PP               ASM_CONST(0x0000000000000003)
  96 #define HPTE_R_N                ASM_CONST(0x0000000000000004)
  97
  98 /* Values for PP (assumes Ks=0, Kp=1) */
  99 /* pp0 will always be 0 for linux     */
 100 #define PP_RWXX 0       /* Supervisor read/write, User none */
 101 #define PP_RWRX 1       /* Supervisor read/write, User read */
 102 #define PP_RWRW 2       /* Supervisor read/write, User read/write */
 103 #define PP_RXRX 3       /* Supervisor read,       User read */
 104
 105 #ifndef __ASSEMBLY__
 106
 107 typedef struct {
 108         unsigned long v;
 109         unsigned long r;
 110 } hpte_t;
 111
 112 extern hpte_t *htab_address;
 113 extern unsigned long htab_hash_mask;
 114
 115 /*
 116  * Page size definition
 117  *
 118  *    shift : is the "PAGE_SHIFT" value for that page size
 119  *    sllp  : is a bit mask with the value of SLB L || LP to be or'ed
 120  *            directly to a slbmte "vsid" value
 121  *    penc  : is the HPTE encoding mask for the "LP" field:
 122  *
 123  */
 124 struct mmu_psize_def
 125 {
 126         unsigned int    shift;  /* number of bits */
 127         unsigned int    penc;   /* HPTE encoding */
 128         unsigned int    tlbiel; /* tlbiel supported for that page size */
 129         unsigned long   avpnm;  /* bits to mask out in AVPN in the HPTE */
 130         unsigned long   sllp;   /* SLB L||LP (exact mask to use in slbmte) */
 131 };
 132
 133 #endif /* __ASSEMBLY__ */
 134
 135 /*
 136  * The kernel use the constants below to index in the page sizes array.
 137  * The use of fixed constants for this purpose is better for performances
 138  * of the low level hash refill handlers.
 139  *
 140  * A non supported page size has a "shift" field set to 0
 141  *
 142  * Any new page size being implemented can get a new entry in here. Whether
 143  * the kernel will use it or not is a different matter though. The actual page
 144  * size used by hugetlbfs is not defined here and may be made variable
 145  */
 146
 147 #define MMU_PAGE_4K             0       /* 4K */
 148 #define MMU_PAGE_64K            1       /* 64K */
 149 #define MMU_PAGE_64K_AP         2       /* 64K Admixed (in a 4K segment) */
 150 #define MMU_PAGE_1M             3       /* 1M */
 151 #define MMU_PAGE_16M            4       /* 16M */
 152 #define MMU_PAGE_16G            5       /* 16G */
 153 #define MMU_PAGE_COUNT          6
 154
 155 #ifndef __ASSEMBLY__
 156
 157 /*
 158  * The current system page sizes
 159  */
 160 extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
 161 extern int mmu_linear_psize;
 162 extern int mmu_virtual_psize;
 163
 164 #ifdef CONFIG_HUGETLB_PAGE
 165 /*
 166  * The page size index of the huge pages for use by hugetlbfs
 167  */
 168 extern int mmu_huge_psize;
 169
 170 #endif /* CONFIG_HUGETLB_PAGE */
 171
 172 /*
 173  * This function sets the AVPN and L fields of the HPTE  appropriately
 174  * for the page size
 175  */
 176 static inline unsigned long hpte_encode_v(unsigned long va, int psize)
 177 {
 178         unsigned long v =
 179         v = (va >> 23) & ~(mmu_psize_defs[psize].avpnm);
 180         v <<= HPTE_V_AVPN_SHIFT;
 181         if (psize != MMU_PAGE_4K)
 182                 v |= HPTE_V_LARGE;
 183         return v;
 184 }
 185
 186 /*
 187  * This function sets the ARPN, and LP fields of the HPTE appropriately
 188  * for the page size. We assume the pa is already "clean" that is properly
 189  * aligned for the requested page size
 190  */
 191 static inline unsigned long hpte_encode_r(unsigned long pa, int psize)
 192 {
 193         unsigned long r;
 194
 195         /* A 4K page needs no special encoding */
 196         if (psize == MMU_PAGE_4K)
 197                 return pa & HPTE_R_RPN;
 198         else {
 199                 unsigned int penc = mmu_psize_defs[psize].penc;
 200                 unsigned int shift = mmu_psize_defs[psize].shift;
 201                 return (pa & ~((1ul << shift) - 1)) | (penc << 12);
 202         }
 203         return r;
 204 }
 205
 206 /*
 207  * This hashes a virtual address for a 256Mb segment only for now
 208  */
 209
 210 static inline unsigned long hpt_hash(unsigned long va, unsigned int shift)
 211 {
 212         return ((va >> 28) & 0x7fffffffffUL) ^ ((va & 0x0fffffffUL) >> shift);
 213 }
 214
 215 extern int __hash_page_4K(unsigned long ea, unsigned long access,
 216                           unsigned long vsid, pte_t *ptep, unsigned long trap,
 217                           unsigned int local);
 218 extern int __hash_page_64K(unsigned long ea, unsigned long access,
 219                            unsigned long vsid, pte_t *ptep, unsigned long trap,
 220                            unsigned int local);
 221 struct mm_struct;
 222 extern int hash_huge_page(struct mm_struct *mm, unsigned long access,
 223                           unsigned long ea, unsigned long vsid, int local);
 224
 225 extern void htab_finish_init(void);
 226 extern int htab_bolt_mapping(unsigned long vstart, unsigned long vend,
 227                              unsigned long pstart, unsigned long mode,
 228                              int psize);
 229
 230 extern void htab_initialize(void);
 231 extern void htab_initialize_secondary(void);
 232 extern void hpte_init_native(void);
 233 extern void hpte_init_lpar(void);
 234 extern void hpte_init_iSeries(void);
 235 extern void mm_init_ppc64(void);
 236
 237 extern long pSeries_lpar_hpte_insert(unsigned long hpte_group,
 238                                      unsigned long va, unsigned long prpn,
 239                                      unsigned long rflags,
 240                                      unsigned long vflags, int psize);
 241
 242 extern long native_hpte_insert(unsigned long hpte_group,
 243                                unsigned long va, unsigned long prpn,
 244                                unsigned long rflags,
 245                                unsigned long vflags, int psize);
 246
 247 extern long iSeries_hpte_insert(unsigned long hpte_group,
 248                                 unsigned long va, unsigned long prpn,
 249                                 unsigned long rflags,
 250                                 unsigned long vflags, int psize);
 251
 252 extern void stabs_alloc(void);
 253 extern void slb_initialize(void);
 254 extern void stab_initialize(unsigned long stab);
 255
 256 #endif /* __ASSEMBLY__ */
 257
 258 /*
 259  * VSID allocation
 260  *
 261  * We first generate a 36-bit "proto-VSID".  For kernel addresses this
 262  * is equal to the ESID, for user addresses it is:
 263  *      (context << 15) | (esid & 0x7fff)
 264  *
 265  * The two forms are distinguishable because the top bit is 0 for user
 266  * addresses, whereas the top two bits are 1 for kernel addresses.
 267  * Proto-VSIDs with the top two bits equal to 0b10 are reserved for
 268  * now.
 269  *
 270  * The proto-VSIDs are then scrambled into real VSIDs with the
 271  * multiplicative hash:
 272  *
 273  *      VSID = (proto-VSID * VSID_MULTIPLIER) % VSID_MODULUS
 274  *      where   VSID_MULTIPLIER = 268435399 = 0xFFFFFC7
 275  *              VSID_MODULUS = 2^36-1 = 0xFFFFFFFFF
 276  *
 277  * This scramble is only well defined for proto-VSIDs below
 278  * 0xFFFFFFFFF, so both proto-VSID and actual VSID 0xFFFFFFFFF are
 279  * reserved.  VSID_MULTIPLIER is prime, so in particular it is
 280  * co-prime to VSID_MODULUS, making this a 1:1 scrambling function.
 281  * Because the modulus is 2^n-1 we can compute it efficiently without
 282  * a divide or extra multiply (see below).
 283  *
 284  * This scheme has several advantages over older methods:
 285  *
 286  *      - We have VSIDs allocated for every kernel address
 287  * (i.e. everything above 0xC000000000000000), except the very top
 288  * segment, which simplifies several things.
 289  *
 290  *      - We allow for 15 significant bits of ESID and 20 bits of
 291  * context for user addresses.  i.e. 8T (43 bits) of address space for
 292  * up to 1M contexts (although the page table structure and context
 293  * allocation will need changes to take advantage of this).
 294  *
 295  *      - The scramble function gives robust scattering in the hash
 296  * table (at least based on some initial results).  The previous
 297  * method was more susceptible to pathological cases giving excessive
 298  * hash collisions.
 299  */
 300 /*
 301  * WARNING - If you change these you must make sure the asm
 302  * implementations in slb_allocate (slb_low.S), do_stab_bolted
 303  * (head.S) and ASM_VSID_SCRAMBLE (below) are changed accordingly.
 304  *
 305  * You'll also need to change the precomputed VSID values in head.S
 306  * which are used by the iSeries firmware.
 307  */
 308
 309 #define VSID_MULTIPLIER ASM_CONST(200730139)    /* 28-bit prime */
 310 #define VSID_BITS       36
 311 #define VSID_MODULUS    ((1UL<<VSID_BITS)-1)
 312
 313 #define CONTEXT_BITS    19
 314 #define USER_ESID_BITS  16
 315
 316 #define USER_VSID_RANGE (1UL << (USER_ESID_BITS + SID_SHIFT))
 317
 318 /*
 319  * This macro generates asm code to compute the VSID scramble
 320  * function.  Used in slb_allocate() and do_stab_bolted.  The function
 321  * computed is: (protovsid*VSID_MULTIPLIER) % VSID_MODULUS
 322  *
 323  *      rt = register continaing the proto-VSID and into which the
 324  *              VSID will be stored
 325  *      rx = scratch register (clobbered)
 326  *
 327  *      - rt and rx must be different registers
 328  *      - The answer will end up in the low 36 bits of rt.  The higher
 329  *        bits may contain other garbage, so you may need to mask the
 330  *        result.
 331  */
 332 #define ASM_VSID_SCRAMBLE(rt, rx)       \
 333         lis     rx,VSID_MULTIPLIER@h;                                   \
 334         ori     rx,rx,VSID_MULTIPLIER@l;                                \
 335         mulld   rt,rt,rx;               /* rt = rt * MULTIPLIER */      \
 336                                                                         \
 337         srdi    rx,rt,VSID_BITS;                                        \
 338         clrldi  rt,rt,(64-VSID_BITS);                                   \
 339         add     rt,rt,rx;               /* add high and low bits */     \
 340         /* Now, r3 == VSID (mod 2^36-1), and lies between 0 and         \
 341          * 2^36-1+2^28-1.  That in particular means that if r3 >=       \
 342          * 2^36-1, then r3+1 has the 2^36 bit set.  So, if r3+1 has     \
 343          * the bit clear, r3 already has the answer we want, if it      \
 344          * doesn't, the answer is the low 36 bits of r3+1.  So in all   \
 345          * cases the answer is the low 36 bits of (r3 + ((r3+1) >> 36))*/\
 346         addi    rx,rt,1;                                                \
 347         srdi    rx,rx,VSID_BITS;        /* extract 2^36 bit */          \
 348         add     rt,rt,rx
 349
 350
 351 #ifndef __ASSEMBLY__
 352
 353 typedef unsigned long mm_context_id_t;
 354
 355 typedef struct {
 356         mm_context_id_t id;
 357 #ifdef CONFIG_HUGETLB_PAGE
 358         u16 low_htlb_areas, high_htlb_areas;
 359 #endif
 360 } mm_context_t;
 361
 362
 363 static inline unsigned long vsid_scramble(unsigned long protovsid)
 364 {
 365 #if 0
 366         /* The code below is equivalent to this function for arguments
 367          * < 2^VSID_BITS, which is all this should ever be called
 368          * with.  However gcc is not clever enough to compute the
 369          * modulus (2^n-1) without a second multiply. */
 370         return ((protovsid * VSID_MULTIPLIER) % VSID_MODULUS);
 371 #else /* 1 */
 372         unsigned long x;
 373
 374         x = protovsid * VSID_MULTIPLIER;
 375         x = (x >> VSID_BITS) + (x & VSID_MODULUS);
 376         return (x + ((x+1) >> VSID_BITS)) & VSID_MODULUS;
 377 #endif /* 1 */
 378 }
 379
 380 /* This is only valid for addresses >= KERNELBASE */
 381 static inline unsigned long get_kernel_vsid(unsigned long ea)
 382 {
 383         return vsid_scramble(ea >> SID_SHIFT);
 384 }
 385
 386 /* This is only valid for user addresses (which are below 2^41) */
 387 static inline unsigned long get_vsid(unsigned long context, unsigned long ea)
 388 {
 389         return vsid_scramble((context << USER_ESID_BITS)
 390                              | (ea >> SID_SHIFT));
 391 }
 392
 393 #define VSID_SCRAMBLE(pvsid)    (((pvsid) * VSID_MULTIPLIER) % VSID_MODULUS)
 394 #define KERNEL_VSID(ea)         VSID_SCRAMBLE(GET_ESID(ea))
 395
 396 #endif /* __ASSEMBLY */
 397
 398 #endif /* CONFIG_PPC64 */
 399 #endif /* _ASM_POWERPC_MMU_H_ */