include/configs/CRAYL1.h

   1 /*
   2  * (C) Copyright 2000-2004
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  * David Updegraff, Cray, Inc.  dave@cray.com: our 405 is walnut-lite..
   5  *
   6  * See file CREDITS for list of people who contributed to this
   7  * project.
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License as
  11  * published by the Free Software Foundation; either version 2 of
  12  * the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22  * MA 02111-1307 USA
  23  */
  24 /*
  25  * board/config.h - configuration options, board specific
  26  */
  27
  28 #ifndef __CONFIG_H
  29 #define __CONFIG_H
  30
  31 #define CONFIG_CRAYL1
  32 /*
  33  * High Level Configuration Options
  34  * (easy to change)
  35  */
  36
  37 #define CONFIG_405GP            1       /* This is a PPC405 CPU */
  38 #define CONFIG_4xx                  1   /* ...member of PPC405 family */
  39 #define CONFIG_SYS_CLK_FREQ 25000000
  40 #define CONFIG_BAUDRATE         9600
  41 #define CONFIG_BOOTDELAY        5       /* autoboot after 5 seconds     */
  42
  43 #define CONFIG_PPC4xx_EMAC
  44 #define CONFIG_MII                  1   /* MII PHY management */
  45 #define CONFIG_PHY_ADDR         1       /* PHY address; handling of ENET */
  46 #define CONFIG_BOARD_EARLY_INIT_F 1     /* early setup for 405gp */
  47 #define CONFIG_MISC_INIT_R      1       /* so that a misc_init_r() is called */
  48 #define CONFIG_NET_MULTI
  49
  50 #define CONFIG_CONS_INDEX       1       /* Use UART0                    */
  51 #define CONFIG_SYS_NS16550
  52 #define CONFIG_SYS_NS16550_SERIAL
  53 #define CONFIG_SYS_NS16550_REG_SIZE     1
  54 #define CONFIG_SYS_NS16550_CLK          get_serial_clock()
  55
  56 /* set PRAM to keep U-Boot out, mem= to keep linux out, and initrd_hi to
  57  * keep possible initrd ramdisk decompression out.  This is in k (1024 bytes)
  58  #define CONFIG_PRAM                    16
  59  */
  60 #define CONFIG_LOADADDR         0x100000        /* where TFTP images go */
  61 #undef CONFIG_BOOTARGS
  62
  63 /* Bootcmd is overridden by the bootscript in board/cray/L1
  64  */
  65 #define CONFIG_SYS_AUTOLOAD             "no"
  66 #define CONFIG_BOOTCOMMAND      "dhcp"
  67
  68 /*
  69  * ..during experiments..
  70  #define CONFIG_SERVERIP         10.0.0.1
  71  #define CONFIG_ETHADDR          00:40:a6:80:14:5
  72  */
  73 #define CONFIG_HARD_I2C         1               /* hardware support for i2c */
  74 #define CONFIG_PPC4XX_I2C               /* use PPC4xx driver            */
  75 #define CONFIG_SDRAM_BANK0              1
  76 #define CONFIG_SYS_I2C_SPEED                400000      /* I2C speed and slave address  */
  77 #define CONFIG_SYS_I2C_SLAVE                0x7F
  78 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x57
  79 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
  80 #define CONFIG_IDENT_STRING     "Cray L1"
  81 #define CONFIG_ENV_OVERWRITE     1
  82 #define CONFIG_SYS_HZ                        1000       /* decrementer freq: 1 ms ticks */
  83 #define CONFIG_SYS_HUSH_PARSER                  1
  84 #define CONFIG_SYS_PROMPT_HUSH_PS2              "> "
  85 #define CONFIG_SOURCE                   1
  86
  87
  88 /*
  89  * Command line configuration.
  90  */
  91
  92 #define CONFIG_CMD_ASKENV
  93 #define CONFIG_CMD_BDI
  94 #define CONFIG_CMD_CONSOLE
  95 #define CONFIG_CMD_DATE
  96 #define CONFIG_CMD_DHCP
  97 #define CONFIG_CMD_DIAG
  98 #define CONFIG_CMD_ECHO
  99 #define CONFIG_CMD_EEPROM
 100 #define CONFIG_CMD_FLASH
 101 #define CONFIG_CMD_I2C
 102 #define CONFIG_CMD_IMI
 103 #define CONFIG_CMD_IMMAP
 104 #define CONFIG_CMD_MEMORY
 105 #define CONFIG_CMD_NET
 106 #define CONFIG_CMD_REGINFO
 107 #define CONFIG_CMD_RUN
 108 #define CONFIG_CMD_SAVEENV
 109 #define CONFIG_CMD_SETGETDCR
 110 #define CONFIG_CMD_SOURCE
 111
 112
 113 /*
 114  * BOOTP options
 115  */
 116 #define CONFIG_BOOTP_SUBNETMASK
 117 #define CONFIG_BOOTP_GATEWAY
 118 #define CONFIG_BOOTP_HOSTNAME
 119 #define CONFIG_BOOTP_BOOTPATH
 120 #define CONFIG_BOOTP_VENDOREX
 121 #define CONFIG_BOOTP_DNS
 122 #define CONFIG_BOOTP_BOOTFILESIZE
 123
 124
 125 /*
 126  * how many time to fail & restart a net-TFTP before giving up & resetting
 127  * the board hoping that a reset of net interface might help..
 128  */
 129 #define CONFIG_NET_RESET 5
 130
 131 /*
 132  * bauds.  Just to make it compile; in our case, I read the base_baud
 133  * from the DCR anyway, so its kinda-tied to the above ref. clock which in turn
 134  * drives the system clock.
 135  */
 136 #define CONFIG_SYS_BASE_BAUD       403225
 137 #define CONFIG_SYS_BAUDRATE_TABLE  \
 138     {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
 139
 140 /*
 141  * Miscellaneous configurable options
 142  */
 143 #define CONFIG_SYS_PROMPT       "=> "                           /* Monitor Command Prompt       */
 144 #define CONFIG_SYS_CBSIZE       256                             /* Console I/O Buffer Size      */
 145 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE                       /* Boot Argument Buffer Size    */
 146 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)      /* Print Buffer Size */
 147 #define CONFIG_SYS_MAXARGS      16                              /* max number of command args   */
 148
 149
 150 #define CONFIG_SYS_LOAD_ADDR            0x100000        /* where to load what we get from TFTP */
 151 #define CONFIG_SYS_TFTP_LOADADDR        CONFIG_SYS_LOAD_ADDR
 152 #define CONFIG_SYS_EXTBDINFO            1               /* To use extended board_into (bd_t) */
 153 #define CONFIG_SYS_DRAM_TEST            1
 154
 155 /*-----------------------------------------------------------------------
 156  * Start addresses for the final memory configuration
 157  * (Set up by the startup code)
 158  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
 159  */
 160 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 161 #define CONFIG_SYS_FLASH_BASE           0xFFC00000
 162 #define CONFIG_SYS_MONITOR_BASE TEXT_BASE
 163
 164
 165 #define CONFIG_SYS_MONITOR_LEN          (192 * 1024)    /* Reserve 192 kB for Monitor   */
 166
 167 /*
 168  * For booting Linux, the board info and command line data
 169  * have to be in the first 8 MB of memory, since this is
 170  * the maximum mapped by the Linux kernel during initialization.
 171  */
 172 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)       /* Initial Memory map for Linux */
 173 /*-----------------------------------------------------------------------
 174  * FLASH organization
 175  */
 176 #define CONFIG_SYS_MAX_FLASH_BANKS       1              /* max number of memory banks           */
 177 #define CONFIG_SYS_MAX_FLASH_SECT        64             /* max number of sectors on one chip    */
 178 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000      /* Timeout for Flash Erase (in ms)      */
 179 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms)      */
 180
 181 /* BEG ENVIRONNEMENT FLASH: needs to be a whole FlashSector  */
 182 #define CONFIG_ENV_OFFSET               0x3c8000
 183 #define CONFIG_ENV_IS_IN_FLASH  1       /* use FLASH for environment vars */
 184 #define CONFIG_ENV_SIZE         0x1000   /* Total Size of Environment area      */
 185 #define CONFIG_ENV_SECT_SIZE    0x10000  /* see README - env sector total size  */
 186
 187 /* Memory tests: U-BOOT relocates itself to the top of Ram, so its at
 188  * 32meg-(128k+some_malloc_space+copy-of-ENV sector)..
 189  */
 190 #define CONFIG_SYS_SDRAM_SIZE           32              /* megs of ram */
 191 #define CONFIG_SYS_MEMTEST_START        0x2000  /* memtest works from the end of */
 192                                                                         /* the exception vector table */
 193                                                                         /* to the end of the DRAM  */
 194                                                                         /* less monitor and malloc area */
 195 #define CONFIG_SYS_STACK_USAGE          0x10000 /* Reserve 64k for the stack usage */
 196 #define CONFIG_SYS_MALLOC_LEN           (128 << 10)     /* 128k for malloc space */
 197 #define CONFIG_SYS_MEM_END_USAGE        ( CONFIG_SYS_MONITOR_LEN \
 198                                 + CONFIG_SYS_MALLOC_LEN \
 199                                 + CONFIG_ENV_SECT_SIZE \
 200                                 + CONFIG_SYS_STACK_USAGE )
 201
 202 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_SDRAM_SIZE * 1024 * 1024 - CONFIG_SYS_MEM_END_USAGE)
 203 /* END ENVIRONNEMENT FLASH */
 204
 205 /*
 206  * Init Memory Controller:
 207  *
 208  * BR0/1 and OR0/1 (FLASH)
 209  */
 210
 211 #define FLASH_BASE0_PRELIM      CONFIG_SYS_FLASH_BASE   /* FLASH bank #0        */
 212
 213
 214 /*-----------------------------------------------------------------------
 215  * Definitions for initial stack pointer and data area (in OnChipMem )
 216  */
 217 #if 1
 218 /* On Chip Memory location */
 219 #define CONFIG_SYS_TEMP_STACK_OCM       1
 220 #define CONFIG_SYS_OCM_DATA_ADDR        0xF0000000
 221 #define CONFIG_SYS_OCM_DATA_SIZE        0x1000
 222
 223 #define CONFIG_SYS_INIT_RAM_ADDR        CONFIG_SYS_OCM_DATA_ADDR /* inside of SDRAM             */
 224 #define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE /* End of used area in RAM     */
 225 #define CONFIG_SYS_GBL_DATA_SIZE      256  /* size in bytes reserved for initial data */
 226 #define CONFIG_SYS_GBL_DATA_OFFSET    (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
 227 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 228 #else
 229 #define CONFIG_SYS_OCM_DATA_ADDR        0xF0000000
 230 #define CONFIG_SYS_OCM_DATA_SIZE        0x1000
 231 #define CONFIG_SYS_INIT_RAM_ADDR        CONFIG_SYS_OCM_DATA_ADDR        /* inside of On Chip SRAM    */
 232 #define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE        /* End of On Chip SRAM       */
 233 #define CONFIG_SYS_GBL_DATA_SIZE        64      /* size in bytes reserved for initial data */
 234 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
 235 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 236 #endif
 237
 238 /*-----------------------------------------------------------------------
 239  * Definitions for Serial Presence Detect EEPROM address
 240  */
 241 #define EEPROM_WRITE_ADDRESS 0xA0
 242 #define EEPROM_READ_ADDRESS  0xA1
 243
 244 /*
 245  * Internal Definitions
 246  *
 247  * Boot Flags
 248  */
 249 #define BOOTFLAG_COLD   0x01            /* Normal Power-On: Boot from FLASH     */
 250 #define BOOTFLAG_WARM   0x02            /* Software reboot                      */
 251
 252 #endif  /* __CONFIG_H */