include/configs/DASA_SIM.h

   1 /*
   2  * (C) Copyright 2001
   3  * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 /*
  25  * board/config.h - configuration options, board specific
  26  */
  27
  28 #ifndef __CONFIG_H
  29 #define __CONFIG_H
  30
  31 /*
  32  * High Level Configuration Options
  33  * (easy to change)
  34  */
  35
  36 #define CONFIG_IOP480           1       /* This is a IOP480 CPU         */
  37 #define CONFIG_DASA_SIM         1       /* ...on a DASA_SIM board       */
  38
  39 #define CONFIG_BOARD_PRE_INIT   1       /* call board_pre_init()        */
  40
  41 #define CONFIG_CLOCKS_IN_MHZ    1       /* clocks passsed to Linux in MHz */
  42
  43 #define CONFIG_CPUCLOCK         66
  44 #define CONFIG_BUSCLOCK         (CONFIG_CPUCLOCK)
  45
  46 #define CONFIG_BAUDRATE         9600
  47 #define CONFIG_BOOTDELAY        3       /* autoboot after 5 seconds     */
  48 #define CONFIG_BOOTCOMMAND      "bootm ffe00000" /* autoboot command    */
  49
  50 #undef  CONFIG_BOOTARGS
  51
  52 #define CONFIG_LOADS_ECHO       1       /* echo on for serial download  */
  53 #define CFG_LOADS_BAUD_CHANGE   1       /* allow baudrate change        */
  54
  55 #undef CONFIG_WATCHDOG                  /* watchdog disabled            */
  56
  57 #define CONFIG_IPADDR           10.0.18.222
  58 #define CONFIG_SERVERIP         10.0.18.190
  59
  60 #if 0
  61 #define CONFIG_COMMANDS       ( CONFIG_CMD_DFL  | \
  62                                 CFG_CMD_DHCP    | \
  63                                 CFG_CMD_IRQ     | \
  64                                 CFG_CMD_BSP     | \
  65                                 CFG_CMD_ASKENV  | \
  66                                 CFG_CMD_ELF     )
  67 #else
  68 #define CONFIG_COMMANDS       ( CONFIG_CMD_DFL  | \
  69                                 CFG_CMD_EEPROM  | \
  70                                 CFG_CMD_BSP     )
  71 #endif
  72
  73 #if 0 /* Does not appear to be used?!  If it is used, needs to be fixed */
  74 #define CONFIG_SOFT_I2C                 /* Software I2C support enabled */
  75 #endif
  76 #define CFG_I2C_EEPROM_ADDR_LEN 1       /* Bytes of address             */
  77
  78 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
  79 #include <cmd_confdefs.h>
  80
  81 /*
  82  * Miscellaneous configurable options
  83  */
  84 #define CFG_LONGHELP                    /* undef to save memory         */
  85 #define CFG_PROMPT      "=> "           /* Monitor Command Prompt       */
  86 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
  87 #define CFG_CBSIZE      1024            /* Console I/O Buffer Size      */
  88 #else
  89 #define CFG_CBSIZE      256             /* Console I/O Buffer Size      */
  90 #endif
  91 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
  92 #define CFG_MAXARGS     16              /* max number of command args   */
  93 #define CFG_BARGSIZE    CFG_CBSIZE      /* Boot Argument Buffer Size    */
  94
  95 #define CFG_CONSOLE_INFO_QUIET  1       /* don't print console @ startup*/
  96
  97 #define CFG_MEMTEST_START       0x0400000       /* memtest works on     */
  98 #define CFG_MEMTEST_END         0x0C00000       /* 4 ... 12 MB in DRAM  */
  99
 100 /* The following table includes the supported baudrates */
 101 #define CFG_BAUDRATE_TABLE      \
 102         { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200 }
 103
 104 #define CFG_LOAD_ADDR   0x100000        /* default load address */
 105
 106 #define CFG_HZ          1000            /* decrementer freq: 1 ms ticks */
 107
 108 #define CONFIG_ZERO_BOOTDELAY_CHECK     /* check for keypress on bootdelay==0 */
 109
 110 /*-----------------------------------------------------------------------
 111  * Definitions for initial stack pointer and data area (in DPRAM)
 112  */
 113 #define CFG_INIT_RAM_ADDR       0x00df0000 /* inside of SDRAM                   */
 114 #define CFG_INIT_RAM_END        0x0f00  /* End of used area in RAM             */
 115 #define CFG_GBL_DATA_SIZE       64  /* size in bytes reserved for initial data */
 116 #define CFG_GBL_DATA_OFFSET     (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
 117 #define CFG_INIT_SP_OFFSET      CFG_GBL_DATA_OFFSET
 118
 119 /*-----------------------------------------------------------------------
 120  * Start addresses for the final memory configuration
 121  * (Set up by the startup code)
 122  * Please note that CFG_SDRAM_BASE _must_ start at 0
 123  */
 124 #define CFG_SDRAM_BASE          0x00000000
 125 #define CFG_FLASH_BASE          0xFFFD0000
 126 #define CFG_MONITOR_BASE        CFG_FLASH_BASE
 127 #define CFG_MONITOR_LEN         (192 << 10)     /* Reserve 128 kB for Monitor   */
 128 #define CFG_MALLOC_LEN          (128 << 10)     /* Reserve 128 kB for malloc()  */
 129
 130 /*
 131  * For booting Linux, the board info and command line data
 132  * have to be in the first 8 MB of memory, since this is
 133  * the maximum mapped by the Linux kernel during initialization.
 134  */
 135 #define CFG_BOOTMAPSZ           (8 << 20)       /* Initial Memory map for Linux */
 136 /*-----------------------------------------------------------------------
 137  * FLASH organization
 138  */
 139 #define CFG_MAX_FLASH_BANKS     1       /* max number of memory banks           */
 140 #define CFG_MAX_FLASH_SECT      256     /* max number of sectors on one chip    */
 141
 142 #define CFG_FLASH_ERASE_TOUT    120000  /* Timeout for Flash Erase (in ms)      */
 143 #define CFG_FLASH_WRITE_TOUT    500     /* Timeout for Flash Write (in ms)      */
 144
 145 #define CFG_FLASH_WORD_SIZE     unsigned char   /* flash word size (width)      */
 146 #define CFG_FLASH_ADDR0         0x0AA9  /* 1st address for flash config cycles  */
 147 #define CFG_FLASH_ADDR1         0x0556  /* 2nd address for flash config cycles  */
 148 /*
 149  * The following defines are added for buggy IOP480 byte interface.
 150  * All other boards should use the standard values (CPCI405 etc.)
 151  */
 152 #define CFG_FLASH_READ0         0x0002  /* 0 is standard                        */
 153 #define CFG_FLASH_READ1         0x0000  /* 1 is standard                        */
 154 #define CFG_FLASH_READ2         0x0004  /* 2 is standard                        */
 155
 156 #define CFG_FLASH_EMPTY_INFO            /* print 'E' for empty sector on flinfo */
 157
 158 #define CFG_ENV_IS_IN_FLASH     1
 159 #define CFG_ENV_OFFSET          0x00010000      /* Offset of Environment Sector */
 160 #define CFG_ENV_SIZE            0x1000  /* Total Size of Environment Sector     */
 161
 162 #if 0
 163 #define CFG_ENV_SECT_SIZE       0x8000  /* see README - env sector total size   */
 164 #else
 165 #define CFG_ENV_SECT_SIZE       0x10000 /* see README - env sector total size   */
 166 #endif
 167
 168 /*-----------------------------------------------------------------------
 169  * PCI stuff
 170  */
 171 #define CONFIG_PCI                      /* include pci support                  */
 172 #undef CONFIG_PCI_PNP
 173
 174 #define CONFIG_NET_MULTI                /* Multi ethernet cards support         */
 175
 176 #define CONFIG_TULIP
 177
 178 #define CFG_ETH_DEV_FN       0x0000
 179 #define CFG_ETH_IOBASE       0x0fff0000
 180 #define CFG_PCI9054_DEV_FN   0x0800
 181 #define CFG_PCI9054_IOBASE   0x0eff0000
 182
 183 /*-----------------------------------------------------------------------
 184  * Cache Configuration
 185  */
 186 #define CFG_DCACHE_SIZE         2048    /* For PLX IOP480                       */
 187 #define CFG_CACHELINE_SIZE      16      /* For IBM 401/403 CPUs                 */
 188 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
 189 #define CFG_CACHELINE_SHIFT     4       /* log base 2 of the above value        */
 190 #endif
 191
 192 /*
 193  * Init Memory Controller:
 194  *
 195  * BR0/1 and OR0/1 (FLASH)
 196  */
 197
 198 #define FLASH_BASE0_PRELIM      0xFFE00000      /* FLASH bank #0        */
 199
 200
 201 /*
 202  * Internal Definitions
 203  *
 204  * Boot Flags
 205  */
 206 #define BOOTFLAG_COLD   0x01            /* Normal Power-On: Boot from FLASH     */
 207 #define BOOTFLAG_WARM   0x02            /* Software reboot                      */
 208
 209 #endif  /* __CONFIG_H */