include/configs/DK1C20.h

   1 /*
   2  * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
   3  * Scott McNutt <smcnutt@psyent.com>
   4  * Stephan Linz <linz@li-pro.net>
   5  *
   6  * CompactFlash/IDE:
   7  * (C) Copyright 2004, Shlomo Kut <skut@vyyo.com>
   8  *
   9  * See file CREDITS for list of people who contributed to this
  10  * project.
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License as
  14  * published by the Free Software Foundation; either version 2 of
  15  * the License, or (at your option) any later version.
  16  *
  17  * This program is distributed in the hope that it will be useful,
  18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  * GNU General Public License for more details.
  21  *
  22  * You should have received a copy of the GNU General Public License
  23  * along with this program; if not, write to the Free Software
  24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25  * MA 02111-1307 USA
  26  */
  27
  28 #ifndef __CONFIG_H
  29 #define __CONFIG_H
  30
  31 /***********************************************************************
  32  * Include the whole NIOS CPU configuration.
  33  *
  34  * !!! HAVE TO BE HERE !!! DON'T MOVE THIS PART !!!
  35  *
  36  ***********************************************************************/
  37
  38 #if     defined(CONFIG_NIOS_SAFE_32)
  39 #include <configs/DK1C20_safe_32.h>
  40 #elif   defined(CONFIG_NIOS_STANDARD_32)
  41 #include <configs/DK1C20_standard_32.h>
  42 #else
  43 #error *** CONFIG_SYS_ERROR: you have to setup right NIOS CPU configuration
  44 #endif
  45
  46 /*------------------------------------------------------------------------
  47  * BOARD/CPU -- TOP-LEVEL
  48  *----------------------------------------------------------------------*/
  49 #define CONFIG_NIOS             1               /* NIOS-32 core         */
  50 #define CONFIG_DK1C20           1               /* Cyclone DK-1C20 board*/
  51 #define CONFIG_SYS_CLK_FREQ     CONFIG_SYS_NIOS_CPU_CLK/* 50 MHz core clock     */
  52 #define CONFIG_SYS_HZ                   1000            /* 1 msec time tick     */
  53 #define CONFIG_BOARD_EARLY_INIT_F 1     /* enable early board-spec. init*/
  54
  55 /*------------------------------------------------------------------------
  56  * BASE ADDRESSES / SIZE (Flash, SRAM, SDRAM)
  57  *----------------------------------------------------------------------*/
  58 #if     (CONFIG_SYS_NIOS_CPU_SDRAM_SIZE != 0)
  59
  60 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_NIOS_CPU_SDRAM_BASE
  61 #define CONFIG_SYS_SDRAM_SIZE           CONFIG_SYS_NIOS_CPU_SDRAM_SIZE
  62
  63 #else
  64 #error *** CONFIG_SYS_ERROR: you have to setup any SDRAM in NIOS CPU config
  65 #endif
  66
  67 #define CONFIG_SYS_SRAM_BASE            CONFIG_SYS_NIOS_CPU_SRAM_BASE
  68 #define CONFIG_SYS_SRAM_SIZE            CONFIG_SYS_NIOS_CPU_SRAM_SIZE
  69 #define CONFIG_SYS_VECT_BASE            CONFIG_SYS_NIOS_CPU_VEC_BASE
  70
  71 /*------------------------------------------------------------------------
  72  * MEMORY ORGANIZATION - For the most part, you can put things pretty
  73  * much anywhere. This is pretty flexible for Nios. So here we make some
  74  * arbitrary choices & assume that the monitor is placed at the end of
  75  * a memory resource (so you must make sure TEXT_BASE is chosen
  76  * appropriately).
  77  *
  78  *      -The heap is placed below the monitor.
  79  *      -Global data is placed below the heap.
  80  *      -The stack is placed below global data (&grows down).
  81  *----------------------------------------------------------------------*/
  82 #define CONFIG_SYS_MONITOR_LEN          (256 * 1024)    /* Reserve 256k         */
  83 #define CONFIG_SYS_GBL_DATA_SIZE        128             /* Global data size rsvd*/
  84 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 128*1024)
  85
  86 #define CONFIG_SYS_MONITOR_BASE TEXT_BASE
  87 #define CONFIG_SYS_MALLOC_BASE          (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
  88 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE)
  89 #define CONFIG_SYS_INIT_SP              CONFIG_SYS_GBL_DATA_OFFSET
  90
  91 /*------------------------------------------------------------------------
  92  * FLASH (AM29LV065D)
  93  *----------------------------------------------------------------------*/
  94 #if     (CONFIG_SYS_NIOS_CPU_FLASH_SIZE != 0)
  95
  96 #define CONFIG_SYS_FLASH_BASE           CONFIG_SYS_NIOS_CPU_FLASH_BASE
  97 #define CONFIG_SYS_FLASH_SIZE           CONFIG_SYS_NIOS_CPU_FLASH_SIZE
  98 #define CONFIG_SYS_MAX_FLASH_SECT       128             /* Max # sects per bank */
  99 #define CONFIG_SYS_MAX_FLASH_BANKS      1               /* Max # of flash banks */
 100 #define CONFIG_SYS_FLASH_ERASE_TOUT     8000            /* Erase timeout (msec) */
 101 #define CONFIG_SYS_FLASH_WRITE_TOUT     100             /* Write timeout (msec) */
 102 #define CONFIG_SYS_FLASH_WORD_SIZE      unsigned char   /* flash word size      */
 103
 104 #else
 105 #error *** CONFIG_SYS_ERROR: you have to setup any Flash memory in NIOS CPU config
 106 #endif
 107
 108 /*------------------------------------------------------------------------
 109  * ENVIRONMENT
 110  *----------------------------------------------------------------------*/
 111 #if     (CONFIG_SYS_NIOS_CPU_FLASH_SIZE != 0)
 112
 113 #define CONFIG_ENV_IS_IN_FLASH  1               /* Environment in flash */
 114 #define CONFIG_ENV_ADDR         CONFIG_SYS_FLASH_BASE   /* Mem addr of env      */
 115 #define CONFIG_ENV_SIZE         (64 * 1024)     /* 64 KByte (1 sector)  */
 116 #define CONFIG_ENV_OVERWRITE                    /* Serial/eth change Ok */
 117
 118 #else
 119 #define CONFIG_ENV_IS_NOWHERE   1               /* NO Environment       */
 120 #endif
 121
 122 /*------------------------------------------------------------------------
 123  * CONSOLE
 124  *----------------------------------------------------------------------*/
 125 #if     (CONFIG_SYS_NIOS_CPU_UART_NUMS != 0)
 126
 127 #define CONFIG_SYS_NIOS_CONSOLE CONFIG_SYS_NIOS_CPU_UART0 /* 1st UART is Cons. */
 128
 129 #if     (CONFIG_SYS_NIOS_CPU_UART0_BR != 0)
 130 #define CONFIG_SYS_NIOS_FIXEDBAUD       1                  /* Baudrate is fixed */
 131 #define CONFIG_BAUDRATE         CONFIG_SYS_NIOS_CPU_UART0_BR
 132 #else
 133 #undef  CONFIG_SYS_NIOS_FIXEDBAUD
 134 #define CONFIG_BAUDRATE         115200
 135 #endif
 136
 137 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
 138
 139 #else
 140 #error *** CONFIG_SYS_ERROR: you have to setup at least one UART in NIOS CPU config
 141 #endif
 142
 143 /*------------------------------------------------------------------------
 144  * TIMER FOR TIMEBASE -- Nios doesn't have the equivalent of ppc  PIT,
 145  * so an avalon bus timer is required.
 146  *----------------------------------------------------------------------*/
 147 #if     (CONFIG_SYS_NIOS_CPU_TIMER_NUMS != 0)
 148
 149 #if     (CONFIG_SYS_NIOS_CPU_TICK_TIMER == 0)
 150
 151 #define CONFIG_SYS_NIOS_TMRBASE CONFIG_SYS_NIOS_CPU_TIMER0 /* TIMER0 as tick    */
 152 #define CONFIG_SYS_NIOS_TMRIRQ          CONFIG_SYS_NIOS_CPU_TIMER0_IRQ
 153
 154 #if     (CONFIG_SYS_NIOS_CPU_TIMER0_FP == 1)                /* fixed period */
 155
 156 #if     (CONFIG_SYS_NIOS_CPU_TIMER0_PER >= CONFIG_SYS_HZ)
 157 #define CONFIG_SYS_NIOS_TMRMS           (CONFIG_SYS_NIOS_CPU_TIMER0_PER / CONFIG_SYS_HZ)
 158 #else
 159 #error *** CONFIG_SYS_ERROR: you have to use a timer periode greater than CONFIG_SYS_HZ
 160 #endif
 161
 162 #undef  CONFIG_SYS_NIOS_TMRCNT  /* no preloadable counter value */
 163
 164 #elif   (CONFIG_SYS_NIOS_CPU_TIMER0_FP == 0)                /* variable period */
 165
 166 #if     (CONFIG_SYS_HZ <= 1000)
 167 #define CONFIG_SYS_NIOS_TMRMS           (1000 / CONFIG_SYS_HZ)
 168 #else
 169 #error *** CONFIG_SYS_ERROR: sorry, CONFIG_SYS_HZ have to be less than 1000
 170 #endif
 171
 172 #define CONFIG_SYS_NIOS_TMRCNT          (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ)
 173
 174 #else
 175 #error *** CONFIG_SYS_ERROR: you have to define CONFIG_SYS_NIOS_CPU_TIMER0_FP correct
 176 #endif
 177
 178 #elif   (CONFIG_SYS_NIOS_CPU_TICK_TIMER == 1)
 179
 180 #define CONFIG_SYS_NIOS_TMRBASE CONFIG_SYS_NIOS_CPU_TIMER1 /* TIMER1 as tick    */
 181 #define CONFIG_SYS_NIOS_TMRIRQ          CONFIG_SYS_NIOS_CPU_TIMER1_IRQ
 182
 183 #if     (CONFIG_SYS_NIOS_CPU_TIMER1_FP == 1)                /* fixed period */
 184
 185 #if     (CONFIG_SYS_NIOS_CPU_TIMER1_PER >= CONFIG_SYS_HZ)
 186 #define CONFIG_SYS_NIOS_TMRMS           (CONFIG_SYS_NIOS_CPU_TIMER1_PER / CONFIG_SYS_HZ)
 187 #else
 188 #error *** CONFIG_SYS_ERROR: you have to use a timer periode greater than CONFIG_SYS_HZ
 189 #endif
 190
 191 #undef  CONFIG_SYS_NIOS_TMRCNT  /* no preloadable counter value */
 192
 193 #elif   (CONFIG_SYS_NIOS_CPU_TIMER1_FP == 0)                /* variable period */
 194
 195 #if     (CONFIG_SYS_HZ <= 1000)
 196 #define CONFIG_SYS_NIOS_TMRMS           (1000 / CONFIG_SYS_HZ)
 197 #else
 198 #error *** CONFIG_SYS_ERROR: sorry, CONFIG_SYS_HZ have to be less than 1000
 199 #endif
 200
 201 #define CONFIG_SYS_NIOS_TMRCNT          (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ)
 202
 203 #else
 204 #error *** CONFIG_SYS_ERROR: you have to define CONFIG_SYS_NIOS_CPU_TIMER1_FP correct
 205 #endif
 206
 207 #endif  /* CONFIG_SYS_NIOS_CPU_TICK_TIMER */
 208
 209 #else
 210 #error *** CONFIG_SYS_ERROR: you have to setup at least one TIMER in NIOS CPU config
 211 #endif
 212
 213 /*------------------------------------------------------------------------
 214  * Ethernet
 215  *----------------------------------------------------------------------*/
 216 #if     (CONFIG_SYS_NIOS_CPU_LAN_NUMS == 1)
 217
 218 #if     (CONFIG_SYS_NIOS_CPU_LAN0_TYPE == 0)            /* LAN91C111            */
 219
 220 #define CONFIG_DRIVER_SMC91111                  /* Using SMC91c111      */
 221 #undef  CONFIG_SMC91111_EXT_PHY                 /* Internal PHY         */
 222 #define CONFIG_SMC91111_BASE    (CONFIG_SYS_NIOS_CPU_LAN0_BASE + CONFIG_SYS_NIOS_CPU_LAN0_OFFS)
 223
 224 #if     (CONFIG_SYS_NIOS_CPU_LAN0_BUSW == 32)
 225 #define CONFIG_SMC_USE_32_BIT   1
 226 #else   /* no */
 227 #undef  CONFIG_SMC_USE_32_BIT
 228 #endif
 229
 230 #elif   (CONFIG_SYS_NIOS_CPU_LAN0_TYPE == 1)            /* CS8900A              */
 231
 232         /********************************************/
 233         /* !!! CS8900 is __not__ tested on NIOS !!! */
 234         /********************************************/
 235 #define CONFIG_NET_MULTI
 236 #define CONFIG_CS8900           /* Using CS8900         */
 237 #define CONFIG_CS8900_BASE      (CONFIG_SYS_NIOS_CPU_LAN0_BASE + \
 238                                 CONFIG_SYS_NIOS_CPU_LAN0_OFFS)
 239
 240 #if     (CONFIG_SYS_NIOS_CPU_LAN0_BUSW == 32)
 241 #undef  CONFIG_CS8900_BUS16
 242 #define CONFIG_CS8900_BUS32
 243 #else   /* no */
 244 #define CONFIG_CS8900_BUS16
 245 #undef  CONFIG_CS8900_BUS32
 246 #endif
 247
 248 #else
 249 #error *** CONFIG_SYS_ERROR: invalid LAN0 chip type, check your NIOS CPU config
 250 #endif
 251
 252 #define CONFIG_ETHADDR          08:00:3e:26:0a:5b
 253 #define CONFIG_NETMASK          255.255.255.0
 254 #define CONFIG_IPADDR           192.168.2.21
 255 #define CONFIG_SERVERIP         192.168.2.16
 256
 257 #else
 258 #error *** CONFIG_SYS_ERROR: you have to setup just one LAN only or expand your config.h
 259 #endif
 260
 261 /*------------------------------------------------------------------------
 262  * STATUS LEDs
 263  *----------------------------------------------------------------------*/
 264 #if     (CONFIG_SYS_NIOS_CPU_PIO_NUMS != 0)
 265
 266 #if     (CONFIG_SYS_NIOS_CPU_LED_PIO == 0)
 267
 268 #error *** CONFIG_SYS_ERROR: status LEDs at PIO0 not supported, expand your config.h
 269
 270 #elif   (CONFIG_SYS_NIOS_CPU_LED_PIO == 1)
 271
 272 #error *** CONFIG_SYS_ERROR: status LEDs at PIO1 not supported, expand your config.h
 273
 274 #elif   (CONFIG_SYS_NIOS_CPU_LED_PIO == 2)
 275
 276 #define STATUS_LED_BASE                 CONFIG_SYS_NIOS_CPU_PIO2
 277 #define STATUS_LED_BITS                 CONFIG_SYS_NIOS_CPU_PIO2_BITS
 278 #define STATUS_LED_ACTIVE               1 /* LED on for bit == 1 */
 279
 280 #if     (CONFIG_SYS_NIOS_CPU_PIO2_TYPE == 1)
 281 #define STATUS_LED_WRONLY               1
 282 #else
 283 #undef  STATUS_LED_WRONLY
 284 #endif
 285
 286 #elif   (CONFIG_SYS_NIOS_CPU_LED_PIO == 3)
 287
 288 #error *** CONFIG_SYS_ERROR: status LEDs at PIO3 not supported, expand your config.h
 289
 290 #elif   (CONFIG_SYS_NIOS_CPU_LED_PIO == 4)
 291
 292 #error *** CONFIG_SYS_ERROR: status LEDs at PIO4 not supported, expand your config.h
 293
 294 #elif   (CONFIG_SYS_NIOS_CPU_LED_PIO == 5)
 295
 296 #error *** CONFIG_SYS_ERROR: status LEDs at PIO5 not supported, expand your config.h
 297
 298 #elif   (CONFIG_SYS_NIOS_CPU_LED_PIO == 6)
 299
 300 #error *** CONFIG_SYS_ERROR: status LEDs at PIO6 not supported, expand your config.h
 301
 302 #elif   (CONFIG_SYS_NIOS_CPU_LED_PIO == 7)
 303
 304 #error *** CONFIG_SYS_ERROR: status LEDs at PIO7 not supported, expand your config.h
 305
 306 #elif   (CONFIG_SYS_NIOS_CPU_LED_PIO == 8)
 307
 308 #error *** CONFIG_SYS_ERROR: status LEDs at PIO8 not supported, expand your config.h
 309
 310 #elif   (CONFIG_SYS_NIOS_CPU_LED_PIO == 9)
 311
 312 #error *** CONFIG_SYS_ERROR: status LEDs at PIO9 not supported, expand your config.h
 313
 314 #else
 315 #error *** CONFIG_SYS_ERROR: you have to set CONFIG_SYS_NIOS_CPU_LED_PIO in right case
 316 #endif
 317
 318 #define CONFIG_STATUS_LED               1 /* enable status led driver */
 319
 320 #define STATUS_LED_BIT                  (1 << 0)        /* LED[0] */
 321 #define STATUS_LED_STATE                STATUS_LED_BLINKING
 322 #define STATUS_LED_BOOT_STATE           STATUS_LED_OFF
 323 #define STATUS_LED_PERIOD               (CONFIG_SYS_HZ / 10)    /* ca. 1 Hz */
 324 #define STATUS_LED_BOOT                 0               /* boot LED */
 325
 326 #if     (STATUS_LED_BITS > 1)
 327 #define STATUS_LED_BIT1                 (1 << 1)        /* LED[1] */
 328 #define STATUS_LED_STATE1               STATUS_LED_OFF
 329 #define STATUS_LED_PERIOD1              (CONFIG_SYS_HZ / 50)    /* ca. 5 Hz */
 330 #define STATUS_LED_RED                  1               /* fail LED */
 331 #endif
 332
 333 #if     (STATUS_LED_BITS > 2)
 334 #define STATUS_LED_BIT2                 (1 << 2)        /* LED[2] */
 335 #define STATUS_LED_STATE2               STATUS_LED_OFF
 336 #define STATUS_LED_PERIOD2              (CONFIG_SYS_HZ / 10)    /* ca. 1 Hz */
 337 #define STATUS_LED_YELLOW               2               /* info LED */
 338 #endif
 339
 340 #if     (STATUS_LED_BITS > 3)
 341 #define STATUS_LED_BIT3                 (1 << 3)        /* LED[3] */
 342 #define STATUS_LED_STATE3               STATUS_LED_OFF
 343 #define STATUS_LED_PERIOD3              (CONFIG_SYS_HZ / 10)    /* ca. 1 Hz */
 344 #define STATUS_LED_GREEN                3               /* info LED */
 345 #endif
 346
 347 #define STATUS_LED_PAR                  1 /* makes status_led.h happy */
 348
 349 #endif  /* CONFIG_SYS_NIOS_CPU_PIO_NUMS */
 350
 351 /*------------------------------------------------------------------------
 352  * SEVEN SEGMENT LED DISPLAY
 353  *----------------------------------------------------------------------*/
 354 #if     (CONFIG_SYS_NIOS_CPU_PIO_NUMS != 0)
 355
 356 #if     (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 0)
 357
 358 #error *** CONFIG_SYS_ERROR: seven segment display at PIO0 not supported, expand your config.h
 359
 360 #elif   (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 1)
 361
 362 #error *** CONFIG_SYS_ERROR: seven segment display at PIO1 not supported, expand your config.h
 363
 364 #elif   (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 2)
 365
 366 #error *** CONFIG_SYS_ERROR: seven segment display at PIO2 not supported, expand your config.h
 367
 368 #elif   (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 3)
 369
 370 #define SEVENSEG_BASE                   CONFIG_SYS_NIOS_CPU_PIO3
 371 #define SEVENSEG_BITS                   CONFIG_SYS_NIOS_CPU_PIO3_BITS
 372 #define SEVENSEG_ACTIVE                 0 /* LED on for bit == 1 */
 373
 374 #if     (CONFIG_SYS_NIOS_CPU_PIO3_TYPE == 1)
 375 #define SEVENSEG_WRONLY                 1
 376 #else
 377 #undef  SEVENSEG_WRONLY
 378 #endif
 379
 380 #elif   (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 4)
 381
 382 #error *** CONFIG_SYS_ERROR: seven segment display at PIO4 not supported, expand your config.h
 383
 384 #elif   (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 5)
 385
 386 #error *** CONFIG_SYS_ERROR: seven segment display at PIO5 not supported, expand your config.h
 387
 388 #elif   (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 6)
 389
 390 #error *** CONFIG_SYS_ERROR: seven segment display at PIO6 not supported, expand your config.h
 391
 392 #elif   (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 7)
 393
 394 #error *** CONFIG_SYS_ERROR: seven segment display at PIO7 not supported, expand your config.h
 395
 396 #elif   (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 8)
 397
 398 #error *** CONFIG_SYS_ERROR: seven segment display at PIO8 not supported, expand your config.h
 399
 400 #elif   (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 9)
 401
 402 #error *** CONFIG_SYS_ERROR: seven segment display at PIO9 not supported, expand your config.h
 403
 404 #else
 405 #error *** CONFIG_SYS_ERROR: you have to set CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO in right case
 406 #endif
 407
 408 #define CONFIG_SEVENSEG                 1 /* enable seven segment led driver */
 409
 410 /*
 411  * Dual 7-Segment Display pin assignment -- read more in your
 412  * "Nios Development Board Reference Manual"
 413  *
 414  *
 415  *    (U8) HI:D[15..8]     (U9) LO:D[7..0]
 416  *         ______               ______
 417  *        |  D14 |             |  D6  |
 418  *        |      |             |      |
 419  *      D9|      |D13        D1|      |D5
 420  *        |______|             |______|                  ___
 421  *        |  D8  |             |  D0  |                 | A |
 422  *        |      |             |      |                F|___|B
 423  *     D10|      |D12        D2|      |D4               | G |
 424  *        |______|             |______|                E|___|C
 425  *           D11  *               D3   *                  D  *
 426  *                D15                  D7                    DP
 427  *
 428  */
 429 #define SEVENSEG_DIGIT_HI_LO_EQUAL      1       /* high nibble equal low nibble */
 430 #define SEVENSEG_DIGIT_A                (1 << 6) /* bit 6 is segment A */
 431 #define SEVENSEG_DIGIT_B                (1 << 5) /* bit 5 is segment B */
 432 #define SEVENSEG_DIGIT_C                (1 << 4) /* bit 4 is segment C */
 433 #define SEVENSEG_DIGIT_D                (1 << 3) /* bit 3 is segment D */
 434 #define SEVENSEG_DIGIT_E                (1 << 2) /* bit 2 is segment E */
 435 #define SEVENSEG_DIGIT_F                (1 << 1) /* bit 1 is segment F */
 436 #define SEVENSEG_DIGIT_G                (1 << 0) /* bit 0 is segment G */
 437 #define SEVENSEG_DIGIT_DP               (1 << 7) /* bit 7 is decimal point */
 438
 439 #endif  /* CONFIG_SYS_NIOS_CPU_PIO_NUMS */
 440
 441 /*------------------------------------------------------------------------
 442  * ASMI - Active Serial Memory Interface.
 443  *
 444  * ASMI is for Cyclone devices only and only works when the configuration
 445  * is loaded via JTAG or ASMI. Please see doc/README.dk1c20 for details.
 446  *----------------------------------------------------------------------*/
 447 #define CONFIG_NIOS_ASMI                           /* Enable ASMI       */
 448 #define CONFIG_SYS_NIOS_ASMIBASE        CONFIG_SYS_NIOS_CPU_ASMI0 /* ASMI base address  */
 449
 450
 451 /*
 452  * BOOTP options
 453  */
 454 #define CONFIG_BOOTP_BOOTFILESIZE
 455 #define CONFIG_BOOTP_BOOTPATH
 456 #define CONFIG_BOOTP_GATEWAY
 457 #define CONFIG_BOOTP_HOSTNAME
 458
 459
 460 /*
 461  * Command line configuration.
 462  */
 463 #include <config_cmd_default.h>
 464
 465 #define CONFIG_CMD_CDP
 466 #define CONFIG_CMD_DHCP
 467 #define CONFIG_CMD_DIAG
 468 #define CONFIG_CMD_DISPLAY
 469 #define CONFIG_CMD_EXT2
 470 #define CONFIG_CMD_FAT
 471 #define CONFIG_CMD_IDE
 472 #define CONFIG_CMD_IMMAP
 473 #define CONFIG_CMD_IRQ
 474 #define CONFIG_CMD_PING
 475 #define CONFIG_CMD_PORTIO
 476 #define CONFIG_CMD_REGINFO
 477 #define CONFIG_CMD_SAVES
 478 #define CONFIG_CMD_SDRAM
 479 #define CONFIG_CMD_SNTP
 480
 481 #undef CONFIG_CMD_NFS
 482 #undef CONFIG_CMD_XIMG
 483
 484 /*------------------------------------------------------------------------
 485  * COMPACT FLASH
 486  *----------------------------------------------------------------------*/
 487 #if defined(CONFIG_CMD_IDE)
 488 #define CONFIG_IDE_PREINIT                      /* Implement id_preinit */
 489 #define CONFIG_SYS_IDE_MAXBUS           1               /* 1 IDE bus            */
 490 #define CONFIG_SYS_IDE_MAXDEVICE        1               /* 1 drive per IDE bus  */
 491
 492 #define CONFIG_SYS_ATA_BASE_ADDR        0x00920a00      /* IDE/ATA base addr    */
 493 #define CONFIG_SYS_ATA_IDE0_OFFSET      0x0000          /* IDE0 offset          */
 494 #define CONFIG_SYS_ATA_DATA_OFFSET      0x0040          /* Data IO offset       */
 495 #define CONFIG_SYS_ATA_REG_OFFSET       0x0040          /* Register offset      */
 496 #define CONFIG_SYS_ATA_ALT_OFFSET       0x0100          /* Alternate reg offset */
 497 #define CONFIG_SYS_ATA_STRIDE          4                /* Width betwix addrs   */
 498 #define CONFIG_DOS_PARTITION
 499
 500 /* Board-specific cf regs */
 501 #define CONFIG_SYS_CF_PRESENT           0x009209b0      /* CF Present PIO base  */
 502 #define CONFIG_SYS_CF_POWER             0x009209c0      /* CF Power FET PIO base*/
 503 #define CONFIG_SYS_CF_ATASEL            0x009209d0      /* CF ATASEL PIO base   */
 504
 505 #endif
 506
 507 /*------------------------------------------------------------------------
 508  * KGDB
 509  *----------------------------------------------------------------------*/
 510 #if defined(CONFIG_CMD_KGDB)
 511 #define CONFIG_KGDB_BAUDRATE    9600
 512 #endif
 513
 514 /*------------------------------------------------------------------------
 515  * MISC
 516  *----------------------------------------------------------------------*/
 517 #define CONFIG_SYS_LONGHELP                         /* undef to save memory     */
 518 #define CONFIG_SYS_PROMPT               "DK1C20 > " /* Monitor Command Prompt   */
 519 #define CONFIG_SYS_CBSIZE               256         /* Console I/O Buffer Size  */
 520 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 521 #define CONFIG_SYS_MAXARGS              16          /* max number of command args*/
 522 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE  /* Boot Argument Buffer Size */
 523
 524 #if     (CONFIG_SYS_SRAM_SIZE != 0)
 525 #define CONFIG_SYS_LOAD_ADDR            CONFIG_SYS_SRAM_BASE    /* Default load address */
 526 #else
 527 #undef  CONFIG_SYS_LOAD_ADDR
 528 #endif
 529
 530 #if     (CONFIG_SYS_SDRAM_SIZE != 0)
 531 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE   /* SDRAM til stack area */
 532 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_INIT_SP - (1024 * 1024)) /* 1MB stack */
 533 #else
 534 #undef  CONFIG_SYS_MEMTEST_START
 535 #undef  CONFIG_SYS_MEMTEST_END
 536 #endif
 537
 538 /*
 539  * JFFS2 partitions
 540  *
 541  */
 542 /* No command line, one static partition, whole device */
 543 #undef CONFIG_CMD_MTDPARTS
 544 #define CONFIG_JFFS2_DEV                "nor0"
 545 #define CONFIG_JFFS2_PART_SIZE          0xFFFFFFFF
 546 #define CONFIG_JFFS2_PART_OFFSET        0x00000000
 547
 548 /* mtdparts command line support */
 549 /*
 550 #define CONFIG_CMD_MTDPARTS
 551 #define MTDIDS_DEFAULT          ""
 552 #define MTDPARTS_DEFAULT        ""
 553 */
 554
 555 #endif  /* __CONFIG_H */