include/configs/IceCube.h

   1 /*
   2  * (C) Copyright 2003-2005
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef __CONFIG_H
   9 #define __CONFIG_H
  10
  11 /*
  12  * High Level Configuration Options
  13  * (easy to change)
  14  */
  15
  16 #define CONFIG_MPC5xxx          1       /* This is an MPC5xxx CPU */
  17 #define CONFIG_MPC5200          1       /* (more precisely a MPC5200 CPU) */
  18 #define CONFIG_ICECUBE          1       /* ... on IceCube board */
  19
  20 /*
  21  * Valid values for CONFIG_SYS_TEXT_BASE are:
  22  * 0xFFF00000   boot high (standard configuration)
  23  * 0xFF000000   boot low for 16 MiB boards
  24  * 0xFF800000   boot low for  8 MiB boards
  25  * 0x00100000   boot from RAM (for testing only)
  26  */
  27 #ifndef CONFIG_SYS_TEXT_BASE
  28 #define CONFIG_SYS_TEXT_BASE    0xFFF00000
  29 #endif
  30
  31 #define CONFIG_SYS_MPC5XXX_CLKIN        33000000 /* ... running at 33.000000MHz */
  32
  33 #define CONFIG_HIGH_BATS        1       /* High BATs supported */
  34
  35 /*
  36  * Serial console configuration
  37  */
  38 #define CONFIG_PSC_CONSOLE      1       /* console is on PSC1 */
  39 #define CONFIG_BAUDRATE         115200  /* ... at 115200 bps */
  40 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200, 230400 }
  41
  42
  43 /*
  44  * PCI Mapping:
  45  * 0x40000000 - 0x4fffffff - PCI Memory
  46  * 0x50000000 - 0x50ffffff - PCI IO Space
  47  */
  48 #define CONFIG_PCI
  49
  50 #if defined(CONFIG_PCI)
  51 #define CONFIG_PCI_PNP          1
  52 #define CONFIG_PCI_SCAN_SHOW    1
  53 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
  54
  55 #define CONFIG_PCI_MEM_BUS      0x40000000
  56 #define CONFIG_PCI_MEM_PHYS     CONFIG_PCI_MEM_BUS
  57 #define CONFIG_PCI_MEM_SIZE     0x10000000
  58
  59 #define CONFIG_PCI_IO_BUS       0x50000000
  60 #define CONFIG_PCI_IO_PHYS      CONFIG_PCI_IO_BUS
  61 #define CONFIG_PCI_IO_SIZE      0x01000000
  62 #endif
  63
  64 #define CONFIG_SYS_XLB_PIPELINING       1
  65
  66 #define CONFIG_MII              1
  67 #define CONFIG_EEPRO100         1
  68 #define CONFIG_SYS_RX_ETH_BUFFER        8  /* use 8 rx buffer on eepro100  */
  69 #define CONFIG_NS8382X          1
  70
  71 /* Partitions */
  72 #define CONFIG_MAC_PARTITION
  73 #define CONFIG_DOS_PARTITION
  74 #define CONFIG_ISO_PARTITION
  75
  76 /* USB */
  77 #define CONFIG_USB_OHCI_NEW
  78 #define CONFIG_USB_STORAGE
  79 #define CONFIG_SYS_OHCI_BE_CONTROLLER
  80 #undef CONFIG_SYS_USB_OHCI_BOARD_INIT
  81 #define CONFIG_SYS_USB_OHCI_CPU_INIT    1
  82 #define CONFIG_SYS_USB_OHCI_REGS_BASE   MPC5XXX_USB
  83 #define CONFIG_SYS_USB_OHCI_SLOT_NAME   "mpc5200"
  84 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      15
  85
  86 #define CONFIG_TIMESTAMP                /* Print image info with timestamp */
  87
  88
  89 /*
  90  * BOOTP options
  91  */
  92 #define CONFIG_BOOTP_BOOTFILESIZE
  93 #define CONFIG_BOOTP_BOOTPATH
  94 #define CONFIG_BOOTP_GATEWAY
  95 #define CONFIG_BOOTP_HOSTNAME
  96
  97
  98 /*
  99  * Command line configuration.
 100  */
 101 #include <config_cmd_default.h>
 102
 103 #define CONFIG_CMD_EEPROM
 104 #define CONFIG_CMD_FAT
 105 #define CONFIG_CMD_I2C
 106 #define CONFIG_CMD_IDE
 107 #define CONFIG_CMD_NFS
 108 #define CONFIG_CMD_SNTP
 109 #define CONFIG_CMD_USB
 110
 111 #if defined(CONFIG_PCI)
 112 #define CONFIG_CMD_PCI
 113 #endif
 114
 115
 116 #if (CONFIG_SYS_TEXT_BASE == 0xFF000000)                /* Boot low with 16 MB Flash */
 117 #   define CONFIG_SYS_LOWBOOT           1
 118 #   define CONFIG_SYS_LOWBOOT16 1
 119 #endif
 120 #if (CONFIG_SYS_TEXT_BASE == 0xFF800000)                /* Boot low with  8 MB Flash */
 121 #if defined(CONFIG_LITE5200B)
 122 #   error CONFIG_SYS_LOWBOOT08 is incompatible with the Lite5200B
 123 #else
 124 #   define CONFIG_SYS_LOWBOOT           1
 125 #   define CONFIG_SYS_LOWBOOT08 1
 126 #endif
 127 #endif
 128
 129 /*
 130  * Autobooting
 131  */
 132 #define CONFIG_BOOTDELAY        5       /* autoboot after 5 seconds */
 133
 134 #define CONFIG_PREBOOT  "echo;" \
 135         "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
 136         "echo"
 137
 138 #undef  CONFIG_BOOTARGS
 139
 140 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 141         "netdev=eth0\0"                                                 \
 142         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 143                 "nfsroot=${serverip}:${rootpath}\0"                     \
 144         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 145         "addip=setenv bootargs ${bootargs} "                            \
 146                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 147                 ":${hostname}:${netdev}:off panic=1\0"                  \
 148         "flash_nfs=run nfsargs addip;"                                  \
 149                 "bootm ${kernel_addr}\0"                                \
 150         "flash_self=run ramargs addip;"                                 \
 151                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
 152         "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0"     \
 153         "rootpath=/opt/eldk/ppc_82xx\0"                                 \
 154         "bootfile=/tftpboot/MPC5200/uImage\0"                           \
 155         ""
 156
 157 #define CONFIG_BOOTCOMMAND      "run flash_self"
 158
 159 /*
 160  * IPB Bus clocking configuration.
 161  */
 162 #if defined(CONFIG_LITE5200B)
 163 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
 164 #else
 165 #undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK          /* define for 133MHz speed */
 166 #endif
 167
 168 /* pass open firmware flat tree */
 169 #define CONFIG_OF_LIBFDT        1
 170 #define CONFIG_OF_BOARD_SETUP   1
 171
 172 #define OF_CPU                  "PowerPC,5200@0"
 173 #define OF_SOC                  "soc5200@f0000000"
 174 #define OF_TBCLK                (bd->bi_busfreq / 4)
 175 #define OF_STDOUT_PATH          "/soc5200@f0000000/serial@2000"
 176
 177 /*
 178  * I2C configuration
 179  */
 180 #define CONFIG_HARD_I2C         1       /* I2C with hardware support */
 181 #define CONFIG_SYS_I2C_MODULE           2       /* Select I2C module #1 or #2 */
 182
 183 #define CONFIG_SYS_I2C_SPEED            100000 /* 100 kHz */
 184 #define CONFIG_SYS_I2C_SLAVE            0x7F
 185
 186 /*
 187  * EEPROM configuration
 188  */
 189 #define CONFIG_SYS_I2C_EEPROM_ADDR              0x50    /* 1010000x */
 190 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          1
 191 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       3
 192 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   70
 193
 194 /*
 195  * Flash configuration
 196  */
 197 #if defined(CONFIG_LITE5200B)
 198 #define CONFIG_SYS_FLASH_BASE           0xFE000000
 199 #define CONFIG_SYS_FLASH_SIZE           0x01000000
 200 #if !defined(CONFIG_SYS_LOWBOOT)
 201 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x01760000 + 0x00800000)
 202 #else   /* CONFIG_SYS_LOWBOOT */
 203 #if defined(CONFIG_SYS_LOWBOOT08)
 204 # error CONFIG_SYS_LOWBOOT08 is incompatible with the Lite5200B
 205 #endif
 206 #if defined(CONFIG_SYS_LOWBOOT16)
 207 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x01060000)
 208 #endif
 209 #endif /* CONFIG_SYS_LOWBOOT */
 210 #else /* !CONFIG_LITE5200B (IceCube)*/
 211 #define CONFIG_SYS_FLASH_BASE           0xFF000000
 212 #define CONFIG_SYS_FLASH_SIZE           0x01000000
 213 #if !defined(CONFIG_SYS_LOWBOOT)
 214 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x00740000 + 0x00800000)
 215 #else   /* CONFIG_SYS_LOWBOOT */
 216 #if defined(CONFIG_SYS_LOWBOOT08)
 217 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x00040000 + 0x00800000)
 218 #endif
 219 #if defined(CONFIG_SYS_LOWBOOT16)
 220 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x00040000)
 221 #endif
 222 #endif  /* CONFIG_SYS_LOWBOOT */
 223 #endif /* CONFIG_LITE5200B */
 224 #define CONFIG_SYS_MAX_FLASH_BANKS      2       /* max num of memory banks      */
 225
 226 #define CONFIG_SYS_MAX_FLASH_SECT       128     /* max num of sects on one chip */
 227
 228 #define CONFIG_SYS_FLASH_ERASE_TOUT     240000  /* Flash Erase Timeout (in ms)  */
 229 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Flash Write Timeout (in ms)  */
 230
 231 #undef CONFIG_FLASH_16BIT       /* Flash is 8-bit */
 232
 233 #if defined(CONFIG_LITE5200B)
 234 #define CONFIG_FLASH_CFI_DRIVER
 235 #define CONFIG_SYS_FLASH_CFI
 236 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_CS1_START,CONFIG_SYS_CS0_START}
 237 #endif
 238
 239
 240 /*
 241  * Environment settings
 242  */
 243 #define CONFIG_ENV_IS_IN_FLASH  1
 244 #define CONFIG_ENV_SIZE         0x10000
 245 #if defined(CONFIG_LITE5200B)
 246 #define CONFIG_ENV_SECT_SIZE    0x20000
 247 #else
 248 #define CONFIG_ENV_SECT_SIZE    0x10000
 249 #endif
 250 #define CONFIG_ENV_OVERWRITE    1
 251
 252 /*
 253  * Memory map
 254  */
 255 #define CONFIG_SYS_MBAR         0xF0000000
 256 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 257 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
 258
 259 /* Use SRAM until RAM will be available */
 260 #define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
 261 #define CONFIG_SYS_INIT_RAM_SIZE        MPC5XXX_SRAM_SIZE       /* Size of used area in DPRAM */
 262
 263
 264 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 265 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 266
 267 #define CONFIG_SYS_MONITOR_BASE    CONFIG_SYS_TEXT_BASE
 268 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 269 #   define CONFIG_SYS_RAMBOOT           1
 270 #endif
 271
 272 #define CONFIG_SYS_MONITOR_LEN          (192 << 10)     /* Reserve 192 kB for Monitor   */
 273 #define CONFIG_SYS_MALLOC_LEN           (512 << 10)     /* Reserve 512 kB for malloc()  */
 274 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)       /* Initial Memory map for Linux */
 275
 276 /*
 277  * Ethernet configuration
 278  */
 279 #define CONFIG_MPC5xxx_FEC      1
 280 #define CONFIG_MPC5xxx_FEC_MII100
 281 /*
 282  * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
 283  */
 284 /* #define CONFIG_MPC5xxx_FEC_MII10 */
 285 #define CONFIG_PHY_ADDR         0x00
 286
 287 /*
 288  * GPIO configuration
 289  */
 290 #ifdef CONFIG_MPC5200_DDR
 291 #define CONFIG_SYS_GPS_PORT_CONFIG      0x90000004
 292 #else
 293 #define CONFIG_SYS_GPS_PORT_CONFIG      0x10000004
 294 #endif
 295
 296 /*
 297  * Miscellaneous configurable options
 298  */
 299 #define CONFIG_SYS_LONGHELP                     /* undef to save memory     */
 300 #if defined(CONFIG_CMD_KGDB)
 301 #define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size  */
 302 #else
 303 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size  */
 304 #endif
 305 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)      /* Print Buffer Size */
 306 #define CONFIG_SYS_MAXARGS              16              /* max number of command args   */
 307 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 308
 309 #define CONFIG_CMDLINE_EDITING  1       /* add command line history     */
 310 #define CONFIG_SYS_HUSH_PARSER          1       /* use "hush" command parser    */
 311
 312 #define CONFIG_SYS_MEMTEST_START        0x00100000      /* memtest works on */
 313 #define CONFIG_SYS_MEMTEST_END          0x00f00000      /* 1 ... 15 MB in DRAM  */
 314
 315 #define CONFIG_SYS_LOAD_ADDR            0x100000        /* default load address */
 316
 317 #define CONFIG_SYS_CACHELINE_SIZE       32      /* For MPC5xxx CPUs */
 318 #if defined(CONFIG_CMD_KGDB)
 319 #  define CONFIG_SYS_CACHELINE_SHIFT    5       /* log base 2 of the above value */
 320 #endif
 321
 322 /*
 323  * Various low-level settings
 324  */
 325 #define CONFIG_SYS_HID0_INIT            HID0_ICE | HID0_ICFI
 326 #define CONFIG_SYS_HID0_FINAL           HID0_ICE
 327
 328 #if defined(CONFIG_LITE5200B)
 329 #define CONFIG_SYS_CS1_START            CONFIG_SYS_FLASH_BASE
 330 #define CONFIG_SYS_CS1_SIZE             CONFIG_SYS_FLASH_SIZE
 331 #define CONFIG_SYS_CS1_CFG              0x00047800
 332 #define CONFIG_SYS_CS0_START            (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE)
 333 #define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
 334 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_CS0_START
 335 #define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
 336 #define CONFIG_SYS_BOOTCS_CFG           0x00047800
 337 #else /* IceCube aka Lite5200 */
 338 #ifdef CONFIG_MPC5200_DDR
 339
 340 #define CONFIG_SYS_BOOTCS_START (CONFIG_SYS_CS1_START + CONFIG_SYS_CS1_SIZE)
 341 #define CONFIG_SYS_BOOTCS_SIZE          0x00800000
 342 #define CONFIG_SYS_BOOTCS_CFG           0x00047801
 343 #define CONFIG_SYS_CS1_START            CONFIG_SYS_FLASH_BASE
 344 #define CONFIG_SYS_CS1_SIZE             0x00800000
 345 #define CONFIG_SYS_CS1_CFG              0x00047800
 346
 347 #else /* !CONFIG_MPC5200_DDR */
 348
 349 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
 350 #define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
 351 #define CONFIG_SYS_BOOTCS_CFG           0x00047801
 352 #define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
 353 #define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
 354
 355 #endif /* CONFIG_MPC5200_DDR */
 356 #endif /*CONFIG_LITE5200B */
 357
 358 #define CONFIG_SYS_CS_BURST             0x00000000
 359 #define CONFIG_SYS_CS_DEADCYCLE 0x33333333
 360
 361 #define CONFIG_SYS_RESET_ADDRESS        0xff000000
 362
 363 /*-----------------------------------------------------------------------
 364  * USB stuff
 365  *-----------------------------------------------------------------------
 366  */
 367 #define CONFIG_USB_CLOCK        0x0001BBBB
 368 #define CONFIG_USB_CONFIG       0x00001000
 369
 370 /*-----------------------------------------------------------------------
 371  * IDE/ATA stuff Supports IDE harddisk
 372  *-----------------------------------------------------------------------
 373  */
 374
 375 #undef  CONFIG_IDE_8xx_PCCARD           /* Use IDE with PC Card Adapter */
 376
 377 #undef  CONFIG_IDE_8xx_DIRECT           /* Direct IDE    not supported  */
 378 #undef  CONFIG_IDE_LED                  /* LED   for ide not supported  */
 379
 380 #define CONFIG_IDE_RESET                /* reset for ide supported      */
 381 #define CONFIG_IDE_PREINIT
 382
 383 #define CONFIG_SYS_IDE_MAXBUS           1       /* max. 1 IDE bus               */
 384 #define CONFIG_SYS_IDE_MAXDEVICE        2       /* max. 1 drive per IDE bus     */
 385
 386 #define CONFIG_SYS_ATA_IDE0_OFFSET      0x0000
 387
 388 #define CONFIG_SYS_ATA_BASE_ADDR        MPC5XXX_ATA
 389
 390 /* Offset for data I/O                  */
 391 #define CONFIG_SYS_ATA_DATA_OFFSET      (0x0060)
 392
 393 /* Offset for normal register accesses  */
 394 #define CONFIG_SYS_ATA_REG_OFFSET       (CONFIG_SYS_ATA_DATA_OFFSET)
 395
 396 /* Offset for alternate registers       */
 397 #define CONFIG_SYS_ATA_ALT_OFFSET       (0x005C)
 398
 399 /* Interval between registers                                                */
 400 #define CONFIG_SYS_ATA_STRIDE          4
 401
 402 #define CONFIG_ATAPI            1
 403
 404 #endif /* __CONFIG_H */