include/configs/IceCube.h

   1 /*
   2  * (C) Copyright 2003-2005
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #ifndef __CONFIG_H
  25 #define __CONFIG_H
  26
  27 /*
  28  * High Level Configuration Options
  29  * (easy to change)
  30  */
  31
  32 #define CONFIG_MPC5xxx          1       /* This is an MPC5xxx CPU */
  33 #define CONFIG_ICECUBE          1       /* ... on IceCube board */
  34
  35 #define CFG_MPC5XXX_CLKIN       33000000 /* ... running at 33.000000MHz */
  36
  37 #define BOOTFLAG_COLD           0x01    /* Normal Power-On: Boot from FLASH  */
  38 #define BOOTFLAG_WARM           0x02    /* Software reboot           */
  39
  40 /*
  41  * Serial console configuration
  42  */
  43 #define CONFIG_PSC_CONSOLE      1       /* console is on PSC1 */
  44 #define CONFIG_BAUDRATE         115200  /* ... at 115200 bps */
  45 #define CFG_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200, 230400 }
  46
  47
  48 #ifdef CONFIG_MPC5200   /* MPC5100 PCI is not supported yet. */
  49 /*
  50  * PCI Mapping:
  51  * 0x40000000 - 0x4fffffff - PCI Memory
  52  * 0x50000000 - 0x50ffffff - PCI IO Space
  53  */
  54 #define CONFIG_PCI
  55
  56 #if defined(CONFIG_PCI)
  57 #define CONFIG_PCI_PNP          1
  58 #define CONFIG_PCI_SCAN_SHOW    1
  59 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
  60
  61 #define CONFIG_PCI_MEM_BUS      0x40000000
  62 #define CONFIG_PCI_MEM_PHYS     CONFIG_PCI_MEM_BUS
  63 #define CONFIG_PCI_MEM_SIZE     0x10000000
  64
  65 #define CONFIG_PCI_IO_BUS       0x50000000
  66 #define CONFIG_PCI_IO_PHYS      CONFIG_PCI_IO_BUS
  67 #define CONFIG_PCI_IO_SIZE      0x01000000
  68 #endif
  69
  70 #define CFG_XLB_PIPELINING      1
  71
  72 #define CONFIG_NET_MULTI        1
  73 #define CONFIG_MII              1
  74 #define CONFIG_EEPRO100         1
  75 #define CFG_RX_ETH_BUFFER       8  /* use 8 rx buffer on eepro100  */
  76 #define CONFIG_NS8382X          1
  77
  78 #else
  79 #define CONFIG_MII              1
  80 #endif
  81
  82 /* Partitions */
  83 #define CONFIG_MAC_PARTITION
  84 #define CONFIG_DOS_PARTITION
  85 #define CONFIG_ISO_PARTITION
  86
  87 /* USB */
  88 #define CONFIG_USB_OHCI_NEW
  89 #define CONFIG_USB_STORAGE
  90 #define CFG_OHCI_BE_CONTROLLER
  91 #undef CFG_USB_OHCI_BOARD_INIT
  92 #define CFG_USB_OHCI_CPU_INIT   1
  93 #define CFG_USB_OHCI_REGS_BASE  MPC5XXX_USB
  94 #define CFG_USB_OHCI_SLOT_NAME  "mpc5200"
  95 #define CFG_USB_OHCI_MAX_ROOT_PORTS     15
  96
  97 #define CONFIG_TIMESTAMP                /* Print image info with timestamp */
  98
  99
 100 /*
 101  * BOOTP options
 102  */
 103 #define CONFIG_BOOTP_BOOTFILESIZE
 104 #define CONFIG_BOOTP_BOOTPATH
 105 #define CONFIG_BOOTP_GATEWAY
 106 #define CONFIG_BOOTP_HOSTNAME
 107
 108
 109 /*
 110  * Command line configuration.
 111  */
 112 #include <config_cmd_default.h>
 113
 114 #define CONFIG_CMD_EEPROM
 115 #define CONFIG_CMD_FAT
 116 #define CONFIG_CMD_I2C
 117 #define CONFIG_CMD_IDE
 118 #define CONFIG_CMD_NFS
 119 #define CONFIG_CMD_SNTP
 120 #define CONFIG_CMD_USB
 121
 122 #if defined(CONFIG_PCI)
 123 #define CONFIG_CMD_PCI
 124 #endif
 125
 126
 127 #if (TEXT_BASE == 0xFF000000)           /* Boot low with 16 MB Flash */
 128 #   define CFG_LOWBOOT          1
 129 #   define CFG_LOWBOOT16        1
 130 #endif
 131 #if (TEXT_BASE == 0xFF800000)           /* Boot low with  8 MB Flash */
 132 #if defined(CONFIG_LITE5200B)
 133 #   error CFG_LOWBOOT08 is incompatible with the Lite5200B
 134 #else
 135 #   define CFG_LOWBOOT          1
 136 #   define CFG_LOWBOOT08        1
 137 #endif
 138 #endif
 139
 140 /*
 141  * Autobooting
 142  */
 143 #define CONFIG_BOOTDELAY        5       /* autoboot after 5 seconds */
 144
 145 #define CONFIG_PREBOOT  "echo;" \
 146         "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
 147         "echo"
 148
 149 #undef  CONFIG_BOOTARGS
 150
 151 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 152         "netdev=eth0\0"                                                 \
 153         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 154                 "nfsroot=${serverip}:${rootpath}\0"                     \
 155         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 156         "addip=setenv bootargs ${bootargs} "                            \
 157                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 158                 ":${hostname}:${netdev}:off panic=1\0"                  \
 159         "flash_nfs=run nfsargs addip;"                                  \
 160                 "bootm ${kernel_addr}\0"                                \
 161         "flash_self=run ramargs addip;"                                 \
 162                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
 163         "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0"     \
 164         "rootpath=/opt/eldk/ppc_82xx\0"                                 \
 165         "bootfile=/tftpboot/MPC5200/uImage\0"                           \
 166         ""
 167
 168 #define CONFIG_BOOTCOMMAND      "run flash_self"
 169
 170 #if defined(CONFIG_MPC5200)
 171 /*
 172  * IPB Bus clocking configuration.
 173  */
 174 #if defined(CONFIG_LITE5200B)
 175 #define CFG_IPBCLK_EQUALS_XLBCLK        /* define for 133MHz speed */
 176 #else
 177 #undef CFG_IPBCLK_EQUALS_XLBCLK         /* define for 133MHz speed */
 178 #endif
 179 #endif /* CONFIG_MPC5200 */
 180
 181 /* pass open firmware flat tree */
 182 #define CONFIG_OF_LIBFDT        1
 183 #define CONFIG_OF_BOARD_SETUP   1
 184
 185 #define OF_CPU                  "PowerPC,5200@0"
 186 #define OF_SOC                  "soc5200@f0000000"
 187 #define OF_TBCLK                (bd->bi_busfreq / 4)
 188 #define OF_STDOUT_PATH          "/soc5200@f0000000/serial@2000"
 189
 190 /*
 191  * I2C configuration
 192  */
 193 #define CONFIG_HARD_I2C         1       /* I2C with hardware support */
 194 #define CFG_I2C_MODULE          2       /* Select I2C module #1 or #2 */
 195
 196 #define CFG_I2C_SPEED           100000 /* 100 kHz */
 197 #define CFG_I2C_SLAVE           0x7F
 198
 199 /*
 200  * EEPROM configuration
 201  */
 202 #define CFG_I2C_EEPROM_ADDR             0x50    /* 1010000x */
 203 #define CFG_I2C_EEPROM_ADDR_LEN         1
 204 #define CFG_EEPROM_PAGE_WRITE_BITS      3
 205 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS  70
 206
 207 /*
 208  * Flash configuration
 209  */
 210 #if defined(CONFIG_LITE5200B)
 211 #define CFG_FLASH_BASE          0xFE000000
 212 #define CFG_FLASH_SIZE          0x01000000
 213 #if !defined(CFG_LOWBOOT)
 214 #define CFG_ENV_ADDR            (CFG_FLASH_BASE + 0x01760000 + 0x00800000)
 215 #else   /* CFG_LOWBOOT */
 216 #if defined(CFG_LOWBOOT08)
 217 # error CFG_LOWBOOT08 is incompatible with the Lite5200B
 218 #endif
 219 #if defined(CFG_LOWBOOT16)
 220 #define CFG_ENV_ADDR            (CFG_FLASH_BASE + 0x01060000)
 221 #endif
 222 #endif /* CFG_LOWBOOT */
 223 #else /* !CONFIG_LITE5200B (IceCube)*/
 224 #define CFG_FLASH_BASE          0xFF000000
 225 #define CFG_FLASH_SIZE          0x01000000
 226 #if !defined(CFG_LOWBOOT)
 227 #define CFG_ENV_ADDR            (CFG_FLASH_BASE + 0x00740000 + 0x00800000)
 228 #else   /* CFG_LOWBOOT */
 229 #if defined(CFG_LOWBOOT08)
 230 #define CFG_ENV_ADDR            (CFG_FLASH_BASE + 0x00040000 + 0x00800000)
 231 #endif
 232 #if defined(CFG_LOWBOOT16)
 233 #define CFG_ENV_ADDR            (CFG_FLASH_BASE + 0x00040000)
 234 #endif
 235 #endif  /* CFG_LOWBOOT */
 236 #endif /* CONFIG_LITE5200B */
 237 #define CFG_MAX_FLASH_BANKS     2       /* max num of memory banks      */
 238
 239 #define CFG_MAX_FLASH_SECT      128     /* max num of sects on one chip */
 240
 241 #define CFG_FLASH_ERASE_TOUT    240000  /* Flash Erase Timeout (in ms)  */
 242 #define CFG_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (in ms)  */
 243
 244 #undef CONFIG_FLASH_16BIT       /* Flash is 8-bit */
 245
 246 #if defined(CONFIG_LITE5200B)
 247 #define CFG_FLASH_CFI_DRIVER
 248 #define CFG_FLASH_CFI
 249 #define CFG_FLASH_BANKS_LIST    {CFG_CS1_START,CFG_CS0_START}
 250 #endif
 251
 252
 253 /*
 254  * Environment settings
 255  */
 256 #define CFG_ENV_IS_IN_FLASH     1
 257 #define CFG_ENV_SIZE            0x10000
 258 #if defined(CONFIG_LITE5200B)
 259 #define CFG_ENV_SECT_SIZE       0x20000
 260 #else
 261 #define CFG_ENV_SECT_SIZE       0x10000
 262 #endif
 263 #define CONFIG_ENV_OVERWRITE    1
 264
 265 /*
 266  * Memory map
 267  */
 268 #define CFG_MBAR                0xF0000000
 269 #define CFG_SDRAM_BASE          0x00000000
 270 #define CFG_DEFAULT_MBAR        0x80000000
 271
 272 /* Use SRAM until RAM will be available */
 273 #define CFG_INIT_RAM_ADDR       MPC5XXX_SRAM
 274 #define CFG_INIT_RAM_END        MPC5XXX_SRAM_SIZE       /* End of used area in DPRAM */
 275
 276
 277 #define CFG_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
 278 #define CFG_GBL_DATA_OFFSET     (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
 279 #define CFG_INIT_SP_OFFSET      CFG_GBL_DATA_OFFSET
 280
 281 #define CFG_MONITOR_BASE    TEXT_BASE
 282 #if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
 283 #   define CFG_RAMBOOT          1
 284 #endif
 285
 286 #define CFG_MONITOR_LEN         (192 << 10)     /* Reserve 192 kB for Monitor   */
 287 #define CFG_MALLOC_LEN          (128 << 10)     /* Reserve 128 kB for malloc()  */
 288 #define CFG_BOOTMAPSZ           (8 << 20)       /* Initial Memory map for Linux */
 289
 290 /*
 291  * Ethernet configuration
 292  */
 293 #define CONFIG_MPC5xxx_FEC      1
 294 /*
 295  * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
 296  */
 297 /* #define CONFIG_FEC_10MBIT 1 */
 298 #define CONFIG_PHY_ADDR         0x00
 299 #if defined(CONFIG_LITE5200B)
 300 #define CONFIG_FEC_MII100       1
 301 #endif
 302
 303 /*
 304  * GPIO configuration
 305  */
 306 #ifdef CONFIG_MPC5200_DDR
 307 #define CFG_GPS_PORT_CONFIG     0x90000004
 308 #else
 309 #define CFG_GPS_PORT_CONFIG     0x10000004
 310 #endif
 311
 312 /*
 313  * Miscellaneous configurable options
 314  */
 315 #define CFG_LONGHELP                    /* undef to save memory     */
 316 #define CFG_PROMPT              "=> "   /* Monitor Command Prompt   */
 317 #if defined(CONFIG_CMD_KGDB)
 318 #define CFG_CBSIZE              1024    /* Console I/O Buffer Size  */
 319 #else
 320 #define CFG_CBSIZE              256     /* Console I/O Buffer Size  */
 321 #endif
 322 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)   /* Print Buffer Size */
 323 #define CFG_MAXARGS             16              /* max number of command args   */
 324 #define CFG_BARGSIZE            CFG_CBSIZE      /* Boot Argument Buffer Size    */
 325
 326 #define CFG_MEMTEST_START       0x00100000      /* memtest works on */
 327 #define CFG_MEMTEST_END         0x00f00000      /* 1 ... 15 MB in DRAM  */
 328
 329 #define CFG_LOAD_ADDR           0x100000        /* default load address */
 330
 331 #define CFG_HZ                  1000    /* decrementer freq: 1 ms ticks */
 332
 333 #define CFG_CACHELINE_SIZE      32      /* For MPC5xxx CPUs */
 334 #if defined(CONFIG_CMD_KGDB)
 335 #  define CFG_CACHELINE_SHIFT   5       /* log base 2 of the above value */
 336 #endif
 337
 338 /*
 339  * Various low-level settings
 340  */
 341 #if defined(CONFIG_MPC5200)
 342 #define CFG_HID0_INIT           HID0_ICE | HID0_ICFI
 343 #define CFG_HID0_FINAL          HID0_ICE
 344 #else
 345 #define CFG_HID0_INIT           0
 346 #define CFG_HID0_FINAL          0
 347 #endif
 348
 349 #if defined(CONFIG_LITE5200B)
 350 #define CFG_CS1_START           CFG_FLASH_BASE
 351 #define CFG_CS1_SIZE            CFG_FLASH_SIZE
 352 #define CFG_CS1_CFG             0x00047800
 353 #define CFG_CS0_START           (CFG_FLASH_BASE + CFG_FLASH_SIZE)
 354 #define CFG_CS0_SIZE            CFG_FLASH_SIZE
 355 #define CFG_BOOTCS_START        CFG_CS0_START
 356 #define CFG_BOOTCS_SIZE         CFG_FLASH_SIZE
 357 #define CFG_BOOTCS_CFG          0x00047800
 358 #else /* IceCube aka Lite5200 */
 359 #ifdef CONFIG_MPC5200_DDR
 360
 361 #define CFG_BOOTCS_START        (CFG_CS1_START + CFG_CS1_SIZE)
 362 #define CFG_BOOTCS_SIZE         0x00800000
 363 #define CFG_BOOTCS_CFG          0x00047801
 364 #define CFG_CS1_START           CFG_FLASH_BASE
 365 #define CFG_CS1_SIZE            0x00800000
 366 #define CFG_CS1_CFG             0x00047800
 367
 368 #else /* !CONFIG_MPC5200_DDR */
 369
 370 #define CFG_BOOTCS_START        CFG_FLASH_BASE
 371 #define CFG_BOOTCS_SIZE         CFG_FLASH_SIZE
 372 #define CFG_BOOTCS_CFG          0x00047801
 373 #define CFG_CS0_START           CFG_FLASH_BASE
 374 #define CFG_CS0_SIZE            CFG_FLASH_SIZE
 375
 376 #endif /* CONFIG_MPC5200_DDR */
 377 #endif /*CONFIG_LITE5200B */
 378
 379 #define CFG_CS_BURST            0x00000000
 380 #define CFG_CS_DEADCYCLE        0x33333333
 381
 382 #define CFG_RESET_ADDRESS       0xff000000
 383
 384 /*-----------------------------------------------------------------------
 385  * USB stuff
 386  *-----------------------------------------------------------------------
 387  */
 388 #define CONFIG_USB_CLOCK        0x0001BBBB
 389 #define CONFIG_USB_CONFIG       0x00001000
 390
 391 /*-----------------------------------------------------------------------
 392  * IDE/ATA stuff Supports IDE harddisk
 393  *-----------------------------------------------------------------------
 394  */
 395
 396 #undef  CONFIG_IDE_8xx_PCCARD           /* Use IDE with PC Card Adapter */
 397
 398 #undef  CONFIG_IDE_8xx_DIRECT           /* Direct IDE    not supported  */
 399 #undef  CONFIG_IDE_LED                  /* LED   for ide not supported  */
 400
 401 #define CONFIG_IDE_RESET                /* reset for ide supported      */
 402 #define CONFIG_IDE_PREINIT
 403
 404 #define CFG_IDE_MAXBUS          1       /* max. 1 IDE bus               */
 405 #define CFG_IDE_MAXDEVICE       2       /* max. 1 drive per IDE bus     */
 406
 407 #define CFG_ATA_IDE0_OFFSET     0x0000
 408
 409 #define CFG_ATA_BASE_ADDR       MPC5XXX_ATA
 410
 411 /* Offset for data I/O                  */
 412 #define CFG_ATA_DATA_OFFSET     (0x0060)
 413
 414 /* Offset for normal register accesses  */
 415 #define CFG_ATA_REG_OFFSET      (CFG_ATA_DATA_OFFSET)
 416
 417 /* Offset for alternate registers       */
 418 #define CFG_ATA_ALT_OFFSET      (0x005C)
 419
 420 /* Interval between registers                                                */
 421 #define CFG_ATA_STRIDE          4
 422
 423 #define CONFIG_ATAPI            1
 424
 425 #endif /* __CONFIG_H */