include/configs/M5253EVBE.h

   1 /*
   2  * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
   3  * Hayden Fraser (Hayden.Fraser@freescale.com)
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #ifndef _M5253EVBE_H
  25 #define _M5253EVBE_H
  26
  27 #define CONFIG_MCF52x2          /* define processor family */
  28 #define CONFIG_M5253            /* define processor type */
  29 #define CONFIG_M5253EVBE        /* define board type */
  30
  31 #define CONFIG_MCFTMR
  32
  33 #define CONFIG_MCFUART
  34 #define CONFIG_SYS_UART_PORT            (0)
  35 #define CONFIG_BAUDRATE         115200
  36
  37 #undef CONFIG_WATCHDOG          /* disable watchdog */
  38
  39 #define CONFIG_BOOTDELAY        5
  40
  41 /* Configuration for environment
  42  * Environment is embedded in u-boot in the second sector of the flash
  43  */
  44 #ifndef CONFIG_MONITOR_IS_IN_RAM
  45 #define CONFIG_ENV_OFFSET               0x4000
  46 #define CONFIG_ENV_SECT_SIZE    0x2000
  47 #define CONFIG_ENV_IS_IN_FLASH  1
  48 #else
  49 #define CONFIG_ENV_ADDR         0xffe04000
  50 #define CONFIG_ENV_SECT_SIZE    0x2000
  51 #define CONFIG_ENV_IS_IN_FLASH  1
  52 #endif
  53
  54 /*
  55  * BOOTP options
  56  */
  57 #undef CONFIG_BOOTP_BOOTFILESIZE
  58 #undef CONFIG_BOOTP_BOOTPATH
  59 #undef CONFIG_BOOTP_GATEWAY
  60 #undef CONFIG_BOOTP_HOSTNAME
  61
  62 /*
  63  * Command line configuration.
  64  */
  65 #include <config_cmd_default.h>
  66 #define CONFIG_CMD_CACHE
  67 #undef CONFIG_CMD_NET
  68 #define CONFIG_CMD_LOADB
  69 #define CONFIG_CMD_LOADS
  70 #define CONFIG_CMD_EXT2
  71 #define CONFIG_CMD_FAT
  72 #define CONFIG_CMD_IDE
  73 #define CONFIG_CMD_MEMORY
  74 #define CONFIG_CMD_MISC
  75
  76 /* ATA */
  77 #define CONFIG_DOS_PARTITION
  78 #define CONFIG_MAC_PARTITION
  79 #define CONFIG_IDE_RESET        1
  80 #define CONFIG_IDE_PREINIT      1
  81 #define CONFIG_ATAPI
  82 #undef CONFIG_LBA48
  83
  84 #define CONFIG_SYS_IDE_MAXBUS           1
  85 #define CONFIG_SYS_IDE_MAXDEVICE        2
  86
  87 #define CONFIG_SYS_ATA_BASE_ADDR        (CONFIG_SYS_MBAR2 + 0x800)
  88 #define CONFIG_SYS_ATA_IDE0_OFFSET      0
  89
  90 #define CONFIG_SYS_ATA_DATA_OFFSET      0xA0    /* Offset for data I/O */
  91 #define CONFIG_SYS_ATA_REG_OFFSET       0xA0    /* Offset for normal register accesses */
  92 #define CONFIG_SYS_ATA_ALT_OFFSET       0xC0    /* Offset for alternate registers */
  93 #define CONFIG_SYS_ATA_STRIDE           4       /* Interval between registers */
  94
  95 #define CONFIG_SYS_PROMPT               "=> "
  96 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
  97
  98 #if defined(CONFIG_CMD_KGDB)
  99 #define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size */
 100 #else
 101 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
 102 #endif
 103 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)      /* Print Buffer Size */
 104 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 105 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size */
 106
 107 #define CONFIG_SYS_LOAD_ADDR            0x00100000
 108
 109 #define CONFIG_SYS_MEMTEST_START        0x400
 110 #define CONFIG_SYS_MEMTEST_END          0x380000
 111
 112 #define CONFIG_SYS_HZ                   1000
 113
 114 #undef CONFIG_SYS_PLL_BYPASS            /* bypass PLL for test purpose */
 115 #define CONFIG_SYS_FAST_CLK
 116 #ifdef CONFIG_SYS_FAST_CLK
 117 #       define CONFIG_SYS_PLLCR 0x1243E054
 118 #       define CONFIG_SYS_CLK           140000000
 119 #else
 120 #       define CONFIG_SYS_PLLCR 0x135a4140
 121 #       define CONFIG_SYS_CLK           70000000
 122 #endif
 123
 124 /*
 125  * Low Level Configuration Settings
 126  * (address mappings, register initial values, etc.)
 127  * You should know what you are doing if you make changes here.
 128  */
 129
 130 #define CONFIG_SYS_MBAR         0x10000000      /* Register Base Addrs */
 131 #define CONFIG_SYS_MBAR2                0x80000000      /* Module Base Addrs 2 */
 132
 133 /*
 134  * Definitions for initial stack pointer and data area (in DPRAM)
 135  */
 136 #define CONFIG_SYS_INIT_RAM_ADDR        0x20000000
 137 #define CONFIG_SYS_INIT_RAM_SIZE        0x10000 /* Size of used area in internal SRAM */
 138 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 139 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 140
 141 /*
 142  * Start addresses for the final memory configuration
 143  * (Set up by the startup code)
 144  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
 145  */
 146 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 147 #define CONFIG_SYS_SDRAM_SIZE           8       /* SDRAM size in MB */
 148
 149 #ifdef CONFIG_MONITOR_IS_IN_RAM
 150 #define CONFIG_SYS_MONITOR_BASE 0x20000
 151 #else
 152 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
 153 #endif
 154
 155 #define CONFIG_SYS_MONITOR_LEN          0x40000
 156 #define CONFIG_SYS_MALLOC_LEN           (256 << 10)
 157 #define CONFIG_SYS_BOOTPARAMS_LEN       (64*1024)
 158
 159 /*
 160  * For booting Linux, the board info and command line data
 161  * have to be in the first 8 MB of memory, since this is
 162  * the maximum mapped by the Linux kernel during initialization ??
 163  */
 164 #define CONFIG_SYS_BOOTMAPSZ            (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
 165 #define CONFIG_SYS_BOOTM_LEN            (CONFIG_SYS_SDRAM_SIZE << 20)
 166
 167 /* FLASH organization */
 168 #define CONFIG_SYS_FLASH_BASE           CONFIG_SYS_CS0_BASE
 169 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks */
 170 #define CONFIG_SYS_MAX_FLASH_SECT       35      /* max number of sectors on one chip */
 171 #define CONFIG_SYS_FLASH_ERASE_TOUT     1000
 172
 173 #define CONFIG_SYS_FLASH_CFI            1
 174 #define CONFIG_FLASH_CFI_DRIVER 1
 175 #define CONFIG_SYS_FLASH_SIZE           0x200000
 176 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_16BIT
 177
 178 /* Cache Configuration */
 179 #define CONFIG_SYS_CACHELINE_SIZE       16
 180
 181 #define ICACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 182                                          CONFIG_SYS_INIT_RAM_SIZE - 8)
 183 #define DCACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 184                                          CONFIG_SYS_INIT_RAM_SIZE - 4)
 185 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_DCM)
 186 #define CONFIG_SYS_CACHE_ACR0           (CONFIG_SYS_FLASH_BASE | \
 187                                          CF_ADDRMASK(2) | \
 188                                          CF_ACR_EN | CF_ACR_SM_ALL)
 189 #define CONFIG_SYS_CACHE_ACR1           (CONFIG_SYS_SDRAM_BASE | \
 190                                          CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
 191                                          CF_ACR_EN | CF_ACR_SM_ALL)
 192 #define CONFIG_SYS_CACHE_ICACR          (CF_CACR_CENB | CF_CACR_CEIB | \
 193                                          CF_CACR_DBWE)
 194
 195 /* Port configuration */
 196 #define CONFIG_SYS_FECI2C               0xF0
 197
 198 #define CONFIG_SYS_CS0_BASE             0xFFE00000
 199 #define CONFIG_SYS_CS0_MASK             0x001F0021
 200 #define CONFIG_SYS_CS0_CTRL             0x00001D80
 201
 202 /*-----------------------------------------------------------------------
 203  * Port configuration
 204  */
 205 #define CONFIG_SYS_GPIO_FUNC            0x00000008      /* Set gpio pins: none */
 206 #define CONFIG_SYS_GPIO1_FUNC           0x00df00f0      /* 36-39(SWITCH),48-52(FPGAs),54 */
 207 #define CONFIG_SYS_GPIO_EN              0x00000008      /* Set gpio output enable */
 208 #define CONFIG_SYS_GPIO1_EN             0x00c70000      /* Set gpio output enable */
 209 #define CONFIG_SYS_GPIO_OUT             0x00000008      /* Set outputs to default state */
 210 #define CONFIG_SYS_GPIO1_OUT            0x00c70000      /* Set outputs to default state */
 211 #define CONFIG_SYS_GPIO1_LED            0x00400000      /* user led */
 212
 213 #endif                          /* _M5253EVB_H */