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1 /*
2 * Configuation settings for the Freescale M5271EVB
3 *
4 * Based on MC5272C3 and r5200 board configs
5 * (C) Copyright 2006 Lab X Technologies <zachary.landau@labxtechnologies.com>
6 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27 /*
28 * board/config.h - configuration options, board specific
29 */
30
31 #ifndef _M5271EVB_H
32 #define _M5271EVB_H
33
34 /*
35 * High Level Configuration Options (easy to change)
36 */
37 #define CONFIG_MCF52x2 /* define processor family */
38 #define CONFIG_M5271 /* define processor type */
39 #define CONFIG_M5271EVB /* define board type */
40
41 #define CONFIG_MCFTMR
42
43 #define CONFIG_MCFUART
44 #define CONFIG_SYS_UART_PORT (0)
45 #define CONFIG_BAUDRATE 115200
46 #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
47
48 #undef CONFIG_WATCHDOG /* disable watchdog */
49
50 /* Configuration for environment
51 * Environment is embedded in u-boot in the second sector of the flash
52 */
53 #ifndef CONFIG_MONITOR_IS_IN_RAM
54 #define CONFIG_ENV_OFFSET 0x4000
55 #else
56 #define CONFIG_ENV_ADDR 0xffe04000
57 #endif
58 #define CONFIG_ENV_SECT_SIZE 0x2000
59 #define CONFIG_ENV_IS_IN_FLASH 1
60 #define CONFIG_SYS_USE_PPCENV /* Environment embedded in sect .ppcenv */
61
62 /*
63 * BOOTP options
64 */
65 #define CONFIG_BOOTP_BOOTFILESIZE
66 #define CONFIG_BOOTP_BOOTPATH
67 #define CONFIG_BOOTP_GATEWAY
68 #define CONFIG_BOOTP_HOSTNAME
69
70 /*
71 * Command line configuration.
72 */
73 #include <config_cmd_default.h>
74
75 #define CONFIG_CMD_PING
76 #define CONFIG_CMD_NET
77 #define CONFIG_CMD_MII
78 #define CONFIG_CMD_ELF
79 #define CONFIG_CMD_FLASH
80 #define CONFIG_CMD_I2C
81 #define CONFIG_CMD_MEMORY
82 #define CONFIG_CMD_MISC
83
84 #undef CONFIG_CMD_LOADS
85 #define CONFIG_CMD_LOADB
86 #define CONFIG_CMDLINE_EDITING 1 /* enables command line history */
87 #define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */
88 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
89
90 #define CONFIG_MCFFEC
91 #ifdef CONFIG_MCFFEC
92 # define CONFIG_NET_MULTI 1
93 # define CONFIG_MII 1
94 # define CONFIG_MII_INIT 1
95 # define CONFIG_SYS_DISCOVER_PHY
96 # define CONFIG_SYS_RX_ETH_BUFFER 8
97 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
98
99 # define CONFIG_SYS_FEC0_PINMUX 0
100 # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
101 # define MCFFEC_TOUT_LOOP 50000
102 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
103 # ifndef CONFIG_SYS_DISCOVER_PHY
104 # define FECDUPLEX FULL
105 # define FECSPEED _100BASET
106 # else
107 # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
108 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
109 # endif
110 # endif /* CONFIG_SYS_DISCOVER_PHY */
111 #endif
112
113 /* I2C */
114 #define CONFIG_FSL_I2C
115 #define CONFIG_HARD_I2C /* I2C with hw support */
116 #undef CONFIG_SOFT_I2C /* I2C bit-banged */
117 #define CONFIG_SYS_I2C_SPEED 80000
118 #define CONFIG_SYS_I2C_SLAVE 0x7F
119 #define CONFIG_SYS_I2C_OFFSET 0x00000300
120 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
121
122 #define CONFIG_BOOTDELAY 1 /* autoboot after 1 seconds */
123 #define CONFIG_BOOTFILE "u-boot.bin"
124 #ifdef CONFIG_MCFFEC
125 # define CONFIG_NET_RETRY_COUNT 5
126 # define CONFIG_ETHADDR 00:e0:0c:bc:e5:60
127 # define CONFIG_IPADDR 192.162.1.2
128 # define CONFIG_NETMASK 255.255.255.0
129 # define CONFIG_SERVERIP 192.162.1.1
130 # define CONFIG_GATEWAYIP 192.162.1.1
131 # define CONFIG_OVERWRITE_ETHADDR_ONCE
132 #endif /* FEC_ENET */
133
134 #define CONFIG_HOSTNAME M5271EVB
135 #define CONFIG_EXTRA_ENV_SETTINGS \
136 "netdev=eth0\0" \
137 "loadaddr=10000\0" \
138 "uboot=u-boot.bin\0" \
139 "load=tftp $loadaddr $uboot\0" \
140 "upd=run load; run prog\0" \
141 "prog=prot off ffe00000 ffe3ffff;" \
142 "era ffe00000 ffe3ffff;" \
143 "cp.b $loadaddr ffe00000 $filesize;" \
144 "save\0" \
145 ""
146
147 #define CONFIG_SYS_PROMPT "=> "
148 #define CONFIG_SYS_LONGHELP /* undef to save memory */
149
150 #if defined(CONFIG_CMD_KGDB)
151 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
152 #else
153 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
154 #endif
155 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
156 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
157 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
158
159 #define CONFIG_SYS_LOAD_ADDR 0x00100000
160
161 #define CONFIG_SYS_MEMTEST_START 0x400
162 #define CONFIG_SYS_MEMTEST_END 0x380000
163
164 #define CONFIG_SYS_HZ 1000000
165
166 /* Clock configuration
167 * The external oscillator is a 25.000 MHz
168 * CONFIG_SYS_CLK for ColdFire V2 sets cpu_clk (not bus_clk)
169 * bus_clk = (cpu_clk/2) (fixed ratio)
170 *
171 * If CONFIG_SYS_CLK is changed. the CONFIG_SYS_MCF_SYNCR must be updated to
172 * match the new clock speed. Max cpu_clk is 150 MHz.
173 */
174 #define CONFIG_SYS_CLK 100000000
175 #define CONFIG_SYS_MCF_SYNCR (MCF_SYNCR_MFD_4X | MCF_SYNCR_RFD_DIV1)
176
177 /*
178 * Low Level Configuration Settings
179 * (address mappings, register initial values, etc.)
180 * You should know what you are doing if you make changes here.
181 */
182
183 #define CONFIG_SYS_MBAR 0x40000000 /* Register Base Addrs */
184
185 /*
186 * Definitions for initial stack pointer and data area (in DPRAM)
187 */
188 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
189 #define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */
190 #define CONFIG_SYS_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
191 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
192 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
193
194 /*
195 * Start addresses for the final memory configuration
196 * (Set up by the startup code)
197 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
198 */
199 #define CONFIG_SYS_SDRAM_BASE 0x00000000
200 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
201 #define CONFIG_SYS_FLASH_BASE 0xffe00000
202
203 #ifdef CONFIG_MONITOR_IS_IN_RAM
204 #define CONFIG_SYS_MONITOR_BASE 0x20000
205 #else
206 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
207 #endif
208
209 #define CONFIG_SYS_MONITOR_LEN 0x40000
210 #define CONFIG_SYS_MALLOC_LEN (256 << 10)
211 #define CONFIG_SYS_BOOTPARAMS_LEN (64*1024)
212
213 /*
214 * For booting Linux, the board info and command line data
215 * have to be in the first 8 MB of memory, since this is
216 * the maximum mapped by the Linux kernel during initialization ??
217 */
218 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
219
220 /* FLASH organization */
221 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
222 #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
223 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000
224
225 #define CONFIG_SYS_FLASH_CFI 1
226 #define CONFIG_FLASH_CFI_DRIVER 1
227 #define CONFIG_SYS_FLASH_SIZE 0x200000
228
229 /* Cache Configuration */
230 #define CONFIG_SYS_CACHELINE_SIZE 16
231
232 /* Chip Select 0 : Boot Flash */
233 #define CONFIG_SYS_CS0_BASE 0xFFE00000
234 #define CONFIG_SYS_CS0_MASK 0x001F0001
235 #define CONFIG_SYS_CS0_CTRL 0x00001980
236
237 /* Chip Select 1 : External SRAM */
238 #define CONFIG_SYS_CS1_BASE 0x30000000
239 #define CONFIG_SYS_CS1_MASK 0x00070001
240 #define CONFIG_SYS_CS1_CTRL 0x00001900
241
242 #endif /* _M5271EVB_H */