include/configs/M5271EVB.h

   1 /*
   2  * Configuation settings for the Freescale M5271EVB
   3  *
   4  * Based on MC5272C3 and r5200 board configs
   5  * (C) Copyright 2006 Lab X Technologies <zachary.landau@labxtechnologies.com>
   6  * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
   7  *
   8  * See file CREDITS for list of people who contributed to this
   9  * project.
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License as
  13  * published by the Free Software Foundation; either version 2 of
  14  * the License, or (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24  * MA 02111-1307 USA
  25  */
  26
  27 /*
  28  * board/config.h - configuration options, board specific
  29  */
  30
  31 #ifndef _M5271EVB_H
  32 #define _M5271EVB_H
  33
  34 #undef DEBUG
  35
  36 /*
  37  * High Level Configuration Options (easy to change)
  38  */
  39 #define CONFIG_MCF52x2          /* define processor family */
  40 #define CONFIG_M5271            /* define processor type */
  41 #define CONFIG_M5271EVB         /* define board type */
  42
  43 #define CONFIG_MCFTMR
  44
  45 #define CONFIG_MCFUART
  46 #define CFG_UART_PORT           (0)
  47 #define CONFIG_BAUDRATE         19200
  48 #define CFG_BAUDRATE_TABLE      { 9600 , 19200 , 38400 , 57600, 115200 }
  49
  50 #undef CONFIG_WATCHDOG          /* disable watchdog */
  51
  52 /* Configuration for environment
  53  * Environment is embedded in u-boot in the second sector of the flash
  54  */
  55 #ifndef CONFIG_MONITOR_IS_IN_RAM
  56 #define CFG_ENV_OFFSET          0x4000
  57 #else
  58 #define CFG_ENV_ADDR            0xffe04000
  59 #endif
  60 #define CFG_ENV_SECT_SIZE       0x2000
  61 #define CFG_ENV_IS_IN_FLASH     1
  62 #define CFG_USE_PPCENV                  /* Environment embedded in sect .ppcenv */
  63
  64 /*
  65  * BOOTP options
  66  */
  67 #define CONFIG_BOOTP_BOOTFILESIZE
  68 #define CONFIG_BOOTP_BOOTPATH
  69 #define CONFIG_BOOTP_GATEWAY
  70 #define CONFIG_BOOTP_HOSTNAME
  71
  72 /*
  73  * Command line configuration.
  74  */
  75 #include <config_cmd_default.h>
  76
  77 #define CONFIG_CMD_PING
  78 #define CONFIG_CMD_NET
  79 #define CONFIG_CMD_MII
  80 #define CONFIG_CMD_ELF
  81 #define CONFIG_CMD_FLASH
  82 #define CONFIG_CMD_I2C
  83 #define CONFIG_CMD_MEMORY
  84 #define CONFIG_CMD_MISC
  85
  86 #undef CONFIG_CMD_LOADS
  87 #undef CONFIG_CMD_LOADB
  88
  89 #define CONFIG_MCFFEC
  90 #ifdef CONFIG_MCFFEC
  91 #       define CONFIG_NET_MULTI         1
  92 #       define CONFIG_MII               1
  93 #       define CFG_DISCOVER_PHY
  94 #       define CFG_RX_ETH_BUFFER        8
  95 #       define CFG_FAULT_ECHO_LINK_DOWN
  96
  97 #       define CFG_FEC0_PINMUX          0
  98 #       define CFG_FEC0_MIIBASE         CFG_FEC0_IOBASE
  99 #       define MCFFEC_TOUT_LOOP         50000
 100 /* If CFG_DISCOVER_PHY is not defined - hardcoded */
 101 #       ifndef CFG_DISCOVER_PHY
 102 #               define FECDUPLEX        FULL
 103 #               define FECSPEED         _100BASET
 104 #       else
 105 #               ifndef CFG_FAULT_ECHO_LINK_DOWN
 106 #                       define CFG_FAULT_ECHO_LINK_DOWN
 107 #               endif
 108 #       endif                   /* CFG_DISCOVER_PHY */
 109 #endif
 110
 111 /* I2C */
 112 #define CONFIG_FSL_I2C
 113 #define CONFIG_HARD_I2C         /* I2C with hw support */
 114 #undef CONFIG_SOFT_I2C          /* I2C bit-banged */
 115 #define CFG_I2C_SPEED           80000
 116 #define CFG_I2C_SLAVE           0x7F
 117 #define CFG_I2C_OFFSET          0x00000300
 118 #define CFG_IMMR                CFG_MBAR
 119
 120 #define CONFIG_BOOTDELAY        1       /* autoboot after 5 seconds */
 121 #define CONFIG_BOOTFILE         "u-boot.bin"
 122 #ifdef CONFIG_MCFFEC
 123 #       define CONFIG_NET_RETRY_COUNT   5
 124 #       define CONFIG_ETHADDR   00:e0:0c:bc:e5:60
 125 #       define CONFIG_IPADDR    192.162.1.2
 126 #       define CONFIG_NETMASK   255.255.255.0
 127 #       define CONFIG_SERVERIP  192.162.1.1
 128 #       define CONFIG_GATEWAYIP 192.162.1.1
 129 #       define CONFIG_OVERWRITE_ETHADDR_ONCE
 130 #endif                          /* FEC_ENET */
 131
 132 #define CONFIG_HOSTNAME         M5235EVB
 133 #define CONFIG_EXTRA_ENV_SETTINGS               \
 134         "netdev=eth0\0"                         \
 135         "loadaddr=10000\0"                      \
 136         "u-boot=u-boot.bin\0"                   \
 137         "load=tftp ${loadaddr) ${u-boot}\0"     \
 138         "upd=run load; run prog\0"              \
 139         "prog=prot off ffe00000 ffe2ffff;"              \
 140         "era ffe00000 ffe2ffff;"                                \
 141         "cp.b ${loadaddr} 0 ${filesize};"       \
 142         "save\0"                                \
 143         ""
 144
 145 #define CFG_PROMPT              "=> "
 146 #define CFG_LONGHELP            /* undef to save memory */
 147
 148 #if defined(CONFIG_CMD_KGDB)
 149 #define CFG_CBSIZE              1024    /* Console I/O Buffer Size      */
 150 #else
 151 #define CFG_CBSIZE              256     /* Console I/O Buffer Size      */
 152 #endif
 153 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)   /* Print Buffer Size */
 154 #define CFG_MAXARGS             16      /* max number of command args   */
 155 #define CFG_BARGSIZE            CFG_CBSIZE      /* Boot Argument Buffer Size    */
 156
 157 #define CFG_LOAD_ADDR           0x00100000
 158
 159 #define CFG_MEMTEST_START       0x400
 160 #define CFG_MEMTEST_END         0x380000
 161
 162 #define CFG_HZ                  1000000
 163 #define CFG_CLK                 100000000
 164
 165 /*
 166  * Low Level Configuration Settings
 167  * (address mappings, register initial values, etc.)
 168  * You should know what you are doing if you make changes here.
 169  */
 170
 171 #define CFG_MBAR                0x40000000      /* Register Base Addrs */
 172
 173 /*
 174  * Definitions for initial stack pointer and data area (in DPRAM)
 175  */
 176 #define CFG_INIT_RAM_ADDR       0x20000000
 177 #define CFG_INIT_RAM_END        0x1000  /* End of used area in internal SRAM    */
 178 #define CFG_GBL_DATA_SIZE       64      /* size in bytes reserved for initial data */
 179 #define CFG_GBL_DATA_OFFSET     (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
 180 #define CFG_INIT_SP_OFFSET      CFG_GBL_DATA_OFFSET
 181
 182 /*
 183  * Start addresses for the final memory configuration
 184  * (Set up by the startup code)
 185  * Please note that CFG_SDRAM_BASE _must_ start at 0
 186  */
 187 #define CFG_SDRAM_BASE          0x00000000
 188 #define CFG_SDRAM_SIZE          16      /* SDRAM size in MB */
 189 #define CFG_FLASH_BASE          0xffe00000
 190
 191 #ifdef  CONFIG_MONITOR_IS_IN_RAM
 192 #define CFG_MONITOR_BASE        0x20000
 193 #else
 194 #define CFG_MONITOR_BASE        (CFG_FLASH_BASE + 0x400)
 195 #endif
 196
 197 #define CFG_MONITOR_LEN         0x40000
 198 #define CFG_MALLOC_LEN          (256 << 10)
 199 #define CFG_BOOTPARAMS_LEN      (64*1024)
 200
 201 /*
 202  * For booting Linux, the board info and command line data
 203  * have to be in the first 8 MB of memory, since this is
 204  * the maximum mapped by the Linux kernel during initialization ??
 205  */
 206 #define CFG_BOOTMAPSZ           (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20))
 207
 208 /* FLASH organization */
 209 #define CFG_MAX_FLASH_BANKS     1       /* max number of memory banks           */
 210 #define CFG_MAX_FLASH_SECT      11      /* max number of sectors on one chip    */
 211 #define CFG_FLASH_ERASE_TOUT    1000
 212
 213 #define CFG_FLASH_CFI           1
 214 #define CFG_FLASH_CFI_DRIVER    1
 215 #define CFG_FLASH_SIZE          0x200000
 216
 217 /* Cache Configuration */
 218 #define CFG_CACHELINE_SIZE      16
 219
 220 /* Port configuration */
 221 #define CFG_FECI2C              0xF0
 222
 223 #endif                          /* _M5271EVB_H */