include/configs/M5275EVB.h

   1 /*
   2  * Configuation settings for the Motorola MC5275EVB board.
   3  *
   4  * By Arthur Shipkowski <art@videon-central.com>
   5  * Copyright (C) 2005 Videon Central, Inc.
   6  *
   7  * Based off of M5272C3 board code by Josef Baumgartner
   8  * <josef.baumgartner@telex.de>
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 /*
  14  * board/config.h - configuration options, board specific
  15  */
  16
  17 #ifndef _M5275EVB_H
  18 #define _M5275EVB_H
  19
  20 /*
  21  * High Level Configuration Options
  22  * (easy to change)
  23  */
  24 #define CONFIG_M5275EVB                 /* define board type */
  25
  26 #define CONFIG_MCFTMR
  27
  28 #define CONFIG_MCFUART
  29 #define CONFIG_SYS_UART_PORT            (0)
  30 #define CONFIG_BAUDRATE         115200
  31
  32 /* Configuration for environment
  33  * Environment is embedded in u-boot in the second sector of the flash
  34  */
  35 #ifndef CONFIG_MONITOR_IS_IN_RAM
  36 #define CONFIG_ENV_OFFSET               0x4000
  37 #define CONFIG_ENV_SECT_SIZE    0x2000
  38 #define CONFIG_ENV_IS_IN_FLASH  1
  39 #else
  40 #define CONFIG_ENV_ADDR         0xffe04000
  41 #define CONFIG_ENV_SECT_SIZE    0x2000
  42 #define CONFIG_ENV_IS_IN_FLASH  1
  43 #endif
  44
  45 #define LDS_BOARD_TEXT \
  46         . = DEFINED(env_offset) ? env_offset : .; \
  47         common/env_embedded.o (.text);
  48
  49 /*
  50  * BOOTP options
  51  */
  52 #define CONFIG_BOOTP_BOOTFILESIZE
  53 #define CONFIG_BOOTP_BOOTPATH
  54 #define CONFIG_BOOTP_GATEWAY
  55 #define CONFIG_BOOTP_HOSTNAME
  56
  57 /* Available command configuration */
  58 #define CONFIG_CMD_CACHE
  59 #define CONFIG_CMD_PING
  60 #define CONFIG_CMD_MII
  61 #define CONFIG_CMD_I2C
  62 #define CONFIG_CMD_DHCP
  63
  64
  65 #define CONFIG_MCFFEC
  66 #ifdef CONFIG_MCFFEC
  67 #define CONFIG_MII              1
  68 #define CONFIG_MII_INIT         1
  69 #define CONFIG_SYS_DISCOVER_PHY
  70 #define CONFIG_SYS_RX_ETH_BUFFER        8
  71 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  72 #define CONFIG_SYS_FEC0_PINMUX          0
  73 #define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
  74 #define CONFIG_SYS_FEC1_PINMUX          0
  75 #define CONFIG_SYS_FEC1_MIIBASE CONFIG_SYS_FEC1_IOBASE
  76 #define MCFFEC_TOUT_LOOP        50000
  77 #define CONFIG_HAS_ETH1
  78 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
  79 #ifndef CONFIG_SYS_DISCOVER_PHY
  80 #define FECDUPLEX               FULL
  81 #define FECSPEED                _100BASET
  82 #else
  83 #ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  84 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  85 #endif
  86 #endif
  87 #endif
  88
  89 /* I2C */
  90 #define CONFIG_SYS_I2C
  91 #define CONFIG_SYS_I2C_FSL
  92 #define CONFIG_SYS_FSL_I2C_SPEED        80000
  93 #define CONFIG_SYS_FSL_I2C_SLAVE        0x7F
  94 #define CONFIG_SYS_FSL_I2C_OFFSET       0x00000300
  95 #define CONFIG_SYS_IMMR         CONFIG_SYS_MBAR
  96 #define CONFIG_SYS_I2C_PINMUX_REG       (gpio_reg->par_feci2c)
  97 #define CONFIG_SYS_I2C_PINMUX_CLR       (0xFFF0)
  98 #define CONFIG_SYS_I2C_PINMUX_SET       (0x000F)
  99
 100 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 101
 102 #if (CONFIG_CMD_KGDB)
 103 #       define CONFIG_SYS_CBSIZE        1024
 104 #else
 105 #       define CONFIG_SYS_CBSIZE        256
 106 #endif
 107 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 108 #define CONFIG_SYS_MAXARGS              16
 109 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 110
 111 #define CONFIG_SYS_LOAD_ADDR            0x800000
 112
 113 #define CONFIG_BOOTDELAY        5
 114 #define CONFIG_BOOTCOMMAND      "bootm ffe40000"
 115 #define CONFIG_SYS_MEMTEST_START        0x400
 116 #define CONFIG_SYS_MEMTEST_END          0x380000
 117
 118 #ifdef CONFIG_MCFFEC
 119 #       define CONFIG_NET_RETRY_COUNT   5
 120 #       define CONFIG_OVERWRITE_ETHADDR_ONCE
 121 #endif                          /* FEC_ENET */
 122
 123 #define CONFIG_EXTRA_ENV_SETTINGS               \
 124         "netdev=eth0\0"                         \
 125         "loadaddr=10000\0"                      \
 126         "uboot=u-boot.bin\0"                    \
 127         "load=tftp ${loadaddr} ${uboot}\0"      \
 128         "upd=run load; run prog\0"              \
 129         "prog=prot off ffe00000 ffe3ffff;"      \
 130         "era ffe00000 ffe3ffff;"                \
 131         "cp.b ${loadaddr} ffe00000 ${filesize};"\
 132         "save\0"                                \
 133         ""
 134
 135 #define CONFIG_SYS_CLK                  150000000
 136
 137 /*
 138  * Low Level Configuration Settings
 139  * (address mappings, register initial values, etc.)
 140  * You should know what you are doing if you make changes here.
 141  */
 142
 143 #define CONFIG_SYS_MBAR         0x40000000
 144
 145 /*-----------------------------------------------------------------------
 146  * Definitions for initial stack pointer and data area (in DPRAM)
 147  */
 148 #define CONFIG_SYS_INIT_RAM_ADDR        0x20000000
 149 #define CONFIG_SYS_INIT_RAM_SIZE        0x10000 /* Size of used area in internal SRAM */
 150 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 151 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 152
 153 /*-----------------------------------------------------------------------
 154  * Start addresses for the final memory configuration
 155  * (Set up by the startup code)
 156  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
 157  */
 158 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 159 #define CONFIG_SYS_SDRAM_SIZE           16      /* SDRAM size in MB */
 160 #define CONFIG_SYS_FLASH_BASE           CONFIG_SYS_CS0_BASE
 161
 162 #ifdef CONFIG_MONITOR_IS_IN_RAM
 163 #define CONFIG_SYS_MONITOR_BASE 0x20000
 164 #else
 165 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
 166 #endif
 167
 168 #define CONFIG_SYS_MONITOR_LEN          0x20000
 169 #define CONFIG_SYS_MALLOC_LEN           (256 << 10)
 170 #define CONFIG_SYS_BOOTPARAMS_LEN       64*1024
 171
 172 /*
 173  * For booting Linux, the board info and command line data
 174  * have to be in the first 8 MB of memory, since this is
 175  * the maximum mapped by the Linux kernel during initialization ??
 176  */
 177 #define CONFIG_SYS_BOOTMAPSZ            (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
 178 #define CONFIG_SYS_BOOTM_LEN            (CONFIG_SYS_SDRAM_SIZE << 20)
 179
 180 /*-----------------------------------------------------------------------
 181  * FLASH organization
 182  */
 183 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks */
 184 #define CONFIG_SYS_MAX_FLASH_SECT       11      /* max number of sectors on one chip */
 185 #define CONFIG_SYS_FLASH_ERASE_TOUT     1000
 186
 187 #define CONFIG_SYS_FLASH_CFI            1
 188 #define CONFIG_FLASH_CFI_DRIVER 1
 189 #define CONFIG_SYS_FLASH_SIZE           0x200000
 190
 191 /*-----------------------------------------------------------------------
 192  * Cache Configuration
 193  */
 194 #define CONFIG_SYS_CACHELINE_SIZE       16
 195
 196 #define ICACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 197                                          CONFIG_SYS_INIT_RAM_SIZE - 8)
 198 #define DCACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 199                                          CONFIG_SYS_INIT_RAM_SIZE - 4)
 200 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_CINV | CF_CACR_INVI)
 201 #define CONFIG_SYS_CACHE_ACR0           (CONFIG_SYS_SDRAM_BASE | \
 202                                          CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
 203                                          CF_ACR_EN | CF_ACR_SM_ALL)
 204 #define CONFIG_SYS_CACHE_ICACR          (CF_CACR_CENB | CF_CACR_CINV | \
 205                                          CF_CACR_DISD | CF_CACR_INVI | \
 206                                          CF_CACR_CEIB | CF_CACR_DCM | \
 207                                          CF_CACR_EUSP)
 208
 209 /*-----------------------------------------------------------------------
 210  * Memory bank definitions
 211  */
 212 #define CONFIG_SYS_CS0_BASE             0xffe00000
 213 #define CONFIG_SYS_CS0_CTRL             0x00001980
 214 #define CONFIG_SYS_CS0_MASK             0x001F0001
 215
 216 #define CONFIG_SYS_CS1_BASE             0x30000000
 217 #define CONFIG_SYS_CS1_CTRL             0x00001900
 218 #define CONFIG_SYS_CS1_MASK             0x00070001
 219
 220 /*-----------------------------------------------------------------------
 221  * Port configuration
 222  */
 223 #define CONFIG_SYS_FECI2C               0x0FA0
 224
 225 #endif  /* _M5275EVB_H */