include/configs/METROBOX.h

   1 /*
   2  * (C) Copyright 2004 Sandburst Corporation
   3  *
   4  * See file CREDITS for list of people who contributed to this
   5  * project.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  */
  22
  23 /************************************************************************
  24  * METROBOX.h - configuration Sandburst MetroBox
  25  ***********************************************************************/
  26
  27 /*
  28  * $Id: METROBOX.h,v 1.21 2005/06/03 15:05:25 tsawyer Exp $
  29  *
  30  *
  31  * $Log: METROBOX.h,v $
  32  * Revision 1.21  2005/06/03 15:05:25  tsawyer
  33  * MB rev 2.0.3 KA rev 0.0.7.  Add CONFIG_VERSION_VARIABLE, Add fakeled to MB
  34  *
  35  * Revision 1.20  2005/04/11 20:51:11  tsawyer
  36  * fix ethernet
  37  *
  38  * Revision 1.19  2005/04/06 15:13:36  tsawyer
  39  * Update appropriate files to coincide with u-boot 1.1.3
  40  *
  41  * Revision 1.18  2005/03/10 14:16:02  tsawyer
  42  * add def'n for cis8201 short etch option.
  43  *
  44  * Revision 1.17  2005/03/09 19:49:51  tsawyer
  45  * Remove KGDB to allow use of 2nd serial port
  46  *
  47  * Revision 1.16  2004/12/02 19:00:23  tsawyer
  48  * Add misc_init_f to turn on i2c-1 and all four fans before sdram init
  49  *
  50  * Revision 1.15  2004/09/15 18:04:12  tsawyer
  51  * add multiple serial port support
  52  *
  53  * Revision 1.14  2004/09/03 15:27:51  tsawyer
  54  * All metrobox boards are at 66.66 sys clock
  55  *
  56  * Revision 1.13  2004/08/05 20:27:46  tsawyer
  57  * Remove system ace definitions, add net console support
  58  *
  59  * Revision 1.12  2004/07/29 20:00:13  tsawyer
  60  * Add i2c bus 1
  61  *
  62  * Revision 1.11  2004/07/21 13:44:18  tsawyer
  63  * SystemACE is out, CF direct to local bus is in
  64  *
  65  * Revision 1.10  2004/06/29 19:08:55  tsawyer
  66  * Add CONFIG_MISC_INIT_R
  67  *
  68  * Revision 1.9  2004/06/28 21:30:53  tsawyer
  69  * Fix default BOOTARGS
  70  *
  71  * Revision 1.8  2004/06/17 15:51:08  tsawyer
  72  * auto complete
  73  *
  74  * Revision 1.7  2004/06/17 15:08:49  tsawyer
  75  * Add autocomplete
  76  *
  77  * Revision 1.6  2004/06/15 12:33:57  tsawyer
  78  * debugging checkpoint
  79  *
  80  * Revision 1.5  2004/06/12 19:48:28  tsawyer
  81  * Debugging checkpoint
  82  *
  83  * Revision 1.4  2004/06/02 13:03:06  tsawyer
  84  * Fix eth addrs
  85  *
  86  * Revision 1.3  2004/05/18 19:56:10  tsawyer
  87  * Change default bootcommand to pImage.metrobox
  88  *
  89  * Revision 1.2  2004/05/18 14:13:44  tsawyer
  90  * Add bringup values for bootargs and bootcommand.
  91  * Remove definition of ipaddress and serverip addresses.
  92  *
  93  * Revision 1.1  2004/04/16 15:08:54  tsawyer
  94  * Initial Revision
  95  *
  96  *
  97  */
  98
  99 #ifndef __CONFIG_H
 100 #define __CONFIG_H
 101
 102 /*-----------------------------------------------------------------------
 103  * High Level Configuration Options
 104  *----------------------------------------------------------------------*/
 105 #define CONFIG_METROBOX           1          /* Board is Metrobox       */
 106 #define CONFIG_440GX              1          /* Specifc GX support      */
 107 #define CONFIG_440                1          /* ... PPC440 family       */
 108 #define CONFIG_4xx                1          /* ... PPC4xx family       */
 109 #define CONFIG_BOARD_EARLY_INIT_F 1          /* Call board_pre_init     */
 110 #define CONFIG_MISC_INIT_F        1          /* Call board misc_init_f  */
 111 #define CONFIG_MISC_INIT_R        1          /* Call board misc_init_r  */
 112 #undef  CONFIG_SYS_DRAM_TEST                         /* Disable-takes long time!*/
 113 #define CONFIG_SYS_CLK_FREQ       66666666   /* external freq to pll    */
 114
 115 #define CONFIG_VERY_BIG_RAM 1
 116 #define CONFIG_VERSION_VARIABLE
 117
 118 #define CONFIG_IDENT_STRING " Sandburst Metrobox"
 119
 120 /*-----------------------------------------------------------------------
 121  * Base addresses -- Note these are effective addresses where the
 122  * actual resources get mapped (not physical addresses)
 123  *----------------------------------------------------------------------*/
 124 #define CONFIG_SYS_SDRAM_BASE          0x00000000    /* _must_ be 0             */
 125 #define CONFIG_SYS_FLASH_BASE          0xfff80000    /* start of FLASH          */
 126 #define CONFIG_SYS_MONITOR_BASE       0xfff80000    /* start of monitor */
 127 #define CONFIG_SYS_PCI_MEMBASE         0x80000000    /* mapped pci memory       */
 128 #define CONFIG_SYS_PERIPHERAL_BASE    0xe0000000    /* internal peripherals     */
 129 #define CONFIG_SYS_ISRAM_BASE          0xc0000000    /* internal SRAM           */
 130 #define CONFIG_SYS_PCI_BASE            0xd0000000    /* internal PCI regs       */
 131
 132 #define CONFIG_SYS_NVRAM_BASE_ADDR   (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000)
 133 #define CONFIG_SYS_FPGA_BASE          (CONFIG_SYS_PERIPHERAL_BASE + 0x08200000)
 134 #define CONFIG_SYS_BME32_BASE         (CONFIG_SYS_PERIPHERAL_BASE + 0x08500000)
 135 #define CONFIG_SYS_GPIO_BASE          (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
 136
 137 /*-----------------------------------------------------------------------
 138  * Initial RAM & stack pointer (placed in internal SRAM)
 139  *----------------------------------------------------------------------*/
 140 #define CONFIG_SYS_TEMP_STACK_OCM    1
 141 #define CONFIG_SYS_OCM_DATA_ADDR     CONFIG_SYS_ISRAM_BASE
 142 #define CONFIG_SYS_INIT_RAM_ADDR     CONFIG_SYS_ISRAM_BASE /* Initial RAM address       */
 143 #define CONFIG_SYS_INIT_RAM_END      0x2000          /* End of used area in RAM */
 144 #define CONFIG_SYS_GBL_DATA_SIZE     128             /* num bytes initial data  */
 145
 146 #define CONFIG_SYS_GBL_DATA_OFFSET   (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
 147 #define CONFIG_SYS_POST_WORD_ADDR    (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
 148 #define CONFIG_SYS_INIT_SP_OFFSET    CONFIG_SYS_POST_WORD_ADDR
 149
 150 #define CONFIG_SYS_MONITOR_LEN        (256 * 1024)   /* Rsrv 256kB for Mon      */
 151 #define CONFIG_SYS_MALLOC_LEN         (128 * 1024)   /* Rsrv 128kB for malloc   */
 152
 153 /*-----------------------------------------------------------------------
 154  * Serial Port
 155  *----------------------------------------------------------------------*/
 156 #undef  CONFIG_SERIAL_SOFTWARE_FIFO
 157 #define CONFIG_SERIAL_MULTI   1
 158 #define CONFIG_BAUDRATE       9600
 159
 160 #define CONFIG_SYS_BAUDRATE_TABLE  \
 161     {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
 162
 163 /*-----------------------------------------------------------------------
 164  * NVRAM/RTC
 165  *
 166  * NOTE: Upper 8 bytes of NVRAM is where the RTC registers are located.
 167  * The DS1743 code assumes this condition (i.e. -- it assumes the base
 168  * address for the RTC registers is:
 169  *
 170  *      CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE
 171  *
 172  *----------------------------------------------------------------------*/
 173 #define CONFIG_SYS_NVRAM_SIZE         (0x2000 - 8)   /* NVRAM size(8k)- RTC regs*/
 174 #define CONFIG_RTC_DS174x     1              /* DS1743 RTC              */
 175
 176 /*-----------------------------------------------------------------------
 177  * FLASH related
 178  *----------------------------------------------------------------------*/
 179 #define CONFIG_SYS_MAX_FLASH_BANKS   1               /* number of banks         */
 180 #define CONFIG_SYS_MAX_FLASH_SECT    8               /* sectors per device      */
 181
 182 #undef  CONFIG_SYS_FLASH_CHECKSUM
 183 #define CONFIG_SYS_FLASH_ERASE_TOUT  120000          /* Flash Erase TO (in ms)   */
 184 #define CONFIG_SYS_FLASH_WRITE_TOUT  500             /* Flash Write TO(in ms)    */
 185
 186 /*-----------------------------------------------------------------------
 187  * DDR SDRAM
 188  *----------------------------------------------------------------------*/
 189 #define CONFIG_SPD_EEPROM     1              /* Use SPD EEPROM for setup*/
 190 #define SPD_EEPROM_ADDRESS    {0x53}         /* SPD i2c spd addresses   */
 191
 192 /*-----------------------------------------------------------------------
 193  * I2C
 194  *----------------------------------------------------------------------*/
 195 #define CONFIG_HARD_I2C       1              /* I2C hardware support    */
 196 #undef  CONFIG_SOFT_I2C                      /* I2C !bit-banged         */
 197 #define CONFIG_SYS_I2C_SPEED          400000         /* I2C speed 400kHz        */
 198 #define CONFIG_SYS_I2C_SLAVE          0x7F           /* I2C slave address       */
 199 #define CONFIG_SYS_I2C_NOPROBES      {0x69}          /* Don't probe these addrs */
 200 #define CONFIG_I2C_BUS1       1              /* Include i2c bus 1 supp  */
 201
 202
 203 /*-----------------------------------------------------------------------
 204  * Environment
 205  *----------------------------------------------------------------------*/
 206 #define CONFIG_ENV_IS_IN_NVRAM   1                   /* Environment uses NVRAM  */
 207 #undef  CONFIG_ENV_IS_IN_FLASH               /* ... not in flash        */
 208 #undef  CONFIG_ENV_IS_IN_EEPROM              /* ... not in EEPROM       */
 209 #define CONFIG_ENV_OVERWRITE  1              /* allow env overwrite     */
 210
 211 #define CONFIG_ENV_SIZE       0x1000         /* Size of Env vars        */
 212 #define CONFIG_ENV_ADDR       (CONFIG_SYS_NVRAM_BASE_ADDR)
 213
 214 #define CONFIG_BOOTARGS       "console=ttyS0,9600 root=/dev/nfs rw nfsroot=$serverip:/home/metrobox0 nfsaddrs=$ipaddr:::::eth0:none "
 215 #define CONFIG_BOOTCOMMAND    "tftp 8000000 pImage.metrobox;bootm 8000000"
 216 #define CONFIG_BOOTDELAY      5             /* disable autoboot */
 217
 218 #define CONFIG_LOADS_ECHO     1              /* echo on for serial dnld */
 219 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1               /* allow baudrate change   */
 220
 221 /*-----------------------------------------------------------------------
 222  * Networking
 223  *----------------------------------------------------------------------*/
 224 #define CONFIG_PPC4xx_EMAC
 225 #define CONFIG_MII            1              /* MII PHY management      */
 226 #define CONFIG_NET_MULTI      1
 227 #define CONFIG_PHY_ADDR       0xff           /* no phy on EMAC0         */
 228 #define CONFIG_PHY1_ADDR      0xff           /* no phy on EMAC1         */
 229 #define CONFIG_PHY2_ADDR      0x08           /* PHY addr, MGMT, EMAC2   */
 230 #define CONFIG_PHY3_ADDR      0x18           /* PHY addr, LCL, EMAC3    */
 231 #define CONFIG_HAS_ETH0
 232 #define CONFIG_HAS_ETH1
 233 #define CONFIG_HAS_ETH2
 234 #define CONFIG_HAS_ETH3
 235 #define CONFIG_PHY_RESET      1              /* reset phy upon startup  */
 236 #define CONFIG_CIS8201_PHY    1              /* RGMII mode for Cicada   */
 237 #define CONFIG_CIS8201_SHORT_ETCH 1          /* Use short etch mode     */
 238 #define CONFIG_PHY_GIGE       1              /* GbE speed/duplex detect */
 239 #define CONFIG_PHY_RESET_DELAY 1000
 240 #define CONFIG_NETMASK        255.255.0.0
 241 #define CONFIG_ETHADDR        00:00:00:00:00:00 /* No EMAC 0 support    */
 242 #define CONFIG_ETH1ADDR       00:00:00:00:00:00 /* No EMAC 1 support    */
 243 #define CONFIG_SYS_RX_ETH_BUFFER     32      /* #eth rx buff & descrs   */
 244
 245
 246 /*
 247  * BOOTP options
 248  */
 249 #define CONFIG_BOOTP_BOOTFILESIZE
 250 #define CONFIG_BOOTP_BOOTPATH
 251 #define CONFIG_BOOTP_GATEWAY
 252 #define CONFIG_BOOTP_HOSTNAME
 253
 254
 255 /*
 256  * Command line configuration.
 257  */
 258 #include <config_cmd_default.h>
 259
 260 #define CONFIG_CMD_PCI
 261 #define CONFIG_CMD_IRQ
 262 #define CONFIG_CMD_I2C
 263 #define CONFIG_CMD_DHCP
 264 #define CONFIG_CMD_DATE
 265 #define CONFIG_CMD_BEDBUG
 266 #define CONFIG_CMD_PING
 267 #define CONFIG_CMD_DIAG
 268 #define CONFIG_CMD_MII
 269 #define CONFIG_CMD_NET
 270 #define CONFIG_CMD_ELF
 271 #define CONFIG_CMD_IDE
 272 #define CONFIG_CMD_FAT
 273
 274
 275 /* Include NetConsole support */
 276 #define CONFIG_NETCONSOLE
 277
 278 /* Include auto complete with tabs */
 279 #define CONFIG_AUTO_COMPLETE 1
 280 #define CONFIG_AUTO_COMPLETE 1
 281 #define CONFIG_SYS_ALT_MEMTEST       1       /* use real memory test     */
 282
 283 #define CONFIG_SYS_LONGHELP                          /* undef to save memory    */
 284 #define CONFIG_SYS_PROMPT             "MetroBox=> "  /* Monitor Command Prompt  */
 285
 286 #define CONFIG_SYS_HUSH_PARSER         1             /* HUSH for ext'd cli      */
 287 #define CONFIG_SYS_PROMPT_HUSH_PS2    "> "
 288
 289
 290 /*-----------------------------------------------------------------------
 291  * Console Buffer
 292  *----------------------------------------------------------------------*/
 293 #if defined(CONFIG_CMD_KGDB)
 294 #define CONFIG_SYS_CBSIZE             1024           /* Console I/O Buffer Size */
 295 #else
 296 #define CONFIG_SYS_CBSIZE             256            /* Console I/O Buffer Size */
 297 #endif
 298 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 299                                              /* Print Buffer Size       */
 300 #define CONFIG_SYS_MAXARGS            16             /* max number of cmd args  */
 301 #define CONFIG_SYS_BARGSIZE           CONFIG_SYS_CBSIZE     /* Boot Arg Buffer Size     */
 302
 303 /*-----------------------------------------------------------------------
 304  * Memory Test
 305  *----------------------------------------------------------------------*/
 306 #define CONFIG_SYS_MEMTEST_START     0x0400000       /* memtest works on        */
 307 #define CONFIG_SYS_MEMTEST_END        0x0C00000      /* 4 ... 12 MB in DRAM     */
 308
 309 /*-----------------------------------------------------------------------
 310  * Compact Flash (in true IDE mode)
 311  *----------------------------------------------------------------------*/
 312 #undef  CONFIG_IDE_8xx_DIRECT           /* no pcmcia interface required */
 313 #undef  CONFIG_IDE_LED                  /* no led for ide supported     */
 314
 315 #define CONFIG_IDE_RESET                /* reset for ide supported      */
 316 #define CONFIG_SYS_IDE_MAXBUS           1       /* max. 1 IDE busses    */
 317 #define CONFIG_SYS_IDE_MAXDEVICE        (CONFIG_SYS_IDE_MAXBUS*1) /* max. 1 drives per IDE bus */
 318
 319 #define CONFIG_SYS_ATA_BASE_ADDR        0xF0000000
 320 #define CONFIG_SYS_ATA_IDE0_OFFSET      0x0000
 321 #define CONFIG_SYS_ATA_DATA_OFFSET      0x0000   /* Offset for data I/O */
 322 #define CONFIG_SYS_ATA_REG_OFFSET       0x0000   /* Offset for normal register accesses*/
 323 #define CONFIG_SYS_ATA_ALT_OFFSET       0x100000 /* Offset for alternate registers */
 324
 325 #define CONFIG_SYS_ATA_STRIDE           2        /* Directly connected CF, needs a stride
 326                                             to get to the correct offset */
 327 #define CONFIG_DOS_PARTITION  1              /* Include dos partition   */
 328
 329 /*-----------------------------------------------------------------------
 330  * PCI
 331  *----------------------------------------------------------------------*/
 332 /* General PCI */
 333 #define CONFIG_PCI                           /* include pci support     */
 334 #define CONFIG_PCI_PNP                       /* do pci plug-and-play    */
 335 #define CONFIG_PCI_SCAN_SHOW                 /* show pci devices        */
 336 #define CONFIG_SYS_PCI_TARGBASE      (CONFIG_SYS_PCI_MEMBASE)
 337
 338 /* Board-specific PCI */
 339 #define CONFIG_SYS_PCI_TARGET_INIT                   /* let board init pci target*/
 340
 341 #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x17BA        /* Sandburst */
 342 #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe        /* Whatever */
 343
 344 /*
 345  * For booting Linux, the board info and command line data
 346  * have to be in the first 8 MB of memory, since this is
 347  * the maximum mapped by the Linux kernel during initialization.
 348  */
 349 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20) /* Initial Memory map for Linux */
 350
 351 /*
 352  * Internal Definitions
 353  *
 354  * Boot Flags
 355  */
 356 #define BOOTFLAG_COLD         0x01           /* Normal PowerOn: Boot from FLASH */
 357 #define BOOTFLAG_WARM         0x02           /* Software reboot */
 358
 359 #if defined(CONFIG_CMD_KGDB)
 360 #define CONFIG_KGDB_BAUDRATE  230400         /* kgdb serial port baud   */
 361 #define CONFIG_KGDB_SER_INDEX 2              /* kgdb serial port        */
 362 #endif
 363
 364 /*-----------------------------------------------------------------------
 365  * Miscellaneous configurable options
 366  *----------------------------------------------------------------------*/
 367 #undef CONFIG_WATCHDOG                       /* watchdog disabled       */
 368 #define CONFIG_SYS_LOAD_ADDR          0x8000000      /* default load address    */
 369 #define CONFIG_SYS_EXTBDINFO          1              /* use extended board_info */
 370
 371 #define CONFIG_SYS_HZ                 100            /* decr freq: 1 ms ticks   */
 372
 373
 374 #endif  /* __CONFIG_H */