include/configs/METROBOX.h

   1 /*
   2  * (C) Copyright 2004 Sandburst Corporation
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 /************************************************************************
   8  * METROBOX.h - configuration Sandburst MetroBox
   9  ***********************************************************************/
  10
  11 /*
  12  * $Id: METROBOX.h,v 1.21 2005/06/03 15:05:25 tsawyer Exp $
  13  *
  14  *
  15  * $Log: METROBOX.h,v $
  16  * Revision 1.21  2005/06/03 15:05:25  tsawyer
  17  * MB rev 2.0.3 KA rev 0.0.7.  Add CONFIG_VERSION_VARIABLE, Add fakeled to MB
  18  *
  19  * Revision 1.20  2005/04/11 20:51:11  tsawyer
  20  * fix ethernet
  21  *
  22  * Revision 1.19  2005/04/06 15:13:36  tsawyer
  23  * Update appropriate files to coincide with u-boot 1.1.3
  24  *
  25  * Revision 1.18  2005/03/10 14:16:02  tsawyer
  26  * add def'n for cis8201 short etch option.
  27  *
  28  * Revision 1.17  2005/03/09 19:49:51  tsawyer
  29  * Remove KGDB to allow use of 2nd serial port
  30  *
  31  * Revision 1.16  2004/12/02 19:00:23  tsawyer
  32  * Add misc_init_f to turn on i2c-1 and all four fans before sdram init
  33  *
  34  * Revision 1.15  2004/09/15 18:04:12  tsawyer
  35  * add multiple serial port support
  36  *
  37  * Revision 1.14  2004/09/03 15:27:51  tsawyer
  38  * All metrobox boards are at 66.66 sys clock
  39  *
  40  * Revision 1.13  2004/08/05 20:27:46  tsawyer
  41  * Remove system ace definitions, add net console support
  42  *
  43  * Revision 1.12  2004/07/29 20:00:13  tsawyer
  44  * Add i2c bus 1
  45  *
  46  * Revision 1.11  2004/07/21 13:44:18  tsawyer
  47  * SystemACE is out, CF direct to local bus is in
  48  *
  49  * Revision 1.10  2004/06/29 19:08:55  tsawyer
  50  * Add CONFIG_MISC_INIT_R
  51  *
  52  * Revision 1.9  2004/06/28 21:30:53  tsawyer
  53  * Fix default BOOTARGS
  54  *
  55  * Revision 1.8  2004/06/17 15:51:08  tsawyer
  56  * auto complete
  57  *
  58  * Revision 1.7  2004/06/17 15:08:49  tsawyer
  59  * Add autocomplete
  60  *
  61  * Revision 1.6  2004/06/15 12:33:57  tsawyer
  62  * debugging checkpoint
  63  *
  64  * Revision 1.5  2004/06/12 19:48:28  tsawyer
  65  * Debugging checkpoint
  66  *
  67  * Revision 1.4  2004/06/02 13:03:06  tsawyer
  68  * Fix eth addrs
  69  *
  70  * Revision 1.3  2004/05/18 19:56:10  tsawyer
  71  * Change default bootcommand to pImage.metrobox
  72  *
  73  * Revision 1.2  2004/05/18 14:13:44  tsawyer
  74  * Add bringup values for bootargs and bootcommand.
  75  * Remove definition of ipaddress and serverip addresses.
  76  *
  77  * Revision 1.1  2004/04/16 15:08:54  tsawyer
  78  * Initial Revision
  79  *
  80  *
  81  */
  82
  83 #ifndef __CONFIG_H
  84 #define __CONFIG_H
  85
  86 /*-----------------------------------------------------------------------
  87  * High Level Configuration Options
  88  *----------------------------------------------------------------------*/
  89 #define CONFIG_METROBOX           1          /* Board is Metrobox       */
  90 #define CONFIG_440GX              1          /* Specifc GX support      */
  91 #define CONFIG_440                1          /* ... PPC440 family       */
  92 #define CONFIG_BOARD_EARLY_INIT_F 1          /* Call board_pre_init     */
  93 #define CONFIG_MISC_INIT_F        1          /* Call board misc_init_f  */
  94 #define CONFIG_MISC_INIT_R        1          /* Call board misc_init_r  */
  95
  96 #define CONFIG_SYS_TEXT_BASE    0xFFF80000
  97
  98 #undef  CONFIG_SYS_DRAM_TEST                         /* Disable-takes long time!*/
  99 #define CONFIG_SYS_CLK_FREQ       66666666   /* external freq to pll    */
 100
 101 #define CONFIG_VERY_BIG_RAM 1
 102 #define CONFIG_VERSION_VARIABLE
 103
 104 #define CONFIG_IDENT_STRING " Sandburst Metrobox"
 105
 106 /*-----------------------------------------------------------------------
 107  * Base addresses -- Note these are effective addresses where the
 108  * actual resources get mapped (not physical addresses)
 109  *----------------------------------------------------------------------*/
 110 #define CONFIG_SYS_SDRAM_BASE          0x00000000    /* _must_ be 0             */
 111 #define CONFIG_SYS_FLASH_BASE          0xfff80000    /* start of FLASH          */
 112 #define CONFIG_SYS_MONITOR_BASE       0xfff80000    /* start of monitor */
 113 #define CONFIG_SYS_PCI_MEMBASE         0x80000000    /* mapped pci memory       */
 114 #define CONFIG_SYS_ISRAM_BASE          0xc0000000    /* internal SRAM           */
 115 #define CONFIG_SYS_PCI_BASE            0xd0000000    /* internal PCI regs       */
 116
 117 #define CONFIG_SYS_NVRAM_BASE_ADDR   (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000)
 118 #define CONFIG_SYS_FPGA_BASE          (CONFIG_SYS_PERIPHERAL_BASE + 0x08200000)
 119 #define CONFIG_SYS_BME32_BASE         (CONFIG_SYS_PERIPHERAL_BASE + 0x08500000)
 120 #define CONFIG_SYS_GPIO_BASE          (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
 121
 122 /*-----------------------------------------------------------------------
 123  * Initial RAM & stack pointer (placed in internal SRAM)
 124  *----------------------------------------------------------------------*/
 125 #define CONFIG_SYS_TEMP_STACK_OCM    1
 126 #define CONFIG_SYS_OCM_DATA_ADDR     CONFIG_SYS_ISRAM_BASE
 127 #define CONFIG_SYS_INIT_RAM_ADDR     CONFIG_SYS_ISRAM_BASE /* Initial RAM address       */
 128 #define CONFIG_SYS_INIT_RAM_SIZE      0x2000         /* Size of used area in RAM */
 129
 130 #define CONFIG_SYS_GBL_DATA_OFFSET   (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 131 #define CONFIG_SYS_INIT_SP_OFFSET    (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
 132
 133 #define CONFIG_SYS_MONITOR_LEN        (256 * 1024)   /* Rsrv 256kB for Mon      */
 134 #define CONFIG_SYS_MALLOC_LEN         (128 * 1024)   /* Rsrv 128kB for malloc   */
 135
 136 /*-----------------------------------------------------------------------
 137  * Serial Port
 138  *----------------------------------------------------------------------*/
 139 #define CONFIG_CONS_INDEX       1       /* Use UART0                    */
 140 #define CONFIG_SYS_NS16550
 141 #define CONFIG_SYS_NS16550_SERIAL
 142 #define CONFIG_SYS_NS16550_REG_SIZE     1
 143 #define CONFIG_SYS_NS16550_CLK          get_serial_clock()
 144 #define CONFIG_BAUDRATE       9600
 145
 146 #define CONFIG_SYS_BAUDRATE_TABLE  \
 147     {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
 148
 149 /*-----------------------------------------------------------------------
 150  * NVRAM/RTC
 151  *
 152  * NOTE: Upper 8 bytes of NVRAM is where the RTC registers are located.
 153  * The DS1743 code assumes this condition (i.e. -- it assumes the base
 154  * address for the RTC registers is:
 155  *
 156  *      CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE
 157  *
 158  *----------------------------------------------------------------------*/
 159 #define CONFIG_SYS_NVRAM_SIZE         (0x2000 - 8)   /* NVRAM size(8k)- RTC regs*/
 160 #define CONFIG_RTC_DS174x     1              /* DS1743 RTC              */
 161
 162 /*-----------------------------------------------------------------------
 163  * FLASH related
 164  *----------------------------------------------------------------------*/
 165 #define CONFIG_SYS_MAX_FLASH_BANKS   1               /* number of banks         */
 166 #define CONFIG_SYS_MAX_FLASH_SECT    8               /* sectors per device      */
 167
 168 #undef  CONFIG_SYS_FLASH_CHECKSUM
 169 #define CONFIG_SYS_FLASH_ERASE_TOUT  120000          /* Flash Erase TO (in ms)   */
 170 #define CONFIG_SYS_FLASH_WRITE_TOUT  500             /* Flash Write TO(in ms)    */
 171
 172 /*-----------------------------------------------------------------------
 173  * DDR SDRAM
 174  *----------------------------------------------------------------------*/
 175 #define CONFIG_SPD_EEPROM     1              /* Use SPD EEPROM for setup*/
 176 #define SPD_EEPROM_ADDRESS    {0x53}         /* SPD i2c spd addresses   */
 177
 178 /*-----------------------------------------------------------------------
 179  * I2C
 180  *----------------------------------------------------------------------*/
 181 #define CONFIG_SYS_I2C
 182 #define CONFIG_SYS_I2C_PPC4XX
 183 #define CONFIG_SYS_I2C_PPC4XX_CH0
 184 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
 185 #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
 186 #define CONFIG_SYS_I2C_PPC4XX_CH1
 187 #define CONFIG_SYS_I2C_PPC4XX_SPEED_1 400000 /* I2C speed 400kHz */
 188 #define CONFIG_SYS_I2C_PPC4XX_SLAVE_1 0x7F
 189 #define CONFIG_SYS_I2C_NOPROBES { { 0, 0x69} } /* Don't probe these addrs */
 190
 191 /*-----------------------------------------------------------------------
 192  * Environment
 193  *----------------------------------------------------------------------*/
 194 #define CONFIG_ENV_IS_IN_NVRAM   1                   /* Environment uses NVRAM  */
 195 #undef  CONFIG_ENV_IS_IN_FLASH               /* ... not in flash        */
 196 #undef  CONFIG_ENV_IS_IN_EEPROM              /* ... not in EEPROM       */
 197 #define CONFIG_ENV_OVERWRITE  1              /* allow env overwrite     */
 198
 199 #define CONFIG_ENV_SIZE       0x1000         /* Size of Env vars        */
 200 #define CONFIG_ENV_ADDR       (CONFIG_SYS_NVRAM_BASE_ADDR)
 201
 202 #define CONFIG_BOOTARGS       "console=ttyS0,9600 root=/dev/nfs rw nfsroot=$serverip:/home/metrobox0 nfsaddrs=$ipaddr:::::eth0:none "
 203 #define CONFIG_BOOTCOMMAND    "tftp 8000000 pImage.metrobox;bootm 8000000"
 204 #define CONFIG_BOOTDELAY      5             /* disable autoboot */
 205
 206 #define CONFIG_LOADS_ECHO     1              /* echo on for serial dnld */
 207 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1               /* allow baudrate change   */
 208
 209 /*-----------------------------------------------------------------------
 210  * Networking
 211  *----------------------------------------------------------------------*/
 212 #define CONFIG_PPC4xx_EMAC
 213 #define CONFIG_MII            1              /* MII PHY management      */
 214 #define CONFIG_PHY_ADDR       0xff           /* no phy on EMAC0         */
 215 #define CONFIG_PHY1_ADDR      0xff           /* no phy on EMAC1         */
 216 #define CONFIG_PHY2_ADDR      0x08           /* PHY addr, MGMT, EMAC2   */
 217 #define CONFIG_PHY3_ADDR      0x18           /* PHY addr, LCL, EMAC3    */
 218 #define CONFIG_HAS_ETH0
 219 #define CONFIG_HAS_ETH1
 220 #define CONFIG_HAS_ETH2
 221 #define CONFIG_HAS_ETH3
 222 #define CONFIG_PHY_RESET      1              /* reset phy upon startup  */
 223 #define CONFIG_CIS8201_PHY    1              /* RGMII mode for Cicada   */
 224 #define CONFIG_CIS8201_SHORT_ETCH 1          /* Use short etch mode     */
 225 #define CONFIG_PHY_GIGE       1              /* GbE speed/duplex detect */
 226 #define CONFIG_PHY_RESET_DELAY 1000
 227 #define CONFIG_NETMASK        255.255.0.0
 228 #define CONFIG_ETHADDR        00:00:00:00:00:00 /* No EMAC 0 support    */
 229 #define CONFIG_ETH1ADDR       00:00:00:00:00:00 /* No EMAC 1 support    */
 230 #define CONFIG_SYS_RX_ETH_BUFFER     32      /* #eth rx buff & descrs   */
 231
 232
 233 /*
 234  * BOOTP options
 235  */
 236 #define CONFIG_BOOTP_BOOTFILESIZE
 237 #define CONFIG_BOOTP_BOOTPATH
 238 #define CONFIG_BOOTP_GATEWAY
 239 #define CONFIG_BOOTP_HOSTNAME
 240
 241
 242 /*
 243  * Command line configuration.
 244  */
 245 #include <config_cmd_default.h>
 246
 247 #define CONFIG_CMD_PCI
 248 #define CONFIG_CMD_IRQ
 249 #define CONFIG_CMD_I2C
 250 #define CONFIG_CMD_DHCP
 251 #define CONFIG_CMD_DATE
 252 #define CONFIG_CMD_BEDBUG
 253 #define CONFIG_CMD_PING
 254 #define CONFIG_CMD_DIAG
 255 #define CONFIG_CMD_MII
 256 #define CONFIG_CMD_NET
 257 #define CONFIG_CMD_ELF
 258 #define CONFIG_CMD_IDE
 259 #define CONFIG_CMD_FAT
 260
 261
 262 /* Include NetConsole support */
 263 #define CONFIG_NETCONSOLE
 264
 265 /* Include auto complete with tabs */
 266 #define CONFIG_AUTO_COMPLETE 1
 267 #define CONFIG_AUTO_COMPLETE 1
 268 #define CONFIG_SYS_ALT_MEMTEST       1       /* use real memory test     */
 269
 270 #define CONFIG_SYS_LONGHELP                          /* undef to save memory    */
 271 #define CONFIG_SYS_PROMPT             "MetroBox=> "  /* Monitor Command Prompt  */
 272
 273 #define CONFIG_SYS_HUSH_PARSER         1             /* HUSH for ext'd cli      */
 274
 275
 276 /*-----------------------------------------------------------------------
 277  * Console Buffer
 278  *----------------------------------------------------------------------*/
 279 #if defined(CONFIG_CMD_KGDB)
 280 #define CONFIG_SYS_CBSIZE             1024           /* Console I/O Buffer Size */
 281 #else
 282 #define CONFIG_SYS_CBSIZE             256            /* Console I/O Buffer Size */
 283 #endif
 284 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 285                                              /* Print Buffer Size       */
 286 #define CONFIG_SYS_MAXARGS            16             /* max number of cmd args  */
 287 #define CONFIG_SYS_BARGSIZE           CONFIG_SYS_CBSIZE     /* Boot Arg Buffer Size     */
 288
 289 /*-----------------------------------------------------------------------
 290  * Memory Test
 291  *----------------------------------------------------------------------*/
 292 #define CONFIG_SYS_MEMTEST_START     0x0400000       /* memtest works on        */
 293 #define CONFIG_SYS_MEMTEST_END        0x0C00000      /* 4 ... 12 MB in DRAM     */
 294
 295 /*-----------------------------------------------------------------------
 296  * Compact Flash (in true IDE mode)
 297  *----------------------------------------------------------------------*/
 298 #undef  CONFIG_IDE_8xx_DIRECT           /* no pcmcia interface required */
 299 #undef  CONFIG_IDE_LED                  /* no led for ide supported     */
 300
 301 #define CONFIG_IDE_RESET                /* reset for ide supported      */
 302 #define CONFIG_SYS_IDE_MAXBUS           1       /* max. 1 IDE busses    */
 303 #define CONFIG_SYS_IDE_MAXDEVICE        (CONFIG_SYS_IDE_MAXBUS*1) /* max. 1 drives per IDE bus */
 304
 305 #define CONFIG_SYS_ATA_BASE_ADDR        0xF0000000
 306 #define CONFIG_SYS_ATA_IDE0_OFFSET      0x0000
 307 #define CONFIG_SYS_ATA_DATA_OFFSET      0x0000   /* Offset for data I/O */
 308 #define CONFIG_SYS_ATA_REG_OFFSET       0x0000   /* Offset for normal register accesses*/
 309 #define CONFIG_SYS_ATA_ALT_OFFSET       0x100000 /* Offset for alternate registers */
 310
 311 #define CONFIG_SYS_ATA_STRIDE           2        /* Directly connected CF, needs a stride
 312                                             to get to the correct offset */
 313 #define CONFIG_DOS_PARTITION  1              /* Include dos partition   */
 314
 315 /*-----------------------------------------------------------------------
 316  * PCI
 317  *----------------------------------------------------------------------*/
 318 /* General PCI */
 319 #define CONFIG_PCI                           /* include pci support     */
 320 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
 321 #define CONFIG_PCI_PNP                       /* do pci plug-and-play    */
 322 #define CONFIG_PCI_SCAN_SHOW                 /* show pci devices        */
 323 #define CONFIG_SYS_PCI_TARGBASE      (CONFIG_SYS_PCI_MEMBASE)
 324
 325 /* Board-specific PCI */
 326 #define CONFIG_SYS_PCI_TARGET_INIT                   /* let board init pci target*/
 327
 328 #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x17BA        /* Sandburst */
 329 #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe        /* Whatever */
 330
 331 /*
 332  * For booting Linux, the board info and command line data
 333  * have to be in the first 8 MB of memory, since this is
 334  * the maximum mapped by the Linux kernel during initialization.
 335  */
 336 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20) /* Initial Memory map for Linux */
 337
 338 #if defined(CONFIG_CMD_KGDB)
 339 #define CONFIG_KGDB_BAUDRATE  230400         /* kgdb serial port baud   */
 340 #endif
 341
 342 /*-----------------------------------------------------------------------
 343  * Miscellaneous configurable options
 344  *----------------------------------------------------------------------*/
 345 #undef CONFIG_WATCHDOG                       /* watchdog disabled       */
 346 #define CONFIG_SYS_LOAD_ADDR          0x8000000      /* default load address    */
 347 #define CONFIG_SYS_EXTBDINFO          1              /* use extended board_info */
 348
 349 #endif  /* __CONFIG_H */